ARM GAS /tmp/ccfbYRip.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "TransformFunctions.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.arm_rfft_32_fast_init_f32,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .syntax unified 19 .thumb 20 .thumb_func 21 .fpu fpv4-sp-d16 23 arm_rfft_32_fast_init_f32: 24 .LFB210: 25 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Title: arm_cfft_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Description: Split Radix Decimation in Frequency CFFT Floating point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @ingroup groupTransforms ARM GAS /tmp/ccfbYRip.s page 2 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @addtogroup RealFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 32pt floating-point real FFT. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 26 .loc 1 52 0 27 .cfi_startproc 28 @ args = 0, pretend = 0, frame = 0 29 @ frame_needed = 0, uses_anonymous_args = 0 30 @ link register save eliminated. 31 .LVL0: 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 32 .loc 1 56 0 33 0000 80B1 cbz r0, .L3 34 .LVL1: 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 35 .loc 1 52 0 36 0002 30B4 push {r4, r5} 37 .LCFI0: 38 .cfi_def_cfa_offset 8 39 .cfi_offset 4, -8 40 .cfi_offset 5, -4 41 .LBB964: 42 .LBB965: 43 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Title: arm_cfft_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Description: Initialization function for cfft f32 instance 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * $Date: 07. January 2020 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * $Revision: V1.7.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * ARM GAS /tmp/ccfbYRip.s page 3 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #define FFTINIT(EXT,SIZE) \ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @addtogroup ComplexFFT 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @{ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @brief Initialization function for the cfft f32 function 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @param[in,out] S points to an instance of the floating-point CFFT structure 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @param[in] fftLen fft length (number of complex samples) 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @return execution status 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** @par Use of this function is mandatory only for the MVE version of the FFT. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** Other versions can still initialize directly the data structure using 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** variables declared in arm_const_structs.h 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #include "arm_math.h" 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #include "arm_common_tables.h" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #include "arm_const_structs.h" 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #include "arm_vec_fft.h" 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #include "arm_mve_tables.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_status arm_cfft_radix4by2_rearrange_twiddles_f32(arm_cfft_instance_f32 *S, int twidCoefModifier 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** switch (S->fftLen >> (twidCoefModifier - 1)) { 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 4096U: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_f32; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_f32; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_f32; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_f32; ARM GAS /tmp/ccfbYRip.s page 4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_f32; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_f32; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 1024U: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_f32; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_f32; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_f32; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_f32; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_f32; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_f32; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 256U: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_f32; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_f32; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_f32; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_f32; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_f32; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_f32; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 64U: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_f32; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_f32; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_f32; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_f32; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_f32; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_f32; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 16U: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_f32; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_f32; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_f32; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_f32; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_f32; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_f32; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; ARM GAS /tmp/ccfbYRip.s page 5 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** default: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** return(ARM_MATH_ARGUMENT_ERROR); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* invalid sizes already filtered */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** return(ARM_MATH_SUCCESS); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_status arm_cfft_init_f32( 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_cfft_instance_f32 * S, 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** uint16_t fftLen) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the default arm status */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the FFT length */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->fftLen = fftLen; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the Twiddle coefficient pointer */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = NULL; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of Instance structure depending on the FFT length */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** switch (S->fftLen) { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 4096 point FFT */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 4096U: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_4096; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 2048 point FFT */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 2048U: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_2048; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 1024 point FFT */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 1024U: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; ARM GAS /tmp/ccfbYRip.s page 6 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_1024; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 512 point FFT */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 512U: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_512; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 256U: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_256; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 128U: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_128; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 64U: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_64; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 32U: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_32; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 16U: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 16 point FFT */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; ARM GAS /tmp/ccfbYRip.s page 7 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = (float32_t *)twiddleCoef_16; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** default: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Reporting argument error if fftSize is not valid value */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** return (status); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #else 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_status arm_cfft_init_f32( 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_cfft_instance_f32 * S, 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** uint16_t fftLen) 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** { 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the default arm status */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the FFT length */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->fftLen = fftLen; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the Twiddle coefficient pointer */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** S->pTwiddle = NULL; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of Instance structure depending on the FFT length */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** switch (S->fftLen) { 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 4096 point FFT */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 4096U: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,4096); 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 2048 point FFT */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 2048U: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,2048); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 1024 point FFT */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 1024U: 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,1024); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 8 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 512 point FFT */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 512U: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the bit reversal table modifier */ 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,512); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 256U: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,256); 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 128U: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,128); 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 64U: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,64); 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 32U: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,32); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** case 16U: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initializations of structure parameters for 16 point FFT */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** FFTINIT(f32,16); 44 .loc 2 336 0 45 0004 094B ldr r3, .L9 46 .LBE965: 47 .LBE964: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),16); 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 32U; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32; 48 .loc 1 65 0 49 0006 0A4A ldr r2, .L9+4 50 .LBB968: 51 .LBB966: 52 .loc 2 336 0 53 0008 9989 ldrh r1, [r3, #12] 54 000a 8181 strh r1, [r0, #12] @ movhi 55 000c D3E90145 ldrd r4, r5, [r3, #4] ARM GAS /tmp/ccfbYRip.s page 9 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 56 .loc 2 267 0 57 0010 1021 movs r1, #16 58 .LBE966: 59 .LBE968: 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32; 60 .loc 1 64 0 61 0012 2023 movs r3, #32 62 .LBB969: 63 .LBB967: 64 .loc 2 336 0 65 0014 C0E90145 strd r4, r5, [r0, #4] 66 .LVL2: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 67 .loc 2 267 0 68 0018 0180 strh r1, [r0] @ movhi 69 .LBE967: 70 .LBE969: 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32; 71 .loc 1 64 0 72 001a 0382 strh r3, [r0, #16] @ movhi 73 .loc 1 65 0 74 001c 4261 str r2, [r0, #20] 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 75 .loc 1 68 0 76 001e 30BC pop {r4, r5} 77 .LCFI1: 78 .cfi_restore 5 79 .cfi_restore 4 80 .cfi_def_cfa_offset 0 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 81 .loc 1 67 0 82 0020 0020 movs r0, #0 83 .LVL3: 84 .loc 1 68 0 85 0022 7047 bx lr 86 .LVL4: 87 .L3: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 88 .loc 1 56 0 89 0024 4FF0FF30 mov r0, #-1 90 .LVL5: 91 .loc 1 68 0 92 0028 7047 bx lr 93 .L10: 94 002a 00BF .align 2 95 .L9: 96 002c 00000000 .word arm_cfft_sR_f32_len16 97 0030 00000000 .word twiddleCoef_rfft_32 98 .cfi_endproc 99 .LFE210: 101 .section .text.arm_rfft_64_fast_init_f32,"ax",%progbits 102 .align 1 103 .p2align 2,,3 104 .syntax unified ARM GAS /tmp/ccfbYRip.s page 10 105 .thumb 106 .thumb_func 107 .fpu fpv4-sp-d16 109 arm_rfft_64_fast_init_f32: 110 .LFB211: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 64pt floating-point real FFT. 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 111 .loc 1 82 0 112 .cfi_startproc 113 @ args = 0, pretend = 0, frame = 0 114 @ frame_needed = 0, uses_anonymous_args = 0 115 @ link register save eliminated. 116 .LVL6: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 117 .loc 1 86 0 118 0000 80B1 cbz r0, .L13 119 .LVL7: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 120 .loc 1 82 0 121 0002 30B4 push {r4, r5} 122 .LCFI2: 123 .cfi_def_cfa_offset 8 124 .cfi_offset 4, -8 125 .cfi_offset 5, -4 126 .LBB970: 127 .LBB971: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 128 .loc 2 329 0 129 0004 094B ldr r3, .L18 130 .LBE971: 131 .LBE970: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),32); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 64U; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_64; 132 .loc 1 95 0 133 0006 0A4A ldr r2, .L18+4 ARM GAS /tmp/ccfbYRip.s page 11 134 .LBB974: 135 .LBB972: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 136 .loc 2 329 0 137 0008 9989 ldrh r1, [r3, #12] 138 000a 8181 strh r1, [r0, #12] @ movhi 139 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 140 .loc 2 267 0 141 0010 2021 movs r1, #32 142 .LBE972: 143 .LBE974: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 144 .loc 1 93 0 145 0012 4023 movs r3, #64 146 .LBB975: 147 .LBB973: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 148 .loc 2 329 0 149 0014 C0E90145 strd r4, r5, [r0, #4] 150 .LVL8: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 151 .loc 2 267 0 152 0018 0180 strh r1, [r0] @ movhi 153 .LBE973: 154 .LBE975: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 155 .loc 1 93 0 156 001a 0382 strh r3, [r0, #16] @ movhi 157 .loc 1 95 0 158 001c 4261 str r2, [r0, #20] 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 159 .loc 1 98 0 160 001e 30BC pop {r4, r5} 161 .LCFI3: 162 .cfi_restore 5 163 .cfi_restore 4 164 .cfi_def_cfa_offset 0 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 165 .loc 1 97 0 166 0020 0020 movs r0, #0 167 .LVL9: 168 .loc 1 98 0 169 0022 7047 bx lr 170 .LVL10: 171 .L13: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 172 .loc 1 86 0 173 0024 4FF0FF30 mov r0, #-1 174 .LVL11: 175 .loc 1 98 0 176 0028 7047 bx lr 177 .L19: 178 002a 00BF .align 2 179 .L18: ARM GAS /tmp/ccfbYRip.s page 12 180 002c 00000000 .word arm_cfft_sR_f32_len32 181 0030 00000000 .word twiddleCoef_rfft_64 182 .cfi_endproc 183 .LFE211: 185 .section .text.arm_rfft_128_fast_init_f32,"ax",%progbits 186 .align 1 187 .p2align 2,,3 188 .syntax unified 189 .thumb 190 .thumb_func 191 .fpu fpv4-sp-d16 193 arm_rfft_128_fast_init_f32: 194 .LFB212: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 128pt floating-point real FFT. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 195 .loc 1 112 0 196 .cfi_startproc 197 @ args = 0, pretend = 0, frame = 0 198 @ frame_needed = 0, uses_anonymous_args = 0 199 @ link register save eliminated. 200 .LVL12: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 201 .loc 1 116 0 202 0000 80B1 cbz r0, .L22 203 .LVL13: 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 204 .loc 1 112 0 205 0002 30B4 push {r4, r5} 206 .LCFI4: 207 .cfi_def_cfa_offset 8 208 .cfi_offset 4, -8 209 .cfi_offset 5, -4 210 .LBB976: 211 .LBB977: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 212 .loc 2 323 0 213 0004 094B ldr r3, .L27 214 .LBE977: 215 .LBE976: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),64); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) ARM GAS /tmp/ccfbYRip.s page 13 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 128; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_128; 216 .loc 1 125 0 217 0006 0A4A ldr r2, .L27+4 218 .LBB980: 219 .LBB978: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 220 .loc 2 323 0 221 0008 9989 ldrh r1, [r3, #12] 222 000a 8181 strh r1, [r0, #12] @ movhi 223 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 224 .loc 2 267 0 225 0010 4021 movs r1, #64 226 .LBE978: 227 .LBE980: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 228 .loc 1 123 0 229 0012 8023 movs r3, #128 230 .LBB981: 231 .LBB979: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 232 .loc 2 323 0 233 0014 C0E90145 strd r4, r5, [r0, #4] 234 .LVL14: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 235 .loc 2 267 0 236 0018 0180 strh r1, [r0] @ movhi 237 .LBE979: 238 .LBE981: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 239 .loc 1 123 0 240 001a 0382 strh r3, [r0, #16] @ movhi 241 .loc 1 125 0 242 001c 4261 str r2, [r0, #20] 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 243 .loc 1 128 0 244 001e 30BC pop {r4, r5} 245 .LCFI5: 246 .cfi_restore 5 247 .cfi_restore 4 248 .cfi_def_cfa_offset 0 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 249 .loc 1 127 0 250 0020 0020 movs r0, #0 251 .LVL15: 252 .loc 1 128 0 253 0022 7047 bx lr 254 .LVL16: 255 .L22: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 14 256 .loc 1 116 0 257 0024 4FF0FF30 mov r0, #-1 258 .LVL17: 259 .loc 1 128 0 260 0028 7047 bx lr 261 .L28: 262 002a 00BF .align 2 263 .L27: 264 002c 00000000 .word arm_cfft_sR_f32_len64 265 0030 00000000 .word twiddleCoef_rfft_128 266 .cfi_endproc 267 .LFE212: 269 .section .text.arm_rfft_256_fast_init_f32,"ax",%progbits 270 .align 1 271 .p2align 2,,3 272 .syntax unified 273 .thumb 274 .thumb_func 275 .fpu fpv4-sp-d16 277 arm_rfft_256_fast_init_f32: 278 .LFB213: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 256pt floating-point real FFT. 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 279 .loc 1 142 0 280 .cfi_startproc 281 @ args = 0, pretend = 0, frame = 0 282 @ frame_needed = 0, uses_anonymous_args = 0 283 @ link register save eliminated. 284 .LVL18: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 285 .loc 1 146 0 286 0000 88B1 cbz r0, .L31 287 .LVL19: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 288 .loc 1 142 0 289 0002 30B4 push {r4, r5} 290 .LCFI6: 291 .cfi_def_cfa_offset 8 292 .cfi_offset 4, -8 293 .cfi_offset 5, -4 294 .LBB982: 295 .LBB983: ARM GAS /tmp/ccfbYRip.s page 15 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 296 .loc 2 317 0 297 0004 094B ldr r3, .L36 298 .LBE983: 299 .LBE982: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),128); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 256U; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_256; 300 .loc 1 155 0 301 0006 0A4A ldr r2, .L36+4 302 .LBB986: 303 .LBB984: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 304 .loc 2 317 0 305 0008 9989 ldrh r1, [r3, #12] 306 000a 8181 strh r1, [r0, #12] @ movhi 307 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 308 .loc 2 267 0 309 0010 8021 movs r1, #128 310 .LBE984: 311 .LBE986: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 312 .loc 1 153 0 313 0012 4FF48073 mov r3, #256 314 .LBB987: 315 .LBB985: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 316 .loc 2 317 0 317 0016 C0E90145 strd r4, r5, [r0, #4] 318 .LVL20: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 319 .loc 2 267 0 320 001a 0180 strh r1, [r0] @ movhi 321 .LBE985: 322 .LBE987: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 323 .loc 1 153 0 324 001c 0382 strh r3, [r0, #16] @ movhi 325 .loc 1 155 0 326 001e 4261 str r2, [r0, #20] 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 327 .loc 1 158 0 328 0020 30BC pop {r4, r5} 329 .LCFI7: 330 .cfi_restore 5 331 .cfi_restore 4 332 .cfi_def_cfa_offset 0 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } ARM GAS /tmp/ccfbYRip.s page 16 333 .loc 1 157 0 334 0022 0020 movs r0, #0 335 .LVL21: 336 .loc 1 158 0 337 0024 7047 bx lr 338 .LVL22: 339 .L31: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 340 .loc 1 146 0 341 0026 4FF0FF30 mov r0, #-1 342 .LVL23: 343 .loc 1 158 0 344 002a 7047 bx lr 345 .L37: 346 .align 2 347 .L36: 348 002c 00000000 .word arm_cfft_sR_f32_len128 349 0030 00000000 .word twiddleCoef_rfft_256 350 .cfi_endproc 351 .LFE213: 353 .section .text.arm_rfft_512_fast_init_f32,"ax",%progbits 354 .align 1 355 .p2align 2,,3 356 .syntax unified 357 .thumb 358 .thumb_func 359 .fpu fpv4-sp-d16 361 arm_rfft_512_fast_init_f32: 362 .LFB214: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 512pt floating-point real FFT. 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 363 .loc 1 172 0 364 .cfi_startproc 365 @ args = 0, pretend = 0, frame = 0 366 @ frame_needed = 0, uses_anonymous_args = 0 367 @ link register save eliminated. 368 .LVL24: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 369 .loc 1 176 0 370 0000 90B1 cbz r0, .L40 371 .LVL25: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 17 372 .loc 1 172 0 373 0002 30B4 push {r4, r5} 374 .LCFI8: 375 .cfi_def_cfa_offset 8 376 .cfi_offset 4, -8 377 .cfi_offset 5, -4 378 .LBB988: 379 .LBB989: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 380 .loc 2 311 0 381 0004 0A4B ldr r3, .L45 382 .LBE989: 383 .LBE988: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),256); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 512U; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_512; 384 .loc 1 185 0 385 0006 0B4A ldr r2, .L45+4 386 .LBB992: 387 .LBB990: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 388 .loc 2 311 0 389 0008 9989 ldrh r1, [r3, #12] 390 000a 8181 strh r1, [r0, #12] @ movhi 391 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 392 .loc 2 267 0 393 0010 4FF48071 mov r1, #256 394 .LBE990: 395 .LBE992: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 396 .loc 1 183 0 397 0014 4FF40073 mov r3, #512 398 .LBB993: 399 .LBB991: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 400 .loc 2 311 0 401 0018 C0E90145 strd r4, r5, [r0, #4] 402 .LVL26: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 403 .loc 2 267 0 404 001c 0180 strh r1, [r0] @ movhi 405 .LBE991: 406 .LBE993: 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 407 .loc 1 183 0 408 001e 0382 strh r3, [r0, #16] @ movhi 409 .loc 1 185 0 410 0020 4261 str r2, [r0, #20] 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; ARM GAS /tmp/ccfbYRip.s page 18 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 411 .loc 1 188 0 412 0022 30BC pop {r4, r5} 413 .LCFI9: 414 .cfi_restore 5 415 .cfi_restore 4 416 .cfi_def_cfa_offset 0 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 417 .loc 1 187 0 418 0024 0020 movs r0, #0 419 .LVL27: 420 .loc 1 188 0 421 0026 7047 bx lr 422 .LVL28: 423 .L40: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 424 .loc 1 176 0 425 0028 4FF0FF30 mov r0, #-1 426 .LVL29: 427 .loc 1 188 0 428 002c 7047 bx lr 429 .L46: 430 002e 00BF .align 2 431 .L45: 432 0030 00000000 .word arm_cfft_sR_f32_len256 433 0034 00000000 .word twiddleCoef_rfft_512 434 .cfi_endproc 435 .LFE214: 437 .section .text.arm_rfft_1024_fast_init_f32,"ax",%progbits 438 .align 1 439 .p2align 2,,3 440 .syntax unified 441 .thumb 442 .thumb_func 443 .fpu fpv4-sp-d16 445 arm_rfft_1024_fast_init_f32: 446 .LFB215: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 1024pt floating-point real FFT. 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 447 .loc 1 201 0 448 .cfi_startproc 449 @ args = 0, pretend = 0, frame = 0 450 @ frame_needed = 0, uses_anonymous_args = 0 451 @ link register save eliminated. 452 .LVL30: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 19 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 453 .loc 1 205 0 454 0000 90B1 cbz r0, .L49 455 .LVL31: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 456 .loc 1 201 0 457 0002 30B4 push {r4, r5} 458 .LCFI10: 459 .cfi_def_cfa_offset 8 460 .cfi_offset 4, -8 461 .cfi_offset 5, -4 462 .LBB994: 463 .LBB995: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 464 .loc 2 305 0 465 0004 0A4B ldr r3, .L54 466 .LBE995: 467 .LBE994: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),512); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 1024U; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_1024; 468 .loc 1 214 0 469 0006 0B4A ldr r2, .L54+4 470 .LBB998: 471 .LBB996: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 472 .loc 2 305 0 473 0008 9989 ldrh r1, [r3, #12] 474 000a 8181 strh r1, [r0, #12] @ movhi 475 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 476 .loc 2 267 0 477 0010 4FF40071 mov r1, #512 478 .LBE996: 479 .LBE998: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 480 .loc 1 212 0 481 0014 4FF48063 mov r3, #1024 482 .LBB999: 483 .LBB997: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 484 .loc 2 305 0 485 0018 C0E90145 strd r4, r5, [r0, #4] 486 .LVL32: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 487 .loc 2 267 0 488 001c 0180 strh r1, [r0] @ movhi 489 .LBE997: 490 .LBE999: ARM GAS /tmp/ccfbYRip.s page 20 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 491 .loc 1 212 0 492 001e 0382 strh r3, [r0, #16] @ movhi 493 .loc 1 214 0 494 0020 4261 str r2, [r0, #20] 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 495 .loc 1 217 0 496 0022 30BC pop {r4, r5} 497 .LCFI11: 498 .cfi_restore 5 499 .cfi_restore 4 500 .cfi_def_cfa_offset 0 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 501 .loc 1 216 0 502 0024 0020 movs r0, #0 503 .LVL33: 504 .loc 1 217 0 505 0026 7047 bx lr 506 .LVL34: 507 .L49: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 508 .loc 1 205 0 509 0028 4FF0FF30 mov r0, #-1 510 .LVL35: 511 .loc 1 217 0 512 002c 7047 bx lr 513 .L55: 514 002e 00BF .align 2 515 .L54: 516 0030 00000000 .word arm_cfft_sR_f32_len512 517 0034 00000000 .word twiddleCoef_rfft_1024 518 .cfi_endproc 519 .LFE215: 521 .section .text.arm_rfft_2048_fast_init_f32,"ax",%progbits 522 .align 1 523 .p2align 2,,3 524 .syntax unified 525 .thumb 526 .thumb_func 527 .fpu fpv4-sp-d16 529 arm_rfft_2048_fast_init_f32: 530 .LFB216: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the 2048pt floating-point real FFT. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 531 .loc 1 229 0 ARM GAS /tmp/ccfbYRip.s page 21 532 .cfi_startproc 533 @ args = 0, pretend = 0, frame = 0 534 @ frame_needed = 0, uses_anonymous_args = 0 535 @ link register save eliminated. 536 .LVL36: 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 537 .loc 1 233 0 538 0000 90B1 cbz r0, .L58 539 .LVL37: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 540 .loc 1 229 0 541 0002 30B4 push {r4, r5} 542 .LCFI12: 543 .cfi_def_cfa_offset 8 544 .cfi_offset 4, -8 545 .cfi_offset 5, -4 546 .LBB1000: 547 .LBB1001: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 548 .loc 2 296 0 549 0004 0A4B ldr r3, .L63 550 .LBE1001: 551 .LBE1000: 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),1024); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 2048U; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_2048; 552 .loc 1 242 0 553 0006 0B4A ldr r2, .L63+4 554 .LBB1004: 555 .LBB1002: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 556 .loc 2 296 0 557 0008 9989 ldrh r1, [r3, #12] 558 000a 8181 strh r1, [r0, #12] @ movhi 559 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 560 .loc 2 267 0 561 0010 4FF48061 mov r1, #1024 562 .LBE1002: 563 .LBE1004: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 564 .loc 1 240 0 565 0014 4FF40063 mov r3, #2048 566 .LBB1005: 567 .LBB1003: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 568 .loc 2 296 0 569 0018 C0E90145 strd r4, r5, [r0, #4] ARM GAS /tmp/ccfbYRip.s page 22 570 .LVL38: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 571 .loc 2 267 0 572 001c 0180 strh r1, [r0] @ movhi 573 .LBE1003: 574 .LBE1005: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 575 .loc 1 240 0 576 001e 0382 strh r3, [r0, #16] @ movhi 577 .loc 1 242 0 578 0020 4261 str r2, [r0, #20] 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 579 .loc 1 245 0 580 0022 30BC pop {r4, r5} 581 .LCFI13: 582 .cfi_restore 5 583 .cfi_restore 4 584 .cfi_def_cfa_offset 0 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 585 .loc 1 244 0 586 0024 0020 movs r0, #0 587 .LVL39: 588 .loc 1 245 0 589 0026 7047 bx lr 590 .LVL40: 591 .L58: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 592 .loc 1 233 0 593 0028 4FF0FF30 mov r0, #-1 594 .LVL41: 595 .loc 1 245 0 596 002c 7047 bx lr 597 .L64: 598 002e 00BF .align 2 599 .L63: 600 0030 00000000 .word arm_cfft_sR_f32_len1024 601 0034 00000000 .word twiddleCoef_rfft_2048 602 .cfi_endproc 603 .LFE216: 605 .section .text.arm_rfft_4096_fast_init_f32,"ax",%progbits 606 .align 1 607 .p2align 2,,3 608 .syntax unified 609 .thumb 610 .thumb_func 611 .fpu fpv4-sp-d16 613 arm_rfft_4096_fast_init_f32: 614 .LFB217: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @private 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * @brief Initialization function for the 4096pt floating-point real FFT. 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** * @param[in,out] S points to an arm_rfft_fast_instance_f32 structure ARM GAS /tmp/ccfbYRip.s page 23 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** static arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { 615 .loc 1 258 0 616 .cfi_startproc 617 @ args = 0, pretend = 0, frame = 0 618 @ frame_needed = 0, uses_anonymous_args = 0 619 @ link register save eliminated. 620 .LVL42: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status status; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 621 .loc 1 262 0 622 0000 90B1 cbz r0, .L67 623 .LVL43: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 624 .loc 1 258 0 625 0002 30B4 push {r4, r5} 626 .LCFI14: 627 .cfi_def_cfa_offset 8 628 .cfi_offset 4, -8 629 .cfi_offset 5, -4 630 .LBB1006: 631 .LBB1007: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 632 .loc 2 287 0 633 0004 0A4B ldr r3, .L72 634 .LBE1007: 635 .LBE1006: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** status=arm_cfft_init_f32(&(S->Sint),2048); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if (status != ARM_MATH_SUCCESS) 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return(status); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->fftLenRFFT = 4096U; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_4096; 636 .loc 1 271 0 637 0006 0B4A ldr r2, .L72+4 638 .LBB1010: 639 .LBB1008: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 640 .loc 2 287 0 641 0008 9989 ldrh r1, [r3, #12] 642 000a 8181 strh r1, [r0, #12] @ movhi 643 000c D3E90145 ldrd r4, r5, [r3, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 644 .loc 2 267 0 645 0010 4FF40061 mov r1, #2048 646 .LBE1008: 647 .LBE1010: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 24 648 .loc 1 269 0 649 0014 4FF48053 mov r3, #4096 650 .LBB1011: 651 .LBB1009: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 652 .loc 2 287 0 653 0018 C0E90145 strd r4, r5, [r0, #4] 654 .LVL44: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 655 .loc 2 267 0 656 001c 0180 strh r1, [r0] @ movhi 657 .LBE1009: 658 .LBE1011: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 659 .loc 1 269 0 660 001e 0382 strh r3, [r0, #16] @ movhi 661 .loc 1 271 0 662 0020 4261 str r2, [r0, #20] 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_SUCCESS; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 663 .loc 1 274 0 664 0022 30BC pop {r4, r5} 665 .LCFI15: 666 .cfi_restore 5 667 .cfi_restore 4 668 .cfi_def_cfa_offset 0 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 669 .loc 1 273 0 670 0024 0020 movs r0, #0 671 .LVL45: 672 .loc 1 274 0 673 0026 7047 bx lr 674 .LVL46: 675 .L67: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 676 .loc 1 262 0 677 0028 4FF0FF30 mov r0, #-1 678 .LVL47: 679 .loc 1 274 0 680 002c 7047 bx lr 681 .L73: 682 002e 00BF .align 2 683 .L72: 684 0030 00000000 .word arm_cfft_sR_f32_len2048 685 0034 00000000 .word twiddleCoef_rfft_4096 686 .cfi_endproc 687 .LFE217: 689 .section .text.arm_rfft_32_fast_init_f64,"ax",%progbits 690 .align 1 691 .p2align 2,,3 692 .syntax unified 693 .thumb 694 .thumb_func 695 .fpu fpv4-sp-d16 697 arm_rfft_32_fast_init_f64: 698 .LFB219: ARM GAS /tmp/ccfbYRip.s page 25 699 .file 3 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Title: arm_cfft_init_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Description: Split Radix Decimation in Frequency CFFT Double Precision Floating point processin 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * $Date: 29. November 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * $Revision: V1.0.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @addtogroup RealFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 32pt double precision floating-point real FFT. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_32_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 700 .loc 3 51 0 701 .cfi_startproc 702 @ args = 0, pretend = 0, frame = 0 703 @ frame_needed = 0, uses_anonymous_args = 0 704 @ link register save eliminated. ARM GAS /tmp/ccfbYRip.s page 26 705 .LVL48: 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 706 .loc 3 55 0 707 0000 78B1 cbz r0, .L76 708 .LVL49: 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 709 .loc 3 51 0 710 0002 30B4 push {r4, r5} 711 .LCFI16: 712 .cfi_def_cfa_offset 8 713 .cfi_offset 4, -8 714 .cfi_offset 5, -4 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 16U; 715 .loc 3 58 0 716 0004 1023 movs r3, #16 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 32U; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_16; 717 .loc 3 62 0 718 0006 0849 ldr r1, .L81 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_16; 719 .loc 3 63 0 720 0008 084A ldr r2, .L81+4 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 32U; 721 .loc 3 58 0 722 000a 0380 strh r3, [r0] @ movhi 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 32U; 723 .loc 3 59 0 724 000c 2025 movs r5, #32 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_16; 725 .loc 3 61 0 726 000e 0C24 movs r4, #12 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_32; 727 .loc 3 64 0 728 0010 074B ldr r3, .L81+8 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 729 .loc 3 59 0 730 0012 0582 strh r5, [r0, #16] @ movhi 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_16; 731 .loc 3 61 0 732 0014 8481 strh r4, [r0, #12] @ movhi 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_32; 733 .loc 3 63 0 734 0016 C0E90121 strd r2, r1, [r0, #4] 735 .loc 3 64 0 736 001a 4361 str r3, [r0, #20] 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 737 .loc 3 67 0 738 001c 30BC pop {r4, r5} ARM GAS /tmp/ccfbYRip.s page 27 739 .LCFI17: 740 .cfi_restore 5 741 .cfi_restore 4 742 .cfi_def_cfa_offset 0 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 743 .loc 3 66 0 744 001e 0020 movs r0, #0 745 .LVL50: 746 .loc 3 67 0 747 0020 7047 bx lr 748 .LVL51: 749 .L76: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 750 .loc 3 55 0 751 0022 4FF0FF30 mov r0, #-1 752 .LVL52: 753 .loc 3 67 0 754 0026 7047 bx lr 755 .L82: 756 .align 2 757 .L81: 758 0028 00000000 .word armBitRevIndexTableF64_16 759 002c 00000000 .word twiddleCoefF64_16 760 0030 00000000 .word twiddleCoefF64_rfft_32 761 .cfi_endproc 762 .LFE219: 764 .section .text.arm_rfft_64_fast_init_f64,"ax",%progbits 765 .align 1 766 .p2align 2,,3 767 .syntax unified 768 .thumb 769 .thumb_func 770 .fpu fpv4-sp-d16 772 arm_rfft_64_fast_init_f64: 773 .LFB220: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 64pt Double Precision floating-point real FFT. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_64_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 774 .loc 3 80 0 775 .cfi_startproc 776 @ args = 0, pretend = 0, frame = 0 777 @ frame_needed = 0, uses_anonymous_args = 0 778 @ link register save eliminated. 779 .LVL53: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** ARM GAS /tmp/ccfbYRip.s page 28 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 780 .loc 3 84 0 781 0000 78B1 cbz r0, .L85 782 .LVL54: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 783 .loc 3 80 0 784 0002 30B4 push {r4, r5} 785 .LCFI18: 786 .cfi_def_cfa_offset 8 787 .cfi_offset 4, -8 788 .cfi_offset 5, -4 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 32U; 789 .loc 3 87 0 790 0004 2023 movs r3, #32 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 64U; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_32; 791 .loc 3 91 0 792 0006 0849 ldr r1, .L90 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_32; 793 .loc 3 92 0 794 0008 084A ldr r2, .L90+4 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 64U; 795 .loc 3 87 0 796 000a 0380 strh r3, [r0] @ movhi 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 64U; 797 .loc 3 88 0 798 000c 4025 movs r5, #64 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_32; 799 .loc 3 90 0 800 000e 1824 movs r4, #24 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_64; 801 .loc 3 93 0 802 0010 074B ldr r3, .L90+8 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 803 .loc 3 88 0 804 0012 0582 strh r5, [r0, #16] @ movhi 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_32; 805 .loc 3 90 0 806 0014 8481 strh r4, [r0, #12] @ movhi 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_64; 807 .loc 3 92 0 808 0016 C0E90121 strd r2, r1, [r0, #4] 809 .loc 3 93 0 810 001a 4361 str r3, [r0, #20] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 811 .loc 3 96 0 812 001c 30BC pop {r4, r5} 813 .LCFI19: 814 .cfi_restore 5 815 .cfi_restore 4 816 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccfbYRip.s page 29 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 817 .loc 3 95 0 818 001e 0020 movs r0, #0 819 .LVL55: 820 .loc 3 96 0 821 0020 7047 bx lr 822 .LVL56: 823 .L85: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 824 .loc 3 84 0 825 0022 4FF0FF30 mov r0, #-1 826 .LVL57: 827 .loc 3 96 0 828 0026 7047 bx lr 829 .L91: 830 .align 2 831 .L90: 832 0028 00000000 .word armBitRevIndexTableF64_32 833 002c 00000000 .word twiddleCoefF64_32 834 0030 00000000 .word twiddleCoefF64_rfft_64 835 .cfi_endproc 836 .LFE220: 838 .section .text.arm_rfft_128_fast_init_f64,"ax",%progbits 839 .align 1 840 .p2align 2,,3 841 .syntax unified 842 .thumb 843 .thumb_func 844 .fpu fpv4-sp-d16 846 arm_rfft_128_fast_init_f64: 847 .LFB221: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 128pt Double Precision floating-point real FFT. 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_128_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 848 .loc 3 109 0 849 .cfi_startproc 850 @ args = 0, pretend = 0, frame = 0 851 @ frame_needed = 0, uses_anonymous_args = 0 852 @ link register save eliminated. 853 .LVL58: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 854 .loc 3 113 0 855 0000 78B1 cbz r0, .L94 856 .LVL59: ARM GAS /tmp/ccfbYRip.s page 30 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 857 .loc 3 109 0 858 0002 30B4 push {r4, r5} 859 .LCFI20: 860 .cfi_def_cfa_offset 8 861 .cfi_offset 4, -8 862 .cfi_offset 5, -4 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 64U; 863 .loc 3 116 0 864 0004 4023 movs r3, #64 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 128U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_64; 865 .loc 3 120 0 866 0006 0849 ldr r1, .L99 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_64; 867 .loc 3 121 0 868 0008 084A ldr r2, .L99+4 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 128U; 869 .loc 3 116 0 870 000a 0380 strh r3, [r0] @ movhi 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 128U; 871 .loc 3 117 0 872 000c 8025 movs r5, #128 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_64; 873 .loc 3 119 0 874 000e 3824 movs r4, #56 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_128; 875 .loc 3 122 0 876 0010 074B ldr r3, .L99+8 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 877 .loc 3 117 0 878 0012 0582 strh r5, [r0, #16] @ movhi 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_64; 879 .loc 3 119 0 880 0014 8481 strh r4, [r0, #12] @ movhi 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_128; 881 .loc 3 121 0 882 0016 C0E90121 strd r2, r1, [r0, #4] 883 .loc 3 122 0 884 001a 4361 str r3, [r0, #20] 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 885 .loc 3 125 0 886 001c 30BC pop {r4, r5} 887 .LCFI21: 888 .cfi_restore 5 889 .cfi_restore 4 890 .cfi_def_cfa_offset 0 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 891 .loc 3 124 0 892 001e 0020 movs r0, #0 893 .LVL60: ARM GAS /tmp/ccfbYRip.s page 31 894 .loc 3 125 0 895 0020 7047 bx lr 896 .LVL61: 897 .L94: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 898 .loc 3 113 0 899 0022 4FF0FF30 mov r0, #-1 900 .LVL62: 901 .loc 3 125 0 902 0026 7047 bx lr 903 .L100: 904 .align 2 905 .L99: 906 0028 00000000 .word armBitRevIndexTableF64_64 907 002c 00000000 .word twiddleCoefF64_64 908 0030 00000000 .word twiddleCoefF64_rfft_128 909 .cfi_endproc 910 .LFE221: 912 .section .text.arm_rfft_256_fast_init_f64,"ax",%progbits 913 .align 1 914 .p2align 2,,3 915 .syntax unified 916 .thumb 917 .thumb_func 918 .fpu fpv4-sp-d16 920 arm_rfft_256_fast_init_f64: 921 .LFB222: 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 256pt Double Precision floating-point real FFT. 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_256_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 922 .loc 3 138 0 923 .cfi_startproc 924 @ args = 0, pretend = 0, frame = 0 925 @ frame_needed = 0, uses_anonymous_args = 0 926 @ link register save eliminated. 927 .LVL63: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 928 .loc 3 142 0 929 0000 80B1 cbz r0, .L103 930 .LVL64: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 931 .loc 3 138 0 932 0002 30B4 push {r4, r5} 933 .LCFI22: ARM GAS /tmp/ccfbYRip.s page 32 934 .cfi_def_cfa_offset 8 935 .cfi_offset 4, -8 936 .cfi_offset 5, -4 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 128U; 937 .loc 3 145 0 938 0004 8023 movs r3, #128 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 256U; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_128; 939 .loc 3 149 0 940 0006 0949 ldr r1, .L108 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_128; 941 .loc 3 150 0 942 0008 094A ldr r2, .L108+4 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 256U; 943 .loc 3 145 0 944 000a 0380 strh r3, [r0] @ movhi 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 256U; 945 .loc 3 146 0 946 000c 4FF48075 mov r5, #256 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_128; 947 .loc 3 148 0 948 0010 7024 movs r4, #112 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_256; 949 .loc 3 151 0 950 0012 084B ldr r3, .L108+8 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 951 .loc 3 146 0 952 0014 0582 strh r5, [r0, #16] @ movhi 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_128; 953 .loc 3 148 0 954 0016 8481 strh r4, [r0, #12] @ movhi 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_256; 955 .loc 3 150 0 956 0018 C0E90121 strd r2, r1, [r0, #4] 957 .loc 3 151 0 958 001c 4361 str r3, [r0, #20] 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 959 .loc 3 154 0 960 001e 30BC pop {r4, r5} 961 .LCFI23: 962 .cfi_restore 5 963 .cfi_restore 4 964 .cfi_def_cfa_offset 0 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 965 .loc 3 153 0 966 0020 0020 movs r0, #0 967 .LVL65: 968 .loc 3 154 0 969 0022 7047 bx lr 970 .LVL66: 971 .L103: ARM GAS /tmp/ccfbYRip.s page 33 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 972 .loc 3 142 0 973 0024 4FF0FF30 mov r0, #-1 974 .LVL67: 975 .loc 3 154 0 976 0028 7047 bx lr 977 .L109: 978 002a 00BF .align 2 979 .L108: 980 002c 00000000 .word armBitRevIndexTableF64_128 981 0030 00000000 .word twiddleCoefF64_128 982 0034 00000000 .word twiddleCoefF64_rfft_256 983 .cfi_endproc 984 .LFE222: 986 .section .text.arm_rfft_512_fast_init_f64,"ax",%progbits 987 .align 1 988 .p2align 2,,3 989 .syntax unified 990 .thumb 991 .thumb_func 992 .fpu fpv4-sp-d16 994 arm_rfft_512_fast_init_f64: 995 .LFB223: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 512pt Double Precision floating-point real FFT. 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_512_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 996 .loc 3 167 0 997 .cfi_startproc 998 @ args = 0, pretend = 0, frame = 0 999 @ frame_needed = 0, uses_anonymous_args = 0 1000 @ link register save eliminated. 1001 .LVL68: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 1002 .loc 3 171 0 1003 0000 88B1 cbz r0, .L112 1004 .LVL69: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1005 .loc 3 167 0 1006 0002 30B4 push {r4, r5} 1007 .LCFI24: 1008 .cfi_def_cfa_offset 8 1009 .cfi_offset 4, -8 1010 .cfi_offset 5, -4 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** ARM GAS /tmp/ccfbYRip.s page 34 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 256U; 1011 .loc 3 174 0 1012 0004 4FF48073 mov r3, #256 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 512U; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_256; 1013 .loc 3 178 0 1014 0008 0849 ldr r1, .L117 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_256; 1015 .loc 3 179 0 1016 000a 094A ldr r2, .L117+4 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 512U; 1017 .loc 3 174 0 1018 000c 0380 strh r3, [r0] @ movhi 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 512U; 1019 .loc 3 175 0 1020 000e 4FF40075 mov r5, #512 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_256; 1021 .loc 3 177 0 1022 0012 F024 movs r4, #240 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_512; 1023 .loc 3 180 0 1024 0014 074B ldr r3, .L117+8 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1025 .loc 3 175 0 1026 0016 0582 strh r5, [r0, #16] @ movhi 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_256; 1027 .loc 3 177 0 1028 0018 8481 strh r4, [r0, #12] @ movhi 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_512; 1029 .loc 3 179 0 1030 001a C0E90121 strd r2, r1, [r0, #4] 1031 .loc 3 180 0 1032 001e 4361 str r3, [r0, #20] 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1033 .loc 3 183 0 1034 0020 30BC pop {r4, r5} 1035 .LCFI25: 1036 .cfi_restore 5 1037 .cfi_restore 4 1038 .cfi_def_cfa_offset 0 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1039 .loc 3 182 0 1040 0022 0020 movs r0, #0 1041 .LVL70: 1042 .loc 3 183 0 1043 0024 7047 bx lr 1044 .LVL71: 1045 .L112: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1046 .loc 3 171 0 1047 0026 4FF0FF30 mov r0, #-1 1048 .LVL72: ARM GAS /tmp/ccfbYRip.s page 35 1049 .loc 3 183 0 1050 002a 7047 bx lr 1051 .L118: 1052 .align 2 1053 .L117: 1054 002c 00000000 .word armBitRevIndexTableF64_256 1055 0030 00000000 .word twiddleCoefF64_256 1056 0034 00000000 .word twiddleCoefF64_rfft_512 1057 .cfi_endproc 1058 .LFE223: 1060 .section .text.arm_rfft_1024_fast_init_f64,"ax",%progbits 1061 .align 1 1062 .p2align 2,,3 1063 .syntax unified 1064 .thumb 1065 .thumb_func 1066 .fpu fpv4-sp-d16 1068 arm_rfft_1024_fast_init_f64: 1069 .LFB224: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 1024pt Double Precision floating-point real FFT. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_1024_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 1070 .loc 3 195 0 1071 .cfi_startproc 1072 @ args = 0, pretend = 0, frame = 0 1073 @ frame_needed = 0, uses_anonymous_args = 0 1074 @ link register save eliminated. 1075 .LVL73: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 1076 .loc 3 199 0 1077 0000 90B1 cbz r0, .L121 1078 .LVL74: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1079 .loc 3 195 0 1080 0002 30B4 push {r4, r5} 1081 .LCFI26: 1082 .cfi_def_cfa_offset 8 1083 .cfi_offset 4, -8 1084 .cfi_offset 5, -4 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 512U; 1085 .loc 3 202 0 1086 0004 4FF40073 mov r3, #512 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 1024U; ARM GAS /tmp/ccfbYRip.s page 36 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_512; 1087 .loc 3 206 0 1088 0008 0949 ldr r1, .L126 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_512; 1089 .loc 3 207 0 1090 000a 0A4A ldr r2, .L126+4 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 1024U; 1091 .loc 3 202 0 1092 000c 0380 strh r3, [r0] @ movhi 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 1024U; 1093 .loc 3 203 0 1094 000e 4FF48065 mov r5, #1024 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_512; 1095 .loc 3 205 0 1096 0012 4FF4F074 mov r4, #480 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_1024; 1097 .loc 3 208 0 1098 0016 084B ldr r3, .L126+8 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1099 .loc 3 203 0 1100 0018 0582 strh r5, [r0, #16] @ movhi 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_512; 1101 .loc 3 205 0 1102 001a 8481 strh r4, [r0, #12] @ movhi 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_1024; 1103 .loc 3 207 0 1104 001c C0E90121 strd r2, r1, [r0, #4] 1105 .loc 3 208 0 1106 0020 4361 str r3, [r0, #20] 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1107 .loc 3 211 0 1108 0022 30BC pop {r4, r5} 1109 .LCFI27: 1110 .cfi_restore 5 1111 .cfi_restore 4 1112 .cfi_def_cfa_offset 0 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1113 .loc 3 210 0 1114 0024 0020 movs r0, #0 1115 .LVL75: 1116 .loc 3 211 0 1117 0026 7047 bx lr 1118 .LVL76: 1119 .L121: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1120 .loc 3 199 0 1121 0028 4FF0FF30 mov r0, #-1 1122 .LVL77: 1123 .loc 3 211 0 1124 002c 7047 bx lr 1125 .L127: 1126 002e 00BF .align 2 1127 .L126: ARM GAS /tmp/ccfbYRip.s page 37 1128 0030 00000000 .word armBitRevIndexTableF64_512 1129 0034 00000000 .word twiddleCoefF64_512 1130 0038 00000000 .word twiddleCoefF64_rfft_1024 1131 .cfi_endproc 1132 .LFE224: 1134 .section .text.arm_rfft_2048_fast_init_f64,"ax",%progbits 1135 .align 1 1136 .p2align 2,,3 1137 .syntax unified 1138 .thumb 1139 .thumb_func 1140 .fpu fpv4-sp-d16 1142 arm_rfft_2048_fast_init_f64: 1143 .LFB225: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the 2048pt Double Precision floating-point real FFT. 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_2048_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 1144 .loc 3 222 0 1145 .cfi_startproc 1146 @ args = 0, pretend = 0, frame = 0 1147 @ frame_needed = 0, uses_anonymous_args = 0 1148 @ link register save eliminated. 1149 .LVL78: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 1150 .loc 3 226 0 1151 0000 90B1 cbz r0, .L130 1152 .LVL79: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1153 .loc 3 222 0 1154 0002 30B4 push {r4, r5} 1155 .LCFI28: 1156 .cfi_def_cfa_offset 8 1157 .cfi_offset 4, -8 1158 .cfi_offset 5, -4 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 1024U; 1159 .loc 3 229 0 1160 0004 4FF48063 mov r3, #1024 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 2048U; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_1024; 1161 .loc 3 233 0 1162 0008 0949 ldr r1, .L135 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_1024; ARM GAS /tmp/ccfbYRip.s page 38 1163 .loc 3 234 0 1164 000a 0A4A ldr r2, .L135+4 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 2048U; 1165 .loc 3 229 0 1166 000c 0380 strh r3, [r0] @ movhi 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 2048U; 1167 .loc 3 230 0 1168 000e 4FF40065 mov r5, #2048 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_1024; 1169 .loc 3 232 0 1170 0012 4FF47874 mov r4, #992 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_2048; 1171 .loc 3 235 0 1172 0016 084B ldr r3, .L135+8 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1173 .loc 3 230 0 1174 0018 0582 strh r5, [r0, #16] @ movhi 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_1024; 1175 .loc 3 232 0 1176 001a 8481 strh r4, [r0, #12] @ movhi 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_2048; 1177 .loc 3 234 0 1178 001c C0E90121 strd r2, r1, [r0, #4] 1179 .loc 3 235 0 1180 0020 4361 str r3, [r0, #20] 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1181 .loc 3 238 0 1182 0022 30BC pop {r4, r5} 1183 .LCFI29: 1184 .cfi_restore 5 1185 .cfi_restore 4 1186 .cfi_def_cfa_offset 0 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1187 .loc 3 237 0 1188 0024 0020 movs r0, #0 1189 .LVL80: 1190 .loc 3 238 0 1191 0026 7047 bx lr 1192 .LVL81: 1193 .L130: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1194 .loc 3 226 0 1195 0028 4FF0FF30 mov r0, #-1 1196 .LVL82: 1197 .loc 3 238 0 1198 002c 7047 bx lr 1199 .L136: 1200 002e 00BF .align 2 1201 .L135: 1202 0030 00000000 .word armBitRevIndexTableF64_1024 1203 0034 00000000 .word twiddleCoefF64_1024 1204 0038 00000000 .word twiddleCoefF64_rfft_2048 1205 .cfi_endproc 1206 .LFE225: 1208 .section .text.arm_rfft_4096_fast_init_f64,"ax",%progbits ARM GAS /tmp/ccfbYRip.s page 39 1209 .align 1 1210 .p2align 2,,3 1211 .syntax unified 1212 .thumb 1213 .thumb_func 1214 .fpu fpv4-sp-d16 1216 arm_rfft_4096_fast_init_f64: 1217 .LFB226: 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * @brief Initialization function for the 4096pt Double Precision floating-point real FFT. 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** * @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** static arm_status arm_rfft_4096_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { 1218 .loc 3 250 0 1219 .cfi_startproc 1220 @ args = 0, pretend = 0, frame = 0 1221 @ frame_needed = 0, uses_anonymous_args = 0 1222 @ link register save eliminated. 1223 .LVL83: 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_cfft_instance_f64 * Sint; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( !S ) return ARM_MATH_ARGUMENT_ERROR; 1224 .loc 3 254 0 1225 0000 90B1 cbz r0, .L139 1226 .LVL84: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1227 .loc 3 250 0 1228 0002 30B4 push {r4, r5} 1229 .LCFI30: 1230 .cfi_def_cfa_offset 8 1231 .cfi_offset 4, -8 1232 .cfi_offset 5, -4 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint = &(S->Sint); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->fftLen = 2048U; 1233 .loc 3 257 0 1234 0004 4FF40063 mov r3, #2048 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 4096U; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->bitRevLength = ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_2048; 1235 .loc 3 261 0 1236 0008 0949 ldr r1, .L144 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pTwiddle = (float64_t *) twiddleCoefF64_2048; 1237 .loc 3 262 0 1238 000a 0A4A ldr r2, .L144+4 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 4096U; 1239 .loc 3 257 0 1240 000c 0380 strh r3, [r0] @ movhi ARM GAS /tmp/ccfbYRip.s page 40 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->fftLenRFFT = 4096U; 1241 .loc 3 258 0 1242 000e 4FF48055 mov r5, #4096 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_2048; 1243 .loc 3 260 0 1244 0012 4FF4F864 mov r4, #1984 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_4096; 1245 .loc 3 263 0 1246 0016 084B ldr r3, .L144+8 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1247 .loc 3 258 0 1248 0018 0582 strh r5, [r0, #16] @ movhi 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_2048; 1249 .loc 3 260 0 1250 001a 8481 strh r4, [r0, #12] @ movhi 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_4096; 1251 .loc 3 262 0 1252 001c C0E90121 strd r2, r1, [r0, #4] 1253 .loc 3 263 0 1254 0020 4361 str r3, [r0, #20] 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_SUCCESS; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1255 .loc 3 266 0 1256 0022 30BC pop {r4, r5} 1257 .LCFI31: 1258 .cfi_restore 5 1259 .cfi_restore 4 1260 .cfi_def_cfa_offset 0 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 1261 .loc 3 265 0 1262 0024 0020 movs r0, #0 1263 .LVL85: 1264 .loc 3 266 0 1265 0026 7047 bx lr 1266 .LVL86: 1267 .L139: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 1268 .loc 3 254 0 1269 0028 4FF0FF30 mov r0, #-1 1270 .LVL87: 1271 .loc 3 266 0 1272 002c 7047 bx lr 1273 .L145: 1274 002e 00BF .align 2 1275 .L144: 1276 0030 00000000 .word armBitRevIndexTableF64_2048 1277 0034 00000000 .word twiddleCoefF64_2048 1278 0038 00000000 .word twiddleCoefF64_rfft_4096 1279 .cfi_endproc 1280 .LFE226: 1282 .section .text.arm_radix4_butterfly_inverse_q15.constprop.1,"ax",%progbits 1283 .align 1 1284 .p2align 2,,3 1285 .syntax unified 1286 .thumb 1287 .thumb_func ARM GAS /tmp/ccfbYRip.s page 41 1288 .fpu fpv4-sp-d16 1290 arm_radix4_butterfly_inverse_q15.constprop.1: 1291 .LFB241: 1292 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Title: arm_cfft_radix4_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Description: This file has function definition of Radix-4 FFT & IFFT function and 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * In-place bit reversal using bit reversal table 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * $Date: 18. March 2019 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * $Revision: V1.6.0 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Target Processor: Cortex-M cores 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * -------------------------------------------------------------------- */ 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * SPDX-License-Identifier: Apache-2.0 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * not use this file except in compliance with the License. 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * You may obtain a copy of the License at 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * www.apache.org/licenses/LICENSE-2.0 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Unless required by applicable law or agreed to in writing, software 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * See the License for the specific language governing permissions and 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * limitations under the License. 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #include "arm_math.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_radix4_butterfly_q15( 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t fftLen, 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const q15_t * pCoef16, 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t twidCoefModifier); 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_radix4_butterfly_inverse_q15( 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t fftLen, 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const q15_t * pCoef16, 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t twidCoefModifier); 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_bitreversal_q15( 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t fftLen, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint16_t bitRevFactor, 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const uint16_t * pBitRevTab); 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @ingroup groupTransforms 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ ARM GAS /tmp/ccfbYRip.s page 42 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @addtogroup ComplexFFT 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @{ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @brief Processing function for the Q15 CFFT/CIFFT. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and w 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] S points to an instance of the Q15 CFFT/CIFFT structure. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in,out] pSrc points to the complex data buffer. Processing occurs in-place. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @return none 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @par Input and output formats: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Internally input is downscaled by 2 for every stage to avoid saturations inside CF 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Hence the output format is different for different FFT sizes. 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** The input and output formats for different FFT sizes and number of bits to upscale 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @par 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT" 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT" 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_cfft_radix4_q15( 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const arm_cfft_radix4_instance_q15 * S, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** if (S->ifftFlag == 1U) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Complex IFFT radix-4 */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** else 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Complex FFT radix-4 */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** if (S->bitReverseFlag == 1U) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Bit Reversal */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @} end of ComplexFFT group 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Radix-4 FFT algorithm used is : 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Input real and imaginary data: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n) = xa + j * ya 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+N/4 ) = xb + j * yb 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+N/2 ) = xc + j * yc ARM GAS /tmp/ccfbYRip.s page 43 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+3N 4) = xd + j * yd 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Output real and imaginary data: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r) = xa'+ j * ya' 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+1) = xb'+ j * yb' 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+2) = xc'+ j * yc' 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+3) = xd'+ j * yd' 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Twiddle factors for radix-4 FFT: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Wn = co1 + j * (- si1) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * W2n = co2 + j * (- si2) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * W3n = co3 + j * (- si3) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * The real and imaginary output values for the radix-4 butterfly are 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xa' = xa + xb + xc + xd 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * ya' = ya + yb + yc + yd 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @brief Core function for the Q15 CFFT butterfly process. 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in,out] pSrc16 points to the in-place buffer of Q15 data type 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] fftLen length of the FFT 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] pCoef16 points to twiddle coefficient buffer 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wi 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @return none 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_radix4_butterfly_q15( 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t fftLen, 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const q15_t * pCoef16, 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t twidCoefModifier) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #if defined (ARM_MATH_DSP) 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t R, S, T, U; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t C1, C2, C3, out1, out2; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t n1, n2, ic, i0, j, k; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *ptr1; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi0; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi1; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi2; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi3; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t xaya, xbyb, xcyc, xdyd; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 44 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Total process is divided into three stages */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* process first stage, middle stages, & last stage */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the first stage */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 = fftLen; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* n2 = fftLen/4 */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for twiddle coefficient */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for input read and output write */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = n2; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 = pSrc16; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Input is in 1.15(q15) format */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of first stage process */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi0); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycl 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** in = ((int16_t) (T & 0xFFFF)) >> 2; // alternative code that takes 3 cycles 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = read_q15x2 (pSi2); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHADD16(S, 0); 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHADD16(S, 0); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc), (xa + xc) ) */ 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(T, S); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc) ) */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(T, S); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ ARM GAS /tmp/ccfbYRip.s page 45 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd) ) */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(T, U); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi0, __SHADD16(R, T)); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QSUB16(R, T); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co2 & si2 are read from SIMD Coefficient pointer */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C2, R) >> 16U; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C2, R); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(R, C2) >> 16U; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C2, R); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb, xb) */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xc', yc') in little endian format */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* U = packed(yd, xd) */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb-yd, xb-xd) */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QSUB16(T, U); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QASX(S, T); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSAX(S, T); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QSAX(S, T); ARM GAS /tmp/ccfbYRip.s page 46 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QASX(S, T); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co1 & si1 are read from SIMD Coefficient pointer */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C1, S) >> 16U; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C1, S); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(S, C1) >> 16U; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C1, S); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xb', yb') in little endian format */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF)); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co3 & si3 are read from SIMD Coefficient pointer */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C3, R) >> 16U; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C3, R); 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(R, C3) >> 16U; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C3, R); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xd', yd') in little endian format */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of first stage process */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of middle stage process */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Calculation of Middle stage */ ARM GAS /tmp/ccfbYRip.s page 47 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the middle stage */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (j = 0U; j <= (n2 - 1U); j++) 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the coefficients */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 = pSrc16 + 2 * j; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = j; i0 < fftLen; i0 += n1) 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi0); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = read_q15x2 (pSi2); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed( (ya + yc), (xa + xc)) */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(T, S); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc)) */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(T, S); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed( (yb + yd), (xb + xd)) */ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(T, U); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SHADD16(R, T); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SHADD16(out1, 0); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi0, out1); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 += 2 * n1; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 48 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHSUB16(R, T); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C2, R) >> 16U; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C2, R); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(R, C2) >> 16U; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C2, R); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+3fftLen/4 */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb-yd, xb-xd) */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QSUB16(T, U); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHASX(S, T); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHSAX(S, T); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C1, S) >> 16U; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C1, S); 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHSAX(S, T); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHASX(S, T); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(S, C1) >> 16U; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C1, S); ARM GAS /tmp/ccfbYRip.s page 49 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUAD(C3, R) >> 16U; 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSDX(C3, R); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSDX(R, C3) >> 16U; 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUAD(C3, R); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of middle stage process */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 10.6(q6) format for the 1024 point */ 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 8.8(q8) format for the 256 point */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 6.10(q10) format for the 64 point */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.12(q12) format for the 16 point */ 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the last stage */ 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = fftLen >> 2; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ptr1 = &pSrc16[0]; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of last stage process */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xa (real), ya(imag) input */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xaya = read_q15x2_ia ((q15_t **) &ptr1); 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xb (real), yb(imag) input */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xbyb = read_q15x2_ia ((q15_t **) &ptr1); 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xc (real), yc(imag) input */ 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xcyc = read_q15x2_ia ((q15_t **) &ptr1); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xd (real), yd(imag) input */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xdyd = read_q15x2_ia ((q15_t **) &ptr1); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc), (xa + xc)) */ ARM GAS /tmp/ccfbYRip.s page 50 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(xaya, xcyc); 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd)) */ 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(xbyb, xdyd); 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pointer updation for writing */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ptr1 = ptr1 - 8U; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHADD16(R, T)); 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd)) */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(xbyb, xdyd); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd) */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd) */ 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSUB16(R, T)); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc)) */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(xaya, xcyc); 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed( (yb - yd), (xb - xd)) */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __QSUB16(xbyb, xdyd); 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd) */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd) */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSAX(S, U)); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd) */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd) */ 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHASX(S, U)); 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd) */ 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd) */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHASX(S, U)); 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd) */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd) */ 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSAX(S, U)); 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of last stage process */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 11.5(q5) format for the 1024 point */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 9.7(q7) format for the 256 point */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 7.9(q9) format for the 64 point */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 5.11(q11) format for the 16 point */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 51 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t R0, R1, S0, S1, T0, T1, U0, U1; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Total process is divided into three stages */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* process first stage, middle stages, & last stage */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the first stage */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 = fftLen; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* n2 = fftLen/4 */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for twiddle coefficient */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for input read and output write */ 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i0 = 0U; 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = n2; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Input is in 1.15(q15) format */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of first stage process */ 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U] >> 2U; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U] >> 2U; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U] >> 2U; 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U] >> 2U; 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16U); 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R1 = (xa + xc) */ 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16U); 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc) */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16); 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S1 = (xa - xc) */ 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16); 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 52 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U] >> 2U; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U] >> 2U; 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1] >> 2U; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd) */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16U); 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T1 = (xb + xd) */ 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16U); 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd) */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R1 = (xa + xc) - (xb + xd) */ 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(R0 - T0, 16U); 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(R1 - T1, 16U); 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co2 & si2 are read from Coefficient pointer */ 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co2 = pCoef16[2U * ic * 2U]; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si2 = pCoef16[(2U * ic * 2U) + 1]; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U); 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 */ 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb, T1 = xb */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U] >> 2; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1] >> 2; 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xc', yc') in little endian format */ 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = out1; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1] = out2; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* U0 = yd, U1 = xd */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U] >> 2; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1] >> 2; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb-yd */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16); 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T1 = xb-xd */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16); 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 53 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R1 = (ya-yc) + (xb- xd), R0 = (xa-xc) - (yb-yd)) */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16); 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16); 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16U); 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16U); 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co1 & si1 are read from Coefficient pointer */ 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co1 = pCoef16[ic * 2U]; 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si1 = pCoef16[(ic * 2U) + 1]; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16); 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xb', yb') in little endian format */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = out1; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1] = out2; 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Co3 & si3 are read from Coefficient pointer */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co3 = pCoef16[3U * (ic * 2U)]; 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si3 = pCoef16[(3U * (ic * 2U)) + 1]; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U); 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U); 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xd', yd') in little endian format */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = out1; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1] = out2; 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Updating input index */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i0 = i0 + 1U; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of first stage process */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of middle stage process */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Calculation of Middle stage */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the middle stage */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; ARM GAS /tmp/ccfbYRip.s page 54 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (j = 0U; j <= (n2 - 1U); j++) 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the coefficients */ 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co1 = pCoef16[ic * 2U]; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si1 = pCoef16[(ic * 2U) + 1U]; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co2 = pCoef16[2U * (ic * 2U)]; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si2 = pCoef16[(2U * (ic * 2U)) + 1U]; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co3 = pCoef16[3U * (ic * 2U)]; 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si3 = pCoef16[(3U * (ic * 2U)) + 1U]; 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = j; i0 < fftLen; i0 += n1) 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U]; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U]; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U]; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U]; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc), R1 = (xa + xc) */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16); 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16); 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc), S1 =(xa - xc) */ 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16); 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16); 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd), T1 = (xb + xd) */ 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16); 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16); 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ ARM GAS /tmp/ccfbYRip.s page 55 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U; 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = out1; 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(2U * i0) + 1U] = out2; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (R0 >> 1U) - (T0 >> 1U); 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (R1 >> 1U) - (T1 >> 1U); 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U); 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U); 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+3fftLen/4 */ 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = out1; 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1U] = out2; 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb-yd, T1 = xb-xd */ 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16); 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16); 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */ 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (S0 >> 1U) - (T1 >> 1U); 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (S1 >> 1U) + (T0 >> 1U); 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */ 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = (S0 >> 1U) + (T1 >> 1U); 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = (S1 >> 1U) - (T0 >> 1U); 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16U); 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16U); 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = out1; 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1U] = out2; 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ ARM GAS /tmp/ccfbYRip.s page 56 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U); 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U); 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = out1; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1U] = out2; 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of middle stage process */ 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 10.6(q6) format for the 1024 point */ 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 8.8(q8) format for the 256 point */ 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 6.10(q10) format for the 64 point */ 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.12(q12) format for the 16 point */ 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the last stage */ 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of last stage process */ 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U]; 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U]; 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U]; 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U]; 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc), R1 = (xa + xc) */ 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16U); 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16U); 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc), S1 = (xa - xc) */ 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16U); 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16U); 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ ARM GAS /tmp/ccfbYRip.s page 57 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd), T1 = (xb + xd)) */ 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16U); 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16U); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (R0 >> 1U) - (T0 >> 1U); 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (R1 >> 1U) - (T1 >> 1U); 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd) */ 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd) */ 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = R0; 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1U] = R1; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb - yd), T1 = (xb - xd) */ 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16U); 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16U); 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/2 sample */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd) */ 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd) */ 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U); 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U); 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + 3fftLen/4 sample */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd) */ 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd) */ 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U); 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U); 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of last stage process */ 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 11.5(q5) format for the 1024 point */ 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 9.7(q7) format for the 256 point */ 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 7.9(q9) format for the 64 point */ 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 5.11(q11) format for the 16 point */ 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } ARM GAS /tmp/ccfbYRip.s page 58 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /** 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @brief Core function for the Q15 CIFFT butterfly process. 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in,out] pSrc16 points to the in-place buffer of Q15 data type 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] fftLen length of the FFT 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] pCoef16 points to twiddle coefficient buffer 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wi 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** @return none 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Radix-4 IFFT algorithm used is : 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * CIFFT uses same twiddle coefficients as CFFT function 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * IFFT is implemented with following changes in equations from FFT 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Input real and imaginary data: 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n) = xa + j * ya 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+N/4 ) = xb + j * yb 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+N/2 ) = xc + j * yc 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(n+3N 4) = xd + j * yd 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Output real and imaginary data: 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r) = xa'+ j * ya' 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+1) = xb'+ j * yb' 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+2) = xc'+ j * yc' 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * x(4r+3) = xd'+ j * yd' 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Twiddle factors for radix-4 IFFT: 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * Wn = co1 + j * (si1) 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * W2n = co2 + j * (si2) 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * W3n = co3 + j * (si3) 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * The real and imaginary output values for the radix-4 butterfly are 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xa' = xa + xb + xc + xd 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * ya' = ya + yb + yc + yd 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** * 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** */ 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** void arm_radix4_butterfly_inverse_q15( 1293 .loc 4 1017 0 1294 .cfi_startproc 1295 @ args = 0, pretend = 0, frame = 72 1296 @ frame_needed = 0, uses_anonymous_args = 0 1297 .LVL88: ARM GAS /tmp/ccfbYRip.s page 59 1298 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 1299 .LCFI32: 1300 .cfi_def_cfa_offset 36 1301 .cfi_offset 4, -36 1302 .cfi_offset 5, -32 1303 .cfi_offset 6, -28 1304 .cfi_offset 7, -24 1305 .cfi_offset 8, -20 1306 .cfi_offset 9, -16 1307 .cfi_offset 10, -12 1308 .cfi_offset 11, -8 1309 .cfi_offset 14, -4 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t fftLen, 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** const q15_t * pCoef16, 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t twidCoefModifier) 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #if defined (ARM_MATH_DSP) 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t R, S, T, U; 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t C1, C2, C3, out1, out2; 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t n1, n2, ic, i0, j, k; 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *ptr1; 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi0; 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi1; 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi2; 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t *pSi3; 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q31_t xaya, xbyb, xcyc, xdyd; 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Total process is divided into three stages */ 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* process first stage, middle stages, & last stage */ 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the first stage */ 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 = fftLen; 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* n2 = fftLen/4 */ 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 1310 .loc 4 1047 0 1311 0004 8B08 lsrs r3, r1, #2 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for twiddle coefficient */ 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for input read and output write */ 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = n2; 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 = pSrc16; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 1312 .loc 4 1056 0 1313 0006 9C00 lsls r4, r3, #2 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 1314 .loc 4 1017 0 ARM GAS /tmp/ccfbYRip.s page 60 1315 0008 93B0 sub sp, sp, #76 1316 .LCFI33: 1317 .cfi_def_cfa_offset 112 1318 .loc 4 1056 0 1319 000a 00EB040B add fp, r0, r4 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 1320 .loc 4 1057 0 1321 000e 0BEB0407 add r7, fp, r4 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Input is in 1.15(q15) format */ 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of first stage process */ 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi0); 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = read_q15x2 (pSi2); 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHADD16(S, 0); 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHADD16(S, 0); 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc), (xa + xc) ) */ 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(T, S); 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc) ) */ 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(T, S); 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd) ) */ 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(T, U); 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi0, __SHADD16(R, T)); 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QSUB16(R, T); 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co2 & si2 are read from SIMD Coefficient pointer */ ARM GAS /tmp/ccfbYRip.s page 61 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C2, R) >> 16U; 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C2, R); 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(C2, R) >> 16U; 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C2), R); 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 */ 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb, xb) */ 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __SHADD16(T, 0); 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xc', yc') in little endian format */ 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 1322 .loc 4 1129 0 1323 0012 DFF83CC2 ldr ip, .L160 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 1324 .loc 4 1017 0 1325 0016 0F90 str r0, [sp, #60] 1326 0018 0546 mov r5, r0 1327 001a 0391 str r1, [sp, #12] 1328 .LVL89: 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1329 .loc 4 1047 0 1330 001c 1193 str r3, [sp, #68] 1331 .LVL90: 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 1332 .loc 4 1017 0 1333 001e 9246 mov r10, r2 1334 0020 1092 str r2, [sp, #64] 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 1335 .loc 4 1058 0 1336 0022 3C44 add r4, r4, r7 1337 .LVL91: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 1338 .loc 4 1056 0 1339 0024 5E46 mov r6, fp 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1340 .loc 4 1058 0 1341 0026 9046 mov r8, r2 1342 0028 9646 mov lr, r2 1343 .LBB1012: 1344 .LBB1013: 1345 .file 5 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 ARM GAS /tmp/ccfbYRip.s page 62 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED ARM GAS /tmp/ccfbYRip.s page 63 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccfbYRip.s page 64 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccfbYRip.s page 65 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccfbYRip.s page 66 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 67 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); ARM GAS /tmp/ccfbYRip.s page 68 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 69 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) ARM GAS /tmp/ccfbYRip.s page 70 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) ARM GAS /tmp/ccfbYRip.s page 71 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccfbYRip.s page 72 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccfbYRip.s page 73 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); ARM GAS /tmp/ccfbYRip.s page 74 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccfbYRip.s page 75 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 76 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) ARM GAS /tmp/ccfbYRip.s page 77 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccfbYRip.s page 78 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 79 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 80 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. ARM GAS /tmp/ccfbYRip.s page 81 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1108:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) 1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. 1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1132:Drivers/CMSIS/Include/cmsis_gcc.h **** 1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); 1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1142:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1143:Drivers/CMSIS/Include/cmsis_gcc.h **** 1144:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 82 1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) 1152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1154:Drivers/CMSIS/Include/cmsis_gcc.h **** 1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1158:Drivers/CMSIS/Include/cmsis_gcc.h **** 1159:Drivers/CMSIS/Include/cmsis_gcc.h **** 1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. 1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) 1169:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1171:Drivers/CMSIS/Include/cmsis_gcc.h **** 1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1174:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1175:Drivers/CMSIS/Include/cmsis_gcc.h **** 1176:Drivers/CMSIS/Include/cmsis_gcc.h **** 1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. 1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1186:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1188:Drivers/CMSIS/Include/cmsis_gcc.h **** 1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1191:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1192:Drivers/CMSIS/Include/cmsis_gcc.h **** 1193:Drivers/CMSIS/Include/cmsis_gcc.h **** 1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccfbYRip.s page 83 1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 1203:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1205:Drivers/CMSIS/Include/cmsis_gcc.h **** 1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1208:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1209:Drivers/CMSIS/Include/cmsis_gcc.h **** 1210:Drivers/CMSIS/Include/cmsis_gcc.h **** 1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock 1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX. 1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void) 1216:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory"); 1218:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1219:Drivers/CMSIS/Include/cmsis_gcc.h **** 1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1224:Drivers/CMSIS/Include/cmsis_gcc.h **** 1225:Drivers/CMSIS/Include/cmsis_gcc.h **** 1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \ 1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1242:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1243:Drivers/CMSIS/Include/cmsis_gcc.h **** 1244:Drivers/CMSIS/Include/cmsis_gcc.h **** 1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31) 1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \ 1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1258:Drivers/CMSIS/Include/cmsis_gcc.h **** }) ARM GAS /tmp/ccfbYRip.s page 84 1259:Drivers/CMSIS/Include/cmsis_gcc.h **** 1260:Drivers/CMSIS/Include/cmsis_gcc.h **** 1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit) 1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit. 1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring. 1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate 1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) 1269:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1271:Drivers/CMSIS/Include/cmsis_gcc.h **** 1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1274:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1275:Drivers/CMSIS/Include/cmsis_gcc.h **** 1276:Drivers/CMSIS/Include/cmsis_gcc.h **** 1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit) 1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value. 1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) 1284:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1286:Drivers/CMSIS/Include/cmsis_gcc.h **** 1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1296:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1297:Drivers/CMSIS/Include/cmsis_gcc.h **** 1298:Drivers/CMSIS/Include/cmsis_gcc.h **** 1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit) 1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values. 1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) 1306:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1308:Drivers/CMSIS/Include/cmsis_gcc.h **** 1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); ARM GAS /tmp/ccfbYRip.s page 85 1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1318:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1319:Drivers/CMSIS/Include/cmsis_gcc.h **** 1320:Drivers/CMSIS/Include/cmsis_gcc.h **** 1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit) 1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values. 1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) 1328:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1330:Drivers/CMSIS/Include/cmsis_gcc.h **** 1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1333:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1334:Drivers/CMSIS/Include/cmsis_gcc.h **** 1335:Drivers/CMSIS/Include/cmsis_gcc.h **** 1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit) 1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values. 1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) 1343:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1345:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1346:Drivers/CMSIS/Include/cmsis_gcc.h **** 1347:Drivers/CMSIS/Include/cmsis_gcc.h **** 1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit) 1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values. 1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) 1355:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1357:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1358:Drivers/CMSIS/Include/cmsis_gcc.h **** 1359:Drivers/CMSIS/Include/cmsis_gcc.h **** 1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit) 1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values. 1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) 1367:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 1369:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1370:Drivers/CMSIS/Include/cmsis_gcc.h **** 1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ ARM GAS /tmp/ccfbYRip.s page 86 1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1374:Drivers/CMSIS/Include/cmsis_gcc.h **** 1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32) 1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U)) 1385:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ; 1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max) 1389:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1391:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min) 1393:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min; 1395:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1396:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val; 1398:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1399:Drivers/CMSIS/Include/cmsis_gcc.h **** 1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1408:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U) 1410:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U); 1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max) 1413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0) 1417:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 1419:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1420:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val; 1422:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1423:Drivers/CMSIS/Include/cmsis_gcc.h **** 1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1427:Drivers/CMSIS/Include/cmsis_gcc.h **** 1428:Drivers/CMSIS/Include/cmsis_gcc.h **** 1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ ARM GAS /tmp/ccfbYRip.s page 87 1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit) 1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value. 1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) 1438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1440:Drivers/CMSIS/Include/cmsis_gcc.h **** 1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); 1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1443:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1444:Drivers/CMSIS/Include/cmsis_gcc.h **** 1445:Drivers/CMSIS/Include/cmsis_gcc.h **** 1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit) 1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values. 1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) 1453:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1455:Drivers/CMSIS/Include/cmsis_gcc.h **** 1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); 1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1458:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1459:Drivers/CMSIS/Include/cmsis_gcc.h **** 1460:Drivers/CMSIS/Include/cmsis_gcc.h **** 1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) 1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values. 1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) 1468:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1470:Drivers/CMSIS/Include/cmsis_gcc.h **** 1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); 1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1473:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1474:Drivers/CMSIS/Include/cmsis_gcc.h **** 1475:Drivers/CMSIS/Include/cmsis_gcc.h **** 1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit) 1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values. 1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 1483:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1485:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1486:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 88 1487:Drivers/CMSIS/Include/cmsis_gcc.h **** 1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit) 1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values. 1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) 1495:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1497:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1498:Drivers/CMSIS/Include/cmsis_gcc.h **** 1499:Drivers/CMSIS/Include/cmsis_gcc.h **** 1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit) 1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values. 1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) 1507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1510:Drivers/CMSIS/Include/cmsis_gcc.h **** 1511:Drivers/CMSIS/Include/cmsis_gcc.h **** 1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit) 1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value. 1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 1519:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1521:Drivers/CMSIS/Include/cmsis_gcc.h **** 1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); 1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1524:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1525:Drivers/CMSIS/Include/cmsis_gcc.h **** 1526:Drivers/CMSIS/Include/cmsis_gcc.h **** 1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit) 1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values. 1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) 1534:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1536:Drivers/CMSIS/Include/cmsis_gcc.h **** 1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); 1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1539:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1540:Drivers/CMSIS/Include/cmsis_gcc.h **** 1541:Drivers/CMSIS/Include/cmsis_gcc.h **** 1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit) ARM GAS /tmp/ccfbYRip.s page 89 1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values. 1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) 1549:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1551:Drivers/CMSIS/Include/cmsis_gcc.h **** 1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); 1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1554:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1555:Drivers/CMSIS/Include/cmsis_gcc.h **** 1556:Drivers/CMSIS/Include/cmsis_gcc.h **** 1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit) 1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values. 1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) 1566:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1568:Drivers/CMSIS/Include/cmsis_gcc.h **** 1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1571:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1572:Drivers/CMSIS/Include/cmsis_gcc.h **** 1573:Drivers/CMSIS/Include/cmsis_gcc.h **** 1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. 1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) 1583:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1585:Drivers/CMSIS/Include/cmsis_gcc.h **** 1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1588:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1589:Drivers/CMSIS/Include/cmsis_gcc.h **** 1590:Drivers/CMSIS/Include/cmsis_gcc.h **** 1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit) 1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values. 1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) 1600:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccfbYRip.s page 90 1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1602:Drivers/CMSIS/Include/cmsis_gcc.h **** 1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1605:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1606:Drivers/CMSIS/Include/cmsis_gcc.h **** 1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1609:Drivers/CMSIS/Include/cmsis_gcc.h **** 1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 1611:Drivers/CMSIS/Include/cmsis_gcc.h **** 1612:Drivers/CMSIS/Include/cmsis_gcc.h **** 1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */ 1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions 1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1618:Drivers/CMSIS/Include/cmsis_gcc.h **** 1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 1620:Drivers/CMSIS/Include/cmsis_gcc.h **** 1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) 1622:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1624:Drivers/CMSIS/Include/cmsis_gcc.h **** 1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1628:Drivers/CMSIS/Include/cmsis_gcc.h **** 1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) 1630:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1632:Drivers/CMSIS/Include/cmsis_gcc.h **** 1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1635:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1636:Drivers/CMSIS/Include/cmsis_gcc.h **** 1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) 1638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1640:Drivers/CMSIS/Include/cmsis_gcc.h **** 1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1643:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1644:Drivers/CMSIS/Include/cmsis_gcc.h **** 1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) 1646:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1648:Drivers/CMSIS/Include/cmsis_gcc.h **** 1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1651:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1652:Drivers/CMSIS/Include/cmsis_gcc.h **** 1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) 1654:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1656:Drivers/CMSIS/Include/cmsis_gcc.h **** 1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); ARM GAS /tmp/ccfbYRip.s page 91 1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1659:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1660:Drivers/CMSIS/Include/cmsis_gcc.h **** 1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) 1662:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1664:Drivers/CMSIS/Include/cmsis_gcc.h **** 1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1667:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1668:Drivers/CMSIS/Include/cmsis_gcc.h **** 1669:Drivers/CMSIS/Include/cmsis_gcc.h **** 1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) 1671:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1673:Drivers/CMSIS/Include/cmsis_gcc.h **** 1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1676:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1677:Drivers/CMSIS/Include/cmsis_gcc.h **** 1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) 1679:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1681:Drivers/CMSIS/Include/cmsis_gcc.h **** 1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1684:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1685:Drivers/CMSIS/Include/cmsis_gcc.h **** 1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) 1687:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1689:Drivers/CMSIS/Include/cmsis_gcc.h **** 1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1692:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1693:Drivers/CMSIS/Include/cmsis_gcc.h **** 1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) 1695:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1697:Drivers/CMSIS/Include/cmsis_gcc.h **** 1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1700:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1701:Drivers/CMSIS/Include/cmsis_gcc.h **** 1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) 1703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1705:Drivers/CMSIS/Include/cmsis_gcc.h **** 1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1708:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1709:Drivers/CMSIS/Include/cmsis_gcc.h **** 1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) 1711:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1713:Drivers/CMSIS/Include/cmsis_gcc.h **** 1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); ARM GAS /tmp/ccfbYRip.s page 92 1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1716:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1717:Drivers/CMSIS/Include/cmsis_gcc.h **** 1718:Drivers/CMSIS/Include/cmsis_gcc.h **** 1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) 1720:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1722:Drivers/CMSIS/Include/cmsis_gcc.h **** 1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1725:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1726:Drivers/CMSIS/Include/cmsis_gcc.h **** 1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) 1728:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1730:Drivers/CMSIS/Include/cmsis_gcc.h **** 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1734:Drivers/CMSIS/Include/cmsis_gcc.h **** 1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) 1736:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1738:Drivers/CMSIS/Include/cmsis_gcc.h **** 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1346 .loc 5 1739 0 1347 002a 0020 movs r0, #0 1348 .LVL92: 1349 .L147: 1350 .LBE1013: 1351 .LBE1012: 1352 .LBB1015: 1353 .LBB1016: 1354 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /****************************************************************************** 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/ 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccfbYRip.s page 93 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library, 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices. 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category: 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM) 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the Lib fold 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries : 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file arm_math.h which is placed 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling ARM GAS /tmp/ccfbYRip.s page 94 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file arm_math.h for Cortex-M cores with little endian and big endi 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -------- 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake. 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ----------------------------- 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directorie 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|----------------------------------------------------------- 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg. 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root. 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions ARM GAS /tmp/ccfbYRip.s page 96 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...). 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values. 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations. 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example, 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     typedef struct
 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     {
 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numRows;     // number of rows of the matrix.
 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numCols;     // number of columns of the matrix.
 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       float32_t *pData;     // points to the data of the matrix.
 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     } arm_matrix_instance_f32;
 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size numRows X numCols 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     pData[i*numCols + j]
 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields. 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15() 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section. 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where nRows specifies the number of rows, nColumns 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and pData points to the ARM GAS /tmp/ccfbYRip.s page 97 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array. 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SIZE_MISMATCH
 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SUCCESS
 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_MATRIX_CHECK
 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return ARM_MATH_SUCCESS. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data. 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes. 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily ARM GAS /tmp/ccfbYRip.s page 98 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification. 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder. 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator. 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms. 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors. 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C" 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion" 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) ARM GAS /tmp/ccfbYRip.s page 99 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER ) 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER ) 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x)) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline)) 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline)) 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function" 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes" 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h" 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX) 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX) 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX) 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX) 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX) 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX) 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX) 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0) ARM GAS /tmp/ccfbYRip.s page 100 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0) 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL)) 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF)) 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F)) 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L)) 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000)) 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80)) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL)) 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF)) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F)) 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0) 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0) 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF) 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100)) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations ARM GAS /tmp/ccfbYRip.s page 101 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10) 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library. 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format. 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format. 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t; ARM GAS /tmp/ccfbYRip.s page 102 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition. 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition. 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format. 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format. 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format. 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format. 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format. 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format. 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format. ARM GAS /tmp/ccfbYRip.s page 103 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format. 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format. 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type. 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type. 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type. 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccfbYRip.s page 104 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format. 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format. 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format. 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccfbYRip.s page 105 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type. 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type. 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type ARM GAS /tmp/ccfbYRip.s page 106 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccfbYRip.s page 107 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f; 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i; 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t; 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type. 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type. 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type. 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values. 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t ARM GAS /tmp/ccfbYRip.s page 108 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER ) 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr)) 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr)) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x)) 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer. 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 ( 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15) 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4); 1355 .loc 6 909 0 1356 002c 2B68 ldr r3, [r5] @ unaligned 1357 .LBE1016: 1358 .LBE1015: 1359 .LBB1017: 1360 .LBB1014: 1361 .loc 5 1739 0 1362 .syntax unified 1363 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1364 002e 93FA20F3 shadd16 r3, r3, r0 1365 @ 0 "" 2 1366 .LVL93: 1367 .thumb 1368 .syntax unified 1369 .LBE1014: 1370 .LBE1017: 1371 .LBB1018: 1372 .LBB1019: 1373 .syntax unified 1374 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1375 0032 93FA20F2 shadd16 r2, r3, r0 1376 @ 0 "" 2 1377 .LVL94: 1378 .thumb 1379 .syntax unified 1380 .LBE1019: ARM GAS /tmp/ccfbYRip.s page 109 1381 .LBE1018: 1382 .LBB1020: 1383 .LBB1021: 1384 .loc 6 909 0 1385 0036 3B68 ldr r3, [r7] @ unaligned 1386 .LBE1021: 1387 .LBE1020: 1388 .LBB1022: 1389 .LBB1023: 1390 .loc 5 1739 0 1391 .syntax unified 1392 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1393 0038 93FA20F3 shadd16 r3, r3, r0 1394 @ 0 "" 2 1395 .LVL95: 1396 .thumb 1397 .syntax unified 1398 .LBE1023: 1399 .LBE1022: 1400 .LBB1024: 1401 .LBB1025: 1402 .syntax unified 1403 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1404 003c 93FA20F3 shadd16 r3, r3, r0 1405 @ 0 "" 2 1406 .LVL96: 1407 .thumb 1408 .syntax unified 1409 .LBE1025: 1410 .LBE1024: 1411 .LBB1026: 1412 .LBB1027: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1413 .loc 5 1731 0 1414 .syntax unified 1415 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1416 0040 92FA13F1 qadd16 r1, r2, r3 1417 @ 0 "" 2 1418 .LVL97: 1419 .thumb 1420 .syntax unified 1421 .LBE1027: 1422 .LBE1026: 1423 .LBB1028: 1424 .LBB1029: 1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1741:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1742:Drivers/CMSIS/Include/cmsis_gcc.h **** 1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) 1744:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1746:Drivers/CMSIS/Include/cmsis_gcc.h **** 1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1749:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1750:Drivers/CMSIS/Include/cmsis_gcc.h **** 1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) ARM GAS /tmp/ccfbYRip.s page 110 1752:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1754:Drivers/CMSIS/Include/cmsis_gcc.h **** 1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1758:Drivers/CMSIS/Include/cmsis_gcc.h **** 1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) 1760:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1762:Drivers/CMSIS/Include/cmsis_gcc.h **** 1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1765:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1766:Drivers/CMSIS/Include/cmsis_gcc.h **** 1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) 1768:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1770:Drivers/CMSIS/Include/cmsis_gcc.h **** 1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1773:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1774:Drivers/CMSIS/Include/cmsis_gcc.h **** 1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) 1776:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1778:Drivers/CMSIS/Include/cmsis_gcc.h **** 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1425 .loc 5 1779 0 1426 .syntax unified 1427 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1428 0044 D2FA13F3 qsub16 r3, r2, r3 1429 @ 0 "" 2 1430 .LVL98: 1431 .thumb 1432 .syntax unified 1433 .LBE1029: 1434 .LBE1028: 1435 .LBB1030: 1436 .LBB1031: 1437 .loc 6 909 0 1438 0048 3268 ldr r2, [r6] @ unaligned 1439 .LBE1031: 1440 .LBE1030: 1441 .LBB1032: 1442 .LBB1033: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1443 .loc 5 1739 0 1444 .syntax unified 1445 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1446 004a 92FA20F2 shadd16 r2, r2, r0 1447 @ 0 "" 2 1448 .LVL99: 1449 .thumb 1450 .syntax unified 1451 .LBE1033: 1452 .LBE1032: ARM GAS /tmp/ccfbYRip.s page 111 1453 .LBB1034: 1454 .LBB1035: 1455 .syntax unified 1456 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1457 004e 92FA20F2 shadd16 r2, r2, r0 1458 @ 0 "" 2 1459 .LVL100: 1460 .thumb 1461 .syntax unified 1462 .LBE1035: 1463 .LBE1034: 1464 .LBB1036: 1465 .LBB1037: 1466 .loc 6 909 0 1467 0052 D4F80090 ldr r9, [r4] @ unaligned 1468 .LBE1037: 1469 .LBE1036: 1470 .LBB1038: 1471 .LBB1039: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1472 .loc 5 1739 0 1473 .syntax unified 1474 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1475 0056 99FA20F9 shadd16 r9, r9, r0 1476 @ 0 "" 2 1477 .LVL101: 1478 .thumb 1479 .syntax unified 1480 .LBE1039: 1481 .LBE1038: 1482 .LBB1040: 1483 .LBB1041: 1484 .syntax unified 1485 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1486 005a 99FA20F9 shadd16 r9, r9, r0 1487 @ 0 "" 2 1488 .LVL102: 1489 .thumb 1490 .syntax unified 1491 .LBE1041: 1492 .LBE1040: 1493 .LBB1042: 1494 .LBB1043: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1495 .loc 5 1731 0 1496 .syntax unified 1497 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1498 005e 92FA19F2 qadd16 r2, r2, r9 1499 @ 0 "" 2 1500 .LVL103: 1501 .thumb 1502 .syntax unified 1503 .LBE1043: 1504 .LBE1042: 1505 .LBB1044: 1506 .LBB1045: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 112 1507 .loc 5 1739 0 1508 .syntax unified 1509 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1510 0062 91FA22F9 shadd16 r9, r1, r2 1511 @ 0 "" 2 1512 .LVL104: 1513 .thumb 1514 .syntax unified 1515 .LBE1045: 1516 .LBE1044: 1517 .LBB1046: 1518 .LBB1047: 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards. 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia ( 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards. 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da ( 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); ARM GAS /tmp/ccfbYRip.s page 113 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards. 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia ( 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15, 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4); 1519 .loc 6 969 0 1520 0066 45F8049B str r9, [r5], #4 @ unaligned 1521 .LVL105: 1522 .LBE1047: 1523 .LBE1046: 1524 .LBB1048: 1525 .LBB1049: 1526 .loc 5 1779 0 1527 .syntax unified 1528 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1529 006a D1FA12F1 qsub16 r1, r1, r2 1530 @ 0 "" 2 1531 .LVL106: 1532 .thumb 1533 .syntax unified 1534 .LBE1049: 1535 .LBE1048: 1536 .LBB1050: 1537 .LBB1051: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1538 .loc 6 909 0 1539 006e 5AF8102B ldr r2, [r10], #16 @ unaligned 1540 .LVL107: 1541 .LBE1051: 1542 .LBE1050: 1543 .LBB1052: 1544 .LBB1053: 1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1781:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1782:Drivers/CMSIS/Include/cmsis_gcc.h **** 1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) 1784:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1786:Drivers/CMSIS/Include/cmsis_gcc.h **** 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1789:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1790:Drivers/CMSIS/Include/cmsis_gcc.h **** 1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) 1792:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1794:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccfbYRip.s page 114 1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1797:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1798:Drivers/CMSIS/Include/cmsis_gcc.h **** 1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) 1800:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1802:Drivers/CMSIS/Include/cmsis_gcc.h **** 1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1805:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1806:Drivers/CMSIS/Include/cmsis_gcc.h **** 1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) 1808:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1810:Drivers/CMSIS/Include/cmsis_gcc.h **** 1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1813:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1814:Drivers/CMSIS/Include/cmsis_gcc.h **** 1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) 1816:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1818:Drivers/CMSIS/Include/cmsis_gcc.h **** 1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1822:Drivers/CMSIS/Include/cmsis_gcc.h **** 1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) 1824:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1826:Drivers/CMSIS/Include/cmsis_gcc.h **** 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1829:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1830:Drivers/CMSIS/Include/cmsis_gcc.h **** 1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) 1832:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1834:Drivers/CMSIS/Include/cmsis_gcc.h **** 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1837:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1838:Drivers/CMSIS/Include/cmsis_gcc.h **** 1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) 1840:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1842:Drivers/CMSIS/Include/cmsis_gcc.h **** 1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1845:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1846:Drivers/CMSIS/Include/cmsis_gcc.h **** 1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) 1848:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1850:Drivers/CMSIS/Include/cmsis_gcc.h **** 1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); ARM GAS /tmp/ccfbYRip.s page 115 1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1853:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1854:Drivers/CMSIS/Include/cmsis_gcc.h **** 1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) 1856:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1858:Drivers/CMSIS/Include/cmsis_gcc.h **** 1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1861:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1862:Drivers/CMSIS/Include/cmsis_gcc.h **** 1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) 1864:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1866:Drivers/CMSIS/Include/cmsis_gcc.h **** 1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1870:Drivers/CMSIS/Include/cmsis_gcc.h **** 1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) 1872:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1874:Drivers/CMSIS/Include/cmsis_gcc.h **** 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1877:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1878:Drivers/CMSIS/Include/cmsis_gcc.h **** 1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) 1880:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1882:Drivers/CMSIS/Include/cmsis_gcc.h **** 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1885:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1886:Drivers/CMSIS/Include/cmsis_gcc.h **** 1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) 1888:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1890:Drivers/CMSIS/Include/cmsis_gcc.h **** 1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1893:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1894:Drivers/CMSIS/Include/cmsis_gcc.h **** 1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) 1896:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1898:Drivers/CMSIS/Include/cmsis_gcc.h **** 1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1901:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1902:Drivers/CMSIS/Include/cmsis_gcc.h **** 1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) 1904:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1906:Drivers/CMSIS/Include/cmsis_gcc.h **** 1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 116 1909:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1910:Drivers/CMSIS/Include/cmsis_gcc.h **** 1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) 1912:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1914:Drivers/CMSIS/Include/cmsis_gcc.h **** 1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1917:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1918:Drivers/CMSIS/Include/cmsis_gcc.h **** 1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) 1920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1922:Drivers/CMSIS/Include/cmsis_gcc.h **** 1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1926:Drivers/CMSIS/Include/cmsis_gcc.h **** 1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \ 1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1932:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1933:Drivers/CMSIS/Include/cmsis_gcc.h **** 1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \ 1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1939:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1940:Drivers/CMSIS/Include/cmsis_gcc.h **** 1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) 1942:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1944:Drivers/CMSIS/Include/cmsis_gcc.h **** 1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1948:Drivers/CMSIS/Include/cmsis_gcc.h **** 1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) 1950:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1952:Drivers/CMSIS/Include/cmsis_gcc.h **** 1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1955:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1956:Drivers/CMSIS/Include/cmsis_gcc.h **** 1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) 1958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1960:Drivers/CMSIS/Include/cmsis_gcc.h **** 1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1963:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1964:Drivers/CMSIS/Include/cmsis_gcc.h **** 1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) ARM GAS /tmp/ccfbYRip.s page 117 1966:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1968:Drivers/CMSIS/Include/cmsis_gcc.h **** 1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1971:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1972:Drivers/CMSIS/Include/cmsis_gcc.h **** 1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) 1974:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1976:Drivers/CMSIS/Include/cmsis_gcc.h **** 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1979:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1980:Drivers/CMSIS/Include/cmsis_gcc.h **** 1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) 1982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1984:Drivers/CMSIS/Include/cmsis_gcc.h **** 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1987:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1988:Drivers/CMSIS/Include/cmsis_gcc.h **** 1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) 1990:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1992:Drivers/CMSIS/Include/cmsis_gcc.h **** 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1995:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1996:Drivers/CMSIS/Include/cmsis_gcc.h **** 1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) 1998:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2000:Drivers/CMSIS/Include/cmsis_gcc.h **** 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2003:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2004:Drivers/CMSIS/Include/cmsis_gcc.h **** 2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) 2006:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2012:Drivers/CMSIS/Include/cmsis_gcc.h **** 2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 2015:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2016:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o 2017:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2018:Drivers/CMSIS/Include/cmsis_gcc.h **** 2019:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2020:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2021:Drivers/CMSIS/Include/cmsis_gcc.h **** 2022:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) ARM GAS /tmp/ccfbYRip.s page 118 2023:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2024:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2025:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2027:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2028:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2029:Drivers/CMSIS/Include/cmsis_gcc.h **** 2030:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2031:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" ( 2032:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */ 2033:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" ( 2034:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 2035:Drivers/CMSIS/Include/cmsis_gcc.h **** 2036:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64); 2037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2038:Drivers/CMSIS/Include/cmsis_gcc.h **** 2039:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) 2040:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2041:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2042:Drivers/CMSIS/Include/cmsis_gcc.h **** 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1545 .loc 5 2043 0 1546 .syntax unified 1547 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1548 0072 42FB01F9 smusd r9, r2, r1 1549 @ 0 "" 2 1550 .LVL108: 1551 .thumb 1552 .syntax unified 1553 .LBE1053: 1554 .LBE1052: 1555 .LBB1054: 1556 .LBB1055: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1557 .loc 5 1985 0 1558 .syntax unified 1559 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1560 0076 22FB11F1 smuadx r1, r2, r1 1561 @ 0 "" 2 1562 .LVL109: 1563 .thumb 1564 .syntax unified 1565 .LBE1055: 1566 .LBE1054: 1567 .LBB1056: 1568 .LBB1057: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1569 .loc 6 909 0 1570 007a 3268 ldr r2, [r6] @ unaligned 1571 .LBE1057: 1572 .LBE1056: 1573 .LBB1058: 1574 .LBB1059: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1575 .loc 5 1739 0 1576 .syntax unified 1577 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 119 1578 007c 92FA20F2 shadd16 r2, r2, r0 1579 @ 0 "" 2 1580 .LVL110: 1581 .thumb 1582 .syntax unified 1583 .LBE1059: 1584 .LBE1058: 1585 .LBB1060: 1586 .LBB1061: 1587 .syntax unified 1588 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1589 0080 92FA20F2 shadd16 r2, r2, r0 1590 @ 0 "" 2 1591 .LVL111: 1592 .thumb 1593 .syntax unified 1594 .LBE1061: 1595 .LBE1060: 1596 .loc 4 1129 0 1597 0084 01EA0C01 and r1, r1, ip 1598 .LVL112: 1599 0088 41EA1941 orr r1, r1, r9, lsr #16 1600 .LBB1062: 1601 .LBB1063: 1602 .loc 6 969 0 1603 008c 46F8041B str r1, [r6], #4 @ unaligned 1604 .LVL113: 1605 .LBE1063: 1606 .LBE1062: 1607 .LBB1064: 1608 .LBB1065: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1609 .loc 6 909 0 1610 0090 2168 ldr r1, [r4] @ unaligned 1611 .LBE1065: 1612 .LBE1064: 1613 .LBB1066: 1614 .LBB1067: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1615 .loc 5 1739 0 1616 .syntax unified 1617 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1618 0092 91FA20F1 shadd16 r1, r1, r0 1619 @ 0 "" 2 1620 .LVL114: 1621 .thumb 1622 .syntax unified 1623 .LBE1067: 1624 .LBE1066: 1625 .LBB1068: 1626 .LBB1069: 1627 .syntax unified 1628 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1629 0096 91FA20F1 shadd16 r1, r1, r0 1630 @ 0 "" 2 1631 .LVL115: 1632 .thumb ARM GAS /tmp/ccfbYRip.s page 120 1633 .syntax unified 1634 .LBE1069: 1635 .LBE1068: 1636 .LBB1070: 1637 .LBB1071: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1638 .loc 5 1779 0 1639 .syntax unified 1640 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1641 009a D2FA11F2 qsub16 r2, r2, r1 1642 @ 0 "" 2 1643 .LVL116: 1644 .thumb 1645 .syntax unified 1646 .LBE1071: 1647 .LBE1070: 1648 .LBB1072: 1649 .LBB1073: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1650 .loc 5 1875 0 1651 .syntax unified 1652 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1653 009e E3FA12F1 qsax r1, r3, r2 1654 @ 0 "" 2 1655 .LVL117: 1656 .thumb 1657 .syntax unified 1658 .LBE1073: 1659 .LBE1072: 1660 .LBB1074: 1661 .LBB1075: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1662 .loc 5 1827 0 1663 .syntax unified 1664 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1665 00a2 A3FA12F3 qasx r3, r3, r2 1666 @ 0 "" 2 1667 .LVL118: 1668 .thumb 1669 .syntax unified 1670 .LBE1075: 1671 .LBE1074: 1672 .LBB1076: 1673 .LBB1077: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1674 .loc 6 909 0 1675 00a6 5EF8082B ldr r2, [lr], #8 @ unaligned 1676 .LVL119: 1677 .LBE1077: 1678 .LBE1076: 1679 .LBB1078: 1680 .LBB1079: 1681 .loc 5 2043 0 1682 .syntax unified 1683 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1684 00aa 42FB03F9 smusd r9, r2, r3 1685 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 121 1686 .LVL120: 1687 .thumb 1688 .syntax unified 1689 .LBE1079: 1690 .LBE1078: 1691 .LBB1080: 1692 .LBB1081: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1693 .loc 5 1985 0 1694 .syntax unified 1695 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1696 00ae 22FB13F3 smuadx r3, r2, r3 1697 @ 0 "" 2 1698 .LVL121: 1699 .thumb 1700 .syntax unified 1701 .LBE1081: 1702 .LBE1080: 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* U = packed(yd, xd) */ 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __SHADD16(U, 0); 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb-yd, xb-xd) */ 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QSUB16(T, U); 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QSAX(S, T); 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) + (xb- xd), (xa-xc) - (yb-yd)) */ 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QASX(S, T); 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QASX(S, T); 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSAX(S, T); 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co1 & si1 are read from SIMD Coefficient pointer */ 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C1, S) >> 16U; 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C1, S); 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(C1, S) >> 16U; 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C1), S); 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xb', yb') in little endian format */ ARM GAS /tmp/ccfbYRip.s page 122 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF)); 1703 .loc 4 1169 0 1704 00b2 03EA0C03 and r3, r3, ip 1705 .LVL122: 1706 00b6 43EA1943 orr r3, r3, r9, lsr #16 1707 .LBB1082: 1708 .LBB1083: 1709 .loc 6 969 0 1710 00ba 47F8043B str r3, [r7], #4 @ unaligned 1711 .LVL123: 1712 .LBE1083: 1713 .LBE1082: 1714 .LBB1084: 1715 .LBB1085: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1716 .loc 6 909 0 1717 00be 58F8183B ldr r3, [r8], #24 @ unaligned 1718 .LVL124: 1719 .LBE1085: 1720 .LBE1084: 1721 .LBB1086: 1722 .LBB1087: 1723 .loc 5 2043 0 1724 .syntax unified 1725 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1726 00c2 43FB01F2 smusd r2, r3, r1 1727 @ 0 "" 2 1728 .LVL125: 1729 .thumb 1730 .syntax unified 1731 .LBE1087: 1732 .LBE1086: 1733 .LBB1088: 1734 .LBB1089: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1735 .loc 5 1985 0 1736 .syntax unified 1737 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1738 00c6 23FB11F3 smuadx r3, r3, r1 1739 @ 0 "" 2 1740 .LVL126: 1741 .thumb 1742 .syntax unified 1743 .LBE1089: 1744 .LBE1088: 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co3 & si3 are read from SIMD Coefficient pointer */ 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C3, R) >> 16U; 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C3, R); 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ ARM GAS /tmp/ccfbYRip.s page 123 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(C3, R) >> 16U; 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C3), R); 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xd', yd') in little endian format */ 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 1745 .loc 4 1188 0 1746 00ca 03EA0C03 and r3, r3, ip 1747 .LVL127: 1748 00ce 43EA1243 orr r3, r3, r2, lsr #16 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 1749 .loc 4 1193 0 1750 00d2 AB45 cmp fp, r5 1751 .LBB1090: 1752 .LBB1091: 1753 .loc 6 969 0 1754 00d4 44F8043B str r3, [r4], #4 @ unaligned 1755 .LVL128: 1756 .LBE1091: 1757 .LBE1090: 1758 .loc 4 1193 0 1759 00d8 A8D1 bne .L147 1760 .LVL129: 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of first stage process */ 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of middle stage process */ 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Calculation of Middle stage */ 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 1761 .loc 4 1205 0 1762 00da 119B ldr r3, [sp, #68] 1763 00dc 042B cmp r3, #4 1764 00de 40F2B380 bls .L158 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the middle stage */ 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (j = 0U; j <= (n2 - 1U); j++) 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the coefficients */ 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 124 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 = pSrc16 + 2 * j; 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = j; i0 < fftLen; i0 += n1) 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi0); 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = read_q15x2 (pSi2); 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed( (ya + yc), (xa + xc)) */ 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(T, S); 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc)) */ 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(T, S); 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed( (yb + yd), (xb + xd)) */ 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(T, U); 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SHADD16(R, T); 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SHADD16(out1, 0); 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi0, out1); 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi0 += 2 * n1; 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHSUB16(R, T); 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C2, R) >> 16U; 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C2, R); 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(R, C2) >> 16U; 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ ARM GAS /tmp/ccfbYRip.s page 125 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C2), R); 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+3fftLen/4 */ 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = read_q15x2 (pSi1); 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 1765 .loc 4 1286 0 1766 00e2 DFF86CB1 ldr fp, .L160 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1767 .loc 4 1205 0 1768 00e6 0293 str r3, [sp, #8] 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1769 .loc 4 1202 0 1770 00e8 0823 movs r3, #8 1771 .LVL130: 1772 .L151: 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1773 .loc 4 1209 0 1774 00ea 0298 ldr r0, [sp, #8] 1775 00ec 03EB4302 add r2, r3, r3, lsl #1 1776 00f0 8108 lsrs r1, r0, #2 1777 00f2 9200 lsls r2, r2, #2 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 1778 .loc 4 1223 0 1779 00f4 8C00 lsls r4, r1, #2 1780 .LVL131: 1781 00f6 0D92 str r2, [sp, #52] 1782 00f8 9A00 lsls r2, r3, #2 1783 00fa DB00 lsls r3, r3, #3 1784 .LVL132: 1785 00fc 0A94 str r4, [sp, #40] 1786 00fe 0B93 str r3, [sp, #44] 1787 0100 039C ldr r4, [sp, #12] 1788 0102 0F9B ldr r3, [sp, #60] 1789 0104 0693 str r3, [sp, #24] 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1790 .loc 4 1260 0 1791 0106 109B ldr r3, [sp, #64] 1792 0108 0593 str r3, [sp, #20] 1793 010a 8C42 cmp r4, r1 1794 010c 28BF it cs 1795 010e 0C46 movcs r4, r1 1796 0110 CDE90733 strd r3, r3, [sp, #28] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1797 .loc 4 1212 0 1798 0114 0023 movs r3, #0 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1799 .loc 4 1209 0 1800 0116 0E91 str r1, [sp, #56] 1801 .LVL133: 1802 0118 0C94 str r4, [sp, #48] 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 126 1803 .loc 4 1260 0 1804 011a 8700 lsls r7, r0, #2 1805 011c 0992 str r2, [sp, #36] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1806 .loc 4 1212 0 1807 011e 0493 str r3, [sp, #16] 1808 .LVL134: 1809 .L150: 1810 .LBB1092: 1811 .LBB1093: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1812 .loc 6 909 0 1813 0120 059A ldr r2, [sp, #20] 1814 0122 0A9B ldr r3, [sp, #40] 1815 0124 D2F800A0 ldr r10, [r2] @ unaligned 1816 .LVL135: 1817 .LBE1093: 1818 .LBE1092: 1819 .LBB1094: 1820 .LBB1095: 1821 0128 089A ldr r2, [sp, #32] 1822 012a 069E ldr r6, [sp, #24] 1823 012c D2F80090 ldr r9, [r2] @ unaligned 1824 .LVL136: 1825 .LBE1095: 1826 .LBE1094: 1827 .LBB1096: 1828 .LBB1097: 1829 0130 079A ldr r2, [sp, #28] 1830 .LBE1097: 1831 .LBE1096: 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 1832 .loc 4 1222 0 1833 0132 DDF810E0 ldr lr, [sp, #16] 1834 .LBB1099: 1835 .LBB1098: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1836 .loc 6 909 0 1837 0136 D2F80080 ldr r8, [r2] @ unaligned 1838 .LVL137: 1839 .LBE1098: 1840 .LBE1099: 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 1841 .loc 4 1222 0 1842 013a CDF804E0 str lr, [sp, #4] 1843 013e 9819 adds r0, r3, r6 1844 0140 1D18 adds r5, r3, r0 1845 0142 5C19 adds r4, r3, r5 1846 .LVL138: 1847 .L149: 1848 .LBB1100: 1849 .LBB1101: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1850 .loc 6 909 0 1851 0144 3268 ldr r2, [r6] @ unaligned 1852 .LVL139: 1853 .LBE1101: ARM GAS /tmp/ccfbYRip.s page 127 1854 .LBE1100: 1855 .LBB1102: 1856 .LBB1103: 1857 0146 2968 ldr r1, [r5] @ unaligned 1858 .LVL140: 1859 .LBE1103: 1860 .LBE1102: 1861 .LBB1104: 1862 .LBB1105: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1863 .loc 5 1731 0 1864 .syntax unified 1865 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1866 0148 92FA11F3 qadd16 r3, r2, r1 1867 @ 0 "" 2 1868 .LVL141: 1869 .thumb 1870 .syntax unified 1871 .LBE1105: 1872 .LBE1104: 1873 .LBB1106: 1874 .LBB1107: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1875 .loc 5 1779 0 1876 .syntax unified 1877 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1878 014c D2FA11F2 qsub16 r2, r2, r1 1879 @ 0 "" 2 1880 .LVL142: 1881 .thumb 1882 .syntax unified 1883 .LBE1107: 1884 .LBE1106: 1885 .LBB1108: 1886 .LBB1109: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1887 .loc 6 909 0 1888 0150 0168 ldr r1, [r0] @ unaligned 1889 .LBE1109: 1890 .LBE1108: 1891 .LBB1110: 1892 .LBB1111: 1893 0152 D4F800C0 ldr ip, [r4] @ unaligned 1894 .LBE1111: 1895 .LBE1110: 1896 .LBB1112: 1897 .LBB1113: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1898 .loc 5 1731 0 1899 .syntax unified 1900 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1901 0156 91FA1CF1 qadd16 r1, r1, ip 1902 @ 0 "" 2 1903 .LVL143: 1904 .thumb 1905 .syntax unified 1906 .LBE1113: ARM GAS /tmp/ccfbYRip.s page 128 1907 .LBE1112: 1908 .LBB1114: 1909 .LBB1115: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1910 .loc 5 1739 0 1911 .syntax unified 1912 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1913 015a 93FA21FC shadd16 ip, r3, r1 1914 @ 0 "" 2 1915 .LVL144: 1916 .thumb 1917 .syntax unified 1918 .LBE1115: 1919 .LBE1114: 1920 .LBB1116: 1921 .LBB1117: 1922 015e 4FF0000E mov lr, #0 1923 .syntax unified 1924 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1925 0162 9CFA2EFC shadd16 ip, ip, lr 1926 @ 0 "" 2 1927 .LVL145: 1928 .thumb 1929 .syntax unified 1930 .LBE1117: 1931 .LBE1116: 1932 .LBB1118: 1933 .LBB1119: 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF); 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer. 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 ( 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15, 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4); 1934 .loc 6 991 0 1935 0166 C6F800C0 str ip, [r6] @ unaligned 1936 .LVL146: 1937 .LBE1119: 1938 .LBE1118: 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1939 .loc 4 1260 0 ARM GAS /tmp/ccfbYRip.s page 129 1940 016a 3E44 add r6, r6, r7 1941 .LVL147: 1942 .LBB1120: 1943 .LBB1121: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1944 .loc 5 1787 0 1945 .syntax unified 1946 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1947 016c D3FA21F3 shsub16 r3, r3, r1 1948 @ 0 "" 2 1949 .LVL148: 1950 .thumb 1951 .syntax unified 1952 .LBE1121: 1953 .LBE1120: 1954 .LBB1122: 1955 .LBB1123: 1956 .loc 5 2043 0 1957 .syntax unified 1958 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1959 0170 49FB03FC smusd ip, r9, r3 1960 @ 0 "" 2 1961 .LVL149: 1962 .thumb 1963 .syntax unified 1964 .LBE1123: 1965 .LBE1122: 1966 .LBB1124: 1967 .LBB1125: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1968 .loc 5 1985 0 1969 .syntax unified 1970 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1971 0174 29FB13F3 smuadx r3, r9, r3 1972 @ 0 "" 2 1973 .LVL150: 1974 .thumb 1975 .syntax unified 1976 .LBE1125: 1977 .LBE1124: 1978 .loc 4 1286 0 1979 0178 03EA0B03 and r3, r3, fp 1980 .LVL151: 1981 017c 43EA1C43 orr r3, r3, ip, lsr #16 1982 .LBB1126: 1983 .LBB1127: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1984 .loc 6 909 0 1985 0180 D0F800C0 ldr ip, [r0] @ unaligned 1986 .LVL152: 1987 .LBE1127: 1988 .LBE1126: 1989 .LBB1128: 1990 .LBB1129: 1991 .loc 6 991 0 1992 0184 0360 str r3, [r0] @ unaligned 1993 .LVL153: ARM GAS /tmp/ccfbYRip.s page 130 1994 .LBE1129: 1995 .LBE1128: 1996 .LBB1130: 1997 .LBB1131: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1998 .loc 6 909 0 1999 0186 2168 ldr r1, [r4] @ unaligned 2000 .LBE1131: 2001 .LBE1130: 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 2002 .loc 4 1287 0 2003 0188 3844 add r0, r0, r7 2004 .LVL154: 2005 .LBB1132: 2006 .LBB1133: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2007 .loc 5 1779 0 2008 .syntax unified 2009 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2010 018a DCFA11F1 qsub16 r1, ip, r1 2011 @ 0 "" 2 2012 .LVL155: 2013 .thumb 2014 .syntax unified 2015 .LBE1133: 2016 .LBE1132: 2017 .LBB1134: 2018 .LBB1135: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2019 .loc 5 1883 0 2020 .syntax unified 2021 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2022 018e E2FA21F3 shsax r3, r2, r1 2023 @ 0 "" 2 2024 .LVL156: 2025 .thumb 2026 .syntax unified 2027 .LBE1135: 2028 .LBE1134: 2029 .LBB1136: 2030 .LBB1137: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2031 .loc 5 1835 0 2032 .syntax unified 2033 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2034 0192 A2FA21F2 shasx r2, r2, r1 2035 @ 0 "" 2 2036 .LVL157: 2037 .thumb 2038 .syntax unified 2039 .LBE1137: 2040 .LBE1136: 2041 .LBB1138: 2042 .LBB1139: 2043 .loc 5 2043 0 2044 .syntax unified 2045 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 131 2046 0196 4AFB02F1 smusd r1, r10, r2 2047 @ 0 "" 2 2048 .LVL158: 2049 .thumb 2050 .syntax unified 2051 .LBE1139: 2052 .LBE1138: 2053 .LBB1140: 2054 .LBB1141: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2055 .loc 5 1985 0 2056 .syntax unified 2057 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2058 019a 2AFB12F2 smuadx r2, r10, r2 2059 @ 0 "" 2 2060 .LVL159: 2061 .thumb 2062 .syntax unified 2063 .LBE1141: 2064 .LBE1140: 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = read_q15x2 (pSi3); 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed(yb-yd, xb-xd) */ 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QSUB16(T, U); 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHSAX(S, T); 1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHASX(S, T); 1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C1, S) >> 16U; 1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C1, S); 1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ 1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __SHASX(S, T); 1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ 1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __SHSAX(S, T); 1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(S, C1) >> 16U; 1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C1), S); 1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ 1320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 2065 .loc 4 1321 0 2066 019e 02EA0B02 and r2, r2, fp 2067 .LVL160: ARM GAS /tmp/ccfbYRip.s page 132 2068 01a2 42EA1142 orr r2, r2, r1, lsr #16 2069 .LBB1142: 2070 .LBB1143: 2071 .loc 6 991 0 2072 01a6 2A60 str r2, [r5] @ unaligned 2073 .LVL161: 2074 .LBE1143: 2075 .LBE1142: 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 2076 .loc 4 1322 0 2077 01a8 3D44 add r5, r5, r7 2078 .LVL162: 2079 .LBB1144: 2080 .LBB1145: 2081 .loc 5 2043 0 2082 .syntax unified 2083 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2084 01aa 48FB03F2 smusd r2, r8, r3 2085 @ 0 "" 2 2086 .LVL163: 2087 .thumb 2088 .syntax unified 2089 .LBE1145: 2090 .LBE1144: 2091 .LBB1146: 2092 .LBB1147: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2093 .loc 5 1985 0 2094 .syntax unified 2095 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2096 01ae 28FB13F3 smuadx r3, r8, r3 2097 @ 0 "" 2 2098 .LVL164: 2099 .thumb 2100 .syntax unified 2101 .LBE1147: 2102 .LBE1146: 1323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 1325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUSD(C3, R) >> 16U; 1328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUADX(C3, R); 1329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = __SMUADX(C3, R) >> 16U; 1331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = __SMUSD(__QSUB16(0, C3), R); 1332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ 1335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 2103 .loc 4 1336 0 2104 01b2 03EA0B03 and r3, r3, fp 2105 .LVL165: 2106 01b6 43EA1243 orr r3, r3, r2, lsr #16 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2107 .loc 4 1228 0 ARM GAS /tmp/ccfbYRip.s page 133 2108 01ba DDE90112 ldrd r1, r2, [sp, #4] 2109 .LVL166: 2110 .LBB1148: 2111 .LBB1149: 2112 .loc 6 991 0 2113 01be 2360 str r3, [r4] @ unaligned 2114 .LVL167: 2115 .LBE1149: 2116 .LBE1148: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2117 .loc 4 1228 0 2118 01c0 039B ldr r3, [sp, #12] 2119 01c2 1144 add r1, r1, r2 2120 01c4 8B42 cmp r3, r1 2121 01c6 0191 str r1, [sp, #4] 2122 .LVL168: 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 2123 .loc 4 1337 0 2124 01c8 3C44 add r4, r4, r7 2125 .LVL169: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2126 .loc 4 1228 0 2127 01ca BBD8 bhi .L149 2128 01cc 059A ldr r2, [sp, #20] 2129 01ce 0999 ldr r1, [sp, #36] 2130 .LVL170: 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2131 .loc 4 1212 0 2132 01d0 049B ldr r3, [sp, #16] 2133 01d2 0A44 add r2, r2, r1 2134 01d4 0592 str r2, [sp, #20] 2135 01d6 0B99 ldr r1, [sp, #44] 2136 01d8 089A ldr r2, [sp, #32] 2137 01da 0A44 add r2, r2, r1 2138 01dc 0892 str r2, [sp, #32] 2139 01de 0D99 ldr r1, [sp, #52] 2140 01e0 079A ldr r2, [sp, #28] 2141 01e2 0A44 add r2, r2, r1 2142 01e4 0792 str r2, [sp, #28] 2143 01e6 069A ldr r2, [sp, #24] 2144 01e8 0432 adds r2, r2, #4 2145 01ea 0692 str r2, [sp, #24] 2146 01ec 0C9A ldr r2, [sp, #48] 2147 01ee 0133 adds r3, r3, #1 2148 01f0 9342 cmp r3, r2 2149 01f2 0493 str r3, [sp, #16] 2150 .LVL171: 2151 01f4 94D3 bcc .L150 2152 01f6 0E9A ldr r2, [sp, #56] 2153 01f8 0292 str r2, [sp, #8] 2154 .LVL172: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2155 .loc 4 1205 0 2156 01fa 042A cmp r2, #4 1338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ ARM GAS /tmp/ccfbYRip.s page 134 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 2157 .loc 4 1341 0 2158 01fc 099B ldr r3, [sp, #36] 2159 .LVL173: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2160 .loc 4 1205 0 2161 01fe 3FF674AF bhi .L151 2162 0202 119E ldr r6, [sp, #68] 2163 .LVL174: 2164 0204 0F9B ldr r3, [sp, #60] 2165 .LVL175: 2166 .L152: 2167 .LBB1150: 2168 .LBB1151: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2169 .loc 6 928 0 2170 0206 1A68 ldr r2, [r3] @ unaligned 2171 .LVL176: 2172 .LBE1151: 2173 .LBE1150: 2174 .LBB1152: 2175 .LBB1153: 2176 0208 5968 ldr r1, [r3, #4] @ unaligned 2177 .LVL177: 2178 .LBE1153: 2179 .LBE1152: 2180 .LBB1154: 2181 .LBB1155: 2182 020a 9F68 ldr r7, [r3, #8] @ unaligned 2183 .LVL178: 2184 .LBE1155: 2185 .LBE1154: 2186 .LBB1156: 2187 .LBB1157: 2188 020c DC68 ldr r4, [r3, #12] @ unaligned 2189 .LVL179: 2190 .LBE1157: 2191 .LBE1156: 2192 .LBB1158: 2193 .LBB1159: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2194 .loc 5 1731 0 2195 .syntax unified 2196 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2197 020e 92FA17F0 qadd16 r0, r2, r7 2198 @ 0 "" 2 2199 .LVL180: 2200 .thumb 2201 .syntax unified 2202 .LBE1159: 2203 .LBE1158: 2204 .LBB1160: 2205 .LBB1161: 2206 .syntax unified 2207 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2208 0212 91FA14F5 qadd16 r5, r1, r4 2209 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 135 2210 .LVL181: 2211 .thumb 2212 .syntax unified 2213 .LBE1161: 2214 .LBE1160: 2215 .LBB1162: 2216 .LBB1163: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2217 .loc 5 1739 0 2218 .syntax unified 2219 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2220 0216 90FA25F5 shadd16 r5, r0, r5 2221 @ 0 "" 2 2222 .LVL182: 2223 .thumb 2224 .syntax unified 2225 .LBE1163: 2226 .LBE1162: 2227 .LBB1164: 2228 .LBB1165: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2229 .loc 6 969 0 2230 021a 1D60 str r5, [r3] @ unaligned 2231 .LVL183: 2232 .LBE1165: 2233 .LBE1164: 2234 .LBB1166: 2235 .LBB1167: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2236 .loc 5 1731 0 2237 .syntax unified 2238 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2239 021c 91FA14F5 qadd16 r5, r1, r4 2240 @ 0 "" 2 2241 .LVL184: 2242 .thumb 2243 .syntax unified 2244 .LBE1167: 2245 .LBE1166: 2246 .LBB1168: 2247 .LBB1169: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2248 .loc 5 1787 0 2249 .syntax unified 2250 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2251 0220 D0FA25F0 shsub16 r0, r0, r5 2252 @ 0 "" 2 2253 .LVL185: 2254 .thumb 2255 .syntax unified 2256 .LBE1169: 2257 .LBE1168: 2258 .LBB1170: 2259 .LBB1171: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2260 .loc 6 969 0 2261 0224 5860 str r0, [r3, #4] @ unaligned ARM GAS /tmp/ccfbYRip.s page 136 2262 .LVL186: 2263 .LBE1171: 2264 .LBE1170: 2265 .LBB1172: 2266 .LBB1173: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2267 .loc 5 1779 0 2268 .syntax unified 2269 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2270 0226 D2FA17F2 qsub16 r2, r2, r7 2271 @ 0 "" 2 2272 .LVL187: 2273 .thumb 2274 .syntax unified 2275 .LBE1173: 2276 .LBE1172: 2277 .LBB1174: 2278 .LBB1175: 2279 .syntax unified 2280 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2281 022a D1FA14F1 qsub16 r1, r1, r4 2282 @ 0 "" 2 2283 .LVL188: 2284 .thumb 2285 .syntax unified 2286 .LBE1175: 2287 .LBE1174: 2288 .LBB1176: 2289 .LBB1177: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2290 .loc 5 1835 0 2291 .syntax unified 2292 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2293 022e A2FA21F0 shasx r0, r2, r1 2294 @ 0 "" 2 2295 .LVL189: 2296 .thumb 2297 .syntax unified 2298 .LBE1177: 2299 .LBE1176: 2300 .LBB1178: 2301 .LBB1179: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2302 .loc 6 969 0 2303 0232 9860 str r0, [r3, #8] @ unaligned 2304 .LVL190: 2305 .LBE1179: 2306 .LBE1178: 2307 .LBB1180: 2308 .LBB1181: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2309 .loc 5 1883 0 2310 .syntax unified 2311 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2312 0234 E2FA21F2 shsax r2, r2, r1 2313 @ 0 "" 2 2314 .LVL191: ARM GAS /tmp/ccfbYRip.s page 137 2315 .thumb 2316 .syntax unified 2317 .LBE1181: 2318 .LBE1180: 1342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of middle stage process */ 1344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 10.6(q6) format for the 1024 point */ 1346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 8.8(q8) format for the 256 point */ 1347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 6.10(q10) format for the 64 point */ 1348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.12(q12) format for the 16 point */ 1349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the last stage */ 1351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = fftLen >> 2; 1352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ptr1 = &pSrc16[0]; 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of last stage process */ 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 1359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xa (real), ya(imag) input */ 1361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xaya = read_q15x2_ia ((q15_t **) &ptr1); 1362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xb (real), yb(imag) input */ 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xbyb = read_q15x2_ia ((q15_t **) &ptr1); 1365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xc (real), yc(imag) input */ 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xcyc = read_q15x2_ia ((q15_t **) &ptr1); 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read xd (real), yd(imag) input */ 1370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** xdyd = read_q15x2_ia ((q15_t **) &ptr1); 1371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R = packed((ya + yc), (xa + xc)) */ 1373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R = __QADD16(xaya, xcyc); 1374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd)) */ 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(xbyb, xdyd); 1377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pointer updation for writing */ 1379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ptr1 = ptr1 - 8U; 1380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHADD16(R, T)); 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed((yb + yd), (xb + xd)) */ 1387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T = __QADD16(xbyb, xdyd); 1388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd) */ 1390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd) */ 1391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSUB16(R, T)); 1392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = packed((ya - yc), (xa - xc)) */ 1394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S = __QSUB16(xaya, xcyc); ARM GAS /tmp/ccfbYRip.s page 138 1395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T = packed( (yb - yd), (xb - xd)) */ 1398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U = __QSUB16(xbyb, xdyd); 1399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 1401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd) */ 1402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd) */ 1403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHASX(S, U)); 1404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd) */ 1406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd) */ 1407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSAX(S, U)); 1408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else 1409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa+yb-xc-yd) */ 1410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya-xb-yc+xd) */ 1411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHSAX(S, U)); 1412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa-yb-xc+yd) */ 1414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya+xb-yc-xd) */ 1415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** write_q15x2_ia (&ptr1, __SHASX(S, U)); 1416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 1417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 2319 .loc 4 1418 0 2320 0238 013E subs r6, r6, #1 2321 .LVL192: 2322 .LBB1182: 2323 .LBB1183: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2324 .loc 6 969 0 2325 023a DA60 str r2, [r3, #12] @ unaligned 2326 023c 03F11003 add r3, r3, #16 2327 .LVL193: 2328 .LBE1183: 2329 .LBE1182: 2330 .loc 4 1418 0 2331 0240 E1D1 bne .L152 1419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of last stage process */ 1421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 11.5(q5) format for the 1024 point */ 1423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 9.7(q7) format for the 256 point */ 1424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 7.9(q9) format for the 64 point */ 1425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 5.11(q11) format for the 16 point */ 1426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #else /* arm_radix4_butterfly_inverse_q15 */ 1429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t R0, R1, S0, S1, T0, T1, U0, U1; 1431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; 1432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; 1433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Total process is divided into three stages */ 1435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* process first stage, middle stages, & last stage */ 1437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 139 1438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the first stage */ 1439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 = fftLen; 1440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 1441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* n2 = fftLen/4 */ 1443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 1444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for twiddle coefficient */ 1446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Index for input read and output write */ 1449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i0 = 0U; 1450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** j = n2; 1452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Input is in 1.15(q15) format */ 1454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Start of first stage process */ 1456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** do 1457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 1461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ 1462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 1463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 1464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 1465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 1467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 1469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U] >> 2U; 1470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U] >> 2U; 1471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 1473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U] >> 2U; 1474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U] >> 2U; 1475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc), R1 = (xa + xc) */ 1477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16U); 1478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16U); 1479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc), S1 = (xa - xc) */ 1480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16U); 1481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16U); 1482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 1484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U] >> 2U; 1487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; 1488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U] >> 2U; 1491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U] >> 2U; 1492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd), T1 = (xb + xd) */ 1494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16U); ARM GAS /tmp/ccfbYRip.s page 140 1495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16U); 1496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 1498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); 1501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); 1502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */ 1504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(R0 - T0, 16U); 1505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(R1 - T1, 16U); 1506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co2 & si2 are read from Coefficient pointer */ 1507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co2 = pCoef16[2U * ic * 2U]; 1508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si2 = pCoef16[(2U * ic * 2U) + 1U]; 1509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ 1510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16U); 1511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ 1512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16U); 1513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 */ 1515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb, T1 = xb */ 1517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U] >> 2U; 1518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; 1519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 1521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xc', yc') in little endian format */ 1522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = out1; 1523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1U] = out2; 1524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 1526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* input is down scale by 4 to avoid overflow */ 1527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* U0 = yd, U1 = xd) */ 1528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U] >> 2U; 1529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U] >> 2U; 1530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb-yd, T1 = xb-xd) */ 1532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16U); 1533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16U); 1534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ 1535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16); 1536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16); 1537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ 1538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16); 1539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16); 1540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* co1 & si1 are read from Coefficient pointer */ 1542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co1 = pCoef16[ic * 2U]; 1543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si1 = pCoef16[(ic * 2U) + 1U]; 1544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 1545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ 1546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U); 1547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ 1548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U); 1549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xb', yb') in little endian format */ 1550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = out1; 1551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1U] = out2; ARM GAS /tmp/ccfbYRip.s page 141 1552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Co3 & si3 are read from Coefficient pointer */ 1554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co3 = pCoef16[3U * ic * 2U]; 1555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si3 = pCoef16[(3U * ic * 2U) + 1U]; 1556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 1557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ 1558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U); 1559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ 1560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U); 1561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing output(xd', yd') in little endian format */ 1562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = out1; 1563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1U] = out2; 1564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 1567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Updating input index */ 1569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i0 = i0 + 1U; 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } while (--j); 1572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* End of first stage process */ 1574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 1576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Start of Middle stage process */ 1579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 1582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Calculation of Middle stage */ 1584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 1585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the middle stage */ 1587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 1588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; 1589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 1590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (j = 0U; j <= (n2 - 1U); j++) 1592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the coefficients */ 1594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co1 = pCoef16[ic * 2U]; 1595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si1 = pCoef16[(ic * 2U) + 1U]; 1596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co2 = pCoef16[2U * ic * 2U]; 1597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si2 = pCoef16[2U * ic * 2U + 1U]; 1598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Co3 = pCoef16[3U * ic * 2U]; 1599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** Si3 = pCoef16[(3U * ic * 2U) + 1U]; 1600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = ic + twidCoefModifier; 1603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = j; i0 < fftLen; i0 += n1) 1606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 1608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ ARM GAS /tmp/ccfbYRip.s page 142 1609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 1610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 1611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 1612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 1614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 1615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U]; 1616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U]; 1617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 1619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U]; 1620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U]; 1621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc), R1 = (xa + xc) */ 1624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16U); 1625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16U); 1626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc), S1 = (xa - xc) */ 1627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16U); 1628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16U); 1629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 1631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 1633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 1634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 1637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 1638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd), T1 = (xb + xd) */ 1640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16U); 1641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16U); 1642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 1644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U; 1647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U; 1648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ 1650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (R0 >> 1U) - (T0 >> 1U); 1651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (R1 >> 1U) - (T1 >> 1U); 1652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */ 1654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16); 1655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ 1656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16); 1657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+3fftLen/4 */ 1659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 1661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 1662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 1664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ 1665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ ARM GAS /tmp/ccfbYRip.s page 143 1666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = out1; 1667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1U] = out2; 1668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly calculations */ 1670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 1672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 1673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = yb-yd, T1 = xb-xd) */ 1675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16U); 1676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16U); 1677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ 1679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (S0 >> 1U) + (T1 >> 1U); 1680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (S1 >> 1U) - (T0 >> 1U); 1681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ 1683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = (S0 >> 1U) - (T1 >> 1U); 1684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = (S1 >> 1U) + (T0 >> 1U); 1685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+fftLen/2 sample */ 1687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U); 1688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U); 1689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ 1690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ 1691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = out1; 1692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1U] = out2; 1693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly process for the i0+3fftLen/4 sample */ 1695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U); 1696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U); 1698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ 1699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ 1700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = out1; 1701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1U] = out2; 1702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Twiddle coefficients index modifier */ 1707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** twidCoefModifier <<= 2U; 1708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* End of Middle stages process */ 1710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 10.6(q6) format for the 1024 point */ 1713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 8.8(q8) format for the 256 point */ 1714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 6.10(q10) format for the 64 point */ 1715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.12(q12) format for the 16 point */ 1716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* start of last stage process */ 1718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Initializations for the last stage */ 1721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n1 = n2; 1722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** n2 >>= 2U; ARM GAS /tmp/ccfbYRip.s page 144 1723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Butterfly implementation */ 1725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) 1726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 1727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* index calculation for the input as, */ 1728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ 1729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i1 = i0 + n2; 1730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i2 = i1 + n2; 1731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** i3 = i2 + n2; 1732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0, i0+fftLen/2 inputs */ 1734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read ya (real), xa(imag) input */ 1735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i0 * 2U]; 1736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i0 * 2U) + 1U]; 1737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yc (real), xc(imag) input */ 1738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = pSrc16[i2 * 2U]; 1739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = pSrc16[(i2 * 2U) + 1U]; 1740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc), R1 = (xa + xc) */ 1742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = __SSAT(T0 + S0, 16U); 1743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = __SSAT(T1 + S1, 16U); 1744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* S0 = (ya - yc), S1 = (xa - xc) */ 1745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S0 = __SSAT(T0 - S0, 16U); 1746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** S1 = __SSAT(T1 - S1, 16U); 1747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ 1749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 1751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 1752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 1754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 1755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb + yd), T1 = (xb + xd) */ 1757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 + U0, 16U); 1758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 + U1, 16U); 1759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 sample */ 1761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xa' = xa + xb + xc + xd */ 1762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* ya' = ya + yb + yc + yd */ 1763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); 1764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); 1765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ 1767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R0 = (R0 >> 1U) - (T0 >> 1U); 1768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** R1 = (R1 >> 1U) - (T1 >> 1U); 1769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yb (real), xb(imag) input */ 1771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = pSrc16[i1 * 2U]; 1772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = pSrc16[(i1 * 2U) + 1U]; 1773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/4 sample */ 1775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xc' = (xa-xb+xc-xd) */ 1776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yc' = (ya-yb+yc-yd) */ 1777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i1 * 2U] = R0; 1778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i1 * 2U) + 1U] = R1; 1779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 145 1780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* Read yd (real), xd(imag) input */ 1781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U0 = pSrc16[i3 * 2U]; 1782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** U1 = pSrc16[(i3 * 2U) + 1U]; 1783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* T0 = (yb - yd), T1 = (xb - xd) */ 1784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T0 = __SSAT(T0 - U0, 16U); 1785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** T1 = __SSAT(T1 - U1, 16U); 1786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + fftLen/2 sample */ 1788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xb' = (xa-yb-xc+yd) */ 1789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yb' = (ya+xb-yc-xd) */ 1790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U); 1791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U); 1792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* writing the butterfly processed i0 + 3fftLen/4 sample */ 1795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* xd' = (xa+yb-xc-yd) */ 1796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* yd' = (ya-xb-yc+xd) */ 1797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U); 1798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U); 1799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 1800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* end of last stage process */ 1801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 11.5(q5) format for the 1024 point */ 1803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 9.7(q7) format for the 256 point */ 1804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 7.9(q9) format for the 64 point */ 1805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* output is in 5.11(q11) format for the 16 point */ 1806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 1808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 1809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 2332 .loc 4 1809 0 2333 0242 13B0 add sp, sp, #76 2334 .LCFI34: 2335 .cfi_remember_state 2336 .cfi_def_cfa_offset 36 2337 @ sp needed 2338 0244 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 2339 .LVL194: 2340 .L158: 2341 .LCFI35: 2342 .cfi_restore_state 2343 0248 1E46 mov r6, r3 2344 .LVL195: 2345 024a 0F9B ldr r3, [sp, #60] 2346 .LVL196: 2347 024c DBE7 b .L152 2348 .L161: 2349 024e 00BF .align 2 2350 .L160: 2351 0250 0000FFFF .word -65536 2352 .cfi_endproc 2353 .LFE241: 2355 .section .text.arm_radix4_butterfly_q15.constprop.2,"ax",%progbits 2356 .align 1 2357 .p2align 2,,3 2358 .syntax unified 2359 .thumb ARM GAS /tmp/ccfbYRip.s page 146 2360 .thumb_func 2361 .fpu fpv4-sp-d16 2363 arm_radix4_butterfly_q15.constprop.2: 2364 .LFB240: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 2365 .loc 4 147 0 2366 .cfi_startproc 2367 @ args = 0, pretend = 0, frame = 72 2368 @ frame_needed = 0, uses_anonymous_args = 0 2369 .LVL197: 2370 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 2371 .LCFI36: 2372 .cfi_def_cfa_offset 36 2373 .cfi_offset 4, -36 2374 .cfi_offset 5, -32 2375 .cfi_offset 6, -28 2376 .cfi_offset 7, -24 2377 .cfi_offset 8, -20 2378 .cfi_offset 9, -16 2379 .cfi_offset 10, -12 2380 .cfi_offset 11, -8 2381 .cfi_offset 14, -4 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2382 .loc 4 177 0 2383 0004 8B08 lsrs r3, r1, #2 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 2384 .loc 4 186 0 2385 0006 9C00 lsls r4, r3, #2 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 2386 .loc 4 147 0 2387 0008 93B0 sub sp, sp, #76 2388 .LCFI37: 2389 .cfi_def_cfa_offset 112 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 2390 .loc 4 186 0 2391 000a 00EB040B add fp, r0, r4 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 2392 .loc 4 187 0 2393 000e 0BEB0407 add r7, fp, r4 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2394 .loc 4 263 0 2395 0012 DFF83CC2 ldr ip, .L176 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 2396 .loc 4 147 0 2397 0016 0F90 str r0, [sp, #60] 2398 0018 0546 mov r5, r0 2399 001a 0391 str r1, [sp, #12] 2400 .LVL198: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2401 .loc 4 177 0 2402 001c 1193 str r3, [sp, #68] 2403 .LVL199: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** q15_t * pSrc16, 2404 .loc 4 147 0 2405 001e 9246 mov r10, r2 2406 0020 1092 str r2, [sp, #64] 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 147 2407 .loc 4 188 0 2408 0022 3C44 add r4, r4, r7 2409 .LVL200: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 2410 .loc 4 186 0 2411 0024 5E46 mov r6, fp 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2412 .loc 4 188 0 2413 0026 9046 mov r8, r2 2414 0028 9646 mov lr, r2 2415 .LBB1184: 2416 .LBB1185: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2417 .loc 5 1739 0 2418 002a 0020 movs r0, #0 2419 .LVL201: 2420 .L163: 2421 .LBE1185: 2422 .LBE1184: 2423 .LBB1187: 2424 .LBB1188: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2425 .loc 6 909 0 2426 002c 2B68 ldr r3, [r5] @ unaligned 2427 .LBE1188: 2428 .LBE1187: 2429 .LBB1189: 2430 .LBB1186: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2431 .loc 5 1739 0 2432 .syntax unified 2433 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2434 002e 93FA20F3 shadd16 r3, r3, r0 2435 @ 0 "" 2 2436 .LVL202: 2437 .thumb 2438 .syntax unified 2439 .LBE1186: 2440 .LBE1189: 2441 .LBB1190: 2442 .LBB1191: 2443 .syntax unified 2444 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2445 0032 93FA20F2 shadd16 r2, r3, r0 2446 @ 0 "" 2 2447 .LVL203: 2448 .thumb 2449 .syntax unified 2450 .LBE1191: 2451 .LBE1190: 2452 .LBB1192: 2453 .LBB1193: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2454 .loc 6 909 0 2455 0036 3B68 ldr r3, [r7] @ unaligned 2456 .LBE1193: 2457 .LBE1192: ARM GAS /tmp/ccfbYRip.s page 148 2458 .LBB1194: 2459 .LBB1195: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2460 .loc 5 1739 0 2461 .syntax unified 2462 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2463 0038 93FA20F3 shadd16 r3, r3, r0 2464 @ 0 "" 2 2465 .LVL204: 2466 .thumb 2467 .syntax unified 2468 .LBE1195: 2469 .LBE1194: 2470 .LBB1196: 2471 .LBB1197: 2472 .syntax unified 2473 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2474 003c 93FA20F3 shadd16 r3, r3, r0 2475 @ 0 "" 2 2476 .LVL205: 2477 .thumb 2478 .syntax unified 2479 .LBE1197: 2480 .LBE1196: 2481 .LBB1198: 2482 .LBB1199: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2483 .loc 5 1731 0 2484 .syntax unified 2485 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2486 0040 92FA13F1 qadd16 r1, r2, r3 2487 @ 0 "" 2 2488 .LVL206: 2489 .thumb 2490 .syntax unified 2491 .LBE1199: 2492 .LBE1198: 2493 .LBB1200: 2494 .LBB1201: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2495 .loc 5 1779 0 2496 .syntax unified 2497 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2498 0044 D2FA13F3 qsub16 r3, r2, r3 2499 @ 0 "" 2 2500 .LVL207: 2501 .thumb 2502 .syntax unified 2503 .LBE1201: 2504 .LBE1200: 2505 .LBB1202: 2506 .LBB1203: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2507 .loc 6 909 0 2508 0048 3268 ldr r2, [r6] @ unaligned 2509 .LBE1203: 2510 .LBE1202: ARM GAS /tmp/ccfbYRip.s page 149 2511 .LBB1204: 2512 .LBB1205: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2513 .loc 5 1739 0 2514 .syntax unified 2515 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2516 004a 92FA20F2 shadd16 r2, r2, r0 2517 @ 0 "" 2 2518 .LVL208: 2519 .thumb 2520 .syntax unified 2521 .LBE1205: 2522 .LBE1204: 2523 .LBB1206: 2524 .LBB1207: 2525 .syntax unified 2526 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2527 004e 92FA20F2 shadd16 r2, r2, r0 2528 @ 0 "" 2 2529 .LVL209: 2530 .thumb 2531 .syntax unified 2532 .LBE1207: 2533 .LBE1206: 2534 .LBB1208: 2535 .LBB1209: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2536 .loc 6 909 0 2537 0052 D4F80090 ldr r9, [r4] @ unaligned 2538 .LBE1209: 2539 .LBE1208: 2540 .LBB1210: 2541 .LBB1211: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2542 .loc 5 1739 0 2543 .syntax unified 2544 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2545 0056 99FA20F9 shadd16 r9, r9, r0 2546 @ 0 "" 2 2547 .LVL210: 2548 .thumb 2549 .syntax unified 2550 .LBE1211: 2551 .LBE1210: 2552 .LBB1212: 2553 .LBB1213: 2554 .syntax unified 2555 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2556 005a 99FA20F9 shadd16 r9, r9, r0 2557 @ 0 "" 2 2558 .LVL211: 2559 .thumb 2560 .syntax unified 2561 .LBE1213: 2562 .LBE1212: 2563 .LBB1214: 2564 .LBB1215: ARM GAS /tmp/ccfbYRip.s page 150 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2565 .loc 5 1731 0 2566 .syntax unified 2567 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2568 005e 92FA19F2 qadd16 r2, r2, r9 2569 @ 0 "" 2 2570 .LVL212: 2571 .thumb 2572 .syntax unified 2573 .LBE1215: 2574 .LBE1214: 2575 .LBB1216: 2576 .LBB1217: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2577 .loc 5 1739 0 2578 .syntax unified 2579 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2580 0062 91FA22F9 shadd16 r9, r1, r2 2581 @ 0 "" 2 2582 .LVL213: 2583 .thumb 2584 .syntax unified 2585 .LBE1217: 2586 .LBE1216: 2587 .LBB1218: 2588 .LBB1219: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2589 .loc 6 969 0 2590 0066 45F8049B str r9, [r5], #4 @ unaligned 2591 .LVL214: 2592 .LBE1219: 2593 .LBE1218: 2594 .LBB1220: 2595 .LBB1221: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2596 .loc 5 1779 0 2597 .syntax unified 2598 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2599 006a D1FA12F1 qsub16 r1, r1, r2 2600 @ 0 "" 2 2601 .LVL215: 2602 .thumb 2603 .syntax unified 2604 .LBE1221: 2605 .LBE1220: 2606 .LBB1222: 2607 .LBB1223: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2608 .loc 6 909 0 2609 006e 5AF8102B ldr r2, [r10], #16 @ unaligned 2610 .LVL216: 2611 .LBE1223: 2612 .LBE1222: 2613 .LBB1224: 2614 .LBB1225: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2615 .loc 5 1977 0 ARM GAS /tmp/ccfbYRip.s page 151 2616 .syntax unified 2617 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2618 0072 22FB01F9 smuad r9, r2, r1 2619 @ 0 "" 2 2620 .LVL217: 2621 .thumb 2622 .syntax unified 2623 .LBE1225: 2624 .LBE1224: 2625 .LBB1226: 2626 .LBB1227: 2044:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2045:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2046:Drivers/CMSIS/Include/cmsis_gcc.h **** 2047:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) 2048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2049:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2050:Drivers/CMSIS/Include/cmsis_gcc.h **** 2051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 2627 .loc 5 2051 0 2628 .syntax unified 2629 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2630 0076 42FB11F1 smusdx r1, r2, r1 2631 @ 0 "" 2 2632 .LVL218: 2633 .thumb 2634 .syntax unified 2635 .LBE1227: 2636 .LBE1226: 2637 .LBB1228: 2638 .LBB1229: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2639 .loc 6 909 0 2640 007a 3268 ldr r2, [r6] @ unaligned 2641 .LBE1229: 2642 .LBE1228: 2643 .LBB1230: 2644 .LBB1231: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2645 .loc 5 1739 0 2646 .syntax unified 2647 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2648 007c 92FA20F2 shadd16 r2, r2, r0 2649 @ 0 "" 2 2650 .LVL219: 2651 .thumb 2652 .syntax unified 2653 .LBE1231: 2654 .LBE1230: 2655 .LBB1232: 2656 .LBB1233: 2657 .syntax unified 2658 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2659 0080 92FA20F2 shadd16 r2, r2, r0 2660 @ 0 "" 2 2661 .LVL220: 2662 .thumb ARM GAS /tmp/ccfbYRip.s page 152 2663 .syntax unified 2664 .LBE1233: 2665 .LBE1232: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2666 .loc 4 263 0 2667 0084 01EA0C01 and r1, r1, ip 2668 .LVL221: 2669 0088 41EA1941 orr r1, r1, r9, lsr #16 2670 .LBB1234: 2671 .LBB1235: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2672 .loc 6 969 0 2673 008c 46F8041B str r1, [r6], #4 @ unaligned 2674 .LVL222: 2675 .LBE1235: 2676 .LBE1234: 2677 .LBB1236: 2678 .LBB1237: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2679 .loc 6 909 0 2680 0090 2168 ldr r1, [r4] @ unaligned 2681 .LBE1237: 2682 .LBE1236: 2683 .LBB1238: 2684 .LBB1239: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2685 .loc 5 1739 0 2686 .syntax unified 2687 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2688 0092 91FA20F1 shadd16 r1, r1, r0 2689 @ 0 "" 2 2690 .LVL223: 2691 .thumb 2692 .syntax unified 2693 .LBE1239: 2694 .LBE1238: 2695 .LBB1240: 2696 .LBB1241: 2697 .syntax unified 2698 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2699 0096 91FA20F1 shadd16 r1, r1, r0 2700 @ 0 "" 2 2701 .LVL224: 2702 .thumb 2703 .syntax unified 2704 .LBE1241: 2705 .LBE1240: 2706 .LBB1242: 2707 .LBB1243: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2708 .loc 5 1779 0 2709 .syntax unified 2710 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2711 009a D2FA11F2 qsub16 r2, r2, r1 2712 @ 0 "" 2 2713 .LVL225: 2714 .thumb ARM GAS /tmp/ccfbYRip.s page 153 2715 .syntax unified 2716 .LBE1243: 2717 .LBE1242: 2718 .LBB1244: 2719 .LBB1245: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2720 .loc 5 1827 0 2721 .syntax unified 2722 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2723 009e A3FA12F1 qasx r1, r3, r2 2724 @ 0 "" 2 2725 .LVL226: 2726 .thumb 2727 .syntax unified 2728 .LBE1245: 2729 .LBE1244: 2730 .LBB1246: 2731 .LBB1247: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2732 .loc 5 1875 0 2733 .syntax unified 2734 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2735 00a2 E3FA12F3 qsax r3, r3, r2 2736 @ 0 "" 2 2737 .LVL227: 2738 .thumb 2739 .syntax unified 2740 .LBE1247: 2741 .LBE1246: 2742 .LBB1248: 2743 .LBB1249: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2744 .loc 6 909 0 2745 00a6 5EF8082B ldr r2, [lr], #8 @ unaligned 2746 .LVL228: 2747 .LBE1249: 2748 .LBE1248: 2749 .LBB1250: 2750 .LBB1251: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2751 .loc 5 1977 0 2752 .syntax unified 2753 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2754 00aa 22FB03F9 smuad r9, r2, r3 2755 @ 0 "" 2 2756 .LVL229: 2757 .thumb 2758 .syntax unified 2759 .LBE1251: 2760 .LBE1250: 2761 .LBB1252: 2762 .LBB1253: 2763 .loc 5 2051 0 2764 .syntax unified 2765 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2766 00ae 42FB13F3 smusdx r3, r2, r3 2767 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 154 2768 .LVL230: 2769 .thumb 2770 .syntax unified 2771 .LBE1253: 2772 .LBE1252: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2773 .loc 4 303 0 2774 00b2 03EA0C03 and r3, r3, ip 2775 .LVL231: 2776 00b6 43EA1943 orr r3, r3, r9, lsr #16 2777 .LBB1254: 2778 .LBB1255: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2779 .loc 6 969 0 2780 00ba 47F8043B str r3, [r7], #4 @ unaligned 2781 .LVL232: 2782 .LBE1255: 2783 .LBE1254: 2784 .LBB1256: 2785 .LBB1257: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2786 .loc 6 909 0 2787 00be 58F8183B ldr r3, [r8], #24 @ unaligned 2788 .LVL233: 2789 .LBE1257: 2790 .LBE1256: 2791 .LBB1258: 2792 .LBB1259: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2793 .loc 5 1977 0 2794 .syntax unified 2795 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2796 00c2 23FB01F2 smuad r2, r3, r1 2797 @ 0 "" 2 2798 .LVL234: 2799 .thumb 2800 .syntax unified 2801 .LBE1259: 2802 .LBE1258: 2803 .LBB1260: 2804 .LBB1261: 2805 .loc 5 2051 0 2806 .syntax unified 2807 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2808 00c6 43FB11F3 smusdx r3, r3, r1 2809 @ 0 "" 2 2810 .LVL235: 2811 .thumb 2812 .syntax unified 2813 .LBE1261: 2814 .LBE1260: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2815 .loc 4 322 0 2816 00ca 03EA0C03 and r3, r3, ip 2817 .LVL236: 2818 00ce 43EA1243 orr r3, r3, r2, lsr #16 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ ARM GAS /tmp/ccfbYRip.s page 155 2819 .loc 4 327 0 2820 00d2 AB45 cmp fp, r5 2821 .LBB1262: 2822 .LBB1263: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2823 .loc 6 969 0 2824 00d4 44F8043B str r3, [r4], #4 @ unaligned 2825 .LVL237: 2826 .LBE1263: 2827 .LBE1262: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 2828 .loc 4 327 0 2829 00d8 A8D1 bne .L163 2830 .LVL238: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2831 .loc 4 339 0 2832 00da 119B ldr r3, [sp, #68] 2833 00dc 042B cmp r3, #4 2834 00de 40F2B380 bls .L174 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 2835 .loc 4 420 0 2836 00e2 DFF86CB1 ldr fp, .L176 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2837 .loc 4 339 0 2838 00e6 0293 str r3, [sp, #8] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2839 .loc 4 336 0 2840 00e8 0823 movs r3, #8 2841 .LVL239: 2842 .L167: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 2843 .loc 4 343 0 2844 00ea 0298 ldr r0, [sp, #8] 2845 00ec 03EB4302 add r2, r3, r3, lsl #1 2846 00f0 8108 lsrs r1, r0, #2 2847 00f2 9200 lsls r2, r2, #2 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 2848 .loc 4 357 0 2849 00f4 8C00 lsls r4, r1, #2 2850 .LVL240: 2851 00f6 0D92 str r2, [sp, #52] 2852 00f8 9A00 lsls r2, r3, #2 2853 00fa DB00 lsls r3, r3, #3 2854 .LVL241: 2855 00fc 0A94 str r4, [sp, #40] 2856 00fe 0B93 str r3, [sp, #44] 2857 0100 039C ldr r4, [sp, #12] 2858 0102 0F9B ldr r3, [sp, #60] 2859 0104 0693 str r3, [sp, #24] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2860 .loc 4 394 0 2861 0106 109B ldr r3, [sp, #64] 2862 0108 0593 str r3, [sp, #20] 2863 010a 8C42 cmp r4, r1 2864 010c 28BF it cs 2865 010e 0C46 movcs r4, r1 2866 0110 CDE90733 strd r3, r3, [sp, #28] ARM GAS /tmp/ccfbYRip.s page 156 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2867 .loc 4 346 0 2868 0114 0023 movs r3, #0 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 2869 .loc 4 343 0 2870 0116 0E91 str r1, [sp, #56] 2871 .LVL242: 2872 0118 0C94 str r4, [sp, #48] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 2873 .loc 4 394 0 2874 011a 8700 lsls r7, r0, #2 2875 011c 0992 str r2, [sp, #36] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 2876 .loc 4 346 0 2877 011e 0493 str r3, [sp, #16] 2878 .LVL243: 2879 .L166: 2880 .LBB1264: 2881 .LBB1265: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2882 .loc 6 909 0 2883 0120 059A ldr r2, [sp, #20] 2884 0122 0A9B ldr r3, [sp, #40] 2885 0124 D2F800A0 ldr r10, [r2] @ unaligned 2886 .LVL244: 2887 .LBE1265: 2888 .LBE1264: 2889 .LBB1266: 2890 .LBB1267: 2891 0128 089A ldr r2, [sp, #32] 2892 012a 069E ldr r6, [sp, #24] 2893 012c D2F80090 ldr r9, [r2] @ unaligned 2894 .LVL245: 2895 .LBE1267: 2896 .LBE1266: 2897 .LBB1268: 2898 .LBB1269: 2899 0130 079A ldr r2, [sp, #28] 2900 .LBE1269: 2901 .LBE1268: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 2902 .loc 4 356 0 2903 0132 DDF810E0 ldr lr, [sp, #16] 2904 .LBB1271: 2905 .LBB1270: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2906 .loc 6 909 0 2907 0136 D2F80080 ldr r8, [r2] @ unaligned 2908 .LVL246: 2909 .LBE1270: 2910 .LBE1271: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 2911 .loc 4 356 0 2912 013a CDF804E0 str lr, [sp, #4] 2913 013e 9819 adds r0, r3, r6 2914 0140 1D18 adds r5, r3, r0 2915 0142 5C19 adds r4, r3, r5 ARM GAS /tmp/ccfbYRip.s page 157 2916 .LVL247: 2917 .L165: 2918 .LBB1272: 2919 .LBB1273: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2920 .loc 6 909 0 2921 0144 3268 ldr r2, [r6] @ unaligned 2922 .LVL248: 2923 .LBE1273: 2924 .LBE1272: 2925 .LBB1274: 2926 .LBB1275: 2927 0146 2968 ldr r1, [r5] @ unaligned 2928 .LVL249: 2929 .LBE1275: 2930 .LBE1274: 2931 .LBB1276: 2932 .LBB1277: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2933 .loc 5 1731 0 2934 .syntax unified 2935 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2936 0148 92FA11F3 qadd16 r3, r2, r1 2937 @ 0 "" 2 2938 .LVL250: 2939 .thumb 2940 .syntax unified 2941 .LBE1277: 2942 .LBE1276: 2943 .LBB1278: 2944 .LBB1279: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2945 .loc 5 1779 0 2946 .syntax unified 2947 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2948 014c D2FA11F2 qsub16 r2, r2, r1 2949 @ 0 "" 2 2950 .LVL251: 2951 .thumb 2952 .syntax unified 2953 .LBE1279: 2954 .LBE1278: 2955 .LBB1280: 2956 .LBB1281: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2957 .loc 6 909 0 2958 0150 0168 ldr r1, [r0] @ unaligned 2959 .LBE1281: 2960 .LBE1280: 2961 .LBB1282: 2962 .LBB1283: 2963 0152 D4F800C0 ldr ip, [r4] @ unaligned 2964 .LBE1283: 2965 .LBE1282: 2966 .LBB1284: 2967 .LBB1285: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 158 2968 .loc 5 1731 0 2969 .syntax unified 2970 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2971 0156 91FA1CF1 qadd16 r1, r1, ip 2972 @ 0 "" 2 2973 .LVL252: 2974 .thumb 2975 .syntax unified 2976 .LBE1285: 2977 .LBE1284: 2978 .LBB1286: 2979 .LBB1287: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2980 .loc 5 1739 0 2981 .syntax unified 2982 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2983 015a 93FA21FC shadd16 ip, r3, r1 2984 @ 0 "" 2 2985 .LVL253: 2986 .thumb 2987 .syntax unified 2988 .LBE1287: 2989 .LBE1286: 2990 .LBB1288: 2991 .LBB1289: 2992 015e 4FF0000E mov lr, #0 2993 .syntax unified 2994 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2995 0162 9CFA2EFC shadd16 ip, ip, lr 2996 @ 0 "" 2 2997 .LVL254: 2998 .thumb 2999 .syntax unified 3000 .LBE1289: 3001 .LBE1288: 3002 .LBB1290: 3003 .LBB1291: 3004 .loc 6 991 0 3005 0166 C6F800C0 str ip, [r6] @ unaligned 3006 .LVL255: 3007 .LBE1291: 3008 .LBE1290: 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3009 .loc 4 394 0 3010 016a 3E44 add r6, r6, r7 3011 .LVL256: 3012 .LBB1292: 3013 .LBB1293: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3014 .loc 5 1787 0 3015 .syntax unified 3016 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3017 016c D3FA21F3 shsub16 r3, r3, r1 3018 @ 0 "" 2 3019 .LVL257: 3020 .thumb 3021 .syntax unified ARM GAS /tmp/ccfbYRip.s page 159 3022 .LBE1293: 3023 .LBE1292: 3024 .LBB1294: 3025 .LBB1295: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3026 .loc 5 1977 0 3027 .syntax unified 3028 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3029 0170 29FB03FC smuad ip, r9, r3 3030 @ 0 "" 2 3031 .LVL258: 3032 .thumb 3033 .syntax unified 3034 .LBE1295: 3035 .LBE1294: 3036 .LBB1296: 3037 .LBB1297: 3038 .loc 5 2051 0 3039 .syntax unified 3040 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3041 0174 49FB13F3 smusdx r3, r9, r3 3042 @ 0 "" 2 3043 .LVL259: 3044 .thumb 3045 .syntax unified 3046 .LBE1297: 3047 .LBE1296: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 3048 .loc 4 420 0 3049 0178 03EA0B03 and r3, r3, fp 3050 .LVL260: 3051 017c 43EA1C43 orr r3, r3, ip, lsr #16 3052 .LBB1298: 3053 .LBB1299: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3054 .loc 6 909 0 3055 0180 D0F800C0 ldr ip, [r0] @ unaligned 3056 .LVL261: 3057 .LBE1299: 3058 .LBE1298: 3059 .LBB1300: 3060 .LBB1301: 3061 .loc 6 991 0 3062 0184 0360 str r3, [r0] @ unaligned 3063 .LVL262: 3064 .LBE1301: 3065 .LBE1300: 3066 .LBB1302: 3067 .LBB1303: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3068 .loc 6 909 0 3069 0186 2168 ldr r1, [r4] @ unaligned 3070 .LBE1303: 3071 .LBE1302: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3072 .loc 4 421 0 3073 0188 3844 add r0, r0, r7 ARM GAS /tmp/ccfbYRip.s page 160 3074 .LVL263: 3075 .LBB1304: 3076 .LBB1305: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3077 .loc 5 1779 0 3078 .syntax unified 3079 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3080 018a DCFA11F1 qsub16 r1, ip, r1 3081 @ 0 "" 2 3082 .LVL264: 3083 .thumb 3084 .syntax unified 3085 .LBE1305: 3086 .LBE1304: 3087 .LBB1306: 3088 .LBB1307: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3089 .loc 5 1835 0 3090 .syntax unified 3091 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3092 018e A2FA21F3 shasx r3, r2, r1 3093 @ 0 "" 2 3094 .LVL265: 3095 .thumb 3096 .syntax unified 3097 .LBE1307: 3098 .LBE1306: 3099 .LBB1308: 3100 .LBB1309: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3101 .loc 5 1883 0 3102 .syntax unified 3103 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3104 0192 E2FA21F2 shsax r2, r2, r1 3105 @ 0 "" 2 3106 .LVL266: 3107 .thumb 3108 .syntax unified 3109 .LBE1309: 3110 .LBE1308: 3111 .LBB1310: 3112 .LBB1311: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3113 .loc 5 1977 0 3114 .syntax unified 3115 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3116 0196 2AFB02F1 smuad r1, r10, r2 3117 @ 0 "" 2 3118 .LVL267: 3119 .thumb 3120 .syntax unified 3121 .LBE1311: 3122 .LBE1310: 3123 .LBB1312: 3124 .LBB1313: 3125 .loc 5 2051 0 3126 .syntax unified ARM GAS /tmp/ccfbYRip.s page 161 3127 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3128 019a 4AFB12F2 smusdx r2, r10, r2 3129 @ 0 "" 2 3130 .LVL268: 3131 .thumb 3132 .syntax unified 3133 .LBE1313: 3134 .LBE1312: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 3135 .loc 4 457 0 3136 019e 02EA0B02 and r2, r2, fp 3137 .LVL269: 3138 01a2 42EA1142 orr r2, r2, r1, lsr #16 3139 .LBB1314: 3140 .LBB1315: 3141 .loc 6 991 0 3142 01a6 2A60 str r2, [r5] @ unaligned 3143 .LVL270: 3144 .LBE1315: 3145 .LBE1314: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3146 .loc 4 458 0 3147 01a8 3D44 add r5, r5, r7 3148 .LVL271: 3149 .LBB1316: 3150 .LBB1317: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3151 .loc 5 1977 0 3152 .syntax unified 3153 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3154 01aa 28FB03F2 smuad r2, r8, r3 3155 @ 0 "" 2 3156 .LVL272: 3157 .thumb 3158 .syntax unified 3159 .LBE1317: 3160 .LBE1316: 3161 .LBB1318: 3162 .LBB1319: 3163 .loc 5 2051 0 3164 .syntax unified 3165 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3166 01ae 48FB13F3 smusdx r3, r8, r3 3167 @ 0 "" 2 3168 .LVL273: 3169 .thumb 3170 .syntax unified 3171 .LBE1319: 3172 .LBE1318: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 3173 .loc 4 472 0 3174 01b2 03EA0B03 and r3, r3, fp 3175 .LVL274: 3176 01b6 43EA1243 orr r3, r3, r2, lsr #16 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3177 .loc 4 362 0 3178 01ba DDE90112 ldrd r1, r2, [sp, #4] ARM GAS /tmp/ccfbYRip.s page 162 3179 .LVL275: 3180 .LBB1320: 3181 .LBB1321: 3182 .loc 6 991 0 3183 01be 2360 str r3, [r4] @ unaligned 3184 .LVL276: 3185 .LBE1321: 3186 .LBE1320: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3187 .loc 4 362 0 3188 01c0 039B ldr r3, [sp, #12] 3189 01c2 1144 add r1, r1, r2 3190 01c4 8B42 cmp r3, r1 3191 01c6 0191 str r1, [sp, #4] 3192 .LVL277: 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 3193 .loc 4 473 0 3194 01c8 3C44 add r4, r4, r7 3195 .LVL278: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3196 .loc 4 362 0 3197 01ca BBD8 bhi .L165 3198 01cc 059A ldr r2, [sp, #20] 3199 01ce 0999 ldr r1, [sp, #36] 3200 .LVL279: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3201 .loc 4 346 0 3202 01d0 049B ldr r3, [sp, #16] 3203 01d2 0A44 add r2, r2, r1 3204 01d4 0592 str r2, [sp, #20] 3205 01d6 0B99 ldr r1, [sp, #44] 3206 01d8 089A ldr r2, [sp, #32] 3207 01da 0A44 add r2, r2, r1 3208 01dc 0892 str r2, [sp, #32] 3209 01de 0D99 ldr r1, [sp, #52] 3210 01e0 079A ldr r2, [sp, #28] 3211 01e2 0A44 add r2, r2, r1 3212 01e4 0792 str r2, [sp, #28] 3213 01e6 069A ldr r2, [sp, #24] 3214 01e8 0432 adds r2, r2, #4 3215 01ea 0692 str r2, [sp, #24] 3216 01ec 0C9A ldr r2, [sp, #48] 3217 01ee 0133 adds r3, r3, #1 3218 01f0 9342 cmp r3, r2 3219 01f2 0493 str r3, [sp, #16] 3220 .LVL280: 3221 01f4 94D3 bcc .L166 3222 01f6 0E9A ldr r2, [sp, #56] 3223 01f8 0292 str r2, [sp, #8] 3224 .LVL281: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3225 .loc 4 339 0 3226 01fa 042A cmp r2, #4 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 3227 .loc 4 477 0 3228 01fc 099B ldr r3, [sp, #36] 3229 .LVL282: ARM GAS /tmp/ccfbYRip.s page 163 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 3230 .loc 4 339 0 3231 01fe 3FF674AF bhi .L167 3232 0202 119E ldr r6, [sp, #68] 3233 .LVL283: 3234 0204 0F9B ldr r3, [sp, #60] 3235 .LVL284: 3236 .L168: 3237 .LBB1322: 3238 .LBB1323: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3239 .loc 6 928 0 3240 0206 1A68 ldr r2, [r3] @ unaligned 3241 .LVL285: 3242 .LBE1323: 3243 .LBE1322: 3244 .LBB1324: 3245 .LBB1325: 3246 0208 5968 ldr r1, [r3, #4] @ unaligned 3247 .LVL286: 3248 .LBE1325: 3249 .LBE1324: 3250 .LBB1326: 3251 .LBB1327: 3252 020a 9F68 ldr r7, [r3, #8] @ unaligned 3253 .LVL287: 3254 .LBE1327: 3255 .LBE1326: 3256 .LBB1328: 3257 .LBB1329: 3258 020c DC68 ldr r4, [r3, #12] @ unaligned 3259 .LVL288: 3260 .LBE1329: 3261 .LBE1328: 3262 .LBB1330: 3263 .LBB1331: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3264 .loc 5 1731 0 3265 .syntax unified 3266 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3267 020e 92FA17F0 qadd16 r0, r2, r7 3268 @ 0 "" 2 3269 .LVL289: 3270 .thumb 3271 .syntax unified 3272 .LBE1331: 3273 .LBE1330: 3274 .LBB1332: 3275 .LBB1333: 3276 .syntax unified 3277 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3278 0212 91FA14F5 qadd16 r5, r1, r4 3279 @ 0 "" 2 3280 .LVL290: 3281 .thumb 3282 .syntax unified 3283 .LBE1333: ARM GAS /tmp/ccfbYRip.s page 164 3284 .LBE1332: 3285 .LBB1334: 3286 .LBB1335: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3287 .loc 5 1739 0 3288 .syntax unified 3289 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3290 0216 90FA25F5 shadd16 r5, r0, r5 3291 @ 0 "" 2 3292 .LVL291: 3293 .thumb 3294 .syntax unified 3295 .LBE1335: 3296 .LBE1334: 3297 .LBB1336: 3298 .LBB1337: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3299 .loc 6 969 0 3300 021a 1D60 str r5, [r3] @ unaligned 3301 .LVL292: 3302 .LBE1337: 3303 .LBE1336: 3304 .LBB1338: 3305 .LBB1339: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3306 .loc 5 1731 0 3307 .syntax unified 3308 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3309 021c 91FA14F5 qadd16 r5, r1, r4 3310 @ 0 "" 2 3311 .LVL293: 3312 .thumb 3313 .syntax unified 3314 .LBE1339: 3315 .LBE1338: 3316 .LBB1340: 3317 .LBB1341: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3318 .loc 5 1787 0 3319 .syntax unified 3320 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3321 0220 D0FA25F0 shsub16 r0, r0, r5 3322 @ 0 "" 2 3323 .LVL294: 3324 .thumb 3325 .syntax unified 3326 .LBE1341: 3327 .LBE1340: 3328 .LBB1342: 3329 .LBB1343: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3330 .loc 6 969 0 3331 0224 5860 str r0, [r3, #4] @ unaligned 3332 .LVL295: 3333 .LBE1343: 3334 .LBE1342: 3335 .LBB1344: ARM GAS /tmp/ccfbYRip.s page 165 3336 .LBB1345: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3337 .loc 5 1779 0 3338 .syntax unified 3339 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3340 0226 D2FA17F2 qsub16 r2, r2, r7 3341 @ 0 "" 2 3342 .LVL296: 3343 .thumb 3344 .syntax unified 3345 .LBE1345: 3346 .LBE1344: 3347 .LBB1346: 3348 .LBB1347: 3349 .syntax unified 3350 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3351 022a D1FA14F1 qsub16 r1, r1, r4 3352 @ 0 "" 2 3353 .LVL297: 3354 .thumb 3355 .syntax unified 3356 .LBE1347: 3357 .LBE1346: 3358 .LBB1348: 3359 .LBB1349: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3360 .loc 5 1883 0 3361 .syntax unified 3362 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3363 022e E2FA21F0 shsax r0, r2, r1 3364 @ 0 "" 2 3365 .LVL298: 3366 .thumb 3367 .syntax unified 3368 .LBE1349: 3369 .LBE1348: 3370 .LBB1350: 3371 .LBB1351: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3372 .loc 6 969 0 3373 0232 9860 str r0, [r3, #8] @ unaligned 3374 .LVL299: 3375 .LBE1351: 3376 .LBE1350: 3377 .LBB1352: 3378 .LBB1353: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 3379 .loc 5 1835 0 3380 .syntax unified 3381 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3382 0234 A2FA21F2 shasx r2, r2, r1 3383 @ 0 "" 2 3384 .LVL300: 3385 .thumb 3386 .syntax unified 3387 .LBE1353: 3388 .LBE1352: ARM GAS /tmp/ccfbYRip.s page 166 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3389 .loc 4 555 0 3390 0238 013E subs r6, r6, #1 3391 .LVL301: 3392 .LBB1354: 3393 .LBB1355: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3394 .loc 6 969 0 3395 023a DA60 str r2, [r3, #12] @ unaligned 3396 023c 03F11003 add r3, r3, #16 3397 .LVL302: 3398 .LBE1355: 3399 .LBE1354: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3400 .loc 4 555 0 3401 0240 E1D1 bne .L168 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 3402 .loc 4 965 0 3403 0242 13B0 add sp, sp, #76 3404 .LCFI38: 3405 .cfi_remember_state 3406 .cfi_def_cfa_offset 36 3407 @ sp needed 3408 0244 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3409 .LVL303: 3410 .L174: 3411 .LCFI39: 3412 .cfi_restore_state 3413 0248 1E46 mov r6, r3 3414 .LVL304: 3415 024a 0F9B ldr r3, [sp, #60] 3416 .LVL305: 3417 024c DBE7 b .L168 3418 .L177: 3419 024e 00BF .align 2 3420 .L176: 3421 0250 0000FFFF .word -65536 3422 .cfi_endproc 3423 .LFE240: 3425 .section .text.arm_bitreversal_f32,"ax",%progbits 3426 .align 1 3427 .p2align 2,,3 3428 .global arm_bitreversal_f32 3429 .syntax unified 3430 .thumb 3431 .thumb_func 3432 .fpu fpv4-sp-d16 3434 arm_bitreversal_f32: 3435 .LFB148: 3436 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Title: arm_bitreversal.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Description: Bitreversal functions 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * $Revision: V1.6.0 ARM GAS /tmp/ccfbYRip.s page 167 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @brief In-place floating-point bit reversal function. 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in,out] pSrc points to in-place floating-point data buffer 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] fftSize length of FFT 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] pBitRevTab points to bit reversal table 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @return none 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** void arm_bitreversal_f32( 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** float32_t * pSrc, 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t fftSize, 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t bitRevFactor, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** const uint16_t * pBitRevTab) 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3437 .loc 7 46 0 3438 .cfi_startproc 3439 @ args = 0, pretend = 0, frame = 24 3440 @ frame_needed = 0, uses_anonymous_args = 0 3441 .LVL306: 3442 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3443 .LCFI40: 3444 .cfi_def_cfa_offset 36 3445 .cfi_offset 4, -36 3446 .cfi_offset 5, -32 3447 .cfi_offset 6, -28 3448 .cfi_offset 7, -24 3449 .cfi_offset 8, -20 3450 .cfi_offset 9, -16 3451 .cfi_offset 10, -12 3452 .cfi_offset 11, -8 3453 .cfi_offset 14, -4 3454 0004 87B0 sub sp, sp, #28 ARM GAS /tmp/ccfbYRip.s page 168 3455 .LCFI41: 3456 .cfi_def_cfa_offset 64 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t fftLenBy2, fftLenBy2p1; 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t i, j; 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** float32_t in; 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Initializations */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = 0U; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftSize >> 1U; 3457 .loc 7 53 0 3458 0006 4C08 lsrs r4, r1, #1 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftSize >> 1U) + 1U; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Bit Reversal Implementation */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** if (i < j) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i] <-> pSrc[j]; */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * i]; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+1U] */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * i) + 1U]; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * (i + fftLenBy2p1)]; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * (i + fftLenBy2p1)) + 1U]; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U]; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+1U] */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * (i + 1U)]; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+2U] <-> pSrc[j+2U] */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * (i + 1U)) + 1U]; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Reading the index for the bit reversal */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = *pBitRevTab; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Updating the bit reversal index depending on the fft length */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pBitRevTab += bitRevFactor; 3459 .loc 7 98 0 ARM GAS /tmp/ccfbYRip.s page 169 3460 0008 5200 lsls r2, r2, #1 3461 .LVL307: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3462 .loc 7 57 0 3463 000a 0021 movs r1, #0 3464 .LVL308: 3465 .loc 7 98 0 3466 000c 0392 str r2, [sp, #12] 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3467 .loc 7 57 0 3468 000e A21E subs r2, r4, #2 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftSize >> 1U) + 1U; 3469 .loc 7 53 0 3470 0010 0494 str r4, [sp, #16] 3471 .LVL309: 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftSize >> 1U) + 1U; 3472 .loc 7 54 0 3473 0012 04F1010E add lr, r4, #1 3474 .LVL310: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3475 .loc 7 57 0 3476 0016 0592 str r2, [sp, #20] 3477 0018 0C46 mov r4, r1 3478 .LVL311: 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftSize >> 1U; 3479 .loc 7 52 0 3480 001a 0A46 mov r2, r1 3481 001c 0193 str r3, [sp, #4] 3482 .LVL312: 3483 .L179: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3484 .loc 7 86 0 discriminator 2 3485 001e 049D ldr r5, [sp, #16] 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3486 .loc 7 95 0 discriminator 2 3487 0020 019B ldr r3, [sp, #4] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3488 .loc 7 86 0 discriminator 2 3489 0022 5519 adds r5, r2, r5 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 3490 .loc 7 85 0 discriminator 2 3491 0024 0131 adds r1, r1, #1 3492 0026 C900 lsls r1, r1, #3 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3493 .loc 7 86 0 discriminator 2 3494 0028 ED00 lsls r5, r5, #3 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 3495 .loc 7 85 0 discriminator 2 3496 002a 4618 adds r6, r0, r1 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3497 .loc 7 86 0 discriminator 2 3498 002c 4719 adds r7, r0, r5 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3499 .loc 7 57 0 discriminator 2 3500 002e 0234 adds r4, r4, #2 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 3501 .loc 7 85 0 discriminator 2 ARM GAS /tmp/ccfbYRip.s page 170 3502 0030 D6F800C0 ldr ip, [r6] @ float 3503 .LVL313: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3504 .loc 7 86 0 discriminator 2 3505 0034 D7F80080 ldr r8, [r7] @ float 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3506 .loc 7 95 0 discriminator 2 3507 0038 1A88 ldrh r2, [r3] 3508 .LVL314: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3509 .loc 7 86 0 discriminator 2 3510 003a C6F80080 str r8, [r6] @ float 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3511 .loc 7 57 0 discriminator 2 3512 003e A4B2 uxth r4, r4 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3513 .loc 7 91 0 discriminator 2 3514 0040 0435 adds r5, r5, #4 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3515 .loc 7 87 0 discriminator 2 3516 0042 C7F800C0 str ip, [r7] @ float 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3517 .loc 7 91 0 discriminator 2 3518 0046 0544 add r5, r5, r0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3519 .loc 7 72 0 discriminator 2 3520 0048 04EB0E07 add r7, r4, lr 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3521 .loc 7 91 0 discriminator 2 3522 004c 95ED007A vldr.32 s14, [r5] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3523 .loc 7 72 0 discriminator 2 3524 0050 FF00 lsls r7, r7, #3 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; 3525 .loc 7 90 0 discriminator 2 3526 0052 0431 adds r1, r1, #4 3527 0054 0144 add r1, r1, r0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3528 .loc 7 72 0 discriminator 2 3529 0056 C319 adds r3, r0, r7 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; 3530 .loc 7 90 0 discriminator 2 3531 0058 D1ED007A vldr.32 s15, [r1] 3532 .LVL315: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3533 .loc 7 72 0 discriminator 2 3534 005c 0293 str r3, [sp, #8] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3535 .loc 7 63 0 discriminator 2 3536 005e D600 lsls r6, r2, #3 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3537 .loc 7 91 0 discriminator 2 3538 0060 81ED007A vstr.32 s14, [r1] 3539 .loc 7 98 0 discriminator 2 3540 0064 039B ldr r3, [sp, #12] 3541 0066 0199 ldr r1, [sp, #4] 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** ARM GAS /tmp/ccfbYRip.s page 171 3542 .loc 7 92 0 discriminator 2 3543 0068 C5ED007A vstr.32 s15, [r5] 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3544 .loc 7 63 0 discriminator 2 3545 006c 00EB060B add fp, r0, r6 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3546 .loc 7 68 0 discriminator 2 3547 0070 0436 adds r6, r6, #4 3548 .loc 7 98 0 discriminator 2 3549 0072 1944 add r1, r1, r3 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3550 .loc 7 68 0 discriminator 2 3551 0074 00EB0608 add r8, r0, r6 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3552 .loc 7 57 0 discriminator 2 3553 0078 059B ldr r3, [sp, #20] 3554 .loc 7 98 0 discriminator 2 3555 007a 0191 str r1, [sp, #4] 3556 .LVL316: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3557 .loc 7 73 0 discriminator 2 3558 007c 02EB0E06 add r6, r2, lr 3559 0080 F600 lsls r6, r6, #3 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 3560 .loc 7 62 0 discriminator 2 3561 0082 4FEAC40C lsl ip, r4, #3 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3562 .loc 7 73 0 discriminator 2 3563 0086 00EB060A add r10, r0, r6 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 3564 .loc 7 62 0 discriminator 2 3565 008a 00EB0C09 add r9, r0, ip 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 3566 .loc 7 77 0 discriminator 2 3567 008e 0437 adds r7, r7, #4 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 3568 .loc 7 67 0 discriminator 2 3569 0090 0CF1040C add ip, ip, #4 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 3570 .loc 7 79 0 discriminator 2 3571 0094 0436 adds r6, r6, #4 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3572 .loc 7 57 0 discriminator 2 3573 0096 9C42 cmp r4, r3 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 3574 .loc 7 67 0 discriminator 2 3575 0098 8444 add ip, ip, r0 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3576 .loc 7 57 0 discriminator 2 3577 009a 2146 mov r1, r4 3578 .LVL317: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 3579 .loc 7 77 0 discriminator 2 3580 009c 0744 add r7, r7, r0 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 3581 .loc 7 79 0 discriminator 2 3582 009e 0644 add r6, r6, r0 ARM GAS /tmp/ccfbYRip.s page 172 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3583 .loc 7 57 0 discriminator 2 3584 00a0 20D8 bhi .L183 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3585 .loc 7 59 0 3586 00a2 A242 cmp r2, r4 3587 00a4 BBD9 bls .L179 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3588 .loc 7 63 0 3589 00a6 DBED007A vldr.32 s15, [fp] 3590 .LVL318: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 3591 .loc 7 62 0 3592 00aa D9F80050 ldr r5, [r9] @ float 3593 .LVL319: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3594 .loc 7 63 0 3595 00ae C9ED007A vstr.32 s15, [r9] 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3596 .loc 7 64 0 3597 00b2 CBF80050 str r5, [fp] @ float 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 3598 .loc 7 67 0 3599 00b6 DCF80050 ldr r5, [ip] @ float 3600 .LVL320: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3601 .loc 7 68 0 3602 00ba D8F80090 ldr r9, [r8] @ float 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3603 .loc 7 72 0 3604 00be 029B ldr r3, [sp, #8] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3605 .loc 7 68 0 3606 00c0 CCF80090 str r9, [ip] @ float 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3607 .loc 7 69 0 3608 00c4 C8F80050 str r5, [r8] @ float 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3609 .loc 7 72 0 3610 00c8 1D68 ldr r5, [r3] @ float 3611 .LVL321: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3612 .loc 7 73 0 3613 00ca DAF800C0 ldr ip, [r10] @ float 3614 00ce C3F800C0 str ip, [r3] @ float 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3615 .loc 7 74 0 3616 00d2 CAF80050 str r5, [r10] @ float 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 3617 .loc 7 77 0 3618 00d6 3D68 ldr r5, [r7] @ float 3619 .LVL322: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 3620 .loc 7 79 0 3621 00d8 D6F800C0 ldr ip, [r6] @ float 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U]; 3622 .loc 7 78 0 ARM GAS /tmp/ccfbYRip.s page 173 3623 00dc C7F800C0 str ip, [r7] @ float 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3624 .loc 7 80 0 3625 00e0 3560 str r5, [r6] @ float 3626 00e2 9CE7 b .L179 3627 .LVL323: 3628 .L183: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 3629 .loc 7 100 0 3630 00e4 07B0 add sp, sp, #28 3631 .LCFI42: 3632 .cfi_def_cfa_offset 36 3633 @ sp needed 3634 00e6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3635 .cfi_endproc 3636 .LFE148: 3638 00ea 00BF .section .text.arm_bitreversal_q31,"ax",%progbits 3639 .align 1 3640 .p2align 2,,3 3641 .global arm_bitreversal_q31 3642 .syntax unified 3643 .thumb 3644 .thumb_func 3645 .fpu fpv4-sp-d16 3647 arm_bitreversal_q31: 3648 .LFB149: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @brief In-place Q31 bit reversal function. 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in,out] pSrc points to in-place Q31 data buffer. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] fftLen length of FFT. 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] pBitRevTab points to bit reversal table 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @return none 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** void arm_bitreversal_q31( 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** q31_t * pSrc, 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint32_t fftLen, 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t bitRevFactor, 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** const uint16_t * pBitRevTab) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3649 .loc 7 117 0 3650 .cfi_startproc 3651 @ args = 0, pretend = 0, frame = 8 3652 @ frame_needed = 0, uses_anonymous_args = 0 3653 .LVL324: 3654 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3655 .LCFI43: 3656 .cfi_def_cfa_offset 36 3657 .cfi_offset 4, -36 3658 .cfi_offset 5, -32 3659 .cfi_offset 6, -28 3660 .cfi_offset 7, -24 3661 .cfi_offset 8, -20 ARM GAS /tmp/ccfbYRip.s page 174 3662 .cfi_offset 9, -16 3663 .cfi_offset 10, -12 3664 .cfi_offset 11, -8 3665 .cfi_offset 14, -4 3666 0004 83B0 sub sp, sp, #12 3667 .LCFI44: 3668 .cfi_def_cfa_offset 48 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint32_t fftLenBy2, fftLenBy2p1, i, j; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** q31_t in; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Initializations */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = 0U; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 3669 .loc 7 123 0 3670 0006 4908 lsrs r1, r1, #1 3671 .LVL325: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Bit Reversal Implementation */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) 3672 .loc 7 127 0 3673 0008 0026 movs r6, #0 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** if (i < j) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i] <-> pSrc[j]; */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * i]; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+1U] */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * i) + 1U]; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * (i + fftLenBy2p1)]; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * (i + fftLenBy2p1)) + 1U]; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U]; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+1U] */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[2U * (i + 1U)]; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+2U] <-> pSrc[j+2U] */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[(2U * (i + 1U)) + 1U]; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; ARM GAS /tmp/ccfbYRip.s page 175 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Reading the index for the bit reversal */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = *pBitRevTab; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Updating the bit reversal index depending on the fft length */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pBitRevTab += bitRevFactor; 3674 .loc 7 168 0 3675 000a 5200 lsls r2, r2, #1 3676 .LVL326: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 3677 .loc 7 124 0 3678 000c 01F1010A add r10, r1, #1 3679 .LVL327: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3680 .loc 7 127 0 3681 0010 A1F10209 sub r9, r1, #2 3682 0014 0546 mov r5, r0 3683 0016 00EBC10E add lr, r0, r1, lsl #3 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 3684 .loc 7 122 0 3685 001a 3446 mov r4, r6 3686 001c 0192 str r2, [sp, #4] 3687 001e 22E0 b .L185 3688 .LVL328: 3689 .L187: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3690 .loc 7 129 0 3691 0020 B442 cmp r4, r6 3692 0022 1CD9 bls .L186 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3693 .loc 7 133 0 3694 0024 50F83420 ldr r2, [r0, r4, lsl #3] 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * i] = pSrc[2U * j]; 3695 .loc 7 132 0 3696 0028 D5F810B0 ldr fp, [r5, #16] 3697 .LVL329: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3698 .loc 7 133 0 3699 002c 2A61 str r2, [r5, #16] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3700 .loc 7 134 0 3701 002e 40F834B0 str fp, [r0, r4, lsl #3] 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3702 .loc 7 138 0 3703 0032 50F80C20 ldr r2, [r0, ip] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; 3704 .loc 7 137 0 3705 0036 D5F814B0 ldr fp, [r5, #20] 3706 .LVL330: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3707 .loc 7 138 0 3708 003a 6A61 str r2, [r5, #20] 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3709 .loc 7 139 0 3710 003c 40F80CB0 str fp, [r0, ip] 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3711 .loc 7 143 0 ARM GAS /tmp/ccfbYRip.s page 176 3712 0040 50F83820 ldr r2, [r0, r8, lsl #3] 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; 3713 .loc 7 142 0 3714 0044 DEF818C0 ldr ip, [lr, #24] 3715 .LVL331: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3716 .loc 7 143 0 3717 0048 CEF81820 str r2, [lr, #24] 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3718 .loc 7 144 0 3719 004c 40F838C0 str ip, [r0, r8, lsl #3] 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U]; 3720 .loc 7 148 0 3721 0050 C259 ldr r2, [r0, r7] 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + fftLenBy2p1)) + 1U] = 3722 .loc 7 147 0 3723 0052 DEF81CC0 ldr ip, [lr, #28] 3724 .LVL332: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U]; 3725 .loc 7 148 0 3726 0056 CEF81C20 str r2, [lr, #28] 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3727 .loc 7 150 0 3728 005a 40F807C0 str ip, [r0, r7] 3729 .LVL333: 3730 .L186: 3731 005e 019A ldr r2, [sp, #4] 3732 0060 1035 adds r5, r5, #16 3733 0062 0EF1100E add lr, lr, #16 3734 .LVL334: 3735 .L185: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3736 .loc 7 156 0 discriminator 2 3737 0066 0C44 add r4, r4, r1 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; 3738 .loc 7 155 0 discriminator 2 3739 0068 D5F808C0 ldr ip, [r5, #8] 3740 .LVL335: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2)] = in; 3741 .loc 7 156 0 discriminator 2 3742 006c 50F83470 ldr r7, [r0, r4, lsl #3] 3743 0070 AF60 str r7, [r5, #8] 3744 0072 E700 lsls r7, r4, #3 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3745 .loc 7 161 0 discriminator 2 3746 0074 0437 adds r7, r7, #4 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3747 .loc 7 157 0 discriminator 2 3748 0076 40F834C0 str ip, [r0, r4, lsl #3] 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; 3749 .loc 7 161 0 discriminator 2 3750 007a C459 ldr r4, [r0, r7] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; 3751 .loc 7 160 0 discriminator 2 3752 007c D5F80CC0 ldr ip, [r5, #12] 3753 .LVL336: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2)) + 1U] = in; ARM GAS /tmp/ccfbYRip.s page 177 3754 .loc 7 161 0 discriminator 2 3755 0080 EC60 str r4, [r5, #12] 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3756 .loc 7 165 0 discriminator 2 3757 0082 1C88 ldrh r4, [r3] 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3758 .loc 7 162 0 discriminator 2 3759 0084 40F807C0 str ip, [r0, r7] 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3760 .loc 7 127 0 discriminator 2 3761 0088 0236 adds r6, r6, #2 3762 .LVL337: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3763 .loc 7 143 0 discriminator 2 3764 008a 0AEB0408 add r8, r10, r4 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * j] = in; 3765 .loc 7 133 0 discriminator 2 3766 008e 4FEAC40C lsl ip, r4, #3 3767 .LVL338: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[2U * (j + fftLenBy2p1)] = in; 3768 .loc 7 143 0 discriminator 2 3769 0092 4FEAC807 lsl r7, r8, #3 3770 .LVL339: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3771 .loc 7 127 0 discriminator 2 3772 0096 4E45 cmp r6, r9 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * j) + 1U] = in; 3773 .loc 7 138 0 discriminator 2 3774 0098 0CF1040C add ip, ip, #4 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; 3775 .loc 7 149 0 discriminator 2 3776 009c 07F10407 add r7, r7, #4 3777 .loc 7 168 0 discriminator 2 3778 00a0 1344 add r3, r3, r2 3779 .LVL340: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3780 .loc 7 127 0 discriminator 2 3781 00a2 BDD9 bls .L187 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 3782 .loc 7 170 0 3783 00a4 03B0 add sp, sp, #12 3784 .LCFI45: 3785 .cfi_def_cfa_offset 36 3786 @ sp needed 3787 00a6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3788 .cfi_endproc 3789 .LFE149: 3791 00aa 00BF .section .text.arm_bitreversal_q15,"ax",%progbits 3792 .align 1 3793 .p2align 2,,3 3794 .global arm_bitreversal_q15 3795 .syntax unified 3796 .thumb 3797 .thumb_func 3798 .fpu fpv4-sp-d16 3800 arm_bitreversal_q15: ARM GAS /tmp/ccfbYRip.s page 178 3801 .LFB150: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @brief In-place Q15 bit reversal function. 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in,out] pSrc16 points to in-place Q15 data buffer 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] fftLen length of FFT 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @param[in] pBitRevTab points to bit reversal table 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** @return none 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** void arm_bitreversal_q15( 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** q15_t * pSrc16, 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint32_t fftLen, 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint16_t bitRevFactor, 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** const uint16_t * pBitRevTab) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3802 .loc 7 188 0 3803 .cfi_startproc 3804 @ args = 0, pretend = 0, frame = 0 3805 @ frame_needed = 0, uses_anonymous_args = 0 3806 .LVL341: 3807 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 3808 .LCFI46: 3809 .cfi_def_cfa_offset 36 3810 .cfi_offset 4, -36 3811 .cfi_offset 5, -32 3812 .cfi_offset 6, -28 3813 .cfi_offset 7, -24 3814 .cfi_offset 8, -20 3815 .cfi_offset 9, -16 3816 .cfi_offset 10, -12 3817 .cfi_offset 11, -8 3818 .cfi_offset 14, -4 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** q31_t *pSrc = (q31_t *) pSrc16; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** q31_t in; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint32_t fftLenBy2, fftLenBy2p1; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** uint32_t i, j; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Initializations */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = 0U; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 3819 .loc 7 196 0 3820 0004 4908 lsrs r1, r1, #1 3821 .LVL342: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 3822 .loc 7 195 0 3823 0006 0024 movs r4, #0 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Bit Reversal Implementation */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** if (i < j) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { ARM GAS /tmp/ccfbYRip.s page 179 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i] <-> pSrc[j]; */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+1U] */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[i]; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i] = pSrc[j]; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j] = in; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1]; */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[i + fftLenBy2p1]; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+1U] <-> pSrc[j+fftLenBy2]; */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* pSrc[i+2] <-> pSrc[j+fftLenBy2+1U] */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** in = pSrc[i + 1U]; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + 1U] = pSrc[j + fftLenBy2]; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Reading the index for the bit reversal */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** j = *pBitRevTab; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** /* Updating the bit reversal index depending on the fft length */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pBitRevTab += bitRevFactor; 3824 .loc 7 227 0 3825 0008 4FEA420B lsl fp, r2, #1 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 3826 .loc 7 197 0 3827 000c 01F10108 add r8, r1, #1 3828 .LVL343: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3829 .loc 7 200 0 3830 0010 A1F1020E sub lr, r1, #2 3831 0014 0646 mov r6, r0 3832 0016 4FEA810C lsl ip, r1, #2 3833 001a 2546 mov r5, r4 3834 001c 10E0 b .L190 3835 .LVL344: 3836 .L192: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3837 .loc 7 202 0 3838 001e AC42 cmp r4, r5 3839 0020 0DD9 bls .L191 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i] = pSrc[j]; 3840 .loc 7 206 0 3841 0022 B768 ldr r7, [r6, #8] 3842 .LVL345: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j] = in; 3843 .loc 7 207 0 3844 0024 50F82420 ldr r2, [r0, r4, lsl #2] 3845 0028 B260 str r2, [r6, #8] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3846 .loc 7 208 0 3847 002a 40F82470 str r7, [r0, r4, lsl #2] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; 3848 .loc 7 212 0 3849 002e D9F80C70 ldr r7, [r9, #12] ARM GAS /tmp/ccfbYRip.s page 180 3850 .LVL346: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 3851 .loc 7 213 0 3852 0032 50F82A20 ldr r2, [r0, r10, lsl #2] 3853 0036 C9F80C20 str r2, [r9, #12] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 3854 .loc 7 214 0 3855 003a 40F82A70 str r7, [r0, r10, lsl #2] 3856 .L191: 3857 003e 0836 adds r6, r6, #8 3858 .LVL347: 3859 .L190: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 3860 .loc 7 220 0 discriminator 2 3861 0040 0C44 add r4, r4, r1 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + 1U] = pSrc[j + fftLenBy2]; 3862 .loc 7 219 0 discriminator 2 3863 0042 7768 ldr r7, [r6, #4] 3864 .LVL348: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 3865 .loc 7 220 0 discriminator 2 3866 0044 50F82420 ldr r2, [r0, r4, lsl #2] 3867 0048 7260 str r2, [r6, #4] 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3868 .loc 7 200 0 discriminator 2 3869 004a 0235 adds r5, r5, #2 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3870 .loc 7 221 0 discriminator 2 3871 004c 40F82470 str r7, [r0, r4, lsl #2] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 3872 .loc 7 224 0 discriminator 2 3873 0050 1C88 ldrh r4, [r3] 3874 .LVL349: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3875 .loc 7 200 0 discriminator 2 3876 0052 7545 cmp r5, lr 3877 0054 06EB0C09 add r9, r6, ip 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 3878 .loc 7 213 0 discriminator 2 3879 0058 08EB040A add r10, r8, r4 3880 .loc 7 227 0 discriminator 2 3881 005c 5B44 add r3, r3, fp 3882 .LVL350: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 3883 .loc 7 200 0 discriminator 2 3884 005e DED9 bls .L192 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 3885 .loc 7 229 0 3886 0060 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 3887 .cfi_endproc 3888 .LFE150: 3890 .section .text.arm_bitreversal_64,"ax",%progbits 3891 .align 1 3892 .p2align 2,,3 3893 .global arm_bitreversal_64 3894 .syntax unified ARM GAS /tmp/ccfbYRip.s page 181 3895 .thumb 3896 .thumb_func 3897 .fpu fpv4-sp-d16 3899 arm_bitreversal_64: 3900 .LFB151: 3901 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Title: arm_bitreversal2.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Description: Bitreversal functions 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * $Revision: V1.0.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** /** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @brief In-place 64 bit reversal function. 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in,out] pSrc points to in-place buffer of unknown 64-bit data type 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] bitRevLen bit reversal table length 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] pBitRevTab points to bit reversal table 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @return none 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** void arm_bitreversal_64( 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint64_t *pSrc, 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t bitRevLen, 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t *pBitRevTab) 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 3902 .loc 8 45 0 3903 .cfi_startproc 3904 @ args = 0, pretend = 0, frame = 0 3905 @ frame_needed = 0, uses_anonymous_args = 0 3906 .LVL351: 3907 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} ARM GAS /tmp/ccfbYRip.s page 182 3908 .LCFI47: 3909 .cfi_def_cfa_offset 24 3910 .cfi_offset 4, -24 3911 .cfi_offset 5, -20 3912 .cfi_offset 6, -16 3913 .cfi_offset 7, -12 3914 .cfi_offset 8, -8 3915 .cfi_offset 14, -4 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint64_t a, b, i, tmp; 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** for (i = 0; i < bitRevLen; ) 3916 .loc 8 48 0 3917 0004 8EB2 uxth r6, r1 3918 0006 0027 movs r7, #0 3919 0008 56EA0703 orrs r3, r6, r7 3920 000c 2ED0 beq .L194 3921 000e 16F1FF34 adds r4, r6, #-1 3922 0012 47F1FF35 adc r5, r7, #-1 3923 0016 6D08 movs r5, r5, lsr #1 3924 0018 4FEA3404 mov r4, r4, rrx 3925 001c 111D adds r1, r2, #4 3926 .LVL352: 3927 001e 01EB8401 add r1, r1, r4, lsl #2 3928 .LVL353: 3929 .L196: 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** a = pBitRevTab[i ] >> 2; 3930 .loc 8 50 0 3931 0022 B2F800C0 ldrh ip, [r2] 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 3932 .loc 8 51 0 3933 0026 5388 ldrh r3, [r2, #2] 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //real 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a]; 3934 .loc 8 54 0 3935 0028 4FEA9C0C lsr ip, ip, #2 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 3936 .loc 8 55 0 3937 002c 9B08 lsrs r3, r3, #2 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 3938 .loc 8 54 0 3939 002e 4FEACC0C lsl ip, ip, #3 3940 .loc 8 55 0 3941 0032 DB00 lsls r3, r3, #3 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 3942 .loc 8 54 0 3943 0034 00EB0C08 add r8, r0, ip 3944 .loc 8 55 0 3945 0038 00EB030E add lr, r0, r3 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 3946 .loc 8 54 0 3947 003c D8E90067 ldrd r6, [r8] 3948 .LVL354: 3949 .loc 8 55 0 3950 0040 DEE90045 ldrd r4, [lr] 3951 0044 C8E90045 strd r4, [r8] ARM GAS /tmp/ccfbYRip.s page 183 3952 .LVL355: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 3953 .loc 8 56 0 3954 0048 CEE90067 strd r6, [lr] 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //complex 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a+1]; 3955 .loc 8 59 0 3956 004c 0CF1080C add ip, ip, #8 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 3957 .loc 8 60 0 3958 0050 0833 adds r3, r3, #8 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 3959 .loc 8 59 0 3960 0052 8444 add ip, ip, r0 3961 .loc 8 60 0 3962 0054 0344 add r3, r3, r0 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 3963 .loc 8 59 0 3964 0056 DCE90067 ldrd r6, [ip] 3965 .LVL356: 3966 .loc 8 60 0 3967 005a D3E90045 ldrd r4, [r3] 3968 005e 0432 adds r2, r2, #4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 3969 .loc 8 48 0 3970 0060 9142 cmp r1, r2 3971 .loc 8 60 0 3972 0062 CCE90045 strd r4, [ip] 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 3973 .loc 8 61 0 3974 0066 C3E90067 strd r6, [r3] 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 3975 .loc 8 48 0 3976 006a DAD1 bne .L196 3977 .LVL357: 3978 .L194: 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** i += 2; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 3979 .loc 8 65 0 3980 006c BDE8F081 pop {r4, r5, r6, r7, r8, pc} 3981 .cfi_endproc 3982 .LFE151: 3984 .section .text.arm_bitreversal_32,"ax",%progbits 3985 .align 1 3986 .p2align 2,,3 3987 .global arm_bitreversal_32 3988 .syntax unified 3989 .thumb 3990 .thumb_func 3991 .fpu fpv4-sp-d16 3993 arm_bitreversal_32: 3994 .LFB152: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** /** ARM GAS /tmp/ccfbYRip.s page 184 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @brief In-place 32 bit reversal function. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in,out] pSrc points to in-place buffer of unknown 32-bit data type 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] bitRevLen bit reversal table length 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] pBitRevTab points to bit reversal table 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @return none 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** void arm_bitreversal_32( 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint32_t *pSrc, 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t bitRevLen, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t *pBitRevTab) 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 3995 .loc 8 79 0 3996 .cfi_startproc 3997 @ args = 0, pretend = 0, frame = 0 3998 @ frame_needed = 0, uses_anonymous_args = 0 3999 @ link register save eliminated. 4000 .LVL358: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint32_t a, b, i, tmp; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** for (i = 0; i < bitRevLen; ) 4001 .loc 8 82 0 4002 0000 F1B1 cbz r1, .L210 4003 0002 0139 subs r1, r1, #1 4004 .LVL359: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint32_t a, b, i, tmp; 4005 .loc 8 79 0 4006 0004 70B4 push {r4, r5, r6} 4007 .LCFI48: 4008 .cfi_def_cfa_offset 12 4009 .cfi_offset 4, -12 4010 .cfi_offset 5, -8 4011 .cfi_offset 6, -4 4012 0006 4908 lsrs r1, r1, #1 4013 0008 161D adds r6, r2, #4 4014 000a 06EB8106 add r6, r6, r1, lsl #2 4015 .LVL360: 4016 .L204: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** a = pBitRevTab[i ] >> 2; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 4017 .loc 8 85 0 4018 000e 5188 ldrh r1, [r2, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 4019 .loc 8 84 0 4020 0010 1388 ldrh r3, [r2] 4021 .loc 8 85 0 4022 0012 8908 lsrs r1, r1, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 4023 .loc 8 84 0 4024 0014 9B08 lsrs r3, r3, #2 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //real 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a]; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4025 .loc 8 89 0 4026 0016 50F82140 ldr r4, [r0, r1, lsl #2] ARM GAS /tmp/ccfbYRip.s page 185 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4027 .loc 8 88 0 4028 001a 50F82350 ldr r5, [r0, r3, lsl #2] 4029 .LVL361: 4030 .loc 8 89 0 4031 001e 40F82340 str r4, [r0, r3, lsl #2] 4032 .LVL362: 4033 0022 8C00 lsls r4, r1, #2 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4034 .loc 8 88 0 4035 0024 9B00 lsls r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 4036 .loc 8 90 0 4037 0026 40F82150 str r5, [r0, r1, lsl #2] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //complex 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a+1]; 4038 .loc 8 93 0 4039 002a 0433 adds r3, r3, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 4040 .loc 8 94 0 4041 002c 211D adds r1, r4, #4 4042 002e 0432 adds r2, r2, #4 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 4043 .loc 8 93 0 4044 0030 C458 ldr r4, [r0, r3] 4045 .LVL363: 4046 .loc 8 94 0 4047 0032 4558 ldr r5, [r0, r1] 4048 0034 C550 str r5, [r0, r3] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 4049 .loc 8 82 0 4050 0036 9642 cmp r6, r2 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 4051 .loc 8 95 0 4052 0038 4450 str r4, [r0, r1] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 4053 .loc 8 82 0 4054 003a E8D1 bne .L204 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** i += 2; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 4055 .loc 8 99 0 4056 003c 70BC pop {r4, r5, r6} 4057 .LCFI49: 4058 .cfi_restore 6 4059 .cfi_restore 5 4060 .cfi_restore 4 4061 .cfi_def_cfa_offset 0 4062 .LVL364: 4063 003e 7047 bx lr 4064 .LVL365: 4065 .L210: 4066 0040 7047 bx lr 4067 .cfi_endproc 4068 .LFE152: ARM GAS /tmp/ccfbYRip.s page 186 4070 0042 00BF .section .text.arm_bitreversal_16,"ax",%progbits 4071 .align 1 4072 .p2align 2,,3 4073 .global arm_bitreversal_16 4074 .syntax unified 4075 .thumb 4076 .thumb_func 4077 .fpu fpv4-sp-d16 4079 arm_bitreversal_16: 4080 .LFB153: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** /** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @brief In-place 16 bit reversal function. 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in,out] pSrc points to in-place buffer of unknown 16-bit data type 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] bitRevLen bit reversal table length 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @param[in] pBitRevTab points to bit reversal table 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** @return none 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** void arm_bitreversal_16( 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint16_t *pSrc, 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t bitRevLen, 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** const uint16_t *pBitRevTab) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 4081 .loc 8 114 0 4082 .cfi_startproc 4083 @ args = 0, pretend = 0, frame = 0 4084 @ frame_needed = 0, uses_anonymous_args = 0 4085 @ link register save eliminated. 4086 .LVL366: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint16_t a, b, i, tmp; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** for (i = 0; i < bitRevLen; ) 4087 .loc 8 117 0 4088 0000 F1B1 cbz r1, .L221 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** uint16_t a, b, i, tmp; 4089 .loc 8 114 0 4090 0002 F0B4 push {r4, r5, r6, r7} 4091 .LCFI50: 4092 .cfi_def_cfa_offset 16 4093 .cfi_offset 4, -16 4094 .cfi_offset 5, -12 4095 .cfi_offset 6, -8 4096 .cfi_offset 7, -4 4097 .loc 8 117 0 4098 0004 0024 movs r4, #0 4099 .LVL367: 4100 .L215: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** a = pBitRevTab[i ] >> 2; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 4101 .loc 8 120 0 4102 0006 02EB4405 add r5, r2, r4, lsl #1 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 4103 .loc 8 119 0 4104 000a 32F81430 ldrh r3, [r2, r4, lsl #1] ARM GAS /tmp/ccfbYRip.s page 187 4105 .loc 8 120 0 4106 000e 6D88 ldrh r5, [r5, #2] 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //real 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a]; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4107 .loc 8 124 0 4108 0010 AD08 lsrs r5, r5, #2 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4109 .loc 8 123 0 4110 0012 9B08 lsrs r3, r3, #2 4111 .loc 8 124 0 4112 0014 30F81560 ldrh r6, [r0, r5, lsl #1] 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4113 .loc 8 123 0 4114 0018 30F81370 ldrh r7, [r0, r3, lsl #1] 4115 .LVL368: 4116 .loc 8 124 0 4117 001c 20F81360 strh r6, [r0, r3, lsl #1] @ movhi 4118 .LVL369: 4119 0020 6E00 lsls r6, r5, #1 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 4120 .loc 8 123 0 4121 0022 5B00 lsls r3, r3, #1 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 4122 .loc 8 125 0 4123 0024 20F81570 strh r7, [r0, r5, lsl #1] @ movhi 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** //complex 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** tmp = pSrc[a+1]; 4124 .loc 8 128 0 4125 0028 0233 adds r3, r3, #2 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 4126 .loc 8 129 0 4127 002a B51C adds r5, r6, #2 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** i += 2; 4128 .loc 8 132 0 4129 002c 0234 adds r4, r4, #2 4130 .LVL370: 4131 002e A4B2 uxth r4, r4 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 4132 .loc 8 128 0 4133 0030 C65A ldrh r6, [r0, r3] 4134 .LVL371: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 4135 .loc 8 129 0 4136 0032 475B ldrh r7, [r0, r5] 4137 0034 C752 strh r7, [r0, r3] @ movhi 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 4138 .loc 8 117 0 4139 0036 A142 cmp r1, r4 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 4140 .loc 8 130 0 4141 0038 4653 strh r6, [r0, r5] @ movhi 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { ARM GAS /tmp/ccfbYRip.s page 188 4142 .loc 8 117 0 4143 003a E4D8 bhi .L215 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 4144 .loc 8 134 0 4145 003c F0BC pop {r4, r5, r6, r7} 4146 .LCFI51: 4147 .cfi_restore 7 4148 .cfi_restore 6 4149 .cfi_restore 5 4150 .cfi_restore 4 4151 .cfi_def_cfa_offset 0 4152 .LVL372: 4153 003e 7047 bx lr 4154 .LVL373: 4155 .L221: 4156 0040 7047 bx lr 4157 .cfi_endproc 4158 .LFE153: 4160 .global __aeabi_dadd 4161 .global __aeabi_dsub 4162 .global __aeabi_dmul 4163 0042 00BF .section .text.arm_radix4_butterfly_f64,"ax",%progbits 4164 .align 1 4165 .p2align 2,,3 4166 .global arm_radix4_butterfly_f64 4167 .syntax unified 4168 .thumb 4169 .thumb_func 4170 .fpu fpv4-sp-d16 4172 arm_radix4_butterfly_f64: 4173 .LFB157: 4174 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Title: arm_cfft_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Description: Combined Radix Decimation in Frequency CFFT Double Precision Floating point proces 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * $Date: 29. November 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * $Revision: V1.0.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ARM GAS /tmp/ccfbYRip.s page 189 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** extern void arm_radix4_butterfly_f64( 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t * pSrc, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint16_t fftLen, 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const float64_t * pCoef, 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint16_t twidCoefModifier); 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** extern void arm_bitreversal_64( 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint64_t * pSrc, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const uint16_t bitRevLen, 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const uint16_t * pBitRevTable); 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @} end of ComplexFFT group 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* ---------------------------------------------------------------------- 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * Internal helper function used by the FFTs 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * ---------------------------------------------------------------------- */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @brief Core function for the Double Precision floating-point CFFT butterfly process. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in, out] *pSrc points to the in-place buffer of F64 data type. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] fftLen length of the FFT. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] *pCoef points to the twiddle coefficient buffer. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs w 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @return none. 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** void arm_radix4_butterfly_f64( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint16_t fftLen, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const float64_t * pCoef, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint16_t twidCoefModifier) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4175 .loc 9 66 0 4176 .cfi_startproc 4177 @ args = 0, pretend = 0, frame = 192 4178 @ frame_needed = 0, uses_anonymous_args = 0 4179 .LVL374: 4180 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 4181 .LCFI52: 4182 .cfi_def_cfa_offset 36 4183 .cfi_offset 4, -36 4184 .cfi_offset 5, -32 4185 .cfi_offset 6, -28 4186 .cfi_offset 7, -24 4187 .cfi_offset 8, -20 4188 .cfi_offset 9, -16 4189 .cfi_offset 10, -12 ARM GAS /tmp/ccfbYRip.s page 190 4190 .cfi_offset 11, -8 4191 .cfi_offset 14, -4 4192 0004 B1B0 sub sp, sp, #196 4193 .LCFI53: 4194 .cfi_def_cfa_offset 232 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t co1, co2, co3, si1, si2, si3; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t ia1, ia2, ia3; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t i0, i1, i2, i3; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t n1, n2, j, k; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t t1, t2, r1, r2, s1, s2; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Initializations for the fft calculation */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** n2 = fftLen; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** n1 = n2; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** for (k = fftLen; k > 1U; k >>= 2U) 4195 .loc 9 79 0 4196 0006 0129 cmp r1, #1 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4197 .loc 9 66 0 4198 0008 1E91 str r1, [sp, #120] 4199 .LVL375: 4200 000a CDE92D02 strd r0, r2, [sp, #180] 4201 000e 2B93 str r3, [sp, #172] 4202 .LVL376: 4203 .loc 9 79 0 4204 0010 40F2B681 bls .L224 4205 0014 0346 mov r3, r0 4206 0016 0833 adds r3, r3, #8 4207 0018 1D91 str r1, [sp, #116] 4208 001a 2F93 str r3, [sp, #188] 4209 .LVL377: 4210 .L228: 4211 001c 2B98 ldr r0, [sp, #172] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Initializations for the fft calculation */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** n1 = n2; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** n2 >>= 2U; 4212 .loc 9 83 0 4213 001e 1D9C ldr r4, [sp, #116] 4214 0020 00EB4003 add r3, r0, r0, lsl #1 4215 0024 A208 lsrs r2, r4, #2 4216 0026 511E subs r1, r2, #1 4217 0028 1B01 lsls r3, r3, #4 4218 002a 2C92 str r2, [sp, #176] 4219 .LVL378: 4220 002c 2991 str r1, [sp, #164] 4221 002e 2A93 str r3, [sp, #168] 4222 0030 5101 lsls r1, r2, #5 4223 0032 0301 lsls r3, r0, #4 4224 0034 1201 lsls r2, r2, #4 4225 .LVL379: 4226 0036 2592 str r2, [sp, #148] 4227 0038 2893 str r3, [sp, #160] 4228 003a 4201 lsls r2, r0, #5 ARM GAS /tmp/ccfbYRip.s page 191 4229 003c 2E9B ldr r3, [sp, #184] 4230 003e 2792 str r2, [sp, #156] 4231 0040 2D9A ldr r2, [sp, #180] 4232 0042 2493 str r3, [sp, #144] 4233 0044 2192 str r2, [sp, #132] 4234 0046 CDE92233 strd r3, r3, [sp, #136] 4235 004a 2F9A ldr r2, [sp, #188] 4236 004c 2691 str r1, [sp, #152] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia1 = 0U; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* FFT Calculation */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** j = 0; 4237 .loc 9 87 0 4238 004e 0023 movs r3, #0 4239 0050 2092 str r2, [sp, #128] 4240 0052 4FEA041A lsl r10, r4, #4 4241 0056 1F93 str r3, [sp, #124] 4242 .LVL380: 4243 .L227: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** do 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* index calculation for the coefficients */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia2 = ia1 + ia1; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia3 = ia2 + ia1; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** co1 = pCoef[ia1 * 2U]; 4244 .loc 9 93 0 4245 0058 249D ldr r5, [sp, #144] 4246 005a 269B ldr r3, [sp, #152] 4247 005c 2199 ldr r1, [sp, #132] 4248 005e 209C ldr r4, [sp, #128] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** co2 = pCoef[ia2 * 2U]; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** co3 = pCoef[ia3 * 2U]; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 4249 .loc 9 98 0 4250 0060 0594 str r4, [sp, #20] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 4251 .loc 9 93 0 4252 0062 95ED007B vldr.64 d7, [r5] 4253 0066 8DED0C7B vstr.64 d7, [sp, #48] 4254 .LVL381: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 4255 .loc 9 94 0 4256 006a 95ED027B vldr.64 d7, [r5, #8] 4257 .LVL382: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 4258 .loc 9 95 0 4259 006e 239D ldr r5, [sp, #140] 4260 .LVL383: 4261 .loc 9 98 0 4262 0070 0391 str r1, [sp, #12] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 4263 .loc 9 94 0 4264 0072 8DED0E7B vstr.64 d7, [sp, #56] 4265 .LVL384: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si2 = pCoef[(ia2 * 2U) + 1U]; ARM GAS /tmp/ccfbYRip.s page 192 4266 .loc 9 95 0 4267 0076 95ED007B vldr.64 d7, [r5] 4268 .LVL385: 4269 007a 8DED107B vstr.64 d7, [sp, #64] 4270 .LVL386: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** co3 = pCoef[ia3 * 2U]; 4271 .loc 9 96 0 4272 007e 95ED027B vldr.64 d7, [r5, #8] 4273 .LVL387: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 4274 .loc 9 97 0 4275 0082 229D ldr r5, [sp, #136] 4276 .LVL388: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** co3 = pCoef[ia3 * 2U]; 4277 .loc 9 96 0 4278 0084 8DED127B vstr.64 d7, [sp, #72] 4279 .LVL389: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 4280 .loc 9 97 0 4281 0088 95ED007B vldr.64 d7, [r5] 4282 .LVL390: 4283 008c 8DED147B vstr.64 d7, [sp, #80] 4284 .LVL391: 4285 .loc 9 98 0 4286 0090 95ED027B vldr.64 d7, [r5, #8] 4287 .LVL392: 4288 0094 259D ldr r5, [sp, #148] 4289 .LVL393: 4290 0096 5A18 adds r2, r3, r1 4291 0098 1819 adds r0, r3, r4 4292 009a 0792 str r2, [sp, #28] 4293 009c A0EB050B sub fp, r0, r5 4294 00a0 521B subs r2, r2, r5 4295 00a2 0292 str r2, [sp, #8] 4296 00a4 8DED1A7B vstr.64 d7, [sp, #104] 4297 .LVL394: 4298 00a8 1A44 add r2, r2, r3 4299 00aa 5B44 add r3, fp, r3 4300 00ac 0193 str r3, [sp, #4] 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Twiddle coefficients index modifier */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia1 = ia1 + twidCoefModifier; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** i0 = j; 4301 .loc 9 103 0 4302 00ae 1F9B ldr r3, [sp, #124] 4303 00b0 0490 str r0, [sp, #16] 4304 00b2 0692 str r2, [sp, #24] 4305 00b4 1C93 str r3, [sp, #112] 4306 .LVL395: 4307 .L226: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** do 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* index calculation for the input as, */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** i1 = i0 + n2; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** i2 = i1 + n2; ARM GAS /tmp/ccfbYRip.s page 193 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** i3 = i2 + n2; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xa + xc */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; 4308 .loc 9 113 0 discriminator 1 4309 00b6 059B ldr r3, [sp, #20] 4310 00b8 049A ldr r2, [sp, #16] 4311 00ba 53E90245 ldrd r4, [r3, #-8] 4312 00be 52E90267 ldrd r6, [r2, #-8] 4313 00c2 2046 mov r0, r4 4314 00c4 3246 mov r2, r6 4315 00c6 3B46 mov r3, r7 4316 00c8 2946 mov r1, r5 4317 00ca FFF7FEFF bl __aeabi_dadd 4318 .LVL396: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xa - xc */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; 4319 .loc 9 116 0 discriminator 1 4320 00ce 3246 mov r2, r6 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4321 .loc 9 113 0 discriminator 1 4322 00d0 8046 mov r8, r0 4323 00d2 8946 mov r9, r1 4324 .LVL397: 4325 .loc 9 116 0 discriminator 1 4326 00d4 3B46 mov r3, r7 4327 00d6 2046 mov r0, r4 4328 00d8 2946 mov r1, r5 4329 00da FFF7FEFF bl __aeabi_dsub 4330 .LVL398: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* ya + yc */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 4331 .loc 9 119 0 discriminator 1 4332 00de 079E ldr r6, [sp, #28] 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4333 .loc 9 116 0 discriminator 1 4334 00e0 CDE91601 strd r0, [sp, #88] 4335 .LVL399: 4336 .loc 9 119 0 discriminator 1 4337 00e4 0399 ldr r1, [sp, #12] 4338 00e6 D6E90267 ldrd r6, [r6, #8] 4339 00ea D1E90245 ldrd r4, [r1, #8] 4340 00ee 3246 mov r2, r6 4341 00f0 3B46 mov r3, r7 4342 00f2 2046 mov r0, r4 4343 00f4 2946 mov r1, r5 4344 00f6 FFF7FEFF bl __aeabi_dadd 4345 .LVL400: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* ya - yc */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 4346 .loc 9 122 0 discriminator 1 4347 00fa 3246 mov r2, r6 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4348 .loc 9 119 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 194 4349 00fc CDE90801 strd r0, [sp, #32] 4350 .LVL401: 4351 .loc 9 122 0 discriminator 1 4352 0100 3B46 mov r3, r7 4353 0102 2046 mov r0, r4 4354 0104 2946 mov r1, r5 4355 0106 FFF7FEFF bl __aeabi_dsub 4356 .LVL402: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xb + xd */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 4357 .loc 9 125 0 discriminator 1 4358 010a 019B ldr r3, [sp, #4] 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4359 .loc 9 122 0 discriminator 1 4360 010c CDE90A01 strd r0, [sp, #40] 4361 .LVL403: 4362 .loc 9 125 0 discriminator 1 4363 0110 53E90223 ldrd r2, [r3, #-8] 4364 0114 5BE90201 ldrd r0, [fp, #-8] 4365 0118 FFF7FEFF bl __aeabi_dadd 4366 .LVL404: 4367 011c 0446 mov r4, r0 4368 011e 0D46 mov r5, r1 4369 .LVL405: 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xa' = xa + xb + xc + xd */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2U * i0] = r1 + t1; 4370 .loc 9 128 0 discriminator 1 4371 0120 0246 mov r2, r0 4372 0122 0B46 mov r3, r1 4373 0124 4046 mov r0, r8 4374 0126 4946 mov r1, r9 4375 0128 FFF7FEFF bl __aeabi_dadd 4376 .LVL406: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xa + xc -(xb + xd) */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** r1 = r1 - t1; 4377 .loc 9 131 0 discriminator 1 4378 012c 2246 mov r2, r4 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4379 .loc 9 128 0 discriminator 1 4380 012e 059C ldr r4, [sp, #20] 4381 .LVL407: 4382 .loc 9 131 0 discriminator 1 4383 0130 2B46 mov r3, r5 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4384 .loc 9 128 0 discriminator 1 4385 0132 44E90201 strd r0, [r4, #-8] 4386 .loc 9 131 0 discriminator 1 4387 0136 4046 mov r0, r8 4388 0138 4946 mov r1, r9 4389 013a FFF7FEFF bl __aeabi_dsub 4390 .LVL408: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* yb + yd */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; ARM GAS /tmp/ccfbYRip.s page 195 4391 .loc 9 134 0 discriminator 1 4392 013e 069E ldr r6, [sp, #24] 4393 0140 029F ldr r7, [sp, #8] 4394 0142 D6E90223 ldrd r2, [r6, #8] 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4395 .loc 9 131 0 discriminator 1 4396 0146 8046 mov r8, r0 4397 .LVL409: 4398 0148 8946 mov r9, r1 4399 .LVL410: 4400 .loc 9 134 0 discriminator 1 4401 014a D7E90201 ldrd r0, [r7, #8] 4402 014e FFF7FEFF bl __aeabi_dadd 4403 .LVL411: 4404 0152 0446 mov r4, r0 4405 0154 0D46 mov r5, r1 4406 .LVL412: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* ya' = ya + yb + yc + yd */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[(2U * i0) + 1U] = s1 + t2; 4407 .loc 9 137 0 discriminator 1 4408 0156 0246 mov r2, r0 4409 0158 0B46 mov r3, r1 4410 015a DDE90801 ldrd r0, [sp, #32] 4411 015e FFF7FEFF bl __aeabi_dadd 4412 .LVL413: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (ya + yc) - (yb + yd) */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** s1 = s1 - t2; 4413 .loc 9 140 0 discriminator 1 4414 0162 2246 mov r2, r4 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4415 .loc 9 137 0 discriminator 1 4416 0164 039C ldr r4, [sp, #12] 4417 .LVL414: 4418 .loc 9 140 0 discriminator 1 4419 0166 2B46 mov r3, r5 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4420 .loc 9 137 0 discriminator 1 4421 0168 C4E90201 strd r0, [r4, #8] 4422 .loc 9 140 0 discriminator 1 4423 016c DDE90801 ldrd r0, [sp, #32] 4424 0170 FFF7FEFF bl __aeabi_dsub 4425 .LVL415: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (yb - yd) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 4426 .loc 9 143 0 discriminator 1 4427 0174 D6E90223 ldrd r2, [r6, #8] 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4428 .loc 9 140 0 discriminator 1 4429 0178 0446 mov r4, r0 4430 017a 0D46 mov r5, r1 4431 .LVL416: 4432 .loc 9 143 0 discriminator 1 4433 017c 0696 str r6, [sp, #24] 4434 017e 0297 str r7, [sp, #8] ARM GAS /tmp/ccfbYRip.s page 196 4435 0180 D7E90201 ldrd r0, [r7, #8] 4436 0184 FFF7FEFF bl __aeabi_dsub 4437 .LVL417: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (xb - xd) */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 4438 .loc 9 146 0 discriminator 1 4439 0188 019A ldr r2, [sp, #4] 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4440 .loc 9 143 0 discriminator 1 4441 018a 0646 mov r6, r0 4442 .loc 9 146 0 discriminator 1 4443 018c 52E90223 ldrd r2, [r2, #-8] 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4444 .loc 9 143 0 discriminator 1 4445 0190 0F46 mov r7, r1 4446 .LVL418: 4447 .loc 9 146 0 discriminator 1 4448 0192 5BE90201 ldrd r0, [fp, #-8] 4449 0196 FFF7FEFF bl __aeabi_dsub 4450 .LVL419: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2U * i1] = (r1 * co2) + (s1 * si2); 4451 .loc 9 149 0 discriminator 1 4452 019a 4246 mov r2, r8 4453 019c 4B46 mov r3, r9 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4454 .loc 9 146 0 discriminator 1 4455 019e CDE90801 strd r0, [sp, #32] 4456 .LVL420: 4457 .loc 9 149 0 discriminator 1 4458 01a2 DDE91001 ldrd r0, [sp, #64] 4459 01a6 FFF7FEFF bl __aeabi_dmul 4460 .LVL421: 4461 01aa 2246 mov r2, r4 4462 01ac 2B46 mov r3, r5 4463 01ae CDE91801 strd r0, [sp, #96] 4464 01b2 DDE91201 ldrd r0, [sp, #72] 4465 01b6 FFF7FEFF bl __aeabi_dmul 4466 .LVL422: 4467 01ba 0246 mov r2, r0 4468 01bc 0B46 mov r3, r1 4469 01be DDE91801 ldrd r0, [sp, #96] 4470 01c2 FFF7FEFF bl __aeabi_dadd 4471 .LVL423: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2); 4472 .loc 9 152 0 discriminator 1 4473 01c6 2246 mov r2, r4 4474 01c8 2B46 mov r3, r5 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4475 .loc 9 149 0 discriminator 1 4476 01ca 4BE90201 strd r0, [fp, #-8] 4477 .loc 9 152 0 discriminator 1 4478 01ce DDE91001 ldrd r0, [sp, #64] ARM GAS /tmp/ccfbYRip.s page 197 4479 01d2 FFF7FEFF bl __aeabi_dmul 4480 .LVL424: 4481 01d6 4246 mov r2, r8 4482 01d8 0446 mov r4, r0 4483 .LVL425: 4484 01da 0D46 mov r5, r1 4485 01dc 4B46 mov r3, r9 4486 01de DDE91201 ldrd r0, [sp, #72] 4487 01e2 FFF7FEFF bl __aeabi_dmul 4488 .LVL426: 4489 01e6 0246 mov r2, r0 4490 01e8 0B46 mov r3, r1 4491 01ea 2046 mov r0, r4 4492 01ec 2946 mov r1, r5 4493 01ee FFF7FEFF bl __aeabi_dsub 4494 .LVL427: 4495 01f2 029C ldr r4, [sp, #8] 4496 01f4 C4E90201 strd r0, [r4, #8] 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (xa - xc) + (yb - yd) */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** r1 = r2 + t1; 4497 .loc 9 155 0 discriminator 1 4498 01f8 DDE91645 ldrd r4, [sp, #88] 4499 01fc 3246 mov r2, r6 4500 01fe 3B46 mov r3, r7 4501 0200 2046 mov r0, r4 4502 0202 2946 mov r1, r5 4503 0204 FFF7FEFF bl __aeabi_dadd 4504 .LVL428: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (xa - xc) - (yb - yd) */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** r2 = r2 - t1; 4505 .loc 9 158 0 discriminator 1 4506 0208 3246 mov r2, r6 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4507 .loc 9 155 0 discriminator 1 4508 020a 8046 mov r8, r0 4509 .LVL429: 4510 020c 8946 mov r9, r1 4511 .LVL430: 4512 .loc 9 158 0 discriminator 1 4513 020e 3B46 mov r3, r7 4514 0210 2046 mov r0, r4 4515 0212 2946 mov r1, r5 4516 0214 FFF7FEFF bl __aeabi_dsub 4517 .LVL431: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (ya - yc) - (xb - xd) */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** s1 = s2 - t2; 4518 .loc 9 161 0 discriminator 1 4519 0218 DDE90823 ldrd r2, [sp, #32] 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4520 .loc 9 158 0 discriminator 1 4521 021c 0646 mov r6, r0 4522 .LVL432: 4523 021e 0F46 mov r7, r1 4524 .LVL433: ARM GAS /tmp/ccfbYRip.s page 198 4525 .loc 9 161 0 discriminator 1 4526 0220 DDE90A01 ldrd r0, [sp, #40] 4527 0224 FFF7FEFF bl __aeabi_dsub 4528 .LVL434: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* (ya - yc) + (xb - xd) */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** s2 = s2 + t2; 4529 .loc 9 164 0 discriminator 1 4530 0228 DDE90823 ldrd r2, [sp, #32] 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4531 .loc 9 161 0 discriminator 1 4532 022c 0446 mov r4, r0 4533 022e 0D46 mov r5, r1 4534 .LVL435: 4535 .loc 9 164 0 discriminator 1 4536 0230 DDE90A01 ldrd r0, [sp, #40] 4537 0234 FFF7FEFF bl __aeabi_dadd 4538 .LVL436: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2U * i2] = (r1 * co1) + (s1 * si1); 4539 .loc 9 167 0 discriminator 1 4540 0238 4246 mov r2, r8 4541 023a 4B46 mov r3, r9 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4542 .loc 9 164 0 discriminator 1 4543 023c CDE90801 strd r0, [sp, #32] 4544 .LVL437: 4545 .loc 9 167 0 discriminator 1 4546 0240 DDE90C01 ldrd r0, [sp, #48] 4547 0244 FFF7FEFF bl __aeabi_dmul 4548 .LVL438: 4549 0248 2246 mov r2, r4 4550 024a 2B46 mov r3, r5 4551 024c CDE90A01 strd r0, [sp, #40] 4552 0250 DDE90E01 ldrd r0, [sp, #56] 4553 0254 FFF7FEFF bl __aeabi_dmul 4554 .LVL439: 4555 0258 0246 mov r2, r0 4556 025a 0B46 mov r3, r1 4557 025c DDE90A01 ldrd r0, [sp, #40] 4558 0260 FFF7FEFF bl __aeabi_dadd 4559 .LVL440: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1); 4560 .loc 9 170 0 discriminator 1 4561 0264 2B46 mov r3, r5 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4562 .loc 9 167 0 discriminator 1 4563 0266 049D ldr r5, [sp, #16] 4564 .loc 9 170 0 discriminator 1 4565 0268 2246 mov r2, r4 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4566 .loc 9 167 0 discriminator 1 4567 026a 45E90201 strd r0, [r5, #-8] 4568 .loc 9 170 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 199 4569 026e DDE90C01 ldrd r0, [sp, #48] 4570 0272 FFF7FEFF bl __aeabi_dmul 4571 .LVL441: 4572 0276 4246 mov r2, r8 4573 0278 0446 mov r4, r0 4574 .LVL442: 4575 027a 0D46 mov r5, r1 4576 027c 4B46 mov r3, r9 4577 027e DDE90E01 ldrd r0, [sp, #56] 4578 0282 FFF7FEFF bl __aeabi_dmul 4579 .LVL443: 4580 0286 0246 mov r2, r0 4581 0288 0B46 mov r3, r1 4582 028a 2046 mov r0, r4 4583 028c 2946 mov r1, r5 4584 028e FFF7FEFF bl __aeabi_dsub 4585 .LVL444: 4586 0292 079D ldr r5, [sp, #28] 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2U * i3] = (r2 * co3) + (s2 * si3); 4587 .loc 9 173 0 discriminator 1 4588 0294 3246 mov r2, r6 4589 0296 3B46 mov r3, r7 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4590 .loc 9 170 0 discriminator 1 4591 0298 C5E90201 strd r0, [r5, #8] 4592 .loc 9 173 0 discriminator 1 4593 029c DDE91401 ldrd r0, [sp, #80] 4594 02a0 FFF7FEFF bl __aeabi_dmul 4595 .LVL445: 4596 02a4 DDE91A89 ldrd r8, [sp, #104] 4597 .LVL446: 4598 02a8 DDE90823 ldrd r2, [sp, #32] 4599 02ac 0446 mov r4, r0 4600 02ae 0D46 mov r5, r1 4601 02b0 4046 mov r0, r8 4602 02b2 4946 mov r1, r9 4603 02b4 FFF7FEFF bl __aeabi_dmul 4604 .LVL447: 4605 02b8 0246 mov r2, r0 4606 02ba 0B46 mov r3, r1 4607 02bc 2046 mov r0, r4 4608 02be 2946 mov r1, r5 4609 02c0 FFF7FEFF bl __aeabi_dadd 4610 .LVL448: 4611 02c4 019C ldr r4, [sp, #4] 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3); 4612 .loc 9 176 0 discriminator 1 4613 02c6 DDE90823 ldrd r2, [sp, #32] 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4614 .loc 9 173 0 discriminator 1 4615 02ca 44E90201 strd r0, [r4, #-8] 4616 .loc 9 176 0 discriminator 1 4617 02ce DDE91401 ldrd r0, [sp, #80] ARM GAS /tmp/ccfbYRip.s page 200 4618 02d2 FFF7FEFF bl __aeabi_dmul 4619 .LVL449: 4620 02d6 3246 mov r2, r6 4621 02d8 0446 mov r4, r0 4622 02da 0D46 mov r5, r1 4623 02dc 3B46 mov r3, r7 4624 02de 4046 mov r0, r8 4625 02e0 4946 mov r1, r9 4626 02e2 FFF7FEFF bl __aeabi_dmul 4627 .LVL450: 4628 02e6 0246 mov r2, r0 4629 02e8 0B46 mov r3, r1 4630 02ea 2046 mov r0, r4 4631 02ec 2946 mov r1, r5 4632 02ee FFF7FEFF bl __aeabi_dsub 4633 .LVL451: 4634 02f2 059B ldr r3, [sp, #20] 4635 02f4 049D ldr r5, [sp, #16] 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** i0 += n1; 4636 .loc 9 178 0 discriminator 1 4637 02f6 DDE91C27 ldrd r2, r7, [sp, #112] 4638 02fa 5344 add r3, r3, r10 4639 02fc 0593 str r3, [sp, #20] 4640 02fe 039B ldr r3, [sp, #12] 4641 0300 3A44 add r2, r2, r7 4642 0302 029F ldr r7, [sp, #8] 4643 0304 1C92 str r2, [sp, #112] 4644 .LVL452: 4645 0306 5344 add r3, r3, r10 4646 0308 0393 str r3, [sp, #12] 4647 030a 07EB0A03 add r3, r7, r10 4648 030e 0293 str r3, [sp, #8] 4649 0310 2B46 mov r3, r5 4650 0312 079D ldr r5, [sp, #28] 4651 0314 5344 add r3, r3, r10 4652 0316 0493 str r3, [sp, #16] 4653 0318 05EB0A03 add r3, r5, r10 4654 031c 0793 str r3, [sp, #28] 4655 031e 019C ldr r4, [sp, #4] 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4656 .loc 9 176 0 discriminator 1 4657 0320 069E ldr r6, [sp, #24] 4658 .LVL453: 4659 0322 04EB0A03 add r3, r4, r10 4660 0326 0193 str r3, [sp, #4] 4661 0328 06EB0A03 add r3, r6, r10 4662 032c 0693 str r3, [sp, #24] 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } while ( i0 < fftLen); 4663 .loc 9 179 0 discriminator 1 4664 032e 1E9B ldr r3, [sp, #120] 4665 0330 9342 cmp r3, r2 4666 0332 D344 add fp, fp, r10 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4667 .loc 9 176 0 discriminator 1 4668 0334 C6E90201 strd r0, [r6, #8] 4669 .loc 9 179 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 201 4670 0338 3FF6BDAE bhi .L226 4671 033c 249A ldr r2, [sp, #144] 4672 .LVL454: 4673 033e 2899 ldr r1, [sp, #160] 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** j++; 4674 .loc 9 180 0 4675 0340 1F9B ldr r3, [sp, #124] 4676 0342 0A44 add r2, r2, r1 4677 0344 2492 str r2, [sp, #144] 4678 0346 2799 ldr r1, [sp, #156] 4679 0348 239A ldr r2, [sp, #140] 4680 034a 0A44 add r2, r2, r1 4681 034c 2392 str r2, [sp, #140] 4682 034e 2A99 ldr r1, [sp, #168] 4683 0350 229A ldr r2, [sp, #136] 4684 0352 0A44 add r2, r2, r1 4685 0354 2292 str r2, [sp, #136] 4686 0356 219A ldr r2, [sp, #132] 4687 0358 1032 adds r2, r2, #16 4688 035a 2192 str r2, [sp, #132] 4689 035c 209A ldr r2, [sp, #128] 4690 035e 1032 adds r2, r2, #16 4691 0360 2092 str r2, [sp, #128] 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } while (j <= (n2 - 1U)); 4692 .loc 9 181 0 4693 0362 299A ldr r2, [sp, #164] 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** j++; 4694 .loc 9 180 0 4695 0364 0133 adds r3, r3, #1 4696 .loc 9 181 0 4697 0366 9342 cmp r3, r2 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** j++; 4698 .loc 9 180 0 4699 0368 1F93 str r3, [sp, #124] 4700 .LVL455: 4701 .loc 9 181 0 4702 036a 7FF675AE bls .L227 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** twidCoefModifier <<= 2U; 4703 .loc 9 182 0 discriminator 2 4704 036e 2B9B ldr r3, [sp, #172] 4705 .LVL456: 4706 0370 2C9A ldr r2, [sp, #176] 4707 0372 1D92 str r2, [sp, #116] 4708 .LVL457: 4709 0374 9B00 lsls r3, r3, #2 4710 0376 9BB2 uxth r3, r3 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4711 .loc 9 79 0 discriminator 2 4712 0378 012A cmp r2, #1 4713 .loc 9 182 0 discriminator 2 4714 037a 2B93 str r3, [sp, #172] 4715 .LVL458: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4716 .loc 9 79 0 discriminator 2 4717 037c 3FF64EAE bhi .L228 4718 .LVL459: 4719 .L224: ARM GAS /tmp/ccfbYRip.s page 202 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } 4720 .loc 9 184 0 4721 0380 31B0 add sp, sp, #196 4722 .LCFI54: 4723 .cfi_def_cfa_offset 36 4724 @ sp needed 4725 0382 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 4726 .cfi_endproc 4727 .LFE157: 4729 0386 00BF .section .text.arm_cfft_radix4by2_f64,"ax",%progbits 4730 .align 1 4731 .p2align 2,,3 4732 .global arm_cfft_radix4by2_f64 4733 .syntax unified 4734 .thumb 4735 .thumb_func 4736 .fpu fpv4-sp-d16 4738 arm_cfft_radix4by2_f64: 4739 .LFB158: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @brief Core function for the Double Precision floating-point CFFT butterfly process. 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in, out] *pSrc points to the in-place buffer of F64 data type. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] fftLen length of the FFT. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] *pCoef points to the twiddle coefficient buffer. 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs w 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** * @return none. 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** void arm_cfft_radix4by2_f64( 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t * pSrc, 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t fftLen, 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const float64_t * pCoef) 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4740 .loc 9 199 0 4741 .cfi_startproc 4742 @ args = 0, pretend = 0, frame = 56 4743 @ frame_needed = 0, uses_anonymous_args = 0 4744 .LVL460: 4745 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 4746 .LCFI55: 4747 .cfi_def_cfa_offset 36 4748 .cfi_offset 4, -36 4749 .cfi_offset 5, -32 4750 .cfi_offset 6, -28 4751 .cfi_offset 7, -24 4752 .cfi_offset 8, -20 4753 .cfi_offset 9, -16 4754 .cfi_offset 10, -12 4755 .cfi_offset 11, -8 4756 .cfi_offset 14, -4 4757 0004 8FB0 sub sp, sp, #60 4758 .LCFI56: 4759 .cfi_def_cfa_offset 96 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t i, l; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t n2, ia; ARM GAS /tmp/ccfbYRip.s page 203 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t xt, yt, cosVal, sinVal; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t p0, p1,p2,p3,a0,a1; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** n2 = fftLen >> 1; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia = 0; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** for (i = 0; i < n2; i++) 4760 .loc 9 207 0 4761 0006 4B08 lsrs r3, r1, #1 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t i, l; 4762 .loc 9 199 0 4763 0008 CDE90B01 strd r0, r1, [sp, #44] 4764 000c 0D92 str r2, [sp, #52] 4765 .loc 9 207 0 4766 000e 0A93 str r3, [sp, #40] 4767 0010 77D0 beq .L234 4768 0012 1B01 lsls r3, r3, #4 4769 0014 00EB030A add r10, r0, r3 4770 0018 0833 adds r3, r3, #8 4771 001a C518 adds r5, r0, r3 4772 001c D146 mov r9, r10 4773 001e 8346 mov fp, r0 4774 0020 00F10804 add r4, r0, #8 4775 0024 9046 mov r8, r2 4776 .LVL461: 4777 .L235: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** cosVal = pCoef[2*ia]; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** sinVal = pCoef[2*ia + 1]; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia++; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** l = i + n2; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Butterfly implementation */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 4778 .loc 9 216 0 discriminator 3 4779 0026 14ED027B vldr.64 d7, [r4, #-8] 4780 002a 8DED007B vstr.64 d7, [sp] 4781 002e 15ED027B vldr.64 d7, [r5, #-8] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 4782 .loc 9 217 0 discriminator 3 4783 0032 DDE90001 ldrd r0, [sp] 4784 0036 53EC172B vmov r2, r3, d7 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 4785 .loc 9 216 0 discriminator 3 4786 003a 8DED027B vstr.64 d7, [sp, #8] 4787 .loc 9 217 0 discriminator 3 4788 003e FFF7FEFF bl __aeabi_dsub 4789 .LVL462: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 4790 .loc 9 219 0 discriminator 3 4791 0042 9BED027B vldr.64 d7, [fp, #8] 4792 0046 DAE90267 ldrd r6, [r10, #8] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4793 .loc 9 217 0 discriminator 3 4794 004a CDE90601 strd r0, [sp, #24] 4795 .loc 9 219 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 204 4796 004e 3246 mov r2, r6 4797 0050 51EC170B vmov r0, r1, d7 4798 0054 3B46 mov r3, r7 4799 0056 8DED047B vstr.64 d7, [sp, #16] 4800 005a FFF7FEFF bl __aeabi_dsub 4801 .LVL463: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 4802 .loc 9 216 0 discriminator 3 4803 005e DDE90223 ldrd r2, [sp, #8] 4804 .loc 9 219 0 discriminator 3 4805 0062 CDE90801 strd r0, [sp, #32] 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 4806 .loc 9 216 0 discriminator 3 4807 0066 DDE90001 ldrd r0, [sp] 4808 006a FFF7FEFF bl __aeabi_dadd 4809 .LVL464: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** sinVal = pCoef[2*ia + 1]; 4810 .loc 9 209 0 discriminator 3 4811 006e 98ED007B vldr.64 d7, [r8] 4812 0072 8DED007B vstr.64 d7, [sp] 4813 .LVL465: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia++; 4814 .loc 9 210 0 discriminator 3 4815 0076 98ED027B vldr.64 d7, [r8, #8] 4816 .LVL466: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 4817 .loc 9 220 0 discriminator 3 4818 007a 3246 mov r2, r6 4819 007c 3B46 mov r3, r7 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p0 = xt * cosVal; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p1 = yt * sinVal; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p2 = yt * cosVal; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p3 = xt * sinVal; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2 * i] = a0; 4820 .loc 9 227 0 discriminator 3 4821 007e 44E90201 strd r0, [r4, #-8] 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 4822 .loc 9 220 0 discriminator 3 4823 0082 DDE90401 ldrd r0, [sp, #16] 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** ia++; 4824 .loc 9 210 0 discriminator 3 4825 0086 8DED027B vstr.64 d7, [sp, #8] 4826 .LVL467: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 4827 .loc 9 220 0 discriminator 3 4828 008a FFF7FEFF bl __aeabi_dadd 4829 .LVL468: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p1 = yt * sinVal; 4830 .loc 9 222 0 discriminator 3 4831 008e DDE90623 ldrd r2, [sp, #24] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2 * i + 1] = a1; 4832 .loc 9 228 0 discriminator 3 4833 0092 CBE90201 strd r0, [fp, #8] 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p1 = yt * sinVal; 4834 .loc 9 222 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 205 4835 0096 DDE90001 ldrd r0, [sp] 4836 009a FFF7FEFF bl __aeabi_dmul 4837 .LVL469: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p2 = yt * cosVal; 4838 .loc 9 223 0 discriminator 3 4839 009e DDE90823 ldrd r2, [sp, #32] 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p1 = yt * sinVal; 4840 .loc 9 222 0 discriminator 3 4841 00a2 0646 mov r6, r0 4842 .LVL470: 4843 00a4 0F46 mov r7, r1 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p2 = yt * cosVal; 4844 .loc 9 223 0 discriminator 3 4845 00a6 DDE90201 ldrd r0, [sp, #8] 4846 00aa FFF7FEFF bl __aeabi_dmul 4847 .LVL471: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2 * l] = p0 + p1; 4848 .loc 9 230 0 discriminator 3 4849 00ae 0246 mov r2, r0 4850 00b0 0B46 mov r3, r1 4851 00b2 3046 mov r0, r6 4852 00b4 3946 mov r1, r7 4853 00b6 FFF7FEFF bl __aeabi_dadd 4854 .LVL472: 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p3 = xt * sinVal; 4855 .loc 9 224 0 discriminator 3 4856 00ba DDE90823 ldrd r2, [sp, #32] 4857 .loc 9 230 0 discriminator 3 4858 00be 45E90201 strd r0, [r5, #-8] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p3 = xt * sinVal; 4859 .loc 9 224 0 discriminator 3 4860 00c2 DDE90001 ldrd r0, [sp] 4861 00c6 FFF7FEFF bl __aeabi_dmul 4862 .LVL473: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4863 .loc 9 225 0 discriminator 3 4864 00ca DDE90623 ldrd r2, [sp, #24] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** p3 = xt * sinVal; 4865 .loc 9 224 0 discriminator 3 4866 00ce 0646 mov r6, r0 4867 00d0 0F46 mov r7, r1 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4868 .loc 9 225 0 discriminator 3 4869 00d2 DDE90201 ldrd r0, [sp, #8] 4870 00d6 FFF7FEFF bl __aeabi_dmul 4871 .LVL474: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc[2 * l + 1] = p2 - p3; 4872 .loc 9 231 0 discriminator 3 4873 00da 0246 mov r2, r0 4874 00dc 0B46 mov r3, r1 4875 00de 3046 mov r0, r6 4876 00e0 3946 mov r1, r7 4877 00e2 FFF7FEFF bl __aeabi_dsub 4878 .LVL475: 4879 00e6 0BF1100B add fp, fp, #16 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { ARM GAS /tmp/ccfbYRip.s page 206 4880 .loc 9 207 0 discriminator 3 4881 00ea D945 cmp r9, fp 4882 .loc 9 231 0 discriminator 3 4883 00ec CAE90201 strd r0, [r10, #8] 4884 .LVL476: 4885 00f0 08F11008 add r8, r8, #16 4886 00f4 04F11004 add r4, r4, #16 4887 00f8 05F11005 add r5, r5, #16 4888 00fc 0AF1100A add r10, r10, #16 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4889 .loc 9 207 0 discriminator 3 4890 0100 91D1 bne .L235 4891 .LVL477: 4892 .L234: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** // first col 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** arm_radix4_butterfly_f64( pSrc, n2, (float64_t*)pCoef, 2U); 4893 .loc 9 236 0 4894 0102 BDF82840 ldrh r4, [sp, #40] 4895 0106 0D9E ldr r6, [sp, #52] 4896 0108 0B9D ldr r5, [sp, #44] 4897 010a 2146 mov r1, r4 4898 010c 3246 mov r2, r6 4899 010e 2846 mov r0, r5 4900 0110 0223 movs r3, #2 4901 0112 FFF7FEFF bl arm_radix4_butterfly_f64 4902 .LVL478: 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** // second col 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** arm_radix4_butterfly_f64( pSrc + fftLen, n2, (float64_t*)pCoef, 2U); 4903 .loc 9 238 0 4904 0116 0C98 ldr r0, [sp, #48] 4905 0118 2146 mov r1, r4 4906 011a 3246 mov r2, r6 4907 011c 05EBC000 add r0, r5, r0, lsl #3 4908 0120 0223 movs r3, #2 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } 4909 .loc 9 240 0 4910 0122 0FB0 add sp, sp, #60 4911 .LCFI57: 4912 .cfi_def_cfa_offset 36 4913 @ sp needed 4914 0124 BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} 4915 .LCFI58: 4916 .cfi_restore 14 4917 .cfi_restore 11 4918 .cfi_restore 10 4919 .cfi_restore 9 4920 .cfi_restore 8 4921 .cfi_restore 7 4922 .cfi_restore 6 4923 .cfi_restore 5 4924 .cfi_restore 4 4925 .cfi_def_cfa_offset 0 4926 .LVL479: ARM GAS /tmp/ccfbYRip.s page 207 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 4927 .loc 9 238 0 4928 0128 FFF7FEBF b arm_radix4_butterfly_f64 4929 .LVL480: 4930 .cfi_endproc 4931 .LFE158: 4933 .global __aeabi_ui2d 4934 .global __aeabi_ddiv 4935 .section .text.arm_cfft_f64,"ax",%progbits 4936 .align 1 4937 .p2align 2,,3 4938 .global arm_cfft_f64 4939 .syntax unified 4940 .thumb 4941 .thumb_func 4942 .fpu fpv4-sp-d16 4944 arm_cfft_f64: 4945 .LFB159: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @addtogroup ComplexFFT 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @{ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @brief Processing function for the Double Precision floating-point complex FFT. 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @param[in] S points to an instance of the Double Precision floating-point CFFT s 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Pr 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @param[in] ifftFlag flag that selects transform direction 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** - value = 0: forward transform 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** - value = 1: inverse transform 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** - value = 0: disables bit reversal of output 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** - value = 1: enables bit reversal of output 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** @return none 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** void arm_cfft_f64( 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** const arm_cfft_instance_f64 * S, 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t * p1, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint8_t ifftFlag, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint8_t bitReverseFlag) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 4946 .loc 9 265 0 4947 .cfi_startproc 4948 @ args = 0, pretend = 0, frame = 0 4949 @ frame_needed = 0, uses_anonymous_args = 0 4950 .LVL481: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t L = S->fftLen, l; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t invL, * pSrc; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** if (ifftFlag == 1U) 4951 .loc 9 269 0 4952 0000 012A cmp r2, #1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t L = S->fftLen, l; 4953 .loc 9 265 0 4954 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} ARM GAS /tmp/ccfbYRip.s page 208 4955 .LCFI59: 4956 .cfi_def_cfa_offset 32 4957 .cfi_offset 4, -32 4958 .cfi_offset 5, -28 4959 .cfi_offset 6, -24 4960 .cfi_offset 7, -20 4961 .cfi_offset 8, -16 4962 .cfi_offset 9, -12 4963 .cfi_offset 10, -8 4964 .cfi_offset 14, -4 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t L = S->fftLen, l; 4965 .loc 9 265 0 4966 0006 0646 mov r6, r0 4967 0008 9046 mov r8, r2 4968 000a 0C46 mov r4, r1 4969 000c 1F46 mov r7, r3 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** uint32_t L = S->fftLen, l; 4970 .loc 9 266 0 4971 000e 0588 ldrh r5, [r0] 4972 .LVL482: 4973 .loc 9 269 0 4974 0010 00F09180 beq .L296 4975 .LVL483: 4976 .L242: 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Conjugate input data */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc = p1 + 1; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** for(l=0; lpTwiddle, 1U); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** case 32: ARM GAS /tmp/ccfbYRip.s page 209 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** case 128: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** case 512: 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** case 2048: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** arm_cfft_radix4by2_f64 ( p1, L, (float64_t*)S->pTwiddle); 4989 .loc 9 294 0 4990 002c 7268 ldr r2, [r6, #4] 4991 002e 2946 mov r1, r5 4992 0030 2046 mov r0, r4 4993 .LVL484: 4994 0032 FFF7FEFF bl arm_cfft_radix4by2_f64 4995 .LVL485: 4996 .L245: 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** } 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** if ( bitReverseFlag ) 4997 .loc 9 299 0 4998 0036 BFB9 cbnz r7, .L255 4999 .L251: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** arm_bitreversal_64((uint64_t*)p1, S->bitRevLength,S->pBitRevTable); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** if (ifftFlag == 1U) 5000 .loc 9 302 0 5001 0038 B8F1010F cmp r8, #1 5002 003c 51D0 beq .L298 5003 .LVL486: 5004 .L241: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** invL = 1.0 / (float64_t)L; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Conjugate and scale output data */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc = p1; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** for(l=0; lbitRevLength,S->pBitRevTable); 5026 .loc 9 299 0 5027 0064 002F cmp r7, #0 5028 0066 E7D0 beq .L251 5029 .L255: 5030 .LBB1358: 5031 .LBB1359: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 5032 .loc 8 48 0 5033 0068 B6F80C90 ldrh r9, [r6, #12] 5034 .LBE1359: 5035 .LBE1358: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 5036 .loc 9 300 0 5037 006c B168 ldr r1, [r6, #8] 5038 .LBB1361: 5039 .LBB1360: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 5040 .loc 8 48 0 5041 006e 4FF0000A mov r10, #0 5042 .LVL490: 5043 0072 59EA0A03 orrs r3, r9, r10 5044 0076 DFD0 beq .L251 5045 0078 19F1FF32 adds r2, r9, #-1 5046 007c 4AF1FF33 adc r3, r10, #-1 5047 0080 5B08 movs r3, r3, lsr #1 5048 0082 4FEA3202 mov r2, r2, rrx 5049 0086 01F1040E add lr, r1, #4 5050 008a 8C46 mov ip, r1 5051 008c 0EEB820E add lr, lr, r2, lsl #2 5052 .LVL491: 5053 .L252: 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 5054 .loc 8 50 0 5055 0090 BCF80070 ldrh r7, [ip] 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 5056 .loc 8 51 0 5057 0094 BCF80260 ldrh r6, [ip, #2] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 5058 .loc 8 54 0 5059 0098 BF08 lsrs r7, r7, #2 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 5060 .loc 8 55 0 5061 009a B608 lsrs r6, r6, #2 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 5062 .loc 8 54 0 5063 009c FF00 lsls r7, r7, #3 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 5064 .loc 8 55 0 5065 009e F600 lsls r6, r6, #3 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; ARM GAS /tmp/ccfbYRip.s page 211 5066 .loc 8 54 0 5067 00a0 04EB070A add r10, r4, r7 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 5068 .loc 8 55 0 5069 00a4 04EB0609 add r9, r4, r6 5070 00a8 D9E90023 ldrd r2, [r9] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 5071 .loc 8 54 0 5072 00ac DAE90001 ldrd r0, [r10] 5073 .LVL492: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 5074 .loc 8 55 0 5075 00b0 CAE90023 strd r2, [r10] 5076 .LVL493: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 5077 .loc 8 56 0 5078 00b4 C9E90001 strd r0, [r9] 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 5079 .loc 8 59 0 5080 00b8 07F10802 add r2, r7, #8 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 5081 .loc 8 60 0 5082 00bc 06F10803 add r3, r6, #8 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 5083 .loc 8 59 0 5084 00c0 2244 add r2, r2, r4 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 5085 .loc 8 60 0 5086 00c2 2344 add r3, r3, r4 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 5087 .loc 8 59 0 5088 00c4 D2E90067 ldrd r6, [r2] 5089 .LVL494: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 5090 .loc 8 60 0 5091 00c8 D3E90001 ldrd r0, [r3] 5092 00cc 0CF1040C add ip, ip, #4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 5093 .loc 8 48 0 5094 00d0 E645 cmp lr, ip 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 5095 .loc 8 60 0 5096 00d2 C2E90001 strd r0, [r2] 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 5097 .loc 8 61 0 5098 00d6 C3E90067 strd r6, [r3] 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 5099 .loc 8 48 0 5100 00da D9D1 bne .L252 5101 .LBE1360: 5102 .LBE1361: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5103 .loc 9 302 0 5104 00dc B8F1010F cmp r8, #1 5105 00e0 ADD1 bne .L241 5106 .LVL495: 5107 .L298: ARM GAS /tmp/ccfbYRip.s page 212 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Conjugate and scale output data */ 5108 .loc 9 304 0 5109 00e2 2846 mov r0, r5 5110 00e4 FFF7FEFF bl __aeabi_ui2d 5111 .LVL496: 5112 00e8 0246 mov r2, r0 5113 00ea 0B46 mov r3, r1 5114 00ec 0020 movs r0, #0 5115 00ee 2049 ldr r1, .L300 5116 00f0 FFF7FEFF bl __aeabi_ddiv 5117 .LVL497: 5118 00f4 0646 mov r6, r0 5119 00f6 0F46 mov r7, r1 5120 .LVL498: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5121 .loc 9 307 0 5122 00f8 002D cmp r5, #0 5123 00fa A0D0 beq .L241 5124 00fc 1034 adds r4, r4, #16 5125 .LVL499: 5126 00fe 4FF00008 mov r8, #0 5127 .LVL500: 5128 .L254: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** *pSrc = -(*pSrc) * invL; 5129 .loc 9 309 0 discriminator 3 5130 0102 54E90401 ldrd r0, [r4, #-16] 5131 0106 3246 mov r2, r6 5132 0108 3B46 mov r3, r7 5133 010a FFF7FEFF bl __aeabi_dmul 5134 .LVL501: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 5135 .loc 9 310 0 discriminator 3 5136 010e 54E90223 ldrd r2, [r4, #-8] 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** *pSrc = -(*pSrc) * invL; 5137 .loc 9 309 0 discriminator 3 5138 0112 44E90401 strd r0, [r4, #-16] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 5139 .loc 9 310 0 discriminator 3 5140 0116 3046 mov r0, r6 5141 0118 3946 mov r1, r7 5142 011a FFF7FEFF bl __aeabi_dmul 5143 .LVL502: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5144 .loc 9 307 0 discriminator 3 5145 011e 08F10108 add r8, r8, #1 5146 .LVL503: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 5147 .loc 9 310 0 discriminator 3 5148 0122 01F10043 add r3, r1, #-2147483648 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5149 .loc 9 307 0 discriminator 3 5150 0126 4545 cmp r5, r8 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 5151 .loc 9 310 0 discriminator 3 5152 0128 44E90203 strd r0, r3, [r4, #-8] 5153 .LVL504: 5154 012c 04F11004 add r4, r4, #16 ARM GAS /tmp/ccfbYRip.s page 213 5155 .LVL505: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5156 .loc 9 307 0 discriminator 3 5157 0130 E7D1 bne .L254 5158 .loc 9 314 0 5159 0132 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 5160 .LVL506: 5161 .L296: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5162 .loc 9 273 0 5163 0136 BDB1 cbz r5, .L243 5164 0138 01F11803 add r3, r1, #24 5165 .LVL507: 5166 013c 0021 movs r1, #0 5167 .LVL508: 5168 .L244: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 5169 .loc 9 275 0 discriminator 3 5170 013e 53F80C2C ldr r2, [r3, #-12] 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5171 .loc 9 273 0 discriminator 3 5172 0142 0131 adds r1, r1, #1 5173 .LVL509: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 5174 .loc 9 275 0 discriminator 3 5175 0144 02F10042 add r2, r2, #-2147483648 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5176 .loc 9 273 0 discriminator 3 5177 0148 8D42 cmp r5, r1 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 5178 .loc 9 275 0 discriminator 3 5179 014a 43F80C2C str r2, [r3, #-12] 5180 .LVL510: 5181 014e 03F11003 add r3, r3, #16 5182 .LVL511: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5183 .loc 9 273 0 discriminator 3 5184 0152 F4D1 bne .L244 5185 0154 5EE7 b .L242 5186 .LVL512: 5187 .L299: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 5188 .loc 9 280 0 5189 0156 B5F5007F cmp r5, #512 5190 015a 3FF467AF beq .L248 5191 015e 6AE7 b .L245 5192 .L297: 5193 0160 102D cmp r5, #16 5194 0162 7FF468AF bne .L245 5195 0166 77E7 b .L246 5196 .LVL513: 5197 .L243: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** arm_bitreversal_64((uint64_t*)p1, S->bitRevLength,S->pBitRevTable); 5198 .loc 9 299 0 5199 0168 002B cmp r3, #0 5200 016a 3FF468AF beq .L241 5201 016e 7BE7 b .L255 ARM GAS /tmp/ccfbYRip.s page 214 5202 .L301: 5203 .align 2 5204 .L300: 5205 0170 0000F03F .word 1072693248 5206 .cfi_endproc 5207 .LFE159: 5209 .section .text.arm_cfft_radix4by2_q15,"ax",%progbits 5210 .align 1 5211 .p2align 2,,3 5212 .global arm_cfft_radix4by2_q15 5213 .syntax unified 5214 .thumb 5215 .thumb_func 5216 .fpu fpv4-sp-d16 5218 arm_cfft_radix4by2_q15: 5219 .LFB161: 5220 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Title: arm_cfft_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Description: Combined Radix Decimation in Q15 Frequency CFFT processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #if defined(ARM_MATH_MVEI) 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #include "arm_vec_fft.h" 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static void arm_bitreversal_16_inpl_mve( 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint16_t *pSrc, 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const uint16_t bitRevLen, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const uint16_t *pBitRevTab) 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ARM GAS /tmp/ccfbYRip.s page 215 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t *src = (uint32_t *)pSrc; 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t blkCnt; /* loop counters */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t bitRevTabOff; 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint16x8_t one = vdupq_n_u16(1); 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (bitRevLen / 2) / 4; 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) { 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevTabOff = vldrhq_u16(pBitRevTab); 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pBitRevTab += 8; 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t bitRevOff1 = vmullbq_int_u16(bitRevTabOff, one); 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t bitRevOff2 = vmulltq_int_u16(bitRevTabOff, one); 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevOff1 = bitRevOff1 >> 3; 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevOff2 = bitRevOff2 >> 3; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t in1 = vldrwq_gather_shifted_offset_u32(src, bitRevOff1); 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t in2 = vldrwq_gather_shifted_offset_u32(src, bitRevOff2); 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_shifted_offset_u32(src, bitRevOff1, in2); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_shifted_offset_u32(src, bitRevOff2, in1); 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Decrement the blockSize loop counter 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * tail 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * (will be merged thru tail predication) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = bitRevLen & 7; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if (blkCnt > 0U) { 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevTabOff = vldrhq_z_u16(pBitRevTab, p0); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t bitRevOff1 = vmullbq_int_u16(bitRevTabOff, one); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t bitRevOff2 = vmulltq_int_u16(bitRevTabOff, one); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevOff1 = bitRevOff1 >> 3; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** bitRevOff2 = bitRevOff2 >> 3; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t in1 = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff1, p0); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t in2 = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff2, p0); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff1, in2, p0); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff2, in1, p0); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static void _arm_radix4_butterfly_q15_mve( 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const arm_cfft_instance_q15 * S, 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSrc, ARM GAS /tmp/ccfbYRip.s page 216 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecTmp0, vecTmp1; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecA, vecB, vecC, vecD; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecW; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t blkCnt; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n1, n2; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t stage = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** int32_t iter = 1; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static const uint32_t strides[4] = { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** (0 - 16) * sizeof(q15_t *), (4 - 16) * sizeof(q15_t *), 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** (8 - 16) * sizeof(q15_t *), (12 - 16) * sizeof(q15_t *) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** }; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Process first stages 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Each stage in middle stages provides two down scaling of the input 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n1 = n2; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 >>= 2u; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (int k = fftLen / 4u; k > 1; k >>= 2u) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (int i = 0; i < iter; i++) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride2 = 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** &S->rearranged_twiddle_stride2[ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride1 = 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** &S->rearranged_twiddle_stride1[ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *pW1, *pW2, *pW3; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inA = pSrc + CMPLX_DIM * i * n1; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inB = inA + n2 * CMPLX_DIM; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inC = inB + n2 * CMPLX_DIM; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inD = inC + n2 * CMPLX_DIM; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW1 = p_rearranged_twiddle_tab_stride1; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW2 = p_rearranged_twiddle_tab_stride2; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW3 = p_rearranged_twiddle_tab_stride3; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = n2 / 4; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * load 4 x q15 complex pair 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = vldrhq_s16(inA); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = vldrhq_s16(inC); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecB = vldrhq_s16(inB); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecD = vldrhq_s16(inD); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum0 = vhaddq(vecA, vecC); ARM GAS /tmp/ccfbYRip.s page 217 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff0 = vhsubq(vecA, vecC); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum1 = vhaddq(vecB, vecD); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff1 = vhsubq(vecB, vecD); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inA, vecTmp0); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inA += 8; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW2); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW2 += 8; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inB, vecTmp1); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inB += 8; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW1); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW1 += 8; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inC, vecTmp1); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inC += 8; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW3); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW3 += 8; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inD, vecTmp1); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inD += 8; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = vldrhq_s16(inA); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = vldrhq_s16(inC); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n1 = n2; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 >>= 2u; ARM GAS /tmp/ccfbYRip.s page 218 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** iter = iter << 2; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** stage++; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * start of Last stage process 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * load scheduling 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen >> 4); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum0 = vhaddq(vecA, vecC); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff0 = vhsubq(vecA, vecC); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum1 = vhaddq(vecB, vecD); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff1 = vhsubq(vecB, vecD); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * pre-load for next iteration 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64, (q15x8_t) vecTmp0); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (q15x8_t) vecTmp0); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (q15x8_t) vecTmp0); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (q15x8_t) vecTmp0); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static void arm_cfft_radix4by2_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_t fftLen 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n2; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pIn0; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pIn1; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t *pCoef = S->pTwiddle; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t blkCnt; ARM GAS /tmp/ccfbYRip.s page 219 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecIn0, vecIn1, vecSum, vecDiff; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecCmplxTmp, vecTw; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *pCoefVec; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 = pSrc; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn1 = pSrc + fftLen; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pCoefVec = pCoef; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = n2 / 4; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn1 = *(q15x8_t *) pIn1; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 >> 1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn1 = vecIn1 >> 1; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum = vhaddq(vecIn0, vecIn1); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn0, vecSum); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 += 8; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTw = vld1q(pCoefVec); 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pCoefVec += 8; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff = vhsubq(vecIn0, vecIn1); 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn1, vecCmplxTmp); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn1 += 8; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_q15_mve(S, pSrc, n2); 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_q15_mve(S, pSrc + fftLen, n2); 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 = pSrc; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen << 1) >> 3; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 << 1; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn0, vecIn0); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 += 8; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * tail 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * (will be merged thru tail predication) 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen << 1) & 7; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if (blkCnt > 0U) 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); ARM GAS /tmp/ccfbYRip.s page 220 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 << 1; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrhq_p(pIn0, vecIn0, p0); 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static void _arm_radix4_butterfly_inverse_q15_mve(const arm_cfft_instance_q15 *S,q15_t *pSrc, uint3 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecTmp0, vecTmp1; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecA, vecB, vecC, vecD; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecW; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t blkCnt; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n1, n2; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t stage = 0; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** int32_t iter = 1; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static const uint32_t strides[4] = { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** (0 - 16) * sizeof(q15_t *), (4 - 16) * sizeof(q15_t *), 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** (8 - 16) * sizeof(q15_t *), (12 - 16) * sizeof(q15_t *) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** }; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Process first stages 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * Each stage in middle stages provides two down scaling of the input 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n1 = n2; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 >>= 2u; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (int k = fftLen / 4u; k > 1; k >>= 2u) 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (int i = 0; i < iter; i++) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride2 = 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** &S->rearranged_twiddle_stride2[ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *p_rearranged_twiddle_tab_stride1 = 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** &S->rearranged_twiddle_stride1[ 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *pW1, *pW2, *pW3; 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inA = pSrc + CMPLX_DIM * i * n1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inB = inA + n2 * CMPLX_DIM; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inC = inB + n2 * CMPLX_DIM; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *inD = inC + n2 * CMPLX_DIM; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW1 = p_rearranged_twiddle_tab_stride1; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW2 = p_rearranged_twiddle_tab_stride2; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW3 = p_rearranged_twiddle_tab_stride3; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = n2 / 4; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * load 4 x q15 complex pair 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ ARM GAS /tmp/ccfbYRip.s page 221 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = vldrhq_s16(inA); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = vldrhq_s16(inC); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecB = vldrhq_s16(inB); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecD = vldrhq_s16(inD); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum0 = vhaddq(vecA, vecC); 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff0 = vhsubq(vecA, vecC); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum1 = vhaddq(vecB, vecD); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff1 = vhsubq(vecB, vecD); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inA, vecTmp0); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inA += 8; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW2); 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW2 += 8; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inB, vecTmp1); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inB += 8; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW1); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW1 += 8; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inC, vecTmp1); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inC += 8; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecW = vld1q(pW3); 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pW3 += 8; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(inD, vecTmp1); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** inD += 8; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = vldrhq_s16(inA); ARM GAS /tmp/ccfbYRip.s page 222 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = vldrhq_s16(inC); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n1 = n2; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 >>= 2u; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** iter = iter << 2; 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** stage++; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * start of Last stage process 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * load scheduling 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen >> 4); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum0 = vhaddq(vecA, vecC); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff0 = vhsubq(vecA, vecC); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum1 = vhaddq(vecB, vecD); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff1 = vhsubq(vecB, vecD); 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * pre-load for next iteration 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64, (q15x8_t) vecTmp0); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (q15x8_t) vecTmp0); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (q15x8_t) vecTmp0); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (q15x8_t) vecTmp0); 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** static void arm_cfft_radix4by2_inverse_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_ ARM GAS /tmp/ccfbYRip.s page 223 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n2; 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pIn0; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pIn1; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t *pCoef = S->pTwiddle; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t blkCnt; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecIn0, vecIn1, vecSum, vecDiff; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15x8_t vecCmplxTmp, vecTw; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t const *pCoefVec; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 = pSrc; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn1 = pSrc + fftLen; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pCoefVec = pCoef; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = n2 / 4; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn1 = *(q15x8_t *) pIn1; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 >> 1; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn1 = vecIn1 >> 1; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecSum = vhaddq(vecIn0, vecIn1); 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn0, vecSum); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 += 8; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecTw = vld1q(pCoefVec); 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pCoefVec += 8; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecDiff = vhsubq(vecIn0, vecIn1); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecCmplxTmp = vqrdmlsdhq(vuninitializedq_s16() , vecDiff, vecTw); 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecCmplxTmp = vqrdmladhxq(vecCmplxTmp, vecDiff, vecTw); 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn1, vecCmplxTmp); 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn1 += 8; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, n2); 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_inverse_q15_mve(S, pSrc + fftLen, n2); 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 = pSrc; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen << 1) >> 3; 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 << 1; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vst1q(pIn0, vecIn0); 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pIn0 += 8; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt--; 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } ARM GAS /tmp/ccfbYRip.s page 224 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * tail 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** * (will be merged thru tail predication) 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** blkCnt = (fftLen << 1) & 7; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** while (blkCnt > 0U) 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt); 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = *(q15x8_t *) pIn0; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vecIn0 = vecIn0 << 1; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** vstrhq_p(pIn0, vecIn0, p0); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @ingroup groupTransforms 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @addtogroup ComplexFFT 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @{ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @brief Processing function for Q15 complex FFT. 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] S points to an instance of Q15 CFFT structure 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. P 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] ifftFlag flag that selects transform direction 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 0: forward transform 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 1: inverse transform 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 0: disables bit reversal of output 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 1: enables bit reversal of output 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @return none 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_q15( 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const arm_cfft_instance_q15 * S, 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint8_t ifftFlag, 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint8_t bitReverseFlag) 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen = S->fftLen; 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if (ifftFlag == 1U) { 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** switch (fftLen) { 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 16: 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 64: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 256: 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 1024: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 4096: 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, fftLen); 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 32: 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 128: ARM GAS /tmp/ccfbYRip.s page 225 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 512: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 2048: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_cfft_radix4by2_inverse_q15_mve(S, pSrc, fftLen); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } else { 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** switch (fftLen) { 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 16: 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 64: 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 256: 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 1024: 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 4096: 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** _arm_radix4_butterfly_q15_mve(S, pSrc, fftLen); 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 32: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 128: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 512: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 2048: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_cfft_radix4by2_q15_mve(S, pSrc, fftLen); 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if (bitReverseFlag) 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_bitreversal_16_inpl_mve((uint16_t*)pSrc, S->bitRevLength, S->pBitRevTable); 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** extern void arm_radix4_butterfly_q15( 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef, 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t twidCoefModifier); 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** extern void arm_radix4_butterfly_inverse_q15( 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef, 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t twidCoefModifier); 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** extern void arm_bitreversal_16( 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint16_t * pSrc, 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const uint16_t bitRevLen, 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const uint16_t * pBitRevTable); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_radix4by2_q15( 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef); 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ARM GAS /tmp/ccfbYRip.s page 226 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_radix4by2_inverse_q15( 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef); 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @ingroup groupTransforms 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @addtogroup ComplexFFT 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @{ 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @brief Processing function for Q15 complex FFT. 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] S points to an instance of Q15 CFFT structure 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. P 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] ifftFlag flag that selects transform direction 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 0: forward transform 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 1: inverse transform 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 0: disables bit reversal of output 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** - value = 1: enables bit reversal of output 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @return none 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_q15( 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const arm_cfft_instance_q15 * S, 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * p1, 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint8_t ifftFlag, 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint8_t bitReverseFlag) 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t L = S->fftLen; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if (ifftFlag == 1U) 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** switch (L) 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 16: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 64: 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 256: 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 1024: 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 4096: 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 32: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 128: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 512: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 2048: 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle ); 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** else 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { ARM GAS /tmp/ccfbYRip.s page 227 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** switch (L) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 16: 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 64: 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 256: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 1024: 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 4096: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 32: 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 128: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 512: 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** case 2048: 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle ); 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** if ( bitReverseFlag ) 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable); 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** @} end of ComplexFFT group 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_radix4by2_q15( 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef) 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5221 .loc 10 756 0 5222 .cfi_startproc 5223 @ args = 0, pretend = 0, frame = 0 5224 @ frame_needed = 0, uses_anonymous_args = 0 5225 .LVL514: 5226 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 5227 .LCFI60: 5228 .cfi_def_cfa_offset 40 5229 .cfi_offset 3, -40 5230 .cfi_offset 4, -36 5231 .cfi_offset 5, -32 5232 .cfi_offset 6, -28 5233 .cfi_offset 7, -24 5234 .cfi_offset 8, -20 5235 .cfi_offset 9, -16 5236 .cfi_offset 10, -12 5237 .cfi_offset 11, -8 5238 .cfi_offset 14, -4 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t i; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n2; 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t p0, p1, p2, p3; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #if defined (ARM_MATH_DSP) 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q31_t T, S, R; 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q31_t coeff, out1, out2; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t *pC = pCoef; ARM GAS /tmp/ccfbYRip.s page 228 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSi = pSrc; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSl = pSrc + fftLen; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t l; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t xt, yt, cosVal, sinVal; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1U; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #if defined (ARM_MATH_DSP) 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = n2; i > 0; i--) 5239 .loc 10 775 0 5240 0004 4D08 lsrs r5, r1, #1 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 5241 .loc 10 765 0 5242 0006 00EB4107 add r7, r0, r1, lsl #1 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t i; 5243 .loc 10 756 0 5244 000a 1646 mov r6, r2 5245 .LVL515: 5246 .loc 10 775 0 5247 000c 4FD0 beq .L303 5248 000e 0446 mov r4, r0 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** coeff = read_q15x2_ia ((q15_t **) &pC); 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** T = read_q15x2 (pSi); 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S = read_q15x2 (pSl); 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** R = __QSUB16(T, S); 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** write_q15x2_ia (&pSi, __SHADD16(T, S)); 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out1 = __SMUAD(coeff, R) >> 16U; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out2 = __SMUSDX(coeff, R); 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out1 = __SMUSDX(R, coeff) >> 16U; 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out2 = __SMUAD(coeff, R); 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 5249 .loc 10 797 0 5250 0010 DFF8B080 ldr r8, .L312 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSi = pSrc; 5251 .loc 10 763 0 5252 0014 9646 mov lr, r2 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 5253 .loc 10 765 0 5254 0016 3846 mov r0, r7 5255 .LVL516: 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSl = pSrc + fftLen; 5256 .loc 10 764 0 ARM GAS /tmp/ccfbYRip.s page 229 5257 0018 2146 mov r1, r4 5258 .LVL517: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5259 .loc 10 775 0 5260 001a 2A46 mov r2, r5 5261 .LVL518: 5262 .LBB1362: 5263 .LBB1363: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5264 .loc 5 1739 0 5265 001c 4FF0000C mov ip, #0 5266 .LVL519: 5267 .L304: 5268 .LBE1363: 5269 .LBE1362: 5270 .LBB1365: 5271 .LBB1366: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5272 .loc 6 928 0 5273 0020 5EF8043B ldr r3, [lr], #4 @ unaligned 5274 .LVL520: 5275 .LBE1366: 5276 .LBE1365: 5277 .LBB1367: 5278 .LBB1368: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5279 .loc 6 909 0 5280 0024 D1F80090 ldr r9, [r1] @ unaligned 5281 .LBE1368: 5282 .LBE1367: 5283 .LBB1369: 5284 .LBB1364: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5285 .loc 5 1739 0 5286 .syntax unified 5287 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5288 0028 99FA2CF9 shadd16 r9, r9, ip 5289 @ 0 "" 2 5290 .LVL521: 5291 .thumb 5292 .syntax unified 5293 .LBE1364: 5294 .LBE1369: 5295 .LBB1370: 5296 .LBB1371: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5297 .loc 6 909 0 5298 002c D0F800B0 ldr fp, [r0] @ unaligned 5299 .LBE1371: 5300 .LBE1370: 5301 .LBB1372: 5302 .LBB1373: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5303 .loc 5 1739 0 5304 .syntax unified 5305 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5306 0030 9BFA2CFB shadd16 fp, fp, ip ARM GAS /tmp/ccfbYRip.s page 230 5307 @ 0 "" 2 5308 .LVL522: 5309 .thumb 5310 .syntax unified 5311 .LBE1373: 5312 .LBE1372: 5313 .LBB1374: 5314 .LBB1375: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5315 .loc 5 1779 0 5316 .syntax unified 5317 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5318 0034 D9FA1BFA qsub16 r10, r9, fp 5319 @ 0 "" 2 5320 .LVL523: 5321 .thumb 5322 .syntax unified 5323 .LBE1375: 5324 .LBE1374: 5325 .LBB1376: 5326 .LBB1377: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5327 .loc 5 1739 0 5328 .syntax unified 5329 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5330 0038 99FA2BF9 shadd16 r9, r9, fp 5331 @ 0 "" 2 5332 .LVL524: 5333 .thumb 5334 .syntax unified 5335 .LBE1377: 5336 .LBE1376: 5337 .LBB1378: 5338 .LBB1379: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5339 .loc 6 969 0 5340 003c 41F8049B str r9, [r1], #4 @ unaligned 5341 .LVL525: 5342 .LBE1379: 5343 .LBE1378: 5344 .LBB1380: 5345 .LBB1381: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5346 .loc 5 1977 0 5347 .syntax unified 5348 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5349 0040 23FB0AF9 smuad r9, r3, r10 5350 @ 0 "" 2 5351 .LVL526: 5352 .thumb 5353 .syntax unified 5354 .LBE1381: 5355 .LBE1380: 5356 .LBB1382: 5357 .LBB1383: 5358 .loc 5 2051 0 5359 .syntax unified ARM GAS /tmp/ccfbYRip.s page 231 5360 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5361 0044 43FB1AF3 smusdx r3, r3, r10 5362 @ 0 "" 2 5363 .LVL527: 5364 .thumb 5365 .syntax unified 5366 .LBE1383: 5367 .LBE1382: 5368 .loc 10 797 0 5369 0048 03EA0803 and r3, r3, r8 5370 .LVL528: 5371 004c 43EA1943 orr r3, r3, r9, lsr #16 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5372 .loc 10 775 0 5373 0050 013A subs r2, r2, #1 5374 .LVL529: 5375 .LBB1384: 5376 .LBB1385: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5377 .loc 6 969 0 5378 0052 40F8043B str r3, [r0], #4 @ unaligned 5379 .LVL530: 5380 .LBE1385: 5381 .LBE1384: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5382 .loc 10 775 0 5383 0056 E3D1 bne .L304 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = 0; i < n2; i++) 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** cosVal = pCoef[2 * i]; 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** sinVal = pCoef[2 * i + 1]; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** l = i + n2; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) + 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16U)) ); 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) - 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16U)) ); 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* first col */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U); 5384 .loc 10 825 0 5385 0058 2946 mov r1, r5 ARM GAS /tmp/ccfbYRip.s page 232 5386 .LVL531: 5387 005a 3246 mov r2, r6 5388 005c 2046 mov r0, r4 5389 .LVL532: 5390 005e FFF7FEFF bl arm_radix4_butterfly_q15.constprop.2 5391 .LVL533: 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* second col */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); 5392 .loc 10 828 0 5393 0062 2946 mov r1, r5 5394 0064 3846 mov r0, r7 5395 0066 3246 mov r2, r6 5396 0068 FFF7FEFF bl arm_radix4_butterfly_q15.constprop.2 5397 .LVL534: 5398 006c 04EBC505 add r5, r4, r5, lsl #3 5399 .LVL535: 5400 0070 2046 mov r0, r4 5401 .LVL536: 5402 .L306: 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1U; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = 0; i < n2; i++) 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p0 = pSrc[4 * i + 0]; 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 = pSrc[4 * i + 1]; 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 = pSrc[4 * i + 2]; 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 = pSrc[4 * i + 3]; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p0 <<= 1U; 5403 .loc 10 838 0 discriminator 3 5404 0072 B0F900C0 ldrsh ip, [r0] 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 <<= 1U; 5405 .loc 10 840 0 discriminator 3 5406 0076 B0F90470 ldrsh r7, [r0, #4] 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 5407 .loc 10 839 0 discriminator 3 5408 007a B0F90260 ldrsh r6, [r0, #2] 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 <<= 1U; 5409 .loc 10 841 0 discriminator 3 5410 007e B0F90640 ldrsh r4, [r0, #6] 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 0] = p0; 5411 .loc 10 843 0 discriminator 3 5412 0082 0022 movs r2, #0 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 2] = p2; 5413 .loc 10 845 0 discriminator 3 5414 0084 1346 mov r3, r2 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 5415 .loc 10 838 0 discriminator 3 5416 0086 4FEA4C0C lsl ip, ip, #1 5417 .LVL537: 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 <<= 1U; 5418 .loc 10 840 0 discriminator 3 5419 008a 7F00 lsls r7, r7, #1 ARM GAS /tmp/ccfbYRip.s page 233 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 5420 .loc 10 843 0 discriminator 3 5421 008c 6CF30F02 bfi r2, ip, #0, #16 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 <<= 1U; 5422 .loc 10 839 0 discriminator 3 5423 0090 7600 lsls r6, r6, #1 5424 .LVL538: 5425 .loc 10 845 0 discriminator 3 5426 0092 67F30F03 bfi r3, r7, #0, #16 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5427 .loc 10 841 0 discriminator 3 5428 0096 6400 lsls r4, r4, #1 5429 .LVL539: 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 5430 .loc 10 843 0 discriminator 3 5431 0098 66F31F42 bfi r2, r6, #16, #16 5432 .loc 10 845 0 discriminator 3 5433 009c 64F31F43 bfi r3, r4, #16, #16 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 5434 .loc 10 843 0 discriminator 3 5435 00a0 0260 str r2, [r0] @ unaligned 5436 00a2 4360 str r3, [r0, #4] @ unaligned 5437 00a4 0830 adds r0, r0, #8 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5438 .loc 10 831 0 discriminator 3 5439 00a6 A842 cmp r0, r5 5440 00a8 E3D1 bne .L306 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 3] = p3; 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 5441 .loc 10 849 0 5442 00aa BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 5443 .LVL540: 5444 .L303: 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5445 .loc 10 825 0 5446 00ae 2946 mov r1, r5 5447 .LVL541: 5448 00b0 FFF7FEFF bl arm_radix4_butterfly_q15.constprop.2 5449 .LVL542: 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5450 .loc 10 828 0 5451 00b4 3246 mov r2, r6 5452 00b6 2946 mov r1, r5 5453 00b8 3846 mov r0, r7 5454 .loc 10 849 0 5455 00ba BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 5456 .LCFI61: 5457 .cfi_restore 14 5458 .cfi_restore 11 5459 .cfi_restore 10 5460 .cfi_restore 9 5461 .cfi_restore 8 5462 .cfi_restore 7 5463 .cfi_restore 6 5464 .cfi_restore 5 ARM GAS /tmp/ccfbYRip.s page 234 5465 .cfi_restore 4 5466 .cfi_restore 3 5467 .cfi_def_cfa_offset 0 5468 .LVL543: 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5469 .loc 10 828 0 5470 00be FFF7FEBF b arm_radix4_butterfly_q15.constprop.2 5471 .LVL544: 5472 .L313: 5473 00c2 00BF .align 2 5474 .L312: 5475 00c4 0000FFFF .word -65536 5476 .cfi_endproc 5477 .LFE161: 5479 .section .text.arm_cfft_radix4by2_inverse_q15,"ax",%progbits 5480 .align 1 5481 .p2align 2,,3 5482 .global arm_cfft_radix4by2_inverse_q15 5483 .syntax unified 5484 .thumb 5485 .thumb_func 5486 .fpu fpv4-sp-d16 5488 arm_cfft_radix4by2_inverse_q15: 5489 .LFB162: 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** void arm_cfft_radix4by2_inverse_q15( 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t * pSrc, 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t fftLen, 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t * pCoef) 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5490 .loc 10 855 0 5491 .cfi_startproc 5492 @ args = 0, pretend = 0, frame = 0 5493 @ frame_needed = 0, uses_anonymous_args = 0 5494 .LVL545: 5495 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 5496 .LCFI62: 5497 .cfi_def_cfa_offset 40 5498 .cfi_offset 3, -40 5499 .cfi_offset 4, -36 5500 .cfi_offset 5, -32 5501 .cfi_offset 6, -28 5502 .cfi_offset 7, -24 5503 .cfi_offset 8, -20 5504 .cfi_offset 9, -16 5505 .cfi_offset 10, -12 5506 .cfi_offset 11, -8 5507 .cfi_offset 14, -4 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t i; 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t n2; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t p0, p1, p2, p3; 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #if defined (ARM_MATH_DSP) 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q31_t T, S, R; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q31_t coeff, out1, out2; 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** const q15_t *pC = pCoef; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSi = pSrc; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSl = pSrc + fftLen; ARM GAS /tmp/ccfbYRip.s page 235 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t l; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t xt, yt, cosVal, sinVal; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1U; 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #if defined (ARM_MATH_DSP) 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = n2; i > 0; i--) 5508 .loc 10 874 0 5509 0004 4D08 lsrs r5, r1, #1 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 5510 .loc 10 864 0 5511 0006 00EB4107 add r7, r0, r1, lsl #1 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t i; 5512 .loc 10 855 0 5513 000a 1646 mov r6, r2 5514 .LVL546: 5515 .loc 10 874 0 5516 000c 4FD0 beq .L315 5517 000e 0446 mov r4, r0 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** coeff = read_q15x2_ia ((q15_t **) &pC); 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** T = read_q15x2 (pSi); 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S = read_q15x2 (pSl); 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** R = __QSUB16(T, S); 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** write_q15x2_ia (&pSi, __SHADD16(T, S)); 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out1 = __SMUSD(coeff, R) >> 16U; 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out2 = __SMUADX(coeff, R); 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out1 = __SMUADX(R, coeff) >> 16U; 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** out2 = __SMUSD(__QSUB(0, coeff), R); 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 5518 .loc 10 896 0 5519 0010 DFF8B080 ldr r8, .L324 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSi = pSrc; 5520 .loc 10 862 0 5521 0014 9646 mov lr, r2 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else 5522 .loc 10 864 0 5523 0016 3846 mov r0, r7 5524 .LVL547: 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** q15_t *pSl = pSrc + fftLen; 5525 .loc 10 863 0 5526 0018 2146 mov r1, r4 5527 .LVL548: ARM GAS /tmp/ccfbYRip.s page 236 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5528 .loc 10 874 0 5529 001a 2A46 mov r2, r5 5530 .LVL549: 5531 .LBB1386: 5532 .LBB1387: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5533 .loc 5 1739 0 5534 001c 4FF0000C mov ip, #0 5535 .LVL550: 5536 .L316: 5537 .LBE1387: 5538 .LBE1386: 5539 .LBB1389: 5540 .LBB1390: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5541 .loc 6 928 0 5542 0020 5EF8043B ldr r3, [lr], #4 @ unaligned 5543 .LVL551: 5544 .LBE1390: 5545 .LBE1389: 5546 .LBB1391: 5547 .LBB1392: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5548 .loc 6 909 0 5549 0024 D1F80090 ldr r9, [r1] @ unaligned 5550 .LBE1392: 5551 .LBE1391: 5552 .LBB1393: 5553 .LBB1388: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5554 .loc 5 1739 0 5555 .syntax unified 5556 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5557 0028 99FA2CF9 shadd16 r9, r9, ip 5558 @ 0 "" 2 5559 .LVL552: 5560 .thumb 5561 .syntax unified 5562 .LBE1388: 5563 .LBE1393: 5564 .LBB1394: 5565 .LBB1395: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5566 .loc 6 909 0 5567 002c D0F800B0 ldr fp, [r0] @ unaligned 5568 .LBE1395: 5569 .LBE1394: 5570 .LBB1396: 5571 .LBB1397: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5572 .loc 5 1739 0 5573 .syntax unified 5574 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5575 0030 9BFA2CFB shadd16 fp, fp, ip 5576 @ 0 "" 2 5577 .LVL553: ARM GAS /tmp/ccfbYRip.s page 237 5578 .thumb 5579 .syntax unified 5580 .LBE1397: 5581 .LBE1396: 5582 .LBB1398: 5583 .LBB1399: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5584 .loc 5 1779 0 5585 .syntax unified 5586 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5587 0034 D9FA1BFA qsub16 r10, r9, fp 5588 @ 0 "" 2 5589 .LVL554: 5590 .thumb 5591 .syntax unified 5592 .LBE1399: 5593 .LBE1398: 5594 .LBB1400: 5595 .LBB1401: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5596 .loc 5 1739 0 5597 .syntax unified 5598 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5599 0038 99FA2BF9 shadd16 r9, r9, fp 5600 @ 0 "" 2 5601 .LVL555: 5602 .thumb 5603 .syntax unified 5604 .LBE1401: 5605 .LBE1400: 5606 .LBB1402: 5607 .LBB1403: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5608 .loc 6 969 0 5609 003c 41F8049B str r9, [r1], #4 @ unaligned 5610 .LVL556: 5611 .LBE1403: 5612 .LBE1402: 5613 .LBB1404: 5614 .LBB1405: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5615 .loc 5 2043 0 5616 .syntax unified 5617 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5618 0040 43FB0AF9 smusd r9, r3, r10 5619 @ 0 "" 2 5620 .LVL557: 5621 .thumb 5622 .syntax unified 5623 .LBE1405: 5624 .LBE1404: 5625 .LBB1406: 5626 .LBB1407: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5627 .loc 5 1985 0 5628 .syntax unified 5629 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 238 5630 0044 23FB1AF3 smuadx r3, r3, r10 5631 @ 0 "" 2 5632 .LVL558: 5633 .thumb 5634 .syntax unified 5635 .LBE1407: 5636 .LBE1406: 5637 .loc 10 896 0 5638 0048 03EA0803 and r3, r3, r8 5639 .LVL559: 5640 004c 43EA1943 orr r3, r3, r9, lsr #16 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5641 .loc 10 874 0 5642 0050 013A subs r2, r2, #1 5643 .LVL560: 5644 .LBB1408: 5645 .LBB1409: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5646 .loc 6 969 0 5647 0052 40F8043B str r3, [r0], #4 @ unaligned 5648 .LVL561: 5649 .LBE1409: 5650 .LBE1408: 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5651 .loc 10 874 0 5652 0056 E3D1 bne .L316 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = 0; i < n2; i++) 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** cosVal = pCoef[2 * i]; 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** sinVal = pCoef[2 * i + 1]; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** l = i + n2; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) - 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16U)) ); 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) + 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16U)) ); 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* first col */ 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U); 5653 .loc 10 924 0 5654 0058 2946 mov r1, r5 5655 .LVL562: ARM GAS /tmp/ccfbYRip.s page 239 5656 005a 3246 mov r2, r6 5657 005c 2046 mov r0, r4 5658 .LVL563: 5659 005e FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.1 5660 .LVL564: 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** /* second col */ 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); 5661 .loc 10 927 0 5662 0062 2946 mov r1, r5 5663 0064 3846 mov r0, r7 5664 0066 3246 mov r2, r6 5665 0068 FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.1 5666 .LVL565: 5667 006c 04EBC505 add r5, r4, r5, lsl #3 5668 .LVL566: 5669 0070 2046 mov r0, r4 5670 .LVL567: 5671 .L318: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** n2 = fftLen >> 1U; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** for (i = 0; i < n2; i++) 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p0 = pSrc[4 * i + 0]; 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 = pSrc[4 * i + 1]; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 = pSrc[4 * i + 2]; 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 = pSrc[4 * i + 3]; 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p0 <<= 1U; 5672 .loc 10 937 0 discriminator 3 5673 0072 B0F900C0 ldrsh ip, [r0] 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 <<= 1U; 5674 .loc 10 939 0 discriminator 3 5675 0076 B0F90470 ldrsh r7, [r0, #4] 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 5676 .loc 10 938 0 discriminator 3 5677 007a B0F90260 ldrsh r6, [r0, #2] 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 <<= 1U; 5678 .loc 10 940 0 discriminator 3 5679 007e B0F90640 ldrsh r4, [r0, #6] 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 0] = p0; 5680 .loc 10 942 0 discriminator 3 5681 0082 0022 movs r2, #0 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 2] = p2; 5682 .loc 10 944 0 discriminator 3 5683 0084 1346 mov r3, r2 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p1 <<= 1U; 5684 .loc 10 937 0 discriminator 3 5685 0086 4FEA4C0C lsl ip, ip, #1 5686 .LVL568: 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p3 <<= 1U; 5687 .loc 10 939 0 discriminator 3 5688 008a 7F00 lsls r7, r7, #1 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; ARM GAS /tmp/ccfbYRip.s page 240 5689 .loc 10 942 0 discriminator 3 5690 008c 6CF30F02 bfi r2, ip, #0, #16 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** p2 <<= 1U; 5691 .loc 10 938 0 discriminator 3 5692 0090 7600 lsls r6, r6, #1 5693 .LVL569: 5694 .loc 10 944 0 discriminator 3 5695 0092 67F30F03 bfi r3, r7, #0, #16 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5696 .loc 10 940 0 discriminator 3 5697 0096 6400 lsls r4, r4, #1 5698 .LVL570: 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 5699 .loc 10 942 0 discriminator 3 5700 0098 66F31F42 bfi r2, r6, #16, #16 5701 .loc 10 944 0 discriminator 3 5702 009c 64F31F43 bfi r3, r4, #16, #16 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 1] = p1; 5703 .loc 10 942 0 discriminator 3 5704 00a0 0260 str r2, [r0] @ unaligned 5705 00a2 4360 str r3, [r0, #4] @ unaligned 5706 00a4 0830 adds r0, r0, #8 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5707 .loc 10 930 0 discriminator 3 5708 00a6 A842 cmp r0, r5 5709 00a8 E3D1 bne .L318 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** pSrc[4 * i + 3] = p3; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 5710 .loc 10 947 0 5711 00aa BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 5712 .LVL571: 5713 .L315: 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5714 .loc 10 924 0 5715 00ae 2946 mov r1, r5 5716 .LVL572: 5717 00b0 FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.1 5718 .LVL573: 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5719 .loc 10 927 0 5720 00b4 3246 mov r2, r6 5721 00b6 2946 mov r1, r5 5722 00b8 3846 mov r0, r7 5723 .loc 10 947 0 5724 00ba BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 5725 .LCFI63: 5726 .cfi_restore 14 5727 .cfi_restore 11 5728 .cfi_restore 10 5729 .cfi_restore 9 5730 .cfi_restore 8 5731 .cfi_restore 7 5732 .cfi_restore 6 5733 .cfi_restore 5 5734 .cfi_restore 4 5735 .cfi_restore 3 ARM GAS /tmp/ccfbYRip.s page 241 5736 .cfi_def_cfa_offset 0 5737 .LVL574: 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5738 .loc 10 927 0 5739 00be FFF7FEBF b arm_radix4_butterfly_inverse_q15.constprop.1 5740 .LVL575: 5741 .L325: 5742 00c2 00BF .align 2 5743 .L324: 5744 00c4 0000FFFF .word -65536 5745 .cfi_endproc 5746 .LFE162: 5748 .section .text.arm_cfft_q15,"ax",%progbits 5749 .align 1 5750 .p2align 2,,3 5751 .global arm_cfft_q15 5752 .syntax unified 5753 .thumb 5754 .thumb_func 5755 .fpu fpv4-sp-d16 5757 arm_cfft_q15: 5758 .LFB160: 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t L = S->fftLen; 5759 .loc 10 700 0 5760 .cfi_startproc 5761 @ args = 0, pretend = 0, frame = 80 5762 @ frame_needed = 0, uses_anonymous_args = 0 5763 .LVL576: 5764 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 5765 .LCFI64: 5766 .cfi_def_cfa_offset 36 5767 .cfi_offset 4, -36 5768 .cfi_offset 5, -32 5769 .cfi_offset 6, -28 5770 .cfi_offset 7, -24 5771 .cfi_offset 8, -20 5772 .cfi_offset 9, -16 5773 .cfi_offset 10, -12 5774 .cfi_offset 11, -8 5775 .cfi_offset 14, -4 5776 0004 95B0 sub sp, sp, #84 5777 .LCFI65: 5778 .cfi_def_cfa_offset 120 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5779 .loc 10 703 0 5780 0006 012A cmp r2, #1 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t L = S->fftLen; 5781 .loc 10 700 0 5782 0008 1093 str r3, [sp, #64] 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5783 .loc 10 701 0 5784 000a 0388 ldrh r3, [r0] 5785 .LVL577: 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** uint32_t L = S->fftLen; 5786 .loc 10 700 0 5787 000c 1190 str r0, [sp, #68] 5788 000e 0E91 str r1, [sp, #56] ARM GAS /tmp/ccfbYRip.s page 242 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5789 .loc 10 701 0 5790 0010 0293 str r3, [sp, #8] 5791 .LVL578: 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5792 .loc 10 703 0 5793 0012 00F06C81 beq .L426 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5794 .loc 10 725 0 5795 0016 B3F5807F cmp r3, #256 5796 001a 20D0 beq .L340 5797 001c 14D8 bhi .L341 5798 001e 202B cmp r3, #32 5799 0020 05D0 beq .L342 5800 0022 40F2A882 bls .L427 5801 0026 402B cmp r3, #64 5802 0028 19D0 beq .L340 5803 002a 802B cmp r3, #128 5804 002c 05D1 bne .L328 5805 .L342: 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 5806 .loc 10 739 0 5807 002e 119B ldr r3, [sp, #68] 5808 .LVL579: 5809 0030 0299 ldr r1, [sp, #8] 5810 .LVL580: 5811 0032 5A68 ldr r2, [r3, #4] 5812 .LVL581: 5813 0034 0E98 ldr r0, [sp, #56] 5814 .LVL582: 5815 0036 FFF7FEFF bl arm_cfft_radix4by2_q15 5816 .LVL583: 5817 .L328: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable); 5818 .loc 10 744 0 5819 003a 109B ldr r3, [sp, #64] 5820 003c 002B cmp r3, #0 5821 003e 40F03081 bne .L428 5822 .L326: 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 5823 .loc 10 746 0 5824 0042 15B0 add sp, sp, #84 5825 .LCFI66: 5826 .cfi_remember_state 5827 .cfi_def_cfa_offset 36 5828 @ sp needed 5829 0044 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 5830 .LVL584: 5831 .L341: 5832 .LCFI67: 5833 .cfi_restore_state 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 5834 .loc 10 725 0 5835 0048 B3F5806F cmp r3, #1024 5836 004c 07D0 beq .L340 5837 004e 40F28D82 bls .L429 5838 0052 B3F5006F cmp r3, #2048 ARM GAS /tmp/ccfbYRip.s page 243 5839 0056 EAD0 beq .L342 5840 0058 B3F5805F cmp r3, #4096 5841 005c EDD1 bne .L328 5842 .L340: 5843 .LVL585: 5844 .LBB1752: 5845 .LBB1753: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 5846 .loc 4 177 0 5847 005e 9B08 lsrs r3, r3, #2 5848 .LVL586: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 5849 .loc 4 186 0 5850 0060 9C00 lsls r4, r3, #2 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 5851 .loc 4 177 0 5852 0062 1393 str r3, [sp, #76] 5853 .LVL587: 5854 0064 119B ldr r3, [sp, #68] 5855 .LVL588: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 5856 .loc 4 186 0 5857 0066 0E9D ldr r5, [sp, #56] 5858 0068 5B68 ldr r3, [r3, #4] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 5859 .loc 4 263 0 5860 006a DFF824C5 ldr ip, .L432 5861 006e 1293 str r3, [sp, #72] 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 5862 .loc 4 186 0 5863 0070 05EB040B add fp, r5, r4 5864 .LVL589: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 5865 .loc 4 187 0 5866 0074 0BEB0407 add r7, fp, r4 5867 .LVL590: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 5868 .loc 4 188 0 5869 0078 9846 mov r8, r3 5870 007a 3C44 add r4, r4, r7 5871 .LVL591: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 5872 .loc 4 186 0 5873 007c 5E46 mov r6, fp 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 5874 .loc 4 188 0 5875 007e 9A46 mov r10, r3 5876 0080 C646 mov lr, r8 5877 .LBB1754: 5878 .LBB1755: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5879 .loc 5 1739 0 5880 0082 0020 movs r0, #0 5881 .LVL592: 5882 .L345: 5883 .LBE1755: 5884 .LBE1754: ARM GAS /tmp/ccfbYRip.s page 244 5885 .LBB1757: 5886 .LBB1758: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5887 .loc 6 909 0 5888 0084 2B68 ldr r3, [r5] @ unaligned 5889 .LBE1758: 5890 .LBE1757: 5891 .LBB1759: 5892 .LBB1756: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5893 .loc 5 1739 0 5894 .syntax unified 5895 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5896 0086 93FA20F3 shadd16 r3, r3, r0 5897 @ 0 "" 2 5898 .LVL593: 5899 .thumb 5900 .syntax unified 5901 .LBE1756: 5902 .LBE1759: 5903 .LBB1760: 5904 .LBB1761: 5905 .syntax unified 5906 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5907 008a 93FA20F2 shadd16 r2, r3, r0 5908 @ 0 "" 2 5909 .LVL594: 5910 .thumb 5911 .syntax unified 5912 .LBE1761: 5913 .LBE1760: 5914 .LBB1762: 5915 .LBB1763: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5916 .loc 6 909 0 5917 008e 3B68 ldr r3, [r7] @ unaligned 5918 .LBE1763: 5919 .LBE1762: 5920 .LBB1764: 5921 .LBB1765: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5922 .loc 5 1739 0 5923 .syntax unified 5924 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5925 0090 93FA20F3 shadd16 r3, r3, r0 5926 @ 0 "" 2 5927 .LVL595: 5928 .thumb 5929 .syntax unified 5930 .LBE1765: 5931 .LBE1764: 5932 .LBB1766: 5933 .LBB1767: 5934 .syntax unified 5935 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5936 0094 93FA20F3 shadd16 r3, r3, r0 5937 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 245 5938 .LVL596: 5939 .thumb 5940 .syntax unified 5941 .LBE1767: 5942 .LBE1766: 5943 .LBB1768: 5944 .LBB1769: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5945 .loc 5 1731 0 5946 .syntax unified 5947 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5948 0098 92FA13F1 qadd16 r1, r2, r3 5949 @ 0 "" 2 5950 .LVL597: 5951 .thumb 5952 .syntax unified 5953 .LBE1769: 5954 .LBE1768: 5955 .LBB1770: 5956 .LBB1771: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5957 .loc 5 1779 0 5958 .syntax unified 5959 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5960 009c D2FA13F3 qsub16 r3, r2, r3 5961 @ 0 "" 2 5962 .LVL598: 5963 .thumb 5964 .syntax unified 5965 .LBE1771: 5966 .LBE1770: 5967 .LBB1772: 5968 .LBB1773: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5969 .loc 6 909 0 5970 00a0 3268 ldr r2, [r6] @ unaligned 5971 .LBE1773: 5972 .LBE1772: 5973 .LBB1774: 5974 .LBB1775: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5975 .loc 5 1739 0 5976 .syntax unified 5977 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5978 00a2 92FA20F2 shadd16 r2, r2, r0 5979 @ 0 "" 2 5980 .LVL599: 5981 .thumb 5982 .syntax unified 5983 .LBE1775: 5984 .LBE1774: 5985 .LBB1776: 5986 .LBB1777: 5987 .syntax unified 5988 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5989 00a6 92FA20F2 shadd16 r2, r2, r0 5990 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 246 5991 .LVL600: 5992 .thumb 5993 .syntax unified 5994 .LBE1777: 5995 .LBE1776: 5996 .LBB1778: 5997 .LBB1779: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5998 .loc 6 909 0 5999 00aa D4F80090 ldr r9, [r4] @ unaligned 6000 .LBE1779: 6001 .LBE1778: 6002 .LBB1780: 6003 .LBB1781: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6004 .loc 5 1739 0 6005 .syntax unified 6006 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6007 00ae 99FA20F9 shadd16 r9, r9, r0 6008 @ 0 "" 2 6009 .LVL601: 6010 .thumb 6011 .syntax unified 6012 .LBE1781: 6013 .LBE1780: 6014 .LBB1782: 6015 .LBB1783: 6016 .syntax unified 6017 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6018 00b2 99FA20F9 shadd16 r9, r9, r0 6019 @ 0 "" 2 6020 .LVL602: 6021 .thumb 6022 .syntax unified 6023 .LBE1783: 6024 .LBE1782: 6025 .LBB1784: 6026 .LBB1785: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6027 .loc 5 1731 0 6028 .syntax unified 6029 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6030 00b6 92FA19F2 qadd16 r2, r2, r9 6031 @ 0 "" 2 6032 .LVL603: 6033 .thumb 6034 .syntax unified 6035 .LBE1785: 6036 .LBE1784: 6037 .LBB1786: 6038 .LBB1787: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6039 .loc 5 1739 0 6040 .syntax unified 6041 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6042 00ba 91FA22F9 shadd16 r9, r1, r2 6043 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 247 6044 .LVL604: 6045 .thumb 6046 .syntax unified 6047 .LBE1787: 6048 .LBE1786: 6049 .LBB1788: 6050 .LBB1789: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6051 .loc 6 969 0 6052 00be 45F8049B str r9, [r5], #4 @ unaligned 6053 .LVL605: 6054 .LBE1789: 6055 .LBE1788: 6056 .LBB1790: 6057 .LBB1791: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6058 .loc 5 1779 0 6059 .syntax unified 6060 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6061 00c2 D1FA12F1 qsub16 r1, r1, r2 6062 @ 0 "" 2 6063 .LVL606: 6064 .thumb 6065 .syntax unified 6066 .LBE1791: 6067 .LBE1790: 6068 .LBB1792: 6069 .LBB1793: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6070 .loc 6 909 0 6071 00c6 5AF8082B ldr r2, [r10], #8 @ unaligned 6072 .LVL607: 6073 .LBE1793: 6074 .LBE1792: 6075 .LBB1794: 6076 .LBB1795: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6077 .loc 5 1977 0 6078 .syntax unified 6079 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6080 00ca 22FB01F9 smuad r9, r2, r1 6081 @ 0 "" 2 6082 .LVL608: 6083 .thumb 6084 .syntax unified 6085 .LBE1795: 6086 .LBE1794: 6087 .LBB1796: 6088 .LBB1797: 6089 .loc 5 2051 0 6090 .syntax unified 6091 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6092 00ce 42FB11F1 smusdx r1, r2, r1 6093 @ 0 "" 2 6094 .LVL609: 6095 .thumb 6096 .syntax unified ARM GAS /tmp/ccfbYRip.s page 248 6097 .LBE1797: 6098 .LBE1796: 6099 .LBB1798: 6100 .LBB1799: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6101 .loc 6 909 0 6102 00d2 3268 ldr r2, [r6] @ unaligned 6103 .LBE1799: 6104 .LBE1798: 6105 .LBB1800: 6106 .LBB1801: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6107 .loc 5 1739 0 6108 .syntax unified 6109 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6110 00d4 92FA20F2 shadd16 r2, r2, r0 6111 @ 0 "" 2 6112 .LVL610: 6113 .thumb 6114 .syntax unified 6115 .LBE1801: 6116 .LBE1800: 6117 .LBB1802: 6118 .LBB1803: 6119 .syntax unified 6120 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6121 00d8 92FA20F2 shadd16 r2, r2, r0 6122 @ 0 "" 2 6123 .LVL611: 6124 .thumb 6125 .syntax unified 6126 .LBE1803: 6127 .LBE1802: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6128 .loc 4 263 0 6129 00dc 01EA0C01 and r1, r1, ip 6130 .LVL612: 6131 00e0 41EA1941 orr r1, r1, r9, lsr #16 6132 .LBB1804: 6133 .LBB1805: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6134 .loc 6 969 0 6135 00e4 46F8041B str r1, [r6], #4 @ unaligned 6136 .LVL613: 6137 .LBE1805: 6138 .LBE1804: 6139 .LBB1806: 6140 .LBB1807: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6141 .loc 6 909 0 6142 00e8 2168 ldr r1, [r4] @ unaligned 6143 .LBE1807: 6144 .LBE1806: 6145 .LBB1808: 6146 .LBB1809: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6147 .loc 5 1739 0 ARM GAS /tmp/ccfbYRip.s page 249 6148 .syntax unified 6149 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6150 00ea 91FA20F1 shadd16 r1, r1, r0 6151 @ 0 "" 2 6152 .LVL614: 6153 .thumb 6154 .syntax unified 6155 .LBE1809: 6156 .LBE1808: 6157 .LBB1810: 6158 .LBB1811: 6159 .syntax unified 6160 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6161 00ee 91FA20F1 shadd16 r1, r1, r0 6162 @ 0 "" 2 6163 .LVL615: 6164 .thumb 6165 .syntax unified 6166 .LBE1811: 6167 .LBE1810: 6168 .LBB1812: 6169 .LBB1813: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6170 .loc 5 1779 0 6171 .syntax unified 6172 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6173 00f2 D2FA11F2 qsub16 r2, r2, r1 6174 @ 0 "" 2 6175 .LVL616: 6176 .thumb 6177 .syntax unified 6178 .LBE1813: 6179 .LBE1812: 6180 .LBB1814: 6181 .LBB1815: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6182 .loc 5 1827 0 6183 .syntax unified 6184 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6185 00f6 A3FA12F1 qasx r1, r3, r2 6186 @ 0 "" 2 6187 .LVL617: 6188 .thumb 6189 .syntax unified 6190 .LBE1815: 6191 .LBE1814: 6192 .LBB1816: 6193 .LBB1817: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6194 .loc 5 1875 0 6195 .syntax unified 6196 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6197 00fa E3FA12F3 qsax r3, r3, r2 6198 @ 0 "" 2 6199 .LVL618: 6200 .thumb 6201 .syntax unified ARM GAS /tmp/ccfbYRip.s page 250 6202 .LBE1817: 6203 .LBE1816: 6204 .LBB1818: 6205 .LBB1819: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6206 .loc 6 909 0 6207 00fe 5EF8042B ldr r2, [lr], #4 @ unaligned 6208 .LVL619: 6209 .LBE1819: 6210 .LBE1818: 6211 .LBB1820: 6212 .LBB1821: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6213 .loc 5 1977 0 6214 .syntax unified 6215 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6216 0102 22FB03F9 smuad r9, r2, r3 6217 @ 0 "" 2 6218 .LVL620: 6219 .thumb 6220 .syntax unified 6221 .LBE1821: 6222 .LBE1820: 6223 .LBB1822: 6224 .LBB1823: 6225 .loc 5 2051 0 6226 .syntax unified 6227 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6228 0106 42FB13F3 smusdx r3, r2, r3 6229 @ 0 "" 2 6230 .LVL621: 6231 .thumb 6232 .syntax unified 6233 .LBE1823: 6234 .LBE1822: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6235 .loc 4 303 0 6236 010a 03EA0C03 and r3, r3, ip 6237 .LVL622: 6238 010e 43EA1943 orr r3, r3, r9, lsr #16 6239 .LBB1824: 6240 .LBB1825: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6241 .loc 6 969 0 6242 0112 47F8043B str r3, [r7], #4 @ unaligned 6243 .LVL623: 6244 .LBE1825: 6245 .LBE1824: 6246 .LBB1826: 6247 .LBB1827: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6248 .loc 6 909 0 6249 0116 58F80C3B ldr r3, [r8], #12 @ unaligned 6250 .LVL624: 6251 .LBE1827: 6252 .LBE1826: 6253 .LBB1828: ARM GAS /tmp/ccfbYRip.s page 251 6254 .LBB1829: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6255 .loc 5 1977 0 6256 .syntax unified 6257 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6258 011a 23FB01F2 smuad r2, r3, r1 6259 @ 0 "" 2 6260 .LVL625: 6261 .thumb 6262 .syntax unified 6263 .LBE1829: 6264 .LBE1828: 6265 .LBB1830: 6266 .LBB1831: 6267 .loc 5 2051 0 6268 .syntax unified 6269 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6270 011e 43FB11F3 smusdx r3, r3, r1 6271 @ 0 "" 2 6272 .LVL626: 6273 .thumb 6274 .syntax unified 6275 .LBE1831: 6276 .LBE1830: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6277 .loc 4 322 0 6278 0122 03EA0C03 and r3, r3, ip 6279 .LVL627: 6280 0126 43EA1243 orr r3, r3, r2, lsr #16 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 6281 .loc 4 327 0 6282 012a AB45 cmp fp, r5 6283 .LBB1832: 6284 .LBB1833: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6285 .loc 6 969 0 6286 012c 44F8043B str r3, [r4], #4 @ unaligned 6287 .LVL628: 6288 .LBE1833: 6289 .LBE1832: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 6290 .loc 4 327 0 6291 0130 A8D1 bne .L345 6292 .LVL629: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6293 .loc 4 339 0 6294 0132 139B ldr r3, [sp, #76] 6295 0134 042B cmp r3, #4 6296 0136 40F29080 bls .L346 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 6297 .loc 4 420 0 6298 013a DFF854B4 ldr fp, .L432 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6299 .loc 4 339 0 6300 013e 0393 str r3, [sp, #12] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6301 .loc 4 336 0 ARM GAS /tmp/ccfbYRip.s page 252 6302 0140 0423 movs r3, #4 6303 .LVL630: 6304 .L349: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 6305 .loc 4 343 0 6306 0142 0398 ldr r0, [sp, #12] 6307 0144 03EB4302 add r2, r3, r3, lsl #1 6308 0148 8108 lsrs r1, r0, #2 6309 014a 9200 lsls r2, r2, #2 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 6310 .loc 4 357 0 6311 014c 8C00 lsls r4, r1, #2 6312 .LVL631: 6313 014e 0D92 str r2, [sp, #52] 6314 0150 9A00 lsls r2, r3, #2 6315 0152 DB00 lsls r3, r3, #3 6316 .LVL632: 6317 0154 0A94 str r4, [sp, #40] 6318 0156 0C93 str r3, [sp, #48] 6319 0158 029C ldr r4, [sp, #8] 6320 015a 0E9B ldr r3, [sp, #56] 6321 015c 0693 str r3, [sp, #24] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6322 .loc 4 394 0 6323 015e 129B ldr r3, [sp, #72] 6324 0160 0593 str r3, [sp, #20] 6325 0162 8C42 cmp r4, r1 6326 0164 28BF it cs 6327 0166 0C46 movcs r4, r1 6328 0168 CDE90733 strd r3, r3, [sp, #28] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6329 .loc 4 346 0 6330 016c 0023 movs r3, #0 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 6331 .loc 4 343 0 6332 016e 0F91 str r1, [sp, #60] 6333 .LVL633: 6334 0170 0B94 str r4, [sp, #44] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6335 .loc 4 394 0 6336 0172 8700 lsls r7, r0, #2 6337 0174 0992 str r2, [sp, #36] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6338 .loc 4 346 0 6339 0176 0493 str r3, [sp, #16] 6340 .LVL634: 6341 .L348: 6342 .LBB1834: 6343 .LBB1835: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6344 .loc 6 909 0 6345 0178 089A ldr r2, [sp, #32] 6346 017a 0A9B ldr r3, [sp, #40] 6347 017c D2F800A0 ldr r10, [r2] @ unaligned 6348 .LVL635: 6349 .LBE1835: 6350 .LBE1834: ARM GAS /tmp/ccfbYRip.s page 253 6351 .LBB1836: 6352 .LBB1837: 6353 0180 079A ldr r2, [sp, #28] 6354 0182 069E ldr r6, [sp, #24] 6355 0184 D2F80090 ldr r9, [r2] @ unaligned 6356 .LVL636: 6357 .LBE1837: 6358 .LBE1836: 6359 .LBB1838: 6360 .LBB1839: 6361 0188 059A ldr r2, [sp, #20] 6362 .LBE1839: 6363 .LBE1838: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 6364 .loc 4 356 0 6365 018a DDF810E0 ldr lr, [sp, #16] 6366 .LBB1841: 6367 .LBB1840: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6368 .loc 6 909 0 6369 018e D2F80080 ldr r8, [r2] @ unaligned 6370 .LVL637: 6371 .LBE1840: 6372 .LBE1841: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 6373 .loc 4 356 0 6374 0192 CDF804E0 str lr, [sp, #4] 6375 0196 9819 adds r0, r3, r6 6376 0198 1D18 adds r5, r3, r0 6377 019a 5C19 adds r4, r3, r5 6378 .LVL638: 6379 .L347: 6380 .LBB1842: 6381 .LBB1843: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6382 .loc 6 909 0 6383 019c 3268 ldr r2, [r6] @ unaligned 6384 .LVL639: 6385 .LBE1843: 6386 .LBE1842: 6387 .LBB1844: 6388 .LBB1845: 6389 019e 2968 ldr r1, [r5] @ unaligned 6390 .LVL640: 6391 .LBE1845: 6392 .LBE1844: 6393 .LBB1846: 6394 .LBB1847: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6395 .loc 5 1731 0 6396 .syntax unified 6397 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6398 01a0 92FA11F3 qadd16 r3, r2, r1 6399 @ 0 "" 2 6400 .LVL641: 6401 .thumb 6402 .syntax unified ARM GAS /tmp/ccfbYRip.s page 254 6403 .LBE1847: 6404 .LBE1846: 6405 .LBB1848: 6406 .LBB1849: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6407 .loc 5 1779 0 6408 .syntax unified 6409 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6410 01a4 D2FA11F2 qsub16 r2, r2, r1 6411 @ 0 "" 2 6412 .LVL642: 6413 .thumb 6414 .syntax unified 6415 .LBE1849: 6416 .LBE1848: 6417 .LBB1850: 6418 .LBB1851: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6419 .loc 6 909 0 6420 01a8 0168 ldr r1, [r0] @ unaligned 6421 .LBE1851: 6422 .LBE1850: 6423 .LBB1852: 6424 .LBB1853: 6425 01aa D4F800C0 ldr ip, [r4] @ unaligned 6426 .LBE1853: 6427 .LBE1852: 6428 .LBB1854: 6429 .LBB1855: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6430 .loc 5 1731 0 6431 .syntax unified 6432 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6433 01ae 91FA1CF1 qadd16 r1, r1, ip 6434 @ 0 "" 2 6435 .LVL643: 6436 .thumb 6437 .syntax unified 6438 .LBE1855: 6439 .LBE1854: 6440 .LBB1856: 6441 .LBB1857: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6442 .loc 5 1739 0 6443 .syntax unified 6444 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6445 01b2 93FA21FC shadd16 ip, r3, r1 6446 @ 0 "" 2 6447 .LVL644: 6448 .thumb 6449 .syntax unified 6450 .LBE1857: 6451 .LBE1856: 6452 .LBB1858: 6453 .LBB1859: 6454 01b6 4FF0000E mov lr, #0 6455 .syntax unified ARM GAS /tmp/ccfbYRip.s page 255 6456 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6457 01ba 9CFA2EFC shadd16 ip, ip, lr 6458 @ 0 "" 2 6459 .LVL645: 6460 .thumb 6461 .syntax unified 6462 .LBE1859: 6463 .LBE1858: 6464 .LBB1860: 6465 .LBB1861: 6466 .loc 6 991 0 6467 01be C6F800C0 str ip, [r6] @ unaligned 6468 .LVL646: 6469 .LBE1861: 6470 .LBE1860: 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6471 .loc 4 394 0 6472 01c2 3E44 add r6, r6, r7 6473 .LVL647: 6474 .LBB1862: 6475 .LBB1863: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6476 .loc 5 1787 0 6477 .syntax unified 6478 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6479 01c4 D3FA21F3 shsub16 r3, r3, r1 6480 @ 0 "" 2 6481 .LVL648: 6482 .thumb 6483 .syntax unified 6484 .LBE1863: 6485 .LBE1862: 6486 .LBB1864: 6487 .LBB1865: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6488 .loc 5 1977 0 6489 .syntax unified 6490 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6491 01c8 29FB03FC smuad ip, r9, r3 6492 @ 0 "" 2 6493 .LVL649: 6494 .thumb 6495 .syntax unified 6496 .LBE1865: 6497 .LBE1864: 6498 .LBB1866: 6499 .LBB1867: 6500 .loc 5 2051 0 6501 .syntax unified 6502 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6503 01cc 49FB13F3 smusdx r3, r9, r3 6504 @ 0 "" 2 6505 .LVL650: 6506 .thumb 6507 .syntax unified 6508 .LBE1867: 6509 .LBE1866: ARM GAS /tmp/ccfbYRip.s page 256 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 6510 .loc 4 420 0 6511 01d0 03EA0B03 and r3, r3, fp 6512 .LVL651: 6513 01d4 43EA1C43 orr r3, r3, ip, lsr #16 6514 .LBB1868: 6515 .LBB1869: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6516 .loc 6 909 0 6517 01d8 D0F800C0 ldr ip, [r0] @ unaligned 6518 .LVL652: 6519 .LBE1869: 6520 .LBE1868: 6521 .LBB1870: 6522 .LBB1871: 6523 .loc 6 991 0 6524 01dc 0360 str r3, [r0] @ unaligned 6525 .LVL653: 6526 .LBE1871: 6527 .LBE1870: 6528 .LBB1872: 6529 .LBB1873: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6530 .loc 6 909 0 6531 01de 2168 ldr r1, [r4] @ unaligned 6532 .LBE1873: 6533 .LBE1872: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6534 .loc 4 421 0 6535 01e0 3844 add r0, r0, r7 6536 .LVL654: 6537 .LBB1874: 6538 .LBB1875: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6539 .loc 5 1779 0 6540 .syntax unified 6541 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6542 01e2 DCFA11F1 qsub16 r1, ip, r1 6543 @ 0 "" 2 6544 .LVL655: 6545 .thumb 6546 .syntax unified 6547 .LBE1875: 6548 .LBE1874: 6549 .LBB1876: 6550 .LBB1877: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6551 .loc 5 1835 0 6552 .syntax unified 6553 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6554 01e6 A2FA21F3 shasx r3, r2, r1 6555 @ 0 "" 2 6556 .LVL656: 6557 .thumb 6558 .syntax unified 6559 .LBE1877: 6560 .LBE1876: ARM GAS /tmp/ccfbYRip.s page 257 6561 .LBB1878: 6562 .LBB1879: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6563 .loc 5 1883 0 6564 .syntax unified 6565 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6566 01ea E2FA21F2 shsax r2, r2, r1 6567 @ 0 "" 2 6568 .LVL657: 6569 .thumb 6570 .syntax unified 6571 .LBE1879: 6572 .LBE1878: 6573 .LBB1880: 6574 .LBB1881: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6575 .loc 5 1977 0 6576 .syntax unified 6577 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6578 01ee 2AFB02F1 smuad r1, r10, r2 6579 @ 0 "" 2 6580 .LVL658: 6581 .thumb 6582 .syntax unified 6583 .LBE1881: 6584 .LBE1880: 6585 .LBB1882: 6586 .LBB1883: 6587 .loc 5 2051 0 6588 .syntax unified 6589 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6590 01f2 4AFB12F2 smusdx r2, r10, r2 6591 @ 0 "" 2 6592 .LVL659: 6593 .thumb 6594 .syntax unified 6595 .LBE1883: 6596 .LBE1882: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 6597 .loc 4 457 0 6598 01f6 02EA0B02 and r2, r2, fp 6599 .LVL660: 6600 01fa 42EA1142 orr r2, r2, r1, lsr #16 6601 .LBB1884: 6602 .LBB1885: 6603 .loc 6 991 0 6604 01fe 2A60 str r2, [r5] @ unaligned 6605 .LVL661: 6606 .LBE1885: 6607 .LBE1884: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6608 .loc 4 458 0 6609 0200 3D44 add r5, r5, r7 6610 .LVL662: 6611 .LBB1886: 6612 .LBB1887: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 258 6613 .loc 5 1977 0 6614 .syntax unified 6615 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6616 0202 28FB03F2 smuad r2, r8, r3 6617 @ 0 "" 2 6618 .LVL663: 6619 .thumb 6620 .syntax unified 6621 .LBE1887: 6622 .LBE1886: 6623 .LBB1888: 6624 .LBB1889: 6625 .loc 5 2051 0 6626 .syntax unified 6627 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6628 0206 48FB13F3 smusdx r3, r8, r3 6629 @ 0 "" 2 6630 .LVL664: 6631 .thumb 6632 .syntax unified 6633 .LBE1889: 6634 .LBE1888: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 6635 .loc 4 472 0 6636 020a 03EA0B03 and r3, r3, fp 6637 .LVL665: 6638 020e 43EA1243 orr r3, r3, r2, lsr #16 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6639 .loc 4 362 0 6640 0212 0199 ldr r1, [sp, #4] 6641 0214 039A ldr r2, [sp, #12] 6642 .LVL666: 6643 .LBB1890: 6644 .LBB1891: 6645 .loc 6 991 0 6646 0216 2360 str r3, [r4] @ unaligned 6647 .LVL667: 6648 .LBE1891: 6649 .LBE1890: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6650 .loc 4 362 0 6651 0218 029B ldr r3, [sp, #8] 6652 021a 1144 add r1, r1, r2 6653 021c 8B42 cmp r3, r1 6654 021e 0191 str r1, [sp, #4] 6655 .LVL668: 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 6656 .loc 4 473 0 6657 0220 3C44 add r4, r4, r7 6658 .LVL669: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6659 .loc 4 362 0 6660 0222 BBD8 bhi .L347 6661 0224 DDE90821 ldrd r2, r1, [sp, #32] 6662 .LVL670: 6663 0228 0A44 add r2, r2, r1 6664 022a 0892 str r2, [sp, #32] ARM GAS /tmp/ccfbYRip.s page 259 6665 022c 0C99 ldr r1, [sp, #48] 6666 022e 079A ldr r2, [sp, #28] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6667 .loc 4 346 0 6668 0230 049B ldr r3, [sp, #16] 6669 0232 0A44 add r2, r2, r1 6670 0234 0792 str r2, [sp, #28] 6671 0236 0D99 ldr r1, [sp, #52] 6672 0238 059A ldr r2, [sp, #20] 6673 023a 0A44 add r2, r2, r1 6674 023c 0592 str r2, [sp, #20] 6675 023e 069A ldr r2, [sp, #24] 6676 0240 0432 adds r2, r2, #4 6677 0242 0692 str r2, [sp, #24] 6678 0244 0B9A ldr r2, [sp, #44] 6679 0246 0133 adds r3, r3, #1 6680 0248 9342 cmp r3, r2 6681 024a 0493 str r3, [sp, #16] 6682 .LVL671: 6683 024c 94D3 bcc .L348 6684 024e 0F9A ldr r2, [sp, #60] 6685 0250 0392 str r2, [sp, #12] 6686 .LVL672: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6687 .loc 4 339 0 6688 0252 042A cmp r2, #4 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 6689 .loc 4 477 0 6690 0254 099B ldr r3, [sp, #36] 6691 .LVL673: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 6692 .loc 4 339 0 6693 0256 3FF674AF bhi .L349 6694 .LVL674: 6695 .L346: 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6696 .loc 4 490 0 6697 025a 0E9C ldr r4, [sp, #56] 6698 .LVL675: 6699 025c 139E ldr r6, [sp, #76] 6700 .L350: 6701 .LVL676: 6702 .LBB1892: 6703 .LBB1893: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6704 .loc 6 928 0 6705 025e 2368 ldr r3, [r4] @ unaligned 6706 .LVL677: 6707 .LBE1893: 6708 .LBE1892: 6709 .LBB1894: 6710 .LBB1895: 6711 0260 6268 ldr r2, [r4, #4] @ unaligned 6712 .LVL678: 6713 .LBE1895: 6714 .LBE1894: 6715 .LBB1896: ARM GAS /tmp/ccfbYRip.s page 260 6716 .LBB1897: 6717 0262 A768 ldr r7, [r4, #8] @ unaligned 6718 .LVL679: 6719 .LBE1897: 6720 .LBE1896: 6721 .LBB1898: 6722 .LBB1899: 6723 0264 E068 ldr r0, [r4, #12] @ unaligned 6724 .LVL680: 6725 .LBE1899: 6726 .LBE1898: 6727 .LBB1900: 6728 .LBB1901: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6729 .loc 5 1731 0 6730 .syntax unified 6731 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6732 0266 93FA17F1 qadd16 r1, r3, r7 6733 @ 0 "" 2 6734 .LVL681: 6735 .thumb 6736 .syntax unified 6737 .LBE1901: 6738 .LBE1900: 6739 .LBB1902: 6740 .LBB1903: 6741 .syntax unified 6742 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6743 026a 92FA10F5 qadd16 r5, r2, r0 6744 @ 0 "" 2 6745 .LVL682: 6746 .thumb 6747 .syntax unified 6748 .LBE1903: 6749 .LBE1902: 6750 .LBB1904: 6751 .LBB1905: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6752 .loc 5 1739 0 6753 .syntax unified 6754 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6755 026e 91FA25F5 shadd16 r5, r1, r5 6756 @ 0 "" 2 6757 .LVL683: 6758 .thumb 6759 .syntax unified 6760 .LBE1905: 6761 .LBE1904: 6762 .LBB1906: 6763 .LBB1907: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6764 .loc 6 969 0 6765 0272 2560 str r5, [r4] @ unaligned 6766 .LVL684: 6767 .LBE1907: 6768 .LBE1906: 6769 .LBB1908: ARM GAS /tmp/ccfbYRip.s page 261 6770 .LBB1909: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6771 .loc 5 1731 0 6772 .syntax unified 6773 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6774 0274 92FA10F5 qadd16 r5, r2, r0 6775 @ 0 "" 2 6776 .LVL685: 6777 .thumb 6778 .syntax unified 6779 .LBE1909: 6780 .LBE1908: 6781 .LBB1910: 6782 .LBB1911: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6783 .loc 5 1787 0 6784 .syntax unified 6785 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6786 0278 D1FA25F1 shsub16 r1, r1, r5 6787 @ 0 "" 2 6788 .LVL686: 6789 .thumb 6790 .syntax unified 6791 .LBE1911: 6792 .LBE1910: 6793 .LBB1912: 6794 .LBB1913: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6795 .loc 6 969 0 6796 027c 6160 str r1, [r4, #4] @ unaligned 6797 .LVL687: 6798 .LBE1913: 6799 .LBE1912: 6800 .LBB1914: 6801 .LBB1915: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6802 .loc 5 1779 0 6803 .syntax unified 6804 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6805 027e D3FA17F3 qsub16 r3, r3, r7 6806 @ 0 "" 2 6807 .LVL688: 6808 .thumb 6809 .syntax unified 6810 .LBE1915: 6811 .LBE1914: 6812 .LBB1916: 6813 .LBB1917: 6814 .syntax unified 6815 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6816 0282 D2FA10F2 qsub16 r2, r2, r0 6817 @ 0 "" 2 6818 .LVL689: 6819 .thumb 6820 .syntax unified 6821 .LBE1917: 6822 .LBE1916: ARM GAS /tmp/ccfbYRip.s page 262 6823 .LBB1918: 6824 .LBB1919: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6825 .loc 5 1883 0 6826 .syntax unified 6827 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6828 0286 E3FA22F1 shsax r1, r3, r2 6829 @ 0 "" 2 6830 .LVL690: 6831 .thumb 6832 .syntax unified 6833 .LBE1919: 6834 .LBE1918: 6835 .LBB1920: 6836 .LBB1921: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6837 .loc 6 969 0 6838 028a A160 str r1, [r4, #8] @ unaligned 6839 .LVL691: 6840 .LBE1921: 6841 .LBE1920: 6842 .LBB1922: 6843 .LBB1923: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 6844 .loc 5 1835 0 6845 .syntax unified 6846 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6847 028c A3FA22F3 shasx r3, r3, r2 6848 @ 0 "" 2 6849 .LVL692: 6850 .thumb 6851 .syntax unified 6852 .LBE1923: 6853 .LBE1922: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6854 .loc 4 555 0 6855 0290 013E subs r6, r6, #1 6856 .LVL693: 6857 .LBB1924: 6858 .LBB1925: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6859 .loc 6 969 0 6860 0292 E360 str r3, [r4, #12] @ unaligned 6861 0294 04F11004 add r4, r4, #16 6862 .LVL694: 6863 .LBE1925: 6864 .LBE1924: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6865 .loc 4 555 0 6866 0298 E1D1 bne .L350 6867 .LBE1753: 6868 .LBE1752: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable); 6869 .loc 10 744 0 6870 029a 109B ldr r3, [sp, #64] 6871 029c 002B cmp r3, #0 6872 029e 3FF4D0AE beq .L326 ARM GAS /tmp/ccfbYRip.s page 263 6873 .LVL695: 6874 .L428: 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 6875 .loc 10 745 0 6876 02a2 119B ldr r3, [sp, #68] 6877 02a4 9D89 ldrh r5, [r3, #12] 6878 02a6 9C68 ldr r4, [r3, #8] 6879 .LVL696: 6880 .LBB1926: 6881 .LBB1927: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 6882 .loc 8 117 0 6883 02a8 002D cmp r5, #0 6884 02aa 3FF4CAAE beq .L326 6885 02ae 0E99 ldr r1, [sp, #56] 6886 02b0 0022 movs r2, #0 6887 .LVL697: 6888 .L353: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 6889 .loc 8 120 0 6890 02b2 04EB4200 add r0, r4, r2, lsl #1 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 6891 .loc 8 119 0 6892 02b6 34F81230 ldrh r3, [r4, r2, lsl #1] 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 6893 .loc 8 120 0 6894 02ba 4088 ldrh r0, [r0, #2] 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 6895 .loc 8 124 0 6896 02bc 8008 lsrs r0, r0, #2 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 6897 .loc 8 123 0 6898 02be 9B08 lsrs r3, r3, #2 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 6899 .loc 8 124 0 6900 02c0 31F81060 ldrh r6, [r1, r0, lsl #1] 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 6901 .loc 8 123 0 6902 02c4 31F81370 ldrh r7, [r1, r3, lsl #1] 6903 .LVL698: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 6904 .loc 8 124 0 6905 02c8 21F81360 strh r6, [r1, r3, lsl #1] @ movhi 6906 .LVL699: 6907 02cc 4600 lsls r6, r0, #1 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 6908 .loc 8 123 0 6909 02ce 5B00 lsls r3, r3, #1 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 6910 .loc 8 125 0 6911 02d0 21F81070 strh r7, [r1, r0, lsl #1] @ movhi 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 6912 .loc 8 128 0 6913 02d4 0233 adds r3, r3, #2 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 6914 .loc 8 129 0 6915 02d6 B01C adds r0, r6, #2 ARM GAS /tmp/ccfbYRip.s page 264 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** } 6916 .loc 8 132 0 6917 02d8 0232 adds r2, r2, #2 6918 .LVL700: 6919 02da 92B2 uxth r2, r2 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 6920 .loc 8 128 0 6921 02dc CE5A ldrh r6, [r1, r3] 6922 .LVL701: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 6923 .loc 8 129 0 6924 02de 0F5A ldrh r7, [r1, r0] 6925 02e0 CF52 strh r7, [r1, r3] @ movhi 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 6926 .loc 8 117 0 6927 02e2 9542 cmp r5, r2 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 6928 .loc 8 130 0 6929 02e4 0E52 strh r6, [r1, r0] @ movhi 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 6930 .loc 8 117 0 6931 02e6 E4D8 bhi .L353 6932 .LBE1927: 6933 .LBE1926: 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** 6934 .loc 10 746 0 6935 02e8 15B0 add sp, sp, #84 6936 .LCFI68: 6937 .cfi_remember_state 6938 .cfi_def_cfa_offset 36 6939 @ sp needed 6940 02ea BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 6941 .LVL702: 6942 .L426: 6943 .LCFI69: 6944 .cfi_restore_state 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 6945 .loc 10 705 0 6946 02ee B3F5807F cmp r3, #256 6947 02f2 1CD0 beq .L329 6948 02f4 0FD8 bhi .L330 6949 02f6 202B cmp r3, #32 6950 02f8 06D0 beq .L331 6951 02fa 40F24581 bls .L430 6952 02fe 402B cmp r3, #64 6953 0300 15D0 beq .L329 6954 0302 802B cmp r3, #128 6955 0304 7FF499AE bne .L328 6956 .L331: 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** break; 6957 .loc 10 719 0 6958 0308 119B ldr r3, [sp, #68] 6959 .LVL703: 6960 030a 0299 ldr r1, [sp, #8] 6961 .LVL704: 6962 030c 5A68 ldr r2, [r3, #4] 6963 .LVL705: ARM GAS /tmp/ccfbYRip.s page 265 6964 030e 0E98 ldr r0, [sp, #56] 6965 .LVL706: 6966 0310 FFF7FEFF bl arm_cfft_radix4by2_inverse_q15 6967 .LVL707: 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** } 6968 .loc 10 720 0 6969 0314 91E6 b .L328 6970 .LVL708: 6971 .L330: 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 6972 .loc 10 705 0 6973 0316 B3F5806F cmp r3, #1024 6974 031a 08D0 beq .L329 6975 031c 40F22F81 bls .L431 6976 0320 B3F5006F cmp r3, #2048 6977 0324 F0D0 beq .L331 6978 0326 B3F5805F cmp r3, #4096 6979 032a 7FF486AE bne .L328 6980 .L329: 6981 .LVL709: 6982 .LBB1928: 6983 .LBB1929: 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6984 .loc 4 1047 0 6985 032e 9B08 lsrs r3, r3, #2 6986 .LVL710: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 6987 .loc 4 1056 0 6988 0330 9C00 lsls r4, r3, #2 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6989 .loc 4 1047 0 6990 0332 1393 str r3, [sp, #76] 6991 .LVL711: 6992 0334 119B ldr r3, [sp, #68] 6993 .LVL712: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 6994 .loc 4 1056 0 6995 0336 0E9D ldr r5, [sp, #56] 6996 0338 5B68 ldr r3, [r3, #4] 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 6997 .loc 4 1129 0 6998 033a DFF854C2 ldr ip, .L432 6999 033e 1293 str r3, [sp, #72] 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 7000 .loc 4 1056 0 7001 0340 05EB040B add fp, r5, r4 7002 .LVL713: 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 7003 .loc 4 1057 0 7004 0344 0BEB0407 add r7, fp, r4 7005 .LVL714: 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7006 .loc 4 1058 0 7007 0348 9E46 mov lr, r3 7008 034a 3C44 add r4, r4, r7 7009 .LVL715: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; ARM GAS /tmp/ccfbYRip.s page 266 7010 .loc 4 1056 0 7011 034c 5E46 mov r6, fp 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7012 .loc 4 1058 0 7013 034e 9A46 mov r10, r3 7014 0350 F146 mov r9, lr 7015 .LBB1930: 7016 .LBB1931: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7017 .loc 5 1739 0 7018 0352 0020 movs r0, #0 7019 .LVL716: 7020 .L334: 7021 .LBE1931: 7022 .LBE1930: 7023 .LBB1933: 7024 .LBB1934: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7025 .loc 6 909 0 7026 0354 2B68 ldr r3, [r5] @ unaligned 7027 .LBE1934: 7028 .LBE1933: 7029 .LBB1935: 7030 .LBB1932: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7031 .loc 5 1739 0 7032 .syntax unified 7033 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7034 0356 93FA20F3 shadd16 r3, r3, r0 7035 @ 0 "" 2 7036 .LVL717: 7037 .thumb 7038 .syntax unified 7039 .LBE1932: 7040 .LBE1935: 7041 .LBB1936: 7042 .LBB1937: 7043 .syntax unified 7044 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7045 035a 93FA20F2 shadd16 r2, r3, r0 7046 @ 0 "" 2 7047 .LVL718: 7048 .thumb 7049 .syntax unified 7050 .LBE1937: 7051 .LBE1936: 7052 .LBB1938: 7053 .LBB1939: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7054 .loc 6 909 0 7055 035e 3B68 ldr r3, [r7] @ unaligned 7056 .LBE1939: 7057 .LBE1938: 7058 .LBB1940: 7059 .LBB1941: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7060 .loc 5 1739 0 ARM GAS /tmp/ccfbYRip.s page 267 7061 .syntax unified 7062 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7063 0360 93FA20F3 shadd16 r3, r3, r0 7064 @ 0 "" 2 7065 .LVL719: 7066 .thumb 7067 .syntax unified 7068 .LBE1941: 7069 .LBE1940: 7070 .LBB1942: 7071 .LBB1943: 7072 .syntax unified 7073 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7074 0364 93FA20F3 shadd16 r3, r3, r0 7075 @ 0 "" 2 7076 .LVL720: 7077 .thumb 7078 .syntax unified 7079 .LBE1943: 7080 .LBE1942: 7081 .LBB1944: 7082 .LBB1945: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7083 .loc 5 1731 0 7084 .syntax unified 7085 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7086 0368 92FA13F1 qadd16 r1, r2, r3 7087 @ 0 "" 2 7088 .LVL721: 7089 .thumb 7090 .syntax unified 7091 .LBE1945: 7092 .LBE1944: 7093 .LBB1946: 7094 .LBB1947: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7095 .loc 5 1779 0 7096 .syntax unified 7097 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7098 036c D2FA13F3 qsub16 r3, r2, r3 7099 @ 0 "" 2 7100 .LVL722: 7101 .thumb 7102 .syntax unified 7103 .LBE1947: 7104 .LBE1946: 7105 .LBB1948: 7106 .LBB1949: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7107 .loc 6 909 0 7108 0370 3268 ldr r2, [r6] @ unaligned 7109 .LBE1949: 7110 .LBE1948: 7111 .LBB1950: 7112 .LBB1951: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7113 .loc 5 1739 0 ARM GAS /tmp/ccfbYRip.s page 268 7114 .syntax unified 7115 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7116 0372 92FA20F2 shadd16 r2, r2, r0 7117 @ 0 "" 2 7118 .LVL723: 7119 .thumb 7120 .syntax unified 7121 .LBE1951: 7122 .LBE1950: 7123 .LBB1952: 7124 .LBB1953: 7125 .syntax unified 7126 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7127 0376 92FA20F2 shadd16 r2, r2, r0 7128 @ 0 "" 2 7129 .LVL724: 7130 .thumb 7131 .syntax unified 7132 .LBE1953: 7133 .LBE1952: 7134 .LBB1954: 7135 .LBB1955: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7136 .loc 6 909 0 7137 037a D4F80080 ldr r8, [r4] @ unaligned 7138 .LBE1955: 7139 .LBE1954: 7140 .LBB1956: 7141 .LBB1957: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7142 .loc 5 1739 0 7143 .syntax unified 7144 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7145 037e 98FA20F8 shadd16 r8, r8, r0 7146 @ 0 "" 2 7147 .LVL725: 7148 .thumb 7149 .syntax unified 7150 .LBE1957: 7151 .LBE1956: 7152 .LBB1958: 7153 .LBB1959: 7154 .syntax unified 7155 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7156 0382 98FA20F8 shadd16 r8, r8, r0 7157 @ 0 "" 2 7158 .LVL726: 7159 .thumb 7160 .syntax unified 7161 .LBE1959: 7162 .LBE1958: 7163 .LBB1960: 7164 .LBB1961: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7165 .loc 5 1731 0 7166 .syntax unified 7167 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 269 7168 0386 92FA18F2 qadd16 r2, r2, r8 7169 @ 0 "" 2 7170 .LVL727: 7171 .thumb 7172 .syntax unified 7173 .LBE1961: 7174 .LBE1960: 7175 .LBB1962: 7176 .LBB1963: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7177 .loc 5 1739 0 7178 .syntax unified 7179 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7180 038a 91FA22F8 shadd16 r8, r1, r2 7181 @ 0 "" 2 7182 .LVL728: 7183 .thumb 7184 .syntax unified 7185 .LBE1963: 7186 .LBE1962: 7187 .LBB1964: 7188 .LBB1965: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7189 .loc 6 969 0 7190 038e 45F8048B str r8, [r5], #4 @ unaligned 7191 .LVL729: 7192 .LBE1965: 7193 .LBE1964: 7194 .LBB1966: 7195 .LBB1967: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7196 .loc 5 1779 0 7197 .syntax unified 7198 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7199 0392 D1FA12F1 qsub16 r1, r1, r2 7200 @ 0 "" 2 7201 .LVL730: 7202 .thumb 7203 .syntax unified 7204 .LBE1967: 7205 .LBE1966: 7206 .LBB1968: 7207 .LBB1969: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7208 .loc 6 909 0 7209 0396 5AF8082B ldr r2, [r10], #8 @ unaligned 7210 .LVL731: 7211 .LBE1969: 7212 .LBE1968: 7213 .LBB1970: 7214 .LBB1971: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7215 .loc 5 2043 0 7216 .syntax unified 7217 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7218 039a 42FB01F8 smusd r8, r2, r1 7219 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 270 7220 .LVL732: 7221 .thumb 7222 .syntax unified 7223 .LBE1971: 7224 .LBE1970: 7225 .LBB1972: 7226 .LBB1973: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7227 .loc 5 1985 0 7228 .syntax unified 7229 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7230 039e 22FB11F1 smuadx r1, r2, r1 7231 @ 0 "" 2 7232 .LVL733: 7233 .thumb 7234 .syntax unified 7235 .LBE1973: 7236 .LBE1972: 7237 .LBB1974: 7238 .LBB1975: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7239 .loc 6 909 0 7240 03a2 3268 ldr r2, [r6] @ unaligned 7241 .LBE1975: 7242 .LBE1974: 7243 .LBB1976: 7244 .LBB1977: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7245 .loc 5 1739 0 7246 .syntax unified 7247 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7248 03a4 92FA20F2 shadd16 r2, r2, r0 7249 @ 0 "" 2 7250 .LVL734: 7251 .thumb 7252 .syntax unified 7253 .LBE1977: 7254 .LBE1976: 7255 .LBB1978: 7256 .LBB1979: 7257 .syntax unified 7258 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7259 03a8 92FA20F2 shadd16 r2, r2, r0 7260 @ 0 "" 2 7261 .LVL735: 7262 .thumb 7263 .syntax unified 7264 .LBE1979: 7265 .LBE1978: 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7266 .loc 4 1129 0 7267 03ac 01EA0C01 and r1, r1, ip 7268 .LVL736: 7269 03b0 41EA1841 orr r1, r1, r8, lsr #16 7270 .LBB1980: 7271 .LBB1981: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else ARM GAS /tmp/ccfbYRip.s page 271 7272 .loc 6 969 0 7273 03b4 46F8041B str r1, [r6], #4 @ unaligned 7274 .LVL737: 7275 .LBE1981: 7276 .LBE1980: 7277 .LBB1982: 7278 .LBB1983: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7279 .loc 6 909 0 7280 03b8 2168 ldr r1, [r4] @ unaligned 7281 .LBE1983: 7282 .LBE1982: 7283 .LBB1984: 7284 .LBB1985: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7285 .loc 5 1739 0 7286 .syntax unified 7287 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7288 03ba 91FA20F1 shadd16 r1, r1, r0 7289 @ 0 "" 2 7290 .LVL738: 7291 .thumb 7292 .syntax unified 7293 .LBE1985: 7294 .LBE1984: 7295 .LBB1986: 7296 .LBB1987: 7297 .syntax unified 7298 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7299 03be 91FA20F1 shadd16 r1, r1, r0 7300 @ 0 "" 2 7301 .LVL739: 7302 .thumb 7303 .syntax unified 7304 .LBE1987: 7305 .LBE1986: 7306 .LBB1988: 7307 .LBB1989: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7308 .loc 5 1779 0 7309 .syntax unified 7310 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7311 03c2 D2FA11F2 qsub16 r2, r2, r1 7312 @ 0 "" 2 7313 .LVL740: 7314 .thumb 7315 .syntax unified 7316 .LBE1989: 7317 .LBE1988: 7318 .LBB1990: 7319 .LBB1991: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7320 .loc 5 1875 0 7321 .syntax unified 7322 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7323 03c6 E3FA12F1 qsax r1, r3, r2 7324 @ 0 "" 2 ARM GAS /tmp/ccfbYRip.s page 272 7325 .LVL741: 7326 .thumb 7327 .syntax unified 7328 .LBE1991: 7329 .LBE1990: 7330 .LBB1992: 7331 .LBB1993: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7332 .loc 5 1827 0 7333 .syntax unified 7334 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7335 03ca A3FA12F3 qasx r3, r3, r2 7336 @ 0 "" 2 7337 .LVL742: 7338 .thumb 7339 .syntax unified 7340 .LBE1993: 7341 .LBE1992: 7342 .LBB1994: 7343 .LBB1995: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7344 .loc 6 909 0 7345 03ce 59F8042B ldr r2, [r9], #4 @ unaligned 7346 .LVL743: 7347 .LBE1995: 7348 .LBE1994: 7349 .LBB1996: 7350 .LBB1997: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7351 .loc 5 2043 0 7352 .syntax unified 7353 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7354 03d2 42FB03F8 smusd r8, r2, r3 7355 @ 0 "" 2 7356 .LVL744: 7357 .thumb 7358 .syntax unified 7359 .LBE1997: 7360 .LBE1996: 7361 .LBB1998: 7362 .LBB1999: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7363 .loc 5 1985 0 7364 .syntax unified 7365 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7366 03d6 22FB13F3 smuadx r3, r2, r3 7367 @ 0 "" 2 7368 .LVL745: 7369 .thumb 7370 .syntax unified 7371 .LBE1999: 7372 .LBE1998: 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7373 .loc 4 1169 0 7374 03da 03EA0C03 and r3, r3, ip 7375 .LVL746: 7376 03de 43EA1843 orr r3, r3, r8, lsr #16 ARM GAS /tmp/ccfbYRip.s page 273 7377 .LBB2000: 7378 .LBB2001: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7379 .loc 6 969 0 7380 03e2 47F8043B str r3, [r7], #4 @ unaligned 7381 .LVL747: 7382 .LBE2001: 7383 .LBE2000: 7384 .LBB2002: 7385 .LBB2003: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7386 .loc 6 909 0 7387 03e6 5EF80C3B ldr r3, [lr], #12 @ unaligned 7388 .LVL748: 7389 .LBE2003: 7390 .LBE2002: 7391 .LBB2004: 7392 .LBB2005: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7393 .loc 5 2043 0 7394 .syntax unified 7395 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7396 03ea 43FB01F2 smusd r2, r3, r1 7397 @ 0 "" 2 7398 .LVL749: 7399 .thumb 7400 .syntax unified 7401 .LBE2005: 7402 .LBE2004: 7403 .LBB2006: 7404 .LBB2007: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7405 .loc 5 1985 0 7406 .syntax unified 7407 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7408 03ee 23FB11F3 smuadx r3, r3, r1 7409 @ 0 "" 2 7410 .LVL750: 7411 .thumb 7412 .syntax unified 7413 .LBE2007: 7414 .LBE2006: 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7415 .loc 4 1188 0 7416 03f2 03EA0C03 and r3, r3, ip 7417 .LVL751: 7418 03f6 43EA1243 orr r3, r3, r2, lsr #16 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 7419 .loc 4 1193 0 7420 03fa AB45 cmp fp, r5 7421 .LBB2008: 7422 .LBB2009: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7423 .loc 6 969 0 7424 03fc 44F8043B str r3, [r4], #4 @ unaligned 7425 .LVL752: 7426 .LBE2009: ARM GAS /tmp/ccfbYRip.s page 274 7427 .LBE2008: 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 7428 .loc 4 1193 0 7429 0400 A8D1 bne .L334 7430 .LVL753: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7431 .loc 4 1205 0 7432 0402 139B ldr r3, [sp, #76] 7433 0404 042B cmp r3, #4 7434 0406 40F29080 bls .L335 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 7435 .loc 4 1286 0 7436 040a DFF884B1 ldr fp, .L432 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7437 .loc 4 1205 0 7438 040e 0393 str r3, [sp, #12] 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7439 .loc 4 1202 0 7440 0410 0423 movs r3, #4 7441 .LVL754: 7442 .L338: 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 7443 .loc 4 1209 0 7444 0412 0398 ldr r0, [sp, #12] 7445 0414 03EB4302 add r2, r3, r3, lsl #1 7446 0418 8108 lsrs r1, r0, #2 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 7447 .loc 4 1223 0 7448 041a 8C00 lsls r4, r1, #2 7449 .LVL755: 7450 041c 9200 lsls r2, r2, #2 7451 041e 0A94 str r4, [sp, #40] 7452 0420 0D92 str r2, [sp, #52] 7453 0422 029C ldr r4, [sp, #8] 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 7454 .loc 4 1209 0 7455 0424 0F91 str r1, [sp, #60] 7456 .LVL756: 7457 0426 9A00 lsls r2, r3, #2 7458 0428 DB00 lsls r3, r3, #3 7459 .LVL757: 7460 042a 0C93 str r3, [sp, #48] 7461 042c 0E9B ldr r3, [sp, #56] 7462 042e 0793 str r3, [sp, #28] 7463 0430 8C42 cmp r4, r1 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7464 .loc 4 1260 0 7465 0432 129B ldr r3, [sp, #72] 7466 0434 0693 str r3, [sp, #24] 7467 0436 28BF it cs 7468 0438 0C46 movcs r4, r1 7469 043a 0493 str r3, [sp, #16] 7470 043c 0893 str r3, [sp, #32] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7471 .loc 4 1212 0 7472 043e 0023 movs r3, #0 7473 0440 0B94 str r4, [sp, #44] ARM GAS /tmp/ccfbYRip.s page 275 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7474 .loc 4 1260 0 7475 0442 8700 lsls r7, r0, #2 7476 0444 0992 str r2, [sp, #36] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7477 .loc 4 1212 0 7478 0446 0593 str r3, [sp, #20] 7479 .LVL758: 7480 .L337: 7481 .LBB2010: 7482 .LBB2011: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7483 .loc 6 909 0 7484 0448 089A ldr r2, [sp, #32] 7485 044a 0A9B ldr r3, [sp, #40] 7486 044c D2F800A0 ldr r10, [r2] @ unaligned 7487 .LVL759: 7488 .LBE2011: 7489 .LBE2010: 7490 .LBB2012: 7491 .LBB2013: 7492 0450 049A ldr r2, [sp, #16] 7493 0452 079E ldr r6, [sp, #28] 7494 0454 D2F80090 ldr r9, [r2] @ unaligned 7495 .LVL760: 7496 .LBE2013: 7497 .LBE2012: 7498 .LBB2014: 7499 .LBB2015: 7500 0458 069A ldr r2, [sp, #24] 7501 .LBE2015: 7502 .LBE2014: 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 7503 .loc 4 1222 0 7504 045a DDF814E0 ldr lr, [sp, #20] 7505 .LBB2017: 7506 .LBB2016: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7507 .loc 6 909 0 7508 045e D2F80080 ldr r8, [r2] @ unaligned 7509 .LVL761: 7510 .LBE2016: 7511 .LBE2017: 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 7512 .loc 4 1222 0 7513 0462 CDF804E0 str lr, [sp, #4] 7514 0466 9819 adds r0, r3, r6 7515 0468 1D18 adds r5, r3, r0 7516 046a 5C19 adds r4, r3, r5 7517 .LVL762: 7518 .L336: 7519 .LBB2018: 7520 .LBB2019: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7521 .loc 6 909 0 7522 046c 3268 ldr r2, [r6] @ unaligned 7523 .LVL763: ARM GAS /tmp/ccfbYRip.s page 276 7524 .LBE2019: 7525 .LBE2018: 7526 .LBB2020: 7527 .LBB2021: 7528 046e 2968 ldr r1, [r5] @ unaligned 7529 .LVL764: 7530 .LBE2021: 7531 .LBE2020: 7532 .LBB2022: 7533 .LBB2023: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7534 .loc 5 1731 0 7535 .syntax unified 7536 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7537 0470 92FA11F3 qadd16 r3, r2, r1 7538 @ 0 "" 2 7539 .LVL765: 7540 .thumb 7541 .syntax unified 7542 .LBE2023: 7543 .LBE2022: 7544 .LBB2024: 7545 .LBB2025: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7546 .loc 5 1779 0 7547 .syntax unified 7548 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7549 0474 D2FA11F2 qsub16 r2, r2, r1 7550 @ 0 "" 2 7551 .LVL766: 7552 .thumb 7553 .syntax unified 7554 .LBE2025: 7555 .LBE2024: 7556 .LBB2026: 7557 .LBB2027: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7558 .loc 6 909 0 7559 0478 0168 ldr r1, [r0] @ unaligned 7560 .LBE2027: 7561 .LBE2026: 7562 .LBB2028: 7563 .LBB2029: 7564 047a D4F800C0 ldr ip, [r4] @ unaligned 7565 .LBE2029: 7566 .LBE2028: 7567 .LBB2030: 7568 .LBB2031: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7569 .loc 5 1731 0 7570 .syntax unified 7571 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7572 047e 91FA1CF1 qadd16 r1, r1, ip 7573 @ 0 "" 2 7574 .LVL767: 7575 .thumb 7576 .syntax unified ARM GAS /tmp/ccfbYRip.s page 277 7577 .LBE2031: 7578 .LBE2030: 7579 .LBB2032: 7580 .LBB2033: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7581 .loc 5 1739 0 7582 .syntax unified 7583 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7584 0482 93FA21FC shadd16 ip, r3, r1 7585 @ 0 "" 2 7586 .LVL768: 7587 .thumb 7588 .syntax unified 7589 .LBE2033: 7590 .LBE2032: 7591 .LBB2034: 7592 .LBB2035: 7593 0486 4FF0000E mov lr, #0 7594 .syntax unified 7595 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7596 048a 9CFA2EFC shadd16 ip, ip, lr 7597 @ 0 "" 2 7598 .LVL769: 7599 .thumb 7600 .syntax unified 7601 .LBE2035: 7602 .LBE2034: 7603 .LBB2036: 7604 .LBB2037: 7605 .loc 6 991 0 7606 048e C6F800C0 str ip, [r6] @ unaligned 7607 .LVL770: 7608 .LBE2037: 7609 .LBE2036: 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7610 .loc 4 1260 0 7611 0492 3E44 add r6, r6, r7 7612 .LVL771: 7613 .LBB2038: 7614 .LBB2039: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7615 .loc 5 1787 0 7616 .syntax unified 7617 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7618 0494 D3FA21F3 shsub16 r3, r3, r1 7619 @ 0 "" 2 7620 .LVL772: 7621 .thumb 7622 .syntax unified 7623 .LBE2039: 7624 .LBE2038: 7625 .LBB2040: 7626 .LBB2041: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7627 .loc 5 2043 0 7628 .syntax unified 7629 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 278 7630 0498 49FB03FC smusd ip, r9, r3 7631 @ 0 "" 2 7632 .LVL773: 7633 .thumb 7634 .syntax unified 7635 .LBE2041: 7636 .LBE2040: 7637 .LBB2042: 7638 .LBB2043: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7639 .loc 5 1985 0 7640 .syntax unified 7641 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7642 049c 29FB13F3 smuadx r3, r9, r3 7643 @ 0 "" 2 7644 .LVL774: 7645 .thumb 7646 .syntax unified 7647 .LBE2043: 7648 .LBE2042: 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 7649 .loc 4 1286 0 7650 04a0 03EA0B03 and r3, r3, fp 7651 .LVL775: 7652 04a4 43EA1C43 orr r3, r3, ip, lsr #16 7653 .LBB2044: 7654 .LBB2045: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7655 .loc 6 909 0 7656 04a8 D0F800C0 ldr ip, [r0] @ unaligned 7657 .LVL776: 7658 .LBE2045: 7659 .LBE2044: 7660 .LBB2046: 7661 .LBB2047: 7662 .loc 6 991 0 7663 04ac 0360 str r3, [r0] @ unaligned 7664 .LVL777: 7665 .LBE2047: 7666 .LBE2046: 7667 .LBB2048: 7668 .LBB2049: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7669 .loc 6 909 0 7670 04ae 2168 ldr r1, [r4] @ unaligned 7671 .LBE2049: 7672 .LBE2048: 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7673 .loc 4 1287 0 7674 04b0 3844 add r0, r0, r7 7675 .LVL778: 7676 .LBB2050: 7677 .LBB2051: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7678 .loc 5 1779 0 7679 .syntax unified 7680 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 279 7681 04b2 DCFA11F1 qsub16 r1, ip, r1 7682 @ 0 "" 2 7683 .LVL779: 7684 .thumb 7685 .syntax unified 7686 .LBE2051: 7687 .LBE2050: 7688 .LBB2052: 7689 .LBB2053: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7690 .loc 5 1883 0 7691 .syntax unified 7692 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7693 04b6 E2FA21F3 shsax r3, r2, r1 7694 @ 0 "" 2 7695 .LVL780: 7696 .thumb 7697 .syntax unified 7698 .LBE2053: 7699 .LBE2052: 7700 .LBB2054: 7701 .LBB2055: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7702 .loc 5 1835 0 7703 .syntax unified 7704 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7705 04ba A2FA21F2 shasx r2, r2, r1 7706 @ 0 "" 2 7707 .LVL781: 7708 .thumb 7709 .syntax unified 7710 .LBE2055: 7711 .LBE2054: 7712 .LBB2056: 7713 .LBB2057: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7714 .loc 5 2043 0 7715 .syntax unified 7716 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7717 04be 4AFB02F1 smusd r1, r10, r2 7718 @ 0 "" 2 7719 .LVL782: 7720 .thumb 7721 .syntax unified 7722 .LBE2057: 7723 .LBE2056: 7724 .LBB2058: 7725 .LBB2059: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7726 .loc 5 1985 0 7727 .syntax unified 7728 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7729 04c2 2AFB12F2 smuadx r2, r10, r2 7730 @ 0 "" 2 7731 .LVL783: 7732 .thumb 7733 .syntax unified ARM GAS /tmp/ccfbYRip.s page 280 7734 .LBE2059: 7735 .LBE2058: 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 7736 .loc 4 1321 0 7737 04c6 02EA0B02 and r2, r2, fp 7738 .LVL784: 7739 04ca 42EA1142 orr r2, r2, r1, lsr #16 7740 .LBB2060: 7741 .LBB2061: 7742 .loc 6 991 0 7743 04ce 2A60 str r2, [r5] @ unaligned 7744 .LVL785: 7745 .LBE2061: 7746 .LBE2060: 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7747 .loc 4 1322 0 7748 04d0 3D44 add r5, r5, r7 7749 .LVL786: 7750 .LBB2062: 7751 .LBB2063: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7752 .loc 5 2043 0 7753 .syntax unified 7754 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7755 04d2 48FB03F2 smusd r2, r8, r3 7756 @ 0 "" 2 7757 .LVL787: 7758 .thumb 7759 .syntax unified 7760 .LBE2063: 7761 .LBE2062: 7762 .LBB2064: 7763 .LBB2065: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7764 .loc 5 1985 0 7765 .syntax unified 7766 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7767 04d6 28FB13F3 smuadx r3, r8, r3 7768 @ 0 "" 2 7769 .LVL788: 7770 .thumb 7771 .syntax unified 7772 .LBE2065: 7773 .LBE2064: 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 7774 .loc 4 1336 0 7775 04da 03EA0B03 and r3, r3, fp 7776 .LVL789: 7777 04de 43EA1243 orr r3, r3, r2, lsr #16 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7778 .loc 4 1228 0 7779 04e2 0199 ldr r1, [sp, #4] 7780 04e4 039A ldr r2, [sp, #12] 7781 .LVL790: 7782 .LBB2066: 7783 .LBB2067: 7784 .loc 6 991 0 ARM GAS /tmp/ccfbYRip.s page 281 7785 04e6 2360 str r3, [r4] @ unaligned 7786 .LVL791: 7787 .LBE2067: 7788 .LBE2066: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7789 .loc 4 1228 0 7790 04e8 029B ldr r3, [sp, #8] 7791 04ea 1144 add r1, r1, r2 7792 04ec 8B42 cmp r3, r1 7793 04ee 0191 str r1, [sp, #4] 7794 .LVL792: 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 7795 .loc 4 1337 0 7796 04f0 3C44 add r4, r4, r7 7797 .LVL793: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7798 .loc 4 1228 0 7799 04f2 BBD8 bhi .L336 7800 04f4 DDE90821 ldrd r2, r1, [sp, #32] 7801 .LVL794: 7802 04f8 0A44 add r2, r2, r1 7803 04fa 0892 str r2, [sp, #32] 7804 04fc 0C99 ldr r1, [sp, #48] 7805 04fe 049A ldr r2, [sp, #16] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7806 .loc 4 1212 0 7807 0500 059B ldr r3, [sp, #20] 7808 0502 0A44 add r2, r2, r1 7809 0504 0492 str r2, [sp, #16] 7810 0506 0D99 ldr r1, [sp, #52] 7811 0508 069A ldr r2, [sp, #24] 7812 050a 0A44 add r2, r2, r1 7813 050c 0692 str r2, [sp, #24] 7814 050e 079A ldr r2, [sp, #28] 7815 0510 0432 adds r2, r2, #4 7816 0512 0792 str r2, [sp, #28] 7817 0514 0B9A ldr r2, [sp, #44] 7818 0516 0133 adds r3, r3, #1 7819 0518 9342 cmp r3, r2 7820 051a 0593 str r3, [sp, #20] 7821 .LVL795: 7822 051c 94D3 bcc .L337 7823 051e 0F9A ldr r2, [sp, #60] 7824 0520 0392 str r2, [sp, #12] 7825 .LVL796: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7826 .loc 4 1205 0 7827 0522 042A cmp r2, #4 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 7828 .loc 4 1341 0 7829 0524 099B ldr r3, [sp, #36] 7830 .LVL797: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 7831 .loc 4 1205 0 7832 0526 3FF674AF bhi .L338 7833 .LVL798: 7834 .L335: ARM GAS /tmp/ccfbYRip.s page 282 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 7835 .loc 4 1353 0 7836 052a 0E9C ldr r4, [sp, #56] 7837 .LVL799: 7838 052c 139E ldr r6, [sp, #76] 7839 .L339: 7840 .LVL800: 7841 .LBB2068: 7842 .LBB2069: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7843 .loc 6 928 0 7844 052e 2368 ldr r3, [r4] @ unaligned 7845 .LVL801: 7846 .LBE2069: 7847 .LBE2068: 7848 .LBB2070: 7849 .LBB2071: 7850 0530 6268 ldr r2, [r4, #4] @ unaligned 7851 .LVL802: 7852 .LBE2071: 7853 .LBE2070: 7854 .LBB2072: 7855 .LBB2073: 7856 0532 A768 ldr r7, [r4, #8] @ unaligned 7857 .LVL803: 7858 .LBE2073: 7859 .LBE2072: 7860 .LBB2074: 7861 .LBB2075: 7862 0534 E068 ldr r0, [r4, #12] @ unaligned 7863 .LVL804: 7864 .LBE2075: 7865 .LBE2074: 7866 .LBB2076: 7867 .LBB2077: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7868 .loc 5 1731 0 7869 .syntax unified 7870 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7871 0536 93FA17F1 qadd16 r1, r3, r7 7872 @ 0 "" 2 7873 .LVL805: 7874 .thumb 7875 .syntax unified 7876 .LBE2077: 7877 .LBE2076: 7878 .LBB2078: 7879 .LBB2079: 7880 .syntax unified 7881 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7882 053a 92FA10F5 qadd16 r5, r2, r0 7883 @ 0 "" 2 7884 .LVL806: 7885 .thumb 7886 .syntax unified 7887 .LBE2079: 7888 .LBE2078: ARM GAS /tmp/ccfbYRip.s page 283 7889 .LBB2080: 7890 .LBB2081: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7891 .loc 5 1739 0 7892 .syntax unified 7893 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7894 053e 91FA25F5 shadd16 r5, r1, r5 7895 @ 0 "" 2 7896 .LVL807: 7897 .thumb 7898 .syntax unified 7899 .LBE2081: 7900 .LBE2080: 7901 .LBB2082: 7902 .LBB2083: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7903 .loc 6 969 0 7904 0542 2560 str r5, [r4] @ unaligned 7905 .LVL808: 7906 .LBE2083: 7907 .LBE2082: 7908 .LBB2084: 7909 .LBB2085: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7910 .loc 5 1731 0 7911 .syntax unified 7912 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7913 0544 92FA10F5 qadd16 r5, r2, r0 7914 @ 0 "" 2 7915 .LVL809: 7916 .thumb 7917 .syntax unified 7918 .LBE2085: 7919 .LBE2084: 7920 .LBB2086: 7921 .LBB2087: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7922 .loc 5 1787 0 7923 .syntax unified 7924 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7925 0548 D1FA25F1 shsub16 r1, r1, r5 7926 @ 0 "" 2 7927 .LVL810: 7928 .thumb 7929 .syntax unified 7930 .LBE2087: 7931 .LBE2086: 7932 .LBB2088: 7933 .LBB2089: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7934 .loc 6 969 0 7935 054c 6160 str r1, [r4, #4] @ unaligned 7936 .LVL811: 7937 .LBE2089: 7938 .LBE2088: 7939 .LBB2090: 7940 .LBB2091: ARM GAS /tmp/ccfbYRip.s page 284 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7941 .loc 5 1779 0 7942 .syntax unified 7943 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7944 054e D3FA17F3 qsub16 r3, r3, r7 7945 @ 0 "" 2 7946 .LVL812: 7947 .thumb 7948 .syntax unified 7949 .LBE2091: 7950 .LBE2090: 7951 .LBB2092: 7952 .LBB2093: 7953 .syntax unified 7954 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7955 0552 D2FA10F2 qsub16 r2, r2, r0 7956 @ 0 "" 2 7957 .LVL813: 7958 .thumb 7959 .syntax unified 7960 .LBE2093: 7961 .LBE2092: 7962 .LBB2094: 7963 .LBB2095: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7964 .loc 5 1835 0 7965 .syntax unified 7966 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7967 0556 A3FA22F1 shasx r1, r3, r2 7968 @ 0 "" 2 7969 .LVL814: 7970 .thumb 7971 .syntax unified 7972 .LBE2095: 7973 .LBE2094: 7974 .LBB2096: 7975 .LBB2097: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7976 .loc 6 969 0 7977 055a A160 str r1, [r4, #8] @ unaligned 7978 .LVL815: 7979 .LBE2097: 7980 .LBE2096: 7981 .LBB2098: 7982 .LBB2099: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7983 .loc 5 1883 0 7984 .syntax unified 7985 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 7986 055c E3FA22F3 shsax r3, r3, r2 7987 @ 0 "" 2 7988 .LVL816: 7989 .thumb 7990 .syntax unified 7991 .LBE2099: 7992 .LBE2098: 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 285 7993 .loc 4 1418 0 7994 0560 013E subs r6, r6, #1 7995 .LVL817: 7996 .LBB2100: 7997 .LBB2101: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 7998 .loc 6 969 0 7999 0562 E360 str r3, [r4, #12] @ unaligned 8000 0564 04F11004 add r4, r4, #16 8001 .LVL818: 8002 .LBE2101: 8003 .LBE2100: 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 8004 .loc 4 1418 0 8005 0568 E1D1 bne .L339 8006 056a 66E5 b .L328 8007 .LVL819: 8008 .L429: 8009 .LBE1929: 8010 .LBE1928: 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 8011 .loc 10 725 0 8012 056c B3F5007F cmp r3, #512 8013 0570 3FF45DAD beq .L342 8014 0574 61E5 b .L328 8015 .L427: 8016 0576 102B cmp r3, #16 8017 0578 7FF45FAD bne .L328 8018 057c 6FE5 b .L340 8019 .L431: 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c **** { 8020 .loc 10 705 0 8021 057e B3F5007F cmp r3, #512 8022 0582 3FF4C1AE beq .L331 8023 0586 58E5 b .L328 8024 .L430: 8025 0588 102B cmp r3, #16 8026 058a 7FF456AD bne .L328 8027 058e CEE6 b .L329 8028 .L433: 8029 .align 2 8030 .L432: 8031 0590 0000FFFF .word -65536 8032 .cfi_endproc 8033 .LFE160: 8035 .section .text.arm_cfft_radix4by2_q31,"ax",%progbits 8036 .align 1 8037 .p2align 2,,3 8038 .global arm_cfft_radix4by2_q31 8039 .syntax unified 8040 .thumb 8041 .thumb_func 8042 .fpu fpv4-sp-d16 8044 arm_cfft_radix4by2_q31: 8045 .LFB164: 8046 .file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/ccfbYRip.s page 286 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Title: arm_cfft_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Description: Combined Radix Decimation in Frequency CFFT fixed point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** #if defined(ARM_MATH_MVEI) 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** #include "arm_vec_fft.h" 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static void arm_bitreversal_32_inpl_mve( 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t *pSrc, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const uint16_t bitRevLen, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const uint16_t *pBitRevTab) 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint64_t *src = (uint64_t *) pSrc; 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t blkCnt; /* loop counters */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32x4_t bitRevTabOff; 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32x4_t one = vdupq_n_u32(1); 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (bitRevLen / 2) / 2; 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) { 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** bitRevTabOff = vldrhq_u32(pBitRevTab); 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pBitRevTab += 4; 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint64x2_t bitRevOff1 = vmullbq_int_u32(bitRevTabOff, one); 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint64x2_t bitRevOff2 = vmulltq_int_u32(bitRevTabOff, one); 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint64x2_t in1 = vldrdq_gather_offset_u64(src, bitRevOff1); 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint64x2_t in2 = vldrdq_gather_offset_u64(src, bitRevOff2); 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 287 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrdq_scatter_offset_u64(src, bitRevOff1, in2); 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrdq_scatter_offset_u64(src, bitRevOff2, in1); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Decrement the blockSize loop counter 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static void _arm_radix4_butterfly_q31_mve( 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const arm_cfft_instance_q31 * S, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pSrc, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecTmp0, vecTmp1; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecA, vecB, vecC, vecD; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecW; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t blkCnt; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n1, n2; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t stage = 0; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** int32_t iter = 1; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static const uint32_t strides[4] = { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** (0 - 16) * sizeof(q31_t *), (1 - 16) * sizeof(q31_t *), 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** (8 - 16) * sizeof(q31_t *), (9 - 16) * sizeof(q31_t *) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** }; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Process first stages 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Each stage in middle stages provides two down scaling of the input 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n1 = n2; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 >>= 2u; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (int k = fftLen / 4u; k > 1; k >>= 2u) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (int i = 0; i < iter; i++) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride2 = 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** &S->rearranged_twiddle_stride2[ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride1 = 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** &S->rearranged_twiddle_stride1[ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *pW1, *pW2, *pW3; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inA = pSrc + CMPLX_DIM * i * n1; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inB = inA + n2 * CMPLX_DIM; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inC = inB + n2 * CMPLX_DIM; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inD = inC + n2 * CMPLX_DIM; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW1 = p_rearranged_twiddle_tab_stride1; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW2 = p_rearranged_twiddle_tab_stride2; ARM GAS /tmp/ccfbYRip.s page 288 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW3 = p_rearranged_twiddle_tab_stride3; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = n2 / 2; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * load 2 x q31 complex pair 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_s32(inA); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_s32(inC); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecB = vldrwq_s32(inB); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecD = vldrwq_s32(inD); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum0 = vhaddq(vecA, vecC); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff0 = vhsubq(vecA, vecC); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum1 = vhaddq(vecB, vecD); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff1 = vhsubq(vecB, vecD); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inA, vecTmp0); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inA += 4; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW2); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW2 += 4; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inB, vecTmp1); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inB += 4; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW1); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW1 += 4; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inC, vecTmp1); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inC += 4; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW3); ARM GAS /tmp/ccfbYRip.s page 289 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW3 += 4; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inD, vecTmp1); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inD += 4; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_s32(inA); 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_s32(inC); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n1 = n2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 >>= 2u; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** iter = iter << 2; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** stage++; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * End of 1st stages process 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 9.23(q23) format for the 256 point as there are 2 middle stages 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 7.25(q25) format for the 64 point as there are 1 middle stage 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 5.27(q27) format for the 16 point as there are no middle stages 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * start of Last stage process 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * load scheduling 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen >> 3); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum0 = vhaddq(vecA, vecC); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff0 = vhsubq(vecA, vecC); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecB = vldrwq_gather_base_s32(vecScGathAddr, 8); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecD = vldrwq_gather_base_s32(vecScGathAddr, 24); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum1 = vhaddq(vecB, vecD); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff1 = vhsubq(vecB, vecD); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * pre-load for next iteration 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 290 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0); 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 11.21(q21) format for the 1024 point 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 9.23(q23) format for the 256 point 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 7.25(q25) format for the 64 point 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 5.27(q27) format for the 16 point 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static void arm_cfft_radix4by2_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_t fftLen 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n2; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pIn0; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pIn1; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t *pCoef = S->pTwiddle; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t blkCnt; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecIn0, vecIn1, vecSum, vecDiff; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecCmplxTmp, vecTw; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 = pSrc; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn1 = pSrc + fftLen; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = n2 / 2; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn1 = vld1q_s32(pIn1); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 >> 1; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn1 = vecIn1 >> 1; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum = vhaddq(vecIn0, vecIn1); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn0, vecSum); 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 += 4; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTw = vld1q_s32(pCoef); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pCoef += 4; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff = vhsubq(vecIn0, vecIn1); 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw); 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn1, vecCmplxTmp); 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn1 += 4; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; ARM GAS /tmp/ccfbYRip.s page 291 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_q31_mve(S, pSrc, n2); 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_q31_mve(S, pSrc + fftLen, n2); 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 = pSrc; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen << 1) >> 2; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 << 1; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn0, vecIn0); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 += 4; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * tail 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * (will be merged thru tail predication) 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen << 1) & 3; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if (blkCnt > 0U) 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 << 1; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_p(pIn0, vecIn0, p0); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static void _arm_radix4_butterfly_inverse_q31_mve( 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const arm_cfft_instance_q31 *S, 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pSrc, 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen) 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecTmp0, vecTmp1; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecA, vecB, vecC, vecD; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecW; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t blkCnt; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n1, n2; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t stage = 0; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** int32_t iter = 1; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static const uint32_t strides[4] = { 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** (0 - 16) * sizeof(q31_t *), (1 - 16) * sizeof(q31_t *), 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** (8 - 16) * sizeof(q31_t *), (9 - 16) * sizeof(q31_t *) 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** }; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Process first stages 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * Each stage in middle stages provides two down scaling of the input 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n1 = n2; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 >>= 2u; ARM GAS /tmp/ccfbYRip.s page 292 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (int k = fftLen / 4u; k > 1; k >>= 2u) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (int i = 0; i < iter; i++) 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride2 = 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** &S->rearranged_twiddle_stride2[ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *p_rearranged_twiddle_tab_stride1 = 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** &S->rearranged_twiddle_stride1[ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t const *pW1, *pW2, *pW3; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inA = pSrc + CMPLX_DIM * i * n1; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inB = inA + n2 * CMPLX_DIM; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inC = inB + n2 * CMPLX_DIM; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *inD = inC + n2 * CMPLX_DIM; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW1 = p_rearranged_twiddle_tab_stride1; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW2 = p_rearranged_twiddle_tab_stride2; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW3 = p_rearranged_twiddle_tab_stride3; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = n2 / 2; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * load 2 x q31 complex pair 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_s32(inA); 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_s32(inC); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecB = vldrwq_s32(inB); 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecD = vldrwq_s32(inD); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum0 = vhaddq(vecA, vecC); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff0 = vhsubq(vecA, vecC); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum1 = vhaddq(vecB, vecD); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff1 = vhsubq(vecB, vecD); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inA, vecTmp0); 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inA += 4; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW2); 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW2 += 4; 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 293 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inB, vecTmp1); 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inB += 4; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW1); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW1 += 4; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inC, vecTmp1); 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inC += 4; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecW = vld1q(pW3); 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pW3 += 4; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW); 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(inD, vecTmp1); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** inD += 4; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_s32(inA); 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_s32(inC); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n1 = n2; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 >>= 2u; 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** iter = iter << 2; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** stage++; 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * End of 1st stages process 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 9.23(q23) format for the 256 point as there are 2 middle stages 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 7.25(q25) format for the 64 point as there are 1 middle stage 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * data is in 5.27(q27) format for the 16 point as there are no middle stages 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * start of Last stage process 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * load scheduling 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); ARM GAS /tmp/ccfbYRip.s page 294 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen >> 3); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum0 = vhaddq(vecA, vecC); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff0 = vhsubq(vecA, vecC); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecB = vldrwq_gather_base_s32(vecScGathAddr, 8); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecD = vldrwq_gather_base_s32(vecScGathAddr, 24); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum1 = vhaddq(vecB, vecD); 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff1 = vhsubq(vecB, vecD); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * pre-load for next iteration 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhaddq(vecSum0, vecSum1); 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = vhsubq(vecSum0, vecSum1); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 11.21(q21) format for the 1024 point 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 9.23(q23) format for the 256 point 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 7.25(q25) format for the 64 point 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * output is in 5.27(q27) format for the 16 point 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** static void arm_cfft_radix4by2_inverse_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_ 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n2; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pIn0; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t *pIn1; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t *pCoef = S->pTwiddle; 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //uint16_t twidCoefModifier = arm_cfft_radix2_twiddle_factor(S->fftLen); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //q31_t twidIncr = (2 * twidCoefModifier * sizeof(q31_t)); 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t blkCnt; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //uint64x2_t vecOffs; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecIn0, vecIn1, vecSum, vecDiff; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31x4_t vecCmplxTmp, vecTw; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 295 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 = pSrc; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn1 = pSrc + fftLen; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //vecOffs[0] = 0; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //vecOffs[1] = (uint64_t) twidIncr; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = n2 / 2; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn1 = vld1q_s32(pIn1); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 >> 1; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn1 = vecIn1 >> 1; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecSum = vhaddq(vecIn0, vecIn1); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn0, vecSum); 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 += 4; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //vecTw = (q31x4_t) vldrdq_gather_offset_s64(pCoef, vecOffs); 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecTw = vld1q_s32(pCoef); 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pCoef += 4; 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecDiff = vhsubq(vecIn0, vecIn1); 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecCmplxTmp = MVE_CMPLX_MULT_FX_AxB(vecDiff, vecTw); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn1, vecCmplxTmp); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn1 += 4; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** //vecOffs = vaddq((q31x4_t) vecOffs, 2 * twidIncr); 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, n2); 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_inverse_q31_mve(S, pSrc + fftLen, n2); 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 = pSrc; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen << 1) >> 2; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** while (blkCnt > 0U) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 << 1; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vst1q(pIn0, vecIn0); 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pIn0 += 4; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt--; 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * tail 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** * (will be merged thru tail predication) 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** blkCnt = (fftLen << 1) & 3; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if (blkCnt > 0U) 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vld1q_s32(pIn0); 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vecIn0 = vecIn0 << 1; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** vstrwq_p(pIn0, vecIn0, p0); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } ARM GAS /tmp/ccfbYRip.s page 296 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @ingroup groupTransforms 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @addtogroup ComplexFFT 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @{ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @brief Processing function for the Q31 complex FFT. 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] S points to an instance of the fixed-point CFFT structure 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. P 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] ifftFlag flag that selects transform direction 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 0: forward transform 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 1: inverse transform 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 0: disables bit reversal of output 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 1: enables bit reversal of output 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @return none 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_q31( 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const arm_cfft_instance_q31 * S, 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint8_t ifftFlag, 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint8_t bitReverseFlag) 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen = S->fftLen; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if (ifftFlag == 1U) { 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** switch (fftLen) { 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 16: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 64: 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 256: 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 1024: 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 4096: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, fftLen); 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 32: 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 128: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 512: 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 2048: 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_cfft_radix4by2_inverse_q31_mve(S, pSrc, fftLen); 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } else { 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** switch (fftLen) { 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 16: 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 64: 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 256: 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 1024: 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 4096: ARM GAS /tmp/ccfbYRip.s page 297 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** _arm_radix4_butterfly_q31_mve(S, pSrc, fftLen); 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 32: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 128: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 512: 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 2048: 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_cfft_radix4by2_q31_mve(S, pSrc, fftLen); 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if (bitReverseFlag) 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable); 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** #else 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** extern void arm_radix4_butterfly_q31( 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef, 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t twidCoefModifier); 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** extern void arm_radix4_butterfly_inverse_q31( 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef, 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t twidCoefModifier); 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** extern void arm_bitreversal_32( 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t * pSrc, 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const uint16_t bitRevLen, 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const uint16_t * pBitRevTable); 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_radix4by2_q31( 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef); 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_radix4by2_inverse_q31( 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef); 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @ingroup groupTransforms 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @addtogroup ComplexFFT 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @{ ARM GAS /tmp/ccfbYRip.s page 298 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @brief Processing function for the Q31 complex FFT. 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] S points to an instance of the fixed-point CFFT structure 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. P 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] ifftFlag flag that selects transform direction 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 0: forward transform 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 1: inverse transform 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 0: disables bit reversal of output 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** - value = 1: enables bit reversal of output 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @return none 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_q31( 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const arm_cfft_instance_q31 * S, 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * p1, 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint8_t ifftFlag, 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint8_t bitReverseFlag) 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t L = S->fftLen; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if (ifftFlag == 1U) 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** switch (L) 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 16: 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 64: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 256: 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 1024: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 4096: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 ); 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 32: 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 128: 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 512: 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 2048: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle ); 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** else 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** switch (L) 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 16: 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 64: 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 256: 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 1024: 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 4096: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 ); 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 32: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 128: 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 512: ARM GAS /tmp/ccfbYRip.s page 299 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** case 2048: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle ); 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** if ( bitReverseFlag ) 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /** 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** @} end of ComplexFFT group 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_radix4by2_q31( 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef) 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 8047 .loc 11 761 0 8048 .cfi_startproc 8049 @ args = 0, pretend = 0, frame = 160 8050 @ frame_needed = 0, uses_anonymous_args = 0 8051 .LVL820: 8052 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 8053 .LCFI70: 8054 .cfi_def_cfa_offset 36 8055 .cfi_offset 4, -36 8056 .cfi_offset 5, -32 8057 .cfi_offset 6, -28 8058 .cfi_offset 7, -24 8059 .cfi_offset 8, -20 8060 .cfi_offset 9, -16 8061 .cfi_offset 10, -12 8062 .cfi_offset 11, -8 8063 .cfi_offset 14, -4 8064 0004 A9B0 sub sp, sp, #164 8065 .LCFI71: 8066 .cfi_def_cfa_offset 200 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t i, l; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n2; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t xt, yt, cosVal, sinVal; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t p0, p1; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1U; 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (i = 0; i < n2; i++) 8067 .loc 11 768 0 8068 0006 4B08 lsrs r3, r1, #1 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t i, l; 8069 .loc 11 761 0 8070 0008 2191 str r1, [sp, #132] 8071 .LVL821: 8072 000a 1190 str r0, [sp, #68] 8073 000c 1E92 str r2, [sp, #120] 8074 .loc 11 768 0 8075 000e 0493 str r3, [sp, #16] 8076 0010 55D0 beq .L435 ARM GAS /tmp/ccfbYRip.s page 300 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** cosVal = pCoef[2 * i]; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** sinVal = pCoef[2 * i + 1]; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** l = i + n2; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U); 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U); 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 8077 .loc 11 781 0 8078 0012 4FF0004A mov r10, #-2147483648 8079 0016 4FF0000B mov fp, #0 8080 001a CDE900AB strd r10, [sp] 8081 001e 0646 mov r6, r0 8082 0020 00EBC309 add r9, r0, r3, lsl #3 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 8083 .loc 11 768 0 8084 0024 4FF00408 mov r8, #4 8085 0028 4FF0000C mov ip, #0 8086 .LVL822: 8087 .L436: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 8088 .loc 11 775 0 discriminator 3 8089 002c 59F83C10 ldr r1, [r9, ip, lsl #3] 8090 0030 56F83C20 ldr r2, [r6, ip, lsl #3] 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** sinVal = pCoef[2 * i + 1]; 8091 .loc 11 770 0 discriminator 3 8092 0034 1E98 ldr r0, [sp, #120] 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 8093 .loc 11 775 0 discriminator 3 8094 0036 9210 asrs r2, r2, #2 8095 0038 8C10 asrs r4, r1, #2 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 8096 .loc 11 776 0 discriminator 3 8097 003a 1119 adds r1, r2, r4 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** sinVal = pCoef[2 * i + 1]; 8098 .loc 11 770 0 discriminator 3 8099 003c 50F83C30 ldr r3, [r0, ip, lsl #3] 8100 .LVL823: 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 8101 .loc 11 771 0 discriminator 3 8102 0040 50F808E0 ldr lr, [r0, r8] 8103 .LVL824: 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 8104 .loc 11 776 0 discriminator 3 8105 0044 46F83C10 str r1, [r6, ip, lsl #3] 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 8106 .loc 11 778 0 discriminator 3 8107 0048 56F80810 ldr r1, [r6, r8] 8108 004c 59F80800 ldr r0, [r9, r8] 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 8109 .loc 11 775 0 discriminator 3 8110 0050 171B subs r7, r2, r4 ARM GAS /tmp/ccfbYRip.s page 301 8111 .LVL825: 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 8112 .loc 11 782 0 discriminator 3 8113 0052 DDE90045 ldrd r4, [sp] 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 8114 .loc 11 778 0 discriminator 3 8115 0056 8010 asrs r0, r0, #2 8116 0058 8910 asrs r1, r1, #2 8117 005a A1EB000B sub fp, r1, r0 8118 .LVL826: 8119 .loc 11 782 0 discriminator 3 8120 005e CBFB0345 smlal r4, r5, fp, r3 8121 0062 CDE90245 strd r4, [sp, #8] 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 8122 .loc 11 781 0 discriminator 3 8123 0066 DDE90045 ldrd r4, [sp] 8124 006a C3FB0745 smlal r4, r5, r3, r7 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 8125 .loc 11 783 0 discriminator 3 8126 006e 2B46 mov r3, r5 8127 .LVL827: 8128 0070 0022 movs r2, #0 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multSub_32x32_keep32_R(p1, xt, sinVal); 8129 .loc 11 784 0 discriminator 3 8130 0072 DDE90245 ldrd r4, [sp, #8] 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 8131 .loc 11 783 0 discriminator 3 8132 0076 CEFB0B23 smlal r2, r3, lr, fp 8133 .loc 11 784 0 discriminator 3 8134 007a 0024 movs r4, #0 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 8135 .loc 11 783 0 discriminator 3 8136 007c 9246 mov r10, r2 8137 007e 9B46 mov fp, r3 8138 .LVL828: 8139 .loc 11 784 0 discriminator 3 8140 0080 87FB0E23 smull r2, r3, r7, lr 8141 0084 A21A subs r2, r4, r2 8142 0086 65EB0303 sbc r3, r5, r3 8143 008a 1446 mov r4, r2 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 8144 .loc 11 783 0 discriminator 3 8145 008c 1AF10042 adds r2, r10, #-2147483648 8146 .loc 11 784 0 discriminator 3 8147 0090 1D46 mov r5, r3 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 8148 .loc 11 783 0 discriminator 3 8149 0092 4BF10003 adc r3, fp, #0 8150 .loc 11 784 0 discriminator 3 8151 0096 14F10044 adds r4, r4, #-2147483648 8152 009a 45F10005 adc r5, r5, #0 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 8153 .loc 11 779 0 discriminator 3 8154 009e 0144 add r1, r1, r0 8155 .LVL829: 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l] = p0 << 1; ARM GAS /tmp/ccfbYRip.s page 302 8156 .loc 11 786 0 discriminator 3 8157 00a0 5800 lsls r0, r3, #1 8158 .LVL830: 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l + 1] = p1 << 1; 8159 .loc 11 787 0 discriminator 3 8160 00a2 6B00 lsls r3, r5, #1 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 8161 .loc 11 779 0 discriminator 3 8162 00a4 46F80810 str r1, [r6, r8] 8163 .LVL831: 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l + 1] = p1 << 1; 8164 .loc 11 786 0 discriminator 3 8165 00a8 49F83C00 str r0, [r9, ip, lsl #3] 8166 .loc 11 787 0 discriminator 3 8167 00ac 49F80830 str r3, [r9, r8] 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 8168 .loc 11 768 0 discriminator 3 8169 00b0 049B ldr r3, [sp, #16] 8170 00b2 0CF1010C add ip, ip, #1 8171 .LVL832: 8172 00b6 6345 cmp r3, ip 8173 00b8 08F10808 add r8, r8, #8 8174 00bc B6D1 bne .L436 8175 .LVL833: 8176 .L435: 8177 .LBB2106: 8178 .LBB2107: 8179 .file 12 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Title: arm_cfft_radix4_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Description: This file has function definition of Radix-4 FFT & IFFT function and 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * In-place bit reversal using bit reversal table 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * $Date: 18. March 2019 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * $Revision: V1.6.0 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Target Processor: Cortex-M cores 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * -------------------------------------------------------------------- */ 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * SPDX-License-Identifier: Apache-2.0 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * not use this file except in compliance with the License. 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * You may obtain a copy of the License at 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * www.apache.org/licenses/LICENSE-2.0 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Unless required by applicable law or agreed to in writing, software 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * See the License for the specific language governing permissions and 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * limitations under the License. 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 303 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** #include "arm_math.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_radix4_butterfly_inverse_q31( 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t fftLen, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const q31_t * pCoef, 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t twidCoefModifier); 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_radix4_butterfly_q31( 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t fftLen, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const q31_t * pCoef, 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t twidCoefModifier); 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_bitreversal_q31( 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t fftLen, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint16_t bitRevFactor, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const uint16_t * pBitRevTab); 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @ingroup groupTransforms 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @addtogroup ComplexFFT 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @{ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @brief Processing function for the Q31 CFFT/CIFFT. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] S points to an instance of the Q31 CFFT/CIFFT structure 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing o 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @return none 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @par Input and output formats: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** Internally input is downscaled by 2 for every stage to avoid saturations inside CF 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** Hence the output format is different for different FFT sizes. 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** The input and output formats for different FFT sizes and number of bits to upscale 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @par 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT" 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT" 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_cfft_radix4_q31( 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const arm_cfft_radix4_instance_q31 * S, 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** if (S->ifftFlag == 1U) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Complex IFFT radix-4 */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** else 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Complex FFT radix-4 */ ARM GAS /tmp/ccfbYRip.s page 304 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** if (S->bitReverseFlag == 1U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Bit Reversal */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @} end of ComplexFFT group 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Radix-4 FFT algorithm used is : 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Input real and imaginary data: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n) = xa + j * ya 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+N/4 ) = xb + j * yb 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+N/2 ) = xc + j * yc 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+3N 4) = xd + j * yd 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Output real and imaginary data: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r) = xa'+ j * ya' 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+1) = xb'+ j * yb' 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+2) = xc'+ j * yc' 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+3) = xd'+ j * yd' 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Twiddle factors for radix-4 FFT: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Wn = co1 + j * (- si1) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * W2n = co2 + j * (- si2) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * W3n = co3 + j * (- si3) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Butterfly implementation: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xa' = xa + xb + xc + xd 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * ya' = ya + yb + yc + yd 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @brief Core function for the Q31 CFFT butterfly process. 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in,out] pSrc points to the in-place buffer of Q31 data type. 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] fftLen length of the FFT. 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] pCoef points to twiddle coefficient buffer. 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wi 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @return none 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ ARM GAS /tmp/ccfbYRip.s page 305 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_radix4_butterfly_q31( 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc, 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t fftLen, 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const q31_t * pCoef, 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t twidCoefModifier) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t xa, xb, xc, xd; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t ya, yb, yc, yd; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t xa_out, xb_out, xc_out, xd_out; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t ya_out, yb_out, yc_out, yd_out; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t *ptr1; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Total process is divided into three stages */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* process first stage, middle stages, & last stage */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* start of first stage process */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the first stage */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 = fftLen; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n1 = n2; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* n2 = fftLen/4 */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 >>= 2U; 8180 .loc 12 172 0 8181 00be 219B ldr r3, [sp, #132] 8182 00c0 1199 ldr r1, [sp, #68] 8183 00c2 DDF878A0 ldr r10, [sp, #120] 8184 00c6 2291 str r1, [sp, #136] 8185 00c8 DA08 lsrs r2, r3, #3 8186 00ca 02EB4203 add r3, r2, r2, lsl #1 8187 00ce DB00 lsls r3, r3, #3 8188 00d0 D000 lsls r0, r2, #3 8189 00d2 1401 lsls r4, r2, #4 8190 00d4 1D1D adds r5, r3, #4 8191 00d6 2092 str r2, [sp, #128] 8192 .LVL834: 8193 00d8 C2EB4273 rsb r3, r2, r2, lsl #29 8194 00dc 1E9A ldr r2, [sp, #120] 8195 .LVL835: 8196 00de 2590 str r0, [sp, #148] 8197 00e0 061D adds r6, r0, #4 8198 00e2 01EB000E add lr, r1, r0 8199 00e6 01EB0609 add r9, r1, r6 8200 00ea 101D adds r0, r2, #4 8201 00ec DB00 lsls r3, r3, #3 8202 00ee 2694 str r4, [sp, #152] 8203 00f0 4F19 adds r7, r1, r5 8204 00f2 0EEB040B add fp, lr, r4 8205 00f6 0C19 adds r4, r1, r4 8206 00f8 C846 mov r8, r9 8207 00fa D446 mov ip, r10 ARM GAS /tmp/ccfbYRip.s page 306 8208 00fc 2395 str r5, [sp, #140] 8209 00fe 2496 str r6, [sp, #144] 8210 0100 1F90 str r0, [sp, #124] 8211 0102 0B94 str r4, [sp, #44] 8212 0104 2793 str r3, [sp, #156] 8213 0106 0290 str r0, [sp, #8] 8214 0108 0590 str r0, [sp, #20] 8215 010a B946 mov r9, r7 8216 010c 9A46 mov r10, r3 8217 .LVL836: 8218 .L437: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** j = n2; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Calculation of first stage */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** do 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the input as, */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i1 = i0 + n2; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i2 = i1 + n2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i3 = i2 + n2; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* input is in 1.31(q31) format and provide 4 guard bits for the input */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Butterfly implementation */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U); 8219 .loc 12 191 0 8220 010e 5EF80A40 ldr r4, [lr, r10] 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb + xd */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U); 8221 .loc 12 196 0 8222 0112 59F8042C ldr r2, [r9, #-4] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8223 .loc 12 191 0 8224 0116 5BF80A00 ldr r0, [fp, r10] 8225 .loc 12 196 0 8226 011a 58F8041C ldr r1, [r8, #-4] 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya + yc */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U); 8227 .loc 12 199 0 8228 011e 59F80A30 ldr r3, [r9, r10] 8229 0122 58F80A50 ldr r5, [r8, r10] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8230 .loc 12 191 0 8231 0126 2611 asrs r6, r4, #4 8232 0128 0011 asrs r0, r0, #4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8233 .loc 12 196 0 8234 012a 1411 asrs r4, r2, #4 ARM GAS /tmp/ccfbYRip.s page 307 8235 012c 04EB2114 add r4, r4, r1, asr #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8236 .loc 12 191 0 8237 0130 3218 adds r2, r6, r0 8238 .LVL837: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i0] = (r1 + t1); 8239 .loc 12 204 0 8240 0132 1119 adds r1, r2, r4 8241 0134 4EF80A10 str r1, [lr, r10] 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r1 - t1; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U); 8242 .loc 12 208 0 8243 0138 DBF80410 ldr r1, [fp, #4] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8244 .loc 12 191 0 8245 013c 0A90 str r0, [sp, #40] 8246 .loc 12 208 0 8247 013e DEF80400 ldr r0, [lr, #4] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8248 .loc 12 191 0 8249 0142 0096 str r6, [sp] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8250 .loc 12 199 0 8251 0144 1F11 asrs r7, r3, #4 8252 0146 2D11 asrs r5, r5, #4 8253 .loc 12 208 0 8254 0148 0911 asrs r1, r1, #4 8255 014a 01EB2011 add r1, r1, r0, asr #4 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8256 .loc 12 199 0 8257 014e 0695 str r5, [sp, #24] 8258 0150 3D44 add r5, r5, r7 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i0) + 1U] = (s1 + t2); 8259 .loc 12 211 0 8260 0152 6B18 adds r3, r5, r1 8261 0154 48F80A30 str r3, [r8, r10] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya + yc) - (yb + yd) */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s1 - t2; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb - yd */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia2 = 2U * ia1; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 8262 .loc 12 223 0 ARM GAS /tmp/ccfbYRip.s page 308 8263 0158 059B ldr r3, [sp, #20] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8264 .loc 12 199 0 8265 015a 0897 str r7, [sp, #32] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8266 .loc 12 224 0 8267 015c 1E46 mov r6, r3 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8268 .loc 12 223 0 8269 015e 53F8040C ldr r0, [r3, #-4] 8270 .loc 12 224 0 8271 0162 56F8203B ldr r3, [r6], #32 8272 0166 0596 str r6, [sp, #20] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8273 .loc 12 214 0 8274 0168 691A subs r1, r5, r1 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 8275 .loc 12 206 0 8276 016a 121B subs r2, r2, r4 8277 .LVL838: 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8278 .loc 12 228 0 8279 016c 81FB0367 smull r6, r7, r1, r3 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8280 .loc 12 227 0 8281 0170 82FB0045 smull r4, r5, r2, r0 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - 8282 .loc 12 231 0 8283 0174 80FB0101 smull r0, r1, r0, r1 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8284 .loc 12 232 0 8285 0178 82FB0323 smull r2, r3, r2, r3 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8286 .loc 12 227 0 8287 017c 7C19 adds r4, r7, r5 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8288 .loc 12 231 0 8289 017e CA1A subs r2, r1, r3 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8290 .loc 12 217 0 8291 0180 DBF80450 ldr r5, [fp, #4] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8292 .loc 12 219 0 8293 0184 59F8043C ldr r3, [r9, #-4] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8294 .loc 12 217 0 8295 0188 DEF80400 ldr r0, [lr, #4] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8296 .loc 12 219 0 8297 018c 58F8041C ldr r1, [r8, #-4] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8298 .loc 12 201 0 ARM GAS /tmp/ccfbYRip.s page 309 8299 0190 089F ldr r7, [sp, #32] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8300 .loc 12 228 0 8301 0192 6400 lsls r4, r4, #1 8302 .loc 12 232 0 8303 0194 5200 lsls r2, r2, #1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8304 .loc 12 227 0 8305 0196 48F8044C str r4, [r8, #-4] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8306 .loc 12 217 0 8307 019a 2E11 asrs r6, r5, #4 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8308 .loc 12 231 0 8309 019c CEF80420 str r2, [lr, #4] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8310 .loc 12 219 0 8311 01a0 1D11 asrs r5, r3, #4 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8312 .loc 12 193 0 8313 01a2 0A9A ldr r2, [sp, #40] 8314 01a4 009B ldr r3, [sp] 8315 01a6 9C1A subs r4, r3, r2 8316 .LVL839: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8317 .loc 12 201 0 8318 01a8 069B ldr r3, [sp, #24] 8319 01aa DB1B subs r3, r3, r7 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8320 .loc 12 217 0 8321 01ac C6EB2017 rsb r7, r6, r0, asr #4 8322 .LVL840: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8323 .loc 12 219 0 8324 01b0 C5EB2116 rsb r6, r5, r1, asr #4 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r2 + t1; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = r2 - t1; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s2 - t2; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = s2 + t2; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co1 = pCoef[(ia1 * 2U)]; 8325 .loc 12 244 0 8326 01b4 0299 ldr r1, [sp, #8] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8327 .loc 12 201 0 8328 01b6 0093 str r3, [sp] 8329 .LVL841: 8330 .loc 12 244 0 8331 01b8 51F8045C ldr r5, [r1, #-4] 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 8332 .loc 12 245 0 ARM GAS /tmp/ccfbYRip.s page 310 8333 01bc 51F8103B ldr r3, [r1], #16 8334 .LVL842: 8335 01c0 0291 str r1, [sp, #8] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 8336 .loc 12 240 0 8337 01c2 009A ldr r2, [sp] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 8338 .loc 12 235 0 8339 01c4 0A94 str r4, [sp, #40] 8340 01c6 E019 adds r0, r4, r7 8341 .LVL843: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 8342 .loc 12 240 0 8343 01c8 941B subs r4, r2, r6 8344 .LVL844: 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + 8345 .loc 12 248 0 8346 01ca 80FB0512 smull r1, r2, r0, r5 8347 01ce CDE90612 strd r1, [sp, #24] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 8348 .loc 12 249 0 8349 01d2 84FB0312 smull r1, r2, r4, r3 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - 8350 .loc 12 252 0 8351 01d6 85FB0445 smull r4, r5, r5, r4 8352 01da CDE90845 strd r4, [sp, #32] 8353 01de 0999 ldr r1, [sp, #36] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 8354 .loc 12 253 0 8355 01e0 80FB0334 smull r3, r4, r0, r3 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 8356 .loc 12 248 0 8357 01e4 0798 ldr r0, [sp, #28] 8358 .LVL845: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8359 .loc 12 242 0 8360 01e6 009B ldr r3, [sp] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 8361 .loc 12 248 0 8362 01e8 0244 add r2, r2, r0 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 8363 .loc 12 252 0 8364 01ea 091B subs r1, r1, r4 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8365 .loc 12 249 0 8366 01ec 5000 lsls r0, r2, #1 8367 .loc 12 253 0 8368 01ee 4900 lsls r1, r1, #1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 8369 .loc 12 248 0 8370 01f0 4BF80A00 str r0, [fp, r10] 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 8371 .loc 12 252 0 ARM GAS /tmp/ccfbYRip.s page 311 8372 01f4 49F80A10 str r1, [r9, r10] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8373 .loc 12 237 0 8374 01f8 0A9C ldr r4, [sp, #40] 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia3 = 3U * ia1; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 8375 .loc 12 257 0 8376 01fa DCF80000 ldr r0, [ip] 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 8377 .loc 12 262 0 8378 01fe DCF80410 ldr r1, [ip, #4] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8379 .loc 12 237 0 8380 0202 E21B subs r2, r4, r7 8381 .LVL846: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8382 .loc 12 242 0 8383 0204 3344 add r3, r3, r6 8384 .LVL847: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 8385 .loc 12 261 0 8386 0206 82FB0045 smull r4, r5, r2, r0 8387 .loc 12 262 0 8388 020a 83FB0167 smull r6, r7, r3, r1 8389 .LVL848: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - 8390 .loc 12 265 0 8391 020e 80FB0301 smull r0, r1, r0, r3 8392 .LVL849: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 8393 .loc 12 266 0 8394 0212 DCF80430 ldr r3, [ip, #4] 8395 .LVL850: 8396 0216 82FB0323 smull r2, r3, r2, r3 8397 .LVL851: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 8398 .loc 12 261 0 8399 021a 7C19 adds r4, r7, r5 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 8400 .loc 12 265 0 8401 021c CB1A subs r3, r1, r3 8402 .loc 12 266 0 8403 021e 5B00 lsls r3, r3, #1 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8404 .loc 12 262 0 8405 0220 6200 lsls r2, r4, #1 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 8406 .loc 12 261 0 8407 0222 49F8042C str r2, [r9, #-4] ARM GAS /tmp/ccfbYRip.s page 312 8408 .LVL852: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 8409 .loc 12 265 0 8410 0226 CBF80430 str r3, [fp, #4] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = ia1 + twidCoefModifier; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Updating input index */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = i0 + 1U; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } while (--j); 8411 .loc 12 274 0 8412 022a 0B9B ldr r3, [sp, #44] 8413 022c 0EF1080E add lr, lr, #8 8414 0230 7345 cmp r3, lr 8415 0232 08F10808 add r8, r8, #8 8416 0236 0CF1300C add ip, ip, #48 8417 023a 09F10809 add r9, r9, #8 8418 023e 0BF1080B add fp, fp, #8 8419 0242 7FF464AF bne .L437 8420 .LVL853: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* end of first stage process */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 5.27(q27) format */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* start of Middle stages process */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* each stage in middle stages provides two down scaling of the input */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** twidCoefModifier <<= 2U; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 8421 .loc 12 289 0 8422 0246 209B ldr r3, [sp, #128] 8423 0248 042B cmp r3, #4 8424 024a 40F2EA80 bls .L438 8425 024e 1093 str r3, [sp, #64] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8426 .loc 12 286 0 8427 0250 0823 movs r3, #8 8428 0252 1D93 str r3, [sp, #116] 8429 .LVL854: 8430 .L442: 8431 0254 1D9D ldr r5, [sp, #116] 8432 0256 119B ldr r3, [sp, #68] 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the first stage */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n1 = n2; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 >>= 2U; 8433 .loc 12 293 0 8434 0258 109F ldr r7, [sp, #64] 8435 025a 1A46 mov r2, r3 ARM GAS /tmp/ccfbYRip.s page 313 8436 025c 05EB4503 add r3, r5, r5, lsl #1 8437 0260 DB00 lsls r3, r3, #3 8438 0262 1B93 str r3, [sp, #108] 8439 0264 EB00 lsls r3, r5, #3 8440 0266 1A93 str r3, [sp, #104] 8441 0268 2B01 lsls r3, r5, #4 8442 026a 1993 str r3, [sp, #100] 8443 026c FB00 lsls r3, r7, #3 8444 026e BC08 lsrs r4, r7, #2 8445 0270 1293 str r3, [sp, #72] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Calculation of first stage */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (j = 0U; j <= (n2 - 1U); j++) 8446 .loc 12 297 0 8447 0272 1E9B ldr r3, [sp, #120] 8448 0274 1693 str r3, [sp, #88] 8449 0276 02EBC400 add r0, r2, r4, lsl #3 8450 027a 2101 lsls r1, r4, #4 8451 027c C4EB4472 rsb r2, r4, r4, lsl #29 8452 0280 D600 lsls r6, r2, #3 8453 0282 0430 adds r0, r0, #4 8454 0284 0439 subs r1, r1, #4 8455 0286 621E subs r2, r4, #1 8456 0288 CDE91433 strd r3, r3, [sp, #80] 8457 028c 0023 movs r3, #0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 8458 .loc 12 293 0 8459 028e 0C94 str r4, [sp, #48] 8460 .LVL855: 8461 0290 1790 str r0, [sp, #92] 8462 0292 1C91 str r1, [sp, #112] 8463 .loc 12 297 0 8464 0294 1892 str r2, [sp, #96] 8465 0296 1393 str r3, [sp, #76] 8466 0298 0296 str r6, [sp, #8] 8467 .LVL856: 8468 .L441: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia2 = ia1 + ia1; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia3 = ia2 + ia1; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co1 = pCoef[(ia1 * 2U)]; 8469 .loc 12 302 0 8470 029a 169B ldr r3, [sp, #88] 8471 029c 1A68 ldr r2, [r3] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 8472 .loc 12 303 0 8473 029e 5B68 ldr r3, [r3, #4] 8474 02a0 0A93 str r3, [sp, #40] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 8475 .loc 12 304 0 8476 02a2 159B ldr r3, [sp, #84] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 8477 .loc 12 302 0 8478 02a4 0592 str r2, [sp, #20] 8479 .LVL857: ARM GAS /tmp/ccfbYRip.s page 314 8480 .loc 12 304 0 8481 02a6 1A68 ldr r2, [r3] 8482 .LVL858: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8483 .loc 12 305 0 8484 02a8 5B68 ldr r3, [r3, #4] 8485 02aa 0693 str r3, [sp, #24] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 8486 .loc 12 306 0 8487 02ac 149B ldr r3, [sp, #80] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8488 .loc 12 304 0 8489 02ae 0F92 str r2, [sp, #60] 8490 .LVL859: 8491 .loc 12 306 0 8492 02b0 1A68 ldr r2, [r3] 8493 .LVL860: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 8494 .loc 12 307 0 8495 02b2 5B68 ldr r3, [r3, #4] 8496 02b4 0B93 str r3, [sp, #44] 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = ia1 + twidCoefModifier; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (i0 = j; i0 < fftLen; i0 += n1) 8497 .loc 12 311 0 8498 02b6 049B ldr r3, [sp, #16] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 8499 .loc 12 306 0 8500 02b8 0892 str r2, [sp, #32] 8501 .LVL861: 8502 .loc 12 311 0 8503 02ba 1946 mov r1, r3 8504 02bc 139B ldr r3, [sp, #76] 8505 02be 9942 cmp r1, r3 8506 02c0 40F29180 bls .L439 8507 02c4 1C9A ldr r2, [sp, #112] 8508 .LVL862: 8509 02c6 0093 str r3, [sp] 8510 02c8 1046 mov r0, r2 8511 02ca 179A ldr r2, [sp, #92] 8512 02cc 00EB020A add r10, r0, r2 8513 02d0 9346 mov fp, r2 8514 .LVL863: 8515 .L440: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the input as, */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i1 = i0 + n2; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i2 = i1 + n2; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i3 = i2 + n2; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Butterfly implementation */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = pSrc[2U * i0] + pSrc[2U * i2]; 8516 .loc 12 321 0 8517 02d2 119F ldr r7, [sp, #68] ARM GAS /tmp/ccfbYRip.s page 315 8518 02d4 009C ldr r4, [sp] 8519 02d6 0299 ldr r1, [sp, #8] 8520 02d8 57F83450 ldr r5, [r7, r4, lsl #3] 8521 02dc 5AF80160 ldr r6, [r10, r1] 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = pSrc[2U * i0] - pSrc[2U * i2]; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya + yc */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb + xd */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 8522 .loc 12 331 0 8523 02e0 5BF8042C ldr r2, [fp, #-4] 8524 02e4 DAF80030 ldr r3, [r10] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8525 .loc 12 326 0 8526 02e8 5BF80180 ldr r8, [fp, r1] 8527 02ec 0C99 ldr r1, [sp, #48] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8528 .loc 12 321 0 8529 02ee 05EB060E add lr, r5, r6 8530 .LVL864: 8531 .loc 12 331 0 8532 02f2 1344 add r3, r3, r2 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i0] = (r1 + t1) >> 2U; 8533 .loc 12 334 0 8534 02f4 0EEB0302 add r2, lr, r3 8535 02f8 BC46 mov ip, r7 8536 02fa 9210 asrs r2, r2, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8537 .loc 12 326 0 8538 02fc 5BF83100 ldr r0, [fp, r1, lsl #3] 8539 .loc 12 334 0 8540 0300 4CF83420 str r2, [ip, r4, lsl #3] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r1 - t1; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; 8541 .loc 12 339 0 8542 0304 DBF80010 ldr r1, [fp] 8543 0308 DAF80420 ldr r2, [r10, #4] 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U; 8544 .loc 12 341 0 8545 030c 029C ldr r4, [sp, #8] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8546 .loc 12 326 0 8547 030e 08EB0007 add r7, r8, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 8548 .loc 12 339 0 8549 0312 0A44 add r2, r2, r1 ARM GAS /tmp/ccfbYRip.s page 316 8550 .loc 12 341 0 8551 0314 B918 adds r1, r7, r2 8552 0316 8910 asrs r1, r1, #2 8553 0318 4BF80410 str r1, [fp, r4] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8554 .loc 12 323 0 8555 031c AE1B subs r6, r5, r6 8556 .LVL865: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8557 .loc 12 328 0 8558 031e A8EB0009 sub r9, r8, r0 8559 .LVL866: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya + yc) - (yb + yd) */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s1 - t2; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (yb - yd) */ 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 8560 .loc 12 347 0 8561 0322 DBF80050 ldr r5, [fp] 8562 0326 DAF80400 ldr r0, [r10, #4] 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 8563 .loc 12 349 0 8564 032a 5BF8041C ldr r1, [fp, #-4] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 8565 .loc 12 347 0 8566 032e A5EB0008 sub r8, r5, r0 8567 .loc 12 349 0 8568 0332 DAF80050 ldr r5, [r10] 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r2 + t1; 8569 .loc 12 360 0 8570 0336 06EB080C add ip, r6, r8 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8571 .loc 12 349 0 8572 033a 491B subs r1, r1, r5 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = r2 - t1; 8573 .loc 12 362 0 8574 033c A6EB0808 sub r8, r6, r8 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s2 - t2; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = s2 + t2; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ ARM GAS /tmp/ccfbYRip.s page 317 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + 8575 .loc 12 370 0 8576 0340 059D ldr r5, [sp, #20] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8577 .loc 12 371 0 8578 0342 0A9E ldr r6, [sp, #40] 8579 .LVL867: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8580 .loc 12 336 0 8581 0344 AEEB0303 sub r3, lr, r3 8582 .LVL868: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 8583 .loc 12 365 0 8584 0348 A9EB010E sub lr, r9, r1 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8585 .loc 12 344 0 8586 034c BA1A subs r2, r7, r2 8587 .LVL869: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8588 .loc 12 370 0 8589 034e 8CFB0545 smull r4, r5, ip, r5 8590 .loc 12 371 0 8591 0352 8EFB0667 smull r6, r7, lr, r6 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8592 .loc 12 370 0 8593 0356 7E19 adds r6, r7, r5 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8594 .loc 12 367 0 8595 0358 8944 add r9, r9, r1 8596 .LVL870: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8597 .loc 12 370 0 8598 035a 0E96 str r6, [sp, #56] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8599 .loc 12 353 0 8600 035c 0699 ldr r1, [sp, #24] 8601 .LVL871: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 8602 .loc 12 352 0 8603 035e 0F9E ldr r6, [sp, #60] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8604 .loc 12 353 0 8605 0360 82FB0101 smull r0, r1, r2, r1 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 8606 .loc 12 352 0 8607 0364 83FB0645 smull r4, r5, r3, r6 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 8608 .loc 12 356 0 8609 0368 82FB0667 smull r6, r7, r2, r6 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 8610 .loc 12 352 0 8611 036c 4A19 adds r2, r1, r5 8612 036e 0D92 str r2, [sp, #52] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8613 .loc 12 357 0 8614 0370 069A ldr r2, [sp, #24] 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 318 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - 8615 .loc 12 374 0 8616 0372 059D ldr r5, [sp, #20] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 8617 .loc 12 375 0 8618 0374 0A98 ldr r0, [sp, #40] 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 8619 .loc 12 383 0 8620 0376 0B9E ldr r6, [sp, #44] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8621 .loc 12 357 0 8622 0378 1146 mov r1, r2 8623 037a 83FB0123 smull r2, r3, r3, r1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 8624 .loc 12 374 0 8625 037e 8EFB0545 smull r4, r5, lr, r5 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8626 .loc 12 375 0 8627 0382 8CFB0001 smull r0, r1, ip, r0 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 8628 .loc 12 374 0 8629 0386 A5EB010E sub lr, r5, r1 8630 .LVL872: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 8631 .loc 12 356 0 8632 038a A7EB030C sub ip, r7, r3 8633 .LVL873: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8634 .loc 12 379 0 8635 038e 0B98 ldr r0, [sp, #44] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 8636 .loc 12 378 0 8637 0390 089B ldr r3, [sp, #32] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 8638 .loc 12 382 0 8639 0392 089D ldr r5, [sp, #32] 8640 .loc 12 383 0 8641 0394 88FB0667 smull r6, r7, r8, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8642 .loc 12 379 0 8643 0398 89FB0001 smull r0, r1, r9, r0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 8644 .loc 12 382 0 8645 039c 89FB0545 smull r4, r5, r9, r5 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 8646 .loc 12 378 0 8647 03a0 88FB0323 smull r2, r3, r8, r3 8648 03a4 0B44 add r3, r3, r1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 319 8649 .loc 12 382 0 8650 03a6 E91B subs r1, r5, r7 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8651 .loc 12 311 0 8652 03a8 009F ldr r7, [sp] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8653 .loc 12 371 0 8654 03aa 0E9A ldr r2, [sp, #56] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8655 .loc 12 311 0 8656 03ac 109D ldr r5, [sp, #64] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8657 .loc 12 371 0 8658 03ae 5010 asrs r0, r2, #1 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8659 .loc 12 353 0 8660 03b0 0D9A ldr r2, [sp, #52] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8661 .loc 12 311 0 8662 03b2 7E19 adds r6, r7, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8663 .loc 12 353 0 8664 03b4 5410 asrs r4, r2, #1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8665 .loc 12 357 0 8666 03b6 4FEA6C05 asr r5, ip, #1 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 8667 .loc 12 356 0 8668 03ba 4BE90145 strd r4, r5, [fp, #-4] 8669 .LVL874: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8670 .loc 12 370 0 8671 03be 029C ldr r4, [sp, #8] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8672 .loc 12 311 0 8673 03c0 0096 str r6, [sp] 8674 .LVL875: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 8675 .loc 12 370 0 8676 03c2 4AF80400 str r0, [r10, r4] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 8677 .loc 12 374 0 8678 03c6 0C98 ldr r0, [sp, #48] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8679 .loc 12 375 0 8680 03c8 4FEA6E02 asr r2, lr, #1 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8681 .loc 12 379 0 8682 03cc 5B10 asrs r3, r3, #1 8683 .loc 12 383 0 8684 03ce 4910 asrs r1, r1, #1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 8685 .loc 12 374 0 8686 03d0 4BF83020 str r2, [fp, r0, lsl #3] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 8687 .loc 12 382 0 8688 03d4 CAE90031 strd r3, r1, [r10] ARM GAS /tmp/ccfbYRip.s page 320 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8689 .loc 12 311 0 8690 03d8 049B ldr r3, [sp, #16] 8691 03da 129A ldr r2, [sp, #72] 8692 03dc B342 cmp r3, r6 8693 03de 9344 add fp, fp, r2 8694 03e0 9244 add r10, r10, r2 8695 03e2 3FF676AF bhi .L440 8696 .LVL876: 8697 .L439: 8698 03e6 169A ldr r2, [sp, #88] 8699 03e8 1A99 ldr r1, [sp, #104] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8700 .loc 12 297 0 8701 03ea 139B ldr r3, [sp, #76] 8702 03ec 0A44 add r2, r2, r1 8703 03ee 1692 str r2, [sp, #88] 8704 03f0 1999 ldr r1, [sp, #100] 8705 03f2 159A ldr r2, [sp, #84] 8706 03f4 0A44 add r2, r2, r1 8707 03f6 1592 str r2, [sp, #84] 8708 03f8 1B99 ldr r1, [sp, #108] 8709 03fa 149A ldr r2, [sp, #80] 8710 03fc 0A44 add r2, r2, r1 8711 03fe 1492 str r2, [sp, #80] 8712 0400 179A ldr r2, [sp, #92] 8713 0402 0832 adds r2, r2, #8 8714 0404 1792 str r2, [sp, #92] 8715 0406 189A ldr r2, [sp, #96] 8716 0408 0133 adds r3, r3, #1 8717 040a 9342 cmp r3, r2 8718 040c 1393 str r3, [sp, #76] 8719 .LVL877: 8720 040e 7FF644AF bls .L441 8721 0412 0C9B ldr r3, [sp, #48] 8722 .LVL878: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** twidCoefModifier <<= 2U; 8723 .loc 12 386 0 8724 0414 1D9A ldr r2, [sp, #116] 8725 0416 1093 str r3, [sp, #64] 8726 .LVL879: 8727 0418 9200 lsls r2, r2, #2 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8728 .loc 12 289 0 8729 041a 042B cmp r3, #4 8730 .loc 12 386 0 8731 041c 1D92 str r2, [sp, #116] 8732 .LVL880: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 8733 .loc 12 289 0 8734 041e 3FF619AF bhi .L442 8735 .LVL881: 8736 .L438: 8737 0422 119B ldr r3, [sp, #68] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; ARM GAS /tmp/ccfbYRip.s page 321 8738 .loc 12 172 0 8739 0424 DDF88080 ldr r8, [sp, #128] 8740 0428 2033 adds r3, r3, #32 8741 .L443: 8742 .LVL882: 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* End of Middle stages process */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* start of Last stage process */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the last stage */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** j = fftLen >> 2; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ptr1 = &pSrc[0]; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Calculations of last stage */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** do 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xa (real), ya(imag) input */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xa = *ptr1++; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xb (real), yb(imag) input */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xb = *ptr1++; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb = *ptr1++; 8743 .loc 12 411 0 8744 042a 53E906C1 ldrd ip, r1, [r3, #-24] 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xc (real), yc(imag) input */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xc = *ptr1++; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc = *ptr1++; 8745 .loc 12 415 0 8746 042e 53E90457 ldrd r5, r7, [r3, #-16] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 8747 .loc 12 406 0 8748 0432 53F8200C ldr r0, [r3, #-32] 8749 .LVL883: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8750 .loc 12 407 0 8751 0436 53F81C2C ldr r2, [r3, #-28] 8752 .LVL884: 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xc (real), yc(imag) input */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xd = *ptr1++; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd = *ptr1++; 8753 .loc 12 419 0 8754 043a 53E9026E ldrd r6, lr, [r3, #-8] 8755 .LVL885: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xa_out = xa + xb + xc + xd; 8756 .loc 12 422 0 ARM GAS /tmp/ccfbYRip.s page 322 8757 043e 00EB0C04 add r4, r0, ip 8758 0442 2C44 add r4, r4, r5 8759 0444 3444 add r4, r4, r6 8760 .LVL886: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya_out = ya + yb + yc + yd; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pointer updation for writing */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ptr1 = ptr1 - 8U; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xa' and ya' */ 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xa_out; 8761 .loc 12 431 0 8762 0446 43F8204C str r4, [r3, #-32] 8763 .LVL887: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xc_out = (xa - xb + xc - xd); 8764 .loc 12 434 0 8765 044a A0EB0C04 sub r4, r0, ip 8766 .LVL888: 8767 044e 2C44 add r4, r4, r5 8768 0450 A41B subs r4, r4, r6 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xc' and yc' */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xc_out; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xb_out = (xa + yb - xc - yd); 8769 .loc 12 441 0 8770 0452 00EB0109 add r9, r0, r1 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 8771 .loc 12 438 0 8772 0456 43F8184C str r4, [r3, #-24] 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xb' and yb' */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xb_out; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xd_out = (xa - yb - xc + yd); 8773 .loc 12 448 0 8774 045a 401A subs r0, r0, r1 8775 .LVL889: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8776 .loc 12 425 0 8777 045c 5418 adds r4, r2, r1 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8778 .loc 12 435 0 8779 045e 511A subs r1, r2, r1 8780 .LVL890: 8781 .loc 12 448 0 8782 0460 401B subs r0, r0, r5 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8783 .loc 12 425 0 ARM GAS /tmp/ccfbYRip.s page 323 8784 0462 3C44 add r4, r4, r7 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8785 .loc 12 435 0 8786 0464 3944 add r1, r1, r7 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 8787 .loc 12 441 0 8788 0466 A9EB0509 sub r9, r9, r5 8789 046a A9EB0E05 sub r5, r9, lr 8790 .loc 12 448 0 8791 046e 7044 add r0, r0, lr 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8792 .loc 12 425 0 8793 0470 7444 add r4, r4, lr 8794 .LVL891: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8795 .loc 12 435 0 8796 0472 A1EB0E01 sub r1, r1, lr 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8797 .loc 12 442 0 8798 0476 A2EB0C0E sub lr, r2, ip 8799 .LVL892: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 8800 .loc 12 449 0 8801 047a 6244 add r2, r2, ip 8802 .LVL893: 8803 047c D21B subs r2, r2, r7 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8804 .loc 12 442 0 8805 047e AEEB070C sub ip, lr, r7 8806 .LVL894: 8807 0482 0CEB0607 add r7, ip, r6 8808 .LVL895: 8809 .loc 12 449 0 8810 0486 921B subs r2, r2, r6 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xd' and yd' */ 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xd_out; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } while (--j); 8811 .loc 12 456 0 8812 0488 B8F10108 subs r8, r8, #1 8813 .LVL896: 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 8814 .loc 12 445 0 8815 048c 43F8105C str r5, [r3, #-16] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 8816 .loc 12 452 0 8817 0490 43F8080C str r0, [r3, #-8] 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8818 .loc 12 432 0 8819 0494 43F81C4C str r4, [r3, #-28] 8820 .LVL897: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8821 .loc 12 439 0 8822 0498 43F8141C str r1, [r3, #-20] ARM GAS /tmp/ccfbYRip.s page 324 8823 .LVL898: 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8824 .loc 12 446 0 8825 049c 43F80C7C str r7, [r3, #-12] 8826 .LVL899: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8827 .loc 12 453 0 8828 04a0 43F8042C str r2, [r3, #-4] 8829 .LVL900: 8830 04a4 03F12003 add r3, r3, #32 8831 .LVL901: 8832 .loc 12 456 0 8833 04a8 BFD1 bne .L443 8834 .LVL902: 8835 .LBE2107: 8836 .LBE2106: 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* first col */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_q31 (pSrc, n2, (q31_t*)pCoef, 2U); 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* second col */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U); 8837 .loc 11 795 0 8838 04aa 219A ldr r2, [sp, #132] 8839 04ac 119B ldr r3, [sp, #68] 8840 04ae DDF878A0 ldr r10, [sp, #120] 8841 04b2 03EB8203 add r3, r3, r2, lsl #2 8842 04b6 259A ldr r2, [sp, #148] 8843 04b8 1293 str r3, [sp, #72] 8844 .LVL903: 8845 04ba 9346 mov fp, r2 8846 04bc 249A ldr r2, [sp, #144] 8847 04be 1746 mov r7, r2 8848 04c0 239A ldr r2, [sp, #140] 8849 04c2 9646 mov lr, r2 8850 04c4 269A ldr r2, [sp, #152] 8851 04c6 9B44 add fp, fp, r3 8852 04c8 9E44 add lr, lr, r3 8853 04ca 1F44 add r7, r7, r3 8854 04cc 1344 add r3, r3, r2 8855 .LVL904: 8856 04ce 0BEB0209 add r9, fp, r2 8857 04d2 0893 str r3, [sp, #32] 8858 04d4 279A ldr r2, [sp, #156] 8859 04d6 1F9B ldr r3, [sp, #124] 8860 04d8 0593 str r3, [sp, #20] 8861 04da D846 mov r8, fp 8862 04dc CC46 mov ip, r9 8863 04de F346 mov fp, lr 8864 04e0 D646 mov lr, r10 8865 04e2 BA46 mov r10, r7 8866 .LVL905: 8867 .L444: 8868 .LBB2108: 8869 .LBB2109: ARM GAS /tmp/ccfbYRip.s page 325 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8870 .loc 12 191 0 8871 04e4 58F80250 ldr r5, [r8, r2] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8872 .loc 12 196 0 8873 04e8 5BF8041C ldr r1, [fp, #-4] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8874 .loc 12 191 0 8875 04ec 5CF80200 ldr r0, [ip, r2] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8876 .loc 12 196 0 8877 04f0 5AF8044C ldr r4, [r10, #-4] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8878 .loc 12 199 0 8879 04f4 5BF80260 ldr r6, [fp, r2] 8880 04f8 5AF80230 ldr r3, [r10, r2] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8881 .loc 12 191 0 8882 04fc 2F11 asrs r7, r5, #4 8883 04fe 0011 asrs r0, r0, #4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8884 .loc 12 196 0 8885 0500 0D11 asrs r5, r1, #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8886 .loc 12 191 0 8887 0502 0290 str r0, [sp, #8] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8888 .loc 12 196 0 8889 0504 05EB2415 add r5, r5, r4, asr #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8890 .loc 12 191 0 8891 0508 3818 adds r0, r7, r0 8892 .LVL906: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 8893 .loc 12 204 0 8894 050a 4119 adds r1, r0, r5 8895 050c 48F80210 str r1, [r8, r2] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8896 .loc 12 208 0 8897 0510 DCF80410 ldr r1, [ip, #4] 8898 0514 D8F80440 ldr r4, [r8, #4] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 8899 .loc 12 191 0 8900 0518 0097 str r7, [sp] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8901 .loc 12 199 0 8902 051a 4FEA2619 asr r9, r6, #4 8903 051e 1B11 asrs r3, r3, #4 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8904 .loc 12 208 0 8905 0520 0911 asrs r1, r1, #4 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8906 .loc 12 199 0 8907 0522 03EB0907 add r7, r3, r9 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8908 .loc 12 208 0 8909 0526 01EB2416 add r6, r1, r4, asr #4 ARM GAS /tmp/ccfbYRip.s page 326 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8910 .loc 12 211 0 8911 052a B919 adds r1, r7, r6 8912 052c 4AF80210 str r1, [r10, r2] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8913 .loc 12 223 0 8914 0530 1F99 ldr r1, [sp, #124] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 8915 .loc 12 199 0 8916 0532 0A93 str r3, [sp, #40] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 8917 .loc 12 223 0 8918 0534 51F8044C ldr r4, [r1, #-4] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8919 .loc 12 224 0 8920 0538 0B46 mov r3, r1 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 8921 .loc 12 206 0 8922 053a 401B subs r0, r0, r5 8923 .LVL907: 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8924 .loc 12 224 0 8925 053c 53F8201B ldr r1, [r3], #32 8926 0540 1F93 str r3, [sp, #124] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8927 .loc 12 214 0 8928 0542 BD1B subs r5, r7, r6 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8929 .loc 12 227 0 8930 0544 80FB0467 smull r6, r7, r0, r4 8931 0548 CDE90667 strd r6, [sp, #24] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8932 .loc 12 228 0 8933 054c 85FB0167 smull r6, r7, r5, r1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8934 .loc 12 227 0 8935 0550 079E ldr r6, [sp, #28] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8936 .loc 12 217 0 8937 0552 DCF80430 ldr r3, [ip, #4] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8938 .loc 12 231 0 8939 0556 84FB0545 smull r4, r5, r4, r5 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8940 .loc 12 232 0 8941 055a 80FB0101 smull r0, r1, r0, r1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8942 .loc 12 227 0 8943 055e 3E44 add r6, r6, r7 8944 0560 3746 mov r7, r6 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8945 .loc 12 231 0 8946 0562 691A subs r1, r5, r1 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8947 .loc 12 228 0 8948 0564 7F00 lsls r7, r7, #1 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 327 8949 .loc 12 232 0 8950 0566 4900 lsls r1, r1, #1 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8951 .loc 12 217 0 8952 0568 D8F80460 ldr r6, [r8, #4] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8953 .loc 12 219 0 8954 056c 5AF8045C ldr r5, [r10, #-4] 8955 0570 5BF8044C ldr r4, [fp, #-4] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 8956 .loc 12 227 0 8957 0574 4AF8047C str r7, [r10, #-4] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 8958 .loc 12 231 0 8959 0578 C8F80410 str r1, [r8, #4] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8960 .loc 12 193 0 8961 057c 009F ldr r7, [sp] 8962 057e 0299 ldr r1, [sp, #8] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8963 .loc 12 217 0 8964 0580 1811 asrs r0, r3, #4 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8965 .loc 12 193 0 8966 0582 7B1A subs r3, r7, r1 8967 0584 0093 str r3, [sp] 8968 .LVL908: 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8969 .loc 12 201 0 8970 0586 0A9B ldr r3, [sp, #40] 8971 .LVL909: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8972 .loc 12 219 0 8973 0588 2411 asrs r4, r4, #4 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8974 .loc 12 201 0 8975 058a A3EB0901 sub r1, r3, r9 8976 .LVL910: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8977 .loc 12 219 0 8978 058e C4EB2519 rsb r9, r4, r5, asr #4 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 8979 .loc 12 244 0 8980 0592 059C ldr r4, [sp, #20] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8981 .loc 12 217 0 8982 0594 C0EB2613 rsb r3, r0, r6, asr #4 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 8983 .loc 12 244 0 8984 0598 54F8047C ldr r7, [r4, #-4] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 8985 .loc 12 217 0 8986 059c 0293 str r3, [sp, #8] 8987 .LVL911: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 8988 .loc 12 245 0 8989 059e 54F8103B ldr r3, [r4], #16 ARM GAS /tmp/ccfbYRip.s page 328 8990 .LVL912: 8991 05a2 0594 str r4, [sp, #20] 8992 05a4 1846 mov r0, r3 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 8993 .loc 12 235 0 8994 05a6 029C ldr r4, [sp, #8] 8995 05a8 009B ldr r3, [sp] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 8996 .loc 12 240 0 8997 05aa 0A91 str r1, [sp, #40] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 8998 .loc 12 235 0 8999 05ac 1D19 adds r5, r3, r4 9000 .LVL913: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9001 .loc 12 248 0 9002 05ae 85FB0734 smull r3, r4, r5, r7 9003 05b2 CDE90634 strd r3, [sp, #24] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 9004 .loc 12 240 0 9005 05b6 A1EB0906 sub r6, r1, r9 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9006 .loc 12 249 0 9007 05ba 0346 mov r3, r0 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9008 .loc 12 253 0 9009 05bc 85FB0001 smull r0, r1, r5, r0 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9010 .loc 12 248 0 9011 05c0 079D ldr r5, [sp, #28] 9012 .LVL914: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9013 .loc 12 249 0 9014 05c2 86FB0334 smull r3, r4, r6, r3 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9015 .loc 12 248 0 9016 05c6 6319 adds r3, r4, r5 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 9017 .loc 12 252 0 9018 05c8 87FB0667 smull r6, r7, r7, r6 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9019 .loc 12 249 0 9020 05cc 5C00 lsls r4, r3, #1 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 9021 .loc 12 252 0 9022 05ce 7D1A subs r5, r7, r1 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9023 .loc 12 237 0 9024 05d0 009B ldr r3, [sp] 9025 05d2 0299 ldr r1, [sp, #8] 9026 .LVL915: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9027 .loc 12 248 0 9028 05d4 4CF80240 str r4, [ip, r2] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9029 .loc 12 253 0 9030 05d8 6D00 lsls r5, r5, #1 ARM GAS /tmp/ccfbYRip.s page 329 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 9031 .loc 12 252 0 9032 05da 4BF80250 str r5, [fp, r2] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9033 .loc 12 237 0 9034 05de 581A subs r0, r3, r1 9035 .LVL916: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9036 .loc 12 242 0 9037 05e0 0A99 ldr r1, [sp, #40] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 9038 .loc 12 257 0 9039 05e2 DEF80040 ldr r4, [lr] 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9040 .loc 12 242 0 9041 05e6 4944 add r1, r1, r9 9042 05e8 0B46 mov r3, r1 9043 .LVL917: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9044 .loc 12 262 0 9045 05ea DEF80410 ldr r1, [lr, #4] 9046 .LVL918: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9047 .loc 12 261 0 9048 05ee 80FB0456 smull r5, r6, r0, r4 9049 05f2 CDE90056 strd r5, [sp] 9050 .LVL919: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9051 .loc 12 262 0 9052 05f6 83FB0156 smull r5, r6, r3, r1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9053 .loc 12 265 0 9054 05fa 84FB0345 smull r4, r5, r4, r3 9055 .LVL920: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9056 .loc 12 261 0 9057 05fe 3346 mov r3, r6 9058 .LVL921: 9059 0600 019E ldr r6, [sp, #4] 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9060 .loc 12 266 0 9061 0602 80FB0101 smull r0, r1, r0, r1 9062 .LVL922: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9063 .loc 12 261 0 9064 0606 3344 add r3, r3, r6 9065 0608 1E46 mov r6, r3 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9066 .loc 12 265 0 9067 060a 6B1A subs r3, r5, r1 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9068 .loc 12 266 0 9069 060c 5B00 lsls r3, r3, #1 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9070 .loc 12 262 0 9071 060e 7000 lsls r0, r6, #1 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; ARM GAS /tmp/ccfbYRip.s page 330 9072 .loc 12 261 0 9073 0610 4BF8040C str r0, [fp, #-4] 9074 .LVL923: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9075 .loc 12 265 0 9076 0614 CCF80430 str r3, [ip, #4] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9077 .loc 12 274 0 9078 0618 089B ldr r3, [sp, #32] 9079 061a 08F10808 add r8, r8, #8 9080 061e 4345 cmp r3, r8 9081 0620 0AF1080A add r10, r10, #8 9082 0624 0EF1300E add lr, lr, #48 9083 0628 0BF1080B add fp, fp, #8 9084 062c 0CF1080C add ip, ip, #8 9085 0630 7FF458AF bne .L444 9086 .LVL924: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9087 .loc 12 289 0 9088 0634 209B ldr r3, [sp, #128] 9089 0636 042B cmp r3, #4 9090 0638 40F2EA80 bls .L445 9091 063c 1093 str r3, [sp, #64] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9092 .loc 12 286 0 9093 063e 0823 movs r3, #8 9094 0640 1F93 str r3, [sp, #124] 9095 .LVL925: 9096 .L449: 9097 0642 1F9D ldr r5, [sp, #124] 9098 0644 129B ldr r3, [sp, #72] 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 9099 .loc 12 293 0 9100 0646 109F ldr r7, [sp, #64] 9101 0648 1A46 mov r2, r3 9102 064a 05EB4503 add r3, r5, r5, lsl #1 9103 064e DB00 lsls r3, r3, #3 9104 0650 1C93 str r3, [sp, #112] 9105 0652 EB00 lsls r3, r5, #3 9106 0654 1B93 str r3, [sp, #108] 9107 0656 2B01 lsls r3, r5, #4 9108 0658 1A93 str r3, [sp, #104] 9109 065a FB00 lsls r3, r7, #3 9110 065c BC08 lsrs r4, r7, #2 9111 065e 1393 str r3, [sp, #76] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9112 .loc 12 297 0 9113 0660 1E9B ldr r3, [sp, #120] 9114 0662 1793 str r3, [sp, #92] 9115 0664 02EBC400 add r0, r2, r4, lsl #3 9116 0668 2101 lsls r1, r4, #4 9117 066a C4EB4472 rsb r2, r4, r4, lsl #29 9118 066e D600 lsls r6, r2, #3 9119 0670 0430 adds r0, r0, #4 9120 0672 0439 subs r1, r1, #4 9121 0674 621E subs r2, r4, #1 9122 0676 CDE91533 strd r3, r3, [sp, #84] ARM GAS /tmp/ccfbYRip.s page 331 9123 067a 0023 movs r3, #0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 9124 .loc 12 293 0 9125 067c 0C94 str r4, [sp, #48] 9126 .LVL926: 9127 067e 1890 str r0, [sp, #96] 9128 0680 1D91 str r1, [sp, #116] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9129 .loc 12 297 0 9130 0682 1992 str r2, [sp, #100] 9131 0684 1493 str r3, [sp, #80] 9132 0686 0296 str r6, [sp, #8] 9133 .LVL927: 9134 .L448: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 9135 .loc 12 302 0 9136 0688 179B ldr r3, [sp, #92] 9137 068a 1A68 ldr r2, [r3] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 9138 .loc 12 303 0 9139 068c 5B68 ldr r3, [r3, #4] 9140 068e 0A93 str r3, [sp, #40] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9141 .loc 12 304 0 9142 0690 169B ldr r3, [sp, #88] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 9143 .loc 12 302 0 9144 0692 0592 str r2, [sp, #20] 9145 .LVL928: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9146 .loc 12 304 0 9147 0694 1A68 ldr r2, [r3] 9148 .LVL929: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 9149 .loc 12 305 0 9150 0696 5B68 ldr r3, [r3, #4] 9151 0698 0693 str r3, [sp, #24] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 9152 .loc 12 306 0 9153 069a 159B ldr r3, [sp, #84] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9154 .loc 12 304 0 9155 069c 0F92 str r2, [sp, #60] 9156 .LVL930: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 9157 .loc 12 306 0 9158 069e 1A68 ldr r2, [r3] 9159 .LVL931: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 9160 .loc 12 307 0 9161 06a0 5B68 ldr r3, [r3, #4] 9162 06a2 0B93 str r3, [sp, #44] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9163 .loc 12 311 0 9164 06a4 049B ldr r3, [sp, #16] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 9165 .loc 12 306 0 ARM GAS /tmp/ccfbYRip.s page 332 9166 06a6 0892 str r2, [sp, #32] 9167 .LVL932: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9168 .loc 12 311 0 9169 06a8 1946 mov r1, r3 9170 06aa 149B ldr r3, [sp, #80] 9171 06ac 9942 cmp r1, r3 9172 06ae 40F29180 bls .L446 9173 06b2 1D9A ldr r2, [sp, #116] 9174 .LVL933: 9175 06b4 0093 str r3, [sp] 9176 06b6 1046 mov r0, r2 9177 06b8 189A ldr r2, [sp, #96] 9178 06ba 00EB020A add r10, r0, r2 9179 06be 9346 mov fp, r2 9180 .LVL934: 9181 .L447: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9182 .loc 12 321 0 9183 06c0 129F ldr r7, [sp, #72] 9184 06c2 009C ldr r4, [sp] 9185 06c4 0299 ldr r1, [sp, #8] 9186 06c6 57F83450 ldr r5, [r7, r4, lsl #3] 9187 06ca 5AF80160 ldr r6, [r10, r1] 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9188 .loc 12 331 0 9189 06ce 5BF8042C ldr r2, [fp, #-4] 9190 06d2 DAF80030 ldr r3, [r10] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 9191 .loc 12 326 0 9192 06d6 5BF80180 ldr r8, [fp, r1] 9193 06da 0C99 ldr r1, [sp, #48] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9194 .loc 12 321 0 9195 06dc 05EB060E add lr, r5, r6 9196 .LVL935: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9197 .loc 12 331 0 9198 06e0 1344 add r3, r3, r2 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 9199 .loc 12 334 0 9200 06e2 0EEB0302 add r2, lr, r3 9201 06e6 BC46 mov ip, r7 9202 06e8 9210 asrs r2, r2, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 9203 .loc 12 326 0 9204 06ea 5BF83100 ldr r0, [fp, r1, lsl #3] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 9205 .loc 12 334 0 9206 06ee 4CF83420 str r2, [ip, r4, lsl #3] 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 9207 .loc 12 339 0 9208 06f2 DBF80010 ldr r1, [fp] 9209 06f6 DAF80420 ldr r2, [r10, #4] 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9210 .loc 12 341 0 9211 06fa 029C ldr r4, [sp, #8] ARM GAS /tmp/ccfbYRip.s page 333 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 9212 .loc 12 326 0 9213 06fc 08EB0007 add r7, r8, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 9214 .loc 12 339 0 9215 0700 0A44 add r2, r2, r1 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9216 .loc 12 341 0 9217 0702 B918 adds r1, r7, r2 9218 0704 8910 asrs r1, r1, #2 9219 0706 4BF80410 str r1, [fp, r4] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9220 .loc 12 323 0 9221 070a AE1B subs r6, r5, r6 9222 .LVL936: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9223 .loc 12 328 0 9224 070c A8EB0009 sub r9, r8, r0 9225 .LVL937: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 9226 .loc 12 347 0 9227 0710 DBF80050 ldr r5, [fp] 9228 0714 DAF80400 ldr r0, [r10, #4] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9229 .loc 12 349 0 9230 0718 5BF8041C ldr r1, [fp, #-4] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 9231 .loc 12 347 0 9232 071c A5EB0008 sub r8, r5, r0 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9233 .loc 12 349 0 9234 0720 DAF80050 ldr r5, [r10] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 9235 .loc 12 360 0 9236 0724 06EB080C add ip, r6, r8 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9237 .loc 12 349 0 9238 0728 491B subs r1, r1, r5 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9239 .loc 12 362 0 9240 072a A6EB0808 sub r8, r6, r8 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9241 .loc 12 370 0 9242 072e 059D ldr r5, [sp, #20] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9243 .loc 12 371 0 9244 0730 0A9E ldr r6, [sp, #40] 9245 .LVL938: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9246 .loc 12 336 0 9247 0732 AEEB0303 sub r3, lr, r3 9248 .LVL939: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 9249 .loc 12 365 0 9250 0736 A9EB010E sub lr, r9, r1 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9251 .loc 12 344 0 ARM GAS /tmp/ccfbYRip.s page 334 9252 073a BA1A subs r2, r7, r2 9253 .LVL940: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9254 .loc 12 370 0 9255 073c 8CFB0545 smull r4, r5, ip, r5 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9256 .loc 12 371 0 9257 0740 8EFB0667 smull r6, r7, lr, r6 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9258 .loc 12 370 0 9259 0744 7E19 adds r6, r7, r5 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9260 .loc 12 367 0 9261 0746 8944 add r9, r9, r1 9262 .LVL941: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9263 .loc 12 370 0 9264 0748 0E96 str r6, [sp, #56] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9265 .loc 12 353 0 9266 074a 0699 ldr r1, [sp, #24] 9267 .LVL942: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 9268 .loc 12 352 0 9269 074c 0F9E ldr r6, [sp, #60] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9270 .loc 12 353 0 9271 074e 82FB0101 smull r0, r1, r2, r1 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 9272 .loc 12 352 0 9273 0752 83FB0645 smull r4, r5, r3, r6 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 9274 .loc 12 356 0 9275 0756 82FB0667 smull r6, r7, r2, r6 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 9276 .loc 12 352 0 9277 075a 4A19 adds r2, r1, r5 9278 075c 0D92 str r2, [sp, #52] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9279 .loc 12 357 0 9280 075e 069A ldr r2, [sp, #24] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 9281 .loc 12 374 0 9282 0760 059D ldr r5, [sp, #20] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9283 .loc 12 375 0 9284 0762 0A98 ldr r0, [sp, #40] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 9285 .loc 12 383 0 9286 0764 0B9E ldr r6, [sp, #44] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9287 .loc 12 357 0 9288 0766 1146 mov r1, r2 9289 0768 83FB0123 smull r2, r3, r3, r1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 9290 .loc 12 374 0 9291 076c 8EFB0545 smull r4, r5, lr, r5 ARM GAS /tmp/ccfbYRip.s page 335 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9292 .loc 12 375 0 9293 0770 8CFB0001 smull r0, r1, ip, r0 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 9294 .loc 12 374 0 9295 0774 A5EB010E sub lr, r5, r1 9296 .LVL943: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 9297 .loc 12 356 0 9298 0778 A7EB030C sub ip, r7, r3 9299 .LVL944: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9300 .loc 12 379 0 9301 077c 0B98 ldr r0, [sp, #44] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 9302 .loc 12 378 0 9303 077e 089B ldr r3, [sp, #32] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 9304 .loc 12 382 0 9305 0780 089D ldr r5, [sp, #32] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 9306 .loc 12 383 0 9307 0782 88FB0667 smull r6, r7, r8, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9308 .loc 12 379 0 9309 0786 89FB0001 smull r0, r1, r9, r0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 9310 .loc 12 382 0 9311 078a 89FB0545 smull r4, r5, r9, r5 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 9312 .loc 12 378 0 9313 078e 88FB0323 smull r2, r3, r8, r3 9314 0792 0B44 add r3, r3, r1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 9315 .loc 12 382 0 9316 0794 E91B subs r1, r5, r7 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9317 .loc 12 311 0 9318 0796 009F ldr r7, [sp] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9319 .loc 12 371 0 9320 0798 0E9A ldr r2, [sp, #56] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9321 .loc 12 311 0 9322 079a 109D ldr r5, [sp, #64] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9323 .loc 12 371 0 9324 079c 5010 asrs r0, r2, #1 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9325 .loc 12 353 0 9326 079e 0D9A ldr r2, [sp, #52] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9327 .loc 12 311 0 9328 07a0 7E19 adds r6, r7, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9329 .loc 12 353 0 9330 07a2 5410 asrs r4, r2, #1 ARM GAS /tmp/ccfbYRip.s page 336 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9331 .loc 12 357 0 9332 07a4 4FEA6C05 asr r5, ip, #1 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 9333 .loc 12 356 0 9334 07a8 4BE90145 strd r4, r5, [fp, #-4] 9335 .LVL945: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9336 .loc 12 370 0 9337 07ac 029C ldr r4, [sp, #8] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9338 .loc 12 311 0 9339 07ae 0096 str r6, [sp] 9340 .LVL946: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 9341 .loc 12 370 0 9342 07b0 4AF80400 str r0, [r10, r4] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 9343 .loc 12 374 0 9344 07b4 0C98 ldr r0, [sp, #48] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9345 .loc 12 375 0 9346 07b6 4FEA6E02 asr r2, lr, #1 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9347 .loc 12 379 0 9348 07ba 5B10 asrs r3, r3, #1 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 9349 .loc 12 383 0 9350 07bc 4910 asrs r1, r1, #1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 9351 .loc 12 374 0 9352 07be 4BF83020 str r2, [fp, r0, lsl #3] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 9353 .loc 12 382 0 9354 07c2 CAE90031 strd r3, r1, [r10] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9355 .loc 12 311 0 9356 07c6 049B ldr r3, [sp, #16] 9357 07c8 139A ldr r2, [sp, #76] 9358 07ca B342 cmp r3, r6 9359 07cc 9344 add fp, fp, r2 9360 07ce 9244 add r10, r10, r2 9361 07d0 3FF676AF bhi .L447 9362 .LVL947: 9363 .L446: 9364 07d4 179A ldr r2, [sp, #92] 9365 07d6 1B99 ldr r1, [sp, #108] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9366 .loc 12 297 0 9367 07d8 149B ldr r3, [sp, #80] 9368 07da 0A44 add r2, r2, r1 9369 07dc 1792 str r2, [sp, #92] 9370 07de 1A99 ldr r1, [sp, #104] 9371 07e0 169A ldr r2, [sp, #88] 9372 07e2 0A44 add r2, r2, r1 9373 07e4 1692 str r2, [sp, #88] 9374 07e6 1C99 ldr r1, [sp, #112] ARM GAS /tmp/ccfbYRip.s page 337 9375 07e8 159A ldr r2, [sp, #84] 9376 07ea 0A44 add r2, r2, r1 9377 07ec 1592 str r2, [sp, #84] 9378 07ee 189A ldr r2, [sp, #96] 9379 07f0 0832 adds r2, r2, #8 9380 07f2 1892 str r2, [sp, #96] 9381 07f4 199A ldr r2, [sp, #100] 9382 07f6 0133 adds r3, r3, #1 9383 07f8 9342 cmp r3, r2 9384 07fa 1493 str r3, [sp, #80] 9385 .LVL948: 9386 07fc 7FF644AF bls .L448 9387 0800 0C9B ldr r3, [sp, #48] 9388 .LVL949: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 9389 .loc 12 386 0 9390 0802 1F9A ldr r2, [sp, #124] 9391 0804 1093 str r3, [sp, #64] 9392 .LVL950: 9393 0806 9200 lsls r2, r2, #2 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9394 .loc 12 289 0 9395 0808 042B cmp r3, #4 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 9396 .loc 12 386 0 9397 080a 1F92 str r2, [sp, #124] 9398 .LVL951: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 9399 .loc 12 289 0 9400 080c 3FF619AF bhi .L449 9401 .LVL952: 9402 .L445: 9403 0810 129C ldr r4, [sp, #72] 9404 0812 209E ldr r6, [sp, #128] 9405 0814 2034 adds r4, r4, #32 9406 .L450: 9407 .LVL953: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9408 .loc 12 411 0 9409 0816 54E906E2 ldrd lr, r2, [r4, #-24] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9410 .loc 12 415 0 9411 081a 54E9045C ldrd r5, ip, [r4, #-16] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 9412 .loc 12 406 0 9413 081e 54F8201C ldr r1, [r4, #-32] 9414 .LVL954: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9415 .loc 12 407 0 9416 0822 54F81C3C ldr r3, [r4, #-28] 9417 .LVL955: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9418 .loc 12 419 0 9419 0826 54E90278 ldrd r7, r8, [r4, #-8] 9420 .LVL956: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9421 .loc 12 422 0 ARM GAS /tmp/ccfbYRip.s page 338 9422 082a 01EB0E00 add r0, r1, lr 9423 082e 2844 add r0, r0, r5 9424 0830 3844 add r0, r0, r7 9425 .LVL957: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 9426 .loc 12 431 0 9427 0832 44F8200C str r0, [r4, #-32] 9428 .LVL958: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 9429 .loc 12 434 0 9430 0836 A1EB0E00 sub r0, r1, lr 9431 .LVL959: 9432 083a 2844 add r0, r0, r5 9433 083c C01B subs r0, r0, r7 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 9434 .loc 12 441 0 9435 083e 01EB0209 add r9, r1, r2 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 9436 .loc 12 438 0 9437 0842 44F8180C str r0, [r4, #-24] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 9438 .loc 12 448 0 9439 0846 891A subs r1, r1, r2 9440 .LVL960: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9441 .loc 12 425 0 9442 0848 9818 adds r0, r3, r2 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9443 .loc 12 435 0 9444 084a 9A1A subs r2, r3, r2 9445 .LVL961: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 9446 .loc 12 448 0 9447 084c 491B subs r1, r1, r5 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 9448 .loc 12 441 0 9449 084e A9EB0509 sub r9, r9, r5 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9450 .loc 12 425 0 9451 0852 6044 add r0, r0, ip 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9452 .loc 12 435 0 9453 0854 6244 add r2, r2, ip 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 9454 .loc 12 441 0 9455 0856 A9EB0805 sub r5, r9, r8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 9456 .loc 12 448 0 9457 085a 4144 add r1, r1, r8 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9458 .loc 12 425 0 9459 085c 4044 add r0, r0, r8 9460 .LVL962: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9461 .loc 12 435 0 9462 085e A2EB0802 sub r2, r2, r8 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 339 9463 .loc 12 442 0 9464 0862 A3EB0E08 sub r8, r3, lr 9465 .LVL963: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9466 .loc 12 449 0 9467 0866 7344 add r3, r3, lr 9468 .LVL964: 9469 0868 A3EB0C03 sub r3, r3, ip 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9470 .loc 12 442 0 9471 086c A8EB0C0E sub lr, r8, ip 9472 .LVL965: 9473 0870 BE44 add lr, lr, r7 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9474 .loc 12 449 0 9475 0872 DB1B subs r3, r3, r7 9476 .loc 12 456 0 9477 0874 013E subs r6, r6, #1 9478 .LVL966: 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 9479 .loc 12 445 0 9480 0876 44F8105C str r5, [r4, #-16] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 9481 .loc 12 452 0 9482 087a 44F8081C str r1, [r4, #-8] 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9483 .loc 12 432 0 9484 087e 44F81C0C str r0, [r4, #-28] 9485 .LVL967: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9486 .loc 12 439 0 9487 0882 44F8142C str r2, [r4, #-20] 9488 .LVL968: 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9489 .loc 12 446 0 9490 0886 44F80CEC str lr, [r4, #-12] 9491 .LVL969: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9492 .loc 12 453 0 9493 088a 44F8043C str r3, [r4, #-4] 9494 .LVL970: 9495 088e 04F12004 add r4, r4, #32 9496 .LVL971: 9497 .loc 12 456 0 9498 0892 C0D1 bne .L450 9499 .LVL972: 9500 .LBE2109: 9501 .LBE2108: 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1U; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (i = 0; i < n2; i++) 9502 .loc 11 798 0 9503 0894 049B ldr r3, [sp, #16] 9504 0896 93B1 cbz r3, .L434 9505 0898 119A ldr r2, [sp, #68] 9506 089a 02EB0313 add r3, r2, r3, lsl #4 9507 089e 229A ldr r2, [sp, #136] ARM GAS /tmp/ccfbYRip.s page 340 9508 .LVL973: 9509 .L452: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p0 = pSrc[4 * i + 0]; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p1 = pSrc[4 * i + 1]; 9510 .loc 11 801 0 discriminator 3 9511 08a0 D2E90054 ldrd r5, r4, [r2] 9512 .LVL974: 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt = pSrc[4 * i + 2]; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt = pSrc[4 * i + 3]; 9513 .loc 11 803 0 discriminator 3 9514 08a4 D2E90201 ldrd r0, r1, [r2, #8] 9515 .LVL975: 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p0 <<= 1U; 9516 .loc 11 805 0 discriminator 3 9517 08a8 6D00 lsls r5, r5, #1 9518 .LVL976: 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p1 <<= 1U; 9519 .loc 11 806 0 discriminator 3 9520 08aa 6400 lsls r4, r4, #1 9521 .LVL977: 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt <<= 1U; 9522 .loc 11 807 0 discriminator 3 9523 08ac 4000 lsls r0, r0, #1 9524 .LVL978: 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt <<= 1U; 9525 .loc 11 808 0 discriminator 3 9526 08ae 4900 lsls r1, r1, #1 9527 .LVL979: 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 0] = p0; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 1] = p1; 9528 .loc 11 811 0 discriminator 3 9529 08b0 C2E90054 strd r5, r4, [r2] 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 2] = xt; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 3] = yt; 9530 .loc 11 813 0 discriminator 3 9531 08b4 C2E90201 strd r0, r1, [r2, #8] 9532 08b8 1032 adds r2, r2, #16 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 9533 .loc 11 798 0 discriminator 3 9534 08ba 9A42 cmp r2, r3 9535 08bc F0D1 bne .L452 9536 .LVL980: 9537 .L434: 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 9538 .loc 11 816 0 9539 08be 29B0 add sp, sp, #164 9540 .LCFI72: 9541 .cfi_def_cfa_offset 36 9542 @ sp needed 9543 08c0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 9544 .cfi_endproc 9545 .LFE164: ARM GAS /tmp/ccfbYRip.s page 341 9547 .section .text.arm_cfft_radix4by2_inverse_q31,"ax",%progbits 9548 .align 1 9549 .p2align 2,,3 9550 .global arm_cfft_radix4by2_inverse_q31 9551 .syntax unified 9552 .thumb 9553 .thumb_func 9554 .fpu fpv4-sp-d16 9556 arm_cfft_radix4by2_inverse_q31: 9557 .LFB165: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** void arm_cfft_radix4by2_inverse_q31( 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t * pSrc, 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t fftLen, 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** const q31_t * pCoef) 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 9558 .loc 11 822 0 9559 .cfi_startproc 9560 @ args = 0, pretend = 0, frame = 168 9561 @ frame_needed = 0, uses_anonymous_args = 0 9562 .LVL981: 9563 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9564 .LCFI73: 9565 .cfi_def_cfa_offset 36 9566 .cfi_offset 4, -36 9567 .cfi_offset 5, -32 9568 .cfi_offset 6, -28 9569 .cfi_offset 7, -24 9570 .cfi_offset 8, -20 9571 .cfi_offset 9, -16 9572 .cfi_offset 10, -12 9573 .cfi_offset 11, -8 9574 .cfi_offset 14, -4 9575 0004 ABB0 sub sp, sp, #172 9576 .LCFI74: 9577 .cfi_def_cfa_offset 208 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t i, l; 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t n2; 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t xt, yt, cosVal, sinVal; 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** q31_t p0, p1; 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1U; 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (i = 0; i < n2; i++) 9578 .loc 11 829 0 9579 0006 4B08 lsrs r3, r1, #1 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t i, l; 9580 .loc 11 822 0 9581 0008 2491 str r1, [sp, #144] 9582 .LVL982: 9583 000a 1390 str r0, [sp, #76] 9584 000c 2192 str r2, [sp, #132] 9585 .loc 11 829 0 9586 000e 0C93 str r3, [sp, #48] 9587 0010 59D0 beq .L473 9588 0012 0646 mov r6, r0 9589 0014 00EBC30A add r10, r0, r3, lsl #3 9590 0018 4FF00409 mov r9, #4 ARM GAS /tmp/ccfbYRip.s page 342 9591 001c 4FF00008 mov r8, #0 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** cosVal = pCoef[2 * i]; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** sinVal = pCoef[2 * i + 1]; 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** l = i + n2; 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U); 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U); 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 9592 .loc 11 842 0 9593 0020 0693 str r3, [sp, #24] 9594 0022 9646 mov lr, r2 9595 .LVL983: 9596 .L474: 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 9597 .loc 11 836 0 discriminator 3 9598 0024 5AF83830 ldr r3, [r10, r8, lsl #3] 9599 0028 56F83870 ldr r7, [r6, r8, lsl #3] 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 9600 .loc 11 832 0 discriminator 3 9601 002c 5EF80910 ldr r1, [lr, r9] 9602 0030 0091 str r1, [sp] 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 9603 .loc 11 836 0 discriminator 3 9604 0032 BF10 asrs r7, r7, #2 9605 0034 9910 asrs r1, r3, #2 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 9606 .loc 11 837 0 discriminator 3 9607 0036 7B18 adds r3, r7, r1 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** sinVal = pCoef[2 * i + 1]; 9608 .loc 11 831 0 discriminator 3 9609 0038 5EF83840 ldr r4, [lr, r8, lsl #3] 9610 .LVL984: 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 9611 .loc 11 837 0 discriminator 3 9612 003c 46F83830 str r3, [r6, r8, lsl #3] 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 9613 .loc 11 839 0 discriminator 3 9614 0040 56F80930 ldr r3, [r6, r9] 9615 0044 5AF80920 ldr r2, [r10, r9] 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); 9616 .loc 11 836 0 discriminator 3 9617 0048 7F1A subs r7, r7, r1 9618 .LVL985: 9619 .loc 11 842 0 discriminator 3 9620 004a 4FF00040 mov r0, #-2147483648 9621 004e 0021 movs r1, #0 9622 0050 C4FB0701 smlal r0, r1, r4, r7 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 9623 .loc 11 839 0 discriminator 3 9624 0054 9210 asrs r2, r2, #2 9625 0056 9B10 asrs r3, r3, #2 ARM GAS /tmp/ccfbYRip.s page 343 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multSub_32x32_keep32_R(p0, yt, sinVal); 9626 .loc 11 844 0 discriminator 3 9627 0058 0098 ldr r0, [sp] 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); 9628 .loc 11 839 0 discriminator 3 9629 005a 9D1A subs r5, r3, r2 9630 .LVL986: 9631 .loc 11 844 0 discriminator 3 9632 005c 8C46 mov ip, r1 9633 005e 85FB0001 smull r0, r1, r5, r0 9634 0062 CDE90201 strd r0, [sp, #8] 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 9635 .loc 11 843 0 discriminator 3 9636 0066 4FF00040 mov r0, #-2147483648 9637 006a 0021 movs r1, #0 9638 006c C5FB0401 smlal r0, r1, r5, r4 9639 0070 CDE90401 strd r0, [sp, #16] 9640 .loc 11 844 0 discriminator 3 9641 0074 DDE90201 ldrd r0, [sp, #8] 9642 0078 4FF0000B mov fp, #0 9643 007c BBEB0004 subs r4, fp, r0 9644 .LVL987: 9645 0080 6CEB0105 sbc r5, ip, r1 9646 .LVL988: 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 9647 .loc 11 845 0 discriminator 3 9648 0084 DDE90401 ldrd r0, [sp, #16] 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 9649 .loc 11 844 0 discriminator 3 9650 0088 A346 mov fp, r4 9651 .loc 11 845 0 discriminator 3 9652 008a 0020 movs r0, #0 9653 008c 8C46 mov ip, r1 9654 008e 0099 ldr r1, [sp] 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 9655 .loc 11 844 0 discriminator 3 9656 0090 1BF10044 adds r4, fp, #-2147483648 9657 .loc 11 845 0 discriminator 3 9658 0094 8346 mov fp, r0 9659 0096 C1FB07BC smlal fp, ip, r1, r7 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 9660 .loc 11 844 0 discriminator 3 9661 009a 45F10005 adc r5, r5, #0 9662 .loc 11 845 0 discriminator 3 9663 009e 1BF10040 adds r0, fp, #-2147483648 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 9664 .loc 11 840 0 discriminator 3 9665 00a2 1344 add r3, r3, r2 9666 .LVL989: 9667 .loc 11 845 0 discriminator 3 9668 00a4 4CF10001 adc r1, ip, #0 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 9669 .loc 11 840 0 discriminator 3 9670 00a8 46F80930 str r3, [r6, r9] 9671 .LVL990: 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 344 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l] = p0 << 1U; 9672 .loc 11 847 0 discriminator 3 9673 00ac 6A00 lsls r2, r5, #1 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l + 1] = p1 << 1U; 9674 .loc 11 848 0 discriminator 3 9675 00ae 4B00 lsls r3, r1, #1 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[2 * l + 1] = p1 << 1U; 9676 .loc 11 847 0 discriminator 3 9677 00b0 4AF83820 str r2, [r10, r8, lsl #3] 9678 .loc 11 848 0 discriminator 3 9679 00b4 4AF80930 str r3, [r10, r9] 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 9680 .loc 11 829 0 discriminator 3 9681 00b8 069B ldr r3, [sp, #24] 9682 00ba 08F10108 add r8, r8, #1 9683 .LVL991: 9684 00be 4345 cmp r3, r8 9685 00c0 09F10809 add r9, r9, #8 9686 00c4 AED1 bne .L474 9687 .LVL992: 9688 .L473: 9689 .LBB2114: 9690 .LBB2115: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 11.21(q21) format for the 1024 point */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 9.23(q23) format for the 256 point */ 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 7.25(q25) format for the 64 point */ 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 5.27(q27) format for the 16 point */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* End of last stage process */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @brief Core function for the Q31 CIFFT butterfly process. 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in,out] pSrc points to the in-place buffer of Q31 data type. 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] fftLen length of the FFT. 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] pCoef points to twiddle coefficient buffer. 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wi 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** @return none 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Radix-4 IFFT algorithm used is : 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * CIFFT uses same twiddle coefficients as CFFT Function 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * IFFT is implemented with following changes in equations from FFT 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Input real and imaginary data: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n) = xa + j * ya 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+N/4 ) = xb + j * yb 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+N/2 ) = xc + j * yc 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(n+3N 4) = xd + j * yd ARM GAS /tmp/ccfbYRip.s page 345 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Output real and imaginary data: 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r) = xa'+ j * ya' 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+1) = xb'+ j * yb' 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+2) = xc'+ j * yc' 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * x(4r+3) = xd'+ j * yd' 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Twiddle factors for radix-4 IFFT: 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * Wn = co1 + j * (si1) 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * W2n = co2 + j * (si2) 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * W3n = co3 + j * (si3) 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * The real and imaginary output values for the radix-4 butterfly are 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xa' = xa + xb + xc + xd 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * ya' = ya + yb + yc + yd 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** * 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** void arm_radix4_butterfly_inverse_q31( 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t * pSrc, 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t fftLen, 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** const q31_t * pCoef, 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t twidCoefModifier) 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t xa, xb, xc, xd; 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t ya, yb, yc, yd; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t xa_out, xb_out, xc_out, xd_out; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t ya_out, yb_out, yc_out, yd_out; 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** q31_t *ptr1; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* input is be 1.31(q31) format for all FFT sizes */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Total process is divided into three stages */ 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* process first stage, middle stages, & last stage */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Start of first stage process */ 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the first stage */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 = fftLen; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n1 = n2; 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* n2 = fftLen/4 */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 >>= 2U; 9691 .loc 12 542 0 9692 00c6 249B ldr r3, [sp, #144] 9693 00c8 1399 ldr r1, [sp, #76] 9694 00ca DDF884A0 ldr r10, [sp, #132] 9695 00ce 2591 str r1, [sp, #148] ARM GAS /tmp/ccfbYRip.s page 346 9696 00d0 DA08 lsrs r2, r3, #3 9697 00d2 02EB4203 add r3, r2, r2, lsl #1 9698 00d6 D000 lsls r0, r2, #3 9699 00d8 DB00 lsls r3, r3, #3 9700 00da 1D1D adds r5, r3, #4 9701 00dc 0346 mov r3, r0 9702 00de 0433 adds r3, r3, #4 9703 00e0 2393 str r3, [sp, #140] 9704 00e2 0F18 adds r7, r1, r0 9705 00e4 C2EB4273 rsb r3, r2, r2, lsl #29 9706 00e8 4E19 adds r6, r1, r5 9707 00ea 2292 str r2, [sp, #136] 9708 .LVL993: 9709 00ec 2790 str r0, [sp, #156] 9710 00ee 2695 str r5, [sp, #152] 9711 00f0 1001 lsls r0, r2, #4 9712 00f2 239D ldr r5, [sp, #140] 9713 00f4 219A ldr r2, [sp, #132] 9714 .LVL994: 9715 00f6 2890 str r0, [sp, #160] 9716 00f8 07EB000B add fp, r7, r0 9717 00fc 141D adds r4, r2, #4 9718 00fe 01EB050E add lr, r1, r5 9719 0102 DB00 lsls r3, r3, #3 9720 0104 5A46 mov r2, fp 9721 0106 0818 adds r0, r1, r0 9722 0108 D446 mov ip, r10 9723 010a 2094 str r4, [sp, #128] 9724 010c F246 mov r10, lr 9725 010e 0E90 str r0, [sp, #56] 9726 0110 2993 str r3, [sp, #164] 9727 0112 0494 str r4, [sp, #16] 9728 0114 0694 str r4, [sp, #24] 9729 0116 B346 mov fp, r6 9730 0118 0097 str r7, [sp] 9731 011a 9E46 mov lr, r3 9732 011c 0292 str r2, [sp, #8] 9733 .LVL995: 9734 .L475: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** j = n2; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** do 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* input is in 1.31(q31) format and provide 4 guard bits for the input */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the input as, */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i1 = i0 + n2; 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i2 = i1 + n2; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i3 = i2 + n2; 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Butterfly implementation */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U); ARM GAS /tmp/ccfbYRip.s page 347 9735 .loc 12 560 0 9736 011e 57F80E40 ldr r4, [r7, lr] 9737 0122 029B ldr r3, [sp, #8] 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U); 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb + xd */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U); 9738 .loc 12 565 0 9739 0124 5BF8042C ldr r2, [fp, #-4] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9740 .loc 12 560 0 9741 0128 53F80E00 ldr r0, [r3, lr] 9742 .loc 12 565 0 9743 012c 5AF8041C ldr r1, [r10, #-4] 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya + yc */ 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U); 9744 .loc 12 568 0 9745 0130 5AF80E50 ldr r5, [r10, lr] 9746 0134 5BF80E30 ldr r3, [fp, lr] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9747 .loc 12 560 0 9748 0138 2411 asrs r4, r4, #4 9749 013a 2646 mov r6, r4 9750 013c 0011 asrs r0, r0, #4 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9751 .loc 12 565 0 9752 013e 1411 asrs r4, r2, #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9753 .loc 12 560 0 9754 0140 3246 mov r2, r6 9755 0142 0244 add r2, r2, r0 9756 .LVL996: 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9757 .loc 12 565 0 9758 0144 04EB2114 add r4, r4, r1, asr #4 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i0] = (r1 + t1); 9759 .loc 12 573 0 9760 0148 1119 adds r1, r2, r4 9761 014a 47F80E10 str r1, [r7, lr] 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r1 - t1; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U); 9762 .loc 12 577 0 9763 014e 0299 ldr r1, [sp, #8] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9764 .loc 12 560 0 9765 0150 0A90 str r0, [sp, #40] 9766 .loc 12 577 0 9767 0152 4968 ldr r1, [r1, #4] 9768 0154 7868 ldr r0, [r7, #4] ARM GAS /tmp/ccfbYRip.s page 348 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 9769 .loc 12 560 0 9770 0156 0896 str r6, [sp, #32] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 9771 .loc 12 568 0 9772 0158 1B11 asrs r3, r3, #4 9773 015a 2D11 asrs r5, r5, #4 9774 .loc 12 577 0 9775 015c 0911 asrs r1, r1, #4 9776 015e 01EB2011 add r1, r1, r0, asr #4 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 9777 .loc 12 568 0 9778 0162 0D95 str r5, [sp, #52] 9779 0164 1D44 add r5, r5, r3 9780 0166 1F46 mov r7, r3 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i0) + 1U] = (s1 + t2); 9781 .loc 12 579 0 9782 0168 6B18 adds r3, r5, r1 9783 016a 4AF80E30 str r3, [r10, lr] 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya + yc) - (yb + yd) */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s1 - t2; 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb - yd */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U); 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia2 = 2U * ia1; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[ia2 * 2U]; 9784 .loc 12 591 0 9785 016e 069B ldr r3, [sp, #24] 9786 0170 1E46 mov r6, r3 9787 0172 53F8040C ldr r0, [r3, #-4] 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9788 .loc 12 592 0 9789 0176 56F8203B ldr r3, [r6], #32 9790 017a 0696 str r6, [sp, #24] 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 9791 .loc 12 575 0 9792 017c 121B subs r2, r2, r4 9793 .LVL997: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9794 .loc 12 582 0 9795 017e 691A subs r1, r5, r1 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) - 9796 .loc 12 595 0 9797 0180 82FB0089 smull r8, r9, r2, r0 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 9798 .loc 12 596 0 9799 0184 81FB0345 smull r4, r5, r1, r3 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ ARM GAS /tmp/ccfbYRip.s page 349 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i1 + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) + 9800 .loc 12 599 0 9801 0188 80FB0101 smull r0, r1, r0, r1 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 9802 .loc 12 600 0 9803 018c 82FB0323 smull r2, r3, r2, r3 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 9804 .loc 12 595 0 9805 0190 A9EB0504 sub r4, r9, r5 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 9806 .loc 12 599 0 9807 0194 5A18 adds r2, r3, r1 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 9808 .loc 12 585 0 9809 0196 029D ldr r5, [sp, #8] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9810 .loc 12 587 0 9811 0198 5BF8043C ldr r3, [fp, #-4] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 9812 .loc 12 585 0 9813 019c 0099 ldr r1, [sp] 9814 019e 6E68 ldr r6, [r5, #4] 9815 01a0 4868 ldr r0, [r1, #4] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9816 .loc 12 587 0 9817 01a2 5AF8041C ldr r1, [r10, #-4] 9818 01a6 1D11 asrs r5, r3, #4 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 9819 .loc 12 599 0 9820 01a8 009B ldr r3, [sp] 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9821 .loc 12 596 0 9822 01aa 6400 lsls r4, r4, #1 9823 .loc 12 600 0 9824 01ac 5200 lsls r2, r2, #1 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 9825 .loc 12 595 0 9826 01ae 4AF8044C str r4, [r10, #-4] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 9827 .loc 12 585 0 9828 01b2 4FEA2618 asr r8, r6, #4 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 9829 .loc 12 599 0 9830 01b6 5A60 str r2, [r3, #4] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9831 .loc 12 562 0 9832 01b8 0A9B ldr r3, [sp, #40] 9833 01ba 089A ldr r2, [sp, #32] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 9834 .loc 12 585 0 9835 01bc C8EB2019 rsb r9, r8, r0, asr #4 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9836 .loc 12 587 0 9837 01c0 C5EB2118 rsb r8, r5, r1, asr #4 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r2 - t1; ARM GAS /tmp/ccfbYRip.s page 350 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = r2 + t1; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s2 + t2; 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = s2 - t2; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co1 = pCoef[ia1 * 2U]; 9838 .loc 12 612 0 9839 01c4 0499 ldr r1, [sp, #16] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9840 .loc 12 562 0 9841 01c6 D21A subs r2, r2, r3 9842 .LVL998: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9843 .loc 12 570 0 9844 01c8 0D9B ldr r3, [sp, #52] 9845 .loc 12 612 0 9846 01ca 51F8040C ldr r0, [r1, #-4] 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 9847 .loc 12 613 0 9848 01ce 51F8104B ldr r4, [r1], #16 9849 01d2 0491 str r1, [sp, #16] 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 9850 .loc 12 603 0 9851 01d4 A2EB0905 sub r5, r2, r9 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9852 .loc 12 570 0 9853 01d8 DB1B subs r3, r3, r7 9854 .LVL999: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 9855 .loc 12 608 0 9856 01da 03EB0801 add r1, r3, r8 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - 9857 .loc 12 616 0 9858 01de 85FB0067 smull r6, r7, r5, r0 9859 01e2 CDE90867 strd r6, [sp, #32] 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9860 .loc 12 617 0 9861 01e6 81FB0467 smull r6, r7, r1, r4 9862 01ea CDE90A67 strd r6, [sp, #40] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9863 .loc 12 616 0 9864 01ee 0B9F ldr r7, [sp, #44] 9865 01f0 099E ldr r6, [sp, #36] 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + 9866 .loc 12 620 0 9867 01f2 80FB0101 smull r0, r1, r0, r1 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9868 .loc 12 616 0 9869 01f6 F61B subs r6, r6, r7 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; ARM GAS /tmp/ccfbYRip.s page 351 9870 .loc 12 621 0 9871 01f8 85FB0445 smull r4, r5, r5, r4 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9872 .loc 12 617 0 9873 01fc 7000 lsls r0, r6, #1 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 9874 .loc 12 620 0 9875 01fe 2944 add r1, r1, r5 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 9876 .loc 12 616 0 9877 0200 029E ldr r6, [sp, #8] 9878 0202 009F ldr r7, [sp] 9879 0204 46F80E00 str r0, [r6, lr] 9880 .loc 12 621 0 9881 0208 4900 lsls r1, r1, #1 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 9882 .loc 12 620 0 9883 020a 4BF80E10 str r1, [fp, lr] 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia3 = 3U * ia1; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[ia3 * 2U]; 9884 .loc 12 625 0 9885 020e DCF80000 ldr r0, [ip] 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9886 .loc 12 630 0 9887 0212 DCF80410 ldr r1, [ip, #4] 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9888 .loc 12 610 0 9889 0216 A3EB0803 sub r3, r3, r8 9890 .LVL1000: 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9891 .loc 12 605 0 9892 021a 4A44 add r2, r2, r9 9893 .LVL1001: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9894 .loc 12 629 0 9895 021c 82FB0089 smull r8, r9, r2, r0 9896 .LVL1002: 9897 .loc 12 630 0 9898 0220 83FB0145 smull r4, r5, r3, r1 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + 9899 .loc 12 633 0 9900 0224 80FB0301 smull r0, r1, r0, r3 9901 .LVL1003: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9902 .loc 12 634 0 9903 0228 DCF80430 ldr r3, [ip, #4] 9904 .LVL1004: 9905 022c 82FB0323 smull r2, r3, r2, r3 9906 .LVL1005: ARM GAS /tmp/ccfbYRip.s page 352 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9907 .loc 12 629 0 9908 0230 A9EB0504 sub r4, r9, r5 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9909 .loc 12 633 0 9910 0234 0B44 add r3, r3, r1 9911 .loc 12 634 0 9912 0236 5B00 lsls r3, r3, #1 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9913 .loc 12 630 0 9914 0238 6200 lsls r2, r4, #1 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 9915 .loc 12 629 0 9916 023a 4BF8042C str r2, [fp, #-4] 9917 .LVL1006: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 9918 .loc 12 633 0 9919 023e 7360 str r3, [r6, #4] 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = ia1 + twidCoefModifier; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Updating input index */ 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = i0 + 1U; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } while (--j); 9920 .loc 12 642 0 9921 0240 0E9B ldr r3, [sp, #56] 9922 0242 0837 adds r7, r7, #8 9923 0244 0836 adds r6, r6, #8 9924 0246 BB42 cmp r3, r7 9925 0248 0097 str r7, [sp] 9926 024a 0AF1080A add r10, r10, #8 9927 024e 0CF1300C add ip, ip, #48 9928 0252 0BF1080B add fp, fp, #8 9929 0256 0296 str r6, [sp, #8] 9930 0258 7FF461AF bne .L475 9931 .LVL1007: 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 5.27(q27) format */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* each stage provides two down scaling of the input */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Start of Middle stages process */ 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** twidCoefModifier <<= 2U; 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Calculation of second stage to excluding last stage */ 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (k = fftLen / 4U; k > 4U; k >>= 2U) 9932 .loc 12 653 0 9933 025c 229B ldr r3, [sp, #136] 9934 025e 042B cmp r3, #4 9935 0260 40F2EA80 bls .L476 9936 0264 1293 str r3, [sp, #72] 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 9937 .loc 12 650 0 9938 0266 0823 movs r3, #8 ARM GAS /tmp/ccfbYRip.s page 353 9939 0268 1F93 str r3, [sp, #124] 9940 .LVL1008: 9941 .L480: 9942 026a 1F9D ldr r5, [sp, #124] 9943 026c 139B ldr r3, [sp, #76] 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the first stage */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n1 = n2; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** n2 >>= 2U; 9944 .loc 12 657 0 9945 026e 129E ldr r6, [sp, #72] 9946 0270 1A46 mov r2, r3 9947 0272 05EB4503 add r3, r5, r5, lsl #1 9948 0276 DB00 lsls r3, r3, #3 9949 0278 1D93 str r3, [sp, #116] 9950 027a EB00 lsls r3, r5, #3 9951 027c 1C93 str r3, [sp, #112] 9952 027e 2B01 lsls r3, r5, #4 9953 0280 B408 lsrs r4, r6, #2 9954 0282 1B93 str r3, [sp, #108] 9955 0284 F300 lsls r3, r6, #3 9956 0286 02EBC400 add r0, r2, r4, lsl #3 9957 028a 1493 str r3, [sp, #80] 9958 028c C4EB4472 rsb r2, r4, r4, lsl #29 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (j = 0; j <= (n2 - 1U); j++) 9959 .loc 12 660 0 9960 0290 219B ldr r3, [sp, #132] 9961 0292 1893 str r3, [sp, #96] 9962 0294 D200 lsls r2, r2, #3 9963 0296 2101 lsls r1, r4, #4 9964 0298 0430 adds r0, r0, #4 9965 029a 0439 subs r1, r1, #4 9966 029c 0292 str r2, [sp, #8] 9967 029e CDE91633 strd r3, r3, [sp, #88] 9968 02a2 621E subs r2, r4, #1 9969 02a4 0023 movs r3, #0 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 9970 .loc 12 657 0 9971 02a6 0E94 str r4, [sp, #56] 9972 .LVL1009: 9973 02a8 1990 str r0, [sp, #100] 9974 02aa 1E91 str r1, [sp, #120] 9975 .loc 12 660 0 9976 02ac 1A92 str r2, [sp, #104] 9977 02ae 1593 str r3, [sp, #84] 9978 .LVL1010: 9979 .L479: 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the coefficients */ 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia2 = ia1 + ia1; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia3 = ia2 + ia1; 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co1 = pCoef[(ia1 * 2U)]; 9980 .loc 12 665 0 9981 02b0 189B ldr r3, [sp, #96] 9982 02b2 1A68 ldr r2, [r3] ARM GAS /tmp/ccfbYRip.s page 354 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 9983 .loc 12 666 0 9984 02b4 5B68 ldr r3, [r3, #4] 9985 02b6 0693 str r3, [sp, #24] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 9986 .loc 12 667 0 9987 02b8 179B ldr r3, [sp, #92] 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 9988 .loc 12 665 0 9989 02ba 0492 str r2, [sp, #16] 9990 .LVL1011: 9991 .loc 12 667 0 9992 02bc 1A68 ldr r2, [r3] 9993 .LVL1012: 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9994 .loc 12 668 0 9995 02be 5B68 ldr r3, [r3, #4] 9996 02c0 0893 str r3, [sp, #32] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 9997 .loc 12 669 0 9998 02c2 169B ldr r3, [sp, #88] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 9999 .loc 12 667 0 10000 02c4 1192 str r2, [sp, #68] 10001 .LVL1013: 10002 .loc 12 669 0 10003 02c6 1A68 ldr r2, [r3] 10004 .LVL1014: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10005 .loc 12 670 0 10006 02c8 5B68 ldr r3, [r3, #4] 10007 02ca 0D93 str r3, [sp, #52] 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = ia1 + twidCoefModifier; 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** for (i0 = j; i0 < fftLen; i0 += n1) 10008 .loc 12 674 0 10009 02cc 0C9B ldr r3, [sp, #48] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10010 .loc 12 669 0 10011 02ce 0A92 str r2, [sp, #40] 10012 .LVL1015: 10013 .loc 12 674 0 10014 02d0 1946 mov r1, r3 10015 02d2 159B ldr r3, [sp, #84] 10016 02d4 9942 cmp r1, r3 10017 02d6 40F29180 bls .L477 10018 02da 1E9A ldr r2, [sp, #120] 10019 .LVL1016: 10020 02dc 0093 str r3, [sp] 10021 02de 1046 mov r0, r2 10022 02e0 199A ldr r2, [sp, #100] 10023 02e2 00EB020A add r10, r0, r2 10024 02e6 9346 mov fp, r2 10025 .LVL1017: 10026 .L478: 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 355 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* index calculation for the input as, */ 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i1 = i0 + n2; 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i2 = i1 + n2; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i3 = i2 + n2; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Butterfly implementation */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc */ 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = pSrc[2U * i0] + pSrc[2U * i2]; 10027 .loc 12 684 0 10028 02e8 139F ldr r7, [sp, #76] 10029 02ea 009C ldr r4, [sp] 10030 02ec 0299 ldr r1, [sp, #8] 10031 02ee 57F83450 ldr r5, [r7, r4, lsl #3] 10032 02f2 5AF80160 ldr r6, [r10, r1] 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = pSrc[2U * i0] - pSrc[2U * i2]; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya + yc */ 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb + xd */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 10033 .loc 12 694 0 10034 02f6 5BF8042C ldr r2, [fp, #-4] 10035 02fa DAF80030 ldr r3, [r10] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10036 .loc 12 689 0 10037 02fe 5BF80180 ldr r8, [fp, r1] 10038 0302 0E99 ldr r1, [sp, #56] 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10039 .loc 12 684 0 10040 0304 05EB060E add lr, r5, r6 10041 .LVL1018: 10042 .loc 12 694 0 10043 0308 1344 add r3, r3, r2 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i0] = (r1 + t1) >> 2U; 10044 .loc 12 697 0 10045 030a 0EEB0302 add r2, lr, r3 10046 030e BC46 mov ip, r7 10047 0310 9210 asrs r2, r2, #2 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10048 .loc 12 689 0 10049 0312 5BF83100 ldr r0, [fp, r1, lsl #3] 10050 .loc 12 697 0 10051 0316 4CF83420 str r2, [ip, r4, lsl #3] 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r1 - t1; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; 10052 .loc 12 701 0 10053 031a DBF80010 ldr r1, [fp] 10054 031e DAF80420 ldr r2, [r10, #4] ARM GAS /tmp/ccfbYRip.s page 356 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U; 10055 .loc 12 703 0 10056 0322 029C ldr r4, [sp, #8] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10057 .loc 12 689 0 10058 0324 08EB0007 add r7, r8, r0 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 10059 .loc 12 701 0 10060 0328 0A44 add r2, r2, r1 10061 .loc 12 703 0 10062 032a B918 adds r1, r7, r2 10063 032c 8910 asrs r1, r1, #2 10064 032e 4BF80410 str r1, [fp, r4] 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10065 .loc 12 686 0 10066 0332 AE1B subs r6, r5, r6 10067 .LVL1019: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10068 .loc 12 691 0 10069 0334 A8EB0009 sub r9, r8, r0 10070 .LVL1020: 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya + yc) - (yb + yd) */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s1 - t2; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (yb - yd) */ 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 10071 .loc 12 709 0 10072 0338 DBF80050 ldr r5, [fp] 10073 033c DAF80400 ldr r0, [r10, #4] 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 10074 .loc 12 711 0 10075 0340 5BF8041C ldr r1, [fp, #-4] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 10076 .loc 12 709 0 10077 0344 A5EB0008 sub r8, r5, r0 10078 .loc 12 711 0 10079 0348 DAF80050 ldr r5, [r10] 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) - 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) + 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r1 = r2 - t1; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** r2 = r2 + t1; 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s1 = s2 + t2; 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ ARM GAS /tmp/ccfbYRip.s page 357 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** s2 = s2 - t2; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10080 .loc 12 733 0 10081 034c 0698 ldr r0, [sp, #24] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10082 .loc 12 711 0 10083 034e 491B subs r1, r1, r5 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10084 .loc 12 732 0 10085 0350 049D ldr r5, [sp, #16] 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 10086 .loc 12 722 0 10087 0352 A6EB080C sub ip, r6, r8 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 10088 .loc 12 699 0 10089 0356 AEEB0303 sub r3, lr, r3 10090 .LVL1021: 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 10091 .loc 12 727 0 10092 035a 09EB010E add lr, r9, r1 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10093 .loc 12 706 0 10094 035e BA1A subs r2, r7, r2 10095 .LVL1022: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10096 .loc 12 724 0 10097 0360 B044 add r8, r8, r6 10098 .LVL1023: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10099 .loc 12 732 0 10100 0362 8CFB0567 smull r6, r7, ip, r5 10101 .loc 12 733 0 10102 0366 8EFB0045 smull r4, r5, lr, r0 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10103 .loc 12 732 0 10104 036a 7E1B subs r6, r7, r5 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10105 .loc 12 729 0 10106 036c A9EB0109 sub r9, r9, r1 10107 .LVL1024: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10108 .loc 12 732 0 10109 0370 1096 str r6, [sp, #64] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10110 .loc 12 715 0 10111 0372 0899 ldr r1, [sp, #32] 10112 .LVL1025: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 10113 .loc 12 714 0 10114 0374 119E ldr r6, [sp, #68] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10115 .loc 12 715 0 10116 0376 82FB0101 smull r0, r1, r2, r1 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 358 10117 .loc 12 714 0 10118 037a 83FB0645 smull r4, r5, r3, r6 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10119 .loc 12 718 0 10120 037e 82FB0667 smull r6, r7, r2, r6 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 10121 .loc 12 714 0 10122 0382 6A1A subs r2, r5, r1 10123 0384 0F92 str r2, [sp, #60] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10124 .loc 12 719 0 10125 0386 089A ldr r2, [sp, #32] 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + 10126 .loc 12 736 0 10127 0388 049D ldr r5, [sp, #16] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10128 .loc 12 737 0 10129 038a 0698 ldr r0, [sp, #24] 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10130 .loc 12 745 0 10131 038c 0D9E ldr r6, [sp, #52] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10132 .loc 12 719 0 10133 038e 1146 mov r1, r2 10134 0390 83FB0123 smull r2, r3, r3, r1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10135 .loc 12 736 0 10136 0394 8EFB0545 smull r4, r5, lr, r5 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10137 .loc 12 737 0 10138 0398 8CFB0001 smull r0, r1, ip, r0 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10139 .loc 12 736 0 10140 039c 01EB050E add lr, r1, r5 10141 .LVL1026: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10142 .loc 12 718 0 10143 03a0 03EB070C add ip, r3, r7 10144 .LVL1027: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10145 .loc 12 741 0 10146 03a4 0D98 ldr r0, [sp, #52] 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 10147 .loc 12 740 0 10148 03a6 0A9B ldr r3, [sp, #40] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10149 .loc 12 744 0 10150 03a8 0A9D ldr r5, [sp, #40] ARM GAS /tmp/ccfbYRip.s page 359 10151 .loc 12 745 0 10152 03aa 88FB0667 smull r6, r7, r8, r6 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10153 .loc 12 741 0 10154 03ae 89FB0001 smull r0, r1, r9, r0 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10155 .loc 12 744 0 10156 03b2 89FB0545 smull r4, r5, r9, r5 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 10157 .loc 12 740 0 10158 03b6 88FB0323 smull r2, r3, r8, r3 10159 03ba 5B1A subs r3, r3, r1 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10160 .loc 12 744 0 10161 03bc 7919 adds r1, r7, r5 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10162 .loc 12 674 0 10163 03be 009F ldr r7, [sp] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10164 .loc 12 733 0 10165 03c0 109A ldr r2, [sp, #64] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10166 .loc 12 674 0 10167 03c2 129D ldr r5, [sp, #72] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10168 .loc 12 733 0 10169 03c4 5010 asrs r0, r2, #1 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10170 .loc 12 715 0 10171 03c6 0F9A ldr r2, [sp, #60] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10172 .loc 12 674 0 10173 03c8 7E19 adds r6, r7, r5 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10174 .loc 12 715 0 10175 03ca 5410 asrs r4, r2, #1 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10176 .loc 12 719 0 10177 03cc 4FEA6C05 asr r5, ip, #1 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10178 .loc 12 718 0 10179 03d0 4BE90145 strd r4, r5, [fp, #-4] 10180 .LVL1028: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10181 .loc 12 732 0 10182 03d4 029C ldr r4, [sp, #8] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10183 .loc 12 674 0 10184 03d6 0096 str r6, [sp] 10185 .LVL1029: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10186 .loc 12 732 0 10187 03d8 4AF80400 str r0, [r10, r4] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10188 .loc 12 736 0 10189 03dc 0E98 ldr r0, [sp, #56] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 360 10190 .loc 12 737 0 10191 03de 4FEA6E02 asr r2, lr, #1 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10192 .loc 12 741 0 10193 03e2 5B10 asrs r3, r3, #1 10194 .loc 12 745 0 10195 03e4 4910 asrs r1, r1, #1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10196 .loc 12 736 0 10197 03e6 4BF83020 str r2, [fp, r0, lsl #3] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10198 .loc 12 744 0 10199 03ea CAE90031 strd r3, r1, [r10] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10200 .loc 12 674 0 10201 03ee 0C9B ldr r3, [sp, #48] 10202 03f0 149A ldr r2, [sp, #80] 10203 03f2 B342 cmp r3, r6 10204 03f4 9344 add fp, fp, r2 10205 03f6 9244 add r10, r10, r2 10206 03f8 3FF676AF bhi .L478 10207 .LVL1030: 10208 .L477: 10209 03fc 189A ldr r2, [sp, #96] 10210 03fe 1C99 ldr r1, [sp, #112] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10211 .loc 12 660 0 10212 0400 159B ldr r3, [sp, #84] 10213 0402 0A44 add r2, r2, r1 10214 0404 1892 str r2, [sp, #96] 10215 0406 1B99 ldr r1, [sp, #108] 10216 0408 179A ldr r2, [sp, #92] 10217 040a 0A44 add r2, r2, r1 10218 040c 1792 str r2, [sp, #92] 10219 040e 1D99 ldr r1, [sp, #116] 10220 0410 169A ldr r2, [sp, #88] 10221 0412 0A44 add r2, r2, r1 10222 0414 1692 str r2, [sp, #88] 10223 0416 199A ldr r2, [sp, #100] 10224 0418 0832 adds r2, r2, #8 10225 041a 1992 str r2, [sp, #100] 10226 041c 1A9A ldr r2, [sp, #104] 10227 041e 0133 adds r3, r3, #1 10228 0420 9342 cmp r3, r2 10229 0422 1593 str r3, [sp, #84] 10230 .LVL1031: 10231 0424 7FF644AF bls .L479 10232 0428 0E9B ldr r3, [sp, #56] 10233 .LVL1032: 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** twidCoefModifier <<= 2U; 10234 .loc 12 748 0 10235 042a 1F9A ldr r2, [sp, #124] 10236 042c 1293 str r3, [sp, #72] 10237 .LVL1033: 10238 042e 9200 lsls r2, r2, #2 ARM GAS /tmp/ccfbYRip.s page 361 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10239 .loc 12 653 0 10240 0430 042B cmp r3, #4 10241 .loc 12 748 0 10242 0432 1F92 str r2, [sp, #124] 10243 .LVL1034: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10244 .loc 12 653 0 10245 0434 3FF619AF bhi .L480 10246 .LVL1035: 10247 .L476: 10248 0438 139B ldr r3, [sp, #76] 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 10249 .loc 12 542 0 10250 043a DDF88880 ldr r8, [sp, #136] 10251 043e 2033 adds r3, r3, #32 10252 .L481: 10253 .LVL1036: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* End of Middle stages process */ 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Start of last stage process */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Initializations for the last stage */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** j = fftLen >> 2; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ptr1 = &pSrc[0]; 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Calculations of last stage */ 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** do 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xa (real), ya(imag) input */ 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xa = *ptr1++; 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xb (real), yb(imag) input */ 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xb = *ptr1++; 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb = *ptr1++; 10254 .loc 12 775 0 10255 0440 53E906C1 ldrd ip, r1, [r3, #-24] 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xc (real), yc(imag) input */ 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xc = *ptr1++; 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc = *ptr1++; 10256 .loc 12 779 0 10257 0444 53E90457 ldrd r5, r7, [r3, #-16] 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 10258 .loc 12 770 0 10259 0448 53F8200C ldr r0, [r3, #-32] 10260 .LVL1037: ARM GAS /tmp/ccfbYRip.s page 362 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10261 .loc 12 771 0 10262 044c 53F81C2C ldr r2, [r3, #-28] 10263 .LVL1038: 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Read xc (real), yc(imag) input */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xd = *ptr1++; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd = *ptr1++; 10264 .loc 12 783 0 10265 0450 53E9026E ldrd r6, lr, [r3, #-8] 10266 .LVL1039: 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa' = xa + xb + xc + xd */ 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xa_out = xa + xb + xc + xd; 10267 .loc 12 786 0 10268 0454 00EB0C04 add r4, r0, ip 10269 0458 2C44 add r4, r4, r5 10270 045a 3444 add r4, r4, r6 10271 .LVL1040: 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya_out = ya + yb + yc + yd; 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* pointer updation for writing */ 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ptr1 = ptr1 - 8U; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xa' and ya' */ 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xa_out; 10272 .loc 12 795 0 10273 045c 43F8204C str r4, [r3, #-32] 10274 .LVL1041: 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xc_out = (xa - xb + xc - xd); 10275 .loc 12 798 0 10276 0460 A0EB0C04 sub r4, r0, ip 10277 .LVL1042: 10278 0464 2C44 add r4, r4, r5 10279 0466 A41B subs r4, r4, r6 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xc' and yc' */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xc_out; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xb_out = (xa - yb - xc + yd); 10280 .loc 12 805 0 10281 0468 A0EB0109 sub r9, r0, r1 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 10282 .loc 12 802 0 10283 046c 43F8184C str r4, [r3, #-24] 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xb' and yb' */ 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xb_out; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 363 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** xd_out = (xa + yb - xc - yd); 10284 .loc 12 812 0 10285 0470 0844 add r0, r0, r1 10286 .LVL1043: 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10287 .loc 12 789 0 10288 0472 5418 adds r4, r2, r1 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10289 .loc 12 799 0 10290 0474 511A subs r1, r2, r1 10291 .LVL1044: 10292 .loc 12 812 0 10293 0476 401B subs r0, r0, r5 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10294 .loc 12 789 0 10295 0478 3C44 add r4, r4, r7 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10296 .loc 12 799 0 10297 047a 3944 add r1, r1, r7 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 10298 .loc 12 805 0 10299 047c A9EB0509 sub r9, r9, r5 10300 0480 09EB0E05 add r5, r9, lr 10301 .loc 12 812 0 10302 0484 A0EB0E00 sub r0, r0, lr 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10303 .loc 12 789 0 10304 0488 7444 add r4, r4, lr 10305 .LVL1045: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10306 .loc 12 799 0 10307 048a A1EB0E01 sub r1, r1, lr 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10308 .loc 12 806 0 10309 048e 02EB0C0E add lr, r2, ip 10310 .LVL1046: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 10311 .loc 12 813 0 10312 0492 A2EB0C02 sub r2, r2, ip 10313 .LVL1047: 10314 0496 D21B subs r2, r2, r7 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10315 .loc 12 806 0 10316 0498 AEEB070C sub ip, lr, r7 10317 .LVL1048: 10318 049c ACEB0607 sub r7, ip, r6 10319 .LVL1049: 10320 .loc 12 813 0 10321 04a0 3244 add r2, r2, r6 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* writing xd' and yd' */ 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = xd_out; 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } while (--j); 10322 .loc 12 819 0 10323 04a2 B8F10108 subs r8, r8, #1 ARM GAS /tmp/ccfbYRip.s page 364 10324 .LVL1050: 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 10325 .loc 12 809 0 10326 04a6 43F8105C str r5, [r3, #-16] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 10327 .loc 12 816 0 10328 04aa 43F8080C str r0, [r3, #-8] 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10329 .loc 12 796 0 10330 04ae 43F81C4C str r4, [r3, #-28] 10331 .LVL1051: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10332 .loc 12 803 0 10333 04b2 43F8141C str r1, [r3, #-20] 10334 .LVL1052: 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10335 .loc 12 810 0 10336 04b6 43F80C7C str r7, [r3, #-12] 10337 .LVL1053: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10338 .loc 12 817 0 10339 04ba 43F8042C str r2, [r3, #-4] 10340 .LVL1054: 10341 04be 03F12003 add r3, r3, #32 10342 .LVL1055: 10343 .loc 12 819 0 10344 04c2 BDD1 bne .L481 10345 .LVL1056: 10346 .LBE2115: 10347 .LBE2114: 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* first col */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2U); 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** /* second col */ 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U); 10348 .loc 11 855 0 10349 04c4 249A ldr r2, [sp, #144] 10350 04c6 139B ldr r3, [sp, #76] 10351 04c8 DDF884A0 ldr r10, [sp, #132] 10352 04cc 03EB8203 add r3, r3, r2, lsl #2 10353 04d0 279A ldr r2, [sp, #156] 10354 04d2 1493 str r3, [sp, #80] 10355 .LVL1057: 10356 04d4 9346 mov fp, r2 10357 04d6 239A ldr r2, [sp, #140] 10358 04d8 1646 mov r6, r2 10359 04da 269A ldr r2, [sp, #152] 10360 04dc 1746 mov r7, r2 10361 04de 289A ldr r2, [sp, #160] 10362 04e0 9B44 add fp, fp, r3 10363 04e2 1E44 add r6, r6, r3 10364 04e4 1F44 add r7, r7, r3 10365 04e6 1344 add r3, r3, r2 10366 .LVL1058: 10367 04e8 0BEB020E add lr, fp, r2 ARM GAS /tmp/ccfbYRip.s page 365 10368 04ec 0A93 str r3, [sp, #40] 10369 04ee 299A ldr r2, [sp, #164] 10370 04f0 209B ldr r3, [sp, #128] 10371 04f2 0293 str r3, [sp, #8] 10372 04f4 D446 mov ip, r10 10373 04f6 D846 mov r8, fp 10374 04f8 B246 mov r10, r6 10375 04fa BB46 mov fp, r7 10376 .LVL1059: 10377 .L482: 10378 .LBB2116: 10379 .LBB2117: 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10380 .loc 12 560 0 10381 04fc 58F80250 ldr r5, [r8, r2] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10382 .loc 12 565 0 10383 0500 5BF8041C ldr r1, [fp, #-4] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10384 .loc 12 560 0 10385 0504 5EF80200 ldr r0, [lr, r2] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10386 .loc 12 565 0 10387 0508 5AF8044C ldr r4, [r10, #-4] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10388 .loc 12 568 0 10389 050c 5BF80260 ldr r6, [fp, r2] 10390 0510 5AF80230 ldr r3, [r10, r2] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10391 .loc 12 560 0 10392 0514 2F11 asrs r7, r5, #4 10393 0516 0011 asrs r0, r0, #4 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10394 .loc 12 565 0 10395 0518 0D11 asrs r5, r1, #4 10396 051a 05EB2415 add r5, r5, r4, asr #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10397 .loc 12 560 0 10398 051e 0490 str r0, [sp, #16] 10399 0520 3818 adds r0, r7, r0 10400 .LVL1060: 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 10401 .loc 12 573 0 10402 0522 4119 adds r1, r0, r5 10403 0524 48F80210 str r1, [r8, r2] 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 10404 .loc 12 577 0 10405 0528 DEF80410 ldr r1, [lr, #4] 10406 052c D8F80440 ldr r4, [r8, #4] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10407 .loc 12 560 0 10408 0530 0097 str r7, [sp] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10409 .loc 12 568 0 10410 0532 4FEA2619 asr r9, r6, #4 10411 0536 1B11 asrs r3, r3, #4 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ ARM GAS /tmp/ccfbYRip.s page 366 10412 .loc 12 577 0 10413 0538 0911 asrs r1, r1, #4 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10414 .loc 12 568 0 10415 053a 03EB0907 add r7, r3, r9 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 10416 .loc 12 577 0 10417 053e 01EB2416 add r6, r1, r4, asr #4 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10418 .loc 12 579 0 10419 0542 B919 adds r1, r7, r6 10420 0544 4AF80210 str r1, [r10, r2] 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 10421 .loc 12 591 0 10422 0548 2099 ldr r1, [sp, #128] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10423 .loc 12 568 0 10424 054a 0693 str r3, [sp, #24] 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 10425 .loc 12 591 0 10426 054c 51F8044C ldr r4, [r1, #-4] 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10427 .loc 12 592 0 10428 0550 0B46 mov r3, r1 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 10429 .loc 12 575 0 10430 0552 401B subs r0, r0, r5 10431 .LVL1061: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10432 .loc 12 582 0 10433 0554 BD1B subs r5, r7, r6 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 10434 .loc 12 595 0 10435 0556 80FB0467 smull r6, r7, r0, r4 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10436 .loc 12 592 0 10437 055a 53F8201B ldr r1, [r3], #32 10438 055e 2093 str r3, [sp, #128] 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 10439 .loc 12 595 0 10440 0560 CDE90867 strd r6, [sp, #32] 10441 0564 099B ldr r3, [sp, #36] 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10442 .loc 12 596 0 10443 0566 85FB0167 smull r6, r7, r5, r1 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 10444 .loc 12 595 0 10445 056a DF1B subs r7, r3, r7 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 10446 .loc 12 585 0 10447 056c DEF80430 ldr r3, [lr, #4] 10448 0570 D8F80460 ldr r6, [r8, #4] 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 10449 .loc 12 599 0 10450 0574 84FB0545 smull r4, r5, r4, r5 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10451 .loc 12 600 0 ARM GAS /tmp/ccfbYRip.s page 367 10452 0578 80FB0101 smull r0, r1, r0, r1 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10453 .loc 12 587 0 10454 057c 5BF8044C ldr r4, [fp, #-4] 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 10455 .loc 12 599 0 10456 0580 2944 add r1, r1, r5 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 10457 .loc 12 585 0 10458 0582 1811 asrs r0, r3, #4 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10459 .loc 12 587 0 10460 0584 5AF8045C ldr r5, [r10, #-4] 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10461 .loc 12 570 0 10462 0588 069B ldr r3, [sp, #24] 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10463 .loc 12 596 0 10464 058a 7F00 lsls r7, r7, #1 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10465 .loc 12 600 0 10466 058c 4900 lsls r1, r1, #1 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10467 .loc 12 587 0 10468 058e 2411 asrs r4, r4, #4 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 10469 .loc 12 595 0 10470 0590 4AF8047C str r7, [r10, #-4] 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10471 .loc 12 570 0 10472 0594 A3EB0903 sub r3, r3, r9 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 10473 .loc 12 599 0 10474 0598 C8F80410 str r1, [r8, #4] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10475 .loc 12 587 0 10476 059c C4EB2519 rsb r9, r4, r5, asr #4 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10477 .loc 12 562 0 10478 05a0 009F ldr r7, [sp] 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 10479 .loc 12 612 0 10480 05a2 029C ldr r4, [sp, #8] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10481 .loc 12 562 0 10482 05a4 0499 ldr r1, [sp, #16] 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 10483 .loc 12 612 0 10484 05a6 54F8045C ldr r5, [r4, #-4] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10485 .loc 12 562 0 10486 05aa 791A subs r1, r7, r1 10487 .LVL1062: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 10488 .loc 12 585 0 10489 05ac C0EB2610 rsb r0, r0, r6, asr #4 10490 .LVL1063: ARM GAS /tmp/ccfbYRip.s page 368 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10491 .loc 12 613 0 10492 05b0 54F8106B ldr r6, [r4], #16 10493 05b4 0294 str r4, [sp, #8] 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 10494 .loc 12 603 0 10495 05b6 0F1A subs r7, r1, r0 10496 .LVL1064: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 10497 .loc 12 608 0 10498 05b8 0493 str r3, [sp, #16] 10499 05ba 4B44 add r3, r3, r9 10500 .LVL1065: 10501 05bc 0093 str r3, [sp] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 10502 .loc 12 616 0 10503 05be 87FB0534 smull r3, r4, r7, r5 10504 05c2 CDE90634 strd r3, [sp, #24] 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10505 .loc 12 617 0 10506 05c6 009C ldr r4, [sp] 10507 05c8 84FB0634 smull r3, r4, r4, r6 10508 05cc CDE90834 strd r3, [sp, #32] 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 10509 .loc 12 620 0 10510 05d0 009B ldr r3, [sp] 10511 05d2 85FB0345 smull r4, r5, r5, r3 10512 05d6 CDE90045 strd r4, [sp] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 10513 .loc 12 616 0 10514 05da 079C ldr r4, [sp, #28] 10515 05dc 099D ldr r5, [sp, #36] 10516 05de 631B subs r3, r4, r5 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 10517 .loc 12 620 0 10518 05e0 019D ldr r5, [sp, #4] 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10519 .loc 12 621 0 10520 05e2 87FB0667 smull r6, r7, r7, r6 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 10521 .loc 12 620 0 10522 05e6 3D44 add r5, r5, r7 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10523 .loc 12 617 0 10524 05e8 5C00 lsls r4, r3, #1 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10525 .loc 12 621 0 10526 05ea 6D00 lsls r5, r5, #1 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 10527 .loc 12 616 0 10528 05ec 4EF80240 str r4, [lr, r2] 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 10529 .loc 12 620 0 10530 05f0 4BF80250 str r5, [fp, r2] 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10531 .loc 12 625 0 10532 05f4 DCF80040 ldr r4, [ip] ARM GAS /tmp/ccfbYRip.s page 369 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10533 .loc 12 610 0 10534 05f8 049B ldr r3, [sp, #16] 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10535 .loc 12 605 0 10536 05fa 0844 add r0, r0, r1 10537 .LVL1066: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 10538 .loc 12 629 0 10539 05fc 80FB0456 smull r5, r6, r0, r4 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10540 .loc 12 630 0 10541 0600 DCF80410 ldr r1, [ip, #4] 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10542 .loc 12 610 0 10543 0604 A3EB0903 sub r3, r3, r9 10544 .LVL1067: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 10545 .loc 12 629 0 10546 0608 CDE90056 strd r5, [sp] 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10547 .loc 12 630 0 10548 060c 83FB0167 smull r6, r7, r3, r1 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 10549 .loc 12 633 0 10550 0610 84FB0345 smull r4, r5, r4, r3 10551 .LVL1068: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 10552 .loc 12 629 0 10553 0614 019B ldr r3, [sp, #4] 10554 .LVL1069: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10555 .loc 12 634 0 10556 0616 80FB0101 smull r0, r1, r0, r1 10557 .LVL1070: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 10558 .loc 12 629 0 10559 061a DE1B subs r6, r3, r7 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 10560 .loc 12 633 0 10561 061c 4B19 adds r3, r1, r5 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10562 .loc 12 634 0 10563 061e 5B00 lsls r3, r3, #1 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10564 .loc 12 630 0 10565 0620 7000 lsls r0, r6, #1 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 10566 .loc 12 629 0 10567 0622 4BF8040C str r0, [fp, #-4] 10568 .LVL1071: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 10569 .loc 12 633 0 10570 0626 CEF80430 str r3, [lr, #4] 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10571 .loc 12 642 0 10572 062a 0A9B ldr r3, [sp, #40] ARM GAS /tmp/ccfbYRip.s page 370 10573 062c 08F10808 add r8, r8, #8 10574 0630 4345 cmp r3, r8 10575 0632 0AF1080A add r10, r10, #8 10576 0636 0CF1300C add ip, ip, #48 10577 063a 0BF1080B add fp, fp, #8 10578 063e 0EF1080E add lr, lr, #8 10579 0642 7FF45BAF bne .L482 10580 .LVL1072: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10581 .loc 12 653 0 10582 0646 229B ldr r3, [sp, #136] 10583 0648 042B cmp r3, #4 10584 064a 40F2EA80 bls .L483 10585 064e 1293 str r3, [sp, #72] 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10586 .loc 12 650 0 10587 0650 0823 movs r3, #8 10588 0652 2093 str r3, [sp, #128] 10589 .LVL1073: 10590 .L487: 10591 0654 209D ldr r5, [sp, #128] 10592 0656 149B ldr r3, [sp, #80] 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 10593 .loc 12 657 0 10594 0658 129E ldr r6, [sp, #72] 10595 065a 1A46 mov r2, r3 10596 065c 05EB4503 add r3, r5, r5, lsl #1 10597 0660 DB00 lsls r3, r3, #3 10598 0662 1E93 str r3, [sp, #120] 10599 0664 EB00 lsls r3, r5, #3 10600 0666 1D93 str r3, [sp, #116] 10601 0668 2B01 lsls r3, r5, #4 10602 066a B408 lsrs r4, r6, #2 10603 066c 1C93 str r3, [sp, #112] 10604 066e F300 lsls r3, r6, #3 10605 0670 02EBC400 add r0, r2, r4, lsl #3 10606 0674 1593 str r3, [sp, #84] 10607 0676 C4EB4472 rsb r2, r4, r4, lsl #29 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10608 .loc 12 660 0 10609 067a 219B ldr r3, [sp, #132] 10610 067c 1993 str r3, [sp, #100] 10611 067e D200 lsls r2, r2, #3 10612 0680 2101 lsls r1, r4, #4 10613 0682 0430 adds r0, r0, #4 10614 0684 0439 subs r1, r1, #4 10615 0686 0292 str r2, [sp, #8] 10616 0688 CDE91733 strd r3, r3, [sp, #92] 10617 068c 621E subs r2, r4, #1 10618 068e 0023 movs r3, #0 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 10619 .loc 12 657 0 10620 0690 0E94 str r4, [sp, #56] 10621 .LVL1074: 10622 0692 1A90 str r0, [sp, #104] 10623 0694 1F91 str r1, [sp, #124] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 371 10624 .loc 12 660 0 10625 0696 1B92 str r2, [sp, #108] 10626 0698 1693 str r3, [sp, #88] 10627 .LVL1075: 10628 .L486: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 10629 .loc 12 665 0 10630 069a 199B ldr r3, [sp, #100] 10631 069c 1A68 ldr r2, [r3] 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 10632 .loc 12 666 0 10633 069e 5B68 ldr r3, [r3, #4] 10634 06a0 0693 str r3, [sp, #24] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 10635 .loc 12 667 0 10636 06a2 189B ldr r3, [sp, #96] 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 10637 .loc 12 665 0 10638 06a4 0492 str r2, [sp, #16] 10639 .LVL1076: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 10640 .loc 12 667 0 10641 06a6 1A68 ldr r2, [r3] 10642 .LVL1077: 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 10643 .loc 12 668 0 10644 06a8 5B68 ldr r3, [r3, #4] 10645 06aa 0893 str r3, [sp, #32] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10646 .loc 12 669 0 10647 06ac 179B ldr r3, [sp, #92] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 10648 .loc 12 667 0 10649 06ae 1192 str r2, [sp, #68] 10650 .LVL1078: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10651 .loc 12 669 0 10652 06b0 1A68 ldr r2, [r3] 10653 .LVL1079: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 10654 .loc 12 670 0 10655 06b2 5B68 ldr r3, [r3, #4] 10656 06b4 0D93 str r3, [sp, #52] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10657 .loc 12 674 0 10658 06b6 0C9B ldr r3, [sp, #48] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 10659 .loc 12 669 0 10660 06b8 0A92 str r2, [sp, #40] 10661 .LVL1080: 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10662 .loc 12 674 0 10663 06ba 1946 mov r1, r3 10664 06bc 169B ldr r3, [sp, #88] 10665 06be 9942 cmp r1, r3 10666 06c0 40F29180 bls .L484 10667 06c4 1F9A ldr r2, [sp, #124] ARM GAS /tmp/ccfbYRip.s page 372 10668 .LVL1081: 10669 06c6 0093 str r3, [sp] 10670 06c8 1046 mov r0, r2 10671 06ca 1A9A ldr r2, [sp, #104] 10672 06cc 00EB020A add r10, r0, r2 10673 06d0 9346 mov fp, r2 10674 .LVL1082: 10675 .L485: 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10676 .loc 12 684 0 10677 06d2 149F ldr r7, [sp, #80] 10678 06d4 009C ldr r4, [sp] 10679 06d6 0299 ldr r1, [sp, #8] 10680 06d8 57F83450 ldr r5, [r7, r4, lsl #3] 10681 06dc 5AF80160 ldr r6, [r10, r1] 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10682 .loc 12 694 0 10683 06e0 5BF8042C ldr r2, [fp, #-4] 10684 06e4 DAF80030 ldr r3, [r10] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10685 .loc 12 689 0 10686 06e8 5BF80180 ldr r8, [fp, r1] 10687 06ec 0E99 ldr r1, [sp, #56] 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 10688 .loc 12 684 0 10689 06ee 05EB060E add lr, r5, r6 10690 .LVL1083: 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10691 .loc 12 694 0 10692 06f2 1344 add r3, r3, r2 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 10693 .loc 12 697 0 10694 06f4 0EEB0302 add r2, lr, r3 10695 06f8 BC46 mov ip, r7 10696 06fa 9210 asrs r2, r2, #2 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10697 .loc 12 689 0 10698 06fc 5BF83100 ldr r0, [fp, r1, lsl #3] 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 10699 .loc 12 697 0 10700 0700 4CF83420 str r2, [ip, r4, lsl #3] 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 10701 .loc 12 701 0 10702 0704 DBF80010 ldr r1, [fp] 10703 0708 DAF80420 ldr r2, [r10, #4] 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10704 .loc 12 703 0 10705 070c 029C ldr r4, [sp, #8] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 10706 .loc 12 689 0 10707 070e 08EB0007 add r7, r8, r0 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 10708 .loc 12 701 0 10709 0712 0A44 add r2, r2, r1 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10710 .loc 12 703 0 10711 0714 B918 adds r1, r7, r2 ARM GAS /tmp/ccfbYRip.s page 373 10712 0716 8910 asrs r1, r1, #2 10713 0718 4BF80410 str r1, [fp, r4] 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10714 .loc 12 686 0 10715 071c AE1B subs r6, r5, r6 10716 .LVL1084: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10717 .loc 12 691 0 10718 071e A8EB0009 sub r9, r8, r0 10719 .LVL1085: 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 10720 .loc 12 709 0 10721 0722 DBF80050 ldr r5, [fp] 10722 0726 DAF80400 ldr r0, [r10, #4] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10723 .loc 12 711 0 10724 072a 5BF8041C ldr r1, [fp, #-4] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 10725 .loc 12 709 0 10726 072e A5EB0008 sub r8, r5, r0 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10727 .loc 12 711 0 10728 0732 DAF80050 ldr r5, [r10] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10729 .loc 12 733 0 10730 0736 0698 ldr r0, [sp, #24] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10731 .loc 12 711 0 10732 0738 491B subs r1, r1, r5 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10733 .loc 12 732 0 10734 073a 049D ldr r5, [sp, #16] 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 10735 .loc 12 722 0 10736 073c A6EB080C sub ip, r6, r8 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 10737 .loc 12 699 0 10738 0740 AEEB0303 sub r3, lr, r3 10739 .LVL1086: 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 10740 .loc 12 727 0 10741 0744 09EB010E add lr, r9, r1 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10742 .loc 12 706 0 10743 0748 BA1A subs r2, r7, r2 10744 .LVL1087: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10745 .loc 12 724 0 10746 074a B044 add r8, r8, r6 10747 .LVL1088: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10748 .loc 12 732 0 10749 074c 8CFB0567 smull r6, r7, ip, r5 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10750 .loc 12 733 0 10751 0750 8EFB0045 smull r4, r5, lr, r0 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 374 10752 .loc 12 732 0 10753 0754 7E1B subs r6, r7, r5 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10754 .loc 12 729 0 10755 0756 A9EB0109 sub r9, r9, r1 10756 .LVL1089: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10757 .loc 12 732 0 10758 075a 1096 str r6, [sp, #64] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10759 .loc 12 715 0 10760 075c 0899 ldr r1, [sp, #32] 10761 .LVL1090: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 10762 .loc 12 714 0 10763 075e 119E ldr r6, [sp, #68] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10764 .loc 12 715 0 10765 0760 82FB0101 smull r0, r1, r2, r1 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 10766 .loc 12 714 0 10767 0764 83FB0645 smull r4, r5, r3, r6 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10768 .loc 12 718 0 10769 0768 82FB0667 smull r6, r7, r2, r6 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 10770 .loc 12 714 0 10771 076c 6A1A subs r2, r5, r1 10772 076e 0F92 str r2, [sp, #60] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10773 .loc 12 719 0 10774 0770 089A ldr r2, [sp, #32] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10775 .loc 12 736 0 10776 0772 049D ldr r5, [sp, #16] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10777 .loc 12 737 0 10778 0774 0698 ldr r0, [sp, #24] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 10779 .loc 12 745 0 10780 0776 0D9E ldr r6, [sp, #52] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10781 .loc 12 719 0 10782 0778 1146 mov r1, r2 10783 077a 83FB0123 smull r2, r3, r3, r1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10784 .loc 12 736 0 10785 077e 8EFB0545 smull r4, r5, lr, r5 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10786 .loc 12 737 0 10787 0782 8CFB0001 smull r0, r1, ip, r0 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10788 .loc 12 736 0 10789 0786 01EB050E add lr, r1, r5 10790 .LVL1091: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10791 .loc 12 718 0 ARM GAS /tmp/ccfbYRip.s page 375 10792 078a 03EB070C add ip, r3, r7 10793 .LVL1092: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10794 .loc 12 741 0 10795 078e 0D98 ldr r0, [sp, #52] 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 10796 .loc 12 740 0 10797 0790 0A9B ldr r3, [sp, #40] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10798 .loc 12 744 0 10799 0792 0A9D ldr r5, [sp, #40] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 10800 .loc 12 745 0 10801 0794 88FB0667 smull r6, r7, r8, r6 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10802 .loc 12 741 0 10803 0798 89FB0001 smull r0, r1, r9, r0 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10804 .loc 12 744 0 10805 079c 89FB0545 smull r4, r5, r9, r5 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 10806 .loc 12 740 0 10807 07a0 88FB0323 smull r2, r3, r8, r3 10808 07a4 5B1A subs r3, r3, r1 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10809 .loc 12 744 0 10810 07a6 7919 adds r1, r7, r5 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10811 .loc 12 674 0 10812 07a8 009F ldr r7, [sp] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10813 .loc 12 733 0 10814 07aa 109A ldr r2, [sp, #64] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10815 .loc 12 674 0 10816 07ac 129D ldr r5, [sp, #72] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10817 .loc 12 733 0 10818 07ae 5010 asrs r0, r2, #1 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10819 .loc 12 715 0 10820 07b0 0F9A ldr r2, [sp, #60] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10821 .loc 12 674 0 10822 07b2 7E19 adds r6, r7, r5 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10823 .loc 12 715 0 10824 07b4 5410 asrs r4, r2, #1 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10825 .loc 12 719 0 10826 07b6 4FEA6C05 asr r5, ip, #1 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 10827 .loc 12 718 0 10828 07ba 4BE90145 strd r4, r5, [fp, #-4] 10829 .LVL1093: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10830 .loc 12 732 0 ARM GAS /tmp/ccfbYRip.s page 376 10831 07be 029C ldr r4, [sp, #8] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10832 .loc 12 674 0 10833 07c0 0096 str r6, [sp] 10834 .LVL1094: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 10835 .loc 12 732 0 10836 07c2 4AF80400 str r0, [r10, r4] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10837 .loc 12 736 0 10838 07c6 0E98 ldr r0, [sp, #56] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10839 .loc 12 737 0 10840 07c8 4FEA6E02 asr r2, lr, #1 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10841 .loc 12 741 0 10842 07cc 5B10 asrs r3, r3, #1 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 10843 .loc 12 745 0 10844 07ce 4910 asrs r1, r1, #1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 10845 .loc 12 736 0 10846 07d0 4BF83020 str r2, [fp, r0, lsl #3] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 10847 .loc 12 744 0 10848 07d4 CAE90031 strd r3, r1, [r10] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10849 .loc 12 674 0 10850 07d8 0C9B ldr r3, [sp, #48] 10851 07da 159A ldr r2, [sp, #84] 10852 07dc B342 cmp r3, r6 10853 07de 9344 add fp, fp, r2 10854 07e0 9244 add r10, r10, r2 10855 07e2 3FF676AF bhi .L485 10856 .LVL1095: 10857 .L484: 10858 07e6 199A ldr r2, [sp, #100] 10859 07e8 1D99 ldr r1, [sp, #116] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10860 .loc 12 660 0 10861 07ea 169B ldr r3, [sp, #88] 10862 07ec 0A44 add r2, r2, r1 10863 07ee 1992 str r2, [sp, #100] 10864 07f0 1C99 ldr r1, [sp, #112] 10865 07f2 189A ldr r2, [sp, #96] 10866 07f4 0A44 add r2, r2, r1 10867 07f6 1892 str r2, [sp, #96] 10868 07f8 1E99 ldr r1, [sp, #120] 10869 07fa 179A ldr r2, [sp, #92] 10870 07fc 0A44 add r2, r2, r1 10871 07fe 1792 str r2, [sp, #92] 10872 0800 1A9A ldr r2, [sp, #104] 10873 0802 0832 adds r2, r2, #8 10874 0804 1A92 str r2, [sp, #104] 10875 0806 1B9A ldr r2, [sp, #108] 10876 0808 0133 adds r3, r3, #1 10877 080a 9342 cmp r3, r2 ARM GAS /tmp/ccfbYRip.s page 377 10878 080c 1693 str r3, [sp, #88] 10879 .LVL1096: 10880 080e 7FF644AF bls .L486 10881 0812 0E9B ldr r3, [sp, #56] 10882 .LVL1097: 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 10883 .loc 12 748 0 10884 0814 209A ldr r2, [sp, #128] 10885 0816 1293 str r3, [sp, #72] 10886 .LVL1098: 10887 0818 9200 lsls r2, r2, #2 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10888 .loc 12 653 0 10889 081a 042B cmp r3, #4 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 10890 .loc 12 748 0 10891 081c 2092 str r2, [sp, #128] 10892 .LVL1099: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 10893 .loc 12 653 0 10894 081e 3FF619AF bhi .L487 10895 .LVL1100: 10896 .L483: 10897 0822 149C ldr r4, [sp, #80] 10898 0824 229E ldr r6, [sp, #136] 10899 0826 2034 adds r4, r4, #32 10900 .L488: 10901 .LVL1101: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10902 .loc 12 775 0 10903 0828 54E906E2 ldrd lr, r2, [r4, #-24] 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10904 .loc 12 779 0 10905 082c 54E9045C ldrd r5, ip, [r4, #-16] 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 10906 .loc 12 770 0 10907 0830 54F8201C ldr r1, [r4, #-32] 10908 .LVL1102: 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10909 .loc 12 771 0 10910 0834 54F81C3C ldr r3, [r4, #-28] 10911 .LVL1103: 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10912 .loc 12 783 0 10913 0838 54E90278 ldrd r7, r8, [r4, #-8] 10914 .LVL1104: 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10915 .loc 12 786 0 10916 083c 01EB0E00 add r0, r1, lr 10917 0840 2844 add r0, r0, r5 10918 0842 3844 add r0, r0, r7 10919 .LVL1105: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 10920 .loc 12 795 0 10921 0844 44F8200C str r0, [r4, #-32] 10922 .LVL1106: 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); ARM GAS /tmp/ccfbYRip.s page 378 10923 .loc 12 798 0 10924 0848 A1EB0E00 sub r0, r1, lr 10925 .LVL1107: 10926 084c 2844 add r0, r0, r5 10927 084e C01B subs r0, r0, r7 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 10928 .loc 12 805 0 10929 0850 A1EB0209 sub r9, r1, r2 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 10930 .loc 12 802 0 10931 0854 44F8180C str r0, [r4, #-24] 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 10932 .loc 12 812 0 10933 0858 1144 add r1, r1, r2 10934 .LVL1108: 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10935 .loc 12 789 0 10936 085a 9818 adds r0, r3, r2 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10937 .loc 12 799 0 10938 085c 9A1A subs r2, r3, r2 10939 .LVL1109: 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 10940 .loc 12 812 0 10941 085e 491B subs r1, r1, r5 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 10942 .loc 12 805 0 10943 0860 A9EB0509 sub r9, r9, r5 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10944 .loc 12 789 0 10945 0864 6044 add r0, r0, ip 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10946 .loc 12 799 0 10947 0866 6244 add r2, r2, ip 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 10948 .loc 12 805 0 10949 0868 09EB0805 add r5, r9, r8 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 10950 .loc 12 812 0 10951 086c A1EB0801 sub r1, r1, r8 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10952 .loc 12 789 0 10953 0870 4044 add r0, r0, r8 10954 .LVL1110: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10955 .loc 12 799 0 10956 0872 A2EB0802 sub r2, r2, r8 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10957 .loc 12 806 0 10958 0876 03EB0E08 add r8, r3, lr 10959 .LVL1111: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10960 .loc 12 813 0 10961 087a A3EB0E03 sub r3, r3, lr 10962 .LVL1112: 10963 087e A3EB0C03 sub r3, r3, ip 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 379 10964 .loc 12 806 0 10965 0882 A8EB0C0E sub lr, r8, ip 10966 .LVL1113: 10967 0886 AEEB070E sub lr, lr, r7 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10968 .loc 12 813 0 10969 088a 3B44 add r3, r3, r7 10970 .loc 12 819 0 10971 088c 013E subs r6, r6, #1 10972 .LVL1114: 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 10973 .loc 12 809 0 10974 088e 44F8105C str r5, [r4, #-16] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 10975 .loc 12 816 0 10976 0892 44F8081C str r1, [r4, #-8] 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10977 .loc 12 796 0 10978 0896 44F81C0C str r0, [r4, #-28] 10979 .LVL1115: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10980 .loc 12 803 0 10981 089a 44F8142C str r2, [r4, #-20] 10982 .LVL1116: 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10983 .loc 12 810 0 10984 089e 44F80CEC str lr, [r4, #-12] 10985 .LVL1117: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 10986 .loc 12 817 0 10987 08a2 44F8043C str r3, [r4, #-4] 10988 .LVL1118: 10989 08a6 04F12004 add r4, r4, #32 10990 .LVL1119: 10991 .loc 12 819 0 10992 08aa BDD1 bne .L488 10993 .LVL1120: 10994 .LBE2117: 10995 .LBE2116: 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** n2 = fftLen >> 1U; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** for (i = 0; i < n2; i++) 10996 .loc 11 858 0 10997 08ac 0C9B ldr r3, [sp, #48] 10998 08ae 93B1 cbz r3, .L472 10999 08b0 139A ldr r2, [sp, #76] 11000 08b2 02EB0313 add r3, r2, r3, lsl #4 11001 08b6 259A ldr r2, [sp, #148] 11002 .LVL1121: 11003 .L490: 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p0 = pSrc[4 * i + 0]; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p1 = pSrc[4 * i + 1]; 11004 .loc 11 861 0 discriminator 3 11005 08b8 D2E90054 ldrd r5, r4, [r2] 11006 .LVL1122: 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt = pSrc[4 * i + 2]; ARM GAS /tmp/ccfbYRip.s page 380 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt = pSrc[4 * i + 3]; 11007 .loc 11 863 0 discriminator 3 11008 08bc D2E90201 ldrd r0, r1, [r2, #8] 11009 .LVL1123: 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p0 <<= 1U; 11010 .loc 11 865 0 discriminator 3 11011 08c0 6D00 lsls r5, r5, #1 11012 .LVL1124: 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** p1 <<= 1U; 11013 .loc 11 866 0 discriminator 3 11014 08c2 6400 lsls r4, r4, #1 11015 .LVL1125: 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** xt <<= 1U; 11016 .loc 11 867 0 discriminator 3 11017 08c4 4000 lsls r0, r0, #1 11018 .LVL1126: 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** yt <<= 1U; 11019 .loc 11 868 0 discriminator 3 11020 08c6 4900 lsls r1, r1, #1 11021 .LVL1127: 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 0] = p0; 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 1] = p1; 11022 .loc 11 871 0 discriminator 3 11023 08c8 C2E90054 strd r5, r4, [r2] 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 2] = xt; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** pSrc[4 * i + 3] = yt; 11024 .loc 11 873 0 discriminator 3 11025 08cc C2E90201 strd r0, r1, [r2, #8] 11026 08d0 1032 adds r2, r2, #16 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11027 .loc 11 858 0 discriminator 3 11028 08d2 9A42 cmp r2, r3 11029 08d4 F0D1 bne .L490 11030 .LVL1128: 11031 .L472: 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 11032 .loc 11 875 0 11033 08d6 2BB0 add sp, sp, #172 11034 .LCFI75: 11035 .cfi_def_cfa_offset 36 11036 @ sp needed 11037 08d8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 11038 .cfi_endproc 11039 .LFE165: 11041 .section .text.arm_cfft_q31,"ax",%progbits 11042 .align 1 11043 .p2align 2,,3 11044 .global arm_cfft_q31 11045 .syntax unified 11046 .thumb 11047 .thumb_func 11048 .fpu fpv4-sp-d16 11050 arm_cfft_q31: 11051 .LFB163: ARM GAS /tmp/ccfbYRip.s page 381 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t L = S->fftLen; 11052 .loc 11 705 0 11053 .cfi_startproc 11054 @ args = 0, pretend = 0, frame = 136 11055 @ frame_needed = 0, uses_anonymous_args = 0 11056 .LVL1129: 11057 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 11058 .LCFI76: 11059 .cfi_def_cfa_offset 36 11060 .cfi_offset 4, -36 11061 .cfi_offset 5, -32 11062 .cfi_offset 6, -28 11063 .cfi_offset 7, -24 11064 .cfi_offset 8, -20 11065 .cfi_offset 9, -16 11066 .cfi_offset 10, -12 11067 .cfi_offset 11, -8 11068 .cfi_offset 14, -4 11069 0004 A3B0 sub sp, sp, #140 11070 .LCFI77: 11071 .cfi_def_cfa_offset 176 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11072 .loc 11 708 0 11073 0006 012A cmp r2, #1 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t L = S->fftLen; 11074 .loc 11 705 0 11075 0008 1F93 str r3, [sp, #124] 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 11076 .loc 11 706 0 11077 000a 0388 ldrh r3, [r0] 11078 .LVL1130: 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** uint32_t L = S->fftLen; 11079 .loc 11 705 0 11080 000c 2090 str r0, [sp, #128] 11081 000e 0F91 str r1, [sp, #60] 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 11082 .loc 11 706 0 11083 0010 0E93 str r3, [sp, #56] 11084 .LVL1131: 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11085 .loc 11 708 0 11086 0012 00F04D82 beq .L612 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11087 .loc 11 730 0 11088 0016 B3F5807F cmp r3, #256 11089 001a 20D0 beq .L525 11090 001c 14D8 bhi .L526 11091 001e 202B cmp r3, #32 11092 0020 05D0 beq .L527 11093 0022 40F27284 bls .L613 11094 0026 402B cmp r3, #64 11095 0028 19D0 beq .L525 11096 002a 802B cmp r3, #128 11097 002c 05D1 bne .L512 11098 .L527: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11099 .loc 11 744 0 ARM GAS /tmp/ccfbYRip.s page 382 11100 002e 209B ldr r3, [sp, #128] 11101 .LVL1132: 11102 0030 0E99 ldr r1, [sp, #56] 11103 .LVL1133: 11104 0032 5A68 ldr r2, [r3, #4] 11105 .LVL1134: 11106 0034 0F98 ldr r0, [sp, #60] 11107 .LVL1135: 11108 0036 FFF7FEFF bl arm_cfft_radix4by2_q31 11109 .LVL1136: 11110 .L512: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 11111 .loc 11 749 0 11112 003a 1F9B ldr r3, [sp, #124] 11113 003c 002B cmp r3, #0 11114 003e 40F01182 bne .L614 11115 .L510: 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 11116 .loc 11 751 0 11117 0042 23B0 add sp, sp, #140 11118 .LCFI78: 11119 .cfi_remember_state 11120 .cfi_def_cfa_offset 36 11121 @ sp needed 11122 0044 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 11123 .LVL1137: 11124 .L526: 11125 .LCFI79: 11126 .cfi_restore_state 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11127 .loc 11 730 0 11128 0048 B3F5806F cmp r3, #1024 11129 004c 07D0 beq .L525 11130 004e 40F25684 bls .L615 11131 0052 B3F5006F cmp r3, #2048 11132 0056 EAD0 beq .L527 11133 0058 B3F5805F cmp r3, #4096 11134 005c EDD1 bne .L512 11135 .L525: 11136 .LBB2124: 11137 .LBB2125: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 11138 .loc 12 172 0 11139 005e 9A08 lsrs r2, r3, #2 11140 .LVL1138: 11141 0060 02EB4203 add r3, r2, r2, lsl #1 11142 .LVL1139: 11143 0064 0F98 ldr r0, [sp, #60] 11144 .LVL1140: 11145 0066 0A92 str r2, [sp, #40] 11146 0068 DB00 lsls r3, r3, #3 11147 006a C2EB4271 rsb r1, r2, r2, lsl #29 11148 .LVL1141: 11149 006e 00EB030E add lr, r0, r3 11150 0072 C900 lsls r1, r1, #3 11151 0074 0EEB0104 add r4, lr, r1 11152 0078 D200 lsls r2, r2, #3 ARM GAS /tmp/ccfbYRip.s page 383 11153 007a 1094 str r4, [sp, #64] 11154 007c 0C44 add r4, r4, r1 11155 007e 0C94 str r4, [sp, #48] 11156 0080 0433 adds r3, r3, #4 11157 0082 1444 add r4, r4, r2 11158 0084 04EB0109 add r9, r4, r1 11159 0088 C318 adds r3, r0, r3 11160 .LBE2125: 11161 .LBE2124: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11162 .loc 11 737 0 11163 008a 209D ldr r5, [sp, #128] 11164 008c 0193 str r3, [sp, #4] 11165 008e 09EB0203 add r3, r9, r2 11166 0092 6D68 ldr r5, [r5, #4] 11167 0094 0D93 str r3, [sp, #52] 11168 .LBB2128: 11169 .LBB2126: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11170 .loc 12 174 0 11171 0096 0023 movs r3, #0 11172 0098 0093 str r3, [sp] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 11173 .loc 12 172 0 11174 009a A846 mov r8, r5 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11175 .loc 12 174 0 11176 009c 7346 mov r3, lr 11177 009e 009A ldr r2, [sp] 11178 00a0 0B94 str r4, [sp, #44] 11179 00a2 CE46 mov lr, r9 11180 .LBE2126: 11181 .LBE2128: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11182 .loc 11 737 0 11183 00a4 1E95 str r5, [sp, #120] 11184 .LVL1142: 11185 .LBB2129: 11186 .LBB2127: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 11187 .loc 12 172 0 11188 00a6 4FF0040B mov fp, #4 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11189 .loc 12 174 0 11190 00aa C146 mov r9, r8 11191 00ac 9A46 mov r10, r3 11192 .LVL1143: 11193 .L530: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11194 .loc 12 191 0 11195 00ae 0F9C ldr r4, [sp, #60] 11196 00b0 109B ldr r3, [sp, #64] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11197 .loc 12 196 0 11198 00b2 0199 ldr r1, [sp, #4] 11199 00b4 0C9D ldr r5, [sp, #48] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ ARM GAS /tmp/ccfbYRip.s page 384 11200 .loc 12 191 0 11201 00b6 54F83200 ldr r0, [r4, r2, lsl #3] 11202 00ba 53F83230 ldr r3, [r3, r2, lsl #3] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11203 .loc 12 196 0 11204 00be 51F8041C ldr r1, [r1, #-4] 11205 00c2 55F83250 ldr r5, [r5, r2, lsl #3] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11206 .loc 12 199 0 11207 00c6 54F80B70 ldr r7, [r4, fp] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 11208 .loc 12 204 0 11209 00ca 009A ldr r2, [sp] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11210 .loc 12 199 0 11211 00cc 0B9C ldr r4, [sp, #44] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11212 .loc 12 191 0 11213 00ce 0611 asrs r6, r0, #4 11214 00d0 1B11 asrs r3, r3, #4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11215 .loc 12 196 0 11216 00d2 0811 asrs r0, r1, #4 11217 00d4 00EB2510 add r0, r0, r5, asr #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11218 .loc 12 191 0 11219 00d8 0296 str r6, [sp, #8] 11220 00da 0493 str r3, [sp, #16] 11221 00dc 1E44 add r6, r6, r3 11222 .LVL1144: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 11223 .loc 12 204 0 11224 00de 0F9B ldr r3, [sp, #60] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11225 .loc 12 199 0 11226 00e0 54F80B40 ldr r4, [r4, fp] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 11227 .loc 12 204 0 11228 00e4 3118 adds r1, r6, r0 11229 00e6 43F83210 str r1, [r3, r2, lsl #3] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11230 .loc 12 208 0 11231 00ea DAF80410 ldr r1, [r10, #4] 11232 00ee 5EF80B50 ldr r5, [lr, fp] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11233 .loc 12 199 0 11234 00f2 4FEA241C asr ip, r4, #4 11235 00f6 3F11 asrs r7, r7, #4 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11236 .loc 12 208 0 11237 00f8 0C11 asrs r4, r1, #4 11238 00fa 04EB2514 add r4, r4, r5, asr #4 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11239 .loc 12 199 0 11240 00fe 0697 str r7, [sp, #24] 11241 0100 6744 add r7, r7, ip 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 385 11242 .loc 12 211 0 11243 0102 3919 adds r1, r7, r4 11244 0104 43F80B10 str r1, [r3, fp] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11245 .loc 12 224 0 11246 0108 D9E90051 ldrd r5, r1, [r9] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 11247 .loc 12 217 0 11248 010c DAF80430 ldr r3, [r10, #4] 11249 0110 0893 str r3, [sp, #32] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11250 .loc 12 214 0 11251 0112 3C1B subs r4, r7, r4 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 11252 .loc 12 206 0 11253 0114 301A subs r0, r6, r0 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11254 .loc 12 228 0 11255 0116 84FB0123 smull r2, r3, r4, r1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 11256 .loc 12 227 0 11257 011a 80FB0567 smull r6, r7, r0, r5 11258 .LVL1145: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11259 .loc 12 232 0 11260 011e 80FB0101 smull r0, r1, r0, r1 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 11261 .loc 12 231 0 11262 0122 85FB0445 smull r4, r5, r5, r4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11263 .loc 12 219 0 11264 0126 009A ldr r2, [sp] 11265 0128 019C ldr r4, [sp, #4] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 11266 .loc 12 217 0 11267 012a 5EF80B00 ldr r0, [lr, fp] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 11268 .loc 12 227 0 11269 012e DE19 adds r6, r3, r7 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 11270 .loc 12 231 0 11271 0130 6D1A subs r5, r5, r1 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 11272 .loc 12 217 0 11273 0132 089B ldr r3, [sp, #32] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11274 .loc 12 219 0 11275 0134 54F8041C ldr r1, [r4, #-4] 11276 0138 5EF83240 ldr r4, [lr, r2, lsl #3] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11277 .loc 12 228 0 11278 013c 7600 lsls r6, r6, #1 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11279 .loc 12 232 0 11280 013e 6D00 lsls r5, r5, #1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 11281 .loc 12 227 0 ARM GAS /tmp/ccfbYRip.s page 386 11282 0140 4EF83260 str r6, [lr, r2, lsl #3] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 11283 .loc 12 231 0 11284 0144 4EF80B50 str r5, [lr, fp] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11285 .loc 12 193 0 11286 0148 029E ldr r6, [sp, #8] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11287 .loc 12 201 0 11288 014a 069F ldr r7, [sp, #24] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 11289 .loc 12 217 0 11290 014c 1D11 asrs r5, r3, #4 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11291 .loc 12 193 0 11292 014e 049B ldr r3, [sp, #16] 11293 0150 F31A subs r3, r6, r3 11294 .LVL1146: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 11295 .loc 12 244 0 11296 0152 1E9E ldr r6, [sp, #120] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11297 .loc 12 201 0 11298 0154 A7EB0C0C sub ip, r7, ip 11299 .LVL1147: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 11300 .loc 12 217 0 11301 0158 C5EB2015 rsb r5, r5, r0, asr #4 11302 .LVL1148: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 11303 .loc 12 244 0 11304 015c 56F83270 ldr r7, [r6, r2, lsl #3] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 11305 .loc 12 235 0 11306 0160 0295 str r5, [sp, #8] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11307 .loc 12 219 0 11308 0162 0911 asrs r1, r1, #4 11309 0164 C1EB2411 rsb r1, r1, r4, asr #4 11310 .LVL1149: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 11311 .loc 12 235 0 11312 0168 5D19 adds r5, r3, r5 11313 .LVL1150: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11314 .loc 12 245 0 11315 016a 56F80B40 ldr r4, [r6, fp] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 11316 .loc 12 240 0 11317 016e 0A46 mov r2, r1 11318 0170 ACEB0106 sub r6, ip, r1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 11319 .loc 12 248 0 11320 0174 85FB0701 smull r0, r1, r5, r7 11321 0178 CDE90401 strd r0, [sp, #16] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11322 .loc 12 249 0 ARM GAS /tmp/ccfbYRip.s page 387 11323 017c 86FB0401 smull r0, r1, r6, r4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 11324 .loc 12 252 0 11325 0180 87FB0667 smull r6, r7, r7, r6 11326 0184 CDE90667 strd r6, [sp, #24] 11327 0188 079E ldr r6, [sp, #28] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 11328 .loc 12 248 0 11329 018a 059F ldr r7, [sp, #20] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11330 .loc 12 253 0 11331 018c 85FB0445 smull r4, r5, r5, r4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 11332 .loc 12 252 0 11333 0190 701B subs r0, r6, r5 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 11334 .loc 12 248 0 11335 0192 009C ldr r4, [sp] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11336 .loc 12 237 0 11337 0194 029D ldr r5, [sp, #8] 11338 .LVL1151: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 11339 .loc 12 248 0 11340 0196 3944 add r1, r1, r7 11341 .LVL1152: 11342 0198 0D9F ldr r7, [sp, #52] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11343 .loc 12 249 0 11344 019a 4900 lsls r1, r1, #1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11345 .loc 12 253 0 11346 019c 4000 lsls r0, r0, #1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 11347 .loc 12 248 0 11348 019e 47F83410 str r1, [r7, r4, lsl #3] 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 11349 .loc 12 252 0 11350 01a2 47F80B00 str r0, [r7, fp] 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11351 .loc 12 258 0 11352 01a6 D8E90040 ldrd r4, r0, [r8] 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11353 .loc 12 242 0 11354 01aa 9444 add ip, ip, r2 11355 .LVL1153: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11356 .loc 12 262 0 11357 01ac 8CFB0012 smull r1, r2, ip, r0 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11358 .loc 12 237 0 11359 01b0 5B1B subs r3, r3, r5 11360 .LVL1154: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11361 .loc 12 262 0 11362 01b2 CDE90212 strd r1, [sp, #8] 11363 .LVL1155: ARM GAS /tmp/ccfbYRip.s page 388 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 11364 .loc 12 261 0 11365 01b6 83FB0467 smull r6, r7, r3, r4 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11366 .loc 12 266 0 11367 01ba 83FB0001 smull r0, r1, r3, r0 11368 .LVL1156: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 11369 .loc 12 261 0 11370 01be 039B ldr r3, [sp, #12] 11371 .LVL1157: 11372 01c0 0198 ldr r0, [sp, #4] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11373 .loc 12 269 0 11374 01c2 009A ldr r2, [sp] 11375 .LVL1158: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 11376 .loc 12 261 0 11377 01c4 3B44 add r3, r3, r7 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11378 .loc 12 262 0 11379 01c6 5B00 lsls r3, r3, #1 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 11380 .loc 12 261 0 11381 01c8 40F8043C str r3, [r0, #-4] 11382 .LVL1159: 11383 01cc 00F10803 add r3, r0, #8 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 11384 .loc 12 265 0 11385 01d0 84FB0C45 smull r4, r5, r4, ip 11386 .LVL1160: 11387 01d4 0193 str r3, [sp, #4] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11388 .loc 12 274 0 11389 01d6 0A9B ldr r3, [sp, #40] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11390 .loc 12 269 0 11391 01d8 0132 adds r2, r2, #1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 11392 .loc 12 265 0 11393 01da 691A subs r1, r5, r1 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11394 .loc 12 266 0 11395 01dc 4900 lsls r1, r1, #1 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11396 .loc 12 274 0 11397 01de 9342 cmp r3, r2 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 11398 .loc 12 265 0 11399 01e0 CAF80410 str r1, [r10, #4] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11400 .loc 12 269 0 11401 01e4 0092 str r2, [sp] 11402 .LVL1161: 11403 01e6 09F11009 add r9, r9, #16 11404 01ea 0BF1080B add fp, fp, #8 11405 01ee 08F11808 add r8, r8, #24 ARM GAS /tmp/ccfbYRip.s page 389 11406 01f2 0AF1080A add r10, r10, #8 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11407 .loc 12 274 0 11408 01f6 7FF45AAF bne .L530 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11409 .loc 12 289 0 11410 01fa 042A cmp r2, #4 11411 01fc 2192 str r2, [sp, #132] 11412 .LVL1162: 11413 01fe 40F2EA80 bls .L531 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11414 .loc 12 286 0 11415 0202 0423 movs r3, #4 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11416 .loc 12 289 0 11417 0204 1192 str r2, [sp, #68] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11418 .loc 12 286 0 11419 0206 1D93 str r3, [sp, #116] 11420 .LVL1163: 11421 .L535: 11422 0208 1D9D ldr r5, [sp, #116] 11423 020a 0F9B ldr r3, [sp, #60] 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 11424 .loc 12 293 0 11425 020c 119F ldr r7, [sp, #68] 11426 020e 1A46 mov r2, r3 11427 0210 05EB4503 add r3, r5, r5, lsl #1 11428 0214 DB00 lsls r3, r3, #3 11429 0216 1B93 str r3, [sp, #108] 11430 0218 EB00 lsls r3, r5, #3 11431 021a 1A93 str r3, [sp, #104] 11432 021c 2B01 lsls r3, r5, #4 11433 021e 1993 str r3, [sp, #100] 11434 0220 FB00 lsls r3, r7, #3 11435 0222 BC08 lsrs r4, r7, #2 11436 0224 1293 str r3, [sp, #72] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11437 .loc 12 297 0 11438 0226 1E9B ldr r3, [sp, #120] 11439 0228 1693 str r3, [sp, #88] 11440 022a 02EBC400 add r0, r2, r4, lsl #3 11441 022e 2101 lsls r1, r4, #4 11442 0230 C4EB4472 rsb r2, r4, r4, lsl #29 11443 0234 D600 lsls r6, r2, #3 11444 0236 0430 adds r0, r0, #4 11445 0238 0439 subs r1, r1, #4 11446 023a 621E subs r2, r4, #1 11447 023c CDE91433 strd r3, r3, [sp, #80] 11448 0240 0023 movs r3, #0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 11449 .loc 12 293 0 11450 0242 0B94 str r4, [sp, #44] 11451 .LVL1164: 11452 0244 1790 str r0, [sp, #92] 11453 0246 1C91 str r1, [sp, #112] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 390 11454 .loc 12 297 0 11455 0248 1892 str r2, [sp, #96] 11456 024a 1393 str r3, [sp, #76] 11457 024c 0196 str r6, [sp, #4] 11458 .LVL1165: 11459 .L534: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 11460 .loc 12 302 0 11461 024e 169B ldr r3, [sp, #88] 11462 0250 1A68 ldr r2, [r3] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 11463 .loc 12 303 0 11464 0252 5B68 ldr r3, [r3, #4] 11465 0254 0493 str r3, [sp, #16] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 11466 .loc 12 304 0 11467 0256 159B ldr r3, [sp, #84] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 11468 .loc 12 302 0 11469 0258 0292 str r2, [sp, #8] 11470 .LVL1166: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 11471 .loc 12 304 0 11472 025a 1A68 ldr r2, [r3] 11473 .LVL1167: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 11474 .loc 12 305 0 11475 025c 5B68 ldr r3, [r3, #4] 11476 025e 0693 str r3, [sp, #24] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 11477 .loc 12 306 0 11478 0260 149B ldr r3, [sp, #80] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 11479 .loc 12 304 0 11480 0262 1092 str r2, [sp, #64] 11481 .LVL1168: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 11482 .loc 12 306 0 11483 0264 1A68 ldr r2, [r3] 11484 .LVL1169: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 11485 .loc 12 307 0 11486 0266 5B68 ldr r3, [r3, #4] 11487 0268 0A93 str r3, [sp, #40] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11488 .loc 12 311 0 11489 026a 0E9B ldr r3, [sp, #56] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 11490 .loc 12 306 0 11491 026c 0892 str r2, [sp, #32] 11492 .LVL1170: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11493 .loc 12 311 0 11494 026e 1946 mov r1, r3 11495 0270 139B ldr r3, [sp, #76] 11496 0272 9942 cmp r1, r3 11497 0274 40F29180 bls .L532 ARM GAS /tmp/ccfbYRip.s page 391 11498 0278 1C9A ldr r2, [sp, #112] 11499 .LVL1171: 11500 027a 0093 str r3, [sp] 11501 027c 1046 mov r0, r2 11502 027e 179A ldr r2, [sp, #92] 11503 0280 00EB020A add r10, r0, r2 11504 0284 9346 mov fp, r2 11505 .LVL1172: 11506 .L533: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11507 .loc 12 321 0 11508 0286 0F9F ldr r7, [sp, #60] 11509 0288 009C ldr r4, [sp] 11510 028a 0199 ldr r1, [sp, #4] 11511 028c 57F83450 ldr r5, [r7, r4, lsl #3] 11512 0290 5AF80160 ldr r6, [r10, r1] 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11513 .loc 12 331 0 11514 0294 5BF8042C ldr r2, [fp, #-4] 11515 0298 DAF80030 ldr r3, [r10] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11516 .loc 12 326 0 11517 029c 5BF80180 ldr r8, [fp, r1] 11518 02a0 0B99 ldr r1, [sp, #44] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11519 .loc 12 321 0 11520 02a2 05EB060E add lr, r5, r6 11521 .LVL1173: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11522 .loc 12 331 0 11523 02a6 1344 add r3, r3, r2 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 11524 .loc 12 334 0 11525 02a8 0EEB0302 add r2, lr, r3 11526 02ac BC46 mov ip, r7 11527 02ae 9210 asrs r2, r2, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11528 .loc 12 326 0 11529 02b0 5BF83100 ldr r0, [fp, r1, lsl #3] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 11530 .loc 12 334 0 11531 02b4 4CF83420 str r2, [ip, r4, lsl #3] 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 11532 .loc 12 339 0 11533 02b8 DBF80010 ldr r1, [fp] 11534 02bc DAF80420 ldr r2, [r10, #4] 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11535 .loc 12 341 0 11536 02c0 019C ldr r4, [sp, #4] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 11537 .loc 12 326 0 11538 02c2 08EB0007 add r7, r8, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 11539 .loc 12 339 0 11540 02c6 0A44 add r2, r2, r1 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11541 .loc 12 341 0 ARM GAS /tmp/ccfbYRip.s page 392 11542 02c8 B918 adds r1, r7, r2 11543 02ca 8910 asrs r1, r1, #2 11544 02cc 4BF80410 str r1, [fp, r4] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11545 .loc 12 323 0 11546 02d0 AE1B subs r6, r5, r6 11547 .LVL1174: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11548 .loc 12 328 0 11549 02d2 A8EB0009 sub r9, r8, r0 11550 .LVL1175: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 11551 .loc 12 347 0 11552 02d6 DBF80050 ldr r5, [fp] 11553 02da DAF80400 ldr r0, [r10, #4] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11554 .loc 12 349 0 11555 02de 5BF8041C ldr r1, [fp, #-4] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 11556 .loc 12 347 0 11557 02e2 A5EB0008 sub r8, r5, r0 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11558 .loc 12 349 0 11559 02e6 DAF80050 ldr r5, [r10] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 11560 .loc 12 360 0 11561 02ea 06EB080C add ip, r6, r8 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11562 .loc 12 349 0 11563 02ee 491B subs r1, r1, r5 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11564 .loc 12 362 0 11565 02f0 A6EB0808 sub r8, r6, r8 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 11566 .loc 12 370 0 11567 02f4 029D ldr r5, [sp, #8] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11568 .loc 12 371 0 11569 02f6 049E ldr r6, [sp, #16] 11570 .LVL1176: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11571 .loc 12 336 0 11572 02f8 AEEB0303 sub r3, lr, r3 11573 .LVL1177: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 11574 .loc 12 365 0 11575 02fc A9EB010E sub lr, r9, r1 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11576 .loc 12 344 0 11577 0300 BA1A subs r2, r7, r2 11578 .LVL1178: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 11579 .loc 12 370 0 11580 0302 8CFB0545 smull r4, r5, ip, r5 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11581 .loc 12 371 0 11582 0306 8EFB0667 smull r6, r7, lr, r6 ARM GAS /tmp/ccfbYRip.s page 393 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 11583 .loc 12 370 0 11584 030a 7E19 adds r6, r7, r5 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11585 .loc 12 367 0 11586 030c 8944 add r9, r9, r1 11587 .LVL1179: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 11588 .loc 12 370 0 11589 030e 0D96 str r6, [sp, #52] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11590 .loc 12 353 0 11591 0310 0699 ldr r1, [sp, #24] 11592 .LVL1180: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 11593 .loc 12 352 0 11594 0312 109E ldr r6, [sp, #64] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11595 .loc 12 353 0 11596 0314 82FB0101 smull r0, r1, r2, r1 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 11597 .loc 12 352 0 11598 0318 83FB0645 smull r4, r5, r3, r6 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 11599 .loc 12 356 0 11600 031c 82FB0667 smull r6, r7, r2, r6 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 11601 .loc 12 352 0 11602 0320 4A19 adds r2, r1, r5 11603 0322 0C92 str r2, [sp, #48] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11604 .loc 12 357 0 11605 0324 069A ldr r2, [sp, #24] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 11606 .loc 12 374 0 11607 0326 029D ldr r5, [sp, #8] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11608 .loc 12 375 0 11609 0328 0498 ldr r0, [sp, #16] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 11610 .loc 12 383 0 11611 032a 0A9E ldr r6, [sp, #40] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11612 .loc 12 357 0 11613 032c 1146 mov r1, r2 11614 032e 83FB0123 smull r2, r3, r3, r1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 11615 .loc 12 374 0 11616 0332 8EFB0545 smull r4, r5, lr, r5 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11617 .loc 12 375 0 11618 0336 8CFB0001 smull r0, r1, ip, r0 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 11619 .loc 12 374 0 11620 033a A5EB010E sub lr, r5, r1 11621 .LVL1181: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 394 11622 .loc 12 356 0 11623 033e A7EB030C sub ip, r7, r3 11624 .LVL1182: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11625 .loc 12 379 0 11626 0342 0A98 ldr r0, [sp, #40] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 11627 .loc 12 378 0 11628 0344 089B ldr r3, [sp, #32] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 11629 .loc 12 382 0 11630 0346 089D ldr r5, [sp, #32] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 11631 .loc 12 383 0 11632 0348 88FB0667 smull r6, r7, r8, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11633 .loc 12 379 0 11634 034c 89FB0001 smull r0, r1, r9, r0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 11635 .loc 12 382 0 11636 0350 89FB0545 smull r4, r5, r9, r5 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 11637 .loc 12 378 0 11638 0354 88FB0323 smull r2, r3, r8, r3 11639 0358 0B44 add r3, r3, r1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 11640 .loc 12 382 0 11641 035a E91B subs r1, r5, r7 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11642 .loc 12 311 0 11643 035c 009F ldr r7, [sp] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11644 .loc 12 371 0 11645 035e 0D9A ldr r2, [sp, #52] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11646 .loc 12 311 0 11647 0360 119D ldr r5, [sp, #68] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11648 .loc 12 371 0 11649 0362 5010 asrs r0, r2, #1 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11650 .loc 12 353 0 11651 0364 0C9A ldr r2, [sp, #48] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11652 .loc 12 311 0 11653 0366 7E19 adds r6, r7, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11654 .loc 12 353 0 11655 0368 5410 asrs r4, r2, #1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11656 .loc 12 357 0 11657 036a 4FEA6C05 asr r5, ip, #1 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 11658 .loc 12 356 0 11659 036e 4BE90145 strd r4, r5, [fp, #-4] 11660 .LVL1183: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 395 11661 .loc 12 370 0 11662 0372 019C ldr r4, [sp, #4] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11663 .loc 12 311 0 11664 0374 0096 str r6, [sp] 11665 .LVL1184: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 11666 .loc 12 370 0 11667 0376 4AF80400 str r0, [r10, r4] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 11668 .loc 12 374 0 11669 037a 0B98 ldr r0, [sp, #44] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11670 .loc 12 375 0 11671 037c 4FEA6E02 asr r2, lr, #1 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11672 .loc 12 379 0 11673 0380 5B10 asrs r3, r3, #1 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 11674 .loc 12 383 0 11675 0382 4910 asrs r1, r1, #1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 11676 .loc 12 374 0 11677 0384 4BF83020 str r2, [fp, r0, lsl #3] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 11678 .loc 12 382 0 11679 0388 CAE90031 strd r3, r1, [r10] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11680 .loc 12 311 0 11681 038c 0E9B ldr r3, [sp, #56] 11682 038e 129A ldr r2, [sp, #72] 11683 0390 B342 cmp r3, r6 11684 0392 9344 add fp, fp, r2 11685 0394 9244 add r10, r10, r2 11686 0396 3FF676AF bhi .L533 11687 .LVL1185: 11688 .L532: 11689 039a 169A ldr r2, [sp, #88] 11690 039c 1A99 ldr r1, [sp, #104] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11691 .loc 12 297 0 11692 039e 139B ldr r3, [sp, #76] 11693 03a0 0A44 add r2, r2, r1 11694 03a2 1692 str r2, [sp, #88] 11695 03a4 1999 ldr r1, [sp, #100] 11696 03a6 159A ldr r2, [sp, #84] 11697 03a8 0A44 add r2, r2, r1 11698 03aa 1592 str r2, [sp, #84] 11699 03ac 1B99 ldr r1, [sp, #108] 11700 03ae 149A ldr r2, [sp, #80] 11701 03b0 0A44 add r2, r2, r1 11702 03b2 1492 str r2, [sp, #80] 11703 03b4 179A ldr r2, [sp, #92] 11704 03b6 0832 adds r2, r2, #8 11705 03b8 1792 str r2, [sp, #92] 11706 03ba 189A ldr r2, [sp, #96] 11707 03bc 0133 adds r3, r3, #1 ARM GAS /tmp/ccfbYRip.s page 396 11708 03be 9342 cmp r3, r2 11709 03c0 1393 str r3, [sp, #76] 11710 .LVL1186: 11711 03c2 7FF644AF bls .L534 11712 03c6 0B9B ldr r3, [sp, #44] 11713 .LVL1187: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 11714 .loc 12 386 0 11715 03c8 1D9A ldr r2, [sp, #116] 11716 03ca 1193 str r3, [sp, #68] 11717 .LVL1188: 11718 03cc 9200 lsls r2, r2, #2 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11719 .loc 12 289 0 11720 03ce 042B cmp r3, #4 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 11721 .loc 12 386 0 11722 03d0 1D92 str r2, [sp, #116] 11723 .LVL1189: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 11724 .loc 12 289 0 11725 03d2 3FF619AF bhi .L535 11726 .LVL1190: 11727 .L531: 11728 03d6 0F9B ldr r3, [sp, #60] 11729 03d8 219E ldr r6, [sp, #132] 11730 03da 03F12004 add r4, r3, #32 11731 .L536: 11732 .LVL1191: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11733 .loc 12 411 0 11734 03de 54E906E2 ldrd lr, r2, [r4, #-24] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11735 .loc 12 415 0 11736 03e2 54E9045C ldrd r5, ip, [r4, #-16] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 11737 .loc 12 406 0 11738 03e6 54F8201C ldr r1, [r4, #-32] 11739 .LVL1192: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11740 .loc 12 407 0 11741 03ea 54F81C3C ldr r3, [r4, #-28] 11742 .LVL1193: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11743 .loc 12 419 0 11744 03ee 54E90278 ldrd r7, r8, [r4, #-8] 11745 .LVL1194: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11746 .loc 12 422 0 11747 03f2 01EB0E00 add r0, r1, lr 11748 03f6 2844 add r0, r0, r5 11749 03f8 3844 add r0, r0, r7 11750 .LVL1195: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 11751 .loc 12 431 0 11752 03fa 44F8200C str r0, [r4, #-32] 11753 .LVL1196: ARM GAS /tmp/ccfbYRip.s page 397 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 11754 .loc 12 434 0 11755 03fe A1EB0E00 sub r0, r1, lr 11756 .LVL1197: 11757 0402 2844 add r0, r0, r5 11758 0404 C01B subs r0, r0, r7 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 11759 .loc 12 441 0 11760 0406 01EB0209 add r9, r1, r2 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 11761 .loc 12 438 0 11762 040a 44F8180C str r0, [r4, #-24] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 11763 .loc 12 448 0 11764 040e 891A subs r1, r1, r2 11765 .LVL1198: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11766 .loc 12 425 0 11767 0410 9818 adds r0, r3, r2 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11768 .loc 12 435 0 11769 0412 9A1A subs r2, r3, r2 11770 .LVL1199: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 11771 .loc 12 448 0 11772 0414 491B subs r1, r1, r5 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 11773 .loc 12 441 0 11774 0416 A9EB0509 sub r9, r9, r5 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11775 .loc 12 425 0 11776 041a 6044 add r0, r0, ip 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11777 .loc 12 435 0 11778 041c 6244 add r2, r2, ip 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 11779 .loc 12 441 0 11780 041e A9EB0805 sub r5, r9, r8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 11781 .loc 12 448 0 11782 0422 4144 add r1, r1, r8 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11783 .loc 12 425 0 11784 0424 4044 add r0, r0, r8 11785 .LVL1200: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11786 .loc 12 435 0 11787 0426 A2EB0802 sub r2, r2, r8 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11788 .loc 12 442 0 11789 042a A3EB0E08 sub r8, r3, lr 11790 .LVL1201: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11791 .loc 12 449 0 11792 042e 7344 add r3, r3, lr 11793 .LVL1202: 11794 0430 A3EB0C03 sub r3, r3, ip ARM GAS /tmp/ccfbYRip.s page 398 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11795 .loc 12 442 0 11796 0434 A8EB0C0E sub lr, r8, ip 11797 .LVL1203: 11798 0438 BE44 add lr, lr, r7 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11799 .loc 12 449 0 11800 043a DB1B subs r3, r3, r7 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11801 .loc 12 456 0 11802 043c 013E subs r6, r6, #1 11803 .LVL1204: 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 11804 .loc 12 445 0 11805 043e 44F8105C str r5, [r4, #-16] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 11806 .loc 12 452 0 11807 0442 44F8081C str r1, [r4, #-8] 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11808 .loc 12 432 0 11809 0446 44F81C0C str r0, [r4, #-28] 11810 .LVL1205: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11811 .loc 12 439 0 11812 044a 44F8142C str r2, [r4, #-20] 11813 .LVL1206: 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11814 .loc 12 446 0 11815 044e 44F80CEC str lr, [r4, #-12] 11816 .LVL1207: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11817 .loc 12 453 0 11818 0452 44F8043C str r3, [r4, #-4] 11819 .LVL1208: 11820 0456 04F12004 add r4, r4, #32 11821 .LVL1209: 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11822 .loc 12 456 0 11823 045a C0D1 bne .L536 11824 .LBE2127: 11825 .LBE2129: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 11826 .loc 11 749 0 11827 045c 1F9B ldr r3, [sp, #124] 11828 045e 002B cmp r3, #0 11829 0460 3FF4EFAD beq .L510 11830 .LVL1210: 11831 .L614: 11832 .LBB2130: 11833 .LBB2131: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 11834 .loc 8 82 0 11835 0464 209A ldr r2, [sp, #128] 11836 0466 9389 ldrh r3, [r2, #12] 11837 .LBE2131: 11838 .LBE2130: 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } ARM GAS /tmp/ccfbYRip.s page 399 11839 .loc 11 750 0 11840 0468 9168 ldr r1, [r2, #8] 11841 .LVL1211: 11842 .LBB2133: 11843 .LBB2132: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 11844 .loc 8 82 0 11845 046a 002B cmp r3, #0 11846 046c 3FF4E9AD beq .L510 11847 0470 013B subs r3, r3, #1 11848 0472 5B08 lsrs r3, r3, #1 11849 0474 0D1D adds r5, r1, #4 11850 0476 0F9A ldr r2, [sp, #60] 11851 .LVL1212: 11852 0478 05EB8305 add r5, r5, r3, lsl #2 11853 .LVL1213: 11854 .L539: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 11855 .loc 8 85 0 11856 047c 4888 ldrh r0, [r1, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 11857 .loc 8 84 0 11858 047e 0B88 ldrh r3, [r1] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 11859 .loc 8 85 0 11860 0480 8008 lsrs r0, r0, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 11861 .loc 8 84 0 11862 0482 9B08 lsrs r3, r3, #2 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 11863 .loc 8 89 0 11864 0484 52F82040 ldr r4, [r2, r0, lsl #2] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 11865 .loc 8 88 0 11866 0488 52F82360 ldr r6, [r2, r3, lsl #2] 11867 .LVL1214: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 11868 .loc 8 89 0 11869 048c 42F82340 str r4, [r2, r3, lsl #2] 11870 .LVL1215: 11871 0490 8400 lsls r4, r0, #2 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 11872 .loc 8 88 0 11873 0492 9B00 lsls r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 11874 .loc 8 90 0 11875 0494 42F82060 str r6, [r2, r0, lsl #2] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 11876 .loc 8 93 0 11877 0498 0433 adds r3, r3, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 11878 .loc 8 94 0 11879 049a 201D adds r0, r4, #4 11880 049c 0431 adds r1, r1, #4 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 11881 .loc 8 93 0 11882 049e D458 ldr r4, [r2, r3] ARM GAS /tmp/ccfbYRip.s page 400 11883 .LVL1216: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 11884 .loc 8 94 0 11885 04a0 1658 ldr r6, [r2, r0] 11886 04a2 D650 str r6, [r2, r3] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 11887 .loc 8 82 0 11888 04a4 A942 cmp r1, r5 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 11889 .loc 8 95 0 11890 04a6 1450 str r4, [r2, r0] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 11891 .loc 8 82 0 11892 04a8 E8D1 bne .L539 11893 .LBE2132: 11894 .LBE2133: 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 11895 .loc 11 751 0 11896 04aa 23B0 add sp, sp, #140 11897 .LCFI80: 11898 .cfi_remember_state 11899 .cfi_def_cfa_offset 36 11900 @ sp needed 11901 04ac BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 11902 .LVL1217: 11903 .L612: 11904 .LCFI81: 11905 .cfi_restore_state 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11906 .loc 11 710 0 11907 04b0 B3F5807F cmp r3, #256 11908 04b4 1CD0 beq .L513 11909 04b6 0FD8 bhi .L514 11910 04b8 202B cmp r3, #32 11911 04ba 06D0 beq .L515 11912 04bc 40F23082 bls .L616 11913 04c0 402B cmp r3, #64 11914 04c2 15D0 beq .L513 11915 04c4 802B cmp r3, #128 11916 04c6 7FF4B8AD bne .L512 11917 .L515: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11918 .loc 11 724 0 11919 04ca 209B ldr r3, [sp, #128] 11920 .LVL1218: 11921 04cc 0E99 ldr r1, [sp, #56] 11922 .LVL1219: 11923 04ce 5A68 ldr r2, [r3, #4] 11924 .LVL1220: 11925 04d0 0F98 ldr r0, [sp, #60] 11926 .LVL1221: 11927 04d2 FFF7FEFF bl arm_cfft_radix4by2_inverse_q31 11928 .LVL1222: 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 11929 .loc 11 725 0 11930 04d6 B0E5 b .L512 11931 .LVL1223: ARM GAS /tmp/ccfbYRip.s page 401 11932 .L514: 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 11933 .loc 11 710 0 11934 04d8 B3F5806F cmp r3, #1024 11935 04dc 08D0 beq .L513 11936 04de 40F21982 bls .L617 11937 04e2 B3F5006F cmp r3, #2048 11938 04e6 F0D0 beq .L515 11939 04e8 B3F5805F cmp r3, #4096 11940 04ec 7FF4A5AD bne .L512 11941 .L513: 11942 .LBB2134: 11943 .LBB2135: 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 11944 .loc 12 542 0 11945 04f0 9A08 lsrs r2, r3, #2 11946 .LVL1224: 11947 04f2 02EB4203 add r3, r2, r2, lsl #1 11948 .LVL1225: 11949 04f6 0F98 ldr r0, [sp, #60] 11950 .LVL1226: 11951 04f8 0A92 str r2, [sp, #40] 11952 04fa DB00 lsls r3, r3, #3 11953 04fc C2EB4271 rsb r1, r2, r2, lsl #29 11954 .LVL1227: 11955 0500 00EB030E add lr, r0, r3 11956 0504 C900 lsls r1, r1, #3 11957 0506 0EEB0104 add r4, lr, r1 11958 050a D200 lsls r2, r2, #3 11959 050c 1094 str r4, [sp, #64] 11960 050e 0C44 add r4, r4, r1 11961 0510 0C94 str r4, [sp, #48] 11962 .LBE2135: 11963 .LBE2134: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11964 .loc 11 717 0 11965 0512 209D ldr r5, [sp, #128] 11966 0514 1444 add r4, r4, r2 11967 0516 0433 adds r3, r3, #4 11968 0518 04EB0109 add r9, r4, r1 11969 051c C318 adds r3, r0, r3 11970 051e 6D68 ldr r5, [r5, #4] 11971 0520 0193 str r3, [sp, #4] 11972 0522 09EB0203 add r3, r9, r2 11973 0526 0D93 str r3, [sp, #52] 11974 .LBB2138: 11975 .LBB2136: 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11976 .loc 12 544 0 11977 0528 0023 movs r3, #0 11978 052a CC46 mov ip, r9 11979 052c 0B94 str r4, [sp, #44] 11980 052e F146 mov r9, lr 11981 .LBE2136: 11982 .LBE2138: 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 11983 .loc 11 717 0 ARM GAS /tmp/ccfbYRip.s page 402 11984 0530 1E95 str r5, [sp, #120] 11985 .LVL1228: 11986 .LBB2139: 11987 .LBB2137: 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 11988 .loc 12 542 0 11989 0532 A846 mov r8, r5 11990 0534 4FF0040B mov fp, #4 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 11991 .loc 12 544 0 11992 0538 0093 str r3, [sp] 11993 053a AE46 mov lr, r5 11994 .LVL1229: 11995 .L518: 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 11996 .loc 12 560 0 11997 053c 009B ldr r3, [sp] 11998 053e 1099 ldr r1, [sp, #64] 11999 0540 0F9A ldr r2, [sp, #60] 12000 0542 51F83300 ldr r0, [r1, r3, lsl #3] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12001 .loc 12 565 0 12002 0546 0199 ldr r1, [sp, #4] 12003 0548 0C9C ldr r4, [sp, #48] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12004 .loc 12 560 0 12005 054a 52F83350 ldr r5, [r2, r3, lsl #3] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12006 .loc 12 565 0 12007 054e 51F8041C ldr r1, [r1, #-4] 12008 0552 54F83340 ldr r4, [r4, r3, lsl #3] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12009 .loc 12 568 0 12010 0556 52F80B70 ldr r7, [r2, fp] 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 12011 .loc 12 573 0 12012 055a 0F9B ldr r3, [sp, #60] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12013 .loc 12 568 0 12014 055c 0B9A ldr r2, [sp, #44] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12015 .loc 12 560 0 12016 055e 4FEA251A asr r10, r5, #4 12017 0562 0511 asrs r5, r0, #4 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12018 .loc 12 565 0 12019 0564 0811 asrs r0, r1, #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12020 .loc 12 560 0 12021 0566 0AEB0506 add r6, r10, r5 12022 .LVL1230: 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12023 .loc 12 565 0 12024 056a 00EB2410 add r0, r0, r4, asr #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12025 .loc 12 560 0 12026 056e 0295 str r5, [sp, #8] ARM GAS /tmp/ccfbYRip.s page 403 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 12027 .loc 12 573 0 12028 0570 009D ldr r5, [sp] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12029 .loc 12 568 0 12030 0572 52F80B20 ldr r2, [r2, fp] 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 12031 .loc 12 573 0 12032 0576 3118 adds r1, r6, r0 12033 0578 43F83510 str r1, [r3, r5, lsl #3] 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 12034 .loc 12 577 0 12035 057c D9F80410 ldr r1, [r9, #4] 12036 0580 5CF80B50 ldr r5, [ip, fp] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12037 .loc 12 568 0 12038 0584 3F11 asrs r7, r7, #4 12039 0586 1211 asrs r2, r2, #4 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 12040 .loc 12 577 0 12041 0588 0C11 asrs r4, r1, #4 12042 058a 04EB2514 add r4, r4, r5, asr #4 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12043 .loc 12 568 0 12044 058e 0497 str r7, [sp, #16] 12045 0590 1744 add r7, r7, r2 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12046 .loc 12 579 0 12047 0592 3919 adds r1, r7, r4 12048 0594 43F80B10 str r1, [r3, fp] 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12049 .loc 12 592 0 12050 0598 D8E90051 ldrd r5, r1, [r8] 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 12051 .loc 12 575 0 12052 059c 301A subs r0, r6, r0 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12053 .loc 12 582 0 12054 059e 3C1B subs r4, r7, r4 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 12055 .loc 12 595 0 12056 05a0 80FB0567 smull r6, r7, r0, r5 12057 .LVL1231: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 12058 .loc 12 585 0 12059 05a4 D9F80430 ldr r3, [r9, #4] 12060 05a8 0693 str r3, [sp, #24] 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 12061 .loc 12 595 0 12062 05aa CDE90867 strd r6, [sp, #32] 12063 05ae 099B ldr r3, [sp, #36] 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12064 .loc 12 596 0 12065 05b0 84FB0167 smull r6, r7, r4, r1 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12066 .loc 12 600 0 12067 05b4 80FB0101 smull r0, r1, r0, r1 ARM GAS /tmp/ccfbYRip.s page 404 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 12068 .loc 12 599 0 12069 05b8 85FB0445 smull r4, r5, r5, r4 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 12070 .loc 12 595 0 12071 05bc DE1B subs r6, r3, r7 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12072 .loc 12 587 0 12073 05be 019C ldr r4, [sp, #4] 12074 05c0 009B ldr r3, [sp] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 12075 .loc 12 585 0 12076 05c2 5CF80B00 ldr r0, [ip, fp] 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 12077 .loc 12 599 0 12078 05c6 0D44 add r5, r5, r1 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12079 .loc 12 596 0 12080 05c8 7600 lsls r6, r6, #1 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12081 .loc 12 600 0 12082 05ca 6D00 lsls r5, r5, #1 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12083 .loc 12 587 0 12084 05cc 54F8041C ldr r1, [r4, #-4] 12085 05d0 5CF83340 ldr r4, [ip, r3, lsl #3] 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 12086 .loc 12 595 0 12087 05d4 4CF83360 str r6, [ip, r3, lsl #3] 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 12088 .loc 12 599 0 12089 05d8 4CF80B50 str r5, [ip, fp] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12090 .loc 12 562 0 12091 05dc 029E ldr r6, [sp, #8] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 12092 .loc 12 585 0 12093 05de 069B ldr r3, [sp, #24] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12094 .loc 12 562 0 12095 05e0 AAEB0607 sub r7, r10, r6 12096 .LVL1232: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12097 .loc 12 570 0 12098 05e4 049E ldr r6, [sp, #16] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12099 .loc 12 587 0 12100 05e6 0911 asrs r1, r1, #4 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12101 .loc 12 570 0 12102 05e8 B21A subs r2, r6, r2 12103 .LVL1233: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 12104 .loc 12 585 0 12105 05ea 1D11 asrs r5, r3, #4 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12106 .loc 12 587 0 ARM GAS /tmp/ccfbYRip.s page 405 12107 05ec C1EB2416 rsb r6, r1, r4, asr #4 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12108 .loc 12 570 0 12109 05f0 1346 mov r3, r2 12110 .LVL1234: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 12111 .loc 12 612 0 12112 05f2 1E99 ldr r1, [sp, #120] 12113 05f4 009A ldr r2, [sp] 12114 .LVL1235: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12115 .loc 12 613 0 12116 05f6 51F80B40 ldr r4, [r1, fp] 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 12117 .loc 12 608 0 12118 05fa 0293 str r3, [sp, #8] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 12119 .loc 12 585 0 12120 05fc C5EB201A rsb r10, r5, r0, asr #4 12121 .LVL1236: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 12122 .loc 12 612 0 12123 0600 51F83200 ldr r0, [r1, r2, lsl #3] 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 12124 .loc 12 603 0 12125 0604 A7EB0A05 sub r5, r7, r10 12126 .LVL1237: 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 12127 .loc 12 608 0 12128 0608 9919 adds r1, r3, r6 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 12129 .loc 12 616 0 12130 060a 85FB0023 smull r2, r3, r5, r0 12131 060e CDE90423 strd r2, [sp, #16] 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12132 .loc 12 617 0 12133 0612 81FB0423 smull r2, r3, r1, r4 12134 0616 CDE90623 strd r2, [sp, #24] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 12135 .loc 12 616 0 12136 061a 079A ldr r2, [sp, #28] 12137 061c 059B ldr r3, [sp, #20] 12138 .LVL1238: 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12139 .loc 12 621 0 12140 061e 85FB0445 smull r4, r5, r5, r4 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 12141 .loc 12 620 0 12142 0622 80FB0101 smull r0, r1, r0, r1 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 12143 .loc 12 616 0 12144 0626 9B1A subs r3, r3, r2 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 12145 .loc 12 620 0 12146 0628 2944 add r1, r1, r5 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 12147 .loc 12 616 0 ARM GAS /tmp/ccfbYRip.s page 406 12148 062a 009A ldr r2, [sp] 12149 062c 0D9D ldr r5, [sp, #52] 12150 .LVL1239: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12151 .loc 12 617 0 12152 062e 5800 lsls r0, r3, #1 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12153 .loc 12 621 0 12154 0630 4900 lsls r1, r1, #1 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 12155 .loc 12 616 0 12156 0632 45F83200 str r0, [r5, r2, lsl #3] 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 12157 .loc 12 620 0 12158 0636 45F80B10 str r1, [r5, fp] 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12159 .loc 12 626 0 12160 063a DEE90041 ldrd r4, r1, [lr] 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12161 .loc 12 610 0 12162 063e 029B ldr r3, [sp, #8] 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12163 .loc 12 605 0 12164 0640 07EB0A00 add r0, r7, r10 12165 .LVL1240: 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12166 .loc 12 610 0 12167 0644 9A1B subs r2, r3, r6 12168 .LVL1241: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 12169 .loc 12 629 0 12170 0646 80FB0456 smull r5, r6, r0, r4 12171 064a CDE90256 strd r5, [sp, #8] 12172 .LVL1242: 12173 064e 039B ldr r3, [sp, #12] 12174 .LVL1243: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12175 .loc 12 630 0 12176 0650 82FB0167 smull r6, r7, r2, r1 12177 .LVL1244: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12178 .loc 12 634 0 12179 0654 80FB0101 smull r0, r1, r0, r1 12180 .LVL1245: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 12181 .loc 12 629 0 12182 0658 0198 ldr r0, [sp, #4] 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 12183 .loc 12 633 0 12184 065a 84FB0245 smull r4, r5, r4, r2 12185 .LVL1246: 12186 065e 2944 add r1, r1, r5 12187 .LVL1247: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 12188 .loc 12 629 0 12189 0660 DA1B subs r2, r3, r7 12190 .LVL1248: ARM GAS /tmp/ccfbYRip.s page 407 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12191 .loc 12 637 0 12192 0662 009D ldr r5, [sp] 12193 0664 00F10803 add r3, r0, #8 12194 0668 0193 str r3, [sp, #4] 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12195 .loc 12 642 0 12196 066a 0A9B ldr r3, [sp, #40] 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12197 .loc 12 637 0 12198 066c 0135 adds r5, r5, #1 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12199 .loc 12 630 0 12200 066e 5200 lsls r2, r2, #1 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12201 .loc 12 634 0 12202 0670 4900 lsls r1, r1, #1 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12203 .loc 12 642 0 12204 0672 AB42 cmp r3, r5 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 12205 .loc 12 629 0 12206 0674 40F8042C str r2, [r0, #-4] 12207 .LVL1249: 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12208 .loc 12 637 0 12209 0678 0095 str r5, [sp] 12210 .LVL1250: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 12211 .loc 12 633 0 12212 067a C9F80410 str r1, [r9, #4] 12213 067e 08F11008 add r8, r8, #16 12214 0682 0BF1080B add fp, fp, #8 12215 0686 0EF1180E add lr, lr, #24 12216 068a 09F10809 add r9, r9, #8 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12217 .loc 12 642 0 12218 068e 7FF455AF bne .L518 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12219 .loc 12 653 0 12220 0692 042D cmp r5, #4 12221 0694 2195 str r5, [sp, #132] 12222 .LVL1251: 12223 0696 40F2EA80 bls .L519 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12224 .loc 12 650 0 12225 069a 0423 movs r3, #4 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12226 .loc 12 653 0 12227 069c 1195 str r5, [sp, #68] 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12228 .loc 12 650 0 12229 069e 1D93 str r3, [sp, #116] 12230 .LVL1252: 12231 .L523: 12232 06a0 1D9D ldr r5, [sp, #116] 12233 06a2 0F9B ldr r3, [sp, #60] ARM GAS /tmp/ccfbYRip.s page 408 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 12234 .loc 12 657 0 12235 06a4 119E ldr r6, [sp, #68] 12236 06a6 1A46 mov r2, r3 12237 06a8 05EB4503 add r3, r5, r5, lsl #1 12238 06ac DB00 lsls r3, r3, #3 12239 06ae 1B93 str r3, [sp, #108] 12240 06b0 EB00 lsls r3, r5, #3 12241 06b2 1A93 str r3, [sp, #104] 12242 06b4 2B01 lsls r3, r5, #4 12243 06b6 B408 lsrs r4, r6, #2 12244 06b8 1993 str r3, [sp, #100] 12245 06ba F300 lsls r3, r6, #3 12246 06bc 02EBC400 add r0, r2, r4, lsl #3 12247 06c0 1293 str r3, [sp, #72] 12248 06c2 C4EB4472 rsb r2, r4, r4, lsl #29 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12249 .loc 12 660 0 12250 06c6 1E9B ldr r3, [sp, #120] 12251 06c8 1693 str r3, [sp, #88] 12252 06ca D200 lsls r2, r2, #3 12253 06cc 2101 lsls r1, r4, #4 12254 06ce 0430 adds r0, r0, #4 12255 06d0 0439 subs r1, r1, #4 12256 06d2 0192 str r2, [sp, #4] 12257 06d4 CDE91433 strd r3, r3, [sp, #80] 12258 06d8 621E subs r2, r4, #1 12259 06da 0023 movs r3, #0 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 12260 .loc 12 657 0 12261 06dc 0B94 str r4, [sp, #44] 12262 .LVL1253: 12263 06de 1790 str r0, [sp, #92] 12264 06e0 1C91 str r1, [sp, #112] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12265 .loc 12 660 0 12266 06e2 1892 str r2, [sp, #96] 12267 06e4 1393 str r3, [sp, #76] 12268 .LVL1254: 12269 .L522: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 12270 .loc 12 665 0 12271 06e6 169B ldr r3, [sp, #88] 12272 06e8 1A68 ldr r2, [r3] 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 12273 .loc 12 666 0 12274 06ea 5B68 ldr r3, [r3, #4] 12275 06ec 0493 str r3, [sp, #16] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 12276 .loc 12 667 0 12277 06ee 159B ldr r3, [sp, #84] 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 12278 .loc 12 665 0 12279 06f0 0292 str r2, [sp, #8] 12280 .LVL1255: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 12281 .loc 12 667 0 ARM GAS /tmp/ccfbYRip.s page 409 12282 06f2 1A68 ldr r2, [r3] 12283 .LVL1256: 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 12284 .loc 12 668 0 12285 06f4 5B68 ldr r3, [r3, #4] 12286 06f6 0693 str r3, [sp, #24] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 12287 .loc 12 669 0 12288 06f8 149B ldr r3, [sp, #80] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 12289 .loc 12 667 0 12290 06fa 1092 str r2, [sp, #64] 12291 .LVL1257: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 12292 .loc 12 669 0 12293 06fc 1A68 ldr r2, [r3] 12294 .LVL1258: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 12295 .loc 12 670 0 12296 06fe 5B68 ldr r3, [r3, #4] 12297 0700 0A93 str r3, [sp, #40] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12298 .loc 12 674 0 12299 0702 0E9B ldr r3, [sp, #56] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 12300 .loc 12 669 0 12301 0704 0892 str r2, [sp, #32] 12302 .LVL1259: 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12303 .loc 12 674 0 12304 0706 1946 mov r1, r3 12305 0708 139B ldr r3, [sp, #76] 12306 070a 9942 cmp r1, r3 12307 070c 40F29180 bls .L520 12308 0710 1C9A ldr r2, [sp, #112] 12309 .LVL1260: 12310 0712 0093 str r3, [sp] 12311 0714 1046 mov r0, r2 12312 0716 179A ldr r2, [sp, #92] 12313 0718 00EB020A add r10, r0, r2 12314 071c 9346 mov fp, r2 12315 .LVL1261: 12316 .L521: 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12317 .loc 12 684 0 12318 071e 0F9F ldr r7, [sp, #60] 12319 0720 009C ldr r4, [sp] 12320 0722 0199 ldr r1, [sp, #4] 12321 0724 57F83450 ldr r5, [r7, r4, lsl #3] 12322 0728 5AF80160 ldr r6, [r10, r1] 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12323 .loc 12 694 0 12324 072c 5BF8042C ldr r2, [fp, #-4] 12325 0730 DAF80030 ldr r3, [r10] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12326 .loc 12 689 0 12327 0734 5BF80180 ldr r8, [fp, r1] ARM GAS /tmp/ccfbYRip.s page 410 12328 0738 0B99 ldr r1, [sp, #44] 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 12329 .loc 12 684 0 12330 073a 05EB060E add lr, r5, r6 12331 .LVL1262: 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12332 .loc 12 694 0 12333 073e 1344 add r3, r3, r2 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 12334 .loc 12 697 0 12335 0740 0EEB0302 add r2, lr, r3 12336 0744 BC46 mov ip, r7 12337 0746 9210 asrs r2, r2, #2 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12338 .loc 12 689 0 12339 0748 5BF83100 ldr r0, [fp, r1, lsl #3] 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 12340 .loc 12 697 0 12341 074c 4CF83420 str r2, [ip, r4, lsl #3] 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 12342 .loc 12 701 0 12343 0750 DBF80010 ldr r1, [fp] 12344 0754 DAF80420 ldr r2, [r10, #4] 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12345 .loc 12 703 0 12346 0758 019C ldr r4, [sp, #4] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 12347 .loc 12 689 0 12348 075a 08EB0007 add r7, r8, r0 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 12349 .loc 12 701 0 12350 075e 0A44 add r2, r2, r1 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12351 .loc 12 703 0 12352 0760 B918 adds r1, r7, r2 12353 0762 8910 asrs r1, r1, #2 12354 0764 4BF80410 str r1, [fp, r4] 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12355 .loc 12 686 0 12356 0768 AE1B subs r6, r5, r6 12357 .LVL1263: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12358 .loc 12 691 0 12359 076a A8EB0009 sub r9, r8, r0 12360 .LVL1264: 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 12361 .loc 12 709 0 12362 076e DBF80050 ldr r5, [fp] 12363 0772 DAF80400 ldr r0, [r10, #4] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12364 .loc 12 711 0 12365 0776 5BF8041C ldr r1, [fp, #-4] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 12366 .loc 12 709 0 12367 077a A5EB0008 sub r8, r5, r0 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12368 .loc 12 711 0 ARM GAS /tmp/ccfbYRip.s page 411 12369 077e DAF80050 ldr r5, [r10] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12370 .loc 12 733 0 12371 0782 0498 ldr r0, [sp, #16] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12372 .loc 12 711 0 12373 0784 491B subs r1, r1, r5 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12374 .loc 12 732 0 12375 0786 029D ldr r5, [sp, #8] 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 12376 .loc 12 722 0 12377 0788 A6EB080C sub ip, r6, r8 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 12378 .loc 12 699 0 12379 078c AEEB0303 sub r3, lr, r3 12380 .LVL1265: 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 12381 .loc 12 727 0 12382 0790 09EB010E add lr, r9, r1 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12383 .loc 12 706 0 12384 0794 BA1A subs r2, r7, r2 12385 .LVL1266: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12386 .loc 12 724 0 12387 0796 B044 add r8, r8, r6 12388 .LVL1267: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12389 .loc 12 732 0 12390 0798 8CFB0567 smull r6, r7, ip, r5 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12391 .loc 12 733 0 12392 079c 8EFB0045 smull r4, r5, lr, r0 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12393 .loc 12 732 0 12394 07a0 7E1B subs r6, r7, r5 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12395 .loc 12 729 0 12396 07a2 A9EB0109 sub r9, r9, r1 12397 .LVL1268: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12398 .loc 12 732 0 12399 07a6 0D96 str r6, [sp, #52] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12400 .loc 12 715 0 12401 07a8 0699 ldr r1, [sp, #24] 12402 .LVL1269: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 12403 .loc 12 714 0 12404 07aa 109E ldr r6, [sp, #64] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12405 .loc 12 715 0 12406 07ac 82FB0101 smull r0, r1, r2, r1 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 12407 .loc 12 714 0 12408 07b0 83FB0645 smull r4, r5, r3, r6 ARM GAS /tmp/ccfbYRip.s page 412 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 12409 .loc 12 718 0 12410 07b4 82FB0667 smull r6, r7, r2, r6 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 12411 .loc 12 714 0 12412 07b8 6A1A subs r2, r5, r1 12413 07ba 0C92 str r2, [sp, #48] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12414 .loc 12 719 0 12415 07bc 069A ldr r2, [sp, #24] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 12416 .loc 12 736 0 12417 07be 029D ldr r5, [sp, #8] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12418 .loc 12 737 0 12419 07c0 0498 ldr r0, [sp, #16] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 12420 .loc 12 745 0 12421 07c2 0A9E ldr r6, [sp, #40] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12422 .loc 12 719 0 12423 07c4 1146 mov r1, r2 12424 07c6 83FB0123 smull r2, r3, r3, r1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 12425 .loc 12 736 0 12426 07ca 8EFB0545 smull r4, r5, lr, r5 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12427 .loc 12 737 0 12428 07ce 8CFB0001 smull r0, r1, ip, r0 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 12429 .loc 12 736 0 12430 07d2 01EB050E add lr, r1, r5 12431 .LVL1270: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 12432 .loc 12 718 0 12433 07d6 03EB070C add ip, r3, r7 12434 .LVL1271: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12435 .loc 12 741 0 12436 07da 0A98 ldr r0, [sp, #40] 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 12437 .loc 12 740 0 12438 07dc 089B ldr r3, [sp, #32] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 12439 .loc 12 744 0 12440 07de 089D ldr r5, [sp, #32] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 12441 .loc 12 745 0 12442 07e0 88FB0667 smull r6, r7, r8, r6 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12443 .loc 12 741 0 12444 07e4 89FB0001 smull r0, r1, r9, r0 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 12445 .loc 12 744 0 12446 07e8 89FB0545 smull r4, r5, r9, r5 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 12447 .loc 12 740 0 ARM GAS /tmp/ccfbYRip.s page 413 12448 07ec 88FB0323 smull r2, r3, r8, r3 12449 07f0 5B1A subs r3, r3, r1 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 12450 .loc 12 744 0 12451 07f2 7919 adds r1, r7, r5 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12452 .loc 12 674 0 12453 07f4 009F ldr r7, [sp] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12454 .loc 12 733 0 12455 07f6 0D9A ldr r2, [sp, #52] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12456 .loc 12 674 0 12457 07f8 119D ldr r5, [sp, #68] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12458 .loc 12 733 0 12459 07fa 5010 asrs r0, r2, #1 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12460 .loc 12 715 0 12461 07fc 0C9A ldr r2, [sp, #48] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12462 .loc 12 674 0 12463 07fe 7E19 adds r6, r7, r5 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12464 .loc 12 715 0 12465 0800 5410 asrs r4, r2, #1 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12466 .loc 12 719 0 12467 0802 4FEA6C05 asr r5, ip, #1 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 12468 .loc 12 718 0 12469 0806 4BE90145 strd r4, r5, [fp, #-4] 12470 .LVL1272: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12471 .loc 12 732 0 12472 080a 019C ldr r4, [sp, #4] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12473 .loc 12 674 0 12474 080c 0096 str r6, [sp] 12475 .LVL1273: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 12476 .loc 12 732 0 12477 080e 4AF80400 str r0, [r10, r4] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 12478 .loc 12 736 0 12479 0812 0B98 ldr r0, [sp, #44] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12480 .loc 12 737 0 12481 0814 4FEA6E02 asr r2, lr, #1 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12482 .loc 12 741 0 12483 0818 5B10 asrs r3, r3, #1 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 12484 .loc 12 745 0 12485 081a 4910 asrs r1, r1, #1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 12486 .loc 12 736 0 ARM GAS /tmp/ccfbYRip.s page 414 12487 081c 4BF83020 str r2, [fp, r0, lsl #3] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 12488 .loc 12 744 0 12489 0820 CAE90031 strd r3, r1, [r10] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12490 .loc 12 674 0 12491 0824 0E9B ldr r3, [sp, #56] 12492 0826 129A ldr r2, [sp, #72] 12493 0828 B342 cmp r3, r6 12494 082a 9344 add fp, fp, r2 12495 082c 9244 add r10, r10, r2 12496 082e 3FF676AF bhi .L521 12497 .LVL1274: 12498 .L520: 12499 0832 169A ldr r2, [sp, #88] 12500 0834 1A99 ldr r1, [sp, #104] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12501 .loc 12 660 0 12502 0836 139B ldr r3, [sp, #76] 12503 0838 0A44 add r2, r2, r1 12504 083a 1692 str r2, [sp, #88] 12505 083c 1999 ldr r1, [sp, #100] 12506 083e 159A ldr r2, [sp, #84] 12507 0840 0A44 add r2, r2, r1 12508 0842 1592 str r2, [sp, #84] 12509 0844 1B99 ldr r1, [sp, #108] 12510 0846 149A ldr r2, [sp, #80] 12511 0848 0A44 add r2, r2, r1 12512 084a 1492 str r2, [sp, #80] 12513 084c 179A ldr r2, [sp, #92] 12514 084e 0832 adds r2, r2, #8 12515 0850 1792 str r2, [sp, #92] 12516 0852 189A ldr r2, [sp, #96] 12517 0854 0133 adds r3, r3, #1 12518 0856 9342 cmp r3, r2 12519 0858 1393 str r3, [sp, #76] 12520 .LVL1275: 12521 085a 7FF644AF bls .L522 12522 085e 0B9B ldr r3, [sp, #44] 12523 .LVL1276: 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 12524 .loc 12 748 0 12525 0860 1D9A ldr r2, [sp, #116] 12526 0862 1193 str r3, [sp, #68] 12527 .LVL1277: 12528 0864 9200 lsls r2, r2, #2 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12529 .loc 12 653 0 12530 0866 042B cmp r3, #4 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 12531 .loc 12 748 0 12532 0868 1D92 str r2, [sp, #116] 12533 .LVL1278: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 12534 .loc 12 653 0 12535 086a 3FF619AF bhi .L523 12536 .LVL1279: ARM GAS /tmp/ccfbYRip.s page 415 12537 .L519: 12538 086e 0F9B ldr r3, [sp, #60] 12539 0870 219E ldr r6, [sp, #132] 12540 0872 03F12004 add r4, r3, #32 12541 .L524: 12542 .LVL1280: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12543 .loc 12 775 0 12544 0876 54E906E2 ldrd lr, r2, [r4, #-24] 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12545 .loc 12 779 0 12546 087a 54E9045C ldrd r5, ip, [r4, #-16] 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 12547 .loc 12 770 0 12548 087e 54F8201C ldr r1, [r4, #-32] 12549 .LVL1281: 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12550 .loc 12 771 0 12551 0882 54F81C3C ldr r3, [r4, #-28] 12552 .LVL1282: 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12553 .loc 12 783 0 12554 0886 54E90278 ldrd r7, r8, [r4, #-8] 12555 .LVL1283: 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12556 .loc 12 786 0 12557 088a 01EB0E00 add r0, r1, lr 12558 088e 2844 add r0, r0, r5 12559 0890 3844 add r0, r0, r7 12560 .LVL1284: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 12561 .loc 12 795 0 12562 0892 44F8200C str r0, [r4, #-32] 12563 .LVL1285: 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 12564 .loc 12 798 0 12565 0896 A1EB0E00 sub r0, r1, lr 12566 .LVL1286: 12567 089a 2844 add r0, r0, r5 12568 089c C01B subs r0, r0, r7 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 12569 .loc 12 805 0 12570 089e A1EB0209 sub r9, r1, r2 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 12571 .loc 12 802 0 12572 08a2 44F8180C str r0, [r4, #-24] 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 12573 .loc 12 812 0 12574 08a6 1144 add r1, r1, r2 12575 .LVL1287: 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12576 .loc 12 789 0 12577 08a8 9818 adds r0, r3, r2 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12578 .loc 12 799 0 12579 08aa 9A1A subs r2, r3, r2 12580 .LVL1288: ARM GAS /tmp/ccfbYRip.s page 416 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 12581 .loc 12 812 0 12582 08ac 491B subs r1, r1, r5 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 12583 .loc 12 805 0 12584 08ae A9EB0509 sub r9, r9, r5 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12585 .loc 12 789 0 12586 08b2 6044 add r0, r0, ip 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12587 .loc 12 799 0 12588 08b4 6244 add r2, r2, ip 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 12589 .loc 12 805 0 12590 08b6 09EB0805 add r5, r9, r8 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 12591 .loc 12 812 0 12592 08ba A1EB0801 sub r1, r1, r8 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12593 .loc 12 789 0 12594 08be 4044 add r0, r0, r8 12595 .LVL1289: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12596 .loc 12 799 0 12597 08c0 A2EB0802 sub r2, r2, r8 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12598 .loc 12 806 0 12599 08c4 03EB0E08 add r8, r3, lr 12600 .LVL1290: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12601 .loc 12 813 0 12602 08c8 A3EB0E03 sub r3, r3, lr 12603 .LVL1291: 12604 08cc A3EB0C03 sub r3, r3, ip 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12605 .loc 12 806 0 12606 08d0 A8EB0C0E sub lr, r8, ip 12607 .LVL1292: 12608 08d4 AEEB070E sub lr, lr, r7 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12609 .loc 12 813 0 12610 08d8 3B44 add r3, r3, r7 12611 .loc 12 819 0 12612 08da 013E subs r6, r6, #1 12613 .LVL1293: 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 12614 .loc 12 809 0 12615 08dc 44F8105C str r5, [r4, #-16] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 12616 .loc 12 816 0 12617 08e0 44F8081C str r1, [r4, #-8] 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12618 .loc 12 796 0 12619 08e4 44F81C0C str r0, [r4, #-28] 12620 .LVL1294: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12621 .loc 12 803 0 ARM GAS /tmp/ccfbYRip.s page 417 12622 08e8 44F8142C str r2, [r4, #-20] 12623 .LVL1295: 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12624 .loc 12 810 0 12625 08ec 44F80CEC str lr, [r4, #-12] 12626 .LVL1296: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 12627 .loc 12 817 0 12628 08f0 44F8043C str r3, [r4, #-4] 12629 .LVL1297: 12630 08f4 04F12004 add r4, r4, #32 12631 .LVL1298: 12632 .loc 12 819 0 12633 08f8 BDD1 bne .L524 12634 08fa FFF79EBB b .L512 12635 .LVL1299: 12636 .L615: 12637 .LBE2137: 12638 .LBE2139: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 12639 .loc 11 730 0 12640 08fe B3F5007F cmp r3, #512 12641 0902 3FF494AB beq .L527 12642 0906 FFF798BB b .L512 12643 .L613: 12644 090a 102B cmp r3, #16 12645 090c 7FF495AB bne .L512 12646 0910 FFF7A5BB b .L525 12647 .L617: 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 12648 .loc 11 710 0 12649 0914 B3F5007F cmp r3, #512 12650 0918 3FF4D7AD beq .L515 12651 091c FFF78DBB b .L512 12652 .L616: 12653 0920 102B cmp r3, #16 12654 0922 7FF48AAB bne .L512 12655 0926 E3E5 b .L513 12656 .cfi_endproc 12657 .LFE163: 12659 .section .text.arm_cfft_init_f32,"ax",%progbits 12660 .align 1 12661 .p2align 2,,3 12662 .global arm_cfft_init_f32 12663 .syntax unified 12664 .thumb 12665 .thumb_func 12666 .fpu fpv4-sp-d16 12668 arm_cfft_init_f32: 12669 .LFB166: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the default arm status */ 12670 .loc 2 262 0 12671 .cfi_startproc 12672 @ args = 0, pretend = 0, frame = 0 12673 @ frame_needed = 0, uses_anonymous_args = 0 12674 @ link register save eliminated. 12675 .LVL1300: ARM GAS /tmp/ccfbYRip.s page 418 12676 0000 0346 mov r3, r0 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12677 .loc 2 274 0 12678 0002 B1F5807F cmp r1, #256 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 12679 .loc 2 270 0 12680 0006 4FF00000 mov r0, #0 12681 .LVL1301: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Initialise the default arm status */ 12682 .loc 2 262 0 12683 000a 10B4 push {r4} 12684 .LCFI82: 12685 .cfi_def_cfa_offset 4 12686 .cfi_offset 4, -4 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 12687 .loc 2 267 0 12688 000c 1980 strh r1, [r3] @ movhi 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 12689 .loc 2 270 0 12690 000e 5860 str r0, [r3, #4] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12691 .loc 2 274 0 12692 0010 2CD0 beq .L620 12693 0012 13D9 bls .L635 12694 0014 B1F5806F cmp r1, #1024 12695 0018 2AD0 beq .L627 12696 001a 20D9 bls .L636 12697 001c B1F5006F cmp r1, #2048 12698 0020 17D0 beq .L630 12699 0022 B1F5805F cmp r1, #4096 12700 0026 25D1 bne .L632 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12701 .loc 2 279 0 12702 0028 154A ldr r2, .L638 12703 .L634: 12704 .loc 2 336 0 12705 002a 9489 ldrh r4, [r2, #12] 12706 002c 9C81 strh r4, [r3, #12] @ movhi 12707 002e D2E90121 ldrd r2, r1, [r2, #4] 12708 .LVL1302: 12709 0032 C3E90121 strd r2, r1, [r3, #4] 12710 .LVL1303: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #endif 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** default: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** /* Reporting argument error if fftSize is not valid value */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** return (status); 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** } 12711 .loc 2 348 0 12712 0036 5DF8044B ldr r4, [sp], #4 12713 .LCFI83: ARM GAS /tmp/ccfbYRip.s page 419 12714 .cfi_remember_state 12715 .cfi_restore 4 12716 .cfi_def_cfa_offset 0 12717 003a 7047 bx lr 12718 .LVL1304: 12719 .L635: 12720 .LCFI84: 12721 .cfi_restore_state 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12722 .loc 2 274 0 12723 003c 2029 cmp r1, #32 12724 003e 13D0 beq .L622 12725 0040 09D9 bls .L637 12726 0042 4029 cmp r1, #64 12727 0044 03D0 beq .L625 12728 0046 8029 cmp r1, #128 12729 0048 14D1 bne .L632 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12730 .loc 2 317 0 12731 004a 0E4A ldr r2, .L638+4 12732 004c EDE7 b .L634 12733 .L625: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12734 .loc 2 323 0 12735 004e 0E4A ldr r2, .L638+8 12736 0050 EBE7 b .L634 12737 .L630: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 12738 .loc 2 287 0 12739 0052 0E4A ldr r2, .L638+12 12740 0054 E9E7 b .L634 12741 .L637: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12742 .loc 2 274 0 12743 0056 1029 cmp r1, #16 12744 0058 0CD1 bne .L632 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12745 .loc 2 336 0 12746 005a 0D4A ldr r2, .L638+16 12747 005c E5E7 b .L634 12748 .L636: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12749 .loc 2 274 0 12750 005e B1F5007F cmp r1, #512 12751 0062 07D1 bne .L632 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12752 .loc 2 305 0 12753 0064 0B4A ldr r2, .L638+20 12754 0066 E0E7 b .L634 12755 .L622: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12756 .loc 2 329 0 12757 0068 0B4A ldr r2, .L638+24 12758 006a DEE7 b .L634 12759 .L620: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12760 .loc 2 311 0 ARM GAS /tmp/ccfbYRip.s page 420 12761 006c 0B4A ldr r2, .L638+28 12762 006e DCE7 b .L634 12763 .L627: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** 12764 .loc 2 296 0 12765 0070 0B4A ldr r2, .L638+32 12766 0072 DAE7 b .L634 12767 .L632: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c **** break; 12768 .loc 2 342 0 12769 0074 4FF0FF30 mov r0, #-1 12770 .LVL1305: 12771 .loc 2 348 0 12772 0078 5DF8044B ldr r4, [sp], #4 12773 .LCFI85: 12774 .cfi_restore 4 12775 .cfi_def_cfa_offset 0 12776 007c 7047 bx lr 12777 .L639: 12778 007e 00BF .align 2 12779 .L638: 12780 0080 00000000 .word arm_cfft_sR_f32_len4096 12781 0084 00000000 .word arm_cfft_sR_f32_len128 12782 0088 00000000 .word arm_cfft_sR_f32_len64 12783 008c 00000000 .word arm_cfft_sR_f32_len2048 12784 0090 00000000 .word arm_cfft_sR_f32_len16 12785 0094 00000000 .word arm_cfft_sR_f32_len512 12786 0098 00000000 .word arm_cfft_sR_f32_len32 12787 009c 00000000 .word arm_cfft_sR_f32_len256 12788 00a0 00000000 .word arm_cfft_sR_f32_len1024 12789 .cfi_endproc 12790 .LFE166: 12792 .section .text.arm_cfft_init_f64,"ax",%progbits 12793 .align 1 12794 .p2align 2,,3 12795 .global arm_cfft_init_f64 12796 .syntax unified 12797 .thumb 12798 .thumb_func 12799 .fpu fpv4-sp-d16 12801 arm_cfft_init_f64: 12802 .LFB167: 12803 .file 13 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Title: arm_cfft_init_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Description: Initialization function for cfft f64 instance 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * $Date: 23. January 2020 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * $Revision: V1.7.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * SPDX-License-Identifier: Apache-2.0 ARM GAS /tmp/ccfbYRip.s page 421 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #define FFTINIT(EXT,SIZE) \ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @addtogroup ComplexFFT 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @{ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @brief Initialization function for the cfft f64 function 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @param[in,out] S points to an instance of the floating-point CFFT structure 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @param[in] fftLen fft length (number of complex samples) 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @return execution status 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** @par Use of this function is mandatory only for the MVE version of the FFT. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** Other versions can still initialize directly the data structure using 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** variables declared in arm_const_structs.h 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #include "arm_math.h" 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #include "arm_common_tables.h" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #include "arm_const_structs.h" 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** arm_status arm_cfft_init_f64( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** arm_cfft_instance_f64 * S, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** uint16_t fftLen) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** { 12804 .loc 13 60 0 12805 .cfi_startproc 12806 @ args = 0, pretend = 0, frame = 0 12807 @ frame_needed = 0, uses_anonymous_args = 0 12808 @ link register save eliminated. 12809 .LVL1306: 12810 0000 0346 mov r3, r0 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the default arm status */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** arm_status status = ARM_MATH_SUCCESS; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the FFT length */ ARM GAS /tmp/ccfbYRip.s page 422 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** S->fftLen = fftLen; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the Twiddle coefficient pointer */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** S->pTwiddle = NULL; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of Instance structure depending on the FFT length */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** switch (S->fftLen) { 12811 .loc 13 72 0 12812 0002 B1F5807F cmp r1, #256 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 12813 .loc 13 68 0 12814 0006 4FF00000 mov r0, #0 12815 .LVL1307: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the default arm status */ 12816 .loc 13 60 0 12817 000a 10B4 push {r4} 12818 .LCFI86: 12819 .cfi_def_cfa_offset 4 12820 .cfi_offset 4, -4 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 12821 .loc 13 65 0 12822 000c 1980 strh r1, [r3] @ movhi 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 12823 .loc 13 68 0 12824 000e 5860 str r0, [r3, #4] 12825 .loc 13 72 0 12826 0010 2CD0 beq .L642 12827 0012 13D9 bls .L657 12828 0014 B1F5806F cmp r1, #1024 12829 0018 2AD0 beq .L649 12830 001a 20D9 bls .L658 12831 001c B1F5006F cmp r1, #2048 12832 0020 17D0 beq .L652 12833 0022 B1F5805F cmp r1, #4096 12834 0026 25D1 bne .L654 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of structure parameters for 4096 point FFT */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 4096U: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the bit reversal table modifier */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,4096); 12835 .loc 13 77 0 12836 0028 154A ldr r2, .L660 12837 .L656: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of structure parameters for 2048 point FFT */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 2048U: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the bit reversal table modifier */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,2048); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE ARM GAS /tmp/ccfbYRip.s page 423 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of structure parameters for 1024 point FFT */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 1024U: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the bit reversal table modifier */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,1024); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of structure parameters for 512 point FFT */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 512U: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initialise the bit reversal table modifier */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,512); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 256U: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,256); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 128U: 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,128); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 64U: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,64); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 32U: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,32); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** case 16U: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Initializations of structure parameters for 16 point FFT */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** FFTINIT(f64,16); 12838 .loc 13 134 0 12839 002a 9489 ldrh r4, [r2, #12] 12840 002c 9C81 strh r4, [r3, #12] @ movhi 12841 002e D2E90121 ldrd r2, r1, [r2, #4] 12842 .LVL1308: 12843 0032 C3E90121 strd r2, r1, [r3, #4] 12844 .LVL1309: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #endif 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** default: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** /* Reporting argument error if fftSize is not valid value */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** status = ARM_MATH_ARGUMENT_ERROR; ARM GAS /tmp/ccfbYRip.s page 424 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** return (status); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** } 12845 .loc 13 146 0 12846 0036 5DF8044B ldr r4, [sp], #4 12847 .LCFI87: 12848 .cfi_remember_state 12849 .cfi_restore 4 12850 .cfi_def_cfa_offset 0 12851 003a 7047 bx lr 12852 .LVL1310: 12853 .L657: 12854 .LCFI88: 12855 .cfi_restore_state 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12856 .loc 13 72 0 12857 003c 2029 cmp r1, #32 12858 003e 13D0 beq .L644 12859 0040 09D9 bls .L659 12860 0042 4029 cmp r1, #64 12861 0044 03D0 beq .L647 12862 0046 8029 cmp r1, #128 12863 0048 14D1 bne .L654 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12864 .loc 13 115 0 12865 004a 0E4A ldr r2, .L660+4 12866 004c EDE7 b .L656 12867 .L647: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12868 .loc 13 121 0 12869 004e 0E4A ldr r2, .L660+8 12870 0050 EBE7 b .L656 12871 .L652: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 12872 .loc 13 85 0 12873 0052 0E4A ldr r2, .L660+12 12874 0054 E9E7 b .L656 12875 .L659: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12876 .loc 13 72 0 12877 0056 1029 cmp r1, #16 12878 0058 0CD1 bne .L654 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12879 .loc 13 134 0 12880 005a 0D4A ldr r2, .L660+16 12881 005c E5E7 b .L656 12882 .L658: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12883 .loc 13 72 0 12884 005e B1F5007F cmp r1, #512 12885 0062 07D1 bne .L654 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12886 .loc 13 103 0 12887 0064 0B4A ldr r2, .L660+20 ARM GAS /tmp/ccfbYRip.s page 425 12888 0066 E0E7 b .L656 12889 .L644: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12890 .loc 13 127 0 12891 0068 0B4A ldr r2, .L660+24 12892 006a DEE7 b .L656 12893 .L642: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12894 .loc 13 109 0 12895 006c 0B4A ldr r2, .L660+28 12896 006e DCE7 b .L656 12897 .L649: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** 12898 .loc 13 94 0 12899 0070 0B4A ldr r2, .L660+32 12900 0072 DAE7 b .L656 12901 .L654: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c **** break; 12902 .loc 13 140 0 12903 0074 4FF0FF30 mov r0, #-1 12904 .LVL1311: 12905 .loc 13 146 0 12906 0078 5DF8044B ldr r4, [sp], #4 12907 .LCFI89: 12908 .cfi_restore 4 12909 .cfi_def_cfa_offset 0 12910 007c 7047 bx lr 12911 .L661: 12912 007e 00BF .align 2 12913 .L660: 12914 0080 00000000 .word arm_cfft_sR_f64_len4096 12915 0084 00000000 .word arm_cfft_sR_f64_len128 12916 0088 00000000 .word arm_cfft_sR_f64_len64 12917 008c 00000000 .word arm_cfft_sR_f64_len2048 12918 0090 00000000 .word arm_cfft_sR_f64_len16 12919 0094 00000000 .word arm_cfft_sR_f64_len512 12920 0098 00000000 .word arm_cfft_sR_f64_len32 12921 009c 00000000 .word arm_cfft_sR_f64_len256 12922 00a0 00000000 .word arm_cfft_sR_f64_len1024 12923 .cfi_endproc 12924 .LFE167: 12926 .section .text.arm_cfft_init_q15,"ax",%progbits 12927 .align 1 12928 .p2align 2,,3 12929 .global arm_cfft_init_q15 12930 .syntax unified 12931 .thumb 12932 .thumb_func 12933 .fpu fpv4-sp-d16 12935 arm_cfft_init_q15: 12936 .LFB168: 12937 .file 14 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Title: arm_cfft_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Description: Initialization function for cfft q15 instance 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * ARM GAS /tmp/ccfbYRip.s page 426 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * $Date: 07. January 2020 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * $Revision: V1.7.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #define FFTINIT(EXT,SIZE) \ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @addtogroup ComplexFFT 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @{ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @brief Initialization function for the cfft q15 function 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @param[in,out] S points to an instance of the floating-point CFFT structure 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @param[in] fftLen fft length (number of complex samples) 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @return execution status 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** @par Use of this function is mandatory only for the MVE version of the FFT. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** Other versions can still initialize directly the data structure using 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** variables declared in arm_const_structs.h 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #include "arm_math.h" 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #include "arm_common_tables.h" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #include "arm_const_structs.h" 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #include "arm_vec_fft.h" 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #include "arm_mve_tables.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_status arm_cfft_radix4by2_rearrange_twiddles_q15(arm_cfft_instance_q15 *S, int twidCoefModifier ARM GAS /tmp/ccfbYRip.s page 427 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** { 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** switch (S->fftLen >> (twidCoefModifier - 1)) { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 4096U: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q15; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_q15; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q15; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_q15; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q15; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_q15; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 1024U: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q15; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_q15; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q15; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_q15; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q15; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_q15; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 256U: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q15; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_q15; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q15; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_q15; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q15; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_q15; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 64U: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q15; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_q15; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q15; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_q15; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q15; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_q15; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** ARM GAS /tmp/ccfbYRip.s page 428 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 16U: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q15; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_q15; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q15; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_q15; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q15; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_q15; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** default: 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** return(ARM_MATH_ARGUMENT_ERROR); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* invalid sizes already filtered */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** return(ARM_MATH_SUCCESS); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_status arm_cfft_init_q15( 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_cfft_instance_q15 * S, 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** uint16_t fftLen) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the default arm status */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the FFT length */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->fftLen = fftLen; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the Twiddle coefficient pointer */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = NULL; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of Instance structure depending on the FFT length */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** switch (S->fftLen) { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 4096 point FFT */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 4096U: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_4096_q15; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 2048 point FFT */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 2048U: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ ARM GAS /tmp/ccfbYRip.s page 429 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_2048_q15; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 1024 point FFT */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 1024U: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_1024_q15; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 512 point FFT */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 512U: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_512_q15; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 256U: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_256_q15; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 128U: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_128_q15; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 64U: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_64_q15; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F ARM GAS /tmp/ccfbYRip.s page 430 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 32U: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_32_q15; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 16U: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 16 point FFT */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = (q15_t *)twiddleCoef_16_q15; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** default: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Reporting argument error if fftSize is not valid value */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** return (status); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #else 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_status arm_cfft_init_q15( 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_cfft_instance_q15 * S, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** uint16_t fftLen) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** { 12938 .loc 14 265 0 12939 .cfi_startproc 12940 @ args = 0, pretend = 0, frame = 0 12941 @ frame_needed = 0, uses_anonymous_args = 0 12942 @ link register save eliminated. 12943 .LVL1312: 12944 0000 0346 mov r3, r0 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the default arm status */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the FFT length */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->fftLen = fftLen; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the Twiddle coefficient pointer */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** S->pTwiddle = NULL; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of Instance structure depending on the FFT length */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** switch (S->fftLen) { 12945 .loc 14 277 0 12946 0002 B1F5807F cmp r1, #256 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 12947 .loc 14 273 0 12948 0006 4FF00000 mov r0, #0 12949 .LVL1313: ARM GAS /tmp/ccfbYRip.s page 431 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the default arm status */ 12950 .loc 14 265 0 12951 000a 10B4 push {r4} 12952 .LCFI90: 12953 .cfi_def_cfa_offset 4 12954 .cfi_offset 4, -4 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 12955 .loc 14 270 0 12956 000c 1980 strh r1, [r3] @ movhi 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 12957 .loc 14 273 0 12958 000e 5860 str r0, [r3, #4] 12959 .loc 14 277 0 12960 0010 2CD0 beq .L664 12961 0012 13D9 bls .L679 12962 0014 B1F5806F cmp r1, #1024 12963 0018 2AD0 beq .L671 12964 001a 20D9 bls .L680 12965 001c B1F5006F cmp r1, #2048 12966 0020 17D0 beq .L674 12967 0022 B1F5805F cmp r1, #4096 12968 0026 25D1 bne .L676 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 4096 point FFT */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 4096U: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,4096); 12969 .loc 14 282 0 12970 0028 154A ldr r2, .L682 12971 .L678: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 2048 point FFT */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 2048U: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,2048); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 1024 point FFT */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 1024U: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,1024); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 512 point FFT */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 512U: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initialise the bit reversal table modifier */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,512); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; ARM GAS /tmp/ccfbYRip.s page 432 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 256U: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,256); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 128U: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,128); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 64U: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,64); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 32U: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,32); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** case 16U: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Initializations of structure parameters for 16 point FFT */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** FFTINIT(q15,16); 12972 .loc 14 339 0 12973 002a 9489 ldrh r4, [r2, #12] 12974 002c 9C81 strh r4, [r3, #12] @ movhi 12975 002e D2E90121 ldrd r2, r1, [r2, #4] 12976 .LVL1314: 12977 0032 C3E90121 strd r2, r1, [r3, #4] 12978 .LVL1315: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #endif 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** default: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** /* Reporting argument error if fftSize is not valid value */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** return (status); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** } 12979 .loc 14 351 0 12980 0036 5DF8044B ldr r4, [sp], #4 12981 .LCFI91: 12982 .cfi_remember_state 12983 .cfi_restore 4 12984 .cfi_def_cfa_offset 0 12985 003a 7047 bx lr 12986 .LVL1316: ARM GAS /tmp/ccfbYRip.s page 433 12987 .L679: 12988 .LCFI92: 12989 .cfi_restore_state 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 12990 .loc 14 277 0 12991 003c 2029 cmp r1, #32 12992 003e 13D0 beq .L666 12993 0040 09D9 bls .L681 12994 0042 4029 cmp r1, #64 12995 0044 03D0 beq .L669 12996 0046 8029 cmp r1, #128 12997 0048 14D1 bne .L676 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 12998 .loc 14 320 0 12999 004a 0E4A ldr r2, .L682+4 13000 004c EDE7 b .L678 13001 .L669: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13002 .loc 14 326 0 13003 004e 0E4A ldr r2, .L682+8 13004 0050 EBE7 b .L678 13005 .L674: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 13006 .loc 14 290 0 13007 0052 0E4A ldr r2, .L682+12 13008 0054 E9E7 b .L678 13009 .L681: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 13010 .loc 14 277 0 13011 0056 1029 cmp r1, #16 13012 0058 0CD1 bne .L676 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13013 .loc 14 339 0 13014 005a 0D4A ldr r2, .L682+16 13015 005c E5E7 b .L678 13016 .L680: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 13017 .loc 14 277 0 13018 005e B1F5007F cmp r1, #512 13019 0062 07D1 bne .L676 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13020 .loc 14 308 0 13021 0064 0B4A ldr r2, .L682+20 13022 0066 E0E7 b .L678 13023 .L666: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13024 .loc 14 332 0 13025 0068 0B4A ldr r2, .L682+24 13026 006a DEE7 b .L678 13027 .L664: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13028 .loc 14 314 0 13029 006c 0B4A ldr r2, .L682+28 13030 006e DCE7 b .L678 13031 .L671: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** 13032 .loc 14 299 0 ARM GAS /tmp/ccfbYRip.s page 434 13033 0070 0B4A ldr r2, .L682+32 13034 0072 DAE7 b .L678 13035 .L676: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c **** break; 13036 .loc 14 345 0 13037 0074 4FF0FF30 mov r0, #-1 13038 .LVL1317: 13039 .loc 14 351 0 13040 0078 5DF8044B ldr r4, [sp], #4 13041 .LCFI93: 13042 .cfi_restore 4 13043 .cfi_def_cfa_offset 0 13044 007c 7047 bx lr 13045 .L683: 13046 007e 00BF .align 2 13047 .L682: 13048 0080 00000000 .word arm_cfft_sR_q15_len4096 13049 0084 00000000 .word arm_cfft_sR_q15_len128 13050 0088 00000000 .word arm_cfft_sR_q15_len64 13051 008c 00000000 .word arm_cfft_sR_q15_len2048 13052 0090 00000000 .word arm_cfft_sR_q15_len16 13053 0094 00000000 .word arm_cfft_sR_q15_len512 13054 0098 00000000 .word arm_cfft_sR_q15_len32 13055 009c 00000000 .word arm_cfft_sR_q15_len256 13056 00a0 00000000 .word arm_cfft_sR_q15_len1024 13057 .cfi_endproc 13058 .LFE168: 13060 .section .text.arm_cfft_init_q31,"ax",%progbits 13061 .align 1 13062 .p2align 2,,3 13063 .global arm_cfft_init_q31 13064 .syntax unified 13065 .thumb 13066 .thumb_func 13067 .fpu fpv4-sp-d16 13069 arm_cfft_init_q31: 13070 .LFB169: 13071 .file 15 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Title: arm_cfft_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Description: Initialization function for cfft q31 instance 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * $Date: 07. January 2020 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * $Revision: V1.7.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * ARM GAS /tmp/ccfbYRip.s page 435 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #define FFTINIT(EXT,SIZE) \ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @addtogroup ComplexFFT 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @{ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @brief Initialization function for the cfft q31 function 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @param[in,out] S points to an instance of the floating-point CFFT structure 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @param[in] fftLen fft length (number of complex samples) 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @return execution status 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** @par Use of this function is mandatory only for the MVE version of the FFT. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** Other versions can still initialize directly the data structure using 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** variables declared in arm_const_structs.h 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #include "arm_math.h" 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #include "arm_common_tables.h" 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #include "arm_const_structs.h" 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #include "arm_vec_fft.h" 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #include "arm_mve_tables.h" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_status arm_cfft_radix4by2_rearrange_twiddles_q31(arm_cfft_instance_q31 *S, int twidCoefModifier 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** { 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** switch (S->fftLen >> (twidCoefModifier - 1)) { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 4096U: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q31; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_q31; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q31; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_q31; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q31; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_q31; ARM GAS /tmp/ccfbYRip.s page 436 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 1024U: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q31; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_q31; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q31; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_q31; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q31; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_q31; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 256U: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q31; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_q31; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q31; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_q31; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q31; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_q31; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 64U: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q31; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_q31; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q31; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_q31; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q31; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_q31; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 16U: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q31; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_q31; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q31; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_q31; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q31; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_q31; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** default: ARM GAS /tmp/ccfbYRip.s page 437 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** return(ARM_MATH_ARGUMENT_ERROR); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* invalid sizes already filtered */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** return(ARM_MATH_SUCCESS); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_status arm_cfft_init_q31( 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_cfft_instance_q31 * S, 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** uint16_t fftLen) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** { 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the default arm status */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the FFT length */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->fftLen = fftLen; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the Twiddle coefficient pointer */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = NULL; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of Instance structure depending on the FFT length */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** switch (S->fftLen) { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 4096 point FFT */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 4096U: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_4096_q31; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 2048 point FFT */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 2048U: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_2048_q31; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 1024 point FFT */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 1024U: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_1024_q31; ARM GAS /tmp/ccfbYRip.s page 438 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 512 point FFT */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 512U: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_512_q31; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 256U: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_256_q31; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 128U: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_128_q31; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 64U: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_64_q31; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 32U: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_32_q31; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_F 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 16U: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 16 point FFT */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = (q31_t *)twiddleCoef_16_q31; ARM GAS /tmp/ccfbYRip.s page 439 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** default: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Reporting argument error if fftSize is not valid value */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** return (status); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #else 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_status arm_cfft_init_q31( 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_cfft_instance_q31 * S, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** uint16_t fftLen) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** { 13072 .loc 15 265 0 13073 .cfi_startproc 13074 @ args = 0, pretend = 0, frame = 0 13075 @ frame_needed = 0, uses_anonymous_args = 0 13076 @ link register save eliminated. 13077 .LVL1318: 13078 0000 0346 mov r3, r0 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the default arm status */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the FFT length */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->fftLen = fftLen; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the Twiddle coefficient pointer */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** S->pTwiddle = NULL; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of Instance structure depending on the FFT length */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** switch (S->fftLen) { 13079 .loc 15 277 0 13080 0002 B1F5807F cmp r1, #256 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 13081 .loc 15 273 0 13082 0006 4FF00000 mov r0, #0 13083 .LVL1319: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the default arm status */ 13084 .loc 15 265 0 13085 000a 10B4 push {r4} 13086 .LCFI94: 13087 .cfi_def_cfa_offset 4 13088 .cfi_offset 4, -4 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 13089 .loc 15 270 0 13090 000c 1980 strh r1, [r3] @ movhi 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 13091 .loc 15 273 0 13092 000e 5860 str r0, [r3, #4] 13093 .loc 15 277 0 13094 0010 2CD0 beq .L686 ARM GAS /tmp/ccfbYRip.s page 440 13095 0012 13D9 bls .L701 13096 0014 B1F5806F cmp r1, #1024 13097 0018 2AD0 beq .L693 13098 001a 20D9 bls .L702 13099 001c B1F5006F cmp r1, #2048 13100 0020 17D0 beq .L696 13101 0022 B1F5805F cmp r1, #4096 13102 0026 25D1 bne .L698 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 4096 point FFT */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 4096U: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,4096); 13103 .loc 15 282 0 13104 0028 154A ldr r2, .L704 13105 .L700: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 2048 point FFT */ 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 2048U: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,2048); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 1024 point FFT */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 1024U: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,1024); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 512 point FFT */ 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 512U: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initialise the bit reversal table modifier */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,512); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 256U: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,256); 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 128U: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,128); 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** ARM GAS /tmp/ccfbYRip.s page 441 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 64U: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,64); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 32U: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,32); 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** case 16U: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Initializations of structure parameters for 16 point FFT */ 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** FFTINIT(q31,16); 13106 .loc 15 339 0 13107 002a 9489 ldrh r4, [r2, #12] 13108 002c 9C81 strh r4, [r3, #12] @ movhi 13109 002e D2E90121 ldrd r2, r1, [r2, #4] 13110 .LVL1320: 13111 0032 C3E90121 strd r2, r1, [r3, #4] 13112 .LVL1321: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #endif 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** default: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** /* Reporting argument error if fftSize is not valid value */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** return (status); 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** } 13113 .loc 15 351 0 13114 0036 5DF8044B ldr r4, [sp], #4 13115 .LCFI95: 13116 .cfi_remember_state 13117 .cfi_restore 4 13118 .cfi_def_cfa_offset 0 13119 003a 7047 bx lr 13120 .LVL1322: 13121 .L701: 13122 .LCFI96: 13123 .cfi_restore_state 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 13124 .loc 15 277 0 13125 003c 2029 cmp r1, #32 13126 003e 13D0 beq .L688 13127 0040 09D9 bls .L703 13128 0042 4029 cmp r1, #64 13129 0044 03D0 beq .L691 13130 0046 8029 cmp r1, #128 13131 0048 14D1 bne .L698 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13132 .loc 15 320 0 ARM GAS /tmp/ccfbYRip.s page 442 13133 004a 0E4A ldr r2, .L704+4 13134 004c EDE7 b .L700 13135 .L691: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13136 .loc 15 326 0 13137 004e 0E4A ldr r2, .L704+8 13138 0050 EBE7 b .L700 13139 .L696: 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 13140 .loc 15 290 0 13141 0052 0E4A ldr r2, .L704+12 13142 0054 E9E7 b .L700 13143 .L703: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 13144 .loc 15 277 0 13145 0056 1029 cmp r1, #16 13146 0058 0CD1 bne .L698 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13147 .loc 15 339 0 13148 005a 0D4A ldr r2, .L704+16 13149 005c E5E7 b .L700 13150 .L702: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 13151 .loc 15 277 0 13152 005e B1F5007F cmp r1, #512 13153 0062 07D1 bne .L698 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13154 .loc 15 308 0 13155 0064 0B4A ldr r2, .L704+20 13156 0066 E0E7 b .L700 13157 .L688: 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13158 .loc 15 332 0 13159 0068 0B4A ldr r2, .L704+24 13160 006a DEE7 b .L700 13161 .L686: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13162 .loc 15 314 0 13163 006c 0B4A ldr r2, .L704+28 13164 006e DCE7 b .L700 13165 .L693: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** 13166 .loc 15 299 0 13167 0070 0B4A ldr r2, .L704+32 13168 0072 DAE7 b .L700 13169 .L698: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c **** break; 13170 .loc 15 345 0 13171 0074 4FF0FF30 mov r0, #-1 13172 .LVL1323: 13173 .loc 15 351 0 13174 0078 5DF8044B ldr r4, [sp], #4 13175 .LCFI97: 13176 .cfi_restore 4 13177 .cfi_def_cfa_offset 0 13178 007c 7047 bx lr 13179 .L705: ARM GAS /tmp/ccfbYRip.s page 443 13180 007e 00BF .align 2 13181 .L704: 13182 0080 00000000 .word arm_cfft_sR_q31_len4096 13183 0084 00000000 .word arm_cfft_sR_q31_len128 13184 0088 00000000 .word arm_cfft_sR_q31_len64 13185 008c 00000000 .word arm_cfft_sR_q31_len2048 13186 0090 00000000 .word arm_cfft_sR_q31_len16 13187 0094 00000000 .word arm_cfft_sR_q31_len512 13188 0098 00000000 .word arm_cfft_sR_q31_len32 13189 009c 00000000 .word arm_cfft_sR_q31_len256 13190 00a0 00000000 .word arm_cfft_sR_q31_len1024 13191 .cfi_endproc 13192 .LFE169: 13194 .section .text.arm_radix2_butterfly_f32,"ax",%progbits 13195 .align 1 13196 .p2align 2,,3 13197 .global arm_radix2_butterfly_f32 13198 .syntax unified 13199 .thumb 13200 .thumb_func 13201 .fpu fpv4-sp-d16 13203 arm_radix2_butterfly_f32: 13204 .LFB171: 13205 .file 16 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Title: arm_cfft_radix2_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** void arm_radix2_butterfly_f32( 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc, 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t fftLen, ARM GAS /tmp/ccfbYRip.s page 444 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const float32_t * pCoef, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t twidCoefModifier); 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** void arm_radix2_butterfly_inverse_f32( 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t fftLen, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const float32_t * pCoef, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t twidCoefModifier, 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t onebyfftLen); 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** extern void arm_bitreversal_f32( 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t fftSize, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t bitRevFactor, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const uint16_t * pBitRevTab); 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @ingroup groupTransforms 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @addtogroup ComplexFFT 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @{ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @brief Radix-2 CFFT/CIFFT. 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @param[in] S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing o 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @return none 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** void arm_cfft_radix2_f32( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const arm_cfft_radix2_instance_f32 * S, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** if (S->ifftFlag == 1U) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Complex IFFT radix-2 */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** S->twidCoefModifier, S->onebyfftLen); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** else 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Complex FFT radix-2 */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** S->twidCoefModifier); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** if (S->bitReverseFlag == 1U) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Bit Reversal */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ARM GAS /tmp/ccfbYRip.s page 445 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** @} end of ComplexFFT group 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* ---------------------------------------------------------------------- 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ** Internal helper function used by the FFTs 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ** ------------------------------------------------------------------- */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** brief Core function for the floating-point CFFT butterfly process. 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** param[in,out] pSrc points to in-place buffer of floating-point data type 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** param[in] fftLen length of the FFT 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** param[in] pCoef points to twiddle coefficient buffer 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wit 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** return none 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** void arm_radix2_butterfly_f32( 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc, 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t fftLen, 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const float32_t * pCoef, 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t twidCoefModifier) 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13206 .loc 16 118 0 13207 .cfi_startproc 13208 @ args = 0, pretend = 0, frame = 16 13209 @ frame_needed = 0, uses_anonymous_args = 0 13210 .LVL1324: 13211 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 13212 .LCFI98: 13213 .cfi_def_cfa_offset 36 13214 .cfi_offset 4, -36 13215 .cfi_offset 5, -32 13216 .cfi_offset 6, -28 13217 .cfi_offset 7, -24 13218 .cfi_offset 8, -20 13219 .cfi_offset 9, -16 13220 .cfi_offset 10, -12 13221 .cfi_offset 11, -8 13222 .cfi_offset 14, -4 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t i, j, k, l; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t n1, n2, ia; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t xt, yt, cosVal, sinVal; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t p0, p1, p2, p3; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t a0, a1; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #if defined (ARM_MATH_DSP) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Initializations for the first stage */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = fftLen >> 1; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; ARM GAS /tmp/ccfbYRip.s page 446 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i = 0; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (k = n2; k > 0; k--) 13223 .loc 16 134 0 13224 0004 4E08 lsrs r6, r1, #1 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13225 .loc 16 118 0 13226 0006 85B0 sub sp, sp, #20 13227 .LCFI99: 13228 .cfi_def_cfa_offset 56 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13229 .loc 16 118 0 13230 0008 8A46 mov r10, r1 13231 .LVL1325: 13232 000a CDE90202 strd r0, r2, [sp, #8] 13233 .loc 16 134 0 13234 000e 00F08C80 beq .L707 13235 0012 F400 lsls r4, r6, #3 13236 0014 9046 mov r8, r2 13237 0016 0746 mov r7, r0 13238 0018 0246 mov r2, r0 13239 .LVL1326: 13240 001a 211D adds r1, r4, #4 13241 .LVL1327: 13242 001c 2044 add r0, r0, r4 13243 .LVL1328: 13244 001e 8646 mov lr, r0 13245 0020 1144 add r1, r1, r2 13246 0022 4FEAC30C lsl ip, r3, #3 13247 0026 0437 adds r7, r7, #4 13248 0028 4546 mov r5, r8 13249 .LVL1329: 13250 .L708: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Twiddle coefficients index modifier */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* index calculation for the input as, */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* pSrc[i + 0], pSrc[i + fftLen/1] */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** /* Butterfly implementation */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 13251 .loc 16 150 0 discriminator 3 13252 002a 92ED017A vldr.32 s14, [r2, #4] 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13253 .loc 16 147 0 discriminator 3 13254 002e 17ED016A vldr.32 s12, [r7, #-4] 13255 0032 51ED016A vldr.32 s13, [r1, #-4] 13256 .loc 16 150 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 447 13257 0036 D0ED017A vldr.32 s15, [r0, #4] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13258 .loc 16 137 0 discriminator 3 13259 003a D5ED015A vldr.32 s11, [r5, #4] 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 13260 .loc 16 136 0 discriminator 3 13261 003e 95ED004A vldr.32 s8, [r5] 13262 .LVL1330: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13263 .loc 16 148 0 discriminator 3 13264 0042 76EE664A vsub.f32 s9, s12, s13 13265 .LVL1331: 13266 .loc 16 150 0 discriminator 3 13267 0046 77EE673A vsub.f32 s7, s14, s15 13268 .LVL1332: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 + p1; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13269 .loc 16 162 0 discriminator 3 13270 004a 24EEE55A vnmul.f32 s10, s9, s11 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 13271 .loc 16 154 0 discriminator 3 13272 004e 65EEA35A vmul.f32 s11, s11, s7 13273 .LVL1333: 13274 .loc 16 162 0 discriminator 3 13275 0052 A4EE235A vfma.f32 s10, s8, s7 13276 0056 0832 adds r2, r2, #8 13277 0058 6544 add r5, r5, ip 13278 .LVL1334: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13279 .loc 16 161 0 discriminator 3 13280 005a E4EE245A vfma.f32 s11, s8, s9 13281 .LVL1335: 13282 005e 0837 adds r7, r7, #8 13283 0060 0831 adds r1, r1, #8 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13284 .loc 16 147 0 discriminator 3 13285 0062 76EE266A vadd.f32 s13, s12, s13 13286 .LVL1336: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13287 .loc 16 151 0 discriminator 3 13288 0066 77EE277A vadd.f32 s15, s14, s15 13289 .LVL1337: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 13290 .loc 16 158 0 discriminator 3 13291 006a 47ED036A vstr.32 s13, [r7, #-12] 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13292 .loc 16 159 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 448 13293 006e 42ED017A vstr.32 s15, [r2, #-4] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13294 .loc 16 134 0 discriminator 3 13295 0072 9645 cmp lr, r2 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13296 .loc 16 161 0 discriminator 3 13297 0074 41ED035A vstr.32 s11, [r1, #-12] 13298 0078 00F10800 add r0, r0, #8 13299 .loc 16 162 0 discriminator 3 13300 007c 00ED015A vstr.32 s10, [r0, #-4] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13301 .loc 16 134 0 discriminator 3 13302 0080 D3D1 bne .L708 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i++; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // groups loop end 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier <<= 1U; 13303 .loc 16 167 0 13304 0082 5B00 lsls r3, r3, #1 13305 .LVL1338: 13306 0084 9BB2 uxth r3, r3 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for stage 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (k = n2; k > 2; k = k >> 1) 13307 .loc 16 170 0 13308 0086 022E cmp r6, #2 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13309 .loc 16 167 0 13310 0088 0193 str r3, [sp, #4] 13311 .LVL1339: 13312 .loc 16 170 0 13313 008a 4FD9 bls .L715 13314 .LVL1340: 13315 .L712: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n1 = n2; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = n2 >> 1; 13316 .loc 16 173 0 13317 008c 4FEA5608 lsr r8, r6, #1 13318 .LVL1341: 13319 0090 DDE9027E ldrd r7, lr, [sp, #8] 13320 0094 4FEAC809 lsl r9, r8, #3 13321 0098 DB00 lsls r3, r3, #3 13322 009a 09F1040B add fp, r9, #4 13323 009e 0093 str r3, [sp] 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j = 0; 13324 .loc 16 177 0 13325 00a0 4FF0000C mov ip, #0 13326 .LVL1342: 13327 .L711: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; ARM GAS /tmp/ccfbYRip.s page 449 13328 .loc 16 180 0 13329 00a4 9EED003A vldr.32 s6, [lr] 13330 .LVL1343: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 13331 .loc 16 181 0 13332 00a8 DEED013A vldr.32 s7, [lr, #4] 13333 .LVL1344: 13334 00ac 09EB0700 add r0, r9, r7 13335 00b0 391D adds r1, r7, #4 13336 00b2 0BEB0702 add r2, fp, r7 13337 00b6 3B46 mov r3, r7 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i = j; 13338 .loc 16 185 0 13339 00b8 6546 mov r5, ip 13340 .LVL1345: 13341 .L710: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 13342 .loc 16 189 0 discriminator 1 13343 00ba 11ED016A vldr.32 s12, [r1, #-4] 13344 00be 52ED016A vldr.32 s13, [r2, #-4] 13345 .LVL1346: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 13346 .loc 16 192 0 discriminator 1 13347 00c2 93ED017A vldr.32 s14, [r3, #4] 13348 00c6 D0ED017A vldr.32 s15, [r0, #4] 13349 .LVL1347: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13350 .loc 16 190 0 discriminator 1 13351 00ca 76EE664A vsub.f32 s9, s12, s13 13352 .LVL1348: 13353 .loc 16 192 0 discriminator 1 13354 00ce 37EE674A vsub.f32 s8, s14, s15 13355 .LVL1349: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 + p1; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13356 .loc 16 204 0 discriminator 1 13357 00d2 64EEE35A vnmul.f32 s11, s9, s7 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 13358 .loc 16 196 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 450 13359 00d6 23EE845A vmul.f32 s10, s7, s8 13360 .LVL1350: 13361 .loc 16 204 0 discriminator 1 13362 00da E3EE045A vfma.f32 s11, s6, s8 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i += n1; 13363 .loc 16 206 0 discriminator 1 13364 00de 3544 add r5, r5, r6 13365 .LVL1351: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while ( i < fftLen ); // butterfly loop end 13366 .loc 16 207 0 discriminator 1 13367 00e0 AA45 cmp r10, r5 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13368 .loc 16 203 0 discriminator 1 13369 00e2 A3EE245A vfma.f32 s10, s6, s9 13370 .LVL1352: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13371 .loc 16 189 0 discriminator 1 13372 00e6 76EE266A vadd.f32 s13, s12, s13 13373 .LVL1353: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13374 .loc 16 193 0 discriminator 1 13375 00ea 77EE277A vadd.f32 s15, s14, s15 13376 .LVL1354: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 13377 .loc 16 200 0 discriminator 1 13378 00ee 41ED016A vstr.32 s13, [r1, #-4] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13379 .loc 16 201 0 discriminator 1 13380 00f2 C3ED017A vstr.32 s15, [r3, #4] 13381 00f6 2144 add r1, r1, r4 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 13382 .loc 16 203 0 discriminator 1 13383 00f8 02ED015A vstr.32 s10, [r2, #-4] 13384 00fc 2344 add r3, r3, r4 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13385 .loc 16 204 0 discriminator 1 13386 00fe C0ED015A vstr.32 s11, [r0, #4] 13387 0102 2244 add r2, r2, r4 13388 0104 2044 add r0, r0, r4 13389 .loc 16 207 0 discriminator 1 13390 0106 D8D8 bhi .L710 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j++; 13391 .loc 16 208 0 13392 0108 0CF1010C add ip, ip, #1 13393 .LVL1355: 13394 010c 009B ldr r3, [sp] 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while ( j < n2); // groups loop end 13395 .loc 16 209 0 13396 010e E045 cmp r8, ip 13397 0110 9E44 add lr, lr, r3 13398 0112 07F10807 add r7, r7, #8 13399 0116 C5D1 bne .L711 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier <<= 1U; 13400 .loc 16 210 0 discriminator 2 13401 0118 019B ldr r3, [sp, #4] 13402 011a 4646 mov r6, r8 ARM GAS /tmp/ccfbYRip.s page 451 13403 .LVL1356: 13404 011c 5B00 lsls r3, r3, #1 13405 011e 9BB2 uxth r3, r3 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13406 .loc 16 170 0 discriminator 2 13407 0120 022E cmp r6, #2 13408 .loc 16 210 0 discriminator 2 13409 0122 0193 str r3, [sp, #4] 13410 .LVL1357: 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13411 .loc 16 170 0 discriminator 2 13412 0124 02D9 bls .L715 13413 0126 F400 lsls r4, r6, #3 13414 0128 B0E7 b .L712 13415 .LVL1358: 13416 .L707: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // stages loop end 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (i = 0; i < fftLen; i += 2) 13417 .loc 16 214 0 13418 012a 11B3 cbz r1, .L706 13419 .LVL1359: 13420 .L715: 13421 012c 0298 ldr r0, [sp, #8] 13422 012e 0AF1FF33 add r3, r10, #-1 13423 0132 5B08 lsrs r3, r3, #1 13424 0134 00F11002 add r2, r0, #16 13425 0138 02EB0313 add r3, r2, r3, lsl #4 13426 .LVL1360: 13427 .L714: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * i + 2]; 13428 .loc 16 216 0 discriminator 3 13429 013c 90ED006A vldr.32 s12, [r0] 13430 0140 D0ED026A vldr.32 s13, [r0, #8] 13431 .LVL1361: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * i + 3]; 13432 .loc 16 219 0 discriminator 3 13433 0144 90ED017A vldr.32 s14, [r0, #4] 13434 0148 D0ED037A vldr.32 s15, [r0, #12] 13435 .LVL1362: 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 13436 .loc 16 216 0 discriminator 3 13437 014c 76EE265A vadd.f32 s11, s12, s13 13438 .LVL1363: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 13439 .loc 16 217 0 discriminator 3 13440 0150 76EE666A vsub.f32 s13, s12, s13 13441 .LVL1364: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1]; 13442 .loc 16 220 0 discriminator 3 13443 0154 37EE276A vadd.f32 s12, s14, s15 13444 .LVL1365: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1]; ARM GAS /tmp/ccfbYRip.s page 452 13445 .loc 16 219 0 discriminator 3 13446 0158 77EE677A vsub.f32 s15, s14, s15 13447 .LVL1366: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 13448 .loc 16 222 0 discriminator 3 13449 015c C0ED005A vstr.32 s11, [r0] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 2] = xt; 13450 .loc 16 224 0 discriminator 3 13451 0160 C0ED026A vstr.32 s13, [r0, #8] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 13452 .loc 16 223 0 discriminator 3 13453 0164 80ED016A vstr.32 s12, [r0, #4] 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 3] = yt; 13454 .loc 16 225 0 discriminator 3 13455 0168 C0ED037A vstr.32 s15, [r0, #12] 13456 016c 1030 adds r0, r0, #16 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13457 .loc 16 214 0 discriminator 3 13458 016e 9842 cmp r0, r3 13459 0170 E4D1 bne .L714 13460 .LVL1367: 13461 .L706: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // groups loop end 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #else /* #if defined (ARM_MATH_DSP) */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = fftLen; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for stage 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (k = fftLen; k > 1; k = k >> 1) 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n1 = n2; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = n2 >> 1; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j = 0; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i = j; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; ARM GAS /tmp/ccfbYRip.s page 453 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 + p1; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 - p3; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i += n1; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while (i < fftLen); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j++; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while (j < n2); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier <<= 1U; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #endif /* #if defined (ARM_MATH_DSP) */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 13462 .loc 16 278 0 13463 0172 05B0 add sp, sp, #20 13464 .LCFI100: 13465 .cfi_def_cfa_offset 36 13466 @ sp needed 13467 0174 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 13468 .cfi_endproc 13469 .LFE171: 13471 .section .text.arm_radix2_butterfly_inverse_f32,"ax",%progbits 13472 .align 1 13473 .p2align 2,,3 13474 .global arm_radix2_butterfly_inverse_f32 13475 .syntax unified 13476 .thumb 13477 .thumb_func 13478 .fpu fpv4-sp-d16 13480 arm_radix2_butterfly_inverse_f32: 13481 .LFB172: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** void arm_radix2_butterfly_inverse_f32( 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t * pSrc, 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t fftLen, 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** const float32_t * pCoef, 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint16_t twidCoefModifier, 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t onebyfftLen) 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13482 .loc 16 287 0 13483 .cfi_startproc 13484 @ args = 0, pretend = 0, frame = 16 13485 @ frame_needed = 0, uses_anonymous_args = 0 13486 .LVL1368: 13487 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 13488 .LCFI101: 13489 .cfi_def_cfa_offset 36 13490 .cfi_offset 4, -36 13491 .cfi_offset 5, -32 ARM GAS /tmp/ccfbYRip.s page 454 13492 .cfi_offset 6, -28 13493 .cfi_offset 7, -24 13494 .cfi_offset 8, -20 13495 .cfi_offset 9, -16 13496 .cfi_offset 10, -12 13497 .cfi_offset 11, -8 13498 .cfi_offset 14, -4 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t i, j, k, l; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** uint32_t n1, n2, ia; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t xt, yt, cosVal, sinVal; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t p0, p1, p2, p3; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** float32_t a0, a1; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #if defined (ARM_MATH_DSP) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = fftLen >> 1; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (i = 0; i < n2; i++) 13499 .loc 16 301 0 13500 0004 4E08 lsrs r6, r1, #1 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13501 .loc 16 287 0 13502 0006 85B0 sub sp, sp, #20 13503 .LCFI102: 13504 .cfi_def_cfa_offset 56 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13505 .loc 16 287 0 13506 0008 8A46 mov r10, r1 13507 .LVL1369: 13508 000a CDE90202 strd r0, r2, [sp, #8] 13509 .loc 16 301 0 13510 000e 00F08C80 beq .L727 13511 0012 F400 lsls r4, r6, #3 13512 0014 9046 mov r8, r2 13513 0016 0746 mov r7, r0 13514 0018 0246 mov r2, r0 13515 .LVL1370: 13516 001a 211D adds r1, r4, #4 13517 .LVL1371: 13518 001c 2044 add r0, r0, r4 13519 .LVL1372: 13520 001e 8646 mov lr, r0 13521 0020 1144 add r1, r1, r2 13522 0022 4FEAC30C lsl ip, r3, #3 13523 0026 0437 adds r7, r7, #4 13524 0028 4546 mov r5, r8 13525 .LVL1373: 13526 .L728: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; ARM GAS /tmp/ccfbYRip.s page 455 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 13527 .loc 16 311 0 discriminator 3 13528 002a 92ED017A vldr.32 s14, [r2, #4] 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13529 .loc 16 308 0 discriminator 3 13530 002e 17ED016A vldr.32 s12, [r7, #-4] 13531 0032 51ED016A vldr.32 s13, [r1, #-4] 13532 .loc 16 311 0 discriminator 3 13533 0036 D0ED017A vldr.32 s15, [r0, #4] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 13534 .loc 16 304 0 discriminator 3 13535 003a D5ED015A vldr.32 s11, [r5, #4] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 13536 .loc 16 303 0 discriminator 3 13537 003e 95ED004A vldr.32 s8, [r5] 13538 .LVL1374: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13539 .loc 16 309 0 discriminator 3 13540 0042 76EE664A vsub.f32 s9, s12, s13 13541 .LVL1375: 13542 .loc 16 311 0 discriminator 3 13543 0046 77EE673A vsub.f32 s7, s14, s15 13544 .LVL1376: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 13545 .loc 16 317 0 discriminator 3 13546 004a 25EEA45A vmul.f32 s10, s11, s9 13547 .LVL1377: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 - p1; 13548 .loc 16 322 0 discriminator 3 13549 004e 63EEE55A vnmul.f32 s11, s7, s11 13550 .LVL1378: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13551 .loc 16 323 0 discriminator 3 13552 0052 A4EE235A vfma.f32 s10, s8, s7 13553 .LVL1379: 13554 0056 0832 adds r2, r2, #8 13555 0058 6544 add r5, r5, ip 13556 .LVL1380: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13557 .loc 16 322 0 discriminator 3 13558 005a E4EE245A vfma.f32 s11, s8, s9 13559 005e 0837 adds r7, r7, #8 13560 0060 0831 adds r1, r1, #8 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13561 .loc 16 308 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 456 13562 0062 76EE266A vadd.f32 s13, s12, s13 13563 .LVL1381: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13564 .loc 16 312 0 discriminator 3 13565 0066 77EE277A vadd.f32 s15, s14, s15 13566 .LVL1382: 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 13567 .loc 16 319 0 discriminator 3 13568 006a 47ED036A vstr.32 s13, [r7, #-12] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13569 .loc 16 320 0 discriminator 3 13570 006e 42ED017A vstr.32 s15, [r2, #-4] 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13571 .loc 16 301 0 discriminator 3 13572 0072 9645 cmp lr, r2 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13573 .loc 16 322 0 discriminator 3 13574 0074 41ED035A vstr.32 s11, [r1, #-12] 13575 0078 00F10800 add r0, r0, #8 13576 .loc 16 323 0 discriminator 3 13577 007c 00ED015A vstr.32 s10, [r0, #-4] 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13578 .loc 16 301 0 discriminator 3 13579 0080 D3D1 bne .L728 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // groups loop end 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier <<= 1U; 13580 .loc 16 326 0 13581 0082 5B00 lsls r3, r3, #1 13582 .LVL1383: 13583 0084 9BB2 uxth r3, r3 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for stage 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 13584 .loc 16 329 0 13585 0086 022E cmp r6, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13586 .loc 16 326 0 13587 0088 0193 str r3, [sp, #4] 13588 .LVL1384: 13589 .loc 16 329 0 13590 008a 4FD9 bls .L735 13591 .LVL1385: 13592 .L732: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n1 = n2; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = n2 >> 1; 13593 .loc 16 332 0 13594 008c 4FEA5608 lsr r8, r6, #1 13595 .LVL1386: 13596 0090 DDE9027E ldrd r7, lr, [sp, #8] 13597 0094 4FEAC809 lsl r9, r8, #3 13598 0098 DB00 lsls r3, r3, #3 13599 009a 09F1040B add fp, r9, #4 13600 009e 0093 str r3, [sp] 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ARM GAS /tmp/ccfbYRip.s page 457 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j = 0; 13601 .loc 16 336 0 13602 00a0 4FF0000C mov ip, #0 13603 .LVL1387: 13604 .L731: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; 13605 .loc 16 339 0 13606 00a4 9EED003A vldr.32 s6, [lr] 13607 .LVL1388: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 13608 .loc 16 340 0 13609 00a8 DEED013A vldr.32 s7, [lr, #4] 13610 .LVL1389: 13611 00ac 09EB0700 add r0, r9, r7 13612 00b0 391D adds r1, r7, #4 13613 00b2 0BEB0702 add r2, fp, r7 13614 00b6 3B46 mov r3, r7 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia += twidCoefModifier; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i = j; 13615 .loc 16 344 0 13616 00b8 6546 mov r5, ip 13617 .LVL1390: 13618 .L730: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 13619 .loc 16 348 0 discriminator 1 13620 00ba 11ED016A vldr.32 s12, [r1, #-4] 13621 00be 52ED016A vldr.32 s13, [r2, #-4] 13622 .LVL1391: 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 13623 .loc 16 351 0 discriminator 1 13624 00c2 93ED017A vldr.32 s14, [r3, #4] 13625 00c6 D0ED017A vldr.32 s15, [r0, #4] 13626 .LVL1392: 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13627 .loc 16 349 0 discriminator 1 13628 00ca 76EE664A vsub.f32 s9, s12, s13 13629 .LVL1393: 13630 .loc 16 351 0 discriminator 1 13631 00ce 37EE674A vsub.f32 s8, s14, s15 13632 .LVL1394: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 13633 .loc 16 357 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 458 13634 00d2 63EEA45A vmul.f32 s11, s7, s9 13635 .LVL1395: 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 - p1; 13636 .loc 16 362 0 discriminator 1 13637 00d6 24EE635A vnmul.f32 s10, s8, s7 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13638 .loc 16 363 0 discriminator 1 13639 00da E3EE045A vfma.f32 s11, s6, s8 13640 .LVL1396: 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i += n1; 13641 .loc 16 365 0 discriminator 1 13642 00de 3544 add r5, r5, r6 13643 .LVL1397: 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while ( i < fftLen ); // butterfly loop end 13644 .loc 16 366 0 discriminator 1 13645 00e0 AA45 cmp r10, r5 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13646 .loc 16 362 0 discriminator 1 13647 00e2 A3EE245A vfma.f32 s10, s6, s9 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 13648 .loc 16 348 0 discriminator 1 13649 00e6 76EE266A vadd.f32 s13, s12, s13 13650 .LVL1398: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13651 .loc 16 352 0 discriminator 1 13652 00ea 77EE277A vadd.f32 s15, s14, s15 13653 .LVL1399: 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 13654 .loc 16 359 0 discriminator 1 13655 00ee 41ED016A vstr.32 s13, [r1, #-4] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13656 .loc 16 360 0 discriminator 1 13657 00f2 C3ED017A vstr.32 s15, [r3, #4] 13658 00f6 2144 add r1, r1, r4 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 13659 .loc 16 362 0 discriminator 1 13660 00f8 02ED015A vstr.32 s10, [r2, #-4] 13661 00fc 2344 add r3, r3, r4 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13662 .loc 16 363 0 discriminator 1 13663 00fe C0ED015A vstr.32 s11, [r0, #4] 13664 0102 2244 add r2, r2, r4 13665 0104 2044 add r0, r0, r4 13666 .loc 16 366 0 discriminator 1 13667 0106 D8D8 bhi .L730 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j++; 13668 .loc 16 367 0 13669 0108 0CF1010C add ip, ip, #1 13670 .LVL1400: 13671 010c 009B ldr r3, [sp] 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while (j < n2); // groups loop end 13672 .loc 16 368 0 ARM GAS /tmp/ccfbYRip.s page 459 13673 010e E045 cmp r8, ip 13674 0110 9E44 add lr, lr, r3 13675 0112 07F10807 add r7, r7, #8 13676 0116 C5D8 bhi .L731 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier <<= 1U; 13677 .loc 16 370 0 discriminator 2 13678 0118 019B ldr r3, [sp, #4] 13679 011a 4646 mov r6, r8 13680 .LVL1401: 13681 011c 5B00 lsls r3, r3, #1 13682 011e 9BB2 uxth r3, r3 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13683 .loc 16 329 0 discriminator 2 13684 0120 022E cmp r6, #2 13685 .loc 16 370 0 discriminator 2 13686 0122 0193 str r3, [sp, #4] 13687 .LVL1402: 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13688 .loc 16 329 0 discriminator 2 13689 0124 02D9 bls .L735 13690 0126 F400 lsls r4, r6, #3 13691 0128 B0E7 b .L732 13692 .LVL1403: 13693 .L727: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // stages loop end 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (i = 0; i < fftLen; i += 2) 13694 .loc 16 374 0 13695 012a 51B3 cbz r1, .L726 13696 .LVL1404: 13697 .L735: 13698 012c 0298 ldr r0, [sp, #8] 13699 012e 0AF1FF33 add r3, r10, #-1 13700 0132 5B08 lsrs r3, r3, #1 13701 0134 00F11002 add r2, r0, #16 13702 0138 02EB0313 add r3, r2, r3, lsl #4 13703 .LVL1405: 13704 .L734: 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * i + 2]; 13705 .loc 16 376 0 discriminator 3 13706 013c 90ED006A vldr.32 s12, [r0] 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1]; 13707 .loc 16 379 0 discriminator 3 13708 0140 90ED017A vldr.32 s14, [r0, #4] 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 13709 .loc 16 376 0 discriminator 3 13710 0144 D0ED026A vldr.32 s13, [r0, #8] 13711 .LVL1406: 13712 .loc 16 379 0 discriminator 3 13713 0148 D0ED037A vldr.32 s15, [r0, #12] 13714 .LVL1407: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; ARM GAS /tmp/ccfbYRip.s page 460 13715 .loc 16 376 0 discriminator 3 13716 014c 76EE265A vadd.f32 s11, s12, s13 13717 .LVL1408: 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * i + 2]; 13718 .loc 16 377 0 discriminator 3 13719 0150 76EE666A vsub.f32 s13, s12, s13 13720 .LVL1409: 13721 .loc 16 379 0 discriminator 3 13722 0154 37EE876A vadd.f32 s12, s15, s14 13723 .LVL1410: 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * i + 3]; 13724 .loc 16 380 0 discriminator 3 13725 0158 77EE677A vsub.f32 s15, s14, s15 13726 .LVL1411: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = a0 * onebyfftLen; 13727 .loc 16 382 0 discriminator 3 13728 015c 65EE805A vmul.f32 s11, s11, s0 13729 .LVL1412: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = xt * onebyfftLen; 13730 .loc 16 383 0 discriminator 3 13731 0160 66EE806A vmul.f32 s13, s13, s0 13732 .LVL1413: 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = a1 * onebyfftLen; 13733 .loc 16 384 0 discriminator 3 13734 0164 26EE007A vmul.f32 s14, s12, s0 13735 .LVL1414: 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = yt * onebyfftLen; 13736 .loc 16 385 0 discriminator 3 13737 0168 67EE807A vmul.f32 s15, s15, s0 13738 .LVL1415: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = p0; 13739 .loc 16 387 0 discriminator 3 13740 016c C0ED005A vstr.32 s11, [r0] 13741 .LVL1416: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = p1; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 2] = p2; 13742 .loc 16 389 0 discriminator 3 13743 0170 C0ED026A vstr.32 s13, [r0, #8] 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = p1; 13744 .loc 16 388 0 discriminator 3 13745 0174 80ED017A vstr.32 s14, [r0, #4] 13746 .LVL1417: 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 3] = p3; 13747 .loc 16 390 0 discriminator 3 13748 0178 C0ED037A vstr.32 s15, [r0, #12] 13749 017c 1030 adds r0, r0, #16 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13750 .loc 16 374 0 discriminator 3 13751 017e 9842 cmp r0, r3 13752 0180 DCD1 bne .L734 13753 .LVL1418: 13754 .L726: 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // butterfly loop end 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #else /* #if defined (ARM_MATH_DSP) */ ARM GAS /tmp/ccfbYRip.s page 461 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = fftLen; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for stage 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (k = fftLen; k > 2; k = k >> 1) 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n1 = n2; 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = n2 >> 1; 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = 0; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for groups 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j = 0; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** cosVal = pCoef[ia * 2]; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** sinVal = pCoef[(ia * 2) + 1]; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** ia = ia + twidCoefModifier; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i = j; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** do 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = xt * cosVal; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = yt * sinVal; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = yt * cosVal; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = xt * sinVal; 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = a0; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = a1; 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p0 - p1; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p2 + p3; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** i += n1; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while ( i < fftLen ); // butterfly loop end 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** j++; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } while ( j < n2 ); // groups loop end 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** twidCoefModifier = twidCoefModifier << 1U; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // stages loop end 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n1 = n2; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** n2 = n2 >> 1; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** // loop for butterfly 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** for (i = 0; i < fftLen; i += n1) 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** l = i + n2; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a0 = pSrc[2 * i] + pSrc[2 * l]; ARM GAS /tmp/ccfbYRip.s page 462 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p0 = a0 * onebyfftLen; 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p2 = xt * onebyfftLen; 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p1 = a1 * onebyfftLen; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** p3 = yt * onebyfftLen; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i] = p0; 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l] = p2; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * i + 1] = p1; 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** pSrc[2 * l + 1] = p3; 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } // butterfly loop end 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** #endif /* #if defined (ARM_MATH_DSP) */ 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 13755 .loc 16 470 0 13756 0182 05B0 add sp, sp, #20 13757 .LCFI103: 13758 .cfi_def_cfa_offset 36 13759 @ sp needed 13760 0184 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 13761 .cfi_endproc 13762 .LFE172: 13764 .section .text.arm_cfft_radix2_f32,"ax",%progbits 13765 .align 1 13766 .p2align 2,,3 13767 .global arm_cfft_radix2_f32 13768 .syntax unified 13769 .thumb 13770 .thumb_func 13771 .fpu fpv4-sp-d16 13773 arm_cfft_radix2_f32: 13774 .LFB170: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13775 .loc 16 70 0 13776 .cfi_startproc 13777 @ args = 0, pretend = 0, frame = 0 13778 @ frame_needed = 0, uses_anonymous_args = 0 13779 .LVL1419: 13780 0000 70B5 push {r4, r5, r6, lr} 13781 .LCFI104: 13782 .cfi_def_cfa_offset 16 13783 .cfi_offset 4, -16 13784 .cfi_offset 5, -12 13785 .cfi_offset 6, -8 13786 .cfi_offset 14, -4 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13787 .loc 16 70 0 13788 0002 0446 mov r4, r0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13789 .loc 16 72 0 13790 0004 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 ARM GAS /tmp/ccfbYRip.s page 463 13791 .LVL1420: 13792 0006 6268 ldr r2, [r4, #4] 13793 0008 A389 ldrh r3, [r4, #12] 13794 000a 0128 cmp r0, #1 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13795 .loc 16 70 0 13796 000c 0D46 mov r5, r1 13797 000e 2188 ldrh r1, [r4] 13798 .LVL1421: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13799 .loc 16 72 0 13800 0010 06D0 beq .L751 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** S->twidCoefModifier); 13801 .loc 16 81 0 13802 0012 2846 mov r0, r5 13803 0014 FFF7FEFF bl arm_radix2_butterfly_f32 13804 .LVL1422: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13805 .loc 16 85 0 13806 0018 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 13807 001a 012B cmp r3, #1 13808 001c 08D0 beq .L752 13809 .L746: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13810 .loc 16 91 0 13811 001e 70BD pop {r4, r5, r6, pc} 13812 .LVL1423: 13813 .L751: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** S->twidCoefModifier, S->onebyfftLen); 13814 .loc 16 75 0 13815 0020 94ED040A vldr.32 s0, [r4, #16] 13816 0024 2846 mov r0, r5 13817 0026 FFF7FEFF bl arm_radix2_butterfly_inverse_f32 13818 .LVL1424: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** { 13819 .loc 16 85 0 13820 002a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 13821 002c 012B cmp r3, #1 13822 002e F6D1 bne .L746 13823 .L752: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } 13824 .loc 16 88 0 13825 0030 2846 mov r0, r5 13826 0032 A368 ldr r3, [r4, #8] 13827 0034 E289 ldrh r2, [r4, #14] 13828 0036 2188 ldrh r1, [r4] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** 13829 .loc 16 91 0 13830 0038 BDE87040 pop {r4, r5, r6, lr} 13831 .LCFI105: 13832 .cfi_restore 14 13833 .cfi_restore 6 13834 .cfi_restore 5 13835 .cfi_restore 4 13836 .cfi_def_cfa_offset 0 13837 .LVL1425: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c **** } ARM GAS /tmp/ccfbYRip.s page 464 13838 .loc 16 88 0 13839 003c FFF7FEBF b arm_bitreversal_f32 13840 .LVL1426: 13841 .cfi_endproc 13842 .LFE170: 13844 .section .text.arm_cfft_radix2_init_f32,"ax",%progbits 13845 .align 1 13846 .p2align 2,,3 13847 .global arm_cfft_radix2_init_f32 13848 .syntax unified 13849 .thumb 13850 .thumb_func 13851 .fpu fpv4-sp-d16 13853 arm_cfft_radix2_init_f32: 13854 .LFB173: 13855 .file 17 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Title: arm_cfft_radix2_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization functio 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @addtogroup ComplexFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /** ARM GAS /tmp/ccfbYRip.s page 465 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @brief Initialization function for the floating-point CFFT/CIFFT. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @param[in] fftLen length of the FFT 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @param[in] ifftFlag flag that selects transform direction 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - value = 0: forward transform 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - value = 1: inverse transform 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - value = 0: disables bit reversal of output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - value = 1: enables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @return execution status 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @par Details 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** The parameter ifftFlag controls whether a forward or inverse transf 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** The parameter bitReverseFlag controls whether output is in normal o 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @par 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** @par 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** arm_status arm_cfft_radix2_init_f32( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** arm_cfft_radix2_instance_f32 * S, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** uint16_t fftLen, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** uint8_t ifftFlag, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** uint8_t bitReverseFlag) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** { 13856 .loc 17 73 0 13857 .cfi_startproc 13858 @ args = 0, pretend = 0, frame = 0 13859 @ frame_needed = 0, uses_anonymous_args = 0 13860 @ link register save eliminated. 13861 .LVL1427: 13862 0000 10B4 push {r4} 13863 .LCFI106: 13864 .cfi_def_cfa_offset 4 13865 .cfi_offset 4, -4 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the default arm status */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the FFT length */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->fftLen = fftLen; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the Twiddle coefficient pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pTwiddle = (float32_t *) twiddleCoef; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->ifftFlag = ifftFlag; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the Flag for calculation Bit reversal or not */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitReverseFlag = bitReverseFlag; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 466 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters depending on the FFT length */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** switch (S->fftLen) 13866 .loc 17 90 0 13867 0002 B1F5807F cmp r1, #256 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13868 .loc 17 81 0 13869 0006 474C ldr r4, .L772 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13870 .loc 17 84 0 13871 0008 8270 strb r2, [r0, #2] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13872 .loc 17 87 0 13873 000a C370 strb r3, [r0, #3] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13874 .loc 17 78 0 13875 000c 0180 strh r1, [r0] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13876 .loc 17 81 0 13877 000e 4460 str r4, [r0, #4] 13878 .loc 17 90 0 13879 0010 6AD0 beq .L755 13880 0012 15D9 bls .L769 13881 0014 B1F5806F cmp r1, #1024 13882 0018 72D0 beq .L762 13883 001a 4AD9 bls .L770 13884 001c B1F5006F cmp r1, #2048 13885 0020 2DD0 beq .L765 13886 0022 B1F5805F cmp r1, #4096 13887 0026 77D1 bne .L767 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 4096U: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 4096 point FFT */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the twiddle coef modifier value */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 1U; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 1U; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.000244140625; 13888 .loc 17 103 0 13889 0028 4FF06652 mov r2, #964689920 13890 .LVL1428: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 13891 .loc 17 101 0 13892 002c 3E4B ldr r3, .L772+4 13893 .LVL1429: 13894 .loc 17 103 0 13895 002e 0261 str r2, [r0, #16] @ float 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 13896 .loc 17 97 0 13897 0030 4FF00112 mov r2, #65537 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 13898 .loc 17 101 0 13899 0034 C0E90232 strd r3, r2, [r0, #8] ARM GAS /tmp/ccfbYRip.s page 467 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 2048U: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 2048 point FFT */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the twiddle coef modifier value */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 2U; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 2U; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table pointer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.00048828125; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 1024U: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 1024 point FFT */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the twiddle coef modifier value */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 4U; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 4U; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table pointer */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0009765625f; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 512U: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 512 point FFT */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the twiddle coef modifier value */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 8U; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 8U; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table pointer */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.001953125; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 256U: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 256 point FFT */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 16U; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 16U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.00390625f; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 128U: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 128 point FFT */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 32U; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 32U; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0078125; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 468 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 64U: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 64 point FFT */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 64U; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 64U; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.015625f; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 32U: 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 64 point FFT */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 128U; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 128U; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.03125; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** case 16U: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initializations of structure parameters for 16 point FFT */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->twidCoefModifier = 256U; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 256U; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0625f; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** default: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Reporting argument error if fftSize is not valid value */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** } 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** return (status); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** } 13900 .loc 17 193 0 13901 0038 5DF8044B ldr r4, [sp], #4 13902 .LCFI107: 13903 .cfi_remember_state 13904 .cfi_restore 4 13905 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13906 .loc 17 75 0 13907 003c 0020 movs r0, #0 13908 .LVL1430: 13909 .loc 17 193 0 13910 003e 7047 bx lr 13911 .LVL1431: 13912 .L769: 13913 .LCFI108: 13914 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** { 13915 .loc 17 90 0 13916 0040 2029 cmp r1, #32 13917 0042 45D0 beq .L757 13918 0044 27D9 bls .L771 13919 0046 4029 cmp r1, #64 13920 0048 0DD0 beq .L760 13921 004a 8029 cmp r1, #128 ARM GAS /tmp/ccfbYRip.s page 469 13922 004c 64D1 bne .L767 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13923 .loc 17 158 0 13924 004e 4FF07052 mov r2, #1006632960 13925 .LVL1432: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0078125; 13926 .loc 17 157 0 13927 0052 364B ldr r3, .L772+8 13928 .LVL1433: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13929 .loc 17 158 0 13930 0054 0261 str r2, [r0, #16] @ float 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 32U; 13931 .loc 17 155 0 13932 0056 4FF02012 mov r2, #2097184 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0078125; 13933 .loc 17 157 0 13934 005a C0E90232 strd r3, r2, [r0, #8] 13935 .loc 17 193 0 13936 005e 5DF8044B ldr r4, [sp], #4 13937 .LCFI109: 13938 .cfi_remember_state 13939 .cfi_restore 4 13940 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13941 .loc 17 75 0 13942 0062 0020 movs r0, #0 13943 .LVL1434: 13944 .loc 17 193 0 13945 0064 7047 bx lr 13946 .LVL1435: 13947 .L760: 13948 .LCFI110: 13949 .cfi_restore_state 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13950 .loc 17 166 0 13951 0066 4FF07252 mov r2, #1015021568 13952 .LVL1436: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.015625f; 13953 .loc 17 165 0 13954 006a 314B ldr r3, .L772+12 13955 .LVL1437: 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13956 .loc 17 166 0 13957 006c 0261 str r2, [r0, #16] @ float 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 64U; 13958 .loc 17 163 0 13959 006e 4FF04012 mov r2, #4194368 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.015625f; 13960 .loc 17 165 0 13961 0072 C0E90232 strd r3, r2, [r0, #8] 13962 .loc 17 193 0 13963 0076 5DF8044B ldr r4, [sp], #4 13964 .LCFI111: 13965 .cfi_remember_state 13966 .cfi_restore 4 13967 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccfbYRip.s page 470 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13968 .loc 17 75 0 13969 007a 0020 movs r0, #0 13970 .LVL1438: 13971 .loc 17 193 0 13972 007c 7047 bx lr 13973 .LVL1439: 13974 .L765: 13975 .LCFI112: 13976 .cfi_restore_state 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13977 .loc 17 116 0 13978 007e 4FF06852 mov r2, #973078528 13979 .LVL1440: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 13980 .loc 17 114 0 13981 0082 2C4B ldr r3, .L772+16 13982 .LVL1441: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 13983 .loc 17 116 0 13984 0084 0261 str r2, [r0, #16] @ float 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 13985 .loc 17 110 0 13986 0086 4FF00212 mov r2, #131074 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 13987 .loc 17 114 0 13988 008a C0E90232 strd r3, r2, [r0, #8] 13989 .loc 17 193 0 13990 008e 5DF8044B ldr r4, [sp], #4 13991 .LCFI113: 13992 .cfi_remember_state 13993 .cfi_restore 4 13994 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 13995 .loc 17 75 0 13996 0092 0020 movs r0, #0 13997 .LVL1442: 13998 .loc 17 193 0 13999 0094 7047 bx lr 14000 .LVL1443: 14001 .L771: 14002 .LCFI114: 14003 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** { 14004 .loc 17 90 0 14005 0096 1029 cmp r1, #16 14006 0098 3ED1 bne .L767 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14007 .loc 17 182 0 14008 009a 4FF07652 mov r2, #1031798784 14009 .LVL1444: 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0625f; 14010 .loc 17 181 0 14011 009e 264B ldr r3, .L772+20 14012 .LVL1445: 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14013 .loc 17 182 0 ARM GAS /tmp/ccfbYRip.s page 471 14014 00a0 0261 str r2, [r0, #16] @ float 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 256U; 14015 .loc 17 179 0 14016 00a2 4FF00122 mov r2, #16777472 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.0625f; 14017 .loc 17 181 0 14018 00a6 C0E90232 strd r3, r2, [r0, #8] 14019 .loc 17 193 0 14020 00aa 5DF8044B ldr r4, [sp], #4 14021 .LCFI115: 14022 .cfi_remember_state 14023 .cfi_restore 4 14024 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 14025 .loc 17 75 0 14026 00ae 0020 movs r0, #0 14027 .LVL1446: 14028 .loc 17 193 0 14029 00b0 7047 bx lr 14030 .LVL1447: 14031 .L770: 14032 .LCFI116: 14033 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** { 14034 .loc 17 90 0 14035 00b2 B1F5007F cmp r1, #512 14036 00b6 2FD1 bne .L767 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14037 .loc 17 142 0 14038 00b8 4FF06C52 mov r2, #989855744 14039 .LVL1448: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 14040 .loc 17 140 0 14041 00bc 1F4B ldr r3, .L772+24 14042 .LVL1449: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14043 .loc 17 142 0 14044 00be 0261 str r2, [r0, #16] @ float 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 14045 .loc 17 136 0 14046 00c0 4FF00812 mov r2, #524296 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 14047 .loc 17 140 0 14048 00c4 C0E90232 strd r3, r2, [r0, #8] 14049 .loc 17 193 0 14050 00c8 5DF8044B ldr r4, [sp], #4 14051 .LCFI117: 14052 .cfi_remember_state 14053 .cfi_restore 4 14054 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 14055 .loc 17 75 0 14056 00cc 0020 movs r0, #0 14057 .LVL1450: 14058 .loc 17 193 0 14059 00ce 7047 bx lr 14060 .LVL1451: ARM GAS /tmp/ccfbYRip.s page 472 14061 .L757: 14062 .LCFI118: 14063 .cfi_restore_state 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14064 .loc 17 174 0 14065 00d0 4FF07452 mov r2, #1023410176 14066 .LVL1452: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.03125; 14067 .loc 17 173 0 14068 00d4 1A4B ldr r3, .L772+28 14069 .LVL1453: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14070 .loc 17 174 0 14071 00d6 0261 str r2, [r0, #16] @ float 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 128U; 14072 .loc 17 171 0 14073 00d8 4FF08012 mov r2, #8388736 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.03125; 14074 .loc 17 173 0 14075 00dc C0E90232 strd r3, r2, [r0, #8] 14076 .loc 17 193 0 14077 00e0 5DF8044B ldr r4, [sp], #4 14078 .LCFI119: 14079 .cfi_remember_state 14080 .cfi_restore 4 14081 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 14082 .loc 17 75 0 14083 00e4 0020 movs r0, #0 14084 .LVL1454: 14085 .loc 17 193 0 14086 00e6 7047 bx lr 14087 .LVL1455: 14088 .L755: 14089 .LCFI120: 14090 .cfi_restore_state 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14091 .loc 17 150 0 14092 00e8 4FF06E52 mov r2, #998244352 14093 .LVL1456: 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.00390625f; 14094 .loc 17 149 0 14095 00ec 154B ldr r3, .L772+32 14096 .LVL1457: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14097 .loc 17 150 0 14098 00ee 0261 str r2, [r0, #16] @ float 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->bitRevFactor = 16U; 14099 .loc 17 147 0 14100 00f0 4FF01012 mov r2, #1048592 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** S->onebyfftLen = 0.00390625f; 14101 .loc 17 149 0 14102 00f4 C0E90232 strd r3, r2, [r0, #8] 14103 .loc 17 193 0 14104 00f8 5DF8044B ldr r4, [sp], #4 14105 .LCFI121: 14106 .cfi_remember_state ARM GAS /tmp/ccfbYRip.s page 473 14107 .cfi_restore 4 14108 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 14109 .loc 17 75 0 14110 00fc 0020 movs r0, #0 14111 .LVL1458: 14112 .loc 17 193 0 14113 00fe 7047 bx lr 14114 .LVL1459: 14115 .L762: 14116 .LCFI122: 14117 .cfi_restore_state 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14118 .loc 17 129 0 14119 0100 4FF06A52 mov r2, #981467136 14120 .LVL1460: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 14121 .loc 17 127 0 14122 0104 104B ldr r3, .L772+36 14123 .LVL1461: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14124 .loc 17 129 0 14125 0106 0261 str r2, [r0, #16] @ float 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the bit reversal table modifier */ 14126 .loc 17 123 0 14127 0108 4FF00412 mov r2, #262148 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** /* Initialise the 1/fftLen Value */ 14128 .loc 17 127 0 14129 010c C0E90232 strd r3, r2, [r0, #8] 14130 .loc 17 193 0 14131 0110 5DF8044B ldr r4, [sp], #4 14132 .LCFI123: 14133 .cfi_remember_state 14134 .cfi_restore 4 14135 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** 14136 .loc 17 75 0 14137 0114 0020 movs r0, #0 14138 .LVL1462: 14139 .loc 17 193 0 14140 0116 7047 bx lr 14141 .LVL1463: 14142 .L767: 14143 .LCFI124: 14144 .cfi_restore_state 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c **** break; 14145 .loc 17 188 0 14146 0118 4FF0FF30 mov r0, #-1 14147 .LVL1464: 14148 .loc 17 193 0 14149 011c 5DF8044B ldr r4, [sp], #4 14150 .LCFI125: 14151 .cfi_restore 4 14152 .cfi_def_cfa_offset 0 14153 0120 7047 bx lr 14154 .L773: 14155 0122 00BF .align 2 ARM GAS /tmp/ccfbYRip.s page 474 14156 .L772: 14157 0124 00000000 .word twiddleCoef_4096 14158 0128 00000000 .word armBitRevTable 14159 012c 3E000000 .word armBitRevTable+62 14160 0130 7E000000 .word armBitRevTable+126 14161 0134 02000000 .word armBitRevTable+2 14162 0138 FE010000 .word armBitRevTable+510 14163 013c 0E000000 .word armBitRevTable+14 14164 0140 FE000000 .word armBitRevTable+254 14165 0144 1E000000 .word armBitRevTable+30 14166 0148 06000000 .word armBitRevTable+6 14167 .cfi_endproc 14168 .LFE173: 14170 .section .text.arm_cfft_radix2_init_q15,"ax",%progbits 14171 .align 1 14172 .p2align 2,,3 14173 .global arm_cfft_radix2_init_q15 14174 .syntax unified 14175 .thumb 14176 .thumb_func 14177 .fpu fpv4-sp-d16 14179 arm_cfft_radix2_init_q15: 14180 .LFB174: 14181 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Title: arm_cfft_radix2_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Description: Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @ingroup groupTransforms ARM GAS /tmp/ccfbYRip.s page 475 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @addtogroup ComplexFFT 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @{ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** */ 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @brief Initialization function for the Q15 CFFT/CIFFT. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @param[in] fftLen length of the FFT. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @param[in] ifftFlag flag that selects transform direction 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - value = 0: forward transform 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - value = 1: inverse transform 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - value = 0: disables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - value = 1: enables bit reversal of output 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @return execution status 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @par Details 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** The parameter ifftFlag controls whether a forward or inverse transf 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** The parameter bitReverseFlag controls whether output is in normal o 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** @par 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** arm_status arm_cfft_radix2_init_q15( 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** arm_cfft_radix2_instance_q15 * S, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** uint16_t fftLen, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** uint8_t ifftFlag, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** uint8_t bitReverseFlag) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** { 14182 .loc 18 74 0 14183 .cfi_startproc 14184 @ args = 0, pretend = 0, frame = 0 14185 @ frame_needed = 0, uses_anonymous_args = 0 14186 @ link register save eliminated. 14187 .LVL1465: 14188 0000 10B4 push {r4} 14189 .LCFI126: 14190 .cfi_def_cfa_offset 4 14191 .cfi_offset 4, -4 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the default arm status */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the FFT length */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->fftLen = fftLen; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** ARM GAS /tmp/ccfbYRip.s page 476 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Twiddle coefficient pointer */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pTwiddle = (q15_t *) twiddleCoef_4096_q15; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->ifftFlag = ifftFlag; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Flag for calculation Bit reversal or not */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitReverseFlag = bitReverseFlag; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters depending on the FFT length */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** switch (S->fftLen) 14192 .loc 18 89 0 14193 0002 B1F5807F cmp r1, #256 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 14194 .loc 18 82 0 14195 0006 394C ldr r4, .L793 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Flag for calculation Bit reversal or not */ 14196 .loc 18 84 0 14197 0008 8270 strb r2, [r0, #2] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14198 .loc 18 86 0 14199 000a C370 strb r3, [r0, #3] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14200 .loc 18 79 0 14201 000c 0180 strh r1, [r0] @ movhi 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 14202 .loc 18 82 0 14203 000e 4460 str r4, [r0, #4] 14204 .loc 18 89 0 14205 0010 55D0 beq .L776 14206 0012 12D9 bls .L790 14207 0014 B1F5806F cmp r1, #1024 14208 0018 5AD0 beq .L783 14209 001a 3BD9 bls .L791 14210 001c B1F5006F cmp r1, #2048 14211 0020 24D0 beq .L786 14212 0022 B1F5805F cmp r1, #4096 14213 0026 5CD1 bne .L788 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** { 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 4096U: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 4096 point FFT */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the twiddle coef modifier value */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 1U; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table modifier */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 1U; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 14214 .loc 18 99 0 14215 0028 314B ldr r3, .L793+4 14216 .LVL1466: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 2048U: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 2048 point FFT */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the twiddle coef modifier value */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 2U; ARM GAS /tmp/ccfbYRip.s page 477 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table modifier */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 2U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table pointer */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 1024U: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 1024 point FFT */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 4U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 4U; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 512U: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 512 point FFT */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 8U; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 8U; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 256U: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 256 point FFT */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 16U; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 16U; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 128U: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 128 point FFT */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 32U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 32U; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 64U: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 64 point FFT */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 64U; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 64U; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 32U: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 32 point FFT */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 128U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 128U; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** case 16U: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initializations of structure parameters for 16 point FFT */ ARM GAS /tmp/ccfbYRip.s page 478 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->twidCoefModifier = 256U; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 256U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** default: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Reporting argument error if fftSize is not valid value */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** } 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** return (status); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** } 14217 .loc 18 178 0 14218 002a 5DF8044B ldr r4, [sp], #4 14219 .LCFI127: 14220 .cfi_remember_state 14221 .cfi_restore 4 14222 .cfi_def_cfa_offset 0 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table modifier */ 14223 .loc 18 95 0 14224 002e 4FF00112 mov r2, #65537 14225 .LVL1467: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14226 .loc 18 99 0 14227 0032 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14228 .loc 18 76 0 14229 0036 0020 movs r0, #0 14230 .LVL1468: 14231 .loc 18 178 0 14232 0038 7047 bx lr 14233 .LVL1469: 14234 .L790: 14235 .LCFI128: 14236 .cfi_restore_state 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** { 14237 .loc 18 89 0 14238 003a 2029 cmp r1, #32 14239 003c 36D0 beq .L778 14240 003e 1ED9 bls .L792 14241 0040 4029 cmp r1, #64 14242 0042 0AD0 beq .L781 14243 0044 8029 cmp r1, #128 14244 0046 4CD1 bne .L788 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14245 .loc 18 143 0 14246 0048 2A4B ldr r3, .L793+8 14247 .LVL1470: 14248 .loc 18 178 0 14249 004a 5DF8044B ldr r4, [sp], #4 14250 .LCFI129: 14251 .cfi_remember_state 14252 .cfi_restore 4 14253 .cfi_def_cfa_offset 0 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 32U; ARM GAS /tmp/ccfbYRip.s page 479 14254 .loc 18 141 0 14255 004e 4FF02012 mov r2, #2097184 14256 .LVL1471: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14257 .loc 18 143 0 14258 0052 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14259 .loc 18 76 0 14260 0056 0020 movs r0, #0 14261 .LVL1472: 14262 .loc 18 178 0 14263 0058 7047 bx lr 14264 .LVL1473: 14265 .L781: 14266 .LCFI130: 14267 .cfi_restore_state 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14268 .loc 18 151 0 14269 005a 274B ldr r3, .L793+12 14270 .LVL1474: 14271 .loc 18 178 0 14272 005c 5DF8044B ldr r4, [sp], #4 14273 .LCFI131: 14274 .cfi_remember_state 14275 .cfi_restore 4 14276 .cfi_def_cfa_offset 0 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 64U; 14277 .loc 18 149 0 14278 0060 4FF04012 mov r2, #4194368 14279 .LVL1475: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14280 .loc 18 151 0 14281 0064 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14282 .loc 18 76 0 14283 0068 0020 movs r0, #0 14284 .LVL1476: 14285 .loc 18 178 0 14286 006a 7047 bx lr 14287 .LVL1477: 14288 .L786: 14289 .LCFI132: 14290 .cfi_restore_state 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14291 .loc 18 111 0 14292 006c 234B ldr r3, .L793+16 14293 .LVL1478: 14294 .loc 18 178 0 14295 006e 5DF8044B ldr r4, [sp], #4 14296 .LCFI133: 14297 .cfi_remember_state 14298 .cfi_restore 4 14299 .cfi_def_cfa_offset 0 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** /* Initialise the bit reversal table modifier */ 14300 .loc 18 107 0 14301 0072 4FF00212 mov r2, #131074 14302 .LVL1479: ARM GAS /tmp/ccfbYRip.s page 480 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14303 .loc 18 111 0 14304 0076 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14305 .loc 18 76 0 14306 007a 0020 movs r0, #0 14307 .LVL1480: 14308 .loc 18 178 0 14309 007c 7047 bx lr 14310 .LVL1481: 14311 .L792: 14312 .LCFI134: 14313 .cfi_restore_state 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** { 14314 .loc 18 89 0 14315 007e 1029 cmp r1, #16 14316 0080 2FD1 bne .L788 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14317 .loc 18 167 0 14318 0082 1F4B ldr r3, .L793+20 14319 .LVL1482: 14320 .loc 18 178 0 14321 0084 5DF8044B ldr r4, [sp], #4 14322 .LCFI135: 14323 .cfi_remember_state 14324 .cfi_restore 4 14325 .cfi_def_cfa_offset 0 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 256U; 14326 .loc 18 165 0 14327 0088 4FF00122 mov r2, #16777472 14328 .LVL1483: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14329 .loc 18 167 0 14330 008c C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14331 .loc 18 76 0 14332 0090 0020 movs r0, #0 14333 .LVL1484: 14334 .loc 18 178 0 14335 0092 7047 bx lr 14336 .LVL1485: 14337 .L791: 14338 .LCFI136: 14339 .cfi_restore_state 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** { 14340 .loc 18 89 0 14341 0094 B1F5007F cmp r1, #512 14342 0098 23D1 bne .L788 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14343 .loc 18 127 0 14344 009a 1A4B ldr r3, .L793+24 14345 .LVL1486: 14346 .loc 18 178 0 14347 009c 5DF8044B ldr r4, [sp], #4 14348 .LCFI137: 14349 .cfi_remember_state 14350 .cfi_restore 4 ARM GAS /tmp/ccfbYRip.s page 481 14351 .cfi_def_cfa_offset 0 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 8U; 14352 .loc 18 125 0 14353 00a0 4FF00812 mov r2, #524296 14354 .LVL1487: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14355 .loc 18 127 0 14356 00a4 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14357 .loc 18 76 0 14358 00a8 0020 movs r0, #0 14359 .LVL1488: 14360 .loc 18 178 0 14361 00aa 7047 bx lr 14362 .LVL1489: 14363 .L778: 14364 .LCFI138: 14365 .cfi_restore_state 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14366 .loc 18 159 0 14367 00ac 164B ldr r3, .L793+28 14368 .LVL1490: 14369 .loc 18 178 0 14370 00ae 5DF8044B ldr r4, [sp], #4 14371 .LCFI139: 14372 .cfi_remember_state 14373 .cfi_restore 4 14374 .cfi_def_cfa_offset 0 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 128U; 14375 .loc 18 157 0 14376 00b2 4FF08012 mov r2, #8388736 14377 .LVL1491: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14378 .loc 18 159 0 14379 00b6 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14380 .loc 18 76 0 14381 00ba 0020 movs r0, #0 14382 .LVL1492: 14383 .loc 18 178 0 14384 00bc 7047 bx lr 14385 .LVL1493: 14386 .L776: 14387 .LCFI140: 14388 .cfi_restore_state 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14389 .loc 18 135 0 14390 00be 134B ldr r3, .L793+32 14391 .LVL1494: 14392 .loc 18 178 0 14393 00c0 5DF8044B ldr r4, [sp], #4 14394 .LCFI141: 14395 .cfi_remember_state 14396 .cfi_restore 4 14397 .cfi_def_cfa_offset 0 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 16U; 14398 .loc 18 133 0 ARM GAS /tmp/ccfbYRip.s page 482 14399 00c4 4FF01012 mov r2, #1048592 14400 .LVL1495: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14401 .loc 18 135 0 14402 00c8 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14403 .loc 18 76 0 14404 00cc 0020 movs r0, #0 14405 .LVL1496: 14406 .loc 18 178 0 14407 00ce 7047 bx lr 14408 .LVL1497: 14409 .L783: 14410 .LCFI142: 14411 .cfi_restore_state 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14412 .loc 18 119 0 14413 00d0 0F4B ldr r3, .L793+36 14414 .LVL1498: 14415 .loc 18 178 0 14416 00d2 5DF8044B ldr r4, [sp], #4 14417 .LCFI143: 14418 .cfi_remember_state 14419 .cfi_restore 4 14420 .cfi_def_cfa_offset 0 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** S->bitRevFactor = 4U; 14421 .loc 18 117 0 14422 00d6 4FF00412 mov r2, #262148 14423 .LVL1499: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14424 .loc 18 119 0 14425 00da C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** 14426 .loc 18 76 0 14427 00de 0020 movs r0, #0 14428 .LVL1500: 14429 .loc 18 178 0 14430 00e0 7047 bx lr 14431 .LVL1501: 14432 .L788: 14433 .LCFI144: 14434 .cfi_restore_state 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c **** break; 14435 .loc 18 173 0 14436 00e2 4FF0FF30 mov r0, #-1 14437 .LVL1502: 14438 .loc 18 178 0 14439 00e6 5DF8044B ldr r4, [sp], #4 14440 .LCFI145: 14441 .cfi_restore 4 14442 .cfi_def_cfa_offset 0 14443 00ea 7047 bx lr 14444 .L794: 14445 .align 2 14446 .L793: 14447 00ec 00000000 .word twiddleCoef_4096_q15 14448 00f0 00000000 .word armBitRevTable ARM GAS /tmp/ccfbYRip.s page 483 14449 00f4 3E000000 .word armBitRevTable+62 14450 00f8 7E000000 .word armBitRevTable+126 14451 00fc 02000000 .word armBitRevTable+2 14452 0100 FE010000 .word armBitRevTable+510 14453 0104 0E000000 .word armBitRevTable+14 14454 0108 FE000000 .word armBitRevTable+254 14455 010c 1E000000 .word armBitRevTable+30 14456 0110 06000000 .word armBitRevTable+6 14457 .cfi_endproc 14458 .LFE174: 14460 .section .text.arm_cfft_radix2_init_q31,"ax",%progbits 14461 .align 1 14462 .p2align 2,,3 14463 .global arm_cfft_radix2_init_q31 14464 .syntax unified 14465 .thumb 14466 .thumb_func 14467 .fpu fpv4-sp-d16 14469 arm_cfft_radix2_init_q31: 14470 .LFB175: 14471 .file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Title: arm_cfft_radix2_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Description: Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /** ARM GAS /tmp/ccfbYRip.s page 484 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @addtogroup ComplexFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @brief Initialization function for the Q31 CFFT/CIFFT. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @param[in] fftLen length of the FFT 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @param[in] ifftFlag flag that selects transform direction 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - value = 0: forward transform 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - value = 1: inverse transform 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - value = 0: disables bit reversal of output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - value = 1: enables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @return execution status 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @par Details 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** The parameter ifftFlag controls whether a forward or inverse transf 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** The parameter bitReverseFlag controls whether output is in normal o 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @par 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** @par 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** arm_status arm_cfft_radix2_init_q31( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** arm_cfft_radix2_instance_q31 * S, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** uint16_t fftLen, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** uint8_t ifftFlag, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** uint8_t bitReverseFlag) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** { 14472 .loc 19 73 0 14473 .cfi_startproc 14474 @ args = 0, pretend = 0, frame = 0 14475 @ frame_needed = 0, uses_anonymous_args = 0 14476 @ link register save eliminated. 14477 .LVL1503: 14478 0000 10B4 push {r4} 14479 .LCFI146: 14480 .cfi_def_cfa_offset 4 14481 .cfi_offset 4, -4 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the default arm status */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the FFT length */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->fftLen = fftLen; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the Twiddle coefficient pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pTwiddle = (q31_t *) twiddleCoef_4096_q31; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ ARM GAS /tmp/ccfbYRip.s page 485 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->ifftFlag = ifftFlag; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the Flag for calculation Bit reversal or not */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitReverseFlag = bitReverseFlag; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of Instance structure depending on the FFT length */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** switch (S->fftLen) 14482 .loc 19 90 0 14483 0002 B1F5807F cmp r1, #256 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14484 .loc 19 81 0 14485 0006 394C ldr r4, .L814 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14486 .loc 19 84 0 14487 0008 8270 strb r2, [r0, #2] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14488 .loc 19 87 0 14489 000a C370 strb r3, [r0, #3] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14490 .loc 19 78 0 14491 000c 0180 strh r1, [r0] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14492 .loc 19 81 0 14493 000e 4460 str r4, [r0, #4] 14494 .loc 19 90 0 14495 0010 55D0 beq .L797 14496 0012 12D9 bls .L811 14497 0014 B1F5806F cmp r1, #1024 14498 0018 5AD0 beq .L804 14499 001a 3BD9 bls .L812 14500 001c B1F5006F cmp r1, #2048 14501 0020 24D0 beq .L807 14502 0022 B1F5805F cmp r1, #4096 14503 0026 5CD1 bne .L809 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 4096 point FFT */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 4096U: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the twiddle coef modifier value */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 1U; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 1U; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table pointer */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 14504 .loc 19 99 0 14505 0028 314B ldr r3, .L814+4 14506 .LVL1504: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 2048 point FFT */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 2048U: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the twiddle coef modifier value */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 2U; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 2U; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table pointer */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; ARM GAS /tmp/ccfbYRip.s page 486 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 1024 point FFT */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 1024U: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the twiddle coef modifier value */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 4U; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 4U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table pointer */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 512 point FFT */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 512U: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the twiddle coef modifier value */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 8U; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 8U; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table pointer */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 256U: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 256 point FFT */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 16U; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 16U; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 128U: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 128 point FFT */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 32U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 32U; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 64U: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 64 point FFT */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 64U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 64U; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 32U: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 32 point FFT */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 128U; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 128U; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** case 16U: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initializations of structure parameters for 16 point FFT */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->twidCoefModifier = 256U; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 256U; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** ARM GAS /tmp/ccfbYRip.s page 487 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** default: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Reporting argument error if fftSize is not valid value */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** return (status); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** } 14507 .loc 19 175 0 14508 002a 5DF8044B ldr r4, [sp], #4 14509 .LCFI147: 14510 .cfi_remember_state 14511 .cfi_restore 4 14512 .cfi_def_cfa_offset 0 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 14513 .loc 19 95 0 14514 002e 4FF00112 mov r2, #65537 14515 .LVL1505: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14516 .loc 19 99 0 14517 0032 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14518 .loc 19 75 0 14519 0036 0020 movs r0, #0 14520 .LVL1506: 14521 .loc 19 175 0 14522 0038 7047 bx lr 14523 .LVL1507: 14524 .L811: 14525 .LCFI148: 14526 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** { 14527 .loc 19 90 0 14528 003a 2029 cmp r1, #32 14529 003c 36D0 beq .L799 14530 003e 1ED9 bls .L813 14531 0040 4029 cmp r1, #64 14532 0042 0AD0 beq .L802 14533 0044 8029 cmp r1, #128 14534 0046 4CD1 bne .L809 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14535 .loc 19 143 0 14536 0048 2A4B ldr r3, .L814+8 14537 .LVL1508: 14538 .loc 19 175 0 14539 004a 5DF8044B ldr r4, [sp], #4 14540 .LCFI149: 14541 .cfi_remember_state 14542 .cfi_restore 4 14543 .cfi_def_cfa_offset 0 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 32U; 14544 .loc 19 141 0 14545 004e 4FF02012 mov r2, #2097184 14546 .LVL1509: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14547 .loc 19 143 0 14548 0052 C0E90232 strd r3, r2, [r0, #8] ARM GAS /tmp/ccfbYRip.s page 488 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14549 .loc 19 75 0 14550 0056 0020 movs r0, #0 14551 .LVL1510: 14552 .loc 19 175 0 14553 0058 7047 bx lr 14554 .LVL1511: 14555 .L802: 14556 .LCFI150: 14557 .cfi_restore_state 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14558 .loc 19 150 0 14559 005a 274B ldr r3, .L814+12 14560 .LVL1512: 14561 .loc 19 175 0 14562 005c 5DF8044B ldr r4, [sp], #4 14563 .LCFI151: 14564 .cfi_remember_state 14565 .cfi_restore 4 14566 .cfi_def_cfa_offset 0 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 64U; 14567 .loc 19 148 0 14568 0060 4FF04012 mov r2, #4194368 14569 .LVL1513: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14570 .loc 19 150 0 14571 0064 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14572 .loc 19 75 0 14573 0068 0020 movs r0, #0 14574 .LVL1514: 14575 .loc 19 175 0 14576 006a 7047 bx lr 14577 .LVL1515: 14578 .L807: 14579 .LCFI152: 14580 .cfi_restore_state 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14581 .loc 19 109 0 14582 006c 234B ldr r3, .L814+16 14583 .LVL1516: 14584 .loc 19 175 0 14585 006e 5DF8044B ldr r4, [sp], #4 14586 .LCFI153: 14587 .cfi_remember_state 14588 .cfi_restore 4 14589 .cfi_def_cfa_offset 0 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 14590 .loc 19 105 0 14591 0072 4FF00212 mov r2, #131074 14592 .LVL1517: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14593 .loc 19 109 0 14594 0076 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14595 .loc 19 75 0 14596 007a 0020 movs r0, #0 ARM GAS /tmp/ccfbYRip.s page 489 14597 .LVL1518: 14598 .loc 19 175 0 14599 007c 7047 bx lr 14600 .LVL1519: 14601 .L813: 14602 .LCFI154: 14603 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** { 14604 .loc 19 90 0 14605 007e 1029 cmp r1, #16 14606 0080 2FD1 bne .L809 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14607 .loc 19 164 0 14608 0082 1F4B ldr r3, .L814+20 14609 .LVL1520: 14610 .loc 19 175 0 14611 0084 5DF8044B ldr r4, [sp], #4 14612 .LCFI155: 14613 .cfi_remember_state 14614 .cfi_restore 4 14615 .cfi_def_cfa_offset 0 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 256U; 14616 .loc 19 162 0 14617 0088 4FF00122 mov r2, #16777472 14618 .LVL1521: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14619 .loc 19 164 0 14620 008c C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14621 .loc 19 75 0 14622 0090 0020 movs r0, #0 14623 .LVL1522: 14624 .loc 19 175 0 14625 0092 7047 bx lr 14626 .LVL1523: 14627 .L812: 14628 .LCFI156: 14629 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** { 14630 .loc 19 90 0 14631 0094 B1F5007F cmp r1, #512 14632 0098 23D1 bne .L809 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14633 .loc 19 129 0 14634 009a 1A4B ldr r3, .L814+24 14635 .LVL1524: 14636 .loc 19 175 0 14637 009c 5DF8044B ldr r4, [sp], #4 14638 .LCFI157: 14639 .cfi_remember_state 14640 .cfi_restore 4 14641 .cfi_def_cfa_offset 0 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 14642 .loc 19 125 0 14643 00a0 4FF00812 mov r2, #524296 14644 .LVL1525: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; ARM GAS /tmp/ccfbYRip.s page 490 14645 .loc 19 129 0 14646 00a4 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14647 .loc 19 75 0 14648 00a8 0020 movs r0, #0 14649 .LVL1526: 14650 .loc 19 175 0 14651 00aa 7047 bx lr 14652 .LVL1527: 14653 .L799: 14654 .LCFI158: 14655 .cfi_restore_state 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14656 .loc 19 157 0 14657 00ac 164B ldr r3, .L814+28 14658 .LVL1528: 14659 .loc 19 175 0 14660 00ae 5DF8044B ldr r4, [sp], #4 14661 .LCFI159: 14662 .cfi_remember_state 14663 .cfi_restore 4 14664 .cfi_def_cfa_offset 0 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 128U; 14665 .loc 19 155 0 14666 00b2 4FF08012 mov r2, #8388736 14667 .LVL1529: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14668 .loc 19 157 0 14669 00b6 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14670 .loc 19 75 0 14671 00ba 0020 movs r0, #0 14672 .LVL1530: 14673 .loc 19 175 0 14674 00bc 7047 bx lr 14675 .LVL1531: 14676 .L797: 14677 .LCFI160: 14678 .cfi_restore_state 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14679 .loc 19 136 0 14680 00be 134B ldr r3, .L814+32 14681 .LVL1532: 14682 .loc 19 175 0 14683 00c0 5DF8044B ldr r4, [sp], #4 14684 .LCFI161: 14685 .cfi_remember_state 14686 .cfi_restore 4 14687 .cfi_def_cfa_offset 0 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** S->bitRevFactor = 16U; 14688 .loc 19 134 0 14689 00c4 4FF01012 mov r2, #1048592 14690 .LVL1533: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14691 .loc 19 136 0 14692 00c8 C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** ARM GAS /tmp/ccfbYRip.s page 491 14693 .loc 19 75 0 14694 00cc 0020 movs r0, #0 14695 .LVL1534: 14696 .loc 19 175 0 14697 00ce 7047 bx lr 14698 .LVL1535: 14699 .L804: 14700 .LCFI162: 14701 .cfi_restore_state 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14702 .loc 19 119 0 14703 00d0 0F4B ldr r3, .L814+36 14704 .LVL1536: 14705 .loc 19 175 0 14706 00d2 5DF8044B ldr r4, [sp], #4 14707 .LCFI163: 14708 .cfi_remember_state 14709 .cfi_restore 4 14710 .cfi_def_cfa_offset 0 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** /* Initialise the bit reversal table modifier */ 14711 .loc 19 115 0 14712 00d6 4FF00412 mov r2, #262148 14713 .LVL1537: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14714 .loc 19 119 0 14715 00da C0E90232 strd r3, r2, [r0, #8] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** 14716 .loc 19 75 0 14717 00de 0020 movs r0, #0 14718 .LVL1538: 14719 .loc 19 175 0 14720 00e0 7047 bx lr 14721 .LVL1539: 14722 .L809: 14723 .LCFI164: 14724 .cfi_restore_state 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c **** break; 14725 .loc 19 170 0 14726 00e2 4FF0FF30 mov r0, #-1 14727 .LVL1540: 14728 .loc 19 175 0 14729 00e6 5DF8044B ldr r4, [sp], #4 14730 .LCFI165: 14731 .cfi_restore 4 14732 .cfi_def_cfa_offset 0 14733 00ea 7047 bx lr 14734 .L815: 14735 .align 2 14736 .L814: 14737 00ec 00000000 .word twiddleCoef_4096_q31 14738 00f0 00000000 .word armBitRevTable 14739 00f4 3E000000 .word armBitRevTable+62 14740 00f8 7E000000 .word armBitRevTable+126 14741 00fc 02000000 .word armBitRevTable+2 14742 0100 FE010000 .word armBitRevTable+510 14743 0104 0E000000 .word armBitRevTable+14 14744 0108 FE000000 .word armBitRevTable+254 ARM GAS /tmp/ccfbYRip.s page 492 14745 010c 1E000000 .word armBitRevTable+30 14746 0110 06000000 .word armBitRevTable+6 14747 .cfi_endproc 14748 .LFE175: 14750 .section .text.arm_radix2_butterfly_q15,"ax",%progbits 14751 .align 1 14752 .p2align 2,,3 14753 .global arm_radix2_butterfly_q15 14754 .syntax unified 14755 .thumb 14756 .thumb_func 14757 .fpu fpv4-sp-d16 14759 arm_radix2_butterfly_q15: 14760 .LFB177: 14761 .file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q1 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Title: arm_cfft_radix2_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_radix2_butterfly_q15( 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc, 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t fftLen, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const q15_t * pCoef, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint16_t twidCoefModifier); 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_radix2_butterfly_inverse_q15( 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t fftLen, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const q15_t * pCoef, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint16_t twidCoefModifier); 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ARM GAS /tmp/ccfbYRip.s page 493 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_bitreversal_q15( 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t fftLen, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint16_t bitRevFactor, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const uint16_t * pBitRevTab); 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @ingroup groupTransforms 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @addtogroup ComplexFFT 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @{ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @brief Processing function for the fixed-point CFFT/CIFFT. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing o 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @return none 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_cfft_radix2_q15( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const arm_cfft_radix2_instance_q15 * S, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** if (S->ifftFlag == 1U) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** else 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** @} end of ComplexFFT group 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_radix2_butterfly_q15( 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc, 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t fftLen, 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const q15_t * pCoef, 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint16_t twidCoefModifier) 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 14762 .loc 20 92 0 14763 .cfi_startproc 14764 @ args = 0, pretend = 0, frame = 32 14765 @ frame_needed = 0, uses_anonymous_args = 0 14766 .LVL1541: 14767 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 14768 .LCFI166: ARM GAS /tmp/ccfbYRip.s page 494 14769 .cfi_def_cfa_offset 36 14770 .cfi_offset 4, -36 14771 .cfi_offset 5, -32 14772 .cfi_offset 6, -28 14773 .cfi_offset 7, -24 14774 .cfi_offset 8, -20 14775 .cfi_offset 9, -16 14776 .cfi_offset 10, -12 14777 .cfi_offset 11, -8 14778 .cfi_offset 14, -4 14779 0004 89B0 sub sp, sp, #36 14780 .LCFI167: 14781 .cfi_def_cfa_offset 72 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #if defined (ARM_MATH_DSP) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t i, j, k, l; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t n1, n2, ia; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t in; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q31_t T, S, R; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q31_t coeff, out1, out2; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** //N = fftLen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = fftLen; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** // loop for groups 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = 0; i < n2; i++) 14782 .loc 20 109 0 14783 0006 5FEA510C lsrs ip, r1, #1 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #if defined (ARM_MATH_DSP) 14784 .loc 20 92 0 14785 000a 8B46 mov fp, r1 14786 .LVL1542: 14787 000c 0546 mov r5, r0 14788 000e CDE90602 strd r0, r2, [sp, #24] 14789 0012 0093 str r3, [sp] 14790 .loc 20 109 0 14791 0014 00F0EA80 beq .L817 14792 0018 1C46 mov r4, r3 14793 001a 0CF1FF33 add r3, ip, #-1 14794 .LVL1543: 14795 001e 1646 mov r6, r2 14796 0020 5B08 lsrs r3, r3, #1 14797 0022 00F10802 add r2, r0, #8 14798 .LVL1544: 14799 0026 4FEA8C09 lsl r9, ip, #2 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); ARM GAS /tmp/ccfbYRip.s page 495 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (T & 0xFFFF)) >> 1; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); 14800 .loc 20 119 0 14801 002a 744F ldr r7, .L837 14802 002c 02EBC301 add r1, r2, r3, lsl #3 14803 .LVL1545: 14804 0030 09F10408 add r8, r9, #4 14805 0034 4FEA840E lsl lr, r4, #2 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 14806 .loc 20 109 0 14807 0038 3046 mov r0, r6 14808 .LVL1546: 14809 .L818: 14810 .LBB2140: 14811 .LBB2141: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14812 .loc 6 909 0 discriminator 3 14813 003a 2C68 ldr r4, [r5] @ unaligned 14814 .LBE2141: 14815 .LBE2140: 14816 .LBB2142: 14817 .LBB2143: 14818 003c 59F80520 ldr r2, [r9, r5] @ unaligned 14819 .LBE2143: 14820 .LBE2142: 14821 .LBB2144: 14822 .LBB2145: 14823 0040 0668 ldr r6, [r0] @ unaligned 14824 .LVL1547: 14825 .LBE2145: 14826 .LBE2144: 14827 .loc 20 119 0 discriminator 3 14828 0042 44F34E03 sbfx r3, r4, #1, #15 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (S & 0xFFFF)) >> 1; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); 14829 .loc 20 123 0 discriminator 3 14830 0046 42F34E0A sbfx r10, r2, #1, #15 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 14831 .loc 20 119 0 discriminator 3 14832 004a 07EA6404 and r4, r7, r4, asr #1 14833 .LVL1548: 14834 .loc 20 123 0 discriminator 3 14835 004e 1FFA8AFA uxth r10, r10 14836 0052 07EA6202 and r2, r7, r2, asr #1 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 14837 .loc 20 119 0 discriminator 3 14838 0056 9BB2 uxth r3, r3 14839 0058 2343 orrs r3, r3, r4 14840 .LVL1549: 14841 .loc 20 123 0 discriminator 3 14842 005a 42EA0A02 orr r2, r2, r10 14843 .LVL1550: 14844 .LBB2146: 14845 .LBB2147: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 496 14846 .loc 5 1779 0 discriminator 3 14847 .syntax unified 14848 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14849 005e D3FA12F4 qsub16 r4, r3, r2 14850 @ 0 "" 2 14851 .LVL1551: 14852 .thumb 14853 .syntax unified 14854 .LBE2147: 14855 .LBE2146: 14856 .LBB2148: 14857 .LBB2149: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 14858 .loc 5 1739 0 discriminator 3 14859 .syntax unified 14860 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14861 0062 93FA22F2 shadd16 r2, r3, r2 14862 @ 0 "" 2 14863 .LVL1552: 14864 .thumb 14865 .syntax unified 14866 .LBE2149: 14867 .LBE2148: 14868 .LBB2150: 14869 .LBB2151: 14870 .loc 6 991 0 discriminator 3 14871 0066 2A60 str r2, [r5] @ unaligned 14872 .LVL1553: 14873 .LBE2151: 14874 .LBE2150: 14875 .LBB2152: 14876 .LBB2153: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 14877 .loc 5 1977 0 discriminator 3 14878 .syntax unified 14879 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14880 0068 26FB04F2 smuad r2, r6, r4 14881 @ 0 "" 2 14882 .LVL1554: 14883 .thumb 14884 .syntax unified 14885 .LBE2153: 14886 .LBE2152: 14887 .LBB2154: 14888 .LBB2155: 14889 .loc 5 2051 0 discriminator 3 14890 .syntax unified 14891 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14892 006c 46FB14F3 smusdx r3, r6, r4 14893 @ 0 "" 2 14894 .LVL1555: 14895 .thumb 14896 .syntax unified 14897 .LBE2155: 14898 .LBE2154: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); ARM GAS /tmp/ccfbYRip.s page 497 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUAD(coeff, R) >> 16; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSDX(coeff, R); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSDX(R, coeff) >> 16U; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUAD(coeff, R); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 14899 .loc 20 137 0 discriminator 3 14900 0070 3B40 ands r3, r3, r7 14901 .LVL1556: 14902 0072 43EA1243 orr r3, r3, r2, lsr #16 14903 .LBB2156: 14904 .LBB2157: 14905 .loc 6 991 0 discriminator 3 14906 0076 49F80530 str r3, [r9, r5] @ unaligned 14907 .LVL1557: 14908 .LBE2157: 14909 .LBE2156: 14910 .LBB2158: 14911 .LBB2159: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14912 .loc 6 909 0 discriminator 3 14913 007a 6A68 ldr r2, [r5, #4] @ unaligned 14914 .LVL1558: 14915 .LBE2159: 14916 .LBE2158: 14917 .LBB2160: 14918 .LBB2161: 14919 007c 58F80540 ldr r4, [r8, r5] @ unaligned 14920 .LVL1559: 14921 .LBE2161: 14922 .LBE2160: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** i++; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l++; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (T & 0xFFFF)) >> 1; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); 14923 .loc 20 149 0 discriminator 3 14924 0080 42F34E03 sbfx r3, r2, #1, #15 14925 0084 7044 add r0, r0, lr 14926 .LVL1560: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (S & 0xFFFF)) >> 1; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); ARM GAS /tmp/ccfbYRip.s page 498 14927 .loc 20 153 0 discriminator 3 14928 0086 44F34E06 sbfx r6, r4, #1, #15 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 14929 .loc 20 149 0 discriminator 3 14930 008a 1FFA83FA uxth r10, r3 14931 .loc 20 153 0 discriminator 3 14932 008e B6B2 uxth r6, r6 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 14933 .loc 20 149 0 discriminator 3 14934 0090 07EA6203 and r3, r7, r2, asr #1 14935 .loc 20 153 0 discriminator 3 14936 0094 07EA6404 and r4, r7, r4, asr #1 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 14937 .loc 20 149 0 discriminator 3 14938 0098 43EA0A03 orr r3, r3, r10 14939 .loc 20 153 0 discriminator 3 14940 009c 3443 orrs r4, r4, r6 14941 .LBB2162: 14942 .LBB2163: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 14943 .loc 6 909 0 discriminator 3 14944 009e 0268 ldr r2, [r0] @ unaligned 14945 .LVL1561: 14946 .LBE2163: 14947 .LBE2162: 14948 .LBB2164: 14949 .LBB2165: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 14950 .loc 5 1779 0 discriminator 3 14951 .syntax unified 14952 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14953 00a0 D3FA14F6 qsub16 r6, r3, r4 14954 @ 0 "" 2 14955 .LVL1562: 14956 .thumb 14957 .syntax unified 14958 .LBE2165: 14959 .LBE2164: 14960 .LBB2166: 14961 .LBB2167: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 14962 .loc 5 1739 0 discriminator 3 14963 .syntax unified 14964 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14965 00a4 93FA24F4 shadd16 r4, r3, r4 14966 @ 0 "" 2 14967 .LVL1563: 14968 .thumb 14969 .syntax unified 14970 .LBE2167: 14971 .LBE2166: 14972 .LBB2168: 14973 .LBB2169: 14974 .loc 6 991 0 discriminator 3 14975 00a8 6C60 str r4, [r5, #4] @ unaligned 14976 .LVL1564: 14977 .LBE2169: ARM GAS /tmp/ccfbYRip.s page 499 14978 .LBE2168: 14979 .LBB2170: 14980 .LBB2171: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 14981 .loc 5 1977 0 discriminator 3 14982 .syntax unified 14983 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14984 00aa 22FB06F4 smuad r4, r2, r6 14985 @ 0 "" 2 14986 .LVL1565: 14987 .thumb 14988 .syntax unified 14989 .LBE2171: 14990 .LBE2170: 14991 .LBB2172: 14992 .LBB2173: 14993 .loc 5 2051 0 discriminator 3 14994 .syntax unified 14995 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 14996 00ae 42FB16F3 smusdx r3, r2, r6 14997 @ 0 "" 2 14998 .LVL1566: 14999 .thumb 15000 .syntax unified 15001 .LBE2173: 15002 .LBE2172: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUAD(coeff, R) >> 16; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSDX(coeff, R); 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSDX(R, coeff) >> 16U; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUAD(coeff, R); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15003 .loc 20 168 0 discriminator 3 15004 00b2 3B40 ands r3, r3, r7 15005 .LVL1567: 15006 00b4 43EA1443 orr r3, r3, r4, lsr #16 15007 .LBB2174: 15008 .LBB2175: 15009 .loc 6 991 0 discriminator 3 15010 00b8 48F80530 str r3, [r8, r5] @ unaligned 15011 .LVL1568: 15012 00bc 0835 adds r5, r5, #8 15013 .LBE2175: 15014 .LBE2174: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15015 .loc 20 109 0 discriminator 3 15016 00be A942 cmp r1, r5 15017 00c0 7044 add r0, r0, lr ARM GAS /tmp/ccfbYRip.s page 500 15018 00c2 BAD1 bne .L818 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 15019 .loc 20 172 0 15020 00c4 009B ldr r3, [sp] 15021 00c6 5B00 lsls r3, r3, #1 15022 00c8 9BB2 uxth r3, r3 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for stage */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 15023 .loc 20 175 0 15024 00ca BCF1020F cmp ip, #2 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15025 .loc 20 172 0 15026 00ce 0493 str r3, [sp, #16] 15027 .LVL1569: 15028 .loc 20 175 0 15029 00d0 60D9 bls .L826 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUAD(coeff, R) >> 16; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSDX(coeff, R); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSDX(R, coeff) >> 16U; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUAD(coeff, R); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15030 .loc 20 209 0 15031 00d2 DFF82881 ldr r8, .L837 15032 .LVL1570: ARM GAS /tmp/ccfbYRip.s page 501 15033 .L822: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 15034 .loc 20 178 0 15035 00d6 4FEA5C03 lsr r3, ip, #1 15036 00da 1A46 mov r2, r3 15037 00dc 03EB0C07 add r7, r3, ip 15038 00e0 5B45 cmp r3, fp 15039 00e2 0593 str r3, [sp, #20] 15040 .LVL1571: 15041 00e4 4FEA830A lsl r10, r3, #2 15042 00e8 049B ldr r3, [sp, #16] 15043 00ea 4FEA8303 lsl r3, r3, #2 15044 00ee 0393 str r3, [sp, #12] 15045 00f0 069B ldr r3, [sp, #24] 15046 00f2 0093 str r3, [sp] 15047 00f4 28BF it cs 15048 00f6 5A46 movcs r2, fp 15049 .LVL1572: 15050 00f8 079B ldr r3, [sp, #28] 15051 00fa 0292 str r2, [sp, #8] 15052 00fc BF00 lsls r7, r7, #2 15053 00fe 4FEA4C0C lsl ip, ip, #1 15054 0102 0193 str r3, [sp, #4] 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15055 .loc 20 182 0 15056 0104 4FF0000E mov lr, #0 15057 .LVL1573: 15058 .L821: 15059 .LBB2176: 15060 .LBB2177: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15061 .loc 6 909 0 15062 0108 019B ldr r3, [sp, #4] 15063 010a 009A ldr r2, [sp] 15064 010c 1C68 ldr r4, [r3] @ unaligned 15065 .LVL1574: 15066 010e 7546 mov r5, lr 15067 .LVL1575: 15068 .L820: 15069 .LBE2177: 15070 .LBE2176: 15071 .LBB2178: 15072 .LBB2179: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15073 .loc 6 909 0 is_stmt 0 discriminator 3 15074 0110 1168 ldr r1, [r2] @ unaligned 15075 .LVL1576: 15076 .LBE2179: 15077 .LBE2178: 15078 .LBB2180: 15079 .LBB2181: 15080 0112 5AF80200 ldr r0, [r10, r2] @ unaligned 15081 .LVL1577: 15082 .LBE2181: 15083 .LBE2180: 15084 .LBB2182: 15085 .LBB2183: ARM GAS /tmp/ccfbYRip.s page 502 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15086 .loc 5 1779 0 is_stmt 1 discriminator 3 15087 .syntax unified 15088 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15089 0116 D1FA10F3 qsub16 r3, r1, r0 15090 @ 0 "" 2 15091 .LVL1578: 15092 .thumb 15093 .syntax unified 15094 .LBE2183: 15095 .LBE2182: 15096 .LBB2184: 15097 .LBB2185: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15098 .loc 5 1739 0 discriminator 3 15099 .syntax unified 15100 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15101 011a 91FA20F1 shadd16 r1, r1, r0 15102 @ 0 "" 2 15103 .LVL1579: 15104 .thumb 15105 .syntax unified 15106 .LBE2185: 15107 .LBE2184: 15108 .LBB2186: 15109 .LBB2187: 15110 .loc 6 991 0 discriminator 3 15111 011e 1160 str r1, [r2] @ unaligned 15112 .LVL1580: 15113 .LBE2187: 15114 .LBE2186: 15115 .LBB2188: 15116 .LBB2189: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15117 .loc 5 1977 0 discriminator 3 15118 .syntax unified 15119 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15120 0120 24FB03F1 smuad r1, r4, r3 15121 @ 0 "" 2 15122 .LVL1581: 15123 .thumb 15124 .syntax unified 15125 .LBE2189: 15126 .LBE2188: 15127 .LBB2190: 15128 .LBB2191: 15129 .loc 5 2051 0 discriminator 3 15130 .syntax unified 15131 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15132 0124 44FB13F3 smusdx r3, r4, r3 15133 @ 0 "" 2 15134 .LVL1582: 15135 .thumb 15136 .syntax unified 15137 .LBE2191: 15138 .LBE2190: 15139 .loc 20 209 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 503 15140 0128 03EA0803 and r3, r3, r8 15141 .LVL1583: 15142 012c 43EA1143 orr r3, r3, r1, lsr #16 15143 .LBB2192: 15144 .LBB2193: 15145 .loc 6 991 0 discriminator 3 15146 0130 4AF80230 str r3, [r10, r2] @ unaligned 15147 .LVL1584: 15148 0134 09EB0201 add r1, r9, r2 15149 .LVL1585: 15150 .LBE2193: 15151 .LBE2192: 15152 .LBB2194: 15153 .LBB2195: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15154 .loc 6 909 0 discriminator 3 15155 0138 BE58 ldr r6, [r7, r2] @ unaligned 15156 .LBE2195: 15157 .LBE2194: 15158 .LBB2196: 15159 .LBB2197: 15160 013a 0868 ldr r0, [r1] @ unaligned 15161 .LVL1586: 15162 .LBE2197: 15163 .LBE2196: 15164 .LBB2198: 15165 .LBB2199: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15166 .loc 5 1779 0 discriminator 3 15167 .syntax unified 15168 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15169 013c D0FA16F3 qsub16 r3, r0, r6 15170 @ 0 "" 2 15171 .LVL1587: 15172 .thumb 15173 .syntax unified 15174 .LBE2199: 15175 .LBE2198: 15176 .LBB2200: 15177 .LBB2201: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15178 .loc 5 1739 0 discriminator 3 15179 .syntax unified 15180 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15181 0140 90FA26F0 shadd16 r0, r0, r6 15182 @ 0 "" 2 15183 .LVL1588: 15184 .thumb 15185 .syntax unified 15186 .LBE2201: 15187 .LBE2200: 15188 .LBB2202: 15189 .LBB2203: 15190 .loc 6 991 0 discriminator 3 15191 0144 49F80200 str r0, [r9, r2] @ unaligned 15192 .LVL1589: 15193 .LBE2203: ARM GAS /tmp/ccfbYRip.s page 504 15194 .LBE2202: 15195 .LBB2204: 15196 .LBB2205: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15197 .loc 5 1977 0 discriminator 3 15198 .syntax unified 15199 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15200 0148 24FB03F0 smuad r0, r4, r3 15201 @ 0 "" 2 15202 .LVL1590: 15203 .thumb 15204 .syntax unified 15205 .LBE2205: 15206 .LBE2204: 15207 .LBB2206: 15208 .LBB2207: 15209 .loc 5 2051 0 discriminator 3 15210 .syntax unified 15211 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15212 014c 44FB13F3 smusdx r3, r4, r3 15213 @ 0 "" 2 15214 .LVL1591: 15215 .thumb 15216 .syntax unified 15217 .LBE2207: 15218 .LBE2206: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** i += n1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUAD(coeff, R) >> 16; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSDX(coeff, R); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSDX(R, coeff) >> 16U; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUAD(coeff, R); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15219 .loc 20 231 0 discriminator 3 15220 0150 03EA0803 and r3, r3, r8 15221 .LVL1592: 15222 0154 6544 add r5, r5, ip 15223 0156 43EA1043 orr r3, r3, r0, lsr #16 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15224 .loc 20 189 0 discriminator 3 15225 015a AB45 cmp fp, r5 15226 .LBB2208: ARM GAS /tmp/ccfbYRip.s page 505 15227 .LBB2209: 15228 .loc 6 991 0 discriminator 3 15229 015c BB50 str r3, [r7, r2] @ unaligned 15230 .LVL1593: 15231 015e 01EB0902 add r2, r1, r9 15232 .LBE2209: 15233 .LBE2208: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15234 .loc 20 189 0 discriminator 3 15235 0162 D5D8 bhi .L820 15236 0164 019B ldr r3, [sp, #4] 15237 0166 039A ldr r2, [sp, #12] 15238 0168 1344 add r3, r3, r2 15239 016a 0193 str r3, [sp, #4] 15240 016c 009B ldr r3, [sp] 15241 016e 0433 adds r3, r3, #4 15242 0170 0093 str r3, [sp] 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15243 .loc 20 182 0 15244 0172 029B ldr r3, [sp, #8] 15245 0174 0EF1010E add lr, lr, #1 15246 .LVL1594: 15247 0178 9E45 cmp lr, r3 15248 017a C5D3 bcc .L821 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 15249 .loc 20 237 0 15250 017c 049B ldr r3, [sp, #16] 15251 017e DDF814C0 ldr ip, [sp, #20] 15252 0182 5B00 lsls r3, r3, #1 15253 0184 9BB2 uxth r3, r3 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15254 .loc 20 175 0 15255 0186 BCF1020F cmp ip, #2 15256 .loc 20 237 0 15257 018a 0493 str r3, [sp, #16] 15258 .LVL1595: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15259 .loc 20 175 0 15260 018c 06D9 bls .L819 15261 018e 4FEA8C09 lsl r9, ip, #2 15262 0192 A0E7 b .L822 15263 .LVL1596: 15264 .L826: 15265 0194 CDF814C0 str ip, [sp, #20] 15266 0198 4FEA8C0A lsl r10, ip, #2 15267 .LVL1597: 15268 .L819: 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* stages loop end */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 15269 .loc 20 241 0 ARM GAS /tmp/ccfbYRip.s page 506 15270 019c 059B ldr r3, [sp, #20] 15271 019e 0698 ldr r0, [sp, #24] 15272 01a0 4FEA530C lsr ip, r3, #1 15273 .LVL1598: 15274 .L825: 15275 01a4 03EB0C05 add r5, r3, ip 15276 01a8 AD00 lsls r5, r5, #2 15277 01aa 4FEA8C0C lsl ip, ip, #2 15278 01ae 5E00 lsls r6, r3, #1 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = 0; i < fftLen; i += n1) 15279 .loc 20 249 0 15280 01b0 0021 movs r1, #0 15281 .LVL1599: 15282 .L824: 15283 .LBB2210: 15284 .LBB2211: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15285 .loc 6 909 0 discriminator 3 15286 01b2 0368 ldr r3, [r0] @ unaligned 15287 .LVL1600: 15288 .LBE2211: 15289 .LBE2210: 15290 .LBB2212: 15291 .LBB2213: 15292 01b4 5CF80020 ldr r2, [ip, r0] @ unaligned 15293 .LVL1601: 15294 .LBE2213: 15295 .LBE2212: 15296 .LBB2214: 15297 .LBB2215: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15298 .loc 5 1779 0 discriminator 3 15299 .syntax unified 15300 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15301 01b8 D3FA12F4 qsub16 r4, r3, r2 15302 @ 0 "" 2 15303 .LVL1602: 15304 .thumb 15305 .syntax unified 15306 .LBE2215: 15307 .LBE2214: 15308 .LBB2216: 15309 .LBB2217: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15310 .loc 5 1731 0 discriminator 3 15311 .syntax unified 15312 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15313 01bc 93FA12F3 qadd16 r3, r3, r2 15314 @ 0 "" 2 15315 .LVL1603: ARM GAS /tmp/ccfbYRip.s page 507 15316 .thumb 15317 .syntax unified 15318 .LBE2217: 15319 .LBE2216: 15320 .LBB2218: 15321 .LBB2219: 15322 .loc 6 991 0 discriminator 3 15323 01c0 0360 str r3, [r0] @ unaligned 15324 .LVL1604: 15325 01c2 00EB0A02 add r2, r0, r10 15326 .LBE2219: 15327 .LBE2218: 15328 .LBB2220: 15329 .LBB2221: 15330 01c6 4CF80040 str r4, [ip, r0] @ unaligned 15331 .LVL1605: 15332 .LBE2221: 15333 .LBE2220: 15334 .LBB2222: 15335 .LBB2223: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15336 .loc 6 909 0 discriminator 3 15337 01ca 1368 ldr r3, [r2] @ unaligned 15338 .LVL1606: 15339 .LBE2223: 15340 .LBE2222: 15341 .LBB2224: 15342 .LBB2225: 15343 01cc 4459 ldr r4, [r0, r5] @ unaligned 15344 .LVL1607: 15345 .LBE2225: 15346 .LBE2224: 15347 .LBB2226: 15348 .LBB2227: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15349 .loc 5 1779 0 discriminator 3 15350 .syntax unified 15351 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15352 01ce D3FA14F7 qsub16 r7, r3, r4 15353 @ 0 "" 2 15354 .LVL1608: 15355 .thumb 15356 .syntax unified 15357 .LBE2227: 15358 .LBE2226: 15359 .LBB2228: 15360 .LBB2229: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15361 .loc 5 1731 0 discriminator 3 15362 .syntax unified 15363 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15364 01d2 93FA14F3 qadd16 r3, r3, r4 15365 @ 0 "" 2 15366 .LVL1609: 15367 .thumb 15368 .syntax unified 15369 01d6 3144 add r1, r1, r6 ARM GAS /tmp/ccfbYRip.s page 508 15370 .LVL1610: 15371 .LBE2229: 15372 .LBE2228: 15373 .loc 20 249 0 discriminator 3 15374 01d8 8B45 cmp fp, r1 15375 .LBB2230: 15376 .LBB2231: 15377 .loc 6 991 0 discriminator 3 15378 01da 40F80A30 str r3, [r0, r10] @ unaligned 15379 .LVL1611: 15380 .LBE2231: 15381 .LBE2230: 15382 .LBB2232: 15383 .LBB2233: 15384 01de 4751 str r7, [r0, r5] @ unaligned 15385 .LVL1612: 15386 01e0 0AEB0200 add r0, r10, r2 15387 .LBE2233: 15388 .LBE2232: 15389 .loc 20 249 0 discriminator 3 15390 01e4 E5D8 bhi .L824 15391 .LVL1613: 15392 .L816: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), R); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** i += n1; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), R); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t i, j, k, l; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t n1, n2, ia; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t xt, yt, cosVal, sinVal; ARM GAS /tmp/ccfbYRip.s page 509 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** // N = fftLen; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = fftLen; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[(ia * 2)]; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** (pSrc[2 * i + 1] >> 1U) ) >> 1U; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16))); 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16))); 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for stage */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[ia * 2]; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; ARM GAS /tmp/ccfbYRip.s page 510 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16))); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16))); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* stages loop end */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[ia * 2]; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = xt; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l + 1] = yt; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 15393 .loc 20 394 0 15394 01e6 09B0 add sp, sp, #36 15395 .LCFI168: ARM GAS /tmp/ccfbYRip.s page 511 15396 .cfi_remember_state 15397 .cfi_def_cfa_offset 36 15398 @ sp needed 15399 01e8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 15400 .LVL1614: 15401 .L817: 15402 .LCFI169: 15403 .cfi_restore_state 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15404 .loc 20 249 0 15405 01ec 0029 cmp r1, #0 15406 01ee FAD0 beq .L816 15407 01f0 CDF814C0 str ip, [sp, #20] 15408 01f4 E246 mov r10, ip 15409 01f6 6346 mov r3, ip 15410 .LVL1615: 15411 01f8 D4E7 b .L825 15412 .L838: 15413 01fa 00BF .align 2 15414 .L837: 15415 01fc 0000FFFF .word -65536 15416 .cfi_endproc 15417 .LFE177: 15419 .section .text.arm_radix2_butterfly_inverse_q15,"ax",%progbits 15420 .align 1 15421 .p2align 2,,3 15422 .global arm_radix2_butterfly_inverse_q15 15423 .syntax unified 15424 .thumb 15425 .thumb_func 15426 .fpu fpv4-sp-d16 15428 arm_radix2_butterfly_inverse_q15: 15429 .LFB178: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** void arm_radix2_butterfly_inverse_q15( 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t * pSrc, 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t fftLen, 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** const q15_t * pCoef, 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint16_t twidCoefModifier) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15430 .loc 20 402 0 15431 .cfi_startproc 15432 @ args = 0, pretend = 0, frame = 32 15433 @ frame_needed = 0, uses_anonymous_args = 0 15434 .LVL1616: 15435 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 15436 .LCFI170: 15437 .cfi_def_cfa_offset 36 15438 .cfi_offset 4, -36 15439 .cfi_offset 5, -32 15440 .cfi_offset 6, -28 15441 .cfi_offset 7, -24 15442 .cfi_offset 8, -20 15443 .cfi_offset 9, -16 15444 .cfi_offset 10, -12 15445 .cfi_offset 11, -8 ARM GAS /tmp/ccfbYRip.s page 512 15446 .cfi_offset 14, -4 15447 0004 89B0 sub sp, sp, #36 15448 .LCFI171: 15449 .cfi_def_cfa_offset 72 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #if defined (ARM_MATH_DSP) 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t i, j, k, l; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t n1, n2, ia; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t in; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q31_t T, S, R; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q31_t coeff, out1, out2; 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** // N = fftLen; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = fftLen; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = 0; i < n2; i++) 15450 .loc 20 419 0 15451 0006 5FEA510E lsrs lr, r1, #1 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #if defined (ARM_MATH_DSP) 15452 .loc 20 402 0 15453 000a CDE90602 strd r0, r2, [sp, #24] 15454 000e 0093 str r3, [sp] 15455 .loc 20 419 0 15456 0010 00F0CF80 beq .L839 15457 0014 1C46 mov r4, r3 15458 0016 0EF1FF33 add r3, lr, #-1 15459 .LVL1617: 15460 001a 5B08 lsrs r3, r3, #1 15461 001c 00F10809 add r9, r0, #8 15462 0020 4FEA8E0A lsl r10, lr, #2 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (T & 0xFFFF)) >> 1; 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); 15463 .loc 20 429 0 15464 0024 644F ldr r7, .L858 15465 0026 8B46 mov fp, r1 15466 0028 0546 mov r5, r0 15467 002a 09EBC309 add r9, r9, r3, lsl #3 15468 002e 0AF10408 add r8, r10, #4 15469 0032 4FEA840C lsl ip, r4, #2 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15470 .loc 20 419 0 15471 0036 1146 mov r1, r2 15472 .LVL1618: 15473 .L841: ARM GAS /tmp/ccfbYRip.s page 513 15474 .LBB2234: 15475 .LBB2235: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15476 .loc 6 909 0 discriminator 3 15477 0038 2868 ldr r0, [r5] @ unaligned 15478 .LBE2235: 15479 .LBE2234: 15480 .LBB2236: 15481 .LBB2237: 15482 003a 5AF80520 ldr r2, [r10, r5] @ unaligned 15483 .LBE2237: 15484 .LBE2236: 15485 .LBB2238: 15486 .LBB2239: 15487 003e 0C68 ldr r4, [r1] @ unaligned 15488 .LVL1619: 15489 .LBE2239: 15490 .LBE2238: 15491 .loc 20 429 0 discriminator 3 15492 0040 40F34E03 sbfx r3, r0, #1, #15 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (S & 0xFFFF)) >> 1; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); 15493 .loc 20 433 0 discriminator 3 15494 0044 42F34E06 sbfx r6, r2, #1, #15 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15495 .loc 20 429 0 discriminator 3 15496 0048 07EA6000 and r0, r7, r0, asr #1 15497 .LVL1620: 15498 .loc 20 433 0 discriminator 3 15499 004c B6B2 uxth r6, r6 15500 004e 07EA6202 and r2, r7, r2, asr #1 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15501 .loc 20 429 0 discriminator 3 15502 0052 9BB2 uxth r3, r3 15503 0054 0343 orrs r3, r3, r0 15504 .LVL1621: 15505 .loc 20 433 0 discriminator 3 15506 0056 3243 orrs r2, r2, r6 15507 .LVL1622: 15508 .LBB2240: 15509 .LBB2241: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15510 .loc 5 1779 0 discriminator 3 15511 .syntax unified 15512 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15513 0058 D3FA12F0 qsub16 r0, r3, r2 15514 @ 0 "" 2 15515 .LVL1623: 15516 .thumb 15517 .syntax unified 15518 .LBE2241: 15519 .LBE2240: 15520 .LBB2242: 15521 .LBB2243: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccfbYRip.s page 514 15522 .loc 5 1739 0 discriminator 3 15523 .syntax unified 15524 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15525 005c 93FA22F2 shadd16 r2, r3, r2 15526 @ 0 "" 2 15527 .LVL1624: 15528 .thumb 15529 .syntax unified 15530 .LBE2243: 15531 .LBE2242: 15532 .LBB2244: 15533 .LBB2245: 15534 .loc 6 991 0 discriminator 3 15535 0060 2A60 str r2, [r5] @ unaligned 15536 .LVL1625: 15537 .LBE2245: 15538 .LBE2244: 15539 .LBB2246: 15540 .LBB2247: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15541 .loc 5 2043 0 discriminator 3 15542 .syntax unified 15543 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15544 0062 44FB00F2 smusd r2, r4, r0 15545 @ 0 "" 2 15546 .LVL1626: 15547 .thumb 15548 .syntax unified 15549 .LBE2247: 15550 .LBE2246: 15551 .LBB2248: 15552 .LBB2249: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15553 .loc 5 1985 0 discriminator 3 15554 .syntax unified 15555 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15556 0066 24FB10F3 smuadx r3, r4, r0 15557 @ 0 "" 2 15558 .LVL1627: 15559 .thumb 15560 .syntax unified 15561 .LBE2249: 15562 .LBE2248: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSD(coeff, R) >> 16; 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUADX(coeff, R); 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUADX(R, coeff) >> 16U; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSD(__QSUB(0, coeff), R); 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); ARM GAS /tmp/ccfbYRip.s page 515 15563 .loc 20 447 0 discriminator 3 15564 006a 3B40 ands r3, r3, r7 15565 .LVL1628: 15566 006c 43EA1243 orr r3, r3, r2, lsr #16 15567 .LBB2250: 15568 .LBB2251: 15569 .loc 6 991 0 discriminator 3 15570 0070 4AF80530 str r3, [r10, r5] @ unaligned 15571 .LVL1629: 15572 .LBE2251: 15573 .LBE2250: 15574 .LBB2252: 15575 .LBB2253: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15576 .loc 6 909 0 discriminator 3 15577 0074 6A68 ldr r2, [r5, #4] @ unaligned 15578 .LVL1630: 15579 .LBE2253: 15580 .LBE2252: 15581 .LBB2254: 15582 .LBB2255: 15583 0076 58F80500 ldr r0, [r8, r5] @ unaligned 15584 .LVL1631: 15585 .LBE2255: 15586 .LBE2254: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** i++; 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l++; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (T & 0xFFFF)) >> 1; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); 15587 .loc 20 459 0 discriminator 3 15588 007a 42F34E03 sbfx r3, r2, #1, #15 15589 007e 6144 add r1, r1, ip 15590 .LVL1632: 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** in = ((int16_t) (S & 0xFFFF)) >> 1; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); 15591 .loc 20 463 0 discriminator 3 15592 0080 40F34E04 sbfx r4, r0, #1, #15 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15593 .loc 20 459 0 discriminator 3 15594 0084 9EB2 uxth r6, r3 15595 .loc 20 463 0 discriminator 3 15596 0086 A4B2 uxth r4, r4 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15597 .loc 20 459 0 discriminator 3 15598 0088 07EA6203 and r3, r7, r2, asr #1 15599 .loc 20 463 0 discriminator 3 15600 008c 07EA6000 and r0, r7, r0, asr #1 ARM GAS /tmp/ccfbYRip.s page 516 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15601 .loc 20 459 0 discriminator 3 15602 0090 3343 orrs r3, r3, r6 15603 .loc 20 463 0 discriminator 3 15604 0092 2043 orrs r0, r0, r4 15605 .LBB2256: 15606 .LBB2257: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15607 .loc 6 909 0 discriminator 3 15608 0094 0A68 ldr r2, [r1] @ unaligned 15609 .LVL1633: 15610 .LBE2257: 15611 .LBE2256: 15612 .LBB2258: 15613 .LBB2259: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15614 .loc 5 1779 0 discriminator 3 15615 .syntax unified 15616 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15617 0096 D3FA10F4 qsub16 r4, r3, r0 15618 @ 0 "" 2 15619 .LVL1634: 15620 .thumb 15621 .syntax unified 15622 .LBE2259: 15623 .LBE2258: 15624 .LBB2260: 15625 .LBB2261: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15626 .loc 5 1739 0 discriminator 3 15627 .syntax unified 15628 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15629 009a 93FA20F0 shadd16 r0, r3, r0 15630 @ 0 "" 2 15631 .LVL1635: 15632 .thumb 15633 .syntax unified 15634 .LBE2261: 15635 .LBE2260: 15636 .LBB2262: 15637 .LBB2263: 15638 .loc 6 991 0 discriminator 3 15639 009e 6860 str r0, [r5, #4] @ unaligned 15640 .LVL1636: 15641 .LBE2263: 15642 .LBE2262: 15643 .LBB2264: 15644 .LBB2265: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15645 .loc 5 2043 0 discriminator 3 15646 .syntax unified 15647 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15648 00a0 42FB04F0 smusd r0, r2, r4 15649 @ 0 "" 2 15650 .LVL1637: 15651 .thumb 15652 .syntax unified ARM GAS /tmp/ccfbYRip.s page 517 15653 .LBE2265: 15654 .LBE2264: 15655 .LBB2266: 15656 .LBB2267: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15657 .loc 5 1985 0 discriminator 3 15658 .syntax unified 15659 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15660 00a4 22FB14F3 smuadx r3, r2, r4 15661 @ 0 "" 2 15662 .LVL1638: 15663 .thumb 15664 .syntax unified 15665 .LBE2267: 15666 .LBE2266: 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSD(coeff, R) >> 16; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUADX(coeff, R); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUADX(R, coeff) >> 16U; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSD(__QSUB(0, coeff), R); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15667 .loc 20 477 0 discriminator 3 15668 00a8 3B40 ands r3, r3, r7 15669 .LVL1639: 15670 00aa 43EA1043 orr r3, r3, r0, lsr #16 15671 .LBB2268: 15672 .LBB2269: 15673 .loc 6 991 0 discriminator 3 15674 00ae 48F80530 str r3, [r8, r5] @ unaligned 15675 .LVL1640: 15676 00b2 0835 adds r5, r5, #8 15677 .LBE2269: 15678 .LBE2268: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15679 .loc 20 419 0 discriminator 3 15680 00b4 A945 cmp r9, r5 15681 00b6 6144 add r1, r1, ip 15682 00b8 BED1 bne .L841 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 15683 .loc 20 481 0 15684 00ba 009B ldr r3, [sp] 15685 00bc 5B00 lsls r3, r3, #1 15686 00be 9BB2 uxth r3, r3 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for stage */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (k = fftLen / 2; k > 2; k = k >> 1) ARM GAS /tmp/ccfbYRip.s page 518 15687 .loc 20 484 0 15688 00c0 BEF1020F cmp lr, #2 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 15689 .loc 20 481 0 15690 00c4 0493 str r3, [sp, #16] 15691 .LVL1641: 15692 .loc 20 484 0 15693 00c6 60D9 bls .L842 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSD(coeff, R) >> 16; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUADX(coeff, R); 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUADX(R, coeff) >> 16U; 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSD(__QSUB(0, coeff), R); 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15694 .loc 20 518 0 15695 00c8 DFF8EC90 ldr r9, .L858 15696 .LVL1642: 15697 .L845: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 15698 .loc 20 487 0 15699 00cc 4FEA5E03 lsr r3, lr, #1 15700 00d0 1A46 mov r2, r3 15701 00d2 03EB0E07 add r7, r3, lr 15702 00d6 5B45 cmp r3, fp 15703 00d8 0593 str r3, [sp, #20] 15704 .LVL1643: 15705 00da 4FEA830C lsl ip, r3, #2 15706 00de 049B ldr r3, [sp, #16] 15707 00e0 4FEA8303 lsl r3, r3, #2 ARM GAS /tmp/ccfbYRip.s page 519 15708 00e4 0393 str r3, [sp, #12] 15709 00e6 069B ldr r3, [sp, #24] 15710 00e8 0093 str r3, [sp] 15711 00ea 28BF it cs 15712 00ec 5A46 movcs r2, fp 15713 .LVL1644: 15714 00ee 079B ldr r3, [sp, #28] 15715 00f0 0292 str r2, [sp, #8] 15716 00f2 BF00 lsls r7, r7, #2 15717 00f4 4FEA4E0E lsl lr, lr, #1 15718 00f8 0193 str r3, [sp, #4] 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15719 .loc 20 491 0 15720 00fa 4FF00008 mov r8, #0 15721 .LVL1645: 15722 .L844: 15723 .LBB2270: 15724 .LBB2271: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15725 .loc 6 909 0 15726 00fe 019B ldr r3, [sp, #4] 15727 0100 009A ldr r2, [sp] 15728 0102 1C68 ldr r4, [r3] @ unaligned 15729 .LVL1646: 15730 0104 4546 mov r5, r8 15731 .LVL1647: 15732 .L843: 15733 .LBE2271: 15734 .LBE2270: 15735 .LBB2272: 15736 .LBB2273: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15737 .loc 6 909 0 is_stmt 0 discriminator 3 15738 0106 1168 ldr r1, [r2] @ unaligned 15739 .LVL1648: 15740 .LBE2273: 15741 .LBE2272: 15742 .LBB2274: 15743 .LBB2275: 15744 0108 52F80C00 ldr r0, [r2, ip] @ unaligned 15745 .LVL1649: 15746 .LBE2275: 15747 .LBE2274: 15748 .LBB2276: 15749 .LBB2277: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15750 .loc 5 1779 0 is_stmt 1 discriminator 3 15751 .syntax unified 15752 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15753 010c D1FA10F3 qsub16 r3, r1, r0 15754 @ 0 "" 2 15755 .LVL1650: 15756 .thumb 15757 .syntax unified 15758 .LBE2277: 15759 .LBE2276: 15760 .LBB2278: ARM GAS /tmp/ccfbYRip.s page 520 15761 .LBB2279: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15762 .loc 5 1739 0 discriminator 3 15763 .syntax unified 15764 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15765 0110 91FA20F1 shadd16 r1, r1, r0 15766 @ 0 "" 2 15767 .LVL1651: 15768 .thumb 15769 .syntax unified 15770 .LBE2279: 15771 .LBE2278: 15772 .LBB2280: 15773 .LBB2281: 15774 .loc 6 991 0 discriminator 3 15775 0114 1160 str r1, [r2] @ unaligned 15776 .LVL1652: 15777 .LBE2281: 15778 .LBE2280: 15779 .LBB2282: 15780 .LBB2283: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15781 .loc 5 2043 0 discriminator 3 15782 .syntax unified 15783 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15784 0116 44FB03F1 smusd r1, r4, r3 15785 @ 0 "" 2 15786 .LVL1653: 15787 .thumb 15788 .syntax unified 15789 .LBE2283: 15790 .LBE2282: 15791 .LBB2284: 15792 .LBB2285: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15793 .loc 5 1985 0 discriminator 3 15794 .syntax unified 15795 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15796 011a 24FB13F3 smuadx r3, r4, r3 15797 @ 0 "" 2 15798 .LVL1654: 15799 .thumb 15800 .syntax unified 15801 .LBE2285: 15802 .LBE2284: 15803 .loc 20 518 0 discriminator 3 15804 011e 03EA0903 and r3, r3, r9 15805 .LVL1655: 15806 0122 43EA1143 orr r3, r3, r1, lsr #16 15807 .LBB2286: 15808 .LBB2287: 15809 .loc 6 991 0 discriminator 3 15810 0126 42F80C30 str r3, [r2, ip] @ unaligned 15811 .LVL1656: 15812 012a 02EB0A01 add r1, r2, r10 15813 .LVL1657: 15814 .LBE2287: ARM GAS /tmp/ccfbYRip.s page 521 15815 .LBE2286: 15816 .LBB2288: 15817 .LBB2289: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 15818 .loc 6 909 0 discriminator 3 15819 012e D659 ldr r6, [r2, r7] @ unaligned 15820 .LBE2289: 15821 .LBE2288: 15822 .LBB2290: 15823 .LBB2291: 15824 0130 0868 ldr r0, [r1] @ unaligned 15825 .LVL1658: 15826 .LBE2291: 15827 .LBE2290: 15828 .LBB2292: 15829 .LBB2293: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15830 .loc 5 1779 0 discriminator 3 15831 .syntax unified 15832 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15833 0132 D0FA16F3 qsub16 r3, r0, r6 15834 @ 0 "" 2 15835 .LVL1659: 15836 .thumb 15837 .syntax unified 15838 .LBE2293: 15839 .LBE2292: 15840 .LBB2294: 15841 .LBB2295: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15842 .loc 5 1739 0 discriminator 3 15843 .syntax unified 15844 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15845 0136 90FA26F0 shadd16 r0, r0, r6 15846 @ 0 "" 2 15847 .LVL1660: 15848 .thumb 15849 .syntax unified 15850 .LBE2295: 15851 .LBE2294: 15852 .LBB2296: 15853 .LBB2297: 15854 .loc 6 991 0 discriminator 3 15855 013a 42F80A00 str r0, [r2, r10] @ unaligned 15856 .LVL1661: 15857 .LBE2297: 15858 .LBE2296: 15859 .LBB2298: 15860 .LBB2299: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15861 .loc 5 2043 0 discriminator 3 15862 .syntax unified 15863 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15864 013e 44FB03F0 smusd r0, r4, r3 15865 @ 0 "" 2 15866 .LVL1662: 15867 .thumb ARM GAS /tmp/ccfbYRip.s page 522 15868 .syntax unified 15869 .LBE2299: 15870 .LBE2298: 15871 .LBB2300: 15872 .LBB2301: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15873 .loc 5 1985 0 discriminator 3 15874 .syntax unified 15875 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15876 0142 24FB13F3 smuadx r3, r4, r3 15877 @ 0 "" 2 15878 .LVL1663: 15879 .thumb 15880 .syntax unified 15881 .LBE2301: 15882 .LBE2300: 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** i += n1; 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUSD(coeff, R) >> 16; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUADX(coeff, R); 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out1 = __SMUADX(R, coeff) >> 16U; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** out2 = __SMUSD(__QSUB(0, coeff), R); 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); 15883 .loc 20 540 0 discriminator 3 15884 0146 03EA0903 and r3, r3, r9 15885 .LVL1664: 15886 014a 7544 add r5, r5, lr 15887 014c 43EA1043 orr r3, r3, r0, lsr #16 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15888 .loc 20 498 0 discriminator 3 15889 0150 AB45 cmp fp, r5 15890 .LBB2302: 15891 .LBB2303: 15892 .loc 6 991 0 discriminator 3 15893 0152 D351 str r3, [r2, r7] @ unaligned 15894 .LVL1665: 15895 0154 0AEB0102 add r2, r10, r1 15896 .LBE2303: 15897 .LBE2302: 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15898 .loc 20 498 0 discriminator 3 15899 0158 D5D8 bhi .L843 ARM GAS /tmp/ccfbYRip.s page 523 15900 015a 019B ldr r3, [sp, #4] 15901 015c 039A ldr r2, [sp, #12] 15902 015e 1344 add r3, r3, r2 15903 0160 0193 str r3, [sp, #4] 15904 0162 009B ldr r3, [sp] 15905 0164 0433 adds r3, r3, #4 15906 0166 0093 str r3, [sp] 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15907 .loc 20 491 0 15908 0168 029B ldr r3, [sp, #8] 15909 016a 08F10108 add r8, r8, #1 15910 .LVL1666: 15911 016e 9845 cmp r8, r3 15912 0170 C5D3 bcc .L844 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 15913 .loc 20 546 0 15914 0172 049B ldr r3, [sp, #16] 15915 0174 DDF814E0 ldr lr, [sp, #20] 15916 0178 5B00 lsls r3, r3, #1 15917 017a 9BB2 uxth r3, r3 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15918 .loc 20 484 0 15919 017c BEF1020F cmp lr, #2 15920 .loc 20 546 0 15921 0180 0493 str r3, [sp, #16] 15922 .LVL1667: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 15923 .loc 20 484 0 15924 0182 02D9 bls .L842 15925 0184 4FEA8E0A lsl r10, lr, #2 15926 0188 A0E7 b .L845 15927 .LVL1668: 15928 .L842: 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* stages loop end */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 15929 .loc 20 554 0 15930 018a 5FEA5E03 lsrs r3, lr, #1 15931 018e 10D0 beq .L839 15932 0190 0698 ldr r0, [sp, #24] 15933 .LVL1669: 15934 0192 0021 movs r1, #0 15935 .LVL1670: 15936 .L846: 15937 .LBB2304: 15938 .LBB2305: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else ARM GAS /tmp/ccfbYRip.s page 524 15939 .loc 6 909 0 discriminator 3 15940 0194 0246 mov r2, r0 15941 0196 52F8043B ldr r3, [r2], #4 @ unaligned 15942 .LVL1671: 15943 .LBE2305: 15944 .LBE2304: 15945 .LBB2306: 15946 .LBB2307: 15947 019a 1268 ldr r2, [r2] @ unaligned 15948 .LVL1672: 15949 .LBE2307: 15950 .LBE2306: 15951 .LBB2308: 15952 .LBB2309: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15953 .loc 5 1779 0 discriminator 3 15954 .syntax unified 15955 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15956 019c D3FA12F4 qsub16 r4, r3, r2 15957 @ 0 "" 2 15958 .LVL1673: 15959 .thumb 15960 .syntax unified 15961 .LBE2309: 15962 .LBE2308: 15963 .LBB2310: 15964 .LBB2311: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 15965 .loc 5 1731 0 discriminator 3 15966 .syntax unified 15967 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 15968 01a0 93FA12F3 qadd16 r3, r3, r2 15969 @ 0 "" 2 15970 .LVL1674: 15971 .thumb 15972 .syntax unified 15973 .LBE2311: 15974 .LBE2310: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 15975 .loc 20 561 0 discriminator 3 15976 01a4 0231 adds r1, r1, #2 15977 .LVL1675: 15978 01a6 8B45 cmp fp, r1 15979 .LBB2312: 15980 .LBB2313: 15981 .loc 6 991 0 discriminator 3 15982 01a8 0360 str r3, [r0] @ unaligned 15983 .LVL1676: 15984 .LBE2313: 15985 .LBE2312: 15986 .LBB2314: ARM GAS /tmp/ccfbYRip.s page 525 15987 .LBB2315: 15988 01aa 4460 str r4, [r0, #4] @ unaligned 15989 .LVL1677: 15990 01ac 00F10800 add r0, r0, #8 15991 .LBE2315: 15992 .LBE2314: 15993 .loc 20 561 0 discriminator 3 15994 01b0 F0D8 bhi .L846 15995 .LVL1678: 15996 .L839: 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** T = read_q15x2 (pSrc + (2 * i)); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** S = read_q15x2 (pSrc + (2 * l)); 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** R = __QSUB16(T, S); 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** write_q15x2 (pSrc + (2 * l), R); 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t i, j, k, l; 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** uint32_t n1, n2, ia; 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** q15_t xt, yt, cosVal, sinVal; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** // N = fftLen; 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = fftLen; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[(ia * 2)]; 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); ARM GAS /tmp/ccfbYRip.s page 526 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** (pSrc[2 * i + 1] >> 1U) ) >> 1U; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16))); 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16))); 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for stage */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for groups */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (j = 0; j < n2; j++) 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[(ia * 2)]; 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = j; i < fftLen; i += n1) 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) yt * sinVal) >> 16)) ); 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ((int16_t) (((q31_t) xt * sinVal) >> 16)) ); 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* butterfly loop end */ 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** twidCoefModifier = twidCoefModifier << 1U; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* stages loop end */ 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n1 = n2; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** n2 = n2 >> 1; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = 0; 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** cosVal = pCoef[(ia * 2)]; ARM GAS /tmp/ccfbYRip.s page 527 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** sinVal = pCoef[(ia * 2) + 1]; 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** ia = ia + twidCoefModifier; 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** /* loop for butterfly */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** for (i = 0; i < fftLen; i += n1) 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** l = i + n2; 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l] = xt; 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** pSrc[2 * l + 1] = yt; 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } /* groups loop end */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 15997 .loc 20 689 0 15998 01b2 09B0 add sp, sp, #36 15999 .LCFI172: 16000 .cfi_def_cfa_offset 36 16001 @ sp needed 16002 01b4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16003 .LVL1679: 16004 .L859: 16005 .align 2 16006 .L858: 16007 01b8 0000FFFF .word -65536 16008 .cfi_endproc 16009 .LFE178: 16011 .section .text.arm_cfft_radix2_q15,"ax",%progbits 16012 .align 1 16013 .p2align 2,,3 16014 .global arm_cfft_radix2_q15 16015 .syntax unified 16016 .thumb 16017 .thumb_func 16018 .fpu fpv4-sp-d16 16020 arm_cfft_radix2_q15: 16021 .LFB176: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 16022 .loc 20 69 0 16023 .cfi_startproc 16024 @ args = 0, pretend = 0, frame = 0 16025 @ frame_needed = 0, uses_anonymous_args = 0 16026 .LVL1680: 16027 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 16028 .LCFI173: 16029 .cfi_def_cfa_offset 40 16030 .cfi_offset 3, -40 ARM GAS /tmp/ccfbYRip.s page 528 16031 .cfi_offset 4, -36 16032 .cfi_offset 5, -32 16033 .cfi_offset 6, -28 16034 .cfi_offset 7, -24 16035 .cfi_offset 8, -20 16036 .cfi_offset 9, -16 16037 .cfi_offset 10, -12 16038 .cfi_offset 11, -8 16039 .cfi_offset 14, -4 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 16040 .loc 20 69 0 16041 0004 0646 mov r6, r0 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 16042 .loc 20 71 0 16043 0006 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 16044 .LVL1681: 16045 0008 7268 ldr r2, [r6, #4] 16046 000a B389 ldrh r3, [r6, #12] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 16047 .loc 20 69 0 16048 000c 0C46 mov r4, r1 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 16049 .loc 20 71 0 16050 000e 0128 cmp r0, #1 16051 0010 3188 ldrh r1, [r6] 16052 .LVL1682: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 16053 .loc 20 73 0 16054 0012 2046 mov r0, r4 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** { 16055 .loc 20 71 0 16056 0014 34D0 beq .L867 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 16057 .loc 20 77 0 16058 0016 FFF7FEFF bl arm_radix2_butterfly_q15 16059 .LVL1683: 16060 .L862: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 16061 .loc 20 80 0 16062 001a 3588 ldrh r5, [r6] 16063 .LBB2318: 16064 .LBB2319: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 16065 .loc 7 227 0 16066 001c F789 ldrh r7, [r6, #14] 16067 .LBE2319: 16068 .LBE2318: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 16069 .loc 20 80 0 16070 001e B068 ldr r0, [r6, #8] 16071 .LVL1684: 16072 .LBB2321: 16073 .LBB2320: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 16074 .loc 7 196 0 16075 0020 6D08 lsrs r5, r5, #1 16076 .LVL1685: ARM GAS /tmp/ccfbYRip.s page 529 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16077 .loc 7 200 0 16078 0022 0021 movs r1, #0 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 16079 .loc 7 197 0 16080 0024 05F10108 add r8, r5, #1 16081 .LVL1686: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16082 .loc 7 200 0 16083 0028 A5F1020E sub lr, r5, #2 16084 002c 4FEA850C lsl ip, r5, #2 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 16085 .loc 7 227 0 16086 0030 4FEA470B lsl fp, r7, #1 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 16087 .loc 7 195 0 16088 0034 0B46 mov r3, r1 16089 0036 2246 mov r2, r4 16090 0038 10E0 b .L863 16091 .LVL1687: 16092 .L865: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16093 .loc 7 202 0 16094 003a 8B42 cmp r3, r1 16095 003c 0DD9 bls .L864 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i] = pSrc[j]; 16096 .loc 7 206 0 16097 003e 9668 ldr r6, [r2, #8] 16098 .LVL1688: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j] = in; 16099 .loc 7 207 0 16100 0040 54F82370 ldr r7, [r4, r3, lsl #2] 16101 0044 9760 str r7, [r2, #8] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 16102 .loc 7 208 0 16103 0046 44F82360 str r6, [r4, r3, lsl #2] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; 16104 .loc 7 212 0 16105 004a D9F80C60 ldr r6, [r9, #12] 16106 .LVL1689: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 16107 .loc 7 213 0 16108 004e 54F82A70 ldr r7, [r4, r10, lsl #2] 16109 0052 C9F80C70 str r7, [r9, #12] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 16110 .loc 7 214 0 16111 0056 44F82A60 str r6, [r4, r10, lsl #2] 16112 .L864: 16113 005a 0832 adds r2, r2, #8 16114 .LVL1690: 16115 .L863: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 16116 .loc 7 220 0 16117 005c 2B44 add r3, r3, r5 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + 1U] = pSrc[j + fftLenBy2]; 16118 .loc 7 219 0 16119 005e 5668 ldr r6, [r2, #4] ARM GAS /tmp/ccfbYRip.s page 530 16120 .LVL1691: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 16121 .loc 7 220 0 16122 0060 54F82370 ldr r7, [r4, r3, lsl #2] 16123 0064 5760 str r7, [r2, #4] 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16124 .loc 7 200 0 16125 0066 0231 adds r1, r1, #2 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 16126 .loc 7 221 0 16127 0068 44F82360 str r6, [r4, r3, lsl #2] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 16128 .loc 7 224 0 16129 006c 0388 ldrh r3, [r0] 16130 .LVL1692: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16131 .loc 7 200 0 16132 006e 7145 cmp r1, lr 16133 0070 02EB0C09 add r9, r2, ip 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 16134 .loc 7 213 0 16135 0074 08EB030A add r10, r8, r3 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 16136 .loc 7 227 0 16137 0078 5844 add r0, r0, fp 16138 .LVL1693: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 16139 .loc 7 200 0 16140 007a DED9 bls .L865 16141 .LBE2320: 16142 .LBE2321: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** 16143 .loc 20 81 0 16144 007c BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 16145 .LVL1694: 16146 .L867: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c **** } 16147 .loc 20 73 0 16148 0080 FFF7FEFF bl arm_radix2_butterfly_inverse_q15 16149 .LVL1695: 16150 0084 C9E7 b .L862 16151 .cfi_endproc 16152 .LFE176: 16154 0086 00BF .section .text.arm_radix2_butterfly_q31,"ax",%progbits 16155 .align 1 16156 .p2align 2,,3 16157 .global arm_radix2_butterfly_q31 16158 .syntax unified 16159 .thumb 16160 .thumb_func 16161 .fpu fpv4-sp-d16 16163 arm_radix2_butterfly_q31: 16164 .LFB180: 16165 .file 21 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Title: arm_cfft_radix2_q31.c ARM GAS /tmp/ccfbYRip.s page 531 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_radix2_butterfly_q31( 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc, 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint32_t fftLen, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const q31_t * pCoef, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint16_t twidCoefModifier); 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_radix2_butterfly_inverse_q31( 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint32_t fftLen, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const q31_t * pCoef, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint16_t twidCoefModifier); 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_bitreversal_q31( 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint32_t fftLen, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint16_t bitRevFactor, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const uint16_t * pBitRevTab); 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @ingroup groupTransforms 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @addtogroup ComplexFFT 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @{ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @brief Processing function for the fixed-point CFFT/CIFFT. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be ARM GAS /tmp/ccfbYRip.s page 532 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing o 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @return none 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** */ 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_cfft_radix2_q31( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const arm_cfft_radix2_instance_q31 * S, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** if (S->ifftFlag == 1U) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** S->pTwiddle, S->twidCoefModifier); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** else 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** arm_radix2_butterfly_q31(pSrc, S->fftLen, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** S->pTwiddle, S->twidCoefModifier); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** /** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** @} end of ComplexFFT group 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_radix2_butterfly_q31( 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc, 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint32_t fftLen, 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const q31_t * pCoef, 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint16_t twidCoefModifier) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16166 .loc 21 94 0 16167 .cfi_startproc 16168 @ args = 0, pretend = 0, frame = 72 16169 @ frame_needed = 0, uses_anonymous_args = 0 16170 .LVL1696: 16171 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 16172 .LCFI174: 16173 .cfi_def_cfa_offset 36 16174 .cfi_offset 4, -36 16175 .cfi_offset 5, -32 16176 .cfi_offset 6, -28 16177 .cfi_offset 7, -24 16178 .cfi_offset 8, -20 16179 .cfi_offset 9, -16 16180 .cfi_offset 10, -12 16181 .cfi_offset 11, -8 16182 .cfi_offset 14, -4 16183 0004 93B0 sub sp, sp, #76 16184 .LCFI175: 16185 .cfi_def_cfa_offset 112 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** unsigned i, j, k, l, m; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** unsigned n1, n2, ia; ARM GAS /tmp/ccfbYRip.s page 533 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t xt, yt, cosVal, sinVal; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t p0, p1; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** //N = fftLen; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = fftLen; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for groups 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (i = 0; i < n2; i++) 16186 .loc 21 109 0 16187 0006 4C08 lsrs r4, r1, #1 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16188 .loc 21 94 0 16189 0008 CDE90E01 strd r0, r1, [sp, #56] 16190 000c 1092 str r2, [sp, #64] 16191 000e 0293 str r3, [sp, #8] 16192 .loc 21 109 0 16193 0010 00F0DB80 beq .L869 16194 0014 0146 mov r1, r0 16195 .LVL1697: 16196 0016 0430 adds r0, r0, #4 16197 .LVL1698: 16198 0018 4FEAC40A lsl r10, r4, #3 16199 001c 1190 str r0, [sp, #68] 16200 001e 8146 mov r9, r0 16201 0020 0846 mov r0, r1 16202 0022 5044 add r0, r0, r10 16203 0024 DB00 lsls r3, r3, #3 16204 .LVL1699: 16205 0026 8E46 mov lr, r1 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 16206 .loc 21 123 0 16207 0028 8046 mov r8, r0 16208 002a 9C46 mov ip, r3 16209 002c 0692 str r2, [sp, #24] 16210 002e CDF810A0 str r10, [sp, #16] 16211 .LVL1700: 16212 .L870: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 16213 .loc 21 116 0 discriminator 3 16214 0032 5EF83420 ldr r2, [lr, r4, lsl #3] ARM GAS /tmp/ccfbYRip.s page 534 16215 0036 59F8043C ldr r3, [r9, #-4] 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 16216 .loc 21 111 0 discriminator 3 16217 003a 0699 ldr r1, [sp, #24] 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 16218 .loc 21 116 0 discriminator 3 16219 003c 5510 asrs r5, r2, #1 16220 003e 5B10 asrs r3, r3, #1 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 16221 .loc 21 112 0 discriminator 3 16222 0040 D1E90060 ldrd r6, r0, [r1] 16223 .LVL1701: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16224 .loc 21 117 0 discriminator 3 16225 0044 5919 adds r1, r3, r5 16226 0046 4910 asrs r1, r1, #1 16227 0048 49F8041C str r1, [r9, #-4] 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 16228 .loc 21 119 0 discriminator 3 16229 004c DEF80420 ldr r2, [lr, #4] 16230 0050 59F83410 ldr r1, [r9, r4, lsl #3] 16231 0054 5210 asrs r2, r2, #1 16232 0056 4910 asrs r1, r1, #1 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 16233 .loc 21 116 0 discriminator 3 16234 0058 5B1B subs r3, r3, r5 16235 .LVL1702: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16236 .loc 21 124 0 discriminator 3 16237 005a 4FF0004A mov r10, #-2147483648 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 16238 .loc 21 119 0 discriminator 3 16239 005e 551A subs r5, r2, r1 16240 .LVL1703: 16241 .loc 21 124 0 discriminator 3 16242 0060 4FF0000B mov fp, #0 16243 0064 C5FB06AB smlal r10, fp, r5, r6 16244 0068 CDE900AB strd r10, [sp] 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16245 .loc 21 123 0 discriminator 3 16246 006c 4FF0004A mov r10, #-2147483648 16247 0070 4FF0000B mov fp, #0 16248 0074 C6FB03AB smlal r10, fp, r6, r3 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16249 .loc 21 125 0 discriminator 3 16250 0078 5F46 mov r7, fp 16251 007a 0026 movs r6, #0 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p1, xt, sinVal); 16252 .loc 21 126 0 discriminator 3 16253 007c DDE900AB ldrd r10, [sp] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16254 .loc 21 125 0 discriminator 3 16255 0080 C0FB0567 smlal r6, r7, r0, r5 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16256 .loc 21 121 0 discriminator 3 16257 0084 0A44 add r2, r2, r1 16258 .loc 21 126 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 535 16259 0086 4FF0000A mov r10, #0 16260 008a 83FB0001 smull r0, r1, r3, r0 16261 .LVL1704: 16262 008e BAEB000A subs r10, r10, r0 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16263 .loc 21 125 0 discriminator 3 16264 0092 3546 mov r5, r6 16265 .LVL1705: 16266 .loc 21 126 0 discriminator 3 16267 0094 6BEB010B sbc fp, fp, r1 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16268 .loc 21 125 0 discriminator 3 16269 0098 15F10045 adds r5, r5, #-2147483648 16270 009c 47F10006 adc r6, r7, #0 16271 00a0 069B ldr r3, [sp, #24] 16272 .LVL1706: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16273 .loc 21 121 0 discriminator 3 16274 00a2 5210 asrs r2, r2, #1 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 16275 .loc 21 120 0 discriminator 3 16276 00a4 CEF80420 str r2, [lr, #4] 16277 .LVL1707: 16278 .loc 21 126 0 discriminator 3 16279 00a8 1AF10040 adds r0, r10, #-2147483648 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p1, xt, sinVal); 16280 .loc 21 125 0 discriminator 3 16281 00ac 4EF83460 str r6, [lr, r4, lsl #3] 16282 00b0 0EF1080E add lr, lr, #8 16283 .loc 21 126 0 discriminator 3 16284 00b4 4BF10001 adc r1, fp, #0 16285 00b8 6344 add r3, r3, ip 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16286 .loc 21 109 0 discriminator 3 16287 00ba F045 cmp r8, lr 16288 .loc 21 126 0 discriminator 3 16289 00bc 49F83410 str r1, [r9, r4, lsl #3] 16290 .LVL1708: 16291 00c0 0693 str r3, [sp, #24] 16292 00c2 09F10809 add r9, r9, #8 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16293 .loc 21 109 0 discriminator 3 16294 00c6 B4D1 bne .L870 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = p0; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = p1; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // groups loop end 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** twidCoefModifier <<= 1U; 16295 .loc 21 133 0 16296 00c8 029B ldr r3, [sp, #8] 16297 00ca DDF810A0 ldr r10, [sp, #16] 16298 00ce 5B00 lsls r3, r3, #1 16299 00d0 9BB2 uxth r3, r3 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for stage ARM GAS /tmp/ccfbYRip.s page 536 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 16300 .loc 21 136 0 16301 00d2 022C cmp r4, #2 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16302 .loc 21 133 0 16303 00d4 0D93 str r3, [sp, #52] 16304 .LVL1709: 16305 .loc 21 136 0 16306 00d6 40F2C580 bls .L878 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for groups 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (j = 0; j < n2; j++) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for butterfly 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** i = j; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** m = fftLen / n1; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** do 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 16307 .loc 21 161 0 16308 00da 4FF00048 mov r8, #-2147483648 16309 00de 4FF00009 mov r9, #0 16310 00e2 CDE90089 strd r8, [sp] 16311 00e6 CDF830A0 str r10, [sp, #48] 16312 .L874: 16313 .LVL1710: 16314 00ea 0E9B ldr r3, [sp, #56] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** do 16315 .loc 21 151 0 16316 00ec 0793 str r3, [sp, #28] 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 16317 .loc 21 139 0 16318 00ee 4FEA5409 lsr r9, r4, #1 16319 .LVL1711: 16320 00f2 03EBC902 add r2, r3, r9, lsl #3 16321 00f6 0A92 str r2, [sp, #40] 16322 00f8 0D9A ldr r2, [sp, #52] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** do 16323 .loc 21 151 0 16324 00fa 109B ldr r3, [sp, #64] 16325 00fc 0893 str r3, [sp, #32] 16326 00fe D200 lsls r2, r2, #3 ARM GAS /tmp/ccfbYRip.s page 537 16327 0100 0F9B ldr r3, [sp, #60] 16328 0102 0B92 str r2, [sp, #44] 16329 0104 B3FBF4F3 udiv r3, r3, r4 16330 0108 0993 str r3, [sp, #36] 16331 .LVL1712: 16332 .L873: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 16333 .loc 21 145 0 16334 010a 089B ldr r3, [sp, #32] 16335 010c 079E ldr r6, [sp, #28] 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 16336 .loc 21 146 0 16337 010e D3F804B0 ldr fp, [r3, #4] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** do 16338 .loc 21 151 0 16339 0112 DDF824A0 ldr r10, [sp, #36] 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 16340 .loc 21 145 0 16341 0116 D3F80080 ldr r8, [r3] 16342 .LVL1713: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** do 16343 .loc 21 151 0 16344 011a DDF830C0 ldr ip, [sp, #48] 16345 011e CDF818A0 str r10, [sp, #24] 16346 0122 371D adds r7, r6, #4 16347 0124 DE46 mov lr, fp 16348 .LVL1714: 16349 .L872: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 16350 .loc 21 155 0 discriminator 1 16351 0126 57F8041C ldr r1, [r7, #-4] 16352 012a 56F83920 ldr r2, [r6, r9, lsl #3] 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16353 .loc 21 156 0 discriminator 1 16354 012e 8B18 adds r3, r1, r2 16355 0130 5B10 asrs r3, r3, #1 16356 0132 47F8043C str r3, [r7, #-4] 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 16357 .loc 21 158 0 discriminator 1 16358 0136 7368 ldr r3, [r6, #4] 16359 0138 57F83950 ldr r5, [r7, r9, lsl #3] 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 16360 .loc 21 155 0 discriminator 1 16361 013c 8A1A subs r2, r1, r2 16362 .LVL1715: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16363 .loc 21 162 0 discriminator 1 16364 013e DDE90001 ldrd r0, [sp] 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 16365 .loc 21 158 0 discriminator 1 16366 0142 5C1B subs r4, r3, r5 16367 .LVL1716: 16368 .loc 21 162 0 discriminator 1 16369 0144 C8FB0401 smlal r0, r1, r8, r4 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p1, xt, sinVal); 16370 .loc 21 164 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 538 16371 0148 8B46 mov fp, r1 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16372 .loc 21 161 0 discriminator 1 16373 014a DDE90001 ldrd r0, [sp] 16374 .loc 21 164 0 discriminator 1 16375 014e 4FF0000A mov r10, #0 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16376 .loc 21 161 0 discriminator 1 16377 0152 C8FB0201 smlal r0, r1, r8, r2 16378 .loc 21 164 0 discriminator 1 16379 0156 CDE904AB strd r10, [sp, #16] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16380 .loc 21 163 0 discriminator 1 16381 015a 0020 movs r0, #0 16382 015c CEFB0401 smlal r0, r1, lr, r4 16383 .loc 21 164 0 discriminator 1 16384 0160 DDE904AB ldrd r10, [sp, #16] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16385 .loc 21 163 0 discriminator 1 16386 0164 CDE90201 strd r0, [sp, #8] 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16387 .loc 21 159 0 discriminator 1 16388 0168 1D44 add r5, r5, r3 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16389 .loc 21 163 0 discriminator 1 16390 016a DDE90201 ldrd r0, [sp, #8] 16391 .loc 21 164 0 discriminator 1 16392 016e 82FB0E23 smull r2, r3, r2, lr 16393 .LVL1717: 16394 0172 BAEB020A subs r10, r10, r2 16395 0176 6BEB030B sbc fp, fp, r3 16396 017a 1AF10042 adds r2, r10, #-2147483648 16397 017e 4BF10003 adc r3, fp, #0 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16398 .loc 21 163 0 discriminator 1 16399 0182 10F10040 adds r0, r0, #-2147483648 16400 0186 41F10001 adc r1, r1, #0 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16401 .loc 21 159 0 discriminator 1 16402 018a 6D10 asrs r5, r5, #1 16403 018c 7560 str r5, [r6, #4] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p0, yt, sinVal); 16404 .loc 21 163 0 discriminator 1 16405 018e 46F83910 str r1, [r6, r9, lsl #3] 16406 .loc 21 164 0 discriminator 1 16407 0192 47F83930 str r3, [r7, r9, lsl #3] 16408 .LVL1718: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = p0; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = p1; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** i += n1; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** m--; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } while ( m > 0); // butterfly loop end 16409 .loc 21 170 0 discriminator 1 16410 0196 069B ldr r3, [sp, #24] 16411 0198 013B subs r3, r3, #1 16412 .LVL1719: ARM GAS /tmp/ccfbYRip.s page 539 16413 019a 6644 add r6, r6, ip 16414 019c 6744 add r7, r7, ip 16415 019e 0693 str r3, [sp, #24] 16416 01a0 C1D1 bne .L872 16417 01a2 089A ldr r2, [sp, #32] 16418 01a4 0B99 ldr r1, [sp, #44] 16419 01a6 079B ldr r3, [sp, #28] 16420 .LVL1720: 16421 01a8 0A44 add r2, r2, r1 16422 01aa 0892 str r2, [sp, #32] 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16423 .loc 21 143 0 discriminator 2 16424 01ac 0A9A ldr r2, [sp, #40] 16425 01ae 0833 adds r3, r3, #8 16426 01b0 9A42 cmp r2, r3 16427 01b2 0793 str r3, [sp, #28] 16428 01b4 A9D1 bne .L873 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // groups loop end 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** twidCoefModifier <<= 1U; 16429 .loc 21 174 0 16430 01b6 0D9B ldr r3, [sp, #52] 16431 01b8 4C46 mov r4, r9 16432 .LVL1721: 16433 01ba 5B00 lsls r3, r3, #1 16434 01bc 9BB2 uxth r3, r3 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16435 .loc 21 136 0 16436 01be 022C cmp r4, #2 16437 .loc 21 174 0 16438 01c0 0D93 str r3, [sp, #52] 16439 .LVL1722: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16440 .loc 21 136 0 16441 01c2 4AD9 bls .L887 16442 01c4 E300 lsls r3, r4, #3 16443 01c6 0C93 str r3, [sp, #48] 16444 01c8 8FE7 b .L874 16445 .LVL1723: 16446 .L869: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // stages loop end 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for butterfly 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (i = 0; i < fftLen; i += n1) 16447 .loc 21 186 0 16448 01ca 11B9 cbnz r1, .L889 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; ARM GAS /tmp/ccfbYRip.s page 540 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = xt; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = yt; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** i += n1; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = xt; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = yt; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // butterfly loop end 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 16449 .loc 21 214 0 16450 01cc 13B0 add sp, sp, #76 16451 .LCFI176: 16452 .cfi_remember_state 16453 .cfi_def_cfa_offset 36 16454 @ sp needed 16455 01ce BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16456 .L889: 16457 .LCFI177: 16458 .cfi_restore_state 16459 01d2 0E9B ldr r3, [sp, #56] 16460 .LVL1724: 16461 01d4 0433 adds r3, r3, #4 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16462 .loc 21 186 0 16463 01d6 A346 mov fp, r4 16464 01d8 1193 str r3, [sp, #68] 16465 .LVL1725: 16466 .L877: 16467 01da 0E98 ldr r0, [sp, #56] 16468 01dc 0F9D ldr r5, [sp, #60] 16469 01de 4FEA0B1E lsl lr, fp, #4 16470 01e2 4FEA4B08 lsl r8, fp, #1 16471 01e6 4FF0000C mov ip, #0 16472 01ea 04EB0B07 add r7, r4, fp 16473 .LVL1726: 16474 .L876: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16475 .loc 21 189 0 discriminator 3 16476 01ee 50F83490 ldr r9, [r0, r4, lsl #3] 16477 01f2 53F8041C ldr r1, [r3, #-4] ARM GAS /tmp/ccfbYRip.s page 541 16478 .LVL1727: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16479 .loc 21 190 0 discriminator 3 16480 01f6 01EB0902 add r2, r1, r9 16481 01fa 43F8042C str r2, [r3, #-4] 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16482 .loc 21 192 0 discriminator 3 16483 01fe 53F83460 ldr r6, [r3, r4, lsl #3] 16484 0202 4268 ldr r2, [r0, #4] 16485 .LVL1728: 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16486 .loc 21 189 0 discriminator 3 16487 0204 A1EB0901 sub r1, r1, r9 16488 .LVL1729: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16489 .loc 21 193 0 discriminator 3 16490 0208 02EB0609 add r9, r2, r6 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16491 .loc 21 192 0 discriminator 3 16492 020c 921B subs r2, r2, r6 16493 .LVL1730: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16494 .loc 21 193 0 discriminator 3 16495 020e C0F80490 str r9, [r0, #4] 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16496 .loc 21 195 0 discriminator 3 16497 0212 40F83410 str r1, [r0, r4, lsl #3] 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16498 .loc 21 197 0 discriminator 3 16499 0216 43F83420 str r2, [r3, r4, lsl #3] 16500 .LVL1731: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16501 .loc 21 202 0 discriminator 3 16502 021a 50F83790 ldr r9, [r0, r7, lsl #3] 16503 021e 50F83B10 ldr r1, [r0, fp, lsl #3] 16504 .LVL1732: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16505 .loc 21 203 0 discriminator 3 16506 0222 01EB0902 add r2, r1, r9 16507 .LVL1733: 16508 0226 40F83B20 str r2, [r0, fp, lsl #3] 16509 .LVL1734: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16510 .loc 21 205 0 discriminator 3 16511 022a 53F83760 ldr r6, [r3, r7, lsl #3] 16512 022e 53F83B20 ldr r2, [r3, fp, lsl #3] 16513 .LVL1735: 16514 0232 C444 add ip, ip, r8 16515 .LVL1736: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16516 .loc 21 202 0 discriminator 3 16517 0234 A1EB0901 sub r1, r1, r9 16518 .LVL1737: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16519 .loc 21 186 0 discriminator 3 16520 0238 6545 cmp r5, ip 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ARM GAS /tmp/ccfbYRip.s page 542 16521 .loc 21 206 0 discriminator 3 16522 023a 02EB0609 add r9, r2, r6 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16523 .loc 21 205 0 discriminator 3 16524 023e A2EB0602 sub r2, r2, r6 16525 .LVL1738: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16526 .loc 21 206 0 discriminator 3 16527 0242 43F83B90 str r9, [r3, fp, lsl #3] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16528 .loc 21 208 0 discriminator 3 16529 0246 40F83710 str r1, [r0, r7, lsl #3] 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16530 .loc 21 210 0 discriminator 3 16531 024a 43F83720 str r2, [r3, r7, lsl #3] 16532 024e 7044 add r0, r0, lr 16533 0250 7344 add r3, r3, lr 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16534 .loc 21 186 0 discriminator 3 16535 0252 CCD8 bhi .L876 16536 .loc 21 214 0 16537 0254 13B0 add sp, sp, #76 16538 .LCFI178: 16539 .cfi_remember_state 16540 .cfi_def_cfa_offset 36 16541 @ sp needed 16542 0256 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16543 .LVL1739: 16544 .L887: 16545 .LCFI179: 16546 .cfi_restore_state 16547 025a CB46 mov fp, r9 16548 .LVL1740: 16549 .L871: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 16550 .loc 21 178 0 16551 025c 4FEA5B04 lsr r4, fp, #1 16552 .LVL1741: 16553 0260 119B ldr r3, [sp, #68] 16554 0262 BAE7 b .L877 16555 .LVL1742: 16556 .L878: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16557 .loc 21 136 0 16558 0264 A346 mov fp, r4 16559 0266 F9E7 b .L871 16560 .cfi_endproc 16561 .LFE180: 16563 .section .text.arm_radix2_butterfly_inverse_q31,"ax",%progbits 16564 .align 1 16565 .p2align 2,,3 16566 .global arm_radix2_butterfly_inverse_q31 16567 .syntax unified 16568 .thumb 16569 .thumb_func 16570 .fpu fpv4-sp-d16 16572 arm_radix2_butterfly_inverse_q31: ARM GAS /tmp/ccfbYRip.s page 543 16573 .LFB181: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** void arm_radix2_butterfly_inverse_q31( 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t * pSrc, 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint32_t fftLen, 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** const q31_t * pCoef, 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** uint16_t twidCoefModifier) 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16574 .loc 21 222 0 16575 .cfi_startproc 16576 @ args = 0, pretend = 0, frame = 72 16577 @ frame_needed = 0, uses_anonymous_args = 0 16578 .LVL1743: 16579 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 16580 .LCFI180: 16581 .cfi_def_cfa_offset 36 16582 .cfi_offset 4, -36 16583 .cfi_offset 5, -32 16584 .cfi_offset 6, -28 16585 .cfi_offset 7, -24 16586 .cfi_offset 8, -20 16587 .cfi_offset 9, -16 16588 .cfi_offset 10, -12 16589 .cfi_offset 11, -8 16590 .cfi_offset 14, -4 16591 0004 93B0 sub sp, sp, #76 16592 .LCFI181: 16593 .cfi_def_cfa_offset 112 16594 .loc 21 222 0 16595 0006 9146 mov r9, r2 16596 0008 1092 str r2, [sp, #64] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** unsigned i, j, k, l; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** unsigned n1, n2, ia; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t xt, yt, cosVal, sinVal; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** q31_t p0, p1; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** //N = fftLen; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = fftLen; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for groups 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (i = 0; i < n2; i++) 16597 .loc 21 237 0 16598 000a 4A08 lsrs r2, r1, #1 16599 .LVL1744: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16600 .loc 21 222 0 16601 000c 0691 str r1, [sp, #24] 16602 .LVL1745: 16603 000e 8346 mov fp, r0 16604 0010 0393 str r3, [sp, #12] 16605 .loc 21 237 0 ARM GAS /tmp/ccfbYRip.s page 544 16606 0012 0592 str r2, [sp, #20] 16607 0014 00F02181 beq .L891 16608 0018 011D adds r1, r0, #4 16609 .LVL1746: 16610 001a D000 lsls r0, r2, #3 16611 .LVL1747: 16612 001c 0BEB000A add r10, fp, r0 16613 0020 DB00 lsls r3, r3, #3 16614 .LVL1748: 16615 0022 1191 str r1, [sp, #68] 16616 0024 0D90 str r0, [sp, #52] 16617 0026 8846 mov r8, r1 16618 0028 0193 str r3, [sp, #4] 16619 002a DE46 mov lr, fp 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 16620 .loc 21 251 0 16621 002c CDF808A0 str r10, [sp, #8] 16622 0030 CDF810B0 str fp, [sp, #16] 16623 .LVL1749: 16624 .L892: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; 16625 .loc 21 244 0 discriminator 3 16626 0034 5EF83210 ldr r1, [lr, r2, lsl #3] 16627 0038 58F8043C ldr r3, [r8, #-4] 16628 003c 4C10 asrs r4, r1, #1 16629 003e 5B10 asrs r3, r3, #1 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16630 .loc 21 245 0 discriminator 3 16631 0040 1819 adds r0, r3, r4 16632 0042 4010 asrs r0, r0, #1 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 16633 .loc 21 240 0 discriminator 3 16634 0044 D9E900C6 ldrd ip, r6, [r9] 16635 .LVL1750: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16636 .loc 21 245 0 discriminator 3 16637 0048 48F8040C str r0, [r8, #-4] 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 16638 .loc 21 247 0 discriminator 3 16639 004c DEF80470 ldr r7, [lr, #4] 16640 0050 58F83210 ldr r1, [r8, r2, lsl #3] 16641 0054 7F10 asrs r7, r7, #1 16642 0056 4910 asrs r1, r1, #1 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; ARM GAS /tmp/ccfbYRip.s page 545 16643 .loc 21 244 0 discriminator 3 16644 0058 1B1B subs r3, r3, r4 16645 .LVL1751: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = 16646 .loc 21 247 0 discriminator 3 16647 005a 781A subs r0, r7, r1 16648 .LVL1752: 16649 .loc 21 251 0 discriminator 3 16650 005c 4FF00044 mov r4, #-2147483648 16651 0060 0025 movs r5, #0 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16652 .loc 21 252 0 discriminator 3 16653 0062 4FF0004A mov r10, #-2147483648 16654 0066 4FF0000B mov fp, #0 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16655 .loc 21 251 0 discriminator 3 16656 006a CCFB0345 smlal r4, r5, ip, r3 16657 .loc 21 252 0 discriminator 3 16658 006e C0FB0CAB smlal r10, fp, r0, ip 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16659 .loc 21 249 0 discriminator 3 16660 0072 0F44 add r7, r7, r1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p0, yt, sinVal); 16661 .loc 21 253 0 discriminator 3 16662 0074 0024 movs r4, #0 16663 0076 80FB0601 smull r0, r1, r0, r6 16664 .LVL1753: 16665 007a 241A subs r4, r4, r0 16666 007c 65EB0105 sbc r5, r5, r1 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 16667 .loc 21 254 0 discriminator 3 16668 0080 0020 movs r0, #0 16669 0082 5946 mov r1, fp 16670 .LVL1754: 16671 0084 C6FB0301 smlal r0, r1, r6, r3 16672 0088 019B ldr r3, [sp, #4] 16673 .LVL1755: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p0, yt, sinVal); 16674 .loc 21 253 0 discriminator 3 16675 008a 14F10044 adds r4, r4, #-2147483648 16676 008e 45F10005 adc r5, r5, #0 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16677 .loc 21 249 0 discriminator 3 16678 0092 7F10 asrs r7, r7, #1 16679 .loc 21 254 0 discriminator 3 16680 0094 8246 mov r10, r0 16681 0096 9944 add r9, r9, r3 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16682 .loc 21 237 0 discriminator 3 16683 0098 029B ldr r3, [sp, #8] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; 16684 .loc 21 248 0 discriminator 3 16685 009a CEF80470 str r7, [lr, #4] 16686 .LVL1756: 16687 .loc 21 254 0 discriminator 3 16688 009e 1AF10040 adds r0, r10, #-2147483648 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); ARM GAS /tmp/ccfbYRip.s page 546 16689 .loc 21 253 0 discriminator 3 16690 00a2 4EF83250 str r5, [lr, r2, lsl #3] 16691 00a6 0EF1080E add lr, lr, #8 16692 .loc 21 254 0 discriminator 3 16693 00aa 41F10001 adc r1, r1, #0 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16694 .loc 21 237 0 discriminator 3 16695 00ae 7345 cmp r3, lr 16696 .loc 21 254 0 discriminator 3 16697 00b0 48F83210 str r1, [r8, r2, lsl #3] 16698 00b4 08F10808 add r8, r8, #8 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16699 .loc 21 237 0 discriminator 3 16700 00b8 BCD1 bne .L892 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = p0; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = p1; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // groups loop end 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** twidCoefModifier = twidCoefModifier << 1U; 16701 .loc 21 260 0 16702 00ba DDE9033B ldrd r3, fp, [sp, #12] 16703 00be 5B00 lsls r3, r3, #1 16704 00c0 9BB2 uxth r3, r3 16705 00c2 0E93 str r3, [sp, #56] 16706 .LVL1757: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for stage 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (k = fftLen / 2; k > 2; k = k >> 1) 16707 .loc 21 263 0 16708 00c4 059B ldr r3, [sp, #20] 16709 00c6 022B cmp r3, #2 16710 00c8 7FD9 bls .L900 16711 .LVL1758: 16712 .L896: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 16713 .loc 21 266 0 16714 00ca 5B08 lsrs r3, r3, #1 16715 00cc DA00 lsls r2, r3, #3 16716 00ce 0B92 str r2, [sp, #44] 16717 00d0 0BEB020A add r10, fp, r2 16718 00d4 069A ldr r2, [sp, #24] 16719 00d6 0F93 str r3, [sp, #60] 16720 .LVL1759: 16721 00d8 9A42 cmp r2, r3 16722 00da 28BF it cs 16723 00dc 1A46 movcs r2, r3 16724 00de 0E9B ldr r3, [sp, #56] 16725 .LVL1760: 16726 00e0 0A92 str r2, [sp, #40] 16727 00e2 DB00 lsls r3, r3, #3 16728 00e4 0C93 str r3, [sp, #48] 16729 00e6 109B ldr r3, [sp, #64] 16730 00e8 0993 str r3, [sp, #36] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; ARM GAS /tmp/ccfbYRip.s page 547 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for groups 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (j = 0; j < n2; j++) 16731 .loc 21 270 0 16732 00ea 0023 movs r3, #0 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 16733 .loc 21 266 0 16734 00ec CDF820B0 str fp, [sp, #32] 16735 .loc 21 270 0 16736 00f0 0793 str r3, [sp, #28] 16737 .LVL1761: 16738 .L895: 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 16739 .loc 21 272 0 16740 00f2 099B ldr r3, [sp, #36] 16741 00f4 0B9A ldr r2, [sp, #44] 16742 00f6 D3F80080 ldr r8, [r3] 16743 .LVL1762: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 16744 .loc 21 273 0 16745 00fa D3F80490 ldr r9, [r3, #4] 16746 .LVL1763: 16747 00fe 089B ldr r3, [sp, #32] 16748 0100 079E ldr r6, [sp, #28] 16749 0102 DDF834E0 ldr lr, [sp, #52] 16750 0106 CDE90389 strd r8, r9, [sp, #12] 16751 010a D718 adds r7, r2, r3 16752 010c 9C46 mov ip, r3 16753 .LVL1764: 16754 .L894: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for butterfly 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (i = j; i < fftLen; i += n1) 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 16755 .loc 21 280 0 discriminator 3 16756 010e 5BF83610 ldr r1, [fp, r6, lsl #3] 16757 0112 5AF83630 ldr r3, [r10, r6, lsl #3] 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 16758 .loc 21 281 0 discriminator 3 16759 0116 CA18 adds r2, r1, r3 16760 0118 5210 asrs r2, r2, #1 16761 011a 4BF83620 str r2, [fp, r6, lsl #3] 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 16762 .loc 21 283 0 discriminator 3 16763 011e 7A68 ldr r2, [r7, #4] 16764 0120 DCF80400 ldr r0, [ip, #4] 16765 0124 0192 str r2, [sp, #4] 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; 16766 .loc 21 280 0 discriminator 3 16767 0126 CB1A subs r3, r1, r3 16768 0128 0293 str r3, [sp, #8] 16769 .LVL1765: ARM GAS /tmp/ccfbYRip.s page 548 16770 .loc 21 283 0 discriminator 3 16771 012a 831A subs r3, r0, r2 16772 .LVL1766: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p0, xt, cosVal); 16773 .loc 21 286 0 discriminator 3 16774 012c DDE90221 ldrd r2, r1, [sp, #8] 16775 0130 4FF00044 mov r4, #-2147483648 16776 0134 0025 movs r5, #0 16777 0136 C1FB0245 smlal r4, r5, r1, r2 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 16778 .loc 21 284 0 discriminator 3 16779 013a 019A ldr r2, [sp, #4] 16780 013c 1044 add r0, r0, r2 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multSub_32x32_keep32_R(p0, yt, sinVal); 16781 .loc 21 288 0 discriminator 3 16782 013e 049A ldr r2, [sp, #16] 16783 0140 A946 mov r9, r5 16784 0142 4FF00008 mov r8, #0 16785 0146 83FB0245 smull r4, r5, r3, r2 16786 014a B8EB0408 subs r8, r8, r4 16787 014e 69EB0509 sbc r9, r9, r5 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** mult_32x32_keep32_R(p1, yt, cosVal); 16788 .loc 21 287 0 discriminator 3 16789 0152 4FF00044 mov r4, #-2147483648 16790 0156 0025 movs r5, #0 16791 0158 C1FB0345 smlal r4, r5, r1, r3 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; 16792 .loc 21 284 0 discriminator 3 16793 015c 4110 asrs r1, r0, #1 16794 015e 0191 str r1, [sp, #4] 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 16795 .loc 21 289 0 discriminator 3 16796 0160 0298 ldr r0, [sp, #8] 16797 0162 0499 ldr r1, [sp, #16] 16798 0164 2B46 mov r3, r5 16799 .LVL1767: 16800 0166 0022 movs r2, #0 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 16801 .loc 21 288 0 discriminator 3 16802 0168 4446 mov r4, r8 16803 .loc 21 289 0 discriminator 3 16804 016a C1FB0023 smlal r2, r3, r1, r0 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 16805 .loc 21 288 0 discriminator 3 16806 016e 14F10044 adds r4, r4, #-2147483648 16807 0172 49F10005 adc r5, r9, #0 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16808 .loc 21 284 0 discriminator 3 16809 0176 0199 ldr r1, [sp, #4] 16810 0178 CCF80410 str r1, [ip, #4] 16811 .LVL1768: 16812 .loc 21 289 0 discriminator 3 16813 017c 12F10042 adds r2, r2, #-2147483648 16814 0180 43F10003 adc r3, r3, #0 ARM GAS /tmp/ccfbYRip.s page 549 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16815 .loc 21 277 0 discriminator 3 16816 0184 0599 ldr r1, [sp, #20] 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** multAcc_32x32_keep32_R(p1, xt, sinVal); 16817 .loc 21 288 0 discriminator 3 16818 0186 4AF83650 str r5, [r10, r6, lsl #3] 16819 .loc 21 289 0 discriminator 3 16820 018a 7B60 str r3, [r7, #4] 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16821 .loc 21 277 0 discriminator 3 16822 018c 069B ldr r3, [sp, #24] 16823 018e 0E44 add r6, r6, r1 16824 .LVL1769: 16825 0190 B342 cmp r3, r6 16826 0192 F444 add ip, ip, lr 16827 0194 7744 add r7, r7, lr 16828 0196 BAD8 bhi .L894 16829 0198 099A ldr r2, [sp, #36] 16830 019a 0C99 ldr r1, [sp, #48] 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16831 .loc 21 270 0 16832 019c 079B ldr r3, [sp, #28] 16833 019e 0A44 add r2, r2, r1 16834 01a0 0992 str r2, [sp, #36] 16835 01a2 089A ldr r2, [sp, #32] 16836 01a4 0832 adds r2, r2, #8 16837 01a6 0892 str r2, [sp, #32] 16838 01a8 0A9A ldr r2, [sp, #40] 16839 01aa 0133 adds r3, r3, #1 16840 01ac 9342 cmp r3, r2 16841 01ae 0793 str r3, [sp, #28] 16842 .LVL1770: 16843 01b0 9FD3 bcc .L895 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = p0; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = p1; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // butterfly loop end 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // groups loop end 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** twidCoefModifier = twidCoefModifier << 1U; 16844 .loc 21 297 0 16845 01b2 0E9B ldr r3, [sp, #56] 16846 .LVL1771: 16847 01b4 0F9A ldr r2, [sp, #60] 16848 01b6 0592 str r2, [sp, #20] 16849 .LVL1772: 16850 01b8 5B00 lsls r3, r3, #1 16851 01ba 9BB2 uxth r3, r3 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16852 .loc 21 263 0 16853 01bc 022A cmp r2, #2 16854 .loc 21 297 0 16855 01be 0E93 str r3, [sp, #56] 16856 .LVL1773: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16857 .loc 21 263 0 ARM GAS /tmp/ccfbYRip.s page 550 16858 01c0 05D9 bls .L893 16859 01c2 D300 lsls r3, r2, #3 16860 01c4 0D93 str r3, [sp, #52] 16861 01c6 1346 mov r3, r2 16862 01c8 7FE7 b .L896 16863 .LVL1774: 16864 .L900: 16865 01ca 059B ldr r3, [sp, #20] 16866 .LVL1775: 16867 01cc 0F93 str r3, [sp, #60] 16868 .LVL1776: 16869 .L893: 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // stages loop end 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n1 = n2; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** n2 = n2 >> 1; 16870 .loc 21 301 0 16871 01ce 0F9B ldr r3, [sp, #60] 16872 01d0 5B08 lsrs r3, r3, #1 16873 01d2 0593 str r3, [sp, #20] 16874 .LVL1777: 16875 01d4 119B ldr r3, [sp, #68] 16876 .LVL1778: 16877 .L899: 16878 01d6 0F9D ldr r5, [sp, #60] 16879 01d8 059C ldr r4, [sp, #20] 16880 01da DDF81880 ldr r8, [sp, #24] 16881 01de 5846 mov r0, fp 16882 01e0 4FEA051C lsl ip, r5, #4 16883 01e4 4FEA450E lsl lr, r5, #1 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = 0; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** cosVal = pCoef[ia * 2]; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** sinVal = pCoef[(ia * 2) + 1]; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** ia = ia + twidCoefModifier; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** // loop for butterfly 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** for (i = 0; i < fftLen; i += n1) 16884 .loc 21 309 0 16885 01e8 0027 movs r7, #0 16886 01ea 2E19 adds r6, r5, r4 16887 .LVL1779: 16888 .L898: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 16889 .loc 21 312 0 discriminator 3 16890 01ec 50F834A0 ldr r10, [r0, r4, lsl #3] 16891 01f0 53F8041C ldr r1, [r3, #-4] 16892 .LVL1780: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16893 .loc 21 313 0 discriminator 3 16894 01f4 01EB0A02 add r2, r1, r10 16895 01f8 43F8042C str r2, [r3, #-4] 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 16896 .loc 21 315 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 551 16897 01fc 53F83490 ldr r9, [r3, r4, lsl #3] 16898 0200 4268 ldr r2, [r0, #4] 16899 .LVL1781: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16900 .loc 21 312 0 discriminator 3 16901 0202 A1EB0A01 sub r1, r1, r10 16902 .LVL1782: 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16903 .loc 21 316 0 discriminator 3 16904 0206 02EB090A add r10, r2, r9 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16905 .loc 21 315 0 discriminator 3 16906 020a A2EB0902 sub r2, r2, r9 16907 .LVL1783: 16908 .loc 21 316 0 discriminator 3 16909 020e C0F804A0 str r10, [r0, #4] 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = xt; 16910 .loc 21 318 0 discriminator 3 16911 0212 40F83410 str r1, [r0, r4, lsl #3] 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = yt; 16912 .loc 21 320 0 discriminator 3 16913 0216 43F83420 str r2, [r3, r4, lsl #3] 16914 .LVL1784: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** i += n1; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** l = i + n2; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** xt = pSrc[2 * i] - pSrc[2 * l]; 16915 .loc 21 325 0 discriminator 3 16916 021a 50F836A0 ldr r10, [r0, r6, lsl #3] 16917 021e 50F83510 ldr r1, [r0, r5, lsl #3] 16918 .LVL1785: 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16919 .loc 21 326 0 discriminator 3 16920 0222 01EB0A02 add r2, r1, r10 16921 .LVL1786: 16922 0226 40F83520 str r2, [r0, r5, lsl #3] 16923 .LVL1787: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; 16924 .loc 21 328 0 discriminator 3 16925 022a 53F83520 ldr r2, [r3, r5, lsl #3] 16926 022e 53F83690 ldr r9, [r3, r6, lsl #3] 16927 .LVL1788: 16928 0232 7744 add r7, r7, lr 16929 .LVL1789: 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); 16930 .loc 21 325 0 discriminator 3 16931 0234 A1EB0A01 sub r1, r1, r10 16932 .LVL1790: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16933 .loc 21 309 0 discriminator 3 16934 0238 B845 cmp r8, r7 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16935 .loc 21 329 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 552 16936 023a 02EB090A add r10, r2, r9 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); 16937 .loc 21 328 0 discriminator 3 16938 023e A2EB0902 sub r2, r2, r9 16939 .LVL1791: 16940 .loc 21 329 0 discriminator 3 16941 0242 43F835A0 str r10, [r3, r5, lsl #3] 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l] = xt; 16942 .loc 21 331 0 discriminator 3 16943 0246 40F83610 str r1, [r0, r6, lsl #3] 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** pSrc[2U * l + 1U] = yt; 16944 .loc 21 333 0 discriminator 3 16945 024a 43F83620 str r2, [r3, r6, lsl #3] 16946 024e 6044 add r0, r0, ip 16947 0250 6344 add r3, r3, ip 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16948 .loc 21 309 0 discriminator 3 16949 0252 CBD8 bhi .L898 16950 .LVL1792: 16951 .L890: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } // butterfly loop end 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 16952 .loc 21 337 0 16953 0254 13B0 add sp, sp, #76 16954 .LCFI182: 16955 .cfi_remember_state 16956 .cfi_def_cfa_offset 36 16957 @ sp needed 16958 0256 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 16959 .LVL1793: 16960 .L891: 16961 .LCFI183: 16962 .cfi_restore_state 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 16963 .loc 21 309 0 16964 025a 0029 cmp r1, #0 16965 025c FAD0 beq .L890 16966 025e 059B ldr r3, [sp, #20] 16967 .LVL1794: 16968 0260 0F93 str r3, [sp, #60] 16969 0262 031D adds r3, r0, #4 16970 0264 1193 str r3, [sp, #68] 16971 0266 B6E7 b .L899 16972 .cfi_endproc 16973 .LFE181: 16975 .section .text.arm_cfft_radix2_q31,"ax",%progbits 16976 .align 1 16977 .p2align 2,,3 16978 .global arm_cfft_radix2_q31 16979 .syntax unified 16980 .thumb 16981 .thumb_func 16982 .fpu fpv4-sp-d16 ARM GAS /tmp/ccfbYRip.s page 553 16984 arm_cfft_radix2_q31: 16985 .LFB179: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16986 .loc 21 69 0 16987 .cfi_startproc 16988 @ args = 0, pretend = 0, frame = 0 16989 @ frame_needed = 0, uses_anonymous_args = 0 16990 .LVL1795: 16991 0000 70B5 push {r4, r5, r6, lr} 16992 .LCFI184: 16993 .cfi_def_cfa_offset 16 16994 .cfi_offset 4, -16 16995 .cfi_offset 5, -12 16996 .cfi_offset 6, -8 16997 .cfi_offset 14, -4 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 16998 .loc 21 69 0 16999 0002 0446 mov r4, r0 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 17000 .loc 21 71 0 17001 0004 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 17002 .LVL1796: 17003 0006 6268 ldr r2, [r4, #4] 17004 0008 A389 ldrh r3, [r4, #12] 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 17005 .loc 21 69 0 17006 000a 0D46 mov r5, r1 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 17007 .loc 21 71 0 17008 000c 0128 cmp r0, #1 17009 000e 2188 ldrh r1, [r4] 17010 .LVL1797: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** S->pTwiddle, S->twidCoefModifier); 17011 .loc 21 73 0 17012 0010 2846 mov r0, r5 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** { 17013 .loc 21 71 0 17014 0012 09D0 beq .L915 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** S->pTwiddle, S->twidCoefModifier); 17015 .loc 21 78 0 17016 0014 FFF7FEFF bl arm_radix2_butterfly_q31 17017 .LVL1798: 17018 .L913: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 17019 .loc 21 82 0 17020 0018 2846 mov r0, r5 17021 001a A368 ldr r3, [r4, #8] 17022 001c E289 ldrh r2, [r4, #14] 17023 001e 2188 ldrh r1, [r4] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** 17024 .loc 21 83 0 17025 0020 BDE87040 pop {r4, r5, r6, lr} 17026 .LCFI185: 17027 .cfi_remember_state 17028 .cfi_restore 14 17029 .cfi_restore 6 17030 .cfi_restore 5 ARM GAS /tmp/ccfbYRip.s page 554 17031 .cfi_restore 4 17032 .cfi_def_cfa_offset 0 17033 .LVL1799: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** } 17034 .loc 21 82 0 17035 0024 FFF7FEBF b arm_bitreversal_q31 17036 .LVL1800: 17037 .L915: 17038 .LCFI186: 17039 .cfi_restore_state 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c **** S->pTwiddle, S->twidCoefModifier); 17040 .loc 21 73 0 17041 0028 FFF7FEFF bl arm_radix2_butterfly_inverse_q31 17042 .LVL1801: 17043 002c F4E7 b .L913 17044 .cfi_endproc 17045 .LFE179: 17047 002e 00BF .section .text.arm_radix4_butterfly_f32,"ax",%progbits 17048 .align 1 17049 .p2align 2,,3 17050 .global arm_radix4_butterfly_f32 17051 .syntax unified 17052 .thumb 17053 .thumb_func 17054 .fpu fpv4-sp-d16 17056 arm_radix4_butterfly_f32: 17057 .LFB183: 17058 .file 22 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Title: arm_cfft_radix4_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Description: Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #include "arm_math.h" ARM GAS /tmp/ccfbYRip.s page 555 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** extern void arm_bitreversal_f32( 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc, 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t fftSize, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t bitRevFactor, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const uint16_t * pBitRevTab); 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** void arm_radix4_butterfly_f32( 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t fftLen, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const float32_t * pCoef, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t twidCoefModifier); 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** void arm_radix4_butterfly_inverse_f32( 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t fftLen, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const float32_t * pCoef, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t twidCoefModifier, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t onebyfftLen); 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @ingroup groupTransforms 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @addtogroup ComplexFFT 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @{ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @brief Processing function for the floating-point Radix-4 CFFT/CIFFT. 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @param[in] S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing o 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @return none 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** void arm_cfft_radix4_f32( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const arm_cfft_radix4_instance_f32 * S, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** if (S->ifftFlag == 1U) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Complex IFFT radix-4 */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyf 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** else 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Complex FFT radix-4 */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** if (S->bitReverseFlag == 1U) 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Bit Reversal */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); ARM GAS /tmp/ccfbYRip.s page 556 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** @} end of ComplexFFT group 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ---------------------------------------------------------------------- 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * Internal helper function used by the FFTs 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** * ---------------------------------------------------------------------- */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** brief Core function for the floating-point CFFT butterfly process. 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in,out] pSrc points to the in-place buffer of floating-point data type 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] fftLen length of the FFT 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] pCoef points to the twiddle coefficient buffer 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wit 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** return none 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** void arm_radix4_butterfly_f32( 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc, 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t fftLen, 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const float32_t * pCoef, 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t twidCoefModifier) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17059 .loc 22 113 0 17060 .cfi_startproc 17061 @ args = 0, pretend = 0, frame = 64 17062 @ frame_needed = 0, uses_anonymous_args = 0 17063 .LVL1802: 17064 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 17065 .LCFI187: 17066 .cfi_def_cfa_offset 36 17067 .cfi_offset 4, -36 17068 .cfi_offset 5, -32 17069 .cfi_offset 6, -28 17070 .cfi_offset 7, -24 17071 .cfi_offset 8, -20 17072 .cfi_offset 9, -16 17073 .cfi_offset 10, -12 17074 .cfi_offset 11, -8 17075 .cfi_offset 14, -4 17076 0004 2DED028B vpush.64 {d8} 17077 .LCFI188: 17078 .cfi_def_cfa_offset 44 17079 .cfi_offset 80, -44 17080 .cfi_offset 81, -40 17081 0008 91B0 sub sp, sp, #68 17082 .LCFI189: 17083 .cfi_def_cfa_offset 112 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t co1, co2, co3, si1, si2, si3; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t ia1, ia2, ia3; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t i0, i1, i2, i3; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t n1, n2, j, k; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 557 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t *ptr1; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t p0,p1,p2,p3,p4,p5; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t a0,a1,a2,a3,a4,a5,a6,a7; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 = fftLen; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* n2 = fftLen/4 */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = 0U; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = n2; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = pSrc[(2U * i0)]; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = pSrc[(2U * i0) + 1U]; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = pSrc[(2U * i1)]; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = pSrc[(2U * i1) + 1U]; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = pSrc[(2U * i2)]; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = pSrc[(2U * i2) + 1U]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = pSrc[(2U * i3)]; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = pSrc[(2U * i3) + 1U]; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[ia2 * 2U]; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 558 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb - xd */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb - yd */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0)] = Xaplusc + Xbplusd; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12C_out = (Xaminusc + Ybminusd); 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12C_out = (Yaminusc - Xbminusd); 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa + xc) - (xb + xd) */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12C_out = (Xaplusc - Xbplusd); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12C_out = (Yaplusc - Ybplusd); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12C_out = (Xaminusc - Ybminusd); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12C_out = (Xbminusd + Yaminusc); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[ia1 * 2U]; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out = Xb12C_out * co1; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out = Yb12C_out * co1; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out = Xc12C_out * co2; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out = Yc12C_out * co2; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out = Xd12C_out * co3; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out = Yd12C_out * co3; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xb12_out -= Yb12C_out * si1; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p0 = Yb12C_out * si1; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yb12_out += Xb12C_out * si1; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p1 = Xb12C_out * si1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xc12_out -= Yc12C_out * si2; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p2 = Yc12C_out * si2; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yc12_out += Xc12C_out * si2; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p3 = Xc12C_out * si2; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xd12_out -= Yd12C_out * si3; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p4 = Yd12C_out * si3; ARM GAS /tmp/ccfbYRip.s page 559 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yd12_out += Xd12C_out * si3; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p5 = Xd12C_out * si3; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out += p0; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out -= p1; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out += p2; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out -= p3; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out += p4; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out -= p5; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = Xc12_out; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = Yc12_out; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = Xb12_out; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = Yb12_out; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = Xd12_out; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = Yd12_out; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 += twidCoefModifier; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Updating input index */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0++; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** while (--j); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of second stage to excluding last stage */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** for (k = fftLen >> 2U; k > 4U; k >>= 2U) 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = 0; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[(ia1 * 2U)]; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; ARM GAS /tmp/ccfbYRip.s page 560 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[(ia2 * 2U)]; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[(ia3 * 2U)]; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 += twidCoefModifier; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = j; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = pSrc[(2U * i0)]; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = pSrc[(2U * i0) + 1U]; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = pSrc[(2U * i1)]; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = pSrc[(2U * i1) + 1U]; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = pSrc[(2U * i2)]; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = pSrc[(2U * i2) + 1U]; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = pSrc[(2U * i3)]; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = pSrc[(2U * i3) + 1U]; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb - xd) */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb - yd) */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12C_out = (Xaminusc + Ybminusd); 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb - xd) */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12C_out = (Yaminusc - Xbminusd); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc -(xb + xd) */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12C_out = (Xaplusc - Xbplusd); 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12C_out = (Yaplusc - Ybplusd); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12C_out = (Xaminusc - Ybminusd); ARM GAS /tmp/ccfbYRip.s page 561 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12C_out = (Xbminusd + Yaminusc); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0)] = Xaplusc + Xbplusd; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out = Xb12C_out * co1; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out = Yb12C_out * co1; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out = Xc12C_out * co2; 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out = Yc12C_out * co2; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out = Xd12C_out * co3; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out = Yd12C_out * co3; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xb12_out -= Yb12C_out * si1; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p0 = Yb12C_out * si1; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yb12_out += Xb12C_out * si1; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p1 = Xb12C_out * si1; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xc12_out -= Yc12C_out * si2; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p2 = Yc12C_out * si2; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yc12_out += Xc12C_out * si2; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p3 = Xc12C_out * si2; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xd12_out -= Yd12C_out * si3; 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p4 = Yd12C_out * si3; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yd12_out += Xd12C_out * si3; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p5 = Xd12C_out * si3; 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out += p0; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out -= p1; 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out += p2; 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out -= p3; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out += p4; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out -= p5; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = Xc12_out; 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = Yc12_out; 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = Xb12_out; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = Yb12_out; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = Xd12_out; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = Yd12_out; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 562 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 += n1; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (i0 < fftLen); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (j <= (n2 - 1U)); 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = fftLen >> 2; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1 = &pSrc[0]; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculations of last stage */ 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = ptr1[0]; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = ptr1[1]; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = ptr1[2]; 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = ptr1[3]; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = ptr1[4]; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = ptr1[5]; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = ptr1[6]; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = ptr1[7]; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb-xd) */ 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb-yd) */ 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a0 = (Xaplusc + Xbplusd); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a1 = (Yaplusc + Ybplusd); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd) */ 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a2 = (Xaplusc - Xbplusd); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd) */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a3 = (Yaplusc - Ybplusd); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd) */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a4 = (Xaminusc + Ybminusd); 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd) */ ARM GAS /tmp/ccfbYRip.s page 563 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a5 = (Yaminusc - Xbminusd); 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)) */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a6 = (Xaminusc - Ybminusd); 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd) */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a7 = (Xbminusd + Yaminusc); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[0] = a0; 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[1] = a1; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[2] = a2; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[3] = a3; 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[4] = a4; 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[5] = a5; 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[6] = a6; 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[7] = a7; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* increment pointer by 8 */ 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1 += 8U; 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (--j); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #else 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t t1, t2, r1, r2, s1, s2; 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the fft calculation */ 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 = fftLen; 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** for (k = fftLen; k > 1U; k >>= 2U) 17084 .loc 22 487 0 17085 000a 0129 cmp r1, #1 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t co1, co2, co3, si1, si2, si3; 17086 .loc 22 113 0 17087 000c CDE90D02 strd r0, r2, [sp, #52] 17088 0010 0B93 str r3, [sp, #44] 17089 .LVL1803: 17090 .loc 22 487 0 17091 0012 40F2CE80 bls .L916 17092 0016 0346 mov r3, r0 17093 0018 0433 adds r3, r3, #4 17094 001a 8946 mov r9, r1 17095 001c 8846 mov r8, r1 17096 001e 0F93 str r3, [sp, #60] 17097 .LVL1804: 17098 .L920: 17099 0020 0B98 ldr r0, [sp, #44] 17100 0022 DDF83CA0 ldr r10, [sp, #60] 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the fft calculation */ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 17101 .loc 22 491 0 17102 0026 4FEA9802 lsr r2, r8, #2 17103 002a 00EB4003 add r3, r0, r0, lsl #1 17104 002e 511E subs r1, r2, #1 17105 0030 DB00 lsls r3, r3, #3 17106 0032 0C92 str r2, [sp, #48] 17107 .LVL1805: 17108 0034 4FEA021B lsl fp, r2, #4 ARM GAS /tmp/ccfbYRip.s page 564 17109 0038 D200 lsls r2, r2, #3 17110 .LVL1806: 17111 003a 0692 str r2, [sp, #24] 17112 003c 0A93 str r3, [sp, #40] 17113 003e 0E9A ldr r2, [sp, #56] 17114 0040 0592 str r2, [sp, #20] 17115 0042 C300 lsls r3, r0, #3 17116 0044 0893 str r3, [sp, #32] 17117 0046 0301 lsls r3, r0, #4 17118 0048 0793 str r3, [sp, #28] 17119 004a CDE90322 strd r2, r2, [sp, #12] 17120 004e 0D9B ldr r3, [sp, #52] 17121 0050 0293 str r3, [sp, #8] 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* FFT Calculation */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = 0; 17122 .loc 22 495 0 17123 0052 0022 movs r2, #0 17124 0054 0991 str r1, [sp, #36] 17125 0056 4FEAC803 lsl r3, r8, #3 17126 005a 0192 str r2, [sp, #4] 17127 .LVL1807: 17128 .L919: 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[ia1 * 2U]; 17129 .loc 22 501 0 17130 005c 0598 ldr r0, [sp, #20] 17131 005e 029F ldr r7, [sp, #8] 17132 0060 D0ED000A vldr.32 s1, [r0] 17133 .LVL1808: 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 17134 .loc 22 502 0 17135 0064 90ED011A vldr.32 s2, [r0, #4] 17136 .LVL1809: 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[ia2 * 2U]; 17137 .loc 22 503 0 17138 0068 0498 ldr r0, [sp, #16] 17139 006a 069A ldr r2, [sp, #24] 17140 006c D0ED001A vldr.32 s3, [r0] 17141 .LVL1810: 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 17142 .loc 22 504 0 17143 0070 90ED012A vldr.32 s4, [r0, #4] 17144 .LVL1811: 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 17145 .loc 22 505 0 17146 0074 0398 ldr r0, [sp, #12] 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = ia1 + twidCoefModifier; 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 565 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = j; 17147 .loc 22 511 0 17148 0076 DDF804E0 ldr lr, [sp, #4] 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 17149 .loc 22 505 0 17150 007a D0ED002A vldr.32 s5, [r0] 17151 .LVL1812: 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 17152 .loc 22 506 0 17153 007e 90ED013A vldr.32 s6, [r0, #4] 17154 .LVL1813: 17155 0082 0BEB0706 add r6, fp, r7 17156 0086 0BEB0A05 add r5, fp, r10 17157 008a B11A subs r1, r6, r2 17158 008c AA1A subs r2, r5, r2 17159 008e 01EB0B04 add r4, r1, fp 17160 0092 02EB0B00 add r0, r2, fp 17161 0096 D446 mov ip, r10 17162 .LVL1814: 17163 .L918: 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; 17164 .loc 22 521 0 discriminator 1 17165 0098 55ED016A vldr.32 s13, [r5, #-4] 17166 009c 1CED016A vldr.32 s12, [ip, #-4] 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 17167 .loc 22 533 0 discriminator 1 17168 00a0 52ED014A vldr.32 s9, [r2, #-4] 17169 00a4 50ED015A vldr.32 s11, [r0, #-4] 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17170 .loc 22 527 0 discriminator 1 17171 00a8 D6ED017A vldr.32 s15, [r6, #4] 17172 00ac 97ED017A vldr.32 s14, [r7, #4] 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17173 .loc 22 521 0 discriminator 1 17174 00b0 36EE265A vadd.f32 s10, s12, s13 17175 .LVL1815: 17176 .loc 22 533 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 566 17177 00b4 74EEA55A vadd.f32 s11, s9, s11 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17178 .loc 22 524 0 discriminator 1 17179 00b8 36EE666A vsub.f32 s12, s12, s13 17180 .LVL1816: 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i0] = r1 + t1; 17181 .loc 22 536 0 discriminator 1 17182 00bc 75EE254A vadd.f32 s9, s10, s11 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17183 .loc 22 527 0 discriminator 1 17184 00c0 77EE273A vadd.f32 s7, s14, s15 17185 .LVL1817: 17186 .loc 22 536 0 discriminator 1 17187 00c4 4CED014A vstr.32 s9, [ip, #-4] 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc -(xb + xd) */ 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r1 - t1; 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; 17188 .loc 22 542 0 discriminator 1 17189 00c8 D4ED016A vldr.32 s13, [r4, #4] 17190 00cc 91ED014A vldr.32 s8, [r1, #4] 17191 00d0 34EE264A vadd.f32 s8, s8, s13 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17192 .loc 22 530 0 discriminator 1 17193 00d4 37EE677A vsub.f32 s14, s14, s15 17194 .LVL1818: 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = s1 + t2; 17195 .loc 22 545 0 discriminator 1 17196 00d8 73EE847A vadd.f32 s15, s7, s8 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17197 .loc 22 539 0 discriminator 1 17198 00dc 75EE654A vsub.f32 s9, s10, s11 17199 .LVL1819: 17200 .loc 22 545 0 discriminator 1 17201 00e0 C7ED017A vstr.32 s15, [r7, #4] 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s1 - t2; 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb - yd) */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb - xd) */ 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 17202 .loc 22 554 0 discriminator 1 17203 00e4 52ED016A vldr.32 s13, [r2, #-4] 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17204 .loc 22 551 0 discriminator 1 17205 00e8 91ED015A vldr.32 s10, [r1, #4] 17206 00ec D4ED015A vldr.32 s11, [r4, #4] 17207 .LVL1820: ARM GAS /tmp/ccfbYRip.s page 567 17208 .loc 22 554 0 discriminator 1 17209 00f0 50ED017A vldr.32 s15, [r0, #-4] 17210 00f4 76EEE77A vsub.f32 s15, s13, s15 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17211 .loc 22 551 0 discriminator 1 17212 00f8 75EE656A vsub.f32 s13, s10, s11 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = (r1 * co2) + (s1 * si2); 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2); 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r2 + t1; 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = r2 - t1; 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb - xd) */ 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s2 - t2; 17213 .loc 22 569 0 discriminator 1 17214 00fc 37EE678A vsub.f32 s16, s14, s15 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17215 .loc 22 548 0 discriminator 1 17216 0100 73EEC45A vsub.f32 s11, s7, s8 17217 .LVL1821: 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17218 .loc 22 563 0 discriminator 1 17219 0104 76EE268A vadd.f32 s17, s12, s13 17220 .LVL1822: 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = s2 + t2; 17221 .loc 22 572 0 discriminator 1 17222 0108 77EE277A vadd.f32 s15, s14, s15 17223 .LVL1823: 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17224 .loc 22 566 0 discriminator 1 17225 010c 36EE667A vsub.f32 s14, s12, s13 17226 .LVL1824: 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = (r1 * co1) + (s1 * si1); 17227 .loc 22 575 0 discriminator 1 17228 0110 21EE084A vmul.f32 s8, s2, s16 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1); 17229 .loc 22 578 0 discriminator 1 17230 0114 28EEC15A vnmul.f32 s10, s17, s2 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17231 .loc 22 560 0 discriminator 1 17232 0118 64EEC23A vnmul.f32 s7, s9, s4 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17233 .loc 22 557 0 discriminator 1 17234 011c 22EE250A vmul.f32 s0, s4, s11 ARM GAS /tmp/ccfbYRip.s page 568 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = (r2 * co3) + (s2 * si3); 17235 .loc 22 581 0 discriminator 1 17236 0120 23EE276A vmul.f32 s12, s6, s15 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3); 17237 .loc 22 584 0 discriminator 1 17238 0124 67EE436A vnmul.f32 s13, s14, s6 17239 .LVL1825: 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17240 .loc 22 575 0 discriminator 1 17241 0128 A0EEA84A vfma.f32 s8, s1, s17 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 += n1; 17242 .loc 22 586 0 discriminator 1 17243 012c C644 add lr, lr, r8 17244 .LVL1826: 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while ( i0 < fftLen); 17245 .loc 22 587 0 discriminator 1 17246 012e F145 cmp r9, lr 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17247 .loc 22 578 0 discriminator 1 17248 0130 A0EE885A vfma.f32 s10, s1, s16 17249 0134 9C44 add ip, ip, r3 17250 0136 1F44 add r7, r7, r3 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17251 .loc 22 560 0 discriminator 1 17252 0138 E1EEA53A vfma.f32 s7, s3, s11 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17253 .loc 22 557 0 discriminator 1 17254 013c A1EEA40A vfma.f32 s0, s3, s9 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17255 .loc 22 581 0 discriminator 1 17256 0140 A2EE876A vfma.f32 s12, s5, s14 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17257 .loc 22 584 0 discriminator 1 17258 0144 E2EEA76A vfma.f32 s13, s5, s15 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17259 .loc 22 557 0 discriminator 1 17260 0148 02ED010A vstr.32 s0, [r2, #-4] 17261 .LVL1827: 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17262 .loc 22 560 0 discriminator 1 17263 014c C1ED013A vstr.32 s7, [r1, #4] 17264 0150 1A44 add r2, r2, r3 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17265 .loc 22 575 0 discriminator 1 17266 0152 05ED014A vstr.32 s8, [r5, #-4] 17267 0156 1944 add r1, r1, r3 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17268 .loc 22 578 0 discriminator 1 17269 0158 86ED015A vstr.32 s10, [r6, #4] 17270 015c 1D44 add r5, r5, r3 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17271 .loc 22 581 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 569 17272 015e 00ED016A vstr.32 s12, [r0, #-4] 17273 0162 1E44 add r6, r6, r3 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17274 .loc 22 584 0 discriminator 1 17275 0164 C4ED016A vstr.32 s13, [r4, #4] 17276 0168 1844 add r0, r0, r3 17277 016a 1C44 add r4, r4, r3 17278 .loc 22 587 0 discriminator 1 17279 016c 94D8 bhi .L918 17280 016e 0599 ldr r1, [sp, #20] 17281 0170 0898 ldr r0, [sp, #32] 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17282 .loc 22 588 0 17283 0172 019A ldr r2, [sp, #4] 17284 0174 0144 add r1, r1, r0 17285 0176 0591 str r1, [sp, #20] 17286 0178 0798 ldr r0, [sp, #28] 17287 017a 0499 ldr r1, [sp, #16] 17288 017c 0144 add r1, r1, r0 17289 017e 0491 str r1, [sp, #16] 17290 0180 0A98 ldr r0, [sp, #40] 17291 0182 0399 ldr r1, [sp, #12] 17292 0184 0144 add r1, r1, r0 17293 0186 0391 str r1, [sp, #12] 17294 0188 0299 ldr r1, [sp, #8] 17295 018a 0831 adds r1, r1, #8 17296 018c 0291 str r1, [sp, #8] 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (j <= (n2 - 1U)); 17297 .loc 22 589 0 17298 018e 0999 ldr r1, [sp, #36] 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17299 .loc 22 588 0 17300 0190 0132 adds r2, r2, #1 17301 .loc 22 589 0 17302 0192 8A42 cmp r2, r1 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17303 .loc 22 588 0 17304 0194 0192 str r2, [sp, #4] 17305 .LVL1828: 17306 0196 0AF1080A add r10, r10, #8 17307 .loc 22 589 0 17308 019a 7FF65FAF bls .L919 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 17309 .loc 22 590 0 discriminator 2 17310 019e 0B9B ldr r3, [sp, #44] 17311 01a0 DDF83080 ldr r8, [sp, #48] 17312 .LVL1829: 17313 01a4 9B00 lsls r3, r3, #2 17314 01a6 9BB2 uxth r3, r3 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17315 .loc 22 487 0 discriminator 2 17316 01a8 B8F1010F cmp r8, #1 17317 .loc 22 590 0 discriminator 2 17318 01ac 0B93 str r3, [sp, #44] 17319 .LVL1830: 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17320 .loc 22 487 0 discriminator 2 ARM GAS /tmp/ccfbYRip.s page 570 17321 01ae 3FF637AF bhi .L920 17322 .LVL1831: 17323 .L916: 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17324 .loc 22 595 0 17325 01b2 11B0 add sp, sp, #68 17326 .LCFI190: 17327 .cfi_def_cfa_offset 44 17328 @ sp needed 17329 01b4 BDEC028B vldm sp!, {d8} 17330 .LCFI191: 17331 .cfi_restore 80 17332 .cfi_restore 81 17333 .cfi_def_cfa_offset 36 17334 01b8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 17335 .cfi_endproc 17336 .LFE183: 17338 .section .text.arm_radix4_butterfly_inverse_f32,"ax",%progbits 17339 .align 1 17340 .p2align 2,,3 17341 .global arm_radix4_butterfly_inverse_f32 17342 .syntax unified 17343 .thumb 17344 .thumb_func 17345 .fpu fpv4-sp-d16 17347 arm_radix4_butterfly_inverse_f32: 17348 .LFB184: 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** brief Core function for the floating-point CIFFT butterfly process. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in,out] pSrc points to the in-place buffer of floating-point data type 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] fftLen length of the FFT 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] pCoef points to twiddle coefficient buffer 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wit 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** param[in] onebyfftLen value of 1/fftLen 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** return none 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** */ 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** void arm_radix4_butterfly_inverse_f32( 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t * pSrc, 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t fftLen, 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** const float32_t * pCoef, 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint16_t twidCoefModifier, 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t onebyfftLen) 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17349 .loc 22 613 0 17350 .cfi_startproc 17351 @ args = 0, pretend = 0, frame = 64 17352 @ frame_needed = 0, uses_anonymous_args = 0 17353 .LVL1832: 17354 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 17355 .LCFI192: 17356 .cfi_def_cfa_offset 36 ARM GAS /tmp/ccfbYRip.s page 571 17357 .cfi_offset 4, -36 17358 .cfi_offset 5, -32 17359 .cfi_offset 6, -28 17360 .cfi_offset 7, -24 17361 .cfi_offset 8, -20 17362 .cfi_offset 9, -16 17363 .cfi_offset 10, -12 17364 .cfi_offset 11, -8 17365 .cfi_offset 14, -4 17366 0004 2DED048B vpush.64 {d8, d9} 17367 .LCFI193: 17368 .cfi_def_cfa_offset 52 17369 .cfi_offset 80, -52 17370 .cfi_offset 81, -48 17371 .cfi_offset 82, -44 17372 .cfi_offset 83, -40 17373 0008 91B0 sub sp, sp, #68 17374 .LCFI194: 17375 .cfi_def_cfa_offset 120 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t co1, co2, co3, si1, si2, si3; 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t ia1, ia2, ia3; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t i0, i1, i2, i3; 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** uint32_t n1, n2, j, k; 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd; 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t *ptr1; 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t p0,p1,p2,p3,p4,p5,p6,p7; 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t a0,a1,a2,a3,a4,a5,a6,a7; 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 = fftLen; 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* n2 = fftLen/4 */ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = 0U; 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = n2; 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Butterfly implementation */ ARM GAS /tmp/ccfbYRip.s page 572 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = pSrc[(2U * i0)]; 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = pSrc[(2U * i0) + 1U]; 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = pSrc[(2U * i2)]; 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = pSrc[(2U * i2) + 1U]; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = pSrc[(2U * i1)]; 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = pSrc[(2U * i1) + 1U]; 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = pSrc[(2U * i3)]; 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = pSrc[(2U * i3) + 1U]; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[ia2 * 2U]; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb - xd */ 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb - yd */ 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0)] = Xaplusc + Xbplusd; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12C_out = (Xaminusc - Ybminusd); 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12C_out = (Yaminusc + Xbminusd); 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa + xc) - (xb + xd) */ 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12C_out = (Xaplusc - Xbplusd); 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12C_out = (Yaplusc - Ybplusd); 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12C_out = (Xaminusc + Ybminusd); 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb - xd) */ 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12C_out = (Yaminusc - Xbminusd); 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[ia1 * 2U]; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 573 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out = Xb12C_out * co1; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out = Yb12C_out * co1; 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out = Xc12C_out * co2; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out = Yc12C_out * co2; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out = Xd12C_out * co3; 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out = Yd12C_out * co3; 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xb12_out -= Yb12C_out * si1; 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p0 = Yb12C_out * si1; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yb12_out += Xb12C_out * si1; 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p1 = Xb12C_out * si1; 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xc12_out -= Yc12C_out * si2; 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p2 = Yc12C_out * si2; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yc12_out += Xc12C_out * si2; 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p3 = Xc12C_out * si2; 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xd12_out -= Yd12C_out * si3; 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p4 = Yd12C_out * si3; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yd12_out += Xd12C_out * si3; 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p5 = Xd12C_out * si3; 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out -= p0; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out += p1; 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out -= p2; 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out += p3; 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out -= p4; 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out += p5; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = Xc12_out; 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = Yc12_out; 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = Xb12_out; 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = Yb12_out; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = Xd12_out; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = Yd12_out; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ ARM GAS /tmp/ccfbYRip.s page 574 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = ia1 + twidCoefModifier; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Updating input index */ 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = i0 + 1U; 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (--j); 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of second stage to excluding last stage */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** for (k = fftLen >> 2U; k > 4U; k >>= 2U) 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = 0; 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[ia1 * 2U]; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[ia2 * 2U]; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = ia1 + twidCoefModifier; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = j; 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = pSrc[(2U * i0)]; 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = pSrc[(2U * i0) + 1U]; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = pSrc[(2U * i1)]; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = pSrc[(2U * i1) + 1U]; 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = pSrc[(2U * i2)]; 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = pSrc[(2U * i2) + 1U]; 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = pSrc[(2U * i3)]; 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = pSrc[(2U * i3) + 1U]; 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; ARM GAS /tmp/ccfbYRip.s page 575 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb - xd) */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb - yd) */ 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12C_out = (Xaminusc - Ybminusd); 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12C_out = (Yaminusc + Xbminusd); 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc -(xb + xd) */ 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12C_out = (Xaplusc - Xbplusd); 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12C_out = (Yaplusc - Ybplusd); 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12C_out = (Xaminusc + Ybminusd); 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb - xd) */ 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12C_out = (Yaminusc - Xbminusd); 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0)] = Xaplusc + Xbplusd; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out = Xb12C_out * co1; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out = Yb12C_out * co1; 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out = Xc12C_out * co2; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out = Yc12C_out * co2; 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out = Xd12C_out * co3; 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out = Yd12C_out * co3; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xb12_out -= Yb12C_out * si1; 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p0 = Yb12C_out * si1; 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yb12_out += Xb12C_out * si1; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p1 = Xb12C_out * si1; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xc12_out -= Yc12C_out * si2; 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p2 = Yc12C_out * si2; 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yc12_out += Xc12C_out * si2; 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p3 = Xc12C_out * si2; 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Xd12_out -= Yd12C_out * si3; 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p4 = Yd12C_out * si3; 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** //Yd12_out += Xd12C_out * si3; 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p5 = Xd12C_out * si3; ARM GAS /tmp/ccfbYRip.s page 576 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xb12_out -= p0; 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yb12_out += p1; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xc12_out -= p2; 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yc12_out += p3; 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xd12_out -= p4; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yd12_out += p5; 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = Xc12_out; 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = Yc12_out; 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = Xb12_out; 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = Yb12_out; 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = Xd12_out; 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = Yd12_out; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 += n1; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (i0 < fftLen); 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (j <= (n2 - 1U)); 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations of last stage */ 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = fftLen >> 2; 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1 = &pSrc[0]; 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculations of last stage */ 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xaIn = ptr1[0]; 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** yaIn = ptr1[1]; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xbIn = ptr1[2]; 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ybIn = ptr1[3]; 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xcIn = ptr1[4]; 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ycIn = ptr1[5]; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** xdIn = ptr1[6]; 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ydIn = ptr1[7]; 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Butterfly implementation */ 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaplusc = xaIn + xcIn; 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xaminusc = xaIn - xcIn; 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ ARM GAS /tmp/ccfbYRip.s page 577 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaplusc = yaIn + ycIn; 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Yaminusc = yaIn - ycIn; 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbplusd = xbIn + xdIn; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybplusd = ybIn + ydIn; 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb-xd) */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Xbminusd = xbIn - xdIn; 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb-yd) */ 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** Ybminusd = ybIn - ydIn; 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = (xa+xb+xc+xd) * onebyfftLen */ 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a0 = (Xaplusc + Xbplusd); 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = (ya+yb+yc+yd) * onebyfftLen */ 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a1 = (Yaplusc + Ybplusd); 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd) * onebyfftLen */ 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a2 = (Xaplusc - Xbplusd); 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd) * onebyfftLen */ 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a3 = (Yaplusc - Ybplusd); 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa-yb-xc+yd) * onebyfftLen */ 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a4 = (Xaminusc - Ybminusd); 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya+xb-yc-xd) * onebyfftLen */ 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a5 = (Yaminusc + Xbminusd); 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd) * onebyfftLen */ 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a6 = (Xaminusc + Ybminusd); 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya-xb-yc+xd) * onebyfftLen */ 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** a7 = (Yaminusc - Xbminusd); 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p0 = a0 * onebyfftLen; 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p1 = a1 * onebyfftLen; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p2 = a2 * onebyfftLen; 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p3 = a3 * onebyfftLen; 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p4 = a4 * onebyfftLen; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p5 = a5 * onebyfftLen; 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p6 = a6 * onebyfftLen; 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** p7 = a7 * onebyfftLen; 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = (xa+xb+xc+xd) * onebyfftLen */ 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[0] = p0; 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = (ya+yb+yc+yd) * onebyfftLen */ 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[1] = p1; 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd) * onebyfftLen */ 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[2] = p2; 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd) * onebyfftLen */ 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[3] = p3; 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa-yb-xc+yd) * onebyfftLen */ 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[4] = p4; 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya+xb-yc-xd) * onebyfftLen */ 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[5] = p5; 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd) * onebyfftLen */ 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[6] = p6; ARM GAS /tmp/ccfbYRip.s page 578 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya-xb-yc+xd) * onebyfftLen */ 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1[7] = p7; 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* increment source pointer by 8 for next calculations */ 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ptr1 = ptr1 + 8U; 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (--j); 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #else 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t t1, t2, r1, r2, s1, s2; 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 = fftLen; 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** for (k = fftLen; k > 4U; k >>= 2U) 17376 .loc 22 1011 0 17377 000a 0429 cmp r1, #4 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** float32_t co1, co2, co3, si1, si2, si3; 17378 .loc 22 613 0 17379 000c 8846 mov r8, r1 17380 .LVL1833: 17381 000e 0D90 str r0, [sp, #52] 17382 0010 0F92 str r2, [sp, #60] 17383 0012 0B93 str r3, [sp, #44] 17384 .LVL1834: 17385 .loc 22 1011 0 17386 0014 40F24C81 bls .L931 17387 0018 0346 mov r3, r0 17388 001a 0433 adds r3, r3, #4 17389 001c 8946 mov r9, r1 17390 001e 0E93 str r3, [sp, #56] 17391 .LVL1835: 17392 .L929: 17393 0020 0B98 ldr r0, [sp, #44] 17394 0022 DDF838A0 ldr r10, [sp, #56] 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations for the first stage */ 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; 17395 .loc 22 1015 0 17396 0026 4FEA9902 lsr r2, r9, #2 17397 002a 00EB4003 add r3, r0, r0, lsl #1 17398 002e 511E subs r1, r2, #1 17399 0030 DB00 lsls r3, r3, #3 17400 0032 0C92 str r2, [sp, #48] 17401 .LVL1836: 17402 0034 4FEA021B lsl fp, r2, #4 17403 0038 D200 lsls r2, r2, #3 17404 .LVL1837: 17405 003a 0692 str r2, [sp, #24] 17406 003c 0A93 str r3, [sp, #40] 17407 003e 0F9A ldr r2, [sp, #60] 17408 0040 0592 str r2, [sp, #20] 17409 0042 C300 lsls r3, r0, #3 ARM GAS /tmp/ccfbYRip.s page 579 17410 0044 0893 str r3, [sp, #32] 17411 0046 0301 lsls r3, r0, #4 17412 0048 0793 str r3, [sp, #28] 17413 004a CDE90322 strd r2, r2, [sp, #12] 17414 004e 0D9B ldr r3, [sp, #52] 17415 0050 0293 str r3, [sp, #8] 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = 0U; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculation of first stage */ 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j = 0; 17416 .loc 22 1019 0 17417 0052 0022 movs r2, #0 17418 0054 0991 str r1, [sp, #36] 17419 0056 4FEAC903 lsl r3, r9, #3 17420 005a 0192 str r2, [sp, #4] 17421 .LVL1838: 17422 .L928: 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the coefficients */ 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia2 = ia1 + ia1; 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia3 = ia2 + ia1; 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co1 = pCoef[ia1 * 2U]; 17423 .loc 22 1025 0 17424 005c 0598 ldr r0, [sp, #20] 17425 005e 029F ldr r7, [sp, #8] 17426 0060 D0ED000A vldr.32 s1, [r0] 17427 .LVL1839: 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 17428 .loc 22 1026 0 17429 0064 90ED011A vldr.32 s2, [r0, #4] 17430 .LVL1840: 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co2 = pCoef[ia2 * 2U]; 17431 .loc 22 1027 0 17432 0068 0498 ldr r0, [sp, #16] 17433 006a 069A ldr r2, [sp, #24] 17434 006c D0ED001A vldr.32 s3, [r0] 17435 .LVL1841: 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 17436 .loc 22 1028 0 17437 0070 90ED012A vldr.32 s4, [r0, #4] 17438 .LVL1842: 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 17439 .loc 22 1029 0 17440 0074 0398 ldr r0, [sp, #12] 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Twiddle coefficients index modifier */ 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ia1 = ia1 + twidCoefModifier; 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 = j; 17441 .loc 22 1035 0 17442 0076 DDF804E0 ldr lr, [sp, #4] 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** co3 = pCoef[ia3 * 2U]; 17443 .loc 22 1029 0 17444 007a D0ED002A vldr.32 s5, [r0] 17445 .LVL1843: ARM GAS /tmp/ccfbYRip.s page 580 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 17446 .loc 22 1030 0 17447 007e 90ED013A vldr.32 s6, [r0, #4] 17448 .LVL1844: 17449 0082 0BEB0706 add r6, fp, r7 17450 0086 0BEB0A05 add r5, fp, r10 17451 008a B11A subs r1, r6, r2 17452 008c AA1A subs r2, r5, r2 17453 008e 01EB0B04 add r4, r1, fp 17454 0092 02EB0B00 add r0, r2, fp 17455 0096 D446 mov ip, r10 17456 .LVL1845: 17457 .L927: 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** do 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; 17458 .loc 22 1045 0 discriminator 1 17459 0098 55ED016A vldr.32 s13, [r5, #-4] 17460 009c 1CED016A vldr.32 s12, [ip, #-4] 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb + xd */ 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 17461 .loc 22 1057 0 discriminator 1 17462 00a0 50ED015A vldr.32 s11, [r0, #-4] 17463 00a4 12ED015A vldr.32 s10, [r2, #-4] 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17464 .loc 22 1051 0 discriminator 1 17465 00a8 D6ED017A vldr.32 s15, [r6, #4] 17466 00ac 97ED017A vldr.32 s14, [r7, #4] 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17467 .loc 22 1045 0 discriminator 1 17468 00b0 76EE264A vadd.f32 s9, s12, s13 17469 .LVL1846: 17470 .loc 22 1057 0 discriminator 1 17471 00b4 35EE255A vadd.f32 s10, s10, s11 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17472 .loc 22 1048 0 discriminator 1 17473 00b8 36EE666A vsub.f32 s12, s12, s13 17474 .LVL1847: 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ ARM GAS /tmp/ccfbYRip.s page 581 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i0] = r1 + t1; 17475 .loc 22 1060 0 discriminator 1 17476 00bc 74EE855A vadd.f32 s11, s9, s10 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17477 .loc 22 1051 0 discriminator 1 17478 00c0 77EE273A vadd.f32 s7, s14, s15 17479 .LVL1848: 17480 .loc 22 1060 0 discriminator 1 17481 00c4 4CED015A vstr.32 s11, [ip, #-4] 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc -(xb + xd) */ 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r1 - t1; 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; 17482 .loc 22 1066 0 discriminator 1 17483 00c8 D1ED015A vldr.32 s11, [r1, #4] 17484 00cc D4ED016A vldr.32 s13, [r4, #4] 17485 00d0 35EEA64A vadd.f32 s8, s11, s13 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17486 .loc 22 1054 0 discriminator 1 17487 00d4 37EE677A vsub.f32 s14, s14, s15 17488 .LVL1849: 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = s1 + t2; 17489 .loc 22 1069 0 discriminator 1 17490 00d8 73EE847A vadd.f32 s15, s7, s8 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17491 .loc 22 1063 0 discriminator 1 17492 00dc 74EEC54A vsub.f32 s9, s9, s10 17493 .LVL1850: 17494 .loc 22 1069 0 discriminator 1 17495 00e0 C7ED017A vstr.32 s15, [r7, #4] 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s1 - t2; 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb - yd) */ 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb - xd) */ 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 17496 .loc 22 1078 0 discriminator 1 17497 00e4 52ED016A vldr.32 s13, [r2, #-4] 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17498 .loc 22 1075 0 discriminator 1 17499 00e8 91ED015A vldr.32 s10, [r1, #4] 17500 .LVL1851: 17501 00ec D4ED015A vldr.32 s11, [r4, #4] 17502 .loc 22 1078 0 discriminator 1 17503 00f0 50ED017A vldr.32 s15, [r0, #-4] 17504 00f4 76EEE77A vsub.f32 s15, s13, s15 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17505 .loc 22 1075 0 discriminator 1 17506 00f8 75EE656A vsub.f32 s13, s10, s11 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 582 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = (r1 * co2) - (s1 * si2); 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2); 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb - yd) */ 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r2 - t1; 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb - yd) */ 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = r2 + t1; 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb - xd) */ 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s2 + t2; 17507 .loc 22 1093 0 discriminator 1 17508 00fc 77EE278A vadd.f32 s17, s14, s15 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17509 .loc 22 1072 0 discriminator 1 17510 0100 73EEC45A vsub.f32 s11, s7, s8 17511 .LVL1852: 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17512 .loc 22 1087 0 discriminator 1 17513 0104 36EE669A vsub.f32 s18, s12, s13 17514 .LVL1853: 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb - xd) */ 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = s2 - t2; 17515 .loc 22 1096 0 discriminator 1 17516 0108 77EE677A vsub.f32 s15, s14, s15 17517 .LVL1854: 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17518 .loc 22 1090 0 discriminator 1 17519 010c 36EE267A vadd.f32 s14, s12, s13 17520 .LVL1855: 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = (r1 * co1) - (s1 * si1); 17521 .loc 22 1099 0 discriminator 1 17522 0110 28EEC14A vnmul.f32 s8, s17, s2 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1); 17523 .loc 22 1102 0 discriminator 1 17524 0114 21EE095A vmul.f32 s10, s2, s18 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17525 .loc 22 1084 0 discriminator 1 17526 0118 62EE243A vmul.f32 s7, s4, s9 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17527 .loc 22 1081 0 discriminator 1 17528 011c 25EEC28A vnmul.f32 s16, s11, s4 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = (r2 * co3) - (s2 * si3); 17529 .loc 22 1105 0 discriminator 1 17530 0120 27EEC36A vnmul.f32 s12, s15, s6 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ ARM GAS /tmp/ccfbYRip.s page 583 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3); 17531 .loc 22 1108 0 discriminator 1 17532 0124 63EE076A vmul.f32 s13, s6, s14 17533 .LVL1856: 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17534 .loc 22 1099 0 discriminator 1 17535 0128 A0EE894A vfma.f32 s8, s1, s18 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i0 += n1; 17536 .loc 22 1110 0 discriminator 1 17537 012c CE44 add lr, lr, r9 17538 .LVL1857: 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while ( i0 < fftLen); 17539 .loc 22 1111 0 discriminator 1 17540 012e F045 cmp r8, lr 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17541 .loc 22 1102 0 discriminator 1 17542 0130 A0EEA85A vfma.f32 s10, s1, s17 17543 0134 9C44 add ip, ip, r3 17544 0136 1F44 add r7, r7, r3 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17545 .loc 22 1084 0 discriminator 1 17546 0138 E1EEA53A vfma.f32 s7, s3, s11 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17547 .loc 22 1081 0 discriminator 1 17548 013c A1EEA48A vfma.f32 s16, s3, s9 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17549 .loc 22 1105 0 discriminator 1 17550 0140 A2EE876A vfma.f32 s12, s5, s14 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17551 .loc 22 1108 0 discriminator 1 17552 0144 E2EEA76A vfma.f32 s13, s5, s15 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17553 .loc 22 1081 0 discriminator 1 17554 0148 02ED018A vstr.32 s16, [r2, #-4] 17555 .LVL1858: 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17556 .loc 22 1084 0 discriminator 1 17557 014c C1ED013A vstr.32 s7, [r1, #4] 17558 0150 1A44 add r2, r2, r3 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17559 .loc 22 1099 0 discriminator 1 17560 0152 05ED014A vstr.32 s8, [r5, #-4] 17561 0156 1944 add r1, r1, r3 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17562 .loc 22 1102 0 discriminator 1 17563 0158 86ED015A vstr.32 s10, [r6, #4] 17564 015c 1D44 add r5, r5, r3 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17565 .loc 22 1105 0 discriminator 1 17566 015e 00ED016A vstr.32 s12, [r0, #-4] 17567 0162 1E44 add r6, r6, r3 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17568 .loc 22 1108 0 discriminator 1 17569 0164 C4ED016A vstr.32 s13, [r4, #4] 17570 0168 1844 add r0, r0, r3 17571 016a 1C44 add r4, r4, r3 ARM GAS /tmp/ccfbYRip.s page 584 17572 .loc 22 1111 0 discriminator 1 17573 016c 94D8 bhi .L927 17574 016e 0599 ldr r1, [sp, #20] 17575 0170 0898 ldr r0, [sp, #32] 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17576 .loc 22 1112 0 17577 0172 019A ldr r2, [sp, #4] 17578 0174 0144 add r1, r1, r0 17579 0176 0591 str r1, [sp, #20] 17580 0178 0798 ldr r0, [sp, #28] 17581 017a 0499 ldr r1, [sp, #16] 17582 017c 0144 add r1, r1, r0 17583 017e 0491 str r1, [sp, #16] 17584 0180 0A98 ldr r0, [sp, #40] 17585 0182 0399 ldr r1, [sp, #12] 17586 0184 0144 add r1, r1, r0 17587 0186 0391 str r1, [sp, #12] 17588 0188 0299 ldr r1, [sp, #8] 17589 018a 0831 adds r1, r1, #8 17590 018c 0291 str r1, [sp, #8] 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } while (j <= (n2 - 1U)); 17591 .loc 22 1113 0 17592 018e 0999 ldr r1, [sp, #36] 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17593 .loc 22 1112 0 17594 0190 0132 adds r2, r2, #1 17595 .loc 22 1113 0 17596 0192 8A42 cmp r2, r1 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** j++; 17597 .loc 22 1112 0 17598 0194 0192 str r2, [sp, #4] 17599 .LVL1859: 17600 0196 0AF1080A add r10, r10, #8 17601 .loc 22 1113 0 17602 019a 7FF65FAF bls .L928 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** twidCoefModifier <<= 2U; 17603 .loc 22 1114 0 discriminator 2 17604 019e 0B9B ldr r3, [sp, #44] 17605 01a0 9B00 lsls r3, r3, #2 17606 01a2 9BB2 uxth r3, r3 17607 01a4 0B93 str r3, [sp, #44] 17608 .LVL1860: 17609 01a6 0C9B ldr r3, [sp, #48] 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17610 .loc 22 1011 0 discriminator 2 17611 01a8 042B cmp r3, #4 17612 01aa 9946 mov r9, r3 17613 .LVL1861: 17614 01ac 3FF638AF bhi .L929 17615 01b0 A8EB0304 sub r4, r8, r3 17616 01b4 9846 mov r8, r3 17617 .LVL1862: 17618 .L926: 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Initializations of last stage */ 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n1 = n2; 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** n2 >>= 2U; ARM GAS /tmp/ccfbYRip.s page 585 17619 .loc 22 1118 0 17620 01b6 9B08 lsrs r3, r3, #2 17621 .LVL1863: 17622 01b8 0D9D ldr r5, [sp, #52] 17623 01ba 0E9F ldr r7, [sp, #56] 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Calculations of last stage */ 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) 17624 .loc 22 1121 0 17625 01bc DDF818E0 ldr lr, [sp, #24] 17626 01c0 1801 lsls r0, r3, #4 17627 01c2 2A18 adds r2, r5, r0 17628 01c4 C3EB4376 rsb r6, r3, r3, lsl #29 17629 01c8 03EB4301 add r1, r3, r3, lsl #1 17630 01cc 02EBC606 add r6, r2, r6, lsl #3 17631 01d0 05EBC101 add r1, r5, r1, lsl #3 17632 01d4 05EBC303 add r3, r5, r3, lsl #3 17633 01d8 3044 add r0, r0, r6 17634 01da 0431 adds r1, r1, #4 17635 01dc 0433 adds r3, r3, #4 17636 01de 4FF0000C mov ip, #0 17637 .LVL1864: 17638 .L930: 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* index calculation for the input as, */ 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i1 = i0 + n2; 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i2 = i1 + n2; 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** i3 = i2 + n2; 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* Butterfly implementation */ 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa + xc */ 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = pSrc[2U * i0] + pSrc[2U * i2]; 17639 .loc 22 1131 0 discriminator 3 17640 01e2 57ED015A vldr.32 s11, [r7, #-4] 17641 01e6 D2ED006A vldr.32 s13, [r2] 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa - xc */ 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = pSrc[2U * i0] - pSrc[2U * i2]; 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya + yc */ 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya - yc */ 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc + xd */ 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[2U * i1] + pSrc[2U * i3]; 17642 .loc 22 1143 0 discriminator 3 17643 01ea 11ED016A vldr.32 s12, [r1, #-4] 17644 01ee 13ED015A vldr.32 s10, [r3, #-4] 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17645 .loc 22 1137 0 discriminator 3 17646 01f2 95ED017A vldr.32 s14, [r5, #4] 17647 01f6 D2ED017A vldr.32 s15, [r2, #4] 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17648 .loc 22 1131 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 586 17649 01fa 75EEA64A vadd.f32 s9, s11, s13 17650 .LVL1865: 17651 .loc 22 1143 0 discriminator 3 17652 01fe 35EE065A vadd.f32 s10, s10, s12 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17653 .loc 22 1134 0 discriminator 3 17654 0202 75EEE65A vsub.f32 s11, s11, s13 17655 .LVL1866: 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xa' = xa + xb + xc + xd */ 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i0] = (r1 + t1) * onebyfftLen; 17656 .loc 22 1146 0 discriminator 3 17657 0206 34EE854A vadd.f32 s8, s9, s10 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17658 .loc 22 1137 0 discriminator 3 17659 020a 37EE276A vadd.f32 s12, s14, s15 17660 .LVL1867: 17661 .loc 22 1146 0 discriminator 3 17662 020e 64EE006A vmul.f32 s13, s8, s0 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17663 .loc 22 1140 0 discriminator 3 17664 0212 37EE677A vsub.f32 s14, s14, s15 17665 .LVL1868: 17666 .loc 22 1146 0 discriminator 3 17667 0216 47ED016A vstr.32 s13, [r7, #-4] 17668 .LVL1869: 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa + xb) - (xc + xd) */ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r1 - t1; 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb + yd */ 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; 17669 .loc 22 1152 0 discriminator 3 17670 021a D6ED016A vldr.32 s13, [r6, #4] 17671 021e D0ED017A vldr.32 s15, [r0, #4] 17672 0222 76EEA77A vadd.f32 s15, s13, s15 17673 .LVL1870: 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17674 .loc 22 1149 0 discriminator 3 17675 0226 34EEC55A vsub.f32 s10, s9, s10 17676 .LVL1871: 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* ya' = ya + yb + yc + yd */ 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen; 17677 .loc 22 1155 0 discriminator 3 17678 022a 76EE276A vadd.f32 s13, s12, s15 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya + yc) - (yb + yd) */ 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s1 - t2; 17679 .loc 22 1158 0 discriminator 3 17680 022e 76EE674A vsub.f32 s9, s12, s15 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17681 .loc 22 1155 0 discriminator 3 17682 0232 66EE807A vmul.f32 s15, s13, s0 17683 .LVL1872: 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (yb-yd) */ ARM GAS /tmp/ccfbYRip.s page 587 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xb-xd) */ 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** t2 = pSrc[2U * i1] - pSrc[2U * i3]; 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i1] = r1 * onebyfftLen; 17684 .loc 22 1167 0 discriminator 3 17685 0236 25EE004A vmul.f32 s8, s10, s0 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17686 .loc 22 1155 0 discriminator 3 17687 023a C5ED017A vstr.32 s15, [r5, #4] 17688 .LVL1873: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17689 .loc 22 1161 0 discriminator 3 17690 023e 96ED015A vldr.32 s10, [r6, #4] 17691 .LVL1874: 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17692 .loc 22 1164 0 discriminator 3 17693 0242 53ED016A vldr.32 s13, [r3, #-4] 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17694 .loc 22 1161 0 discriminator 3 17695 0246 90ED016A vldr.32 s12, [r0, #4] 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17696 .loc 22 1164 0 discriminator 3 17697 024a 51ED017A vldr.32 s15, [r1, #-4] 17698 .loc 22 1167 0 discriminator 3 17699 024e 03ED014A vstr.32 s8, [r3, #-4] 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17700 .loc 22 1161 0 discriminator 3 17701 0252 35EE466A vsub.f32 s12, s10, s12 17702 .LVL1875: 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17703 .loc 22 1164 0 discriminator 3 17704 0256 76EEE77A vsub.f32 s15, s13, s15 17705 .LVL1876: 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i1) + 1U] = s1 * onebyfftLen; 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) - (yb-yd) */ 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r1 = r2 - t1; 17706 .loc 22 1173 0 discriminator 3 17707 025a 35EEC65A vsub.f32 s10, s11, s12 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (xa - xc) + (yb-yd) */ 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** r2 = r2 + t1; 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) + (xb-xd) */ 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s1 = s2 + t2; 17708 .loc 22 1179 0 discriminator 3 17709 025e 77EE276A vadd.f32 s13, s14, s15 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17710 .loc 22 1176 0 discriminator 3 17711 0262 35EE866A vadd.f32 s12, s11, s12 17712 .LVL1877: 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 588 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* (ya - yc) - (xb-xd) */ 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** s2 = s2 - t2; 17713 .loc 22 1182 0 discriminator 3 17714 0266 77EE677A vsub.f32 s15, s14, s15 17715 .LVL1878: 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i2] = r1 * onebyfftLen; 17716 .loc 22 1185 0 discriminator 3 17717 026a 65EE005A vmul.f32 s11, s10, s0 17718 .LVL1879: 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17719 .loc 22 1170 0 discriminator 3 17720 026e 24EE807A vmul.f32 s14, s9, s0 17721 .LVL1880: 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i2) + 1U] = s1 * onebyfftLen; 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[2U * i3] = r2 * onebyfftLen; 17722 .loc 22 1191 0 discriminator 3 17723 0272 26EE006A vmul.f32 s12, s12, s0 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17724 .loc 22 1188 0 discriminator 3 17725 0276 66EE806A vmul.f32 s13, s13, s0 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** pSrc[(2U * i3) + 1U] = s2 * onebyfftLen; 17726 .loc 22 1194 0 discriminator 3 17727 027a 67EE807A vmul.f32 s15, s15, s0 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17728 .loc 22 1121 0 discriminator 3 17729 027e C444 add ip, ip, r8 17730 .LVL1881: 17731 0280 A445 cmp ip, r4 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17732 .loc 22 1170 0 discriminator 3 17733 0282 86ED017A vstr.32 s14, [r6, #4] 17734 .LVL1882: 17735 0286 7744 add r7, r7, lr 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17736 .loc 22 1185 0 discriminator 3 17737 0288 C2ED005A vstr.32 s11, [r2] 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17738 .loc 22 1188 0 discriminator 3 17739 028c C2ED016A vstr.32 s13, [r2, #4] 17740 0290 7544 add r5, r5, lr 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17741 .loc 22 1191 0 discriminator 3 17742 0292 01ED016A vstr.32 s12, [r1, #-4] 17743 0296 7344 add r3, r3, lr 17744 .loc 22 1194 0 discriminator 3 17745 0298 C0ED017A vstr.32 s15, [r0, #4] 17746 029c 7644 add r6, r6, lr 17747 029e 7244 add r2, r2, lr 17748 02a0 7144 add r1, r1, lr ARM GAS /tmp/ccfbYRip.s page 589 17749 02a2 7044 add r0, r0, lr 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17750 .loc 22 1121 0 discriminator 3 17751 02a4 9DD9 bls .L930 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17752 .loc 22 1198 0 17753 02a6 11B0 add sp, sp, #68 17754 .LCFI195: 17755 .cfi_remember_state 17756 .cfi_def_cfa_offset 52 17757 @ sp needed 17758 02a8 BDEC048B vldm sp!, {d8-d9} 17759 .LCFI196: 17760 .cfi_restore 82 17761 .cfi_restore 83 17762 .cfi_restore 80 17763 .cfi_restore 81 17764 .cfi_def_cfa_offset 36 17765 02ac BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 17766 .LVL1883: 17767 .L931: 17768 .LCFI197: 17769 .cfi_restore_state 17770 02b0 CB00 lsls r3, r1, #3 17771 02b2 0693 str r3, [sp, #24] 17772 02b4 0D9B ldr r3, [sp, #52] 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17773 .loc 22 1011 0 17774 02b6 0C91 str r1, [sp, #48] 17775 02b8 0433 adds r3, r3, #4 17776 02ba 0E93 str r3, [sp, #56] 17777 02bc 0024 movs r4, #0 17778 02be 0C9B ldr r3, [sp, #48] 17779 02c0 DDF83080 ldr r8, [sp, #48] 17780 02c4 77E7 b .L926 17781 .cfi_endproc 17782 .LFE184: 17784 02c6 00BF .section .text.arm_cfft_radix4_f32,"ax",%progbits 17785 .align 1 17786 .p2align 2,,3 17787 .global arm_cfft_radix4_f32 17788 .syntax unified 17789 .thumb 17790 .thumb_func 17791 .fpu fpv4-sp-d16 17793 arm_cfft_radix4_f32: 17794 .LFB182: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** if (S->ifftFlag == 1U) 17795 .loc 22 71 0 17796 .cfi_startproc 17797 @ args = 0, pretend = 0, frame = 0 17798 @ frame_needed = 0, uses_anonymous_args = 0 17799 .LVL1884: 17800 0000 70B5 push {r4, r5, r6, lr} ARM GAS /tmp/ccfbYRip.s page 590 17801 .LCFI198: 17802 .cfi_def_cfa_offset 16 17803 .cfi_offset 4, -16 17804 .cfi_offset 5, -12 17805 .cfi_offset 6, -8 17806 .cfi_offset 14, -4 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** if (S->ifftFlag == 1U) 17807 .loc 22 71 0 17808 0002 0446 mov r4, r0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17809 .loc 22 72 0 17810 0004 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 17811 .LVL1885: 17812 0006 6268 ldr r2, [r4, #4] 17813 0008 A389 ldrh r3, [r4, #12] 17814 000a 0128 cmp r0, #1 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** if (S->ifftFlag == 1U) 17815 .loc 22 71 0 17816 000c 0D46 mov r5, r1 17817 000e 2188 ldrh r1, [r4] 17818 .LVL1886: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17819 .loc 22 72 0 17820 0010 06D0 beq .L942 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17821 .loc 22 80 0 17822 0012 2846 mov r0, r5 17823 0014 FFF7FEFF bl arm_radix4_butterfly_f32 17824 .LVL1887: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17825 .loc 22 83 0 17826 0018 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 17827 001a 012B cmp r3, #1 17828 001c 08D0 beq .L943 17829 .L937: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17830 .loc 22 89 0 17831 001e 70BD pop {r4, r5, r6, pc} 17832 .LVL1888: 17833 .L942: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17834 .loc 22 75 0 17835 0020 94ED040A vldr.32 s0, [r4, #16] 17836 0024 2846 mov r0, r5 17837 0026 FFF7FEFF bl arm_radix4_butterfly_inverse_f32 17838 .LVL1889: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** { 17839 .loc 22 83 0 17840 002a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 17841 002c 012B cmp r3, #1 17842 002e F6D1 bne .L937 17843 .L943: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17844 .loc 22 86 0 17845 0030 2846 mov r0, r5 17846 0032 A368 ldr r3, [r4, #8] 17847 0034 E289 ldrh r2, [r4, #14] ARM GAS /tmp/ccfbYRip.s page 591 17848 0036 2188 ldrh r1, [r4] 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** 17849 .loc 22 89 0 17850 0038 BDE87040 pop {r4, r5, r6, lr} 17851 .LCFI199: 17852 .cfi_restore 14 17853 .cfi_restore 6 17854 .cfi_restore 5 17855 .cfi_restore 4 17856 .cfi_def_cfa_offset 0 17857 .LVL1890: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c **** } 17858 .loc 22 86 0 17859 003c FFF7FEBF b arm_bitreversal_f32 17860 .LVL1891: 17861 .cfi_endproc 17862 .LFE182: 17864 .section .text.arm_cfft_radix4_init_f32,"ax",%progbits 17865 .align 1 17866 .p2align 2,,3 17867 .global arm_cfft_radix4_init_f32 17868 .syntax unified 17869 .thumb 17870 .thumb_func 17871 .fpu fpv4-sp-d16 17873 arm_cfft_radix4_init_f32: 17874 .LFB185: 17875 .file 23 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Title: arm_cfft_radix4_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization functio 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** #include "arm_math.h" ARM GAS /tmp/ccfbYRip.s page 592 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @addtogroup ComplexFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @brief Initialization function for the floating-point CFFT/CIFFT. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @deprecated Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @param[in] fftLen length of the FFT 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @param[in] ifftFlag flag that selects transform direction 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - value = 0: forward transform 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - value = 1: inverse transform 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - value = 0: disables bit reversal of output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - value = 1: enables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @return execution status 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @par Details 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** The parameter ifftFlag controls whether a forward or inverse transf 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @par 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** The parameter bitReverseFlag controls whether output is in normal o 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @par 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** @par 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** arm_status arm_cfft_radix4_init_f32( 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** arm_cfft_radix4_instance_f32 * S, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** uint16_t fftLen, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** uint8_t ifftFlag, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** uint8_t bitReverseFlag) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 17876 .loc 23 73 0 17877 .cfi_startproc 17878 @ args = 0, pretend = 0, frame = 0 17879 @ frame_needed = 0, uses_anonymous_args = 0 17880 @ link register save eliminated. 17881 .LVL1892: 17882 0000 10B4 push {r4} 17883 .LCFI200: 17884 .cfi_def_cfa_offset 4 17885 .cfi_offset 4, -4 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the default arm status */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 593 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the FFT length */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->fftLen = fftLen; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the Twiddle coefficient pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pTwiddle = (float32_t *) twiddleCoef; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->ifftFlag = ifftFlag; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the Flag for calculation Bit reversal or not */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitReverseFlag = bitReverseFlag; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters depending on the FFT length */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** switch (S->fftLen) 17886 .loc 23 90 0 17887 0002 B1F5807F cmp r1, #256 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17888 .loc 23 81 0 17889 0006 294C ldr r4, .L954 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17890 .loc 23 84 0 17891 0008 8270 strb r2, [r0, #2] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17892 .loc 23 87 0 17893 000a C370 strb r3, [r0, #3] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17894 .loc 23 78 0 17895 000c 0180 strh r1, [r0] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17896 .loc 23 81 0 17897 000e 4460 str r4, [r0, #4] 17898 .loc 23 90 0 17899 0010 3FD0 beq .L946 17900 0012 0FD8 bhi .L947 17901 0014 1029 cmp r1, #16 17902 0016 30D0 beq .L948 17903 0018 4029 cmp r1, #64 17904 001a 1DD1 bne .L952 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** case 4096U: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters for 4096 point FFT */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the twiddle coef modifier value */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->twidCoefModifier = 1U; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 1U; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table pointer */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.000244140625; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** case 1024U: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters for 1024 point FFT */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the twiddle coef modifier value */ ARM GAS /tmp/ccfbYRip.s page 594 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->twidCoefModifier = 4U; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 4U; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table pointer */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0009765625f; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** case 256U: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters for 256 point FFT */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->twidCoefModifier = 16U; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 16U; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** case 64U: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters for 64 point FFT */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->twidCoefModifier = 64U; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 64U; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 17905 .loc 23 133 0 17906 001c 4FF07252 mov r2, #1015021568 17907 .LVL1893: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 17908 .loc 23 132 0 17909 0020 234B ldr r3, .L954+4 17910 .LVL1894: 17911 .loc 23 133 0 17912 0022 0261 str r2, [r0, #16] @ float 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 64U; 17913 .loc 23 130 0 17914 0024 4FF04012 mov r2, #4194368 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 17915 .loc 23 132 0 17916 0028 C0E90232 strd r3, r2, [r0, #8] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** case 16U: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initializations of structure parameters for 16 point FFT */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->twidCoefModifier = 256U; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 256U; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** default: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Reporting argument error if fftSize is not valid value */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** return (status); ARM GAS /tmp/ccfbYRip.s page 595 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** } 17917 .loc 23 152 0 17918 002c 5DF8044B ldr r4, [sp], #4 17919 .LCFI201: 17920 .cfi_remember_state 17921 .cfi_restore 4 17922 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17923 .loc 23 75 0 17924 0030 0020 movs r0, #0 17925 .LVL1895: 17926 .loc 23 152 0 17927 0032 7047 bx lr 17928 .LVL1896: 17929 .L947: 17930 .LCFI202: 17931 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 17932 .loc 23 90 0 17933 0034 B1F5806F cmp r1, #1024 17934 0038 13D0 beq .L950 17935 003a B1F5805F cmp r1, #4096 17936 003e 0BD1 bne .L952 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 17937 .loc 23 103 0 17938 0040 4FF06652 mov r2, #964689920 17939 .LVL1897: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 17940 .loc 23 101 0 17941 0044 1B4B ldr r3, .L954+8 17942 .LVL1898: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 17943 .loc 23 103 0 17944 0046 0261 str r2, [r0, #16] @ float 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 17945 .loc 23 97 0 17946 0048 4FF00112 mov r2, #65537 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 17947 .loc 23 101 0 17948 004c C0E90232 strd r3, r2, [r0, #8] 17949 .loc 23 152 0 17950 0050 5DF8044B ldr r4, [sp], #4 17951 .LCFI203: 17952 .cfi_remember_state 17953 .cfi_restore 4 17954 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17955 .loc 23 75 0 17956 0054 0020 movs r0, #0 17957 .LVL1899: 17958 .loc 23 152 0 17959 0056 7047 bx lr 17960 .LVL1900: 17961 .L952: 17962 .LCFI204: 17963 .cfi_restore_state 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; ARM GAS /tmp/ccfbYRip.s page 596 17964 .loc 23 147 0 17965 0058 4FF0FF30 mov r0, #-1 17966 .LVL1901: 17967 .loc 23 152 0 17968 005c 5DF8044B ldr r4, [sp], #4 17969 .LCFI205: 17970 .cfi_remember_state 17971 .cfi_restore 4 17972 .cfi_def_cfa_offset 0 17973 0060 7047 bx lr 17974 .LVL1902: 17975 .L950: 17976 .LCFI206: 17977 .cfi_restore_state 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 17978 .loc 23 116 0 17979 0062 4FF06A52 mov r2, #981467136 17980 .LVL1903: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 17981 .loc 23 114 0 17982 0066 144B ldr r3, .L954+12 17983 .LVL1904: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 17984 .loc 23 116 0 17985 0068 0261 str r2, [r0, #16] @ float 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 17986 .loc 23 110 0 17987 006a 4FF00412 mov r2, #262148 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 17988 .loc 23 114 0 17989 006e C0E90232 strd r3, r2, [r0, #8] 17990 .loc 23 152 0 17991 0072 5DF8044B ldr r4, [sp], #4 17992 .LCFI207: 17993 .cfi_remember_state 17994 .cfi_restore 4 17995 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 17996 .loc 23 75 0 17997 0076 0020 movs r0, #0 17998 .LVL1905: 17999 .loc 23 152 0 18000 0078 7047 bx lr 18001 .LVL1906: 18002 .L948: 18003 .LCFI208: 18004 .cfi_restore_state 18005 .LBB2324: 18006 .LBB2325: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 18007 .loc 23 141 0 18008 007a 4FF07652 mov r2, #1031798784 18009 .LVL1907: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 18010 .loc 23 140 0 18011 007e 0F4B ldr r3, .L954+16 18012 .LVL1908: ARM GAS /tmp/ccfbYRip.s page 597 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 18013 .loc 23 141 0 18014 0080 0261 str r2, [r0, #16] @ float 18015 .LVL1909: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 256U; 18016 .loc 23 138 0 18017 0082 4FF00122 mov r2, #16777472 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 18018 .loc 23 140 0 18019 0086 C0E90232 strd r3, r2, [r0, #8] 18020 .LBE2325: 18021 .LBE2324: 18022 .loc 23 152 0 18023 008a 5DF8044B ldr r4, [sp], #4 18024 .LCFI209: 18025 .cfi_remember_state 18026 .cfi_restore 4 18027 .cfi_def_cfa_offset 0 18028 .LBB2327: 18029 .LBB2326: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 18030 .loc 23 141 0 18031 008e 0020 movs r0, #0 18032 .LVL1910: 18033 .LBE2326: 18034 .LBE2327: 18035 .loc 23 152 0 18036 0090 7047 bx lr 18037 .LVL1911: 18038 .L946: 18039 .LCFI210: 18040 .cfi_restore_state 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 18041 .loc 23 125 0 18042 0092 4FF06E52 mov r2, #998244352 18043 .LVL1912: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 18044 .loc 23 124 0 18045 0096 0A4B ldr r3, .L954+20 18046 .LVL1913: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 18047 .loc 23 125 0 18048 0098 0261 str r2, [r0, #16] @ float 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 16U; 18049 .loc 23 122 0 18050 009a 4FF01012 mov r2, #1048592 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 18051 .loc 23 124 0 18052 009e C0E90232 strd r3, r2, [r0, #8] 18053 .loc 23 152 0 18054 00a2 5DF8044B ldr r4, [sp], #4 18055 .LCFI211: 18056 .cfi_restore 4 18057 .cfi_def_cfa_offset 0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 18058 .loc 23 75 0 18059 00a6 0020 movs r0, #0 ARM GAS /tmp/ccfbYRip.s page 598 18060 .LVL1914: 18061 .loc 23 152 0 18062 00a8 7047 bx lr 18063 .L955: 18064 00aa 00BF .align 2 18065 .L954: 18066 00ac 00000000 .word twiddleCoef_4096 18067 00b0 7E000000 .word armBitRevTable+126 18068 00b4 00000000 .word armBitRevTable 18069 00b8 06000000 .word armBitRevTable+6 18070 00bc FE010000 .word armBitRevTable+510 18071 00c0 1E000000 .word armBitRevTable+30 18072 .cfi_endproc 18073 .LFE185: 18075 .section .text.arm_cfft_radix4_init_q15,"ax",%progbits 18076 .align 1 18077 .p2align 2,,3 18078 .global arm_cfft_radix4_init_q15 18079 .syntax unified 18080 .thumb 18081 .thumb_func 18082 .fpu fpv4-sp-d16 18084 arm_cfft_radix4_init_q15: 18085 .LFB186: 18086 .file 24 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Title: arm_cfft_radix4_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Description: Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /** ARM GAS /tmp/ccfbYRip.s page 599 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @addtogroup ComplexFFT 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @{ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** */ 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @brief Initialization function for the Q15 CFFT/CIFFT. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @param[in] fftLen length of the FFT 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @param[in] ifftFlag flag that selects transform direction 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - value = 0: forward transform 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - value = 1: inverse transform 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - value = 0: disables bit reversal of output 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - value = 1: enables bit reversal of output 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @return execution status 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @par Details 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** The parameter ifftFlag controls whether a forward or inverse transf 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @par 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** The parameter bitReverseFlag controls whether output is in normal o 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @par 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** @par 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** arm_status arm_cfft_radix4_init_q15( 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** arm_cfft_radix4_instance_q15 * S, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** uint16_t fftLen, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** uint8_t ifftFlag, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** uint8_t bitReverseFlag) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** { 18087 .loc 24 75 0 18088 .cfi_startproc 18089 @ args = 0, pretend = 0, frame = 0 18090 @ frame_needed = 0, uses_anonymous_args = 0 18091 @ link register save eliminated. 18092 .LVL1915: 18093 0000 10B4 push {r4} 18094 .LCFI212: 18095 .cfi_def_cfa_offset 4 18096 .cfi_offset 4, -4 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the default arm status */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->fftLen = fftLen; ARM GAS /tmp/ccfbYRip.s page 600 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Twiddle coefficient pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pTwiddle = (q15_t *) twiddleCoef_4096_q15; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->ifftFlag = ifftFlag; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Flag for calculation Bit reversal or not */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitReverseFlag = bitReverseFlag; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters depending on the FFT length */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** switch (S->fftLen) 18097 .loc 24 88 0 18098 0002 B1F5807F cmp r1, #256 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 18099 .loc 24 81 0 18100 0006 214C ldr r4, .L966 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Flag for calculation Bit reversal or not */ 18101 .loc 24 83 0 18102 0008 8270 strb r2, [r0, #2] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18103 .loc 24 85 0 18104 000a C370 strb r3, [r0, #3] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Twiddle coefficient pointer */ 18105 .loc 24 79 0 18106 000c 0180 strh r1, [r0] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 18107 .loc 24 81 0 18108 000e 4460 str r4, [r0, #4] 18109 .loc 24 88 0 18110 0010 33D0 beq .L958 18111 0012 0CD8 bhi .L959 18112 0014 1029 cmp r1, #16 18113 0016 27D0 beq .L960 18114 0018 4029 cmp r1, #64 18115 001a 17D1 bne .L964 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** { 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** case 4096U: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters for 4096 point FFT */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the twiddle coef modifier value */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->twidCoefModifier = 1U; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the bit reversal table modifier */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 1U; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the bit reversal table pointer */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** case 1024U: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters for 1024 point FFT */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->twidCoefModifier = 4U; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 4U; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** case 256U: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters for 256 point FFT */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->twidCoefModifier = 16U; ARM GAS /tmp/ccfbYRip.s page 601 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 16U; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** case 64U: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters for 64 point FFT */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->twidCoefModifier = 64U; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 64U; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 18116 .loc 24 122 0 18117 001c 1C4B ldr r3, .L966+4 18118 .LVL1916: 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** case 16U: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initializations of structure parameters for 16 point FFT */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->twidCoefModifier = 256U; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 256U; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** default: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Reporting argument error if fftSize is not valid value */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** } 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** return (status); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** } 18119 .loc 24 141 0 18120 001e 5DF8044B ldr r4, [sp], #4 18121 .LCFI213: 18122 .cfi_remember_state 18123 .cfi_restore 4 18124 .cfi_def_cfa_offset 0 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 64U; 18125 .loc 24 120 0 18126 0022 4FF04012 mov r2, #4194368 18127 .LVL1917: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18128 .loc 24 122 0 18129 0026 C0E90232 strd r3, r2, [r0, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 18130 .loc 24 77 0 18131 002a 0020 movs r0, #0 18132 .LVL1918: 18133 .loc 24 141 0 18134 002c 7047 bx lr 18135 .LVL1919: 18136 .L959: 18137 .LCFI214: 18138 .cfi_restore_state 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** { 18139 .loc 24 88 0 ARM GAS /tmp/ccfbYRip.s page 602 18140 002e B1F5806F cmp r1, #1024 18141 0032 10D0 beq .L962 18142 0034 B1F5805F cmp r1, #4096 18143 0038 08D1 bne .L964 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18144 .loc 24 98 0 18145 003a 164B ldr r3, .L966+8 18146 .LVL1920: 18147 .loc 24 141 0 18148 003c 5DF8044B ldr r4, [sp], #4 18149 .LCFI215: 18150 .cfi_remember_state 18151 .cfi_restore 4 18152 .cfi_def_cfa_offset 0 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the bit reversal table modifier */ 18153 .loc 24 94 0 18154 0040 4FF00112 mov r2, #65537 18155 .LVL1921: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18156 .loc 24 98 0 18157 0044 C0E90232 strd r3, r2, [r0, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 18158 .loc 24 77 0 18159 0048 0020 movs r0, #0 18160 .LVL1922: 18161 .loc 24 141 0 18162 004a 7047 bx lr 18163 .LVL1923: 18164 .L964: 18165 .LCFI216: 18166 .cfi_restore_state 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** break; 18167 .loc 24 136 0 18168 004c 4FF0FF30 mov r0, #-1 18169 .LVL1924: 18170 .loc 24 141 0 18171 0050 5DF8044B ldr r4, [sp], #4 18172 .LCFI217: 18173 .cfi_remember_state 18174 .cfi_restore 4 18175 .cfi_def_cfa_offset 0 18176 0054 7047 bx lr 18177 .LVL1925: 18178 .L962: 18179 .LCFI218: 18180 .cfi_restore_state 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18181 .loc 24 106 0 18182 0056 104B ldr r3, .L966+12 18183 .LVL1926: 18184 .loc 24 141 0 18185 0058 5DF8044B ldr r4, [sp], #4 18186 .LCFI219: 18187 .cfi_remember_state 18188 .cfi_restore 4 18189 .cfi_def_cfa_offset 0 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 4U; ARM GAS /tmp/ccfbYRip.s page 603 18190 .loc 24 104 0 18191 005c 4FF00412 mov r2, #262148 18192 .LVL1927: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18193 .loc 24 106 0 18194 0060 C0E90232 strd r3, r2, [r0, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 18195 .loc 24 77 0 18196 0064 0020 movs r0, #0 18197 .LVL1928: 18198 .loc 24 141 0 18199 0066 7047 bx lr 18200 .LVL1929: 18201 .L960: 18202 .LCFI220: 18203 .cfi_restore_state 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18204 .loc 24 130 0 18205 0068 0C4B ldr r3, .L966+16 18206 .LVL1930: 18207 .loc 24 141 0 18208 006a 5DF8044B ldr r4, [sp], #4 18209 .LCFI221: 18210 .cfi_remember_state 18211 .cfi_restore 4 18212 .cfi_def_cfa_offset 0 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 256U; 18213 .loc 24 128 0 18214 006e 4FF00122 mov r2, #16777472 18215 .LVL1931: 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18216 .loc 24 130 0 18217 0072 C0E90232 strd r3, r2, [r0, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 18218 .loc 24 77 0 18219 0076 0020 movs r0, #0 18220 .LVL1932: 18221 .loc 24 141 0 18222 0078 7047 bx lr 18223 .LVL1933: 18224 .L958: 18225 .LCFI222: 18226 .cfi_restore_state 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** 18227 .loc 24 114 0 18228 007a 094B ldr r3, .L966+20 18229 .LVL1934: 18230 .loc 24 141 0 18231 007c 5DF8044B ldr r4, [sp], #4 18232 .LCFI223: 18233 .cfi_restore 4 18234 .cfi_def_cfa_offset 0 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** S->bitRevFactor = 16U; 18235 .loc 24 112 0 18236 0080 4FF01012 mov r2, #1048592 18237 .LVL1935: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** ARM GAS /tmp/ccfbYRip.s page 604 18238 .loc 24 114 0 18239 0084 C0E90232 strd r3, r2, [r0, #8] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c **** /* Initialise the FFT length */ 18240 .loc 24 77 0 18241 0088 0020 movs r0, #0 18242 .LVL1936: 18243 .loc 24 141 0 18244 008a 7047 bx lr 18245 .L967: 18246 .align 2 18247 .L966: 18248 008c 00000000 .word twiddleCoef_4096_q15 18249 0090 7E000000 .word armBitRevTable+126 18250 0094 00000000 .word armBitRevTable 18251 0098 06000000 .word armBitRevTable+6 18252 009c FE010000 .word armBitRevTable+510 18253 00a0 1E000000 .word armBitRevTable+30 18254 .cfi_endproc 18255 .LFE186: 18257 .section .text.arm_cfft_radix4_init_q31,"ax",%progbits 18258 .align 1 18259 .p2align 2,,3 18260 .global arm_cfft_radix4_init_q31 18261 .syntax unified 18262 .thumb 18263 .thumb_func 18264 .fpu fpv4-sp-d16 18266 arm_cfft_radix4_init_q31: 18267 .LFB187: 18268 .file 25 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_in 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Title: arm_cfft_radix4_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Description: Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** */ ARM GAS /tmp/ccfbYRip.s page 605 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @addtogroup ComplexFFT 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @brief Initialization function for the Q31 CFFT/CIFFT. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @param[in] fftLen length of the FFT. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @param[in] ifftFlag flag that selects transform direction 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - value = 0: forward transform 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - value = 1: inverse transform 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - value = 0: disables bit reversal of output 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - value = 1: enables bit reversal of output 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @return execution status 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @par Details 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** The parameter ifftFlag controls whether a forward or inverse transf 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** The parameter bitReverseFlag controls whether output is in normal o 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** The parameter fftLen Specifies length of CFFT/CIFFT process. Suppor 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** @par 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** arm_status arm_cfft_radix4_init_q31( 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** arm_cfft_radix4_instance_q31 * S, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** uint16_t fftLen, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** uint8_t ifftFlag, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** uint8_t bitReverseFlag) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** { 18269 .loc 25 74 0 18270 .cfi_startproc 18271 @ args = 0, pretend = 0, frame = 0 18272 @ frame_needed = 0, uses_anonymous_args = 0 18273 @ link register save eliminated. 18274 .LVL1937: 18275 0000 10B4 push {r4} 18276 .LCFI224: 18277 .cfi_def_cfa_offset 4 18278 .cfi_offset 4, -4 ARM GAS /tmp/ccfbYRip.s page 606 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the default arm status */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->fftLen = fftLen; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Twiddle coefficient pointer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pTwiddle = (q31_t *) twiddleCoef_4096_q31; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->ifftFlag = ifftFlag; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Flag for calculation Bit reversal or not */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitReverseFlag = bitReverseFlag; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of Instance structure depending on the FFT length */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** switch (S->fftLen) 18279 .loc 25 87 0 18280 0002 B1F5807F cmp r1, #256 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 18281 .loc 25 80 0 18282 0006 214C ldr r4, .L978 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Flag for calculation Bit reversal or not */ 18283 .loc 25 82 0 18284 0008 8270 strb r2, [r0, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 18285 .loc 25 84 0 18286 000a C370 strb r3, [r0, #3] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Twiddle coefficient pointer */ 18287 .loc 25 78 0 18288 000c 0180 strh r1, [r0] @ movhi 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the Flag for selection of CFFT or CIFFT */ 18289 .loc 25 80 0 18290 000e 4460 str r4, [r0, #4] 18291 .loc 25 87 0 18292 0010 33D0 beq .L970 18293 0012 0CD8 bhi .L971 18294 0014 1029 cmp r1, #16 18295 0016 27D0 beq .L972 18296 0018 4029 cmp r1, #64 18297 001a 17D1 bne .L976 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** { 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of structure parameters for 4096 point FFT */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** case 4096U: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the twiddle coef modifier value */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->twidCoefModifier = 1U; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table modifier */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 1U; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table pointer */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pBitRevTable = (uint16_t *) armBitRevTable; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of structure parameters for 1024 point FFT */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** case 1024U: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the twiddle coef modifier value */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->twidCoefModifier = 4U; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table modifier */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 4U; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table pointer */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; ARM GAS /tmp/ccfbYRip.s page 607 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** case 256U: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of structure parameters for 256 point FFT */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->twidCoefModifier = 16U; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 16U; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** case 64U: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of structure parameters for 64 point FFT */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->twidCoefModifier = 64U; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 64U; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; 18298 .loc 25 120 0 18299 001c 1C4B ldr r3, .L978+4 18300 .LVL1938: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** case 16U: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initializations of structure parameters for 16 point FFT */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->twidCoefModifier = 256U; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 256U; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** default: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Reporting argument error if fftSize is not valid value */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** } 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** return (status); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** } 18301 .loc 25 137 0 18302 001e 5DF8044B ldr r4, [sp], #4 18303 .LCFI225: 18304 .cfi_remember_state 18305 .cfi_restore 4 18306 .cfi_def_cfa_offset 0 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 64U; 18307 .loc 25 118 0 18308 0022 4FF04012 mov r2, #4194368 18309 .LVL1939: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18310 .loc 25 120 0 18311 0026 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 18312 .loc 25 76 0 18313 002a 0020 movs r0, #0 18314 .LVL1940: 18315 .loc 25 137 0 18316 002c 7047 bx lr 18317 .LVL1941: 18318 .L971: 18319 .LCFI226: 18320 .cfi_restore_state 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 608 18321 .loc 25 87 0 18322 002e B1F5806F cmp r1, #1024 18323 0032 10D0 beq .L974 18324 0034 B1F5805F cmp r1, #4096 18325 0038 08D1 bne .L976 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18326 .loc 25 96 0 18327 003a 164B ldr r3, .L978+8 18328 .LVL1942: 18329 .loc 25 137 0 18330 003c 5DF8044B ldr r4, [sp], #4 18331 .LCFI227: 18332 .cfi_remember_state 18333 .cfi_restore 4 18334 .cfi_def_cfa_offset 0 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table modifier */ 18335 .loc 25 92 0 18336 0040 4FF00112 mov r2, #65537 18337 .LVL1943: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18338 .loc 25 96 0 18339 0044 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 18340 .loc 25 76 0 18341 0048 0020 movs r0, #0 18342 .LVL1944: 18343 .loc 25 137 0 18344 004a 7047 bx lr 18345 .LVL1945: 18346 .L976: 18347 .LCFI228: 18348 .cfi_restore_state 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18349 .loc 25 132 0 18350 004c 4FF0FF30 mov r0, #-1 18351 .LVL1946: 18352 .loc 25 137 0 18353 0050 5DF8044B ldr r4, [sp], #4 18354 .LCFI229: 18355 .cfi_remember_state 18356 .cfi_restore 4 18357 .cfi_def_cfa_offset 0 18358 0054 7047 bx lr 18359 .LVL1947: 18360 .L974: 18361 .LCFI230: 18362 .cfi_restore_state 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18363 .loc 25 106 0 18364 0056 104B ldr r3, .L978+12 18365 .LVL1948: 18366 .loc 25 137 0 18367 0058 5DF8044B ldr r4, [sp], #4 18368 .LCFI231: 18369 .cfi_remember_state 18370 .cfi_restore 4 18371 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccfbYRip.s page 609 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the bit reversal table modifier */ 18372 .loc 25 102 0 18373 005c 4FF00412 mov r2, #262148 18374 .LVL1949: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18375 .loc 25 106 0 18376 0060 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 18377 .loc 25 76 0 18378 0064 0020 movs r0, #0 18379 .LVL1950: 18380 .loc 25 137 0 18381 0066 7047 bx lr 18382 .LVL1951: 18383 .L972: 18384 .LCFI232: 18385 .cfi_restore_state 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18386 .loc 25 127 0 18387 0068 0C4B ldr r3, .L978+16 18388 .LVL1952: 18389 .loc 25 137 0 18390 006a 5DF8044B ldr r4, [sp], #4 18391 .LCFI233: 18392 .cfi_remember_state 18393 .cfi_restore 4 18394 .cfi_def_cfa_offset 0 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 256U; 18395 .loc 25 125 0 18396 006e 4FF00122 mov r2, #16777472 18397 .LVL1953: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18398 .loc 25 127 0 18399 0072 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 18400 .loc 25 76 0 18401 0076 0020 movs r0, #0 18402 .LVL1954: 18403 .loc 25 137 0 18404 0078 7047 bx lr 18405 .LVL1955: 18406 .L970: 18407 .LCFI234: 18408 .cfi_restore_state 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18409 .loc 25 113 0 18410 007a 094B ldr r3, .L978+20 18411 .LVL1956: 18412 .loc 25 137 0 18413 007c 5DF8044B ldr r4, [sp], #4 18414 .LCFI235: 18415 .cfi_restore 4 18416 .cfi_def_cfa_offset 0 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** S->bitRevFactor = 16U; 18417 .loc 25 111 0 18418 0080 4FF01012 mov r2, #1048592 18419 .LVL1957: ARM GAS /tmp/ccfbYRip.s page 610 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** break; 18420 .loc 25 113 0 18421 0084 C0E90232 strd r3, r2, [r0, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c **** /* Initialise the FFT length */ 18422 .loc 25 76 0 18423 0088 0020 movs r0, #0 18424 .LVL1958: 18425 .loc 25 137 0 18426 008a 7047 bx lr 18427 .L979: 18428 .align 2 18429 .L978: 18430 008c 00000000 .word twiddleCoef_4096_q31 18431 0090 7E000000 .word armBitRevTable+126 18432 0094 00000000 .word armBitRevTable 18433 0098 06000000 .word armBitRevTable+6 18434 009c FE010000 .word armBitRevTable+510 18435 00a0 1E000000 .word armBitRevTable+30 18436 .cfi_endproc 18437 .LFE187: 18439 .section .text.arm_radix4_butterfly_q15,"ax",%progbits 18440 .align 1 18441 .p2align 2,,3 18442 .global arm_radix4_butterfly_q15 18443 .syntax unified 18444 .thumb 18445 .thumb_func 18446 .fpu fpv4-sp-d16 18448 arm_radix4_butterfly_q15: 18449 .LFB189: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18450 .loc 4 152 0 18451 .cfi_startproc 18452 @ args = 0, pretend = 0, frame = 72 18453 @ frame_needed = 0, uses_anonymous_args = 0 18454 .LVL1959: 18455 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 18456 .LCFI236: 18457 .cfi_def_cfa_offset 36 18458 .cfi_offset 4, -36 18459 .cfi_offset 5, -32 18460 .cfi_offset 6, -28 18461 .cfi_offset 7, -24 18462 .cfi_offset 8, -20 18463 .cfi_offset 9, -16 18464 .cfi_offset 10, -12 18465 .cfi_offset 11, -8 18466 .cfi_offset 14, -4 18467 0004 93B0 sub sp, sp, #76 18468 .LCFI237: 18469 .cfi_def_cfa_offset 112 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18470 .loc 4 152 0 18471 0006 1746 mov r7, r2 18472 0008 0291 str r1, [sp, #8] 18473 .LVL1960: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 611 18474 .loc 4 177 0 18475 000a 8908 lsrs r1, r1, #2 18476 .LVL1961: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 18477 .loc 4 186 0 18478 000c 8C00 lsls r4, r1, #2 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18479 .loc 4 152 0 18480 000e 1092 str r2, [sp, #64] 18481 0010 03EB4302 add r2, r3, r3, lsl #1 18482 .LVL1962: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 18483 .loc 4 186 0 18484 0014 0519 adds r5, r0, r4 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18485 .loc 4 177 0 18486 0016 1191 str r1, [sp, #68] 18487 .LVL1963: 18488 0018 8A46 mov r10, r1 18489 001a 9100 lsls r1, r2, #2 18490 .LVL1964: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 18491 .loc 4 187 0 18492 001c 2E19 adds r6, r5, r4 18493 001e 0391 str r1, [sp, #12] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18494 .loc 4 263 0 18495 0020 DFF84482 ldr r8, .L994 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18496 .loc 4 152 0 18497 0024 0F90 str r0, [sp, #60] 18498 .LVL1965: 18499 0026 D900 lsls r1, r3, #3 18500 0028 9B00 lsls r3, r3, #2 18501 .LVL1966: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 18502 .loc 4 185 0 18503 002a 8346 mov fp, r0 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18504 .loc 4 188 0 18505 002c 3444 add r4, r4, r6 18506 .LVL1967: 18507 002e 0191 str r1, [sp, #4] 18508 0030 0093 str r3, [sp] 18509 0032 BE46 mov lr, r7 18510 0034 BC46 mov ip, r7 18511 .LBB2328: 18512 .LBB2329: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18513 .loc 5 1739 0 18514 0036 0020 movs r0, #0 18515 .LVL1968: 18516 .L981: 18517 .LBE2329: 18518 .LBE2328: 18519 .LBB2331: 18520 .LBB2332: ARM GAS /tmp/ccfbYRip.s page 612 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18521 .loc 6 909 0 discriminator 1 18522 0038 DBF80030 ldr r3, [fp] @ unaligned 18523 .LBE2332: 18524 .LBE2331: 18525 .LBB2333: 18526 .LBB2330: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18527 .loc 5 1739 0 discriminator 1 18528 .syntax unified 18529 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18530 003c 93FA20F3 shadd16 r3, r3, r0 18531 @ 0 "" 2 18532 .LVL1969: 18533 .thumb 18534 .syntax unified 18535 .LBE2330: 18536 .LBE2333: 18537 .LBB2334: 18538 .LBB2335: 18539 .syntax unified 18540 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18541 0040 93FA20F3 shadd16 r3, r3, r0 18542 @ 0 "" 2 18543 .LVL1970: 18544 .thumb 18545 .syntax unified 18546 .LBE2335: 18547 .LBE2334: 18548 .LBB2336: 18549 .LBB2337: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18550 .loc 6 909 0 discriminator 1 18551 0044 3168 ldr r1, [r6] @ unaligned 18552 .LBE2337: 18553 .LBE2336: 18554 .LBB2338: 18555 .LBB2339: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18556 .loc 5 1739 0 discriminator 1 18557 .syntax unified 18558 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18559 0046 91FA20F1 shadd16 r1, r1, r0 18560 @ 0 "" 2 18561 .LVL1971: 18562 .thumb 18563 .syntax unified 18564 .LBE2339: 18565 .LBE2338: 18566 .LBB2340: 18567 .LBB2341: 18568 .syntax unified 18569 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18570 004a 91FA20F1 shadd16 r1, r1, r0 18571 @ 0 "" 2 18572 .LVL1972: 18573 .thumb ARM GAS /tmp/ccfbYRip.s page 613 18574 .syntax unified 18575 .LBE2341: 18576 .LBE2340: 18577 .LBB2342: 18578 .LBB2343: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18579 .loc 5 1731 0 discriminator 1 18580 .syntax unified 18581 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18582 004e 93FA11F9 qadd16 r9, r3, r1 18583 @ 0 "" 2 18584 .LVL1973: 18585 .thumb 18586 .syntax unified 18587 .LBE2343: 18588 .LBE2342: 18589 .LBB2344: 18590 .LBB2345: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18591 .loc 5 1779 0 discriminator 1 18592 .syntax unified 18593 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18594 0052 D3FA11F1 qsub16 r1, r3, r1 18595 @ 0 "" 2 18596 .LVL1974: 18597 .thumb 18598 .syntax unified 18599 .LBE2345: 18600 .LBE2344: 18601 .LBB2346: 18602 .LBB2347: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18603 .loc 6 909 0 discriminator 1 18604 0056 2A68 ldr r2, [r5] @ unaligned 18605 .LBE2347: 18606 .LBE2346: 18607 .LBB2348: 18608 .LBB2349: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18609 .loc 5 1739 0 discriminator 1 18610 .syntax unified 18611 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18612 0058 92FA20F2 shadd16 r2, r2, r0 18613 @ 0 "" 2 18614 .LVL1975: 18615 .thumb 18616 .syntax unified 18617 .LBE2349: 18618 .LBE2348: 18619 .LBB2350: 18620 .LBB2351: 18621 .syntax unified 18622 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18623 005c 92FA20F3 shadd16 r3, r2, r0 18624 @ 0 "" 2 18625 .LVL1976: 18626 .thumb ARM GAS /tmp/ccfbYRip.s page 614 18627 .syntax unified 18628 .LBE2351: 18629 .LBE2350: 18630 .LBB2352: 18631 .LBB2353: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18632 .loc 6 909 0 discriminator 1 18633 0060 2268 ldr r2, [r4] @ unaligned 18634 .LBE2353: 18635 .LBE2352: 18636 .LBB2354: 18637 .LBB2355: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18638 .loc 5 1739 0 discriminator 1 18639 .syntax unified 18640 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18641 0062 92FA20F2 shadd16 r2, r2, r0 18642 @ 0 "" 2 18643 .LVL1977: 18644 .thumb 18645 .syntax unified 18646 .LBE2355: 18647 .LBE2354: 18648 .LBB2356: 18649 .LBB2357: 18650 .syntax unified 18651 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18652 0066 92FA20F2 shadd16 r2, r2, r0 18653 @ 0 "" 2 18654 .LVL1978: 18655 .thumb 18656 .syntax unified 18657 .LBE2357: 18658 .LBE2356: 18659 .LBB2358: 18660 .LBB2359: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18661 .loc 5 1731 0 discriminator 1 18662 .syntax unified 18663 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18664 006a 93FA12F2 qadd16 r2, r3, r2 18665 @ 0 "" 2 18666 .LVL1979: 18667 .thumb 18668 .syntax unified 18669 .LBE2359: 18670 .LBE2358: 18671 .LBB2360: 18672 .LBB2361: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18673 .loc 5 1739 0 discriminator 1 18674 .syntax unified 18675 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18676 006e 99FA22F3 shadd16 r3, r9, r2 18677 @ 0 "" 2 18678 .LVL1980: 18679 .thumb ARM GAS /tmp/ccfbYRip.s page 615 18680 .syntax unified 18681 .LBE2361: 18682 .LBE2360: 18683 .LBB2362: 18684 .LBB2363: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18685 .loc 6 969 0 discriminator 1 18686 0072 4BF8043B str r3, [fp], #4 @ unaligned 18687 .LVL1981: 18688 .LBE2363: 18689 .LBE2362: 18690 .LBB2364: 18691 .LBB2365: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18692 .loc 5 1779 0 discriminator 1 18693 .syntax unified 18694 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18695 0076 D9FA12F2 qsub16 r2, r9, r2 18696 @ 0 "" 2 18697 .LVL1982: 18698 .thumb 18699 .syntax unified 18700 .LBE2365: 18701 .LBE2364: 18702 .LBB2366: 18703 .LBB2367: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18704 .loc 6 909 0 discriminator 1 18705 007a D7F80090 ldr r9, [r7] @ unaligned 18706 .LVL1983: 18707 .LBE2367: 18708 .LBE2366: 18709 .LBB2368: 18710 .LBB2369: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18711 .loc 5 1977 0 discriminator 1 18712 .syntax unified 18713 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18714 007e 29FB02F3 smuad r3, r9, r2 18715 @ 0 "" 2 18716 .LVL1984: 18717 .thumb 18718 .syntax unified 18719 .LBE2369: 18720 .LBE2368: 18721 .LBB2370: 18722 .LBB2371: 18723 .loc 5 2051 0 discriminator 1 18724 .syntax unified 18725 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18726 0082 49FB12F2 smusdx r2, r9, r2 18727 @ 0 "" 2 18728 .LVL1985: 18729 .thumb 18730 .syntax unified 18731 .LBE2371: 18732 .LBE2370: ARM GAS /tmp/ccfbYRip.s page 616 18733 .LBB2372: 18734 .LBB2373: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18735 .loc 6 909 0 discriminator 1 18736 0086 D5F80090 ldr r9, [r5] @ unaligned 18737 .LBE2373: 18738 .LBE2372: 18739 .LBB2374: 18740 .LBB2375: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18741 .loc 5 1739 0 discriminator 1 18742 .syntax unified 18743 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18744 008a 99FA20F9 shadd16 r9, r9, r0 18745 @ 0 "" 2 18746 .LVL1986: 18747 .thumb 18748 .syntax unified 18749 .LBE2375: 18750 .LBE2374: 18751 .LBB2376: 18752 .LBB2377: 18753 .syntax unified 18754 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18755 008e 99FA20F9 shadd16 r9, r9, r0 18756 @ 0 "" 2 18757 .LVL1987: 18758 .thumb 18759 .syntax unified 18760 .LBE2377: 18761 .LBE2376: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18762 .loc 4 263 0 discriminator 1 18763 0092 02EA0802 and r2, r2, r8 18764 .LVL1988: 18765 0096 42EA1342 orr r2, r2, r3, lsr #16 18766 .LBB2378: 18767 .LBB2379: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18768 .loc 6 969 0 discriminator 1 18769 009a 45F8042B str r2, [r5], #4 @ unaligned 18770 .LVL1989: 18771 .LBE2379: 18772 .LBE2378: 18773 .LBB2380: 18774 .LBB2381: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18775 .loc 6 909 0 discriminator 1 18776 009e 2368 ldr r3, [r4] @ unaligned 18777 .LVL1990: 18778 .LBE2381: 18779 .LBE2380: 18780 .LBB2382: 18781 .LBB2383: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18782 .loc 5 1739 0 discriminator 1 18783 .syntax unified ARM GAS /tmp/ccfbYRip.s page 617 18784 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18785 00a0 93FA20F3 shadd16 r3, r3, r0 18786 @ 0 "" 2 18787 .LVL1991: 18788 .thumb 18789 .syntax unified 18790 .LBE2383: 18791 .LBE2382: 18792 .LBB2384: 18793 .LBB2385: 18794 .syntax unified 18795 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18796 00a4 93FA20F3 shadd16 r3, r3, r0 18797 @ 0 "" 2 18798 .LVL1992: 18799 .thumb 18800 .syntax unified 18801 .LBE2385: 18802 .LBE2384: 18803 .LBB2386: 18804 .LBB2387: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18805 .loc 5 1779 0 discriminator 1 18806 .syntax unified 18807 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18808 00a8 D9FA13F3 qsub16 r3, r9, r3 18809 @ 0 "" 2 18810 .LVL1993: 18811 .thumb 18812 .syntax unified 18813 .LBE2387: 18814 .LBE2386: 18815 .LBB2388: 18816 .LBB2389: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18817 .loc 5 1827 0 discriminator 1 18818 .syntax unified 18819 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18820 00ac A1FA13F9 qasx r9, r1, r3 18821 @ 0 "" 2 18822 .LVL1994: 18823 .thumb 18824 .syntax unified 18825 .LBE2389: 18826 .LBE2388: 18827 .LBB2390: 18828 .LBB2391: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18829 .loc 5 1875 0 discriminator 1 18830 .syntax unified 18831 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18832 00b0 E1FA13F3 qsax r3, r1, r3 18833 @ 0 "" 2 18834 .LVL1995: 18835 .thumb 18836 .syntax unified 18837 .LBE2391: ARM GAS /tmp/ccfbYRip.s page 618 18838 .LBE2390: 18839 .LBB2392: 18840 .LBB2393: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18841 .loc 6 909 0 discriminator 1 18842 00b4 DCF80020 ldr r2, [ip] @ unaligned 18843 .LVL1996: 18844 .LBE2393: 18845 .LBE2392: 18846 .LBB2394: 18847 .LBB2395: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18848 .loc 5 1977 0 discriminator 1 18849 .syntax unified 18850 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18851 00b8 22FB03F1 smuad r1, r2, r3 18852 @ 0 "" 2 18853 .LVL1997: 18854 .thumb 18855 .syntax unified 18856 .LBE2395: 18857 .LBE2394: 18858 .LBB2396: 18859 .LBB2397: 18860 .loc 5 2051 0 discriminator 1 18861 .syntax unified 18862 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18863 00bc 42FB13F3 smusdx r3, r2, r3 18864 @ 0 "" 2 18865 .LVL1998: 18866 .thumb 18867 .syntax unified 18868 .LBE2397: 18869 .LBE2396: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18870 .loc 4 303 0 discriminator 1 18871 00c0 03EA0803 and r3, r3, r8 18872 .LVL1999: 18873 00c4 43EA1143 orr r3, r3, r1, lsr #16 18874 .LBB2398: 18875 .LBB2399: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18876 .loc 6 969 0 discriminator 1 18877 00c8 46F8043B str r3, [r6], #4 @ unaligned 18878 .LVL2000: 18879 .LBE2399: 18880 .LBE2398: 18881 .LBB2400: 18882 .LBB2401: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18883 .loc 6 909 0 discriminator 1 18884 00cc DEF80030 ldr r3, [lr] @ unaligned 18885 .LVL2001: 18886 .LBE2401: 18887 .LBE2400: 18888 .LBB2402: 18889 .LBB2403: ARM GAS /tmp/ccfbYRip.s page 619 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18890 .loc 5 1977 0 discriminator 1 18891 .syntax unified 18892 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18893 00d0 23FB09F2 smuad r2, r3, r9 18894 @ 0 "" 2 18895 .LVL2002: 18896 .thumb 18897 .syntax unified 18898 .LBE2403: 18899 .LBE2402: 18900 .LBB2404: 18901 .LBB2405: 18902 .loc 5 2051 0 discriminator 1 18903 .syntax unified 18904 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 18905 00d4 43FB19F3 smusdx r3, r3, r9 18906 @ 0 "" 2 18907 .LVL2003: 18908 .thumb 18909 .syntax unified 18910 .LBE2405: 18911 .LBE2404: 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18912 .loc 4 322 0 discriminator 1 18913 00d8 03EA0803 and r3, r3, r8 18914 .LVL2004: 18915 00dc 43EA1243 orr r3, r3, r2, lsr #16 18916 .LBB2406: 18917 .LBB2407: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18918 .loc 6 969 0 discriminator 1 18919 00e0 44F8043B str r3, [r4], #4 @ unaligned 18920 .LVL2005: 18921 00e4 019B ldr r3, [sp, #4] 18922 00e6 1F44 add r7, r7, r3 18923 00e8 009B ldr r3, [sp] 18924 00ea 9C44 add ip, ip, r3 18925 00ec 039B ldr r3, [sp, #12] 18926 .LBE2407: 18927 .LBE2406: 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 18928 .loc 4 327 0 discriminator 1 18929 00ee BAF1010A subs r10, r10, #1 18930 .LVL2006: 18931 00f2 9E44 add lr, lr, r3 18932 00f4 A0D1 bne .L981 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 18933 .loc 4 339 0 18934 00f6 119A ldr r2, [sp, #68] 18935 .LVL2007: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18936 .loc 4 336 0 18937 00f8 009B ldr r3, [sp] 18938 .LVL2008: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 18939 .loc 4 339 0 ARM GAS /tmp/ccfbYRip.s page 620 18940 00fa 042A cmp r2, #4 18941 00fc 40F2B180 bls .L992 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 18942 .loc 4 420 0 18943 0100 DFF864B1 ldr fp, .L994 18944 .LVL2009: 18945 .LBB2408: 18946 .LBB2409: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 18947 .loc 5 1739 0 18948 0104 CDF80CA0 str r10, [sp, #12] 18949 .LBE2409: 18950 .LBE2408: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 18951 .loc 4 339 0 18952 0108 0192 str r2, [sp, #4] 18953 .LVL2010: 18954 .L985: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 18955 .loc 4 343 0 18956 010a 0198 ldr r0, [sp, #4] 18957 010c 03EB4302 add r2, r3, r3, lsl #1 18958 0110 8108 lsrs r1, r0, #2 18959 0112 9200 lsls r2, r2, #2 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 18960 .loc 4 357 0 18961 0114 8C00 lsls r4, r1, #2 18962 .LVL2011: 18963 0116 0D92 str r2, [sp, #52] 18964 0118 9A00 lsls r2, r3, #2 18965 011a DB00 lsls r3, r3, #3 18966 .LVL2012: 18967 011c 0A94 str r4, [sp, #40] 18968 011e 0B93 str r3, [sp, #44] 18969 0120 029C ldr r4, [sp, #8] 18970 0122 0F9B ldr r3, [sp, #60] 18971 0124 0693 str r3, [sp, #24] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18972 .loc 4 394 0 18973 0126 109B ldr r3, [sp, #64] 18974 0128 0593 str r3, [sp, #20] 18975 012a 8C42 cmp r4, r1 18976 012c 28BF it cs 18977 012e 0C46 movcs r4, r1 18978 0130 CDE90733 strd r3, r3, [sp, #28] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 18979 .loc 4 346 0 18980 0134 0023 movs r3, #0 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 18981 .loc 4 343 0 18982 0136 0E91 str r1, [sp, #56] 18983 .LVL2013: 18984 0138 0C94 str r4, [sp, #48] 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 18985 .loc 4 394 0 18986 013a 8700 lsls r7, r0, #2 18987 013c 0992 str r2, [sp, #36] ARM GAS /tmp/ccfbYRip.s page 621 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 18988 .loc 4 346 0 18989 013e 0493 str r3, [sp, #16] 18990 .LVL2014: 18991 .L984: 18992 .LBB2411: 18993 .LBB2412: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 18994 .loc 6 909 0 18995 0140 059A ldr r2, [sp, #20] 18996 0142 0A9B ldr r3, [sp, #40] 18997 0144 D2F800A0 ldr r10, [r2] @ unaligned 18998 .LVL2015: 18999 .LBE2412: 19000 .LBE2411: 19001 .LBB2413: 19002 .LBB2414: 19003 0148 089A ldr r2, [sp, #32] 19004 014a 069E ldr r6, [sp, #24] 19005 014c D2F80090 ldr r9, [r2] @ unaligned 19006 .LVL2016: 19007 .LBE2414: 19008 .LBE2413: 19009 .LBB2415: 19010 .LBB2416: 19011 0150 079A ldr r2, [sp, #28] 19012 .LBE2416: 19013 .LBE2415: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 19014 .loc 4 356 0 19015 0152 DDF810E0 ldr lr, [sp, #16] 19016 .LBB2418: 19017 .LBB2417: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19018 .loc 6 909 0 19019 0156 D2F80080 ldr r8, [r2] @ unaligned 19020 .LVL2017: 19021 015a 9819 adds r0, r3, r6 19022 015c 1D18 adds r5, r3, r0 19023 015e 5C19 adds r4, r3, r5 19024 .LVL2018: 19025 .L983: 19026 .LBE2417: 19027 .LBE2418: 19028 .LBB2419: 19029 .LBB2420: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19030 .loc 6 909 0 is_stmt 0 discriminator 3 19031 0160 3268 ldr r2, [r6] @ unaligned 19032 .LVL2019: 19033 .LBE2420: 19034 .LBE2419: 19035 .LBB2421: 19036 .LBB2422: 19037 0162 2968 ldr r1, [r5] @ unaligned 19038 .LVL2020: 19039 .LBE2422: ARM GAS /tmp/ccfbYRip.s page 622 19040 .LBE2421: 19041 .LBB2423: 19042 .LBB2424: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19043 .loc 5 1731 0 is_stmt 1 discriminator 3 19044 .syntax unified 19045 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19046 0164 92FA11F3 qadd16 r3, r2, r1 19047 @ 0 "" 2 19048 .LVL2021: 19049 .thumb 19050 .syntax unified 19051 .LBE2424: 19052 .LBE2423: 19053 .LBB2425: 19054 .LBB2426: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19055 .loc 5 1779 0 discriminator 3 19056 .syntax unified 19057 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19058 0168 D2FA11F2 qsub16 r2, r2, r1 19059 @ 0 "" 2 19060 .LVL2022: 19061 .thumb 19062 .syntax unified 19063 .LBE2426: 19064 .LBE2425: 19065 .LBB2427: 19066 .LBB2428: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19067 .loc 6 909 0 discriminator 3 19068 016c 0168 ldr r1, [r0] @ unaligned 19069 .LBE2428: 19070 .LBE2427: 19071 .LBB2429: 19072 .LBB2430: 19073 016e D4F800C0 ldr ip, [r4] @ unaligned 19074 .LBE2430: 19075 .LBE2429: 19076 .LBB2431: 19077 .LBB2432: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19078 .loc 5 1731 0 discriminator 3 19079 .syntax unified 19080 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19081 0172 91FA1CF1 qadd16 r1, r1, ip 19082 @ 0 "" 2 19083 .LVL2023: 19084 .thumb 19085 .syntax unified 19086 .LBE2432: 19087 .LBE2431: 19088 .LBB2433: 19089 .LBB2434: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19090 .loc 5 1739 0 discriminator 3 19091 0176 0093 str r3, [sp] ARM GAS /tmp/ccfbYRip.s page 623 19092 .syntax unified 19093 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19094 0178 93FA21FC shadd16 ip, r3, r1 19095 @ 0 "" 2 19096 .LVL2024: 19097 .thumb 19098 .syntax unified 19099 .LBE2434: 19100 .LBE2433: 19101 .LBB2435: 19102 .LBB2410: 19103 017c 039B ldr r3, [sp, #12] 19104 .LVL2025: 19105 .syntax unified 19106 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19107 017e 9CFA23FC shadd16 ip, ip, r3 19108 @ 0 "" 2 19109 .LVL2026: 19110 .thumb 19111 .syntax unified 19112 .LBE2410: 19113 .LBE2435: 19114 .LBB2436: 19115 .LBB2437: 19116 .loc 6 991 0 discriminator 3 19117 0182 C6F800C0 str ip, [r6] @ unaligned 19118 .LVL2027: 19119 .LBE2437: 19120 .LBE2436: 19121 .LBB2438: 19122 .LBB2439: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19123 .loc 5 1787 0 discriminator 3 19124 0186 009B ldr r3, [sp] 19125 .LBE2439: 19126 .LBE2438: 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19127 .loc 4 394 0 discriminator 3 19128 0188 3E44 add r6, r6, r7 19129 .LVL2028: 19130 .LBB2441: 19131 .LBB2440: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19132 .loc 5 1787 0 discriminator 3 19133 .syntax unified 19134 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19135 018a D3FA21F3 shsub16 r3, r3, r1 19136 @ 0 "" 2 19137 .LVL2029: 19138 .thumb 19139 .syntax unified 19140 .LBE2440: 19141 .LBE2441: 19142 .LBB2442: 19143 .LBB2443: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19144 .loc 5 1977 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 624 19145 .syntax unified 19146 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19147 018e 29FB03FC smuad ip, r9, r3 19148 @ 0 "" 2 19149 .LVL2030: 19150 .thumb 19151 .syntax unified 19152 .LBE2443: 19153 .LBE2442: 19154 .LBB2444: 19155 .LBB2445: 19156 .loc 5 2051 0 discriminator 3 19157 .syntax unified 19158 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19159 0192 49FB13F3 smusdx r3, r9, r3 19160 @ 0 "" 2 19161 .LVL2031: 19162 .thumb 19163 .syntax unified 19164 .LBE2445: 19165 .LBE2444: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 19166 .loc 4 420 0 discriminator 3 19167 0196 03EA0B03 and r3, r3, fp 19168 .LVL2032: 19169 019a 43EA1C43 orr r3, r3, ip, lsr #16 19170 .LBB2446: 19171 .LBB2447: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19172 .loc 6 909 0 discriminator 3 19173 019e D0F800C0 ldr ip, [r0] @ unaligned 19174 .LVL2033: 19175 .LBE2447: 19176 .LBE2446: 19177 .LBB2448: 19178 .LBB2449: 19179 .loc 6 991 0 discriminator 3 19180 01a2 0360 str r3, [r0] @ unaligned 19181 .LVL2034: 19182 .LBE2449: 19183 .LBE2448: 19184 .LBB2450: 19185 .LBB2451: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19186 .loc 6 909 0 discriminator 3 19187 01a4 2168 ldr r1, [r4] @ unaligned 19188 .LBE2451: 19189 .LBE2450: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19190 .loc 4 421 0 discriminator 3 19191 01a6 3844 add r0, r0, r7 19192 .LVL2035: 19193 .LBB2452: 19194 .LBB2453: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19195 .loc 5 1779 0 discriminator 3 19196 .syntax unified ARM GAS /tmp/ccfbYRip.s page 625 19197 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19198 01a8 DCFA11F1 qsub16 r1, ip, r1 19199 @ 0 "" 2 19200 .LVL2036: 19201 .thumb 19202 .syntax unified 19203 .LBE2453: 19204 .LBE2452: 19205 .LBB2454: 19206 .LBB2455: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19207 .loc 5 1835 0 discriminator 3 19208 .syntax unified 19209 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19210 01ac A2FA21F3 shasx r3, r2, r1 19211 @ 0 "" 2 19212 .LVL2037: 19213 .thumb 19214 .syntax unified 19215 .LBE2455: 19216 .LBE2454: 19217 .LBB2456: 19218 .LBB2457: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19219 .loc 5 1883 0 discriminator 3 19220 .syntax unified 19221 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19222 01b0 E2FA21F2 shsax r2, r2, r1 19223 @ 0 "" 2 19224 .LVL2038: 19225 .thumb 19226 .syntax unified 19227 .LBE2457: 19228 .LBE2456: 19229 .LBB2458: 19230 .LBB2459: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19231 .loc 5 1977 0 discriminator 3 19232 .syntax unified 19233 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19234 01b4 2AFB02F1 smuad r1, r10, r2 19235 @ 0 "" 2 19236 .LVL2039: 19237 .thumb 19238 .syntax unified 19239 .LBE2459: 19240 .LBE2458: 19241 .LBB2460: 19242 .LBB2461: 19243 .loc 5 2051 0 discriminator 3 19244 .syntax unified 19245 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19246 01b8 4AFB12F2 smusdx r2, r10, r2 19247 @ 0 "" 2 19248 .LVL2040: 19249 .thumb 19250 .syntax unified ARM GAS /tmp/ccfbYRip.s page 626 19251 .LBE2461: 19252 .LBE2460: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 19253 .loc 4 457 0 discriminator 3 19254 01bc 02EA0B02 and r2, r2, fp 19255 .LVL2041: 19256 01c0 42EA1142 orr r2, r2, r1, lsr #16 19257 .LBB2462: 19258 .LBB2463: 19259 .loc 6 991 0 discriminator 3 19260 01c4 2A60 str r2, [r5] @ unaligned 19261 .LVL2042: 19262 .LBE2463: 19263 .LBE2462: 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19264 .loc 4 458 0 discriminator 3 19265 01c6 3D44 add r5, r5, r7 19266 .LVL2043: 19267 .LBB2464: 19268 .LBB2465: 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19269 .loc 5 1977 0 discriminator 3 19270 .syntax unified 19271 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19272 01c8 28FB03F2 smuad r2, r8, r3 19273 @ 0 "" 2 19274 .LVL2044: 19275 .thumb 19276 .syntax unified 19277 .LBE2465: 19278 .LBE2464: 19279 .LBB2466: 19280 .LBB2467: 19281 .loc 5 2051 0 discriminator 3 19282 .syntax unified 19283 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19284 01cc 48FB13F3 smusdx r3, r8, r3 19285 @ 0 "" 2 19286 .LVL2045: 19287 .thumb 19288 .syntax unified 19289 .LBE2467: 19290 .LBE2466: 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 19291 .loc 4 472 0 discriminator 3 19292 01d0 03EA0B03 and r3, r3, fp 19293 .LVL2046: 19294 01d4 43EA1243 orr r3, r3, r2, lsr #16 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19295 .loc 4 362 0 discriminator 3 19296 01d8 019A ldr r2, [sp, #4] 19297 .LVL2047: 19298 .LBB2468: 19299 .LBB2469: 19300 .loc 6 991 0 discriminator 3 19301 01da 2360 str r3, [r4] @ unaligned 19302 .LVL2048: ARM GAS /tmp/ccfbYRip.s page 627 19303 .LBE2469: 19304 .LBE2468: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19305 .loc 4 362 0 discriminator 3 19306 01dc 029B ldr r3, [sp, #8] 19307 01de 9644 add lr, lr, r2 19308 .LVL2049: 19309 01e0 7345 cmp r3, lr 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 19310 .loc 4 473 0 discriminator 3 19311 01e2 3C44 add r4, r4, r7 19312 .LVL2050: 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19313 .loc 4 362 0 discriminator 3 19314 01e4 BCD8 bhi .L983 19315 01e6 059A ldr r2, [sp, #20] 19316 01e8 0999 ldr r1, [sp, #36] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19317 .loc 4 346 0 19318 01ea 049B ldr r3, [sp, #16] 19319 01ec 0A44 add r2, r2, r1 19320 01ee 0592 str r2, [sp, #20] 19321 01f0 0B99 ldr r1, [sp, #44] 19322 01f2 089A ldr r2, [sp, #32] 19323 01f4 0A44 add r2, r2, r1 19324 01f6 0892 str r2, [sp, #32] 19325 01f8 0D99 ldr r1, [sp, #52] 19326 01fa 079A ldr r2, [sp, #28] 19327 01fc 0A44 add r2, r2, r1 19328 01fe 0792 str r2, [sp, #28] 19329 0200 069A ldr r2, [sp, #24] 19330 0202 0432 adds r2, r2, #4 19331 0204 0692 str r2, [sp, #24] 19332 0206 0C9A ldr r2, [sp, #48] 19333 0208 0133 adds r3, r3, #1 19334 020a 9342 cmp r3, r2 19335 020c 0493 str r3, [sp, #16] 19336 .LVL2051: 19337 020e 97D3 bcc .L984 19338 0210 0E9A ldr r2, [sp, #56] 19339 0212 0192 str r2, [sp, #4] 19340 .LVL2052: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19341 .loc 4 339 0 discriminator 2 19342 0214 042A cmp r2, #4 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 19343 .loc 4 477 0 discriminator 2 19344 0216 099B ldr r3, [sp, #36] 19345 .LVL2053: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 19346 .loc 4 339 0 discriminator 2 19347 0218 3FF677AF bhi .L985 19348 021c 119E ldr r6, [sp, #68] 19349 .LVL2054: 19350 021e 0F9B ldr r3, [sp, #60] 19351 .LVL2055: 19352 .L986: ARM GAS /tmp/ccfbYRip.s page 628 19353 .LBB2470: 19354 .LBB2471: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19355 .loc 6 928 0 discriminator 1 19356 0220 1A68 ldr r2, [r3] @ unaligned 19357 .LVL2056: 19358 .LBE2471: 19359 .LBE2470: 19360 .LBB2472: 19361 .LBB2473: 19362 0222 5968 ldr r1, [r3, #4] @ unaligned 19363 .LVL2057: 19364 .LBE2473: 19365 .LBE2472: 19366 .LBB2474: 19367 .LBB2475: 19368 0224 9F68 ldr r7, [r3, #8] @ unaligned 19369 .LVL2058: 19370 .LBE2475: 19371 .LBE2474: 19372 .LBB2476: 19373 .LBB2477: 19374 0226 DC68 ldr r4, [r3, #12] @ unaligned 19375 .LVL2059: 19376 .LBE2477: 19377 .LBE2476: 19378 .LBB2478: 19379 .LBB2479: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19380 .loc 5 1731 0 discriminator 1 19381 .syntax unified 19382 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19383 0228 92FA17F0 qadd16 r0, r2, r7 19384 @ 0 "" 2 19385 .LVL2060: 19386 .thumb 19387 .syntax unified 19388 .LBE2479: 19389 .LBE2478: 19390 .LBB2480: 19391 .LBB2481: 19392 .syntax unified 19393 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19394 022c 91FA14F5 qadd16 r5, r1, r4 19395 @ 0 "" 2 19396 .LVL2061: 19397 .thumb 19398 .syntax unified 19399 .LBE2481: 19400 .LBE2480: 19401 .LBB2482: 19402 .LBB2483: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19403 .loc 5 1739 0 discriminator 1 19404 .syntax unified 19405 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19406 0230 90FA25F5 shadd16 r5, r0, r5 ARM GAS /tmp/ccfbYRip.s page 629 19407 @ 0 "" 2 19408 .LVL2062: 19409 .thumb 19410 .syntax unified 19411 .LBE2483: 19412 .LBE2482: 19413 .LBB2484: 19414 .LBB2485: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19415 .loc 6 969 0 discriminator 1 19416 0234 1D60 str r5, [r3] @ unaligned 19417 .LVL2063: 19418 .LBE2485: 19419 .LBE2484: 19420 .LBB2486: 19421 .LBB2487: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19422 .loc 5 1731 0 discriminator 1 19423 .syntax unified 19424 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19425 0236 91FA14F5 qadd16 r5, r1, r4 19426 @ 0 "" 2 19427 .LVL2064: 19428 .thumb 19429 .syntax unified 19430 .LBE2487: 19431 .LBE2486: 19432 .LBB2488: 19433 .LBB2489: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19434 .loc 5 1787 0 discriminator 1 19435 .syntax unified 19436 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19437 023a D0FA25F0 shsub16 r0, r0, r5 19438 @ 0 "" 2 19439 .LVL2065: 19440 .thumb 19441 .syntax unified 19442 .LBE2489: 19443 .LBE2488: 19444 .LBB2490: 19445 .LBB2491: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19446 .loc 6 969 0 discriminator 1 19447 023e 5860 str r0, [r3, #4] @ unaligned 19448 .LVL2066: 19449 .LBE2491: 19450 .LBE2490: 19451 .LBB2492: 19452 .LBB2493: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19453 .loc 5 1779 0 discriminator 1 19454 .syntax unified 19455 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19456 0240 D2FA17F2 qsub16 r2, r2, r7 19457 @ 0 "" 2 19458 .LVL2067: ARM GAS /tmp/ccfbYRip.s page 630 19459 .thumb 19460 .syntax unified 19461 .LBE2493: 19462 .LBE2492: 19463 .LBB2494: 19464 .LBB2495: 19465 .syntax unified 19466 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19467 0244 D1FA14F1 qsub16 r1, r1, r4 19468 @ 0 "" 2 19469 .LVL2068: 19470 .thumb 19471 .syntax unified 19472 .LBE2495: 19473 .LBE2494: 19474 .LBB2496: 19475 .LBB2497: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19476 .loc 5 1883 0 discriminator 1 19477 .syntax unified 19478 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19479 0248 E2FA21F0 shsax r0, r2, r1 19480 @ 0 "" 2 19481 .LVL2069: 19482 .thumb 19483 .syntax unified 19484 .LBE2497: 19485 .LBE2496: 19486 .LBB2498: 19487 .LBB2499: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19488 .loc 6 969 0 discriminator 1 19489 024c 9860 str r0, [r3, #8] @ unaligned 19490 .LVL2070: 19491 .LBE2499: 19492 .LBE2498: 19493 .LBB2500: 19494 .LBB2501: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19495 .loc 5 1835 0 discriminator 1 19496 .syntax unified 19497 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19498 024e A2FA21F2 shasx r2, r2, r1 19499 @ 0 "" 2 19500 .LVL2071: 19501 .thumb 19502 .syntax unified 19503 .LBE2501: 19504 .LBE2500: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19505 .loc 4 555 0 discriminator 1 19506 0252 013E subs r6, r6, #1 19507 .LVL2072: 19508 .LBB2502: 19509 .LBB2503: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19510 .loc 6 969 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 631 19511 0254 DA60 str r2, [r3, #12] @ unaligned 19512 0256 03F11003 add r3, r3, #16 19513 .LVL2073: 19514 .LBE2503: 19515 .LBE2502: 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19516 .loc 4 555 0 discriminator 1 19517 025a E1D1 bne .L986 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19518 .loc 4 965 0 19519 025c 13B0 add sp, sp, #76 19520 .LCFI238: 19521 .cfi_remember_state 19522 .cfi_def_cfa_offset 36 19523 @ sp needed 19524 025e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 19525 .LVL2074: 19526 .L992: 19527 .LCFI239: 19528 .cfi_restore_state 19529 0262 1646 mov r6, r2 19530 .LVL2075: 19531 0264 0F9B ldr r3, [sp, #60] 19532 0266 DBE7 b .L986 19533 .L995: 19534 .align 2 19535 .L994: 19536 0268 0000FFFF .word -65536 19537 .cfi_endproc 19538 .LFE189: 19540 .section .text.arm_radix4_butterfly_inverse_q15,"ax",%progbits 19541 .align 1 19542 .p2align 2,,3 19543 .global arm_radix4_butterfly_inverse_q15 19544 .syntax unified 19545 .thumb 19546 .thumb_func 19547 .fpu fpv4-sp-d16 19549 arm_radix4_butterfly_inverse_q15: 19550 .LFB190: 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19551 .loc 4 1022 0 19552 .cfi_startproc 19553 @ args = 0, pretend = 0, frame = 72 19554 @ frame_needed = 0, uses_anonymous_args = 0 19555 .LVL2076: 19556 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 19557 .LCFI240: 19558 .cfi_def_cfa_offset 36 19559 .cfi_offset 4, -36 19560 .cfi_offset 5, -32 19561 .cfi_offset 6, -28 19562 .cfi_offset 7, -24 19563 .cfi_offset 8, -20 19564 .cfi_offset 9, -16 19565 .cfi_offset 10, -12 19566 .cfi_offset 11, -8 ARM GAS /tmp/ccfbYRip.s page 632 19567 .cfi_offset 14, -4 19568 0004 93B0 sub sp, sp, #76 19569 .LCFI241: 19570 .cfi_def_cfa_offset 112 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19571 .loc 4 1022 0 19572 0006 1746 mov r7, r2 19573 0008 0291 str r1, [sp, #8] 19574 .LVL2077: 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19575 .loc 4 1047 0 19576 000a 8908 lsrs r1, r1, #2 19577 .LVL2078: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 19578 .loc 4 1056 0 19579 000c 8C00 lsls r4, r1, #2 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19580 .loc 4 1022 0 19581 000e 1092 str r2, [sp, #64] 19582 0010 03EB4302 add r2, r3, r3, lsl #1 19583 .LVL2079: 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 19584 .loc 4 1056 0 19585 0014 0519 adds r5, r0, r4 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19586 .loc 4 1047 0 19587 0016 1191 str r1, [sp, #68] 19588 .LVL2080: 19589 0018 8A46 mov r10, r1 19590 001a 9100 lsls r1, r2, #2 19591 .LVL2081: 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 = pSi2 + 2 * n2; 19592 .loc 4 1057 0 19593 001c 2E19 adds r6, r5, r4 19594 001e 0391 str r1, [sp, #12] 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19595 .loc 4 1129 0 19596 0020 DFF84482 ldr r8, .L1010 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19597 .loc 4 1022 0 19598 0024 0F90 str r0, [sp, #60] 19599 .LVL2082: 19600 0026 D900 lsls r1, r3, #3 19601 0028 9B00 lsls r3, r3, #2 19602 .LVL2083: 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 19603 .loc 4 1055 0 19604 002a 8346 mov fp, r0 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19605 .loc 4 1058 0 19606 002c 3444 add r4, r4, r6 19607 .LVL2084: 19608 002e 0191 str r1, [sp, #4] 19609 0030 0093 str r3, [sp] 19610 0032 BE46 mov lr, r7 19611 0034 BC46 mov ip, r7 19612 .LBB2504: ARM GAS /tmp/ccfbYRip.s page 633 19613 .LBB2505: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19614 .loc 5 1739 0 19615 0036 0020 movs r0, #0 19616 .LVL2085: 19617 .L997: 19618 .LBE2505: 19619 .LBE2504: 19620 .LBB2507: 19621 .LBB2508: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19622 .loc 6 909 0 discriminator 1 19623 0038 DBF80030 ldr r3, [fp] @ unaligned 19624 .LBE2508: 19625 .LBE2507: 19626 .LBB2509: 19627 .LBB2506: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19628 .loc 5 1739 0 discriminator 1 19629 .syntax unified 19630 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19631 003c 93FA20F3 shadd16 r3, r3, r0 19632 @ 0 "" 2 19633 .LVL2086: 19634 .thumb 19635 .syntax unified 19636 .LBE2506: 19637 .LBE2509: 19638 .LBB2510: 19639 .LBB2511: 19640 .syntax unified 19641 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19642 0040 93FA20F3 shadd16 r3, r3, r0 19643 @ 0 "" 2 19644 .LVL2087: 19645 .thumb 19646 .syntax unified 19647 .LBE2511: 19648 .LBE2510: 19649 .LBB2512: 19650 .LBB2513: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19651 .loc 6 909 0 discriminator 1 19652 0044 3168 ldr r1, [r6] @ unaligned 19653 .LBE2513: 19654 .LBE2512: 19655 .LBB2514: 19656 .LBB2515: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19657 .loc 5 1739 0 discriminator 1 19658 .syntax unified 19659 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19660 0046 91FA20F1 shadd16 r1, r1, r0 19661 @ 0 "" 2 19662 .LVL2088: 19663 .thumb 19664 .syntax unified ARM GAS /tmp/ccfbYRip.s page 634 19665 .LBE2515: 19666 .LBE2514: 19667 .LBB2516: 19668 .LBB2517: 19669 .syntax unified 19670 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19671 004a 91FA20F1 shadd16 r1, r1, r0 19672 @ 0 "" 2 19673 .LVL2089: 19674 .thumb 19675 .syntax unified 19676 .LBE2517: 19677 .LBE2516: 19678 .LBB2518: 19679 .LBB2519: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19680 .loc 5 1731 0 discriminator 1 19681 .syntax unified 19682 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19683 004e 93FA11F9 qadd16 r9, r3, r1 19684 @ 0 "" 2 19685 .LVL2090: 19686 .thumb 19687 .syntax unified 19688 .LBE2519: 19689 .LBE2518: 19690 .LBB2520: 19691 .LBB2521: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19692 .loc 5 1779 0 discriminator 1 19693 .syntax unified 19694 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19695 0052 D3FA11F1 qsub16 r1, r3, r1 19696 @ 0 "" 2 19697 .LVL2091: 19698 .thumb 19699 .syntax unified 19700 .LBE2521: 19701 .LBE2520: 19702 .LBB2522: 19703 .LBB2523: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19704 .loc 6 909 0 discriminator 1 19705 0056 2A68 ldr r2, [r5] @ unaligned 19706 .LBE2523: 19707 .LBE2522: 19708 .LBB2524: 19709 .LBB2525: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19710 .loc 5 1739 0 discriminator 1 19711 .syntax unified 19712 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19713 0058 92FA20F2 shadd16 r2, r2, r0 19714 @ 0 "" 2 19715 .LVL2092: 19716 .thumb 19717 .syntax unified ARM GAS /tmp/ccfbYRip.s page 635 19718 .LBE2525: 19719 .LBE2524: 19720 .LBB2526: 19721 .LBB2527: 19722 .syntax unified 19723 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19724 005c 92FA20F3 shadd16 r3, r2, r0 19725 @ 0 "" 2 19726 .LVL2093: 19727 .thumb 19728 .syntax unified 19729 .LBE2527: 19730 .LBE2526: 19731 .LBB2528: 19732 .LBB2529: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19733 .loc 6 909 0 discriminator 1 19734 0060 2268 ldr r2, [r4] @ unaligned 19735 .LBE2529: 19736 .LBE2528: 19737 .LBB2530: 19738 .LBB2531: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19739 .loc 5 1739 0 discriminator 1 19740 .syntax unified 19741 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19742 0062 92FA20F2 shadd16 r2, r2, r0 19743 @ 0 "" 2 19744 .LVL2094: 19745 .thumb 19746 .syntax unified 19747 .LBE2531: 19748 .LBE2530: 19749 .LBB2532: 19750 .LBB2533: 19751 .syntax unified 19752 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19753 0066 92FA20F2 shadd16 r2, r2, r0 19754 @ 0 "" 2 19755 .LVL2095: 19756 .thumb 19757 .syntax unified 19758 .LBE2533: 19759 .LBE2532: 19760 .LBB2534: 19761 .LBB2535: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19762 .loc 5 1731 0 discriminator 1 19763 .syntax unified 19764 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19765 006a 93FA12F2 qadd16 r2, r3, r2 19766 @ 0 "" 2 19767 .LVL2096: 19768 .thumb 19769 .syntax unified 19770 .LBE2535: 19771 .LBE2534: ARM GAS /tmp/ccfbYRip.s page 636 19772 .LBB2536: 19773 .LBB2537: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19774 .loc 5 1739 0 discriminator 1 19775 .syntax unified 19776 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19777 006e 99FA22F3 shadd16 r3, r9, r2 19778 @ 0 "" 2 19779 .LVL2097: 19780 .thumb 19781 .syntax unified 19782 .LBE2537: 19783 .LBE2536: 19784 .LBB2538: 19785 .LBB2539: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19786 .loc 6 969 0 discriminator 1 19787 0072 4BF8043B str r3, [fp], #4 @ unaligned 19788 .LVL2098: 19789 .LBE2539: 19790 .LBE2538: 19791 .LBB2540: 19792 .LBB2541: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19793 .loc 5 1779 0 discriminator 1 19794 .syntax unified 19795 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19796 0076 D9FA12F2 qsub16 r2, r9, r2 19797 @ 0 "" 2 19798 .LVL2099: 19799 .thumb 19800 .syntax unified 19801 .LBE2541: 19802 .LBE2540: 19803 .LBB2542: 19804 .LBB2543: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19805 .loc 6 909 0 discriminator 1 19806 007a D7F80090 ldr r9, [r7] @ unaligned 19807 .LVL2100: 19808 .LBE2543: 19809 .LBE2542: 19810 .LBB2544: 19811 .LBB2545: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19812 .loc 5 2043 0 discriminator 1 19813 .syntax unified 19814 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19815 007e 49FB02F3 smusd r3, r9, r2 19816 @ 0 "" 2 19817 .LVL2101: 19818 .thumb 19819 .syntax unified 19820 .LBE2545: 19821 .LBE2544: 19822 .LBB2546: 19823 .LBB2547: ARM GAS /tmp/ccfbYRip.s page 637 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19824 .loc 5 1985 0 discriminator 1 19825 .syntax unified 19826 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19827 0082 29FB12F2 smuadx r2, r9, r2 19828 @ 0 "" 2 19829 .LVL2102: 19830 .thumb 19831 .syntax unified 19832 .LBE2547: 19833 .LBE2546: 19834 .LBB2548: 19835 .LBB2549: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19836 .loc 6 909 0 discriminator 1 19837 0086 D5F80090 ldr r9, [r5] @ unaligned 19838 .LBE2549: 19839 .LBE2548: 19840 .LBB2550: 19841 .LBB2551: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19842 .loc 5 1739 0 discriminator 1 19843 .syntax unified 19844 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19845 008a 99FA20F9 shadd16 r9, r9, r0 19846 @ 0 "" 2 19847 .LVL2103: 19848 .thumb 19849 .syntax unified 19850 .LBE2551: 19851 .LBE2550: 19852 .LBB2552: 19853 .LBB2553: 19854 .syntax unified 19855 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19856 008e 99FA20F9 shadd16 r9, r9, r0 19857 @ 0 "" 2 19858 .LVL2104: 19859 .thumb 19860 .syntax unified 19861 .LBE2553: 19862 .LBE2552: 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19863 .loc 4 1129 0 discriminator 1 19864 0092 02EA0802 and r2, r2, r8 19865 .LVL2105: 19866 0096 42EA1342 orr r2, r2, r3, lsr #16 19867 .LBB2554: 19868 .LBB2555: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19869 .loc 6 969 0 discriminator 1 19870 009a 45F8042B str r2, [r5], #4 @ unaligned 19871 .LVL2106: 19872 .LBE2555: 19873 .LBE2554: 19874 .LBB2556: 19875 .LBB2557: ARM GAS /tmp/ccfbYRip.s page 638 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19876 .loc 6 909 0 discriminator 1 19877 009e 2368 ldr r3, [r4] @ unaligned 19878 .LVL2107: 19879 .LBE2557: 19880 .LBE2556: 19881 .LBB2558: 19882 .LBB2559: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19883 .loc 5 1739 0 discriminator 1 19884 .syntax unified 19885 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19886 00a0 93FA20F3 shadd16 r3, r3, r0 19887 @ 0 "" 2 19888 .LVL2108: 19889 .thumb 19890 .syntax unified 19891 .LBE2559: 19892 .LBE2558: 19893 .LBB2560: 19894 .LBB2561: 19895 .syntax unified 19896 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19897 00a4 93FA20F3 shadd16 r3, r3, r0 19898 @ 0 "" 2 19899 .LVL2109: 19900 .thumb 19901 .syntax unified 19902 .LBE2561: 19903 .LBE2560: 19904 .LBB2562: 19905 .LBB2563: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19906 .loc 5 1779 0 discriminator 1 19907 .syntax unified 19908 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19909 00a8 D9FA13F3 qsub16 r3, r9, r3 19910 @ 0 "" 2 19911 .LVL2110: 19912 .thumb 19913 .syntax unified 19914 .LBE2563: 19915 .LBE2562: 19916 .LBB2564: 19917 .LBB2565: 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19918 .loc 5 1875 0 discriminator 1 19919 .syntax unified 19920 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19921 00ac E1FA13F9 qsax r9, r1, r3 19922 @ 0 "" 2 19923 .LVL2111: 19924 .thumb 19925 .syntax unified 19926 .LBE2565: 19927 .LBE2564: 19928 .LBB2566: ARM GAS /tmp/ccfbYRip.s page 639 19929 .LBB2567: 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19930 .loc 5 1827 0 discriminator 1 19931 .syntax unified 19932 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19933 00b0 A1FA13F3 qasx r3, r1, r3 19934 @ 0 "" 2 19935 .LVL2112: 19936 .thumb 19937 .syntax unified 19938 .LBE2567: 19939 .LBE2566: 19940 .LBB2568: 19941 .LBB2569: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19942 .loc 6 909 0 discriminator 1 19943 00b4 DCF80020 ldr r2, [ip] @ unaligned 19944 .LVL2113: 19945 .LBE2569: 19946 .LBE2568: 19947 .LBB2570: 19948 .LBB2571: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19949 .loc 5 2043 0 discriminator 1 19950 .syntax unified 19951 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19952 00b8 42FB03F1 smusd r1, r2, r3 19953 @ 0 "" 2 19954 .LVL2114: 19955 .thumb 19956 .syntax unified 19957 .LBE2571: 19958 .LBE2570: 19959 .LBB2572: 19960 .LBB2573: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19961 .loc 5 1985 0 discriminator 1 19962 .syntax unified 19963 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19964 00bc 22FB13F3 smuadx r3, r2, r3 19965 @ 0 "" 2 19966 .LVL2115: 19967 .thumb 19968 .syntax unified 19969 .LBE2573: 19970 .LBE2572: 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 19971 .loc 4 1169 0 discriminator 1 19972 00c0 03EA0803 and r3, r3, r8 19973 .LVL2116: 19974 00c4 43EA1143 orr r3, r3, r1, lsr #16 19975 .LBB2574: 19976 .LBB2575: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19977 .loc 6 969 0 discriminator 1 19978 00c8 46F8043B str r3, [r6], #4 @ unaligned 19979 .LVL2117: ARM GAS /tmp/ccfbYRip.s page 640 19980 .LBE2575: 19981 .LBE2574: 19982 .LBB2576: 19983 .LBB2577: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 19984 .loc 6 909 0 discriminator 1 19985 00cc DEF80030 ldr r3, [lr] @ unaligned 19986 .LVL2118: 19987 .LBE2577: 19988 .LBE2576: 19989 .LBB2578: 19990 .LBB2579: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 19991 .loc 5 2043 0 discriminator 1 19992 .syntax unified 19993 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 19994 00d0 43FB09F2 smusd r2, r3, r9 19995 @ 0 "" 2 19996 .LVL2119: 19997 .thumb 19998 .syntax unified 19999 .LBE2579: 20000 .LBE2578: 20001 .LBB2580: 20002 .LBB2581: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20003 .loc 5 1985 0 discriminator 1 20004 .syntax unified 20005 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20006 00d4 23FB19F3 smuadx r3, r3, r9 20007 @ 0 "" 2 20008 .LVL2120: 20009 .thumb 20010 .syntax unified 20011 .LBE2581: 20012 .LBE2580: 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20013 .loc 4 1188 0 discriminator 1 20014 00d8 03EA0803 and r3, r3, r8 20015 .LVL2121: 20016 00dc 43EA1243 orr r3, r3, r2, lsr #16 20017 .LBB2582: 20018 .LBB2583: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20019 .loc 6 969 0 discriminator 1 20020 00e0 44F8043B str r3, [r4], #4 @ unaligned 20021 .LVL2122: 20022 00e4 019B ldr r3, [sp, #4] 20023 00e6 1F44 add r7, r7, r3 20024 00e8 009B ldr r3, [sp] 20025 00ea 9C44 add ip, ip, r3 20026 00ec 039B ldr r3, [sp, #12] 20027 .LBE2583: 20028 .LBE2582: 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** /* data is in 4.11(q11) format */ 20029 .loc 4 1193 0 discriminator 1 20030 00ee BAF1010A subs r10, r10, #1 ARM GAS /tmp/ccfbYRip.s page 641 20031 .LVL2123: 20032 00f2 9E44 add lr, lr, r3 20033 00f4 A0D1 bne .L997 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20034 .loc 4 1205 0 20035 00f6 119A ldr r2, [sp, #68] 20036 .LVL2124: 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20037 .loc 4 1202 0 20038 00f8 009B ldr r3, [sp] 20039 .LVL2125: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20040 .loc 4 1205 0 20041 00fa 042A cmp r2, #4 20042 00fc 40F2B180 bls .L1008 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 20043 .loc 4 1286 0 20044 0100 DFF864B1 ldr fp, .L1010 20045 .LVL2126: 20046 .LBB2584: 20047 .LBB2585: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20048 .loc 5 1739 0 20049 0104 CDF80CA0 str r10, [sp, #12] 20050 .LBE2585: 20051 .LBE2584: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20052 .loc 4 1205 0 20053 0108 0192 str r2, [sp, #4] 20054 .LVL2127: 20055 .L1001: 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 20056 .loc 4 1209 0 20057 010a 0198 ldr r0, [sp, #4] 20058 010c 03EB4302 add r2, r3, r3, lsl #1 20059 0110 8108 lsrs r1, r0, #2 20060 0112 9200 lsls r2, r2, #2 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 = pSi1 + 2 * n2; 20061 .loc 4 1223 0 20062 0114 8C00 lsls r4, r1, #2 20063 .LVL2128: 20064 0116 0D92 str r2, [sp, #52] 20065 0118 9A00 lsls r2, r3, #2 20066 011a DB00 lsls r3, r3, #3 20067 .LVL2129: 20068 011c 0A94 str r4, [sp, #40] 20069 011e 0B93 str r3, [sp, #44] 20070 0120 029C ldr r4, [sp, #8] 20071 0122 0F9B ldr r3, [sp, #60] 20072 0124 0693 str r3, [sp, #24] 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20073 .loc 4 1260 0 20074 0126 109B ldr r3, [sp, #64] 20075 0128 0593 str r3, [sp, #20] 20076 012a 8C42 cmp r4, r1 20077 012c 28BF it cs 20078 012e 0C46 movcs r4, r1 ARM GAS /tmp/ccfbYRip.s page 642 20079 0130 CDE90733 strd r3, r3, [sp, #28] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20080 .loc 4 1212 0 20081 0134 0023 movs r3, #0 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** ic = 0U; 20082 .loc 4 1209 0 20083 0136 0E91 str r1, [sp, #56] 20084 .LVL2130: 20085 0138 0C94 str r4, [sp, #48] 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20086 .loc 4 1260 0 20087 013a 8700 lsls r7, r0, #2 20088 013c 0992 str r2, [sp, #36] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20089 .loc 4 1212 0 20090 013e 0493 str r3, [sp, #16] 20091 .LVL2131: 20092 .L1000: 20093 .LBB2587: 20094 .LBB2588: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20095 .loc 6 909 0 20096 0140 059A ldr r2, [sp, #20] 20097 0142 0A9B ldr r3, [sp, #40] 20098 0144 D2F800A0 ldr r10, [r2] @ unaligned 20099 .LVL2132: 20100 .LBE2588: 20101 .LBE2587: 20102 .LBB2589: 20103 .LBB2590: 20104 0148 089A ldr r2, [sp, #32] 20105 014a 069E ldr r6, [sp, #24] 20106 014c D2F80090 ldr r9, [r2] @ unaligned 20107 .LVL2133: 20108 .LBE2590: 20109 .LBE2589: 20110 .LBB2591: 20111 .LBB2592: 20112 0150 079A ldr r2, [sp, #28] 20113 .LBE2592: 20114 .LBE2591: 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 = pSi0 + 2 * n2; 20115 .loc 4 1222 0 20116 0152 DDF810E0 ldr lr, [sp, #16] 20117 .LBB2594: 20118 .LBB2593: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20119 .loc 6 909 0 20120 0156 D2F80080 ldr r8, [r2] @ unaligned 20121 .LVL2134: 20122 015a 9819 adds r0, r3, r6 20123 015c 1D18 adds r5, r3, r0 20124 015e 5C19 adds r4, r3, r5 20125 .LVL2135: 20126 .L999: 20127 .LBE2593: 20128 .LBE2594: ARM GAS /tmp/ccfbYRip.s page 643 20129 .LBB2595: 20130 .LBB2596: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20131 .loc 6 909 0 is_stmt 0 discriminator 3 20132 0160 3268 ldr r2, [r6] @ unaligned 20133 .LVL2136: 20134 .LBE2596: 20135 .LBE2595: 20136 .LBB2597: 20137 .LBB2598: 20138 0162 2968 ldr r1, [r5] @ unaligned 20139 .LVL2137: 20140 .LBE2598: 20141 .LBE2597: 20142 .LBB2599: 20143 .LBB2600: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20144 .loc 5 1731 0 is_stmt 1 discriminator 3 20145 .syntax unified 20146 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20147 0164 92FA11F3 qadd16 r3, r2, r1 20148 @ 0 "" 2 20149 .LVL2138: 20150 .thumb 20151 .syntax unified 20152 .LBE2600: 20153 .LBE2599: 20154 .LBB2601: 20155 .LBB2602: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20156 .loc 5 1779 0 discriminator 3 20157 .syntax unified 20158 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20159 0168 D2FA11F2 qsub16 r2, r2, r1 20160 @ 0 "" 2 20161 .LVL2139: 20162 .thumb 20163 .syntax unified 20164 .LBE2602: 20165 .LBE2601: 20166 .LBB2603: 20167 .LBB2604: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20168 .loc 6 909 0 discriminator 3 20169 016c 0168 ldr r1, [r0] @ unaligned 20170 .LBE2604: 20171 .LBE2603: 20172 .LBB2605: 20173 .LBB2606: 20174 016e D4F800C0 ldr ip, [r4] @ unaligned 20175 .LBE2606: 20176 .LBE2605: 20177 .LBB2607: 20178 .LBB2608: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20179 .loc 5 1731 0 discriminator 3 20180 .syntax unified ARM GAS /tmp/ccfbYRip.s page 644 20181 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20182 0172 91FA1CF1 qadd16 r1, r1, ip 20183 @ 0 "" 2 20184 .LVL2140: 20185 .thumb 20186 .syntax unified 20187 .LBE2608: 20188 .LBE2607: 20189 .LBB2609: 20190 .LBB2610: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20191 .loc 5 1739 0 discriminator 3 20192 0176 0093 str r3, [sp] 20193 .syntax unified 20194 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20195 0178 93FA21FC shadd16 ip, r3, r1 20196 @ 0 "" 2 20197 .LVL2141: 20198 .thumb 20199 .syntax unified 20200 .LBE2610: 20201 .LBE2609: 20202 .LBB2611: 20203 .LBB2586: 20204 017c 039B ldr r3, [sp, #12] 20205 .LVL2142: 20206 .syntax unified 20207 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20208 017e 9CFA23FC shadd16 ip, ip, r3 20209 @ 0 "" 2 20210 .LVL2143: 20211 .thumb 20212 .syntax unified 20213 .LBE2586: 20214 .LBE2611: 20215 .LBB2612: 20216 .LBB2613: 20217 .loc 6 991 0 discriminator 3 20218 0182 C6F800C0 str ip, [r6] @ unaligned 20219 .LVL2144: 20220 .LBE2613: 20221 .LBE2612: 20222 .LBB2614: 20223 .LBB2615: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20224 .loc 5 1787 0 discriminator 3 20225 0186 009B ldr r3, [sp] 20226 .LBE2615: 20227 .LBE2614: 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20228 .loc 4 1260 0 discriminator 3 20229 0188 3E44 add r6, r6, r7 20230 .LVL2145: 20231 .LBB2617: 20232 .LBB2616: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20233 .loc 5 1787 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 645 20234 .syntax unified 20235 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20236 018a D3FA21F3 shsub16 r3, r3, r1 20237 @ 0 "" 2 20238 .LVL2146: 20239 .thumb 20240 .syntax unified 20241 .LBE2616: 20242 .LBE2617: 20243 .LBB2618: 20244 .LBB2619: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20245 .loc 5 2043 0 discriminator 3 20246 .syntax unified 20247 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20248 018e 49FB03FC smusd ip, r9, r3 20249 @ 0 "" 2 20250 .LVL2147: 20251 .thumb 20252 .syntax unified 20253 .LBE2619: 20254 .LBE2618: 20255 .LBB2620: 20256 .LBB2621: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20257 .loc 5 1985 0 discriminator 3 20258 .syntax unified 20259 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20260 0192 29FB13F3 smuadx r3, r9, r3 20261 @ 0 "" 2 20262 .LVL2148: 20263 .thumb 20264 .syntax unified 20265 .LBE2621: 20266 .LBE2620: 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi1 += 2 * n1; 20267 .loc 4 1286 0 discriminator 3 20268 0196 03EA0B03 and r3, r3, fp 20269 .LVL2149: 20270 019a 43EA1C43 orr r3, r3, ip, lsr #16 20271 .LBB2622: 20272 .LBB2623: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20273 .loc 6 909 0 discriminator 3 20274 019e D0F800C0 ldr ip, [r0] @ unaligned 20275 .LVL2150: 20276 .LBE2623: 20277 .LBE2622: 20278 .LBB2624: 20279 .LBB2625: 20280 .loc 6 991 0 discriminator 3 20281 01a2 0360 str r3, [r0] @ unaligned 20282 .LVL2151: 20283 .LBE2625: 20284 .LBE2624: 20285 .LBB2626: 20286 .LBB2627: ARM GAS /tmp/ccfbYRip.s page 646 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20287 .loc 6 909 0 discriminator 3 20288 01a4 2168 ldr r1, [r4] @ unaligned 20289 .LBE2627: 20290 .LBE2626: 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20291 .loc 4 1287 0 discriminator 3 20292 01a6 3844 add r0, r0, r7 20293 .LVL2152: 20294 .LBB2628: 20295 .LBB2629: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20296 .loc 5 1779 0 discriminator 3 20297 .syntax unified 20298 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20299 01a8 DCFA11F1 qsub16 r1, ip, r1 20300 @ 0 "" 2 20301 .LVL2153: 20302 .thumb 20303 .syntax unified 20304 .LBE2629: 20305 .LBE2628: 20306 .LBB2630: 20307 .LBB2631: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20308 .loc 5 1883 0 discriminator 3 20309 .syntax unified 20310 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20311 01ac E2FA21F3 shsax r3, r2, r1 20312 @ 0 "" 2 20313 .LVL2154: 20314 .thumb 20315 .syntax unified 20316 .LBE2631: 20317 .LBE2630: 20318 .LBB2632: 20319 .LBB2633: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20320 .loc 5 1835 0 discriminator 3 20321 .syntax unified 20322 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20323 01b0 A2FA21F2 shasx r2, r2, r1 20324 @ 0 "" 2 20325 .LVL2155: 20326 .thumb 20327 .syntax unified 20328 .LBE2633: 20329 .LBE2632: 20330 .LBB2634: 20331 .LBB2635: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20332 .loc 5 2043 0 discriminator 3 20333 .syntax unified 20334 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20335 01b4 4AFB02F1 smusd r1, r10, r2 20336 @ 0 "" 2 20337 .LVL2156: ARM GAS /tmp/ccfbYRip.s page 647 20338 .thumb 20339 .syntax unified 20340 .LBE2635: 20341 .LBE2634: 20342 .LBB2636: 20343 .LBB2637: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20344 .loc 5 1985 0 discriminator 3 20345 .syntax unified 20346 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20347 01b8 2AFB12F2 smuadx r2, r10, r2 20348 @ 0 "" 2 20349 .LVL2157: 20350 .thumb 20351 .syntax unified 20352 .LBE2637: 20353 .LBE2636: 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi2 += 2 * n1; 20354 .loc 4 1321 0 discriminator 3 20355 01bc 02EA0B02 and r2, r2, fp 20356 .LVL2158: 20357 01c0 42EA1142 orr r2, r2, r1, lsr #16 20358 .LBB2638: 20359 .LBB2639: 20360 .loc 6 991 0 discriminator 3 20361 01c4 2A60 str r2, [r5] @ unaligned 20362 .LVL2159: 20363 .LBE2639: 20364 .LBE2638: 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20365 .loc 4 1322 0 discriminator 3 20366 01c6 3D44 add r5, r5, r7 20367 .LVL2160: 20368 .LBB2640: 20369 .LBB2641: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20370 .loc 5 2043 0 discriminator 3 20371 .syntax unified 20372 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20373 01c8 48FB03F2 smusd r2, r8, r3 20374 @ 0 "" 2 20375 .LVL2161: 20376 .thumb 20377 .syntax unified 20378 .LBE2641: 20379 .LBE2640: 20380 .LBB2642: 20381 .LBB2643: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20382 .loc 5 1985 0 discriminator 3 20383 .syntax unified 20384 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20385 01cc 28FB13F3 smuadx r3, r8, r3 20386 @ 0 "" 2 20387 .LVL2162: 20388 .thumb 20389 .syntax unified ARM GAS /tmp/ccfbYRip.s page 648 20390 .LBE2643: 20391 .LBE2642: 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** pSi3 += 2 * n1; 20392 .loc 4 1336 0 discriminator 3 20393 01d0 03EA0B03 and r3, r3, fp 20394 .LVL2163: 20395 01d4 43EA1243 orr r3, r3, r2, lsr #16 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20396 .loc 4 1228 0 discriminator 3 20397 01d8 019A ldr r2, [sp, #4] 20398 .LVL2164: 20399 .LBB2644: 20400 .LBB2645: 20401 .loc 6 991 0 discriminator 3 20402 01da 2360 str r3, [r4] @ unaligned 20403 .LVL2165: 20404 .LBE2645: 20405 .LBE2644: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20406 .loc 4 1228 0 discriminator 3 20407 01dc 029B ldr r3, [sp, #8] 20408 01de 9644 add lr, lr, r2 20409 .LVL2166: 20410 01e0 7345 cmp r3, lr 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20411 .loc 4 1337 0 discriminator 3 20412 01e2 3C44 add r4, r4, r7 20413 .LVL2167: 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20414 .loc 4 1228 0 discriminator 3 20415 01e4 BCD8 bhi .L999 20416 01e6 059A ldr r2, [sp, #20] 20417 01e8 0999 ldr r1, [sp, #36] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20418 .loc 4 1212 0 20419 01ea 049B ldr r3, [sp, #16] 20420 01ec 0A44 add r2, r2, r1 20421 01ee 0592 str r2, [sp, #20] 20422 01f0 0B99 ldr r1, [sp, #44] 20423 01f2 089A ldr r2, [sp, #32] 20424 01f4 0A44 add r2, r2, r1 20425 01f6 0892 str r2, [sp, #32] 20426 01f8 0D99 ldr r1, [sp, #52] 20427 01fa 079A ldr r2, [sp, #28] 20428 01fc 0A44 add r2, r2, r1 20429 01fe 0792 str r2, [sp, #28] 20430 0200 069A ldr r2, [sp, #24] 20431 0202 0432 adds r2, r2, #4 20432 0204 0692 str r2, [sp, #24] 20433 0206 0C9A ldr r2, [sp, #48] 20434 0208 0133 adds r3, r3, #1 20435 020a 9342 cmp r3, r2 20436 020c 0493 str r3, [sp, #16] 20437 .LVL2168: 20438 020e 97D3 bcc .L1000 20439 0210 0E9A ldr r2, [sp, #56] 20440 0212 0192 str r2, [sp, #4] ARM GAS /tmp/ccfbYRip.s page 649 20441 .LVL2169: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20442 .loc 4 1205 0 discriminator 2 20443 0214 042A cmp r2, #4 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20444 .loc 4 1341 0 discriminator 2 20445 0216 099B ldr r3, [sp, #36] 20446 .LVL2170: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20447 .loc 4 1205 0 discriminator 2 20448 0218 3FF677AF bhi .L1001 20449 021c 119E ldr r6, [sp, #68] 20450 .LVL2171: 20451 021e 0F9B ldr r3, [sp, #60] 20452 .LVL2172: 20453 .L1002: 20454 .LBB2646: 20455 .LBB2647: 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20456 .loc 6 928 0 discriminator 1 20457 0220 1A68 ldr r2, [r3] @ unaligned 20458 .LVL2173: 20459 .LBE2647: 20460 .LBE2646: 20461 .LBB2648: 20462 .LBB2649: 20463 0222 5968 ldr r1, [r3, #4] @ unaligned 20464 .LVL2174: 20465 .LBE2649: 20466 .LBE2648: 20467 .LBB2650: 20468 .LBB2651: 20469 0224 9F68 ldr r7, [r3, #8] @ unaligned 20470 .LVL2175: 20471 .LBE2651: 20472 .LBE2650: 20473 .LBB2652: 20474 .LBB2653: 20475 0226 DC68 ldr r4, [r3, #12] @ unaligned 20476 .LVL2176: 20477 .LBE2653: 20478 .LBE2652: 20479 .LBB2654: 20480 .LBB2655: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20481 .loc 5 1731 0 discriminator 1 20482 .syntax unified 20483 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20484 0228 92FA17F0 qadd16 r0, r2, r7 20485 @ 0 "" 2 20486 .LVL2177: 20487 .thumb 20488 .syntax unified 20489 .LBE2655: 20490 .LBE2654: 20491 .LBB2656: 20492 .LBB2657: ARM GAS /tmp/ccfbYRip.s page 650 20493 .syntax unified 20494 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20495 022c 91FA14F5 qadd16 r5, r1, r4 20496 @ 0 "" 2 20497 .LVL2178: 20498 .thumb 20499 .syntax unified 20500 .LBE2657: 20501 .LBE2656: 20502 .LBB2658: 20503 .LBB2659: 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20504 .loc 5 1739 0 discriminator 1 20505 .syntax unified 20506 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20507 0230 90FA25F5 shadd16 r5, r0, r5 20508 @ 0 "" 2 20509 .LVL2179: 20510 .thumb 20511 .syntax unified 20512 .LBE2659: 20513 .LBE2658: 20514 .LBB2660: 20515 .LBB2661: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20516 .loc 6 969 0 discriminator 1 20517 0234 1D60 str r5, [r3] @ unaligned 20518 .LVL2180: 20519 .LBE2661: 20520 .LBE2660: 20521 .LBB2662: 20522 .LBB2663: 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20523 .loc 5 1731 0 discriminator 1 20524 .syntax unified 20525 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20526 0236 91FA14F5 qadd16 r5, r1, r4 20527 @ 0 "" 2 20528 .LVL2181: 20529 .thumb 20530 .syntax unified 20531 .LBE2663: 20532 .LBE2662: 20533 .LBB2664: 20534 .LBB2665: 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20535 .loc 5 1787 0 discriminator 1 20536 .syntax unified 20537 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20538 023a D0FA25F0 shsub16 r0, r0, r5 20539 @ 0 "" 2 20540 .LVL2182: 20541 .thumb 20542 .syntax unified 20543 .LBE2665: 20544 .LBE2664: 20545 .LBB2666: ARM GAS /tmp/ccfbYRip.s page 651 20546 .LBB2667: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20547 .loc 6 969 0 discriminator 1 20548 023e 5860 str r0, [r3, #4] @ unaligned 20549 .LVL2183: 20550 .LBE2667: 20551 .LBE2666: 20552 .LBB2668: 20553 .LBB2669: 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20554 .loc 5 1779 0 discriminator 1 20555 .syntax unified 20556 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20557 0240 D2FA17F2 qsub16 r2, r2, r7 20558 @ 0 "" 2 20559 .LVL2184: 20560 .thumb 20561 .syntax unified 20562 .LBE2669: 20563 .LBE2668: 20564 .LBB2670: 20565 .LBB2671: 20566 .syntax unified 20567 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20568 0244 D1FA14F1 qsub16 r1, r1, r4 20569 @ 0 "" 2 20570 .LVL2185: 20571 .thumb 20572 .syntax unified 20573 .LBE2671: 20574 .LBE2670: 20575 .LBB2672: 20576 .LBB2673: 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20577 .loc 5 1835 0 discriminator 1 20578 .syntax unified 20579 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20580 0248 A2FA21F0 shasx r0, r2, r1 20581 @ 0 "" 2 20582 .LVL2186: 20583 .thumb 20584 .syntax unified 20585 .LBE2673: 20586 .LBE2672: 20587 .LBB2674: 20588 .LBB2675: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20589 .loc 6 969 0 discriminator 1 20590 024c 9860 str r0, [r3, #8] @ unaligned 20591 .LVL2187: 20592 .LBE2675: 20593 .LBE2674: 20594 .LBB2676: 20595 .LBB2677: 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 20596 .loc 5 1883 0 discriminator 1 20597 .syntax unified ARM GAS /tmp/ccfbYRip.s page 652 20598 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 20599 024e E2FA21F2 shsax r2, r2, r1 20600 @ 0 "" 2 20601 .LVL2188: 20602 .thumb 20603 .syntax unified 20604 .LBE2677: 20605 .LBE2676: 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20606 .loc 4 1418 0 discriminator 1 20607 0252 013E subs r6, r6, #1 20608 .LVL2189: 20609 .LBB2678: 20610 .LBB2679: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 20611 .loc 6 969 0 discriminator 1 20612 0254 DA60 str r2, [r3, #12] @ unaligned 20613 0256 03F11003 add r3, r3, #16 20614 .LVL2190: 20615 .LBE2679: 20616 .LBE2678: 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20617 .loc 4 1418 0 discriminator 1 20618 025a E1D1 bne .L1002 20619 .loc 4 1809 0 20620 025c 13B0 add sp, sp, #76 20621 .LCFI242: 20622 .cfi_remember_state 20623 .cfi_def_cfa_offset 36 20624 @ sp needed 20625 025e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 20626 .LVL2191: 20627 .L1008: 20628 .LCFI243: 20629 .cfi_restore_state 20630 0262 1646 mov r6, r2 20631 .LVL2192: 20632 0264 0F9B ldr r3, [sp, #60] 20633 0266 DBE7 b .L1002 20634 .L1011: 20635 .align 2 20636 .L1010: 20637 0268 0000FFFF .word -65536 20638 .cfi_endproc 20639 .LFE190: 20641 .section .text.arm_cfft_radix4_q15,"ax",%progbits 20642 .align 1 20643 .p2align 2,,3 20644 .global arm_cfft_radix4_q15 20645 .syntax unified 20646 .thumb 20647 .thumb_func 20648 .fpu fpv4-sp-d16 20650 arm_cfft_radix4_q15: 20651 .LFB188: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** if (S->ifftFlag == 1U) 20652 .loc 4 80 0 ARM GAS /tmp/ccfbYRip.s page 653 20653 .cfi_startproc 20654 @ args = 0, pretend = 0, frame = 0 20655 @ frame_needed = 0, uses_anonymous_args = 0 20656 .LVL2193: 20657 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 20658 .LCFI244: 20659 .cfi_def_cfa_offset 40 20660 .cfi_offset 3, -40 20661 .cfi_offset 4, -36 20662 .cfi_offset 5, -32 20663 .cfi_offset 6, -28 20664 .cfi_offset 7, -24 20665 .cfi_offset 8, -20 20666 .cfi_offset 9, -16 20667 .cfi_offset 10, -12 20668 .cfi_offset 11, -8 20669 .cfi_offset 14, -4 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** if (S->ifftFlag == 1U) 20670 .loc 4 80 0 20671 0004 0446 mov r4, r0 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20672 .loc 4 81 0 20673 0006 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 20674 .LVL2194: 20675 0008 6268 ldr r2, [r4, #4] 20676 000a A389 ldrh r3, [r4, #12] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** if (S->ifftFlag == 1U) 20677 .loc 4 80 0 20678 000c 0D46 mov r5, r1 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20679 .loc 4 81 0 20680 000e 0128 cmp r0, #1 20681 0010 2188 ldrh r1, [r4] 20682 .LVL2195: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20683 .loc 4 84 0 20684 0012 2846 mov r0, r5 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20685 .loc 4 81 0 20686 0014 06D0 beq .L1021 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20687 .loc 4 89 0 20688 0016 FFF7FEFF bl arm_radix4_butterfly_q15 20689 .LVL2196: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20690 .loc 4 92 0 20691 001a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 20692 001c 012B cmp r3, #1 20693 001e 06D0 beq .L1022 20694 .L1012: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20695 .loc 4 98 0 20696 0020 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 20697 .LVL2197: 20698 .L1021: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20699 .loc 4 84 0 ARM GAS /tmp/ccfbYRip.s page 654 20700 0024 FFF7FEFF bl arm_radix4_butterfly_inverse_q15 20701 .LVL2198: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** { 20702 .loc 4 92 0 20703 0028 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 20704 002a 012B cmp r3, #1 20705 002c F8D1 bne .L1012 20706 .L1022: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20707 .loc 4 95 0 20708 002e 2388 ldrh r3, [r4] 20709 .LBB2682: 20710 .LBB2683: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 20711 .loc 7 227 0 20712 0030 E789 ldrh r7, [r4, #14] 20713 .LBE2683: 20714 .LBE2682: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** } 20715 .loc 4 95 0 20716 0032 A068 ldr r0, [r4, #8] 20717 .LVL2199: 20718 .LBB2685: 20719 .LBB2684: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20720 .loc 7 200 0 20721 0034 0021 movs r1, #0 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2p1 = (fftLen / 2U) + 1U; 20722 .loc 7 196 0 20723 0036 5C08 lsrs r4, r3, #1 20724 .LVL2200: 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 20725 .loc 7 197 0 20726 0038 04F10108 add r8, r4, #1 20727 .LVL2201: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20728 .loc 7 200 0 20729 003c A4F1020E sub lr, r4, #2 20730 0040 4FEA840C lsl ip, r4, #2 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 20731 .loc 7 227 0 20732 0044 4FEA470B lsl fp, r7, #1 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** fftLenBy2 = fftLen / 2U; 20733 .loc 7 195 0 20734 0048 0B46 mov r3, r1 20735 004a 2A46 mov r2, r5 20736 004c 10E0 b .L1016 20737 .LVL2202: 20738 .L1018: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20739 .loc 7 202 0 20740 004e 8B42 cmp r3, r1 20741 0050 0DD9 bls .L1017 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i] = pSrc[j]; 20742 .loc 7 206 0 20743 0052 9668 ldr r6, [r2, #8] 20744 .LVL2203: ARM GAS /tmp/ccfbYRip.s page 655 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j] = in; 20745 .loc 7 207 0 20746 0054 55F82370 ldr r7, [r5, r3, lsl #2] 20747 0058 9760 str r7, [r2, #8] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 20748 .loc 7 208 0 20749 005a 45F82360 str r6, [r5, r3, lsl #2] 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; 20750 .loc 7 212 0 20751 005e D9F80C60 ldr r6, [r9, #12] 20752 .LVL2204: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 20753 .loc 7 213 0 20754 0062 55F82A70 ldr r7, [r5, r10, lsl #2] 20755 0066 C9F80C70 str r7, [r9, #12] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 20756 .loc 7 214 0 20757 006a 45F82A60 str r6, [r5, r10, lsl #2] 20758 .L1017: 20759 006e 0832 adds r2, r2, #8 20760 .LVL2205: 20761 .L1016: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 20762 .loc 7 220 0 20763 0070 2344 add r3, r3, r4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[i + 1U] = pSrc[j + fftLenBy2]; 20764 .loc 7 219 0 20765 0072 5668 ldr r6, [r2, #4] 20766 .LVL2206: 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2] = in; 20767 .loc 7 220 0 20768 0074 55F82370 ldr r7, [r5, r3, lsl #2] 20769 0078 5760 str r7, [r2, #4] 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20770 .loc 7 200 0 20771 007a 0231 adds r1, r1, #2 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 20772 .loc 7 221 0 20773 007c 45F82360 str r6, [r5, r3, lsl #2] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** 20774 .loc 7 224 0 20775 0080 0388 ldrh r3, [r0] 20776 .LVL2207: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20777 .loc 7 200 0 20778 0082 7145 cmp r1, lr 20779 0084 02EB0C09 add r9, r2, ip 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** pSrc[j + fftLenBy2p1] = in; 20780 .loc 7 213 0 20781 0088 08EB030A add r10, r8, r3 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** } 20782 .loc 7 227 0 20783 008c 5844 add r0, r0, fp 20784 .LVL2208: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c **** { 20785 .loc 7 200 0 20786 008e DED9 bls .L1018 ARM GAS /tmp/ccfbYRip.s page 656 20787 .LBE2684: 20788 .LBE2685: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c **** 20789 .loc 4 98 0 20790 0090 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 20791 .cfi_endproc 20792 .LFE188: 20794 .section .text.arm_radix4_butterfly_q31,"ax",%progbits 20795 .align 1 20796 .p2align 2,,3 20797 .global arm_radix4_butterfly_q31 20798 .syntax unified 20799 .thumb 20800 .thumb_func 20801 .fpu fpv4-sp-d16 20803 arm_radix4_butterfly_q31: 20804 .LFB192: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 20805 .loc 12 150 0 20806 .cfi_startproc 20807 @ args = 0, pretend = 0, frame = 120 20808 @ frame_needed = 0, uses_anonymous_args = 0 20809 .LVL2209: 20810 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 20811 .LCFI245: 20812 .cfi_def_cfa_offset 36 20813 .cfi_offset 4, -36 20814 .cfi_offset 5, -32 20815 .cfi_offset 6, -28 20816 .cfi_offset 7, -24 20817 .cfi_offset 8, -20 20818 .cfi_offset 9, -16 20819 .cfi_offset 10, -12 20820 .cfi_offset 11, -8 20821 .cfi_offset 14, -4 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 20822 .loc 12 172 0 20823 0004 8C08 lsrs r4, r1, #2 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 20824 .loc 12 150 0 20825 0006 9FB0 sub sp, sp, #124 20826 .LCFI246: 20827 .cfi_def_cfa_offset 160 20828 0008 4FEAC40C lsl ip, r4, #3 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 20829 .loc 12 150 0 20830 000c 9046 mov r8, r2 20831 000e 2701 lsls r7, r4, #4 20832 0010 0C91 str r1, [sp, #48] 20833 .LVL2210: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 20834 .loc 12 172 0 20835 0012 1B94 str r4, [sp, #108] 20836 .LVL2211: 20837 0014 0CF10401 add r1, ip, #4 20838 .LVL2212: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; ARM GAS /tmp/ccfbYRip.s page 657 20839 .loc 12 150 0 20840 0018 0D93 str r3, [sp, #52] 20841 001a 1D92 str r2, [sp, #116] 20842 001c C4EB4472 rsb r2, r4, r4, lsl #29 20843 .LVL2213: 20844 0020 1C46 mov r4, r3 20845 .LVL2214: 20846 0022 03EB4303 add r3, r3, r3, lsl #1 20847 .LVL2215: 20848 0026 DB00 lsls r3, r3, #3 20849 0028 00EB010A add r10, r0, r1 20850 002c 0146 mov r1, r0 20851 002e 3944 add r1, r1, r7 20852 0030 0A93 str r3, [sp, #40] 20853 0032 2301 lsls r3, r4, #4 20854 0034 0791 str r1, [sp, #28] 20855 0036 0993 str r3, [sp, #36] 20856 0038 D100 lsls r1, r2, #3 20857 003a E300 lsls r3, r4, #3 20858 003c 0F90 str r0, [sp, #60] 20859 003e 8444 add ip, ip, r0 20860 0040 0B91 str r1, [sp, #44] 20861 0042 0893 str r3, [sp, #32] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 20862 .loc 12 172 0 20863 0044 C346 mov fp, r8 20864 0046 C646 mov lr, r8 20865 0048 B946 mov r9, r7 20866 004a CDF80080 str r8, [sp] 20867 .LVL2216: 20868 .L1024: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 20869 .loc 12 191 0 discriminator 1 20870 004e 0B9F ldr r7, [sp, #44] 20871 0050 1B9D ldr r5, [sp, #108] 20872 0052 5CF80700 ldr r0, [ip, r7] 20873 0056 5CF83530 ldr r3, [ip, r5, lsl #3] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20874 .loc 12 196 0 discriminator 1 20875 005a 5CF80910 ldr r1, [ip, r9] 20876 005e 5AF8044C ldr r4, [r10, #-4] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 20877 .loc 12 199 0 discriminator 1 20878 0062 5AF83520 ldr r2, [r10, r5, lsl #3] 20879 0066 5AF80760 ldr r6, [r10, r7] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 20880 .loc 12 191 0 discriminator 1 20881 006a 4FEA2318 asr r8, r3, #4 20882 006e 0011 asrs r0, r0, #4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20883 .loc 12 196 0 discriminator 1 20884 0070 0D11 asrs r5, r1, #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 20885 .loc 12 191 0 discriminator 1 20886 0072 0190 str r0, [sp, #4] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20887 .loc 12 196 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 658 20888 0074 05EB2415 add r5, r5, r4, asr #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 20889 .loc 12 191 0 discriminator 1 20890 0078 4044 add r0, r0, r8 20891 .LVL2217: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 20892 .loc 12 204 0 discriminator 1 20893 007a 4119 adds r1, r0, r5 20894 007c 4CF80710 str r1, [ip, r7] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20895 .loc 12 208 0 discriminator 1 20896 0080 5AF80910 ldr r1, [r10, r9] 20897 0084 DCF80440 ldr r4, [ip, #4] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 20898 .loc 12 204 0 discriminator 1 20899 0088 3B46 mov r3, r7 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 20900 .loc 12 199 0 discriminator 1 20901 008a 1211 asrs r2, r2, #4 20902 008c 3711 asrs r7, r6, #4 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20903 .loc 12 208 0 discriminator 1 20904 008e 0911 asrs r1, r1, #4 20905 0090 01EB2416 add r6, r1, r4, asr #4 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 20906 .loc 12 199 0 discriminator 1 20907 0094 0697 str r7, [sp, #24] 20908 0096 1744 add r7, r7, r2 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20909 .loc 12 211 0 discriminator 1 20910 0098 B919 adds r1, r7, r6 20911 009a 4AF80310 str r1, [r10, r3] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20912 .loc 12 224 0 discriminator 1 20913 009e DBE90031 ldrd r3, r1, [fp] 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 20914 .loc 12 206 0 discriminator 1 20915 00a2 401B subs r0, r0, r5 20916 .LVL2218: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20917 .loc 12 214 0 discriminator 1 20918 00a4 BD1B subs r5, r7, r6 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 20919 .loc 12 227 0 discriminator 1 20920 00a6 0293 str r3, [sp, #8] 20921 00a8 80FB0367 smull r6, r7, r0, r3 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20922 .loc 12 228 0 discriminator 1 20923 00ac 85FB0134 smull r3, r4, r5, r1 20924 00b0 CDE90434 strd r3, [sp, #16] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 20925 .loc 12 231 0 discriminator 1 20926 00b4 029B ldr r3, [sp, #8] 20927 00b6 83FB0545 smull r4, r5, r3, r5 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 20928 .loc 12 227 0 discriminator 1 20929 00ba 059B ldr r3, [sp, #20] ARM GAS /tmp/ccfbYRip.s page 659 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20930 .loc 12 232 0 discriminator 1 20931 00bc 80FB0101 smull r0, r1, r0, r1 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 20932 .loc 12 231 0 discriminator 1 20933 00c0 6E1A subs r6, r5, r1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 20934 .loc 12 227 0 discriminator 1 20935 00c2 1F44 add r7, r7, r3 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20936 .loc 12 219 0 discriminator 1 20937 00c4 5CF80910 ldr r1, [ip, r9] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 20938 .loc 12 217 0 discriminator 1 20939 00c8 5AF80930 ldr r3, [r10, r9] 20940 00cc DCF80450 ldr r5, [ip, #4] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20941 .loc 12 219 0 discriminator 1 20942 00d0 5AF8040C ldr r0, [r10, #-4] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20943 .loc 12 228 0 discriminator 1 20944 00d4 7F00 lsls r7, r7, #1 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20945 .loc 12 232 0 discriminator 1 20946 00d6 7600 lsls r6, r6, #1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 20947 .loc 12 227 0 discriminator 1 20948 00d8 4AF8047C str r7, [r10, #-4] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 20949 .loc 12 231 0 discriminator 1 20950 00dc CCF80460 str r6, [ip, #4] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20951 .loc 12 193 0 discriminator 1 20952 00e0 019E ldr r6, [sp, #4] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20953 .loc 12 201 0 discriminator 1 20954 00e2 069F ldr r7, [sp, #24] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 20955 .loc 12 217 0 discriminator 1 20956 00e4 1C11 asrs r4, r3, #4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20957 .loc 12 219 0 discriminator 1 20958 00e6 0911 asrs r1, r1, #4 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20959 .loc 12 193 0 discriminator 1 20960 00e8 A6EB0803 sub r3, r6, r8 20961 .LVL2219: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 20962 .loc 12 217 0 discriminator 1 20963 00ec C4EB2514 rsb r4, r4, r5, asr #4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20964 .loc 12 219 0 discriminator 1 20965 00f0 C1EB2016 rsb r6, r1, r0, asr #4 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20966 .loc 12 245 0 discriminator 1 20967 00f4 DEE90051 ldrd r5, r1, [lr] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ ARM GAS /tmp/ccfbYRip.s page 660 20968 .loc 12 235 0 discriminator 1 20969 00f8 1819 adds r0, r3, r4 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20970 .loc 12 201 0 discriminator 1 20971 00fa BA1A subs r2, r7, r2 20972 .LVL2220: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 20973 .loc 12 235 0 discriminator 1 20974 00fc 0194 str r4, [sp, #4] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 20975 .loc 12 240 0 discriminator 1 20976 00fe 0696 str r6, [sp, #24] 20977 0100 941B subs r4, r2, r6 20978 .LVL2221: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 20979 .loc 12 248 0 discriminator 1 20980 0102 80FB0567 smull r6, r7, r0, r5 20981 .LVL2222: 20982 0106 CDE90267 strd r6, [sp, #8] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20983 .loc 12 249 0 discriminator 1 20984 010a 84FB0178 smull r7, r8, r4, r1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20985 .loc 12 253 0 discriminator 1 20986 010e 80FB0101 smull r0, r1, r0, r1 20987 .LVL2223: 20988 0112 CDE90401 strd r0, [sp, #16] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 20989 .loc 12 248 0 discriminator 1 20990 0116 0399 ldr r1, [sp, #12] 20991 0118 4046 mov r0, r8 20992 011a 0844 add r0, r0, r1 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 20993 .loc 12 252 0 discriminator 1 20994 011c 0599 ldr r1, [sp, #20] 20995 011e 85FB0445 smull r4, r5, r5, r4 20996 0122 691A subs r1, r5, r1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 20997 .loc 12 248 0 discriminator 1 20998 0124 1B9D ldr r5, [sp, #108] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 20999 .loc 12 237 0 discriminator 1 21000 0126 019C ldr r4, [sp, #4] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21001 .loc 12 249 0 discriminator 1 21002 0128 4000 lsls r0, r0, #1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21003 .loc 12 253 0 discriminator 1 21004 012a 4900 lsls r1, r1, #1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21005 .loc 12 248 0 discriminator 1 21006 012c 4CF83500 str r0, [ip, r5, lsl #3] 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 21007 .loc 12 252 0 discriminator 1 21008 0130 4AF83510 str r1, [r10, r5, lsl #3] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21009 .loc 12 257 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 661 21010 0134 0099 ldr r1, [sp] 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21011 .loc 12 258 0 discriminator 1 21012 0136 D1E90076 ldrd r7, r6, [r1] 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21013 .loc 12 242 0 discriminator 1 21014 013a 0699 ldr r1, [sp, #24] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21015 .loc 12 237 0 discriminator 1 21016 013c 1B1B subs r3, r3, r4 21017 .LVL2224: 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21018 .loc 12 242 0 discriminator 1 21019 013e 0A44 add r2, r2, r1 21020 .LVL2225: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21021 .loc 12 262 0 discriminator 1 21022 0140 82FB0645 smull r4, r5, r2, r6 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 21023 .loc 12 261 0 discriminator 1 21024 0144 83FB0701 smull r0, r1, r3, r7 21025 0148 6C18 adds r4, r5, r1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21026 .loc 12 265 0 discriminator 1 21027 014a 87FB0201 smull r0, r1, r7, r2 21028 014e 099A ldr r2, [sp, #36] 21029 .LVL2226: 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21030 .loc 12 266 0 discriminator 1 21031 0150 83FB0667 smull r6, r7, r3, r6 21032 .LVL2227: 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21033 .loc 12 265 0 discriminator 1 21034 0154 CB1B subs r3, r1, r7 21035 .LVL2228: 21036 0156 9344 add fp, fp, r2 21037 0158 089A ldr r2, [sp, #32] 21038 015a 0099 ldr r1, [sp] 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21039 .loc 12 266 0 discriminator 1 21040 015c 5B00 lsls r3, r3, #1 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21041 .loc 12 262 0 discriminator 1 21042 015e 6400 lsls r4, r4, #1 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 21043 .loc 12 261 0 discriminator 1 21044 0160 4CF80940 str r4, [ip, r9] 21045 .LVL2229: 21046 0164 9644 add lr, lr, r2 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21047 .loc 12 265 0 discriminator 1 21048 0166 4AF80930 str r3, [r10, r9] 21049 016a 0A9A ldr r2, [sp, #40] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21050 .loc 12 274 0 discriminator 1 21051 016c 079B ldr r3, [sp, #28] 21052 016e 0CF1080C add ip, ip, #8 ARM GAS /tmp/ccfbYRip.s page 662 21053 0172 1144 add r1, r1, r2 21054 0174 6345 cmp r3, ip 21055 0176 0091 str r1, [sp] 21056 0178 0AF1080A add r10, r10, #8 21057 017c 7FF467AF bne .L1024 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21058 .loc 12 286 0 21059 0180 0D9B ldr r3, [sp, #52] 21060 0182 9B00 lsls r3, r3, #2 21061 0184 1C93 str r3, [sp, #112] 21062 .LVL2230: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21063 .loc 12 289 0 21064 0186 1B9B ldr r3, [sp, #108] 21065 .LVL2231: 21066 0188 042B cmp r3, #4 21067 018a 40F2E880 bls .L1025 21068 018e 0E93 str r3, [sp, #56] 21069 .LVL2232: 21070 .L1029: 21071 0190 1C9D ldr r5, [sp, #112] 21072 0192 0F9B ldr r3, [sp, #60] 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 21073 .loc 12 293 0 21074 0194 0E9F ldr r7, [sp, #56] 21075 0196 1A46 mov r2, r3 21076 0198 05EB4503 add r3, r5, r5, lsl #1 21077 019c DB00 lsls r3, r3, #3 21078 019e 1993 str r3, [sp, #100] 21079 01a0 EB00 lsls r3, r5, #3 21080 01a2 1893 str r3, [sp, #96] 21081 01a4 2B01 lsls r3, r5, #4 21082 01a6 1793 str r3, [sp, #92] 21083 01a8 FB00 lsls r3, r7, #3 21084 01aa BC08 lsrs r4, r7, #2 21085 01ac 1093 str r3, [sp, #64] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21086 .loc 12 297 0 21087 01ae 1D9B ldr r3, [sp, #116] 21088 01b0 1493 str r3, [sp, #80] 21089 01b2 02EBC400 add r0, r2, r4, lsl #3 21090 01b6 2101 lsls r1, r4, #4 21091 01b8 C4EB4472 rsb r2, r4, r4, lsl #29 21092 01bc D600 lsls r6, r2, #3 21093 01be 0430 adds r0, r0, #4 21094 01c0 0439 subs r1, r1, #4 21095 01c2 621E subs r2, r4, #1 21096 01c4 CDE91233 strd r3, r3, [sp, #72] 21097 01c8 0023 movs r3, #0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 21098 .loc 12 293 0 21099 01ca 0994 str r4, [sp, #36] 21100 .LVL2233: 21101 01cc 1590 str r0, [sp, #84] 21102 01ce 1A91 str r1, [sp, #104] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21103 .loc 12 297 0 ARM GAS /tmp/ccfbYRip.s page 663 21104 01d0 1692 str r2, [sp, #88] 21105 01d2 1193 str r3, [sp, #68] 21106 01d4 0196 str r6, [sp, #4] 21107 .LVL2234: 21108 .L1028: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21109 .loc 12 302 0 21110 01d6 149B ldr r3, [sp, #80] 21111 01d8 1A68 ldr r2, [r3] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 21112 .loc 12 303 0 21113 01da 5B68 ldr r3, [r3, #4] 21114 01dc 0293 str r3, [sp, #8] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21115 .loc 12 304 0 21116 01de 139B ldr r3, [sp, #76] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21117 .loc 12 302 0 21118 01e0 0692 str r2, [sp, #24] 21119 .LVL2235: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21120 .loc 12 304 0 21121 01e2 1A68 ldr r2, [r3] 21122 .LVL2236: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 21123 .loc 12 305 0 21124 01e4 5B68 ldr r3, [r3, #4] 21125 01e6 0493 str r3, [sp, #16] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21126 .loc 12 306 0 21127 01e8 129B ldr r3, [sp, #72] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21128 .loc 12 304 0 21129 01ea 0D92 str r2, [sp, #52] 21130 .LVL2237: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21131 .loc 12 306 0 21132 01ec 1A68 ldr r2, [r3] 21133 .LVL2238: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 21134 .loc 12 307 0 21135 01ee 5B68 ldr r3, [r3, #4] 21136 01f0 0893 str r3, [sp, #32] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21137 .loc 12 311 0 21138 01f2 0C9B ldr r3, [sp, #48] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21139 .loc 12 306 0 21140 01f4 0792 str r2, [sp, #28] 21141 .LVL2239: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21142 .loc 12 311 0 21143 01f6 1946 mov r1, r3 21144 01f8 119B ldr r3, [sp, #68] 21145 01fa 9942 cmp r1, r3 21146 01fc 40F29180 bls .L1026 21147 0200 1A9A ldr r2, [sp, #104] ARM GAS /tmp/ccfbYRip.s page 664 21148 .LVL2240: 21149 0202 0093 str r3, [sp] 21150 0204 1046 mov r0, r2 21151 0206 159A ldr r2, [sp, #84] 21152 0208 00EB020A add r10, r0, r2 21153 020c 9346 mov fp, r2 21154 .LVL2241: 21155 .L1027: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21156 .loc 12 321 0 discriminator 3 21157 020e 0F9F ldr r7, [sp, #60] 21158 0210 009C ldr r4, [sp] 21159 0212 0199 ldr r1, [sp, #4] 21160 0214 57F83450 ldr r5, [r7, r4, lsl #3] 21161 0218 5AF80160 ldr r6, [r10, r1] 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21162 .loc 12 331 0 discriminator 3 21163 021c 5BF8042C ldr r2, [fp, #-4] 21164 0220 DAF80030 ldr r3, [r10] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21165 .loc 12 326 0 discriminator 3 21166 0224 5BF80180 ldr r8, [fp, r1] 21167 0228 0999 ldr r1, [sp, #36] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21168 .loc 12 321 0 discriminator 3 21169 022a 05EB060E add lr, r5, r6 21170 .LVL2242: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21171 .loc 12 331 0 discriminator 3 21172 022e 1344 add r3, r3, r2 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 21173 .loc 12 334 0 discriminator 3 21174 0230 0EEB0302 add r2, lr, r3 21175 0234 BC46 mov ip, r7 21176 0236 9210 asrs r2, r2, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21177 .loc 12 326 0 discriminator 3 21178 0238 5BF83100 ldr r0, [fp, r1, lsl #3] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 21179 .loc 12 334 0 discriminator 3 21180 023c 4CF83420 str r2, [ip, r4, lsl #3] 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21181 .loc 12 339 0 discriminator 3 21182 0240 DBF80010 ldr r1, [fp] 21183 0244 DAF80420 ldr r2, [r10, #4] 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21184 .loc 12 341 0 discriminator 3 21185 0248 019C ldr r4, [sp, #4] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21186 .loc 12 326 0 discriminator 3 21187 024a 08EB0007 add r7, r8, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21188 .loc 12 339 0 discriminator 3 21189 024e 0A44 add r2, r2, r1 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21190 .loc 12 341 0 discriminator 3 21191 0250 B918 adds r1, r7, r2 ARM GAS /tmp/ccfbYRip.s page 665 21192 0252 8910 asrs r1, r1, #2 21193 0254 4BF80410 str r1, [fp, r4] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21194 .loc 12 323 0 discriminator 3 21195 0258 AE1B subs r6, r5, r6 21196 .LVL2243: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21197 .loc 12 328 0 discriminator 3 21198 025a A8EB0009 sub r9, r8, r0 21199 .LVL2244: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 21200 .loc 12 347 0 discriminator 3 21201 025e DBF80050 ldr r5, [fp] 21202 0262 DAF80400 ldr r0, [r10, #4] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21203 .loc 12 349 0 discriminator 3 21204 0266 5BF8041C ldr r1, [fp, #-4] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 21205 .loc 12 347 0 discriminator 3 21206 026a A5EB0008 sub r8, r5, r0 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21207 .loc 12 349 0 discriminator 3 21208 026e DAF80050 ldr r5, [r10] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 21209 .loc 12 360 0 discriminator 3 21210 0272 06EB080C add ip, r6, r8 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21211 .loc 12 349 0 discriminator 3 21212 0276 491B subs r1, r1, r5 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21213 .loc 12 362 0 discriminator 3 21214 0278 A6EB0808 sub r8, r6, r8 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21215 .loc 12 370 0 discriminator 3 21216 027c 069D ldr r5, [sp, #24] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21217 .loc 12 371 0 discriminator 3 21218 027e 029E ldr r6, [sp, #8] 21219 .LVL2245: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21220 .loc 12 336 0 discriminator 3 21221 0280 AEEB0303 sub r3, lr, r3 21222 .LVL2246: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 21223 .loc 12 365 0 discriminator 3 21224 0284 A9EB010E sub lr, r9, r1 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21225 .loc 12 344 0 discriminator 3 21226 0288 BA1A subs r2, r7, r2 21227 .LVL2247: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21228 .loc 12 370 0 discriminator 3 21229 028a 8CFB0545 smull r4, r5, ip, r5 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21230 .loc 12 371 0 discriminator 3 21231 028e 8EFB0667 smull r6, r7, lr, r6 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 666 21232 .loc 12 370 0 discriminator 3 21233 0292 7E19 adds r6, r7, r5 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21234 .loc 12 367 0 discriminator 3 21235 0294 8944 add r9, r9, r1 21236 .LVL2248: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21237 .loc 12 370 0 discriminator 3 21238 0296 0B96 str r6, [sp, #44] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21239 .loc 12 353 0 discriminator 3 21240 0298 0499 ldr r1, [sp, #16] 21241 .LVL2249: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 21242 .loc 12 352 0 discriminator 3 21243 029a 0D9E ldr r6, [sp, #52] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21244 .loc 12 353 0 discriminator 3 21245 029c 82FB0101 smull r0, r1, r2, r1 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 21246 .loc 12 352 0 discriminator 3 21247 02a0 83FB0645 smull r4, r5, r3, r6 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 21248 .loc 12 356 0 discriminator 3 21249 02a4 82FB0667 smull r6, r7, r2, r6 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 21250 .loc 12 352 0 discriminator 3 21251 02a8 4A19 adds r2, r1, r5 21252 02aa 0A92 str r2, [sp, #40] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21253 .loc 12 357 0 discriminator 3 21254 02ac 049A ldr r2, [sp, #16] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21255 .loc 12 374 0 discriminator 3 21256 02ae 069D ldr r5, [sp, #24] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21257 .loc 12 375 0 discriminator 3 21258 02b0 0298 ldr r0, [sp, #8] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21259 .loc 12 383 0 discriminator 3 21260 02b2 089E ldr r6, [sp, #32] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21261 .loc 12 357 0 discriminator 3 21262 02b4 1146 mov r1, r2 21263 02b6 83FB0123 smull r2, r3, r3, r1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21264 .loc 12 374 0 discriminator 3 21265 02ba 8EFB0545 smull r4, r5, lr, r5 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21266 .loc 12 375 0 discriminator 3 21267 02be 8CFB0001 smull r0, r1, ip, r0 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21268 .loc 12 374 0 discriminator 3 21269 02c2 A5EB010E sub lr, r5, r1 21270 .LVL2250: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 21271 .loc 12 356 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 667 21272 02c6 A7EB030C sub ip, r7, r3 21273 .LVL2251: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21274 .loc 12 379 0 discriminator 3 21275 02ca 0898 ldr r0, [sp, #32] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 21276 .loc 12 378 0 discriminator 3 21277 02cc 079B ldr r3, [sp, #28] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21278 .loc 12 382 0 discriminator 3 21279 02ce 079D ldr r5, [sp, #28] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21280 .loc 12 383 0 discriminator 3 21281 02d0 88FB0667 smull r6, r7, r8, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21282 .loc 12 379 0 discriminator 3 21283 02d4 89FB0001 smull r0, r1, r9, r0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21284 .loc 12 382 0 discriminator 3 21285 02d8 89FB0545 smull r4, r5, r9, r5 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 21286 .loc 12 378 0 discriminator 3 21287 02dc 88FB0323 smull r2, r3, r8, r3 21288 02e0 0B44 add r3, r3, r1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21289 .loc 12 382 0 discriminator 3 21290 02e2 E91B subs r1, r5, r7 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21291 .loc 12 311 0 discriminator 3 21292 02e4 009F ldr r7, [sp] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21293 .loc 12 371 0 discriminator 3 21294 02e6 0B9A ldr r2, [sp, #44] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21295 .loc 12 311 0 discriminator 3 21296 02e8 0E9D ldr r5, [sp, #56] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21297 .loc 12 371 0 discriminator 3 21298 02ea 5010 asrs r0, r2, #1 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21299 .loc 12 353 0 discriminator 3 21300 02ec 0A9A ldr r2, [sp, #40] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21301 .loc 12 311 0 discriminator 3 21302 02ee 7E19 adds r6, r7, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21303 .loc 12 353 0 discriminator 3 21304 02f0 5410 asrs r4, r2, #1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21305 .loc 12 357 0 discriminator 3 21306 02f2 4FEA6C05 asr r5, ip, #1 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 21307 .loc 12 356 0 discriminator 3 21308 02f6 4BE90145 strd r4, r5, [fp, #-4] 21309 .LVL2252: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21310 .loc 12 370 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 668 21311 02fa 019C ldr r4, [sp, #4] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21312 .loc 12 311 0 discriminator 3 21313 02fc 0096 str r6, [sp] 21314 .LVL2253: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21315 .loc 12 370 0 discriminator 3 21316 02fe 4AF80400 str r0, [r10, r4] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21317 .loc 12 374 0 discriminator 3 21318 0302 0998 ldr r0, [sp, #36] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21319 .loc 12 375 0 discriminator 3 21320 0304 4FEA6E02 asr r2, lr, #1 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21321 .loc 12 379 0 discriminator 3 21322 0308 5B10 asrs r3, r3, #1 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21323 .loc 12 383 0 discriminator 3 21324 030a 4910 asrs r1, r1, #1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21325 .loc 12 374 0 discriminator 3 21326 030c 4BF83020 str r2, [fp, r0, lsl #3] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21327 .loc 12 382 0 discriminator 3 21328 0310 CAE90031 strd r3, r1, [r10] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21329 .loc 12 311 0 discriminator 3 21330 0314 0C9B ldr r3, [sp, #48] 21331 0316 109A ldr r2, [sp, #64] 21332 0318 B342 cmp r3, r6 21333 031a 9344 add fp, fp, r2 21334 031c 9244 add r10, r10, r2 21335 031e 3FF676AF bhi .L1027 21336 .LVL2254: 21337 .L1026: 21338 0322 149A ldr r2, [sp, #80] 21339 0324 1899 ldr r1, [sp, #96] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21340 .loc 12 297 0 21341 0326 119B ldr r3, [sp, #68] 21342 0328 0A44 add r2, r2, r1 21343 032a 1492 str r2, [sp, #80] 21344 032c 1799 ldr r1, [sp, #92] 21345 032e 139A ldr r2, [sp, #76] 21346 0330 0A44 add r2, r2, r1 21347 0332 1392 str r2, [sp, #76] 21348 0334 1999 ldr r1, [sp, #100] 21349 0336 129A ldr r2, [sp, #72] 21350 0338 0A44 add r2, r2, r1 21351 033a 1292 str r2, [sp, #72] 21352 033c 159A ldr r2, [sp, #84] 21353 033e 0832 adds r2, r2, #8 21354 0340 1592 str r2, [sp, #84] 21355 0342 169A ldr r2, [sp, #88] 21356 0344 0133 adds r3, r3, #1 21357 0346 9342 cmp r3, r2 ARM GAS /tmp/ccfbYRip.s page 669 21358 0348 1193 str r3, [sp, #68] 21359 .LVL2255: 21360 034a 7FF644AF bls .L1028 21361 034e 099B ldr r3, [sp, #36] 21362 .LVL2256: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21363 .loc 12 386 0 discriminator 2 21364 0350 1C9A ldr r2, [sp, #112] 21365 0352 0E93 str r3, [sp, #56] 21366 .LVL2257: 21367 0354 9200 lsls r2, r2, #2 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21368 .loc 12 289 0 discriminator 2 21369 0356 042B cmp r3, #4 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21370 .loc 12 386 0 discriminator 2 21371 0358 1C92 str r2, [sp, #112] 21372 .LVL2258: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21373 .loc 12 289 0 discriminator 2 21374 035a 3FF619AF bhi .L1029 21375 .LVL2259: 21376 .L1025: 21377 035e 0F9C ldr r4, [sp, #60] 21378 0360 DDF86CA0 ldr r10, [sp, #108] 21379 0364 2034 adds r4, r4, #32 21380 .L1030: 21381 .LVL2260: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21382 .loc 12 411 0 discriminator 1 21383 0366 54E906B2 ldrd fp, r2, [r4, #-24] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21384 .loc 12 415 0 discriminator 1 21385 036a 54E90409 ldrd r0, r9, [r4, #-16] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 21386 .loc 12 406 0 discriminator 1 21387 036e 54F8201C ldr r1, [r4, #-32] 21388 .LVL2261: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21389 .loc 12 407 0 discriminator 1 21390 0372 54F81C3C ldr r3, [r4, #-28] 21391 .LVL2262: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21392 .loc 12 419 0 discriminator 1 21393 0376 54E902E8 ldrd lr, r8, [r4, #-8] 21394 .LVL2263: 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 21395 .loc 12 441 0 discriminator 1 21396 037a 8E18 adds r6, r1, r2 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21397 .loc 12 422 0 discriminator 1 21398 037c 01EB0B0C add ip, r1, fp 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 21399 .loc 12 434 0 discriminator 1 21400 0380 A1EB0B07 sub r7, r1, fp 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 21401 .loc 12 448 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 670 21402 0384 891A subs r1, r1, r2 21403 .LVL2264: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21404 .loc 12 425 0 discriminator 1 21405 0386 9D18 adds r5, r3, r2 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21406 .loc 12 422 0 discriminator 1 21407 0388 8444 add ip, ip, r0 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 21408 .loc 12 434 0 discriminator 1 21409 038a 0744 add r7, r7, r0 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 21410 .loc 12 441 0 discriminator 1 21411 038c 361A subs r6, r6, r0 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 21412 .loc 12 448 0 discriminator 1 21413 038e 091A subs r1, r1, r0 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21414 .loc 12 435 0 discriminator 1 21415 0390 9A1A subs r2, r3, r2 21416 .LVL2265: 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21417 .loc 12 442 0 discriminator 1 21418 0392 A3EB0B00 sub r0, r3, fp 21419 .LVL2266: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21420 .loc 12 449 0 discriminator 1 21421 0396 5B44 add r3, r3, fp 21422 .LVL2267: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21423 .loc 12 425 0 discriminator 1 21424 0398 4D44 add r5, r5, r9 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21425 .loc 12 435 0 discriminator 1 21426 039a 4A44 add r2, r2, r9 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21427 .loc 12 442 0 discriminator 1 21428 039c A0EB0900 sub r0, r0, r9 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21429 .loc 12 449 0 discriminator 1 21430 03a0 A3EB0903 sub r3, r3, r9 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21431 .loc 12 422 0 discriminator 1 21432 03a4 F444 add ip, ip, lr 21433 .LVL2268: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 21434 .loc 12 434 0 discriminator 1 21435 03a6 A7EB0E07 sub r7, r7, lr 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 21436 .loc 12 441 0 discriminator 1 21437 03aa A6EB0806 sub r6, r6, r8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 21438 .loc 12 448 0 discriminator 1 21439 03ae 4144 add r1, r1, r8 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21440 .loc 12 425 0 discriminator 1 21441 03b0 4544 add r5, r5, r8 ARM GAS /tmp/ccfbYRip.s page 671 21442 .LVL2269: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21443 .loc 12 435 0 discriminator 1 21444 03b2 A2EB0802 sub r2, r2, r8 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21445 .loc 12 442 0 discriminator 1 21446 03b6 7044 add r0, r0, lr 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21447 .loc 12 449 0 discriminator 1 21448 03b8 A3EB0E03 sub r3, r3, lr 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21449 .loc 12 456 0 discriminator 1 21450 03bc BAF1010A subs r10, r10, #1 21451 .LVL2270: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 21452 .loc 12 431 0 discriminator 1 21453 03c0 44F820CC str ip, [r4, #-32] 21454 .LVL2271: 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 21455 .loc 12 438 0 discriminator 1 21456 03c4 44F8187C str r7, [r4, #-24] 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 21457 .loc 12 445 0 discriminator 1 21458 03c8 44F8106C str r6, [r4, #-16] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 21459 .loc 12 452 0 discriminator 1 21460 03cc 44F8081C str r1, [r4, #-8] 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21461 .loc 12 432 0 discriminator 1 21462 03d0 44F81C5C str r5, [r4, #-28] 21463 .LVL2272: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21464 .loc 12 439 0 discriminator 1 21465 03d4 44F8142C str r2, [r4, #-20] 21466 .LVL2273: 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21467 .loc 12 446 0 discriminator 1 21468 03d8 44F80C0C str r0, [r4, #-12] 21469 .LVL2274: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21470 .loc 12 453 0 discriminator 1 21471 03dc 44F8043C str r3, [r4, #-4] 21472 03e0 04F12004 add r4, r4, #32 21473 .LVL2275: 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21474 .loc 12 456 0 discriminator 1 21475 03e4 BFD1 bne .L1030 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21476 .loc 12 465 0 21477 03e6 1FB0 add sp, sp, #124 21478 .LCFI247: 21479 .cfi_def_cfa_offset 36 21480 @ sp needed 21481 03e8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 21482 .cfi_endproc 21483 .LFE192: 21485 .section .text.arm_radix4_butterfly_inverse_q31,"ax",%progbits ARM GAS /tmp/ccfbYRip.s page 672 21486 .align 1 21487 .p2align 2,,3 21488 .global arm_radix4_butterfly_inverse_q31 21489 .syntax unified 21490 .thumb 21491 .thumb_func 21492 .fpu fpv4-sp-d16 21494 arm_radix4_butterfly_inverse_q31: 21495 .LFB193: 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 21496 .loc 12 522 0 21497 .cfi_startproc 21498 @ args = 0, pretend = 0, frame = 120 21499 @ frame_needed = 0, uses_anonymous_args = 0 21500 .LVL2276: 21501 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 21502 .LCFI248: 21503 .cfi_def_cfa_offset 36 21504 .cfi_offset 4, -36 21505 .cfi_offset 5, -32 21506 .cfi_offset 6, -28 21507 .cfi_offset 7, -24 21508 .cfi_offset 8, -20 21509 .cfi_offset 9, -16 21510 .cfi_offset 10, -12 21511 .cfi_offset 11, -8 21512 .cfi_offset 14, -4 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 21513 .loc 12 542 0 21514 0004 8C08 lsrs r4, r1, #2 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 21515 .loc 12 522 0 21516 0006 9FB0 sub sp, sp, #124 21517 .LCFI249: 21518 .cfi_def_cfa_offset 160 21519 0008 4FEAC40C lsl ip, r4, #3 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 21520 .loc 12 522 0 21521 000c 9046 mov r8, r2 21522 000e 2701 lsls r7, r4, #4 21523 0010 0C91 str r1, [sp, #48] 21524 .LVL2277: 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 21525 .loc 12 542 0 21526 0012 1B94 str r4, [sp, #108] 21527 .LVL2278: 21528 0014 0CF10401 add r1, ip, #4 21529 .LVL2279: 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 21530 .loc 12 522 0 21531 0018 0D93 str r3, [sp, #52] 21532 001a 1D92 str r2, [sp, #116] 21533 001c C4EB4472 rsb r2, r4, r4, lsl #29 21534 .LVL2280: 21535 0020 1C46 mov r4, r3 21536 .LVL2281: 21537 0022 03EB4303 add r3, r3, r3, lsl #1 ARM GAS /tmp/ccfbYRip.s page 673 21538 .LVL2282: 21539 0026 DB00 lsls r3, r3, #3 21540 0028 00EB010A add r10, r0, r1 21541 002c 0146 mov r1, r0 21542 002e 3944 add r1, r1, r7 21543 0030 0A93 str r3, [sp, #40] 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 21544 .loc 12 542 0 21545 0032 CDE90088 strd r8, r8, [sp] 21546 0036 2301 lsls r3, r4, #4 21547 0038 0791 str r1, [sp, #28] 21548 003a 0993 str r3, [sp, #36] 21549 003c D100 lsls r1, r2, #3 21550 003e E300 lsls r3, r4, #3 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; 21551 .loc 12 522 0 21552 0040 0F90 str r0, [sp, #60] 21553 0042 8444 add ip, ip, r0 21554 0044 0B91 str r1, [sp, #44] 21555 0046 0893 str r3, [sp, #32] 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 21556 .loc 12 542 0 21557 0048 C346 mov fp, r8 21558 004a BE46 mov lr, r7 21559 .LVL2283: 21560 .L1038: 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21561 .loc 12 560 0 discriminator 1 21562 004c 0B9F ldr r7, [sp, #44] 21563 004e 1B9D ldr r5, [sp, #108] 21564 0050 5CF80700 ldr r0, [ip, r7] 21565 0054 5CF83520 ldr r2, [ip, r5, lsl #3] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21566 .loc 12 565 0 discriminator 1 21567 0058 5CF80E10 ldr r1, [ip, lr] 21568 005c 5AF8044C ldr r4, [r10, #-4] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21569 .loc 12 568 0 discriminator 1 21570 0060 5AF83530 ldr r3, [r10, r5, lsl #3] 21571 0064 5AF80760 ldr r6, [r10, r7] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21572 .loc 12 560 0 discriminator 1 21573 0068 1211 asrs r2, r2, #4 21574 006a 0011 asrs r0, r0, #4 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21575 .loc 12 565 0 discriminator 1 21576 006c 0D11 asrs r5, r1, #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21577 .loc 12 560 0 discriminator 1 21578 006e 0290 str r0, [sp, #8] 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21579 .loc 12 565 0 discriminator 1 21580 0070 05EB2415 add r5, r5, r4, asr #4 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21581 .loc 12 560 0 discriminator 1 21582 0074 1044 add r0, r0, r2 21583 .LVL2284: ARM GAS /tmp/ccfbYRip.s page 674 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 21584 .loc 12 573 0 discriminator 1 21585 0076 4119 adds r1, r0, r5 21586 0078 4CF80710 str r1, [ip, r7] 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21587 .loc 12 577 0 discriminator 1 21588 007c 5AF80E10 ldr r1, [r10, lr] 21589 0080 DCF80440 ldr r4, [ip, #4] 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21590 .loc 12 560 0 discriminator 1 21591 0084 0492 str r2, [sp, #16] 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21592 .loc 12 568 0 discriminator 1 21593 0086 1B11 asrs r3, r3, #4 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 21594 .loc 12 573 0 discriminator 1 21595 0088 3A46 mov r2, r7 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21596 .loc 12 577 0 discriminator 1 21597 008a 0911 asrs r1, r1, #4 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21598 .loc 12 568 0 discriminator 1 21599 008c 3711 asrs r7, r6, #4 21600 008e 0697 str r7, [sp, #24] 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21601 .loc 12 577 0 discriminator 1 21602 0090 01EB2416 add r6, r1, r4, asr #4 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21603 .loc 12 568 0 discriminator 1 21604 0094 1F44 add r7, r7, r3 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21605 .loc 12 579 0 discriminator 1 21606 0096 B919 adds r1, r7, r6 21607 0098 4AF80210 str r1, [r10, r2] 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21608 .loc 12 592 0 discriminator 1 21609 009c DBE90041 ldrd r4, r1, [fp] 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 21610 .loc 12 575 0 discriminator 1 21611 00a0 401B subs r0, r0, r5 21612 .LVL2285: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21613 .loc 12 582 0 discriminator 1 21614 00a2 BD1B subs r5, r7, r6 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 21615 .loc 12 595 0 discriminator 1 21616 00a4 80FB0467 smull r6, r7, r0, r4 21617 00a8 B946 mov r9, r7 21618 00aa 4A46 mov r2, r9 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21619 .loc 12 596 0 discriminator 1 21620 00ac 85FB0167 smull r6, r7, r5, r1 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 21621 .loc 12 599 0 discriminator 1 21622 00b0 84FB0545 smull r4, r5, r4, r5 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21623 .loc 12 600 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 675 21624 00b4 80FB0101 smull r0, r1, r0, r1 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 21625 .loc 12 599 0 discriminator 1 21626 00b8 4E19 adds r6, r1, r5 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 21627 .loc 12 595 0 discriminator 1 21628 00ba D71B subs r7, r2, r7 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 21629 .loc 12 585 0 discriminator 1 21630 00bc 5AF80E20 ldr r2, [r10, lr] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21631 .loc 12 587 0 discriminator 1 21632 00c0 5CF80E10 ldr r1, [ip, lr] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 21633 .loc 12 585 0 discriminator 1 21634 00c4 DCF80450 ldr r5, [ip, #4] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21635 .loc 12 587 0 discriminator 1 21636 00c8 5AF8040C ldr r0, [r10, #-4] 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21637 .loc 12 596 0 discriminator 1 21638 00cc 7F00 lsls r7, r7, #1 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21639 .loc 12 600 0 discriminator 1 21640 00ce 7600 lsls r6, r6, #1 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 21641 .loc 12 595 0 discriminator 1 21642 00d0 4AF8047C str r7, [r10, #-4] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 21643 .loc 12 585 0 discriminator 1 21644 00d4 1411 asrs r4, r2, #4 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 21645 .loc 12 599 0 discriminator 1 21646 00d6 CCF80460 str r6, [ip, #4] 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21647 .loc 12 562 0 discriminator 1 21648 00da 049A ldr r2, [sp, #16] 21649 00dc 029E ldr r6, [sp, #8] 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21650 .loc 12 570 0 discriminator 1 21651 00de 069F ldr r7, [sp, #24] 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21652 .loc 12 587 0 discriminator 1 21653 00e0 0911 asrs r1, r1, #4 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21654 .loc 12 562 0 discriminator 1 21655 00e2 B21A subs r2, r6, r2 21656 .LVL2286: 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21657 .loc 12 587 0 discriminator 1 21658 00e4 C1EB2016 rsb r6, r1, r0, asr #4 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21659 .loc 12 612 0 discriminator 1 21660 00e8 0199 ldr r1, [sp, #4] 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21661 .loc 12 570 0 discriminator 1 21662 00ea FB1A subs r3, r7, r3 ARM GAS /tmp/ccfbYRip.s page 676 21663 .LVL2287: 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21664 .loc 12 612 0 discriminator 1 21665 00ec 0868 ldr r0, [r1] 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 21666 .loc 12 585 0 discriminator 1 21667 00ee C4EB2517 rsb r7, r4, r5, asr #4 21668 .LVL2288: 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 21669 .loc 12 603 0 discriminator 1 21670 00f2 D51B subs r5, r2, r7 21671 .LVL2289: 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21672 .loc 12 613 0 discriminator 1 21673 00f4 4C68 ldr r4, [r1, #4] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21674 .loc 12 616 0 discriminator 1 21675 00f6 85FB0089 smull r8, r9, r5, r0 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 21676 .loc 12 608 0 discriminator 1 21677 00fa 9919 adds r1, r3, r6 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21678 .loc 12 616 0 discriminator 1 21679 00fc CDE90289 strd r8, [sp, #8] 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21680 .loc 12 617 0 discriminator 1 21681 0100 81FB0489 smull r8, r9, r1, r4 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 21682 .loc 12 620 0 discriminator 1 21683 0104 80FB0101 smull r0, r1, r0, r1 21684 0108 CDE90401 strd r0, [sp, #16] 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21685 .loc 12 616 0 discriminator 1 21686 010c 0399 ldr r1, [sp, #12] 21687 010e 4846 mov r0, r9 21688 0110 081A subs r0, r1, r0 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 21689 .loc 12 620 0 discriminator 1 21690 0112 0599 ldr r1, [sp, #20] 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21691 .loc 12 621 0 discriminator 1 21692 0114 85FB0445 smull r4, r5, r5, r4 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 21693 .loc 12 620 0 discriminator 1 21694 0118 2944 add r1, r1, r5 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21695 .loc 12 616 0 discriminator 1 21696 011a 1B9D ldr r5, [sp, #108] 21697 .LVL2290: 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21698 .loc 12 617 0 discriminator 1 21699 011c 4000 lsls r0, r0, #1 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21700 .loc 12 621 0 discriminator 1 21701 011e 4900 lsls r1, r1, #1 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 21702 .loc 12 616 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 677 21703 0120 4CF83500 str r0, [ip, r5, lsl #3] 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 21704 .loc 12 620 0 discriminator 1 21705 0124 4AF83510 str r1, [r10, r5, lsl #3] 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21706 .loc 12 625 0 discriminator 1 21707 0128 0099 ldr r1, [sp] 21708 012a 0868 ldr r0, [r1] 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21709 .loc 12 630 0 discriminator 1 21710 012c 4968 ldr r1, [r1, #4] 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21711 .loc 12 605 0 discriminator 1 21712 012e 3A44 add r2, r2, r7 21713 .LVL2291: 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 21714 .loc 12 629 0 discriminator 1 21715 0130 82FB0045 smull r4, r5, r2, r0 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21716 .loc 12 634 0 discriminator 1 21717 0134 009C ldr r4, [sp] 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21718 .loc 12 610 0 discriminator 1 21719 0136 9B1B subs r3, r3, r6 21720 .LVL2292: 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21721 .loc 12 630 0 discriminator 1 21722 0138 83FB0167 smull r6, r7, r3, r1 21723 .LVL2293: 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21724 .loc 12 633 0 discriminator 1 21725 013c 80FB0301 smull r0, r1, r0, r3 21726 .LVL2294: 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21727 .loc 12 634 0 discriminator 1 21728 0140 6368 ldr r3, [r4, #4] 21729 .LVL2295: 21730 0142 82FB0323 smull r2, r3, r2, r3 21731 .LVL2296: 21732 0146 099A ldr r2, [sp, #36] 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21733 .loc 12 633 0 discriminator 1 21734 0148 0B44 add r3, r3, r1 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 21735 .loc 12 629 0 discriminator 1 21736 014a ED1B subs r5, r5, r7 21737 014c 0199 ldr r1, [sp, #4] 21738 014e 9344 add fp, fp, r2 21739 0150 089A ldr r2, [sp, #32] 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21740 .loc 12 634 0 discriminator 1 21741 0152 5B00 lsls r3, r3, #1 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21742 .loc 12 630 0 discriminator 1 21743 0154 6D00 lsls r5, r5, #1 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 21744 .loc 12 629 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 678 21745 0156 4CF80E50 str r5, [ip, lr] 21746 .LVL2297: 21747 015a 1144 add r1, r1, r2 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 21748 .loc 12 633 0 discriminator 1 21749 015c 4AF80E30 str r3, [r10, lr] 21750 0160 0A9A ldr r2, [sp, #40] 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21751 .loc 12 642 0 discriminator 1 21752 0162 079B ldr r3, [sp, #28] 21753 0164 0191 str r1, [sp, #4] 21754 0166 0CF1080C add ip, ip, #8 21755 016a 1444 add r4, r4, r2 21756 016c 6345 cmp r3, ip 21757 016e 0094 str r4, [sp] 21758 0170 0AF1080A add r10, r10, #8 21759 0174 7FF46AAF bne .L1038 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21760 .loc 12 650 0 21761 0178 0D9B ldr r3, [sp, #52] 21762 017a 9B00 lsls r3, r3, #2 21763 017c 1C93 str r3, [sp, #112] 21764 .LVL2298: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21765 .loc 12 653 0 21766 017e 1B9B ldr r3, [sp, #108] 21767 .LVL2299: 21768 0180 042B cmp r3, #4 21769 0182 40F2E880 bls .L1039 21770 0186 0E93 str r3, [sp, #56] 21771 .LVL2300: 21772 .L1043: 21773 0188 1C9D ldr r5, [sp, #112] 21774 018a 0F9B ldr r3, [sp, #60] 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 21775 .loc 12 657 0 21776 018c 0E9E ldr r6, [sp, #56] 21777 018e 1A46 mov r2, r3 21778 0190 05EB4503 add r3, r5, r5, lsl #1 21779 0194 DB00 lsls r3, r3, #3 21780 0196 1993 str r3, [sp, #100] 21781 0198 EB00 lsls r3, r5, #3 21782 019a 1893 str r3, [sp, #96] 21783 019c 2B01 lsls r3, r5, #4 21784 019e B408 lsrs r4, r6, #2 21785 01a0 1793 str r3, [sp, #92] 21786 01a2 F300 lsls r3, r6, #3 21787 01a4 02EBC400 add r0, r2, r4, lsl #3 21788 01a8 1093 str r3, [sp, #64] 21789 01aa C4EB4472 rsb r2, r4, r4, lsl #29 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21790 .loc 12 660 0 21791 01ae 1D9B ldr r3, [sp, #116] 21792 01b0 1493 str r3, [sp, #80] 21793 01b2 D200 lsls r2, r2, #3 21794 01b4 2101 lsls r1, r4, #4 21795 01b6 0430 adds r0, r0, #4 ARM GAS /tmp/ccfbYRip.s page 679 21796 01b8 0439 subs r1, r1, #4 21797 01ba 0192 str r2, [sp, #4] 21798 01bc CDE91233 strd r3, r3, [sp, #72] 21799 01c0 621E subs r2, r4, #1 21800 01c2 0023 movs r3, #0 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 21801 .loc 12 657 0 21802 01c4 0994 str r4, [sp, #36] 21803 .LVL2301: 21804 01c6 1590 str r0, [sp, #84] 21805 01c8 1A91 str r1, [sp, #104] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21806 .loc 12 660 0 21807 01ca 1692 str r2, [sp, #88] 21808 01cc 1193 str r3, [sp, #68] 21809 .LVL2302: 21810 .L1042: 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21811 .loc 12 665 0 21812 01ce 149B ldr r3, [sp, #80] 21813 01d0 1A68 ldr r2, [r3] 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 21814 .loc 12 666 0 21815 01d2 5B68 ldr r3, [r3, #4] 21816 01d4 0493 str r3, [sp, #16] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21817 .loc 12 667 0 21818 01d6 139B ldr r3, [sp, #76] 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 21819 .loc 12 665 0 21820 01d8 0292 str r2, [sp, #8] 21821 .LVL2303: 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21822 .loc 12 667 0 21823 01da 1A68 ldr r2, [r3] 21824 .LVL2304: 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 21825 .loc 12 668 0 21826 01dc 5B68 ldr r3, [r3, #4] 21827 01de 0693 str r3, [sp, #24] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21828 .loc 12 669 0 21829 01e0 129B ldr r3, [sp, #72] 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 21830 .loc 12 667 0 21831 01e2 0D92 str r2, [sp, #52] 21832 .LVL2305: 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21833 .loc 12 669 0 21834 01e4 1A68 ldr r2, [r3] 21835 .LVL2306: 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 21836 .loc 12 670 0 21837 01e6 5B68 ldr r3, [r3, #4] 21838 01e8 0893 str r3, [sp, #32] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21839 .loc 12 674 0 ARM GAS /tmp/ccfbYRip.s page 680 21840 01ea 0C9B ldr r3, [sp, #48] 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 21841 .loc 12 669 0 21842 01ec 0792 str r2, [sp, #28] 21843 .LVL2307: 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21844 .loc 12 674 0 21845 01ee 1946 mov r1, r3 21846 01f0 119B ldr r3, [sp, #68] 21847 01f2 9942 cmp r1, r3 21848 01f4 40F29180 bls .L1040 21849 01f8 1A9A ldr r2, [sp, #104] 21850 .LVL2308: 21851 01fa 0093 str r3, [sp] 21852 01fc 1046 mov r0, r2 21853 01fe 159A ldr r2, [sp, #84] 21854 0200 00EB020A add r10, r0, r2 21855 0204 9346 mov fp, r2 21856 .LVL2309: 21857 .L1041: 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21858 .loc 12 684 0 discriminator 3 21859 0206 0F9F ldr r7, [sp, #60] 21860 0208 009C ldr r4, [sp] 21861 020a 0199 ldr r1, [sp, #4] 21862 020c 57F83450 ldr r5, [r7, r4, lsl #3] 21863 0210 5AF80160 ldr r6, [r10, r1] 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21864 .loc 12 694 0 discriminator 3 21865 0214 5BF8042C ldr r2, [fp, #-4] 21866 0218 DAF80030 ldr r3, [r10] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21867 .loc 12 689 0 discriminator 3 21868 021c 5BF80180 ldr r8, [fp, r1] 21869 0220 0999 ldr r1, [sp, #36] 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 21870 .loc 12 684 0 discriminator 3 21871 0222 05EB060E add lr, r5, r6 21872 .LVL2310: 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21873 .loc 12 694 0 discriminator 3 21874 0226 1344 add r3, r3, r2 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 21875 .loc 12 697 0 discriminator 3 21876 0228 0EEB0302 add r2, lr, r3 21877 022c BC46 mov ip, r7 21878 022e 9210 asrs r2, r2, #2 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21879 .loc 12 689 0 discriminator 3 21880 0230 5BF83100 ldr r0, [fp, r1, lsl #3] 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 21881 .loc 12 697 0 discriminator 3 21882 0234 4CF83420 str r2, [ip, r4, lsl #3] 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21883 .loc 12 701 0 discriminator 3 21884 0238 DBF80010 ldr r1, [fp] 21885 023c DAF80420 ldr r2, [r10, #4] ARM GAS /tmp/ccfbYRip.s page 681 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21886 .loc 12 703 0 discriminator 3 21887 0240 019C ldr r4, [sp, #4] 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 21888 .loc 12 689 0 discriminator 3 21889 0242 08EB0007 add r7, r8, r0 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 21890 .loc 12 701 0 discriminator 3 21891 0246 0A44 add r2, r2, r1 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21892 .loc 12 703 0 discriminator 3 21893 0248 B918 adds r1, r7, r2 21894 024a 8910 asrs r1, r1, #2 21895 024c 4BF80410 str r1, [fp, r4] 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21896 .loc 12 686 0 discriminator 3 21897 0250 AE1B subs r6, r5, r6 21898 .LVL2311: 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21899 .loc 12 691 0 discriminator 3 21900 0252 A8EB0009 sub r9, r8, r0 21901 .LVL2312: 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 21902 .loc 12 709 0 discriminator 3 21903 0256 DBF80050 ldr r5, [fp] 21904 025a DAF80400 ldr r0, [r10, #4] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21905 .loc 12 711 0 discriminator 3 21906 025e 5BF8041C ldr r1, [fp, #-4] 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 21907 .loc 12 709 0 discriminator 3 21908 0262 A5EB0008 sub r8, r5, r0 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21909 .loc 12 711 0 discriminator 3 21910 0266 DAF80050 ldr r5, [r10] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21911 .loc 12 733 0 discriminator 3 21912 026a 0498 ldr r0, [sp, #16] 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21913 .loc 12 711 0 discriminator 3 21914 026c 491B subs r1, r1, r5 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21915 .loc 12 732 0 discriminator 3 21916 026e 029D ldr r5, [sp, #8] 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) + (yb - yd) */ 21917 .loc 12 722 0 discriminator 3 21918 0270 A6EB080C sub ip, r6, r8 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 21919 .loc 12 699 0 discriminator 3 21920 0274 AEEB0303 sub r3, lr, r3 21921 .LVL2313: 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) - (xb - xd) */ 21922 .loc 12 727 0 discriminator 3 21923 0278 09EB010E add lr, r9, r1 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21924 .loc 12 706 0 discriminator 3 21925 027c BA1A subs r2, r7, r2 ARM GAS /tmp/ccfbYRip.s page 682 21926 .LVL2314: 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21927 .loc 12 724 0 discriminator 3 21928 027e B044 add r8, r8, r6 21929 .LVL2315: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21930 .loc 12 732 0 discriminator 3 21931 0280 8CFB0567 smull r6, r7, ip, r5 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21932 .loc 12 733 0 discriminator 3 21933 0284 8EFB0045 smull r4, r5, lr, r0 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21934 .loc 12 732 0 discriminator 3 21935 0288 7E1B subs r6, r7, r5 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21936 .loc 12 729 0 discriminator 3 21937 028a A9EB0109 sub r9, r9, r1 21938 .LVL2316: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 21939 .loc 12 732 0 discriminator 3 21940 028e 0B96 str r6, [sp, #44] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21941 .loc 12 715 0 discriminator 3 21942 0290 0699 ldr r1, [sp, #24] 21943 .LVL2317: 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 21944 .loc 12 714 0 discriminator 3 21945 0292 0D9E ldr r6, [sp, #52] 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21946 .loc 12 715 0 discriminator 3 21947 0294 82FB0101 smull r0, r1, r2, r1 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 21948 .loc 12 714 0 discriminator 3 21949 0298 83FB0645 smull r4, r5, r3, r6 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 21950 .loc 12 718 0 discriminator 3 21951 029c 82FB0667 smull r6, r7, r2, r6 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; 21952 .loc 12 714 0 discriminator 3 21953 02a0 6A1A subs r2, r5, r1 21954 02a2 0A92 str r2, [sp, #40] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21955 .loc 12 719 0 discriminator 3 21956 02a4 069A ldr r2, [sp, #24] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21957 .loc 12 736 0 discriminator 3 21958 02a6 029D ldr r5, [sp, #8] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21959 .loc 12 737 0 discriminator 3 21960 02a8 0498 ldr r0, [sp, #16] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21961 .loc 12 745 0 discriminator 3 21962 02aa 089E ldr r6, [sp, #32] 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21963 .loc 12 719 0 discriminator 3 21964 02ac 1146 mov r1, r2 21965 02ae 83FB0123 smull r2, r3, r3, r1 ARM GAS /tmp/ccfbYRip.s page 683 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21966 .loc 12 736 0 discriminator 3 21967 02b2 8EFB0545 smull r4, r5, lr, r5 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21968 .loc 12 737 0 discriminator 3 21969 02b6 8CFB0001 smull r0, r1, ip, r0 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 21970 .loc 12 736 0 discriminator 3 21971 02ba 01EB050E add lr, r1, r5 21972 .LVL2318: 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 21973 .loc 12 718 0 discriminator 3 21974 02be 03EB070C add ip, r3, r7 21975 .LVL2319: 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21976 .loc 12 741 0 discriminator 3 21977 02c2 0898 ldr r0, [sp, #32] 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 21978 .loc 12 740 0 discriminator 3 21979 02c4 079B ldr r3, [sp, #28] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21980 .loc 12 744 0 discriminator 3 21981 02c6 079D ldr r5, [sp, #28] 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 21982 .loc 12 745 0 discriminator 3 21983 02c8 88FB0667 smull r6, r7, r8, r6 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21984 .loc 12 741 0 discriminator 3 21985 02cc 89FB0001 smull r0, r1, r9, r0 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21986 .loc 12 744 0 discriminator 3 21987 02d0 89FB0545 smull r4, r5, r9, r5 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 21988 .loc 12 740 0 discriminator 3 21989 02d4 88FB0323 smull r2, r3, r8, r3 21990 02d8 5B1A subs r3, r3, r1 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 21991 .loc 12 744 0 discriminator 3 21992 02da 7919 adds r1, r7, r5 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21993 .loc 12 674 0 discriminator 3 21994 02dc 009F ldr r7, [sp] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21995 .loc 12 733 0 discriminator 3 21996 02de 0B9A ldr r2, [sp, #44] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 21997 .loc 12 674 0 discriminator 3 21998 02e0 0E9D ldr r5, [sp, #56] 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 21999 .loc 12 733 0 discriminator 3 22000 02e2 5010 asrs r0, r2, #1 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22001 .loc 12 715 0 discriminator 3 22002 02e4 0A9A ldr r2, [sp, #40] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22003 .loc 12 674 0 discriminator 3 22004 02e6 7E19 adds r6, r7, r5 ARM GAS /tmp/ccfbYRip.s page 684 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22005 .loc 12 715 0 discriminator 3 22006 02e8 5410 asrs r4, r2, #1 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22007 .loc 12 719 0 discriminator 3 22008 02ea 4FEA6C05 asr r5, ip, #1 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; 22009 .loc 12 718 0 discriminator 3 22010 02ee 4BE90145 strd r4, r5, [fp, #-4] 22011 .LVL2320: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 22012 .loc 12 732 0 discriminator 3 22013 02f2 019C ldr r4, [sp, #4] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22014 .loc 12 674 0 discriminator 3 22015 02f4 0096 str r6, [sp] 22016 .LVL2321: 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 22017 .loc 12 732 0 discriminator 3 22018 02f6 4AF80400 str r0, [r10, r4] 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 22019 .loc 12 736 0 discriminator 3 22020 02fa 0998 ldr r0, [sp, #36] 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22021 .loc 12 737 0 discriminator 3 22022 02fc 4FEA6E02 asr r2, lr, #1 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22023 .loc 12 741 0 discriminator 3 22024 0300 5B10 asrs r3, r3, #1 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22025 .loc 12 745 0 discriminator 3 22026 0302 4910 asrs r1, r1, #1 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 22027 .loc 12 736 0 discriminator 3 22028 0304 4BF83020 str r2, [fp, r0, lsl #3] 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 22029 .loc 12 744 0 discriminator 3 22030 0308 CAE90031 strd r3, r1, [r10] 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22031 .loc 12 674 0 discriminator 3 22032 030c 0C9B ldr r3, [sp, #48] 22033 030e 109A ldr r2, [sp, #64] 22034 0310 B342 cmp r3, r6 22035 0312 9344 add fp, fp, r2 22036 0314 9244 add r10, r10, r2 22037 0316 3FF676AF bhi .L1041 22038 .LVL2322: 22039 .L1040: 22040 031a 149A ldr r2, [sp, #80] 22041 031c 1899 ldr r1, [sp, #96] 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22042 .loc 12 660 0 22043 031e 119B ldr r3, [sp, #68] 22044 0320 0A44 add r2, r2, r1 22045 0322 1492 str r2, [sp, #80] 22046 0324 1799 ldr r1, [sp, #92] 22047 0326 139A ldr r2, [sp, #76] ARM GAS /tmp/ccfbYRip.s page 685 22048 0328 0A44 add r2, r2, r1 22049 032a 1392 str r2, [sp, #76] 22050 032c 1999 ldr r1, [sp, #100] 22051 032e 129A ldr r2, [sp, #72] 22052 0330 0A44 add r2, r2, r1 22053 0332 1292 str r2, [sp, #72] 22054 0334 159A ldr r2, [sp, #84] 22055 0336 0832 adds r2, r2, #8 22056 0338 1592 str r2, [sp, #84] 22057 033a 169A ldr r2, [sp, #88] 22058 033c 0133 adds r3, r3, #1 22059 033e 9342 cmp r3, r2 22060 0340 1193 str r3, [sp, #68] 22061 .LVL2323: 22062 0342 7FF644AF bls .L1042 22063 0346 099B ldr r3, [sp, #36] 22064 .LVL2324: 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22065 .loc 12 748 0 discriminator 2 22066 0348 1C9A ldr r2, [sp, #112] 22067 034a 0E93 str r3, [sp, #56] 22068 .LVL2325: 22069 034c 9200 lsls r2, r2, #2 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22070 .loc 12 653 0 discriminator 2 22071 034e 042B cmp r3, #4 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22072 .loc 12 748 0 discriminator 2 22073 0350 1C92 str r2, [sp, #112] 22074 .LVL2326: 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22075 .loc 12 653 0 discriminator 2 22076 0352 3FF619AF bhi .L1043 22077 .LVL2327: 22078 .L1039: 22079 0356 0F9C ldr r4, [sp, #60] 22080 0358 DDF86CA0 ldr r10, [sp, #108] 22081 035c 2034 adds r4, r4, #32 22082 .L1044: 22083 .LVL2328: 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22084 .loc 12 775 0 discriminator 1 22085 035e 54E906B2 ldrd fp, r2, [r4, #-24] 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22086 .loc 12 779 0 discriminator 1 22087 0362 54E90409 ldrd r0, r9, [r4, #-16] 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 22088 .loc 12 770 0 discriminator 1 22089 0366 54F8201C ldr r1, [r4, #-32] 22090 .LVL2329: 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22091 .loc 12 771 0 discriminator 1 22092 036a 54F81C3C ldr r3, [r4, #-28] 22093 .LVL2330: 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22094 .loc 12 783 0 discriminator 1 22095 036e 54E902E8 ldrd lr, r8, [r4, #-8] ARM GAS /tmp/ccfbYRip.s page 686 22096 .LVL2331: 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 22097 .loc 12 805 0 discriminator 1 22098 0372 8E1A subs r6, r1, r2 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22099 .loc 12 786 0 discriminator 1 22100 0374 01EB0B0C add ip, r1, fp 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 22101 .loc 12 798 0 discriminator 1 22102 0378 A1EB0B07 sub r7, r1, fp 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 22103 .loc 12 812 0 discriminator 1 22104 037c 1144 add r1, r1, r2 22105 .LVL2332: 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22106 .loc 12 789 0 discriminator 1 22107 037e 9D18 adds r5, r3, r2 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22108 .loc 12 786 0 discriminator 1 22109 0380 8444 add ip, ip, r0 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 22110 .loc 12 798 0 discriminator 1 22111 0382 0744 add r7, r7, r0 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 22112 .loc 12 805 0 discriminator 1 22113 0384 361A subs r6, r6, r0 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 22114 .loc 12 812 0 discriminator 1 22115 0386 091A subs r1, r1, r0 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22116 .loc 12 799 0 discriminator 1 22117 0388 9A1A subs r2, r3, r2 22118 .LVL2333: 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22119 .loc 12 806 0 discriminator 1 22120 038a 03EB0B00 add r0, r3, fp 22121 .LVL2334: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22122 .loc 12 813 0 discriminator 1 22123 038e A3EB0B03 sub r3, r3, fp 22124 .LVL2335: 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22125 .loc 12 789 0 discriminator 1 22126 0392 4D44 add r5, r5, r9 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22127 .loc 12 799 0 discriminator 1 22128 0394 4A44 add r2, r2, r9 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22129 .loc 12 806 0 discriminator 1 22130 0396 A0EB0900 sub r0, r0, r9 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22131 .loc 12 813 0 discriminator 1 22132 039a A3EB0903 sub r3, r3, r9 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22133 .loc 12 786 0 discriminator 1 22134 039e F444 add ip, ip, lr 22135 .LVL2336: ARM GAS /tmp/ccfbYRip.s page 687 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 22136 .loc 12 798 0 discriminator 1 22137 03a0 A7EB0E07 sub r7, r7, lr 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya + xb - yc - xd); 22138 .loc 12 805 0 discriminator 1 22139 03a4 4644 add r6, r6, r8 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya - xb - yc + xd); 22140 .loc 12 812 0 discriminator 1 22141 03a6 A1EB0801 sub r1, r1, r8 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22142 .loc 12 789 0 discriminator 1 22143 03aa 4544 add r5, r5, r8 22144 .LVL2337: 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22145 .loc 12 799 0 discriminator 1 22146 03ac A2EB0802 sub r2, r2, r8 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22147 .loc 12 806 0 discriminator 1 22148 03b0 A0EB0E00 sub r0, r0, lr 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22149 .loc 12 813 0 discriminator 1 22150 03b4 7344 add r3, r3, lr 22151 .loc 12 819 0 discriminator 1 22152 03b6 BAF1010A subs r10, r10, #1 22153 .LVL2338: 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 22154 .loc 12 795 0 discriminator 1 22155 03ba 44F820CC str ip, [r4, #-32] 22156 .LVL2339: 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 22157 .loc 12 802 0 discriminator 1 22158 03be 44F8187C str r7, [r4, #-24] 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 22159 .loc 12 809 0 discriminator 1 22160 03c2 44F8106C str r6, [r4, #-16] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 22161 .loc 12 816 0 discriminator 1 22162 03c6 44F8081C str r1, [r4, #-8] 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22163 .loc 12 796 0 discriminator 1 22164 03ca 44F81C5C str r5, [r4, #-28] 22165 .LVL2340: 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22166 .loc 12 803 0 discriminator 1 22167 03ce 44F8142C str r2, [r4, #-20] 22168 .LVL2341: 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22169 .loc 12 810 0 discriminator 1 22170 03d2 44F80C0C str r0, [r4, #-12] 22171 .LVL2342: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22172 .loc 12 817 0 discriminator 1 22173 03d6 44F8043C str r3, [r4, #-4] 22174 03da 04F12004 add r4, r4, #32 22175 .LVL2343: 22176 .loc 12 819 0 discriminator 1 22177 03de BED1 bne .L1044 ARM GAS /tmp/ccfbYRip.s page 688 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 11.21(q21) format for the 1024 point */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 9.23(q23) format for the 256 point */ 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 7.25(q25) format for the 64 point */ 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* output is in 5.27(q27) format for the 16 point */ 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* End of last stage process */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22178 .loc 12 827 0 22179 03e0 1FB0 add sp, sp, #124 22180 .LCFI250: 22181 .cfi_def_cfa_offset 36 22182 @ sp needed 22183 03e2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 22184 .cfi_endproc 22185 .LFE193: 22187 03e6 00BF .section .text.arm_cfft_radix4_q31,"ax",%progbits 22188 .align 1 22189 .p2align 2,,3 22190 .global arm_cfft_radix4_q31 22191 .syntax unified 22192 .thumb 22193 .thumb_func 22194 .fpu fpv4-sp-d16 22196 arm_cfft_radix4_q31: 22197 .LFB191: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** if (S->ifftFlag == 1U) 22198 .loc 12 78 0 22199 .cfi_startproc 22200 @ args = 0, pretend = 0, frame = 0 22201 @ frame_needed = 0, uses_anonymous_args = 0 22202 .LVL2344: 22203 0000 70B5 push {r4, r5, r6, lr} 22204 .LCFI251: 22205 .cfi_def_cfa_offset 16 22206 .cfi_offset 4, -16 22207 .cfi_offset 5, -12 22208 .cfi_offset 6, -8 22209 .cfi_offset 14, -4 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** if (S->ifftFlag == 1U) 22210 .loc 12 78 0 22211 0002 0446 mov r4, r0 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22212 .loc 12 79 0 22213 0004 8078 ldrb r0, [r0, #2] @ zero_extendqisi2 22214 .LVL2345: 22215 0006 6268 ldr r2, [r4, #4] 22216 0008 A389 ldrh r3, [r4, #12] 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** if (S->ifftFlag == 1U) 22217 .loc 12 78 0 22218 000a 0D46 mov r5, r1 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22219 .loc 12 79 0 22220 000c 0128 cmp r0, #1 22221 000e 2188 ldrh r1, [r4] 22222 .LVL2346: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } ARM GAS /tmp/ccfbYRip.s page 689 22223 .loc 12 82 0 22224 0010 2846 mov r0, r5 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22225 .loc 12 79 0 22226 0012 05D0 beq .L1056 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22227 .loc 12 87 0 22228 0014 FFF7FEFF bl arm_radix4_butterfly_q31 22229 .LVL2347: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22230 .loc 12 90 0 22231 0018 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 22232 001a 012B cmp r3, #1 22233 001c 05D0 beq .L1057 22234 .L1051: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22235 .loc 12 96 0 22236 001e 70BD pop {r4, r5, r6, pc} 22237 .LVL2348: 22238 .L1056: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22239 .loc 12 82 0 22240 0020 FFF7FEFF bl arm_radix4_butterfly_inverse_q31 22241 .LVL2349: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 22242 .loc 12 90 0 22243 0024 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 22244 0026 012B cmp r3, #1 22245 0028 F9D1 bne .L1051 22246 .L1057: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22247 .loc 12 93 0 22248 002a 2846 mov r0, r5 22249 002c A368 ldr r3, [r4, #8] 22250 002e E289 ldrh r2, [r4, #14] 22251 0030 2188 ldrh r1, [r4] 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 22252 .loc 12 96 0 22253 0032 BDE87040 pop {r4, r5, r6, lr} 22254 .LCFI252: 22255 .cfi_restore 14 22256 .cfi_restore 6 22257 .cfi_restore 5 22258 .cfi_restore 4 22259 .cfi_def_cfa_offset 0 22260 .LVL2350: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 22261 .loc 12 93 0 22262 0036 FFF7FEBF b arm_bitreversal_q31 22263 .LVL2351: 22264 .cfi_endproc 22265 .LFE191: 22267 003a 00BF .section .text.arm_radix8_butterfly_f32,"ax",%progbits 22268 .align 1 22269 .p2align 2,,3 22270 .global arm_radix8_butterfly_f32 22271 .syntax unified ARM GAS /tmp/ccfbYRip.s page 690 22272 .thumb 22273 .thumb_func 22274 .fpu fpv4-sp-d16 22276 arm_radix8_butterfly_f32: 22277 .LFB194: 22278 .file 26 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Title: arm_cfft_radix8_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Description: Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /* ---------------------------------------------------------------------- 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * Internal helper function used by the FFTs 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** * -------------------------------------------------------------------- */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** brief Core function for the floating-point CFFT butterfly process. 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** param[in,out] pSrc points to the in-place buffer of floating-point data type. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** param[in] fftLen length of the FFT. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** param[in] pCoef points to the twiddle coefficient buffer. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs wit 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** return none 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** void arm_radix8_butterfly_f32( 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t * pSrc, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint16_t fftLen, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** const float32_t * pCoef, 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint16_t twidCoefModifier) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** { 22279 .loc 26 50 0 ARM GAS /tmp/ccfbYRip.s page 691 22280 .cfi_startproc 22281 @ args = 0, pretend = 0, frame = 120 22282 @ frame_needed = 0, uses_anonymous_args = 0 22283 .LVL2352: 22284 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 22285 .LCFI253: 22286 .cfi_def_cfa_offset 36 22287 .cfi_offset 4, -36 22288 .cfi_offset 5, -32 22289 .cfi_offset 6, -28 22290 .cfi_offset 7, -24 22291 .cfi_offset 8, -20 22292 .cfi_offset 9, -16 22293 .cfi_offset 10, -12 22294 .cfi_offset 11, -8 22295 .cfi_offset 14, -4 22296 0004 2DED108B vpush.64 {d8, d9, d10, d11, d12, d13, d14, d15} 22297 .LCFI254: 22298 .cfi_def_cfa_offset 100 22299 .cfi_offset 80, -100 22300 .cfi_offset 81, -96 22301 .cfi_offset 82, -92 22302 .cfi_offset 83, -88 22303 .cfi_offset 84, -84 22304 .cfi_offset 85, -80 22305 .cfi_offset 86, -76 22306 .cfi_offset 87, -72 22307 .cfi_offset 88, -68 22308 .cfi_offset 89, -64 22309 .cfi_offset 90, -60 22310 .cfi_offset 91, -56 22311 .cfi_offset 92, -52 22312 .cfi_offset 93, -48 22313 .cfi_offset 94, -44 22314 .cfi_offset 95, -40 22315 0008 1E46 mov r6, r3 22316 000a 9FB0 sub sp, sp, #124 22317 .LCFI255: 22318 .cfi_def_cfa_offset 224 22319 000c 0346 mov r3, r0 22320 .LVL2353: 22321 000e 0433 adds r3, r3, #4 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7; 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint32_t i1, i2, i3, i4, i5, i6, i7, i8; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint32_t id; 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint32_t n1, n2, j; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t r1, r2, r3, r4, r5, r6, r7, r8; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t t1, t2; 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t s1, s2, s3, s4, s5, s6, s7, s8; 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t p1, p2, p3, p4; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t co2, co3, co4, co5, co6, co7, co8; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** float32_t si2, si3, si4, si5, si6, si7, si8; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** const float32_t C81 = 0.70710678118f; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** n2 = fftLen; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ARM GAS /tmp/ccfbYRip.s page 692 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** do 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** { 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** n1 = n2; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** n2 = n2 >> 3; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i1 = 0; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** do 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i2 = i1 + n2; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i3 = i2 + n2; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i4 = i3 + n2; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i5 = i4 + n2; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i6 = i5 + n2; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i7 = i6 + n2; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i8 = i7 + n2; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = pSrc[2 * i1] + pSrc[2 * i5]; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2] + pSrc[2 * i6]; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = pSrc[2 * i3] + pSrc[2 * i7]; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4] + pSrc[2 * i8]; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r1 - r3; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + r3; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = r2 - r4; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1] = r1 + r2; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5] = r1 - r2; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = r1 - s3; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + s3; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = r2 - r4; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1 + 1] = r1 + r2; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = r1 - r2; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3] = t1 + s3; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7] = t1 - s3; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = t2 - r3; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = t2 + r3; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = (r6 + r8) * C81; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = (s6 - s8) * C81; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = (s6 + s8) * C81; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r5 - r1; 22322 .loc 26 117 0 22323 0010 9FEDC2BA vldr.32 s22, .L1069 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7; 22324 .loc 26 50 0 22325 0014 1A90 str r0, [sp, #104] ARM GAS /tmp/ccfbYRip.s page 693 22326 0016 8A46 mov r10, r1 22327 0018 1D92 str r2, [sp, #116] 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22328 .loc 26 64 0 22329 001a 8B46 mov fp, r1 22330 001c 1C93 str r3, [sp, #112] 22331 001e 0196 str r6, [sp, #4] 22332 .LVL2354: 22333 .L1063: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i1 = 0; 22334 .loc 26 69 0 22335 0020 4FEADB03 lsr r3, fp, #3 22336 .LVL2355: 22337 0024 DE00 lsls r6, r3, #3 22338 0026 0396 str r6, [sp, #12] 22339 0028 039E ldr r6, [sp, #12] 22340 002a 1293 str r3, [sp, #72] 22341 002c 4FEA8308 lsl r8, r3, #2 22342 0030 A3EB0802 sub r2, r3, r8 22343 0034 B646 mov lr, r6 22344 0036 9844 add r8, r8, r3 22345 0038 5901 lsls r1, r3, #5 22346 003a AEEB030E sub lr, lr, r3 22347 003e 4FEAC806 lsl r6, r8, #3 22348 0042 D200 lsls r2, r2, #3 22349 0044 03EB4303 add r3, r3, r3, lsl #1 22350 .LVL2356: 22351 0048 00EB010C add ip, r0, r1 22352 004c 0696 str r6, [sp, #24] 22353 004e 4FEACE06 lsl r6, lr, #3 22354 0052 0CEB0207 add r7, ip, r2 22355 0056 0896 str r6, [sp, #32] 22356 0058 DE00 lsls r6, r3, #3 22357 005a 7D18 adds r5, r7, r1 22358 005c 0596 str r6, [sp, #20] 22359 005e 1E01 lsls r6, r3, #4 22360 0060 129B ldr r3, [sp, #72] 22361 0062 0796 str r6, [sp, #28] 22362 0064 AC18 adds r4, r5, r2 22363 0066 1B01 lsls r3, r3, #4 22364 0068 6018 adds r0, r4, r1 22365 006a 0244 add r2, r2, r0 22366 006c 0493 str r3, [sp, #16] 22367 006e DDF870E0 ldr lr, [sp, #112] 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22368 .loc 26 70 0 22369 0072 019E ldr r6, [sp, #4] 22370 0074 4FEACB03 lsl r3, fp, #3 22371 0078 02EB0108 add r8, r2, r1 22372 007c 0293 str r3, [sp, #8] 22373 007e 4FF00009 mov r9, #0 22374 .LVL2357: 22375 .L1059: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22376 .loc 26 81 0 discriminator 1 22377 0082 1EED011A vldr.32 s2, [lr, #-4] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; ARM GAS /tmp/ccfbYRip.s page 694 22378 .loc 26 85 0 discriminator 1 22379 0086 D4ED001A vldr.32 s3, [r4] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 22380 .loc 26 83 0 discriminator 1 22381 008a D5ED005A vldr.32 s11, [r5] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 22382 .loc 26 87 0 discriminator 1 22383 008e D8ED004A vldr.32 s9, [r8] 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22384 .loc 26 81 0 discriminator 1 22385 0092 9CED003A vldr.32 s6, [ip] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 22386 .loc 26 85 0 discriminator 1 22387 0096 D0ED003A vldr.32 s7, [r0] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 22388 .loc 26 83 0 discriminator 1 22389 009a 97ED005A vldr.32 s10, [r7] 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 22390 .loc 26 87 0 discriminator 1 22391 009e 92ED004A vldr.32 s8, [r2] 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22392 .loc 26 81 0 discriminator 1 22393 00a2 31EE032A vadd.f32 s4, s2, s6 22394 .LVL2358: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 22395 .loc 26 87 0 discriminator 1 22396 00a6 74EE248A vadd.f32 s17, s8, s9 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 22397 .loc 26 85 0 discriminator 1 22398 00aa 71EEA36A vadd.f32 s13, s3, s7 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 22399 .loc 26 83 0 discriminator 1 22400 00ae 35EE257A vadd.f32 s14, s10, s11 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = r2 - r4; 22401 .loc 26 90 0 discriminator 1 22402 00b2 32EE266A vadd.f32 s12, s4, s13 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1] = r1 + r2; 22403 .loc 26 92 0 discriminator 1 22404 00b6 77EE287A vadd.f32 s15, s14, s17 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = pSrc[2 * i3] + pSrc[2 * i7]; 22405 .loc 26 84 0 discriminator 1 22406 00ba 35EE655A vsub.f32 s10, s10, s11 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5] = r1 - r2; 22407 .loc 26 93 0 discriminator 1 22408 00be 76EE275A vadd.f32 s11, s12, s15 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; 22409 .loc 26 94 0 discriminator 1 22410 00c2 36EE676A vsub.f32 s12, s12, s15 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5] = r1 - r2; 22411 .loc 26 93 0 discriminator 1 22412 00c6 4EED015A vstr.32 s11, [lr, #-4] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; 22413 .loc 26 94 0 discriminator 1 22414 00ca 8CED006A vstr.32 s12, [ip] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 22415 .loc 26 97 0 discriminator 1 22416 00ce 97ED01AA vldr.32 s20, [r7, #4] ARM GAS /tmp/ccfbYRip.s page 695 22417 00d2 D5ED012A vldr.32 s5, [r5, #4] 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; 22418 .loc 26 101 0 discriminator 1 22419 00d6 92ED016A vldr.32 s12, [r2, #4] 22420 00da D8ED019A vldr.32 s19, [r8, #4] 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 22421 .loc 26 99 0 discriminator 1 22422 00de 90ED018A vldr.32 s16, [r0, #4] 22423 00e2 D4ED015A vldr.32 s11, [r4, #4] 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 22424 .loc 26 95 0 discriminator 1 22425 00e6 DEED007A vldr.32 s15, [lr] 22426 00ea 9CED019A vldr.32 s18, [ip, #4] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r1 - r3; 22427 .loc 26 88 0 discriminator 1 22428 00ee 34EE644A vsub.f32 s8, s8, s9 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = r1 - s3; 22429 .loc 26 102 0 discriminator 1 22430 00f2 36EE690A vsub.f32 s0, s12, s19 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; 22431 .loc 26 98 0 discriminator 1 22432 00f6 7AEE624A vsub.f32 s9, s20, s5 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; 22433 .loc 26 100 0 discriminator 1 22434 00fa 75EEC80A vsub.f32 s1, s11, s16 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2] + pSrc[2 * i6]; 22435 .loc 26 82 0 discriminator 1 22436 00fe 31EE433A vsub.f32 s6, s2, s6 22437 .LVL2359: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4] + pSrc[2 * i8]; 22438 .loc 26 86 0 discriminator 1 22439 0102 71EEE33A vsub.f32 s7, s3, s7 22440 .LVL2360: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r5 - r1; 22441 .loc 26 116 0 discriminator 1 22442 0106 74EE801A vadd.f32 s3, s9, s0 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; 22443 .loc 26 96 0 discriminator 1 22444 010a 37EEC91A vsub.f32 s2, s15, s18 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = (s6 + s8) * C81; 22445 .loc 26 115 0 discriminator 1 22446 010e 74EEC04A vsub.f32 s9, s9, s0 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 22447 .loc 26 99 0 discriminator 1 22448 0112 75EE885A vadd.f32 s11, s11, s16 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = (r6 + r8) * C81; 22449 .loc 26 113 0 discriminator 1 22450 0116 35EE440A vsub.f32 s0, s10, s8 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 + r1; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = r7 - r6; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = r7 + r6; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - r2; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + r2; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = s7 - s6; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = s7 + s6; 22451 .loc 26 124 0 discriminator 1 22452 011a B0EE608A vmov.f32 s16, s1 ARM GAS /tmp/ccfbYRip.s page 696 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = (s6 - s8) * C81; 22453 .loc 26 114 0 discriminator 1 22454 011e 35EE045A vadd.f32 s10, s10, s8 22455 .LVL2361: 22456 .loc 26 124 0 discriminator 1 22457 0122 A1EE8B8A vfma.f32 s16, s3, s22 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2] = r5 + s7; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8] = r5 - s7; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6] = t1 + s8; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4] = t1 - s8; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = s5 - r7; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = s5 + r7; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = t2 - r8; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = t2 + r8; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i1 += n1; 22458 .loc 26 134 0 discriminator 1 22459 0126 D944 add r9, r9, fp 22460 .LVL2362: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } while (i1 < fftLen); 22461 .loc 26 135 0 discriminator 1 22462 0128 CA45 cmp r10, r9 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = s7 + s6; 22463 .loc 26 123 0 discriminator 1 22464 012a E1EECB0A vfms.f32 s1, s3, s22 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 + r1; 22465 .loc 26 117 0 discriminator 1 22466 012e B0EE434A vmov.f32 s8, s6 22467 .LVL2363: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = r7 - r6; 22468 .loc 26 118 0 discriminator 1 22469 0132 F0EE431A vmov.f32 s3, s6 22470 0136 E0EE0B1A vfma.f32 s3, s0, s22 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 + r1; 22471 .loc 26 117 0 discriminator 1 22472 013a A0EE4B4A vfms.f32 s8, s0, s22 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + r2; 22473 .loc 26 121 0 discriminator 1 22474 013e B0EE413A vmov.f32 s6, s2 22475 .LVL2364: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = s7 - s6; 22476 .loc 26 122 0 discriminator 1 22477 0142 B0EE410A vmov.f32 s0, s2 22478 0146 A4EE8B0A vfma.f32 s0, s9, s22 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + r2; 22479 .loc 26 121 0 discriminator 1 22480 014a A4EECB3A vfms.f32 s6, s9, s22 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - r2; 22481 .loc 26 120 0 discriminator 1 22482 014e F0EE634A vmov.f32 s9, s7 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = r7 + r6; 22483 .loc 26 119 0 discriminator 1 22484 0152 E5EE4B3A vfms.f32 s7, s10, s22 22485 .LVL2365: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 22486 .loc 26 97 0 discriminator 1 22487 0156 7AEE222A vadd.f32 s5, s20, s5 ARM GAS /tmp/ccfbYRip.s page 697 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - r2; 22488 .loc 26 120 0 discriminator 1 22489 015a E5EE0B4A vfma.f32 s9, s10, s22 22490 .LVL2366: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; 22491 .loc 26 101 0 discriminator 1 22492 015e 36EE296A vadd.f32 s12, s12, s19 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 22493 .loc 26 95 0 discriminator 1 22494 0162 77EE897A vadd.f32 s15, s15, s18 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 22495 .loc 26 91 0 discriminator 1 22496 0166 37EE687A vsub.f32 s14, s14, s17 22497 .LVL2367: 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = r7 + r6; 22498 .loc 26 119 0 discriminator 1 22499 016a B0EE635A vmov.f32 s10, s7 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + r3; 22500 .loc 26 89 0 discriminator 1 22501 016e 72EE666A vsub.f32 s13, s4, s13 22502 .LVL2368: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = r2 - r4; 22503 .loc 26 104 0 discriminator 1 22504 0172 77EEA53A vadd.f32 s7, s15, s11 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1 + 1] = r1 + r2; 22505 .loc 26 106 0 discriminator 1 22506 0176 32EE862A vadd.f32 s4, s5, s12 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + s3; 22507 .loc 26 103 0 discriminator 1 22508 017a 77EEE57A vsub.f32 s15, s15, s11 22509 .LVL2369: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 22510 .loc 26 105 0 discriminator 1 22511 017e 32EEC66A vsub.f32 s12, s5, s12 22512 .LVL2370: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = r1 - r2; 22513 .loc 26 107 0 discriminator 1 22514 0182 73EE828A vadd.f32 s17, s7, s4 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7] = t1 - s3; 22515 .loc 26 109 0 discriminator 1 22516 0186 36EE861A vadd.f32 s2, s13, s12 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3] = t1 + s3; 22517 .loc 26 108 0 discriminator 1 22518 018a 73EEC23A vsub.f32 s7, s7, s4 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = t2 - r3; 22519 .loc 26 110 0 discriminator 1 22520 018e 76EEC66A vsub.f32 s13, s13, s12 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = t2 + r3; 22521 .loc 26 111 0 discriminator 1 22522 0192 37EEC72A vsub.f32 s4, s15, s14 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8] = r5 - s7; 22523 .loc 26 125 0 discriminator 1 22524 0196 71EE882A vadd.f32 s5, s3, s16 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 22525 .loc 26 112 0 discriminator 1 22526 019a 77EE277A vadd.f32 s15, s14, s15 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4] = t1 - s8; ARM GAS /tmp/ccfbYRip.s page 698 22527 .loc 26 127 0 discriminator 1 22528 019e 74EE205A vadd.f32 s11, s8, s1 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = s5 + r7; 22529 .loc 26 129 0 discriminator 1 22530 01a2 30EE646A vsub.f32 s12, s0, s9 22531 .LVL2371: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = t2 + r8; 22532 .loc 26 131 0 discriminator 1 22533 01a6 33EE457A vsub.f32 s14, s6, s10 22534 .LVL2372: 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6] = t1 + s8; 22535 .loc 26 126 0 discriminator 1 22536 01aa 71EEC81A vsub.f32 s3, s3, s16 22537 .LVL2373: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = s5 - r7; 22538 .loc 26 128 0 discriminator 1 22539 01ae 34EE604A vsub.f32 s8, s8, s1 22540 .LVL2374: 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = t2 - r8; 22541 .loc 26 130 0 discriminator 1 22542 01b2 74EE804A vadd.f32 s9, s9, s0 22543 .LVL2375: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22544 .loc 26 132 0 discriminator 1 22545 01b6 35EE035A vadd.f32 s10, s10, s6 22546 .LVL2376: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = r1 - r2; 22547 .loc 26 107 0 discriminator 1 22548 01ba CEED008A vstr.32 s17, [lr] 22549 .LVL2377: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3] = t1 + s3; 22550 .loc 26 108 0 discriminator 1 22551 01be CCED013A vstr.32 s7, [ip, #4] 22552 01c2 9E44 add lr, lr, r3 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7] = t1 - s3; 22553 .loc 26 109 0 discriminator 1 22554 01c4 84ED001A vstr.32 s2, [r4] 22555 01c8 9C44 add ip, ip, r3 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = t2 - r3; 22556 .loc 26 110 0 discriminator 1 22557 01ca C0ED006A vstr.32 s13, [r0] 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = t2 + r3; 22558 .loc 26 111 0 discriminator 1 22559 01ce 84ED012A vstr.32 s4, [r4, #4] 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 22560 .loc 26 112 0 discriminator 1 22561 01d2 C0ED017A vstr.32 s15, [r0, #4] 22562 01d6 1C44 add r4, r4, r3 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8] = r5 - s7; 22563 .loc 26 125 0 discriminator 1 22564 01d8 C7ED002A vstr.32 s5, [r7] 22565 01dc 1844 add r0, r0, r3 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6] = t1 + s8; 22566 .loc 26 126 0 discriminator 1 22567 01de C8ED001A vstr.32 s3, [r8] 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4] = t1 - s8; 22568 .loc 26 127 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 699 22569 01e2 C5ED005A vstr.32 s11, [r5] 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = s5 - r7; 22570 .loc 26 128 0 discriminator 1 22571 01e6 82ED004A vstr.32 s8, [r2] 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = s5 + r7; 22572 .loc 26 129 0 discriminator 1 22573 01ea 87ED016A vstr.32 s12, [r7, #4] 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = t2 - r8; 22574 .loc 26 130 0 discriminator 1 22575 01ee C8ED014A vstr.32 s9, [r8, #4] 22576 01f2 1F44 add r7, r7, r3 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = t2 + r8; 22577 .loc 26 131 0 discriminator 1 22578 01f4 85ED017A vstr.32 s14, [r5, #4] 22579 01f8 9844 add r8, r8, r3 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22580 .loc 26 132 0 discriminator 1 22581 01fa 82ED015A vstr.32 s10, [r2, #4] 22582 01fe 1D44 add r5, r5, r3 22583 0200 1A44 add r2, r2, r3 22584 .loc 26 135 0 discriminator 1 22585 0202 3FF63EAF bhi .L1059 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** if (n2 < 8) 22586 .loc 26 137 0 22587 0206 129A ldr r2, [sp, #72] 22588 0208 0293 str r3, [sp, #8] 22589 020a 072A cmp r2, #7 22590 020c 40F2C281 bls .L1058 22591 0210 1D9A ldr r2, [sp, #116] 22592 0212 0196 str r6, [sp, #4] 22593 .LVL2378: 22594 0214 F600 lsls r6, r6, #3 22595 0216 9319 adds r3, r2, r6 22596 0218 9A19 adds r2, r3, r6 22597 021a 9019 adds r0, r2, r6 22598 021c 0F90 str r0, [sp, #60] 22599 021e 3044 add r0, r0, r6 22600 0220 1B93 str r3, [sp, #108] 22601 0222 0E90 str r0, [sp, #56] 22602 0224 019B ldr r3, [sp, #4] 22603 0226 1192 str r2, [sp, #68] 22604 0228 3044 add r0, r0, r6 22605 022a 0246 mov r2, r0 22606 022c 02EB0609 add r9, r2, r6 22607 .LVL2379: 22608 0230 F21A subs r2, r6, r3 22609 0232 0D90 str r0, [sp, #52] 22610 0234 0398 ldr r0, [sp, #12] 22611 0236 0392 str r2, [sp, #12] 22612 0238 03EB8302 add r2, r3, r3, lsl #2 22613 023c 03EB4308 add r8, r3, r3, lsl #1 22614 0240 1346 mov r3, r2 22615 0242 1A9A ldr r2, [sp, #104] 22616 0244 069C ldr r4, [sp, #24] 22617 0246 079F ldr r7, [sp, #28] 22618 0248 059D ldr r5, [sp, #20] ARM GAS /tmp/ccfbYRip.s page 700 22619 024a 1996 str r6, [sp, #100] 22620 024c 0830 adds r0, r0, #8 22621 024e 1018 adds r0, r2, r0 22622 0250 04F1080E add lr, r4, #8 22623 0254 0990 str r0, [sp, #36] 22624 0256 049C ldr r4, [sp, #16] 22625 0258 1046 mov r0, r2 22626 025a 7044 add r0, r0, lr 22627 025c 04F1080C add ip, r4, #8 22628 0260 089C ldr r4, [sp, #32] 22629 0262 0890 str r0, [sp, #32] 22630 0264 1046 mov r0, r2 22631 0266 6044 add r0, r0, ip 22632 0268 0831 adds r1, r1, #8 22633 026a 0837 adds r7, r7, #8 22634 026c 5118 adds r1, r2, r1 22635 026e 0790 str r0, [sp, #28] 22636 0270 0835 adds r5, r5, #8 22637 0272 D019 adds r0, r2, r7 22638 0274 0A91 str r1, [sp, #40] 22639 0276 0690 str r0, [sp, #24] 22640 0278 1199 ldr r1, [sp, #68] 22641 027a 1091 str r1, [sp, #64] 22642 027c 5019 adds r0, r2, r5 22643 027e 0834 adds r4, r4, #8 22644 0280 0399 ldr r1, [sp, #12] 22645 0282 0590 str r0, [sp, #20] 22646 0284 1019 adds r0, r2, r4 22647 0286 0490 str r0, [sp, #16] 22648 0288 09EB0600 add r0, r9, r6 22649 028c 0C90 str r0, [sp, #48] 22650 028e C800 lsls r0, r1, #3 22651 0290 1890 str r0, [sp, #96] 22652 0292 4FEAC800 lsl r0, r8, #3 22653 0296 D900 lsls r1, r3, #3 22654 0298 1590 str r0, [sp, #84] 22655 029a 4FEA0810 lsl r0, r8, #4 22656 029e 1691 str r1, [sp, #88] 22657 02a0 1790 str r0, [sp, #92] 22658 02a2 0198 ldr r0, [sp, #4] 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** break; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia1 = 0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** j = 1; 22659 .loc 26 141 0 22660 02a4 029B ldr r3, [sp, #8] 22661 02a6 0101 lsls r1, r0, #4 22662 02a8 0832 adds r2, r2, #8 22663 02aa 1491 str r1, [sp, #80] 22664 02ac 0B92 str r2, [sp, #44] 22665 02ae 4101 lsls r1, r0, #5 22666 02b0 1B9A ldr r2, [sp, #108] 22667 02b2 1391 str r1, [sp, #76] 22668 02b4 4FF00108 mov r8, #1 22669 .LVL2380: 22670 .L1062: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ARM GAS /tmp/ccfbYRip.s page 701 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** do 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** { 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /* index calculation for the coefficients */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** id = ia1 + twidCoefModifier; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia1 = id; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia2 = ia1 + id; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia3 = ia2 + id; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia4 = ia3 + id; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia5 = ia4 + id; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia6 = ia5 + id; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** ia7 = ia6 + id; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co2 = pCoef[2 * ia1]; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co3 = pCoef[2 * ia2]; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co4 = pCoef[2 * ia3]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co5 = pCoef[2 * ia4]; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co6 = pCoef[2 * ia5]; 22671 .loc 26 159 0 22672 02b8 0D9D ldr r5, [sp, #52] 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co4 = pCoef[2 * ia3]; 22673 .loc 26 156 0 22674 02ba 1099 ldr r1, [sp, #64] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co7 = pCoef[2 * ia6]; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co8 = pCoef[2 * ia7]; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si2 = pCoef[2 * ia1 + 1]; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si3 = pCoef[2 * ia2 + 1]; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si4 = pCoef[2 * ia3 + 1]; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si5 = pCoef[2 * ia4 + 1]; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si6 = pCoef[2 * ia5 + 1]; 22675 .loc 26 166 0 22676 02bc D5ED017A vldr.32 s15, [r5, #4] 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co5 = pCoef[2 * ia4]; 22677 .loc 26 157 0 22678 02c0 0F98 ldr r0, [sp, #60] 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co6 = pCoef[2 * ia5]; 22679 .loc 26 158 0 22680 02c2 0E9C ldr r4, [sp, #56] 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si2 = pCoef[2 * ia1 + 1]; 22681 .loc 26 161 0 22682 02c4 0C9E ldr r6, [sp, #48] 22683 .loc 26 166 0 22684 02c6 CDED017A vstr.32 s15, [sp, #4] 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si7 = pCoef[2 * ia6 + 1]; 22685 .loc 26 167 0 22686 02ca D9ED017A vldr.32 s15, [r9, #4] 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co3 = pCoef[2 * ia2]; 22687 .loc 26 155 0 22688 02ce 92ED00FA vldr.32 s30, [r2] 22689 .LVL2381: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co4 = pCoef[2 * ia3]; 22690 .loc 26 156 0 22691 02d2 D1ED00EA vldr.32 s29, [r1] 22692 .LVL2382: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co5 = pCoef[2 * ia4]; 22693 .loc 26 157 0 22694 02d6 90ED00EA vldr.32 s28, [r0] 22695 .LVL2383: ARM GAS /tmp/ccfbYRip.s page 702 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co6 = pCoef[2 * ia5]; 22696 .loc 26 158 0 22697 02da D4ED00DA vldr.32 s27, [r4] 22698 .LVL2384: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co7 = pCoef[2 * ia6]; 22699 .loc 26 159 0 22700 02de 95ED00DA vldr.32 s26, [r5] 22701 .LVL2385: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si2 = pCoef[2 * ia1 + 1]; 22702 .loc 26 161 0 22703 02e2 96ED00CA vldr.32 s24, [r6] 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si3 = pCoef[2 * ia2 + 1]; 22704 .loc 26 162 0 22705 02e6 D2ED01BA vldr.32 s23, [r2, #4] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si4 = pCoef[2 * ia3 + 1]; 22706 .loc 26 163 0 22707 02ea D1ED01AA vldr.32 s21, [r1, #4] 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si5 = pCoef[2 * ia4 + 1]; 22708 .loc 26 164 0 22709 02ee 90ED01AA vldr.32 s20, [r0, #4] 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si6 = pCoef[2 * ia5 + 1]; 22710 .loc 26 165 0 22711 02f2 D4ED019A vldr.32 s19, [r4, #4] 22712 .loc 26 167 0 22713 02f6 CDED027A vstr.32 s15, [sp, #8] 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** si8 = pCoef[2 * ia7 + 1]; 22714 .loc 26 168 0 22715 02fa DDE904C7 ldrd ip, r7, [sp, #16] 22716 02fe D6ED017A vldr.32 s15, [r6, #4] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** co8 = pCoef[2 * ia7]; 22717 .loc 26 160 0 22718 0302 D9ED00CA vldr.32 s25, [r9] 22719 .LVL2386: 22720 .loc 26 168 0 22721 0306 CDED037A vstr.32 s15, [sp, #12] 22722 .LVL2387: 22723 030a DDE90665 ldrd r6, r5, [sp, #24] 22724 030e DDE90840 ldrd r4, r0, [sp, #32] 22725 0312 DDE90A12 ldrd r1, r2, [sp, #40] 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i1 = j; 22726 .loc 26 170 0 22727 0316 C646 mov lr, r8 22728 0318 02E0 b .L1070 22729 .L1071: 22730 031a 00BF .align 2 22731 .L1069: 22732 031c F304353F .word 1060439283 22733 .L1070: 22734 .LVL2388: 22735 .L1061: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** do 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** /* index calculation for the input */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i2 = i1 + n2; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i3 = i2 + n2; ARM GAS /tmp/ccfbYRip.s page 703 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i4 = i3 + n2; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i5 = i4 + n2; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i6 = i5 + n2; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i7 = i6 + n2; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i8 = i7 + n2; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = pSrc[2 * i1] + pSrc[2 * i5]; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2] + pSrc[2 * i6]; 22736 .loc 26 184 0 discriminator 1 22737 0320 94ED006A vldr.32 s12, [r4] 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22738 .loc 26 182 0 discriminator 1 22739 0324 D2ED00FA vldr.32 s31, [r2] 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = pSrc[2 * i3] + pSrc[2 * i7]; 22740 .loc 26 186 0 discriminator 1 22741 0328 D6ED002A vldr.32 s5, [r6] 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4] + pSrc[2 * i8]; 22742 .loc 26 188 0 discriminator 1 22743 032c D7ED005A vldr.32 s11, [r7] 22744 0330 DCED006A vldr.32 s13, [ip] 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22745 .loc 26 182 0 discriminator 1 22746 0334 91ED007A vldr.32 s14, [r1] 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 22747 .loc 26 186 0 discriminator 1 22748 0338 D5ED007A vldr.32 s15, [r5] 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 22749 .loc 26 184 0 discriminator 1 22750 033c 90ED002A vldr.32 s4, [r0] 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r1 - r3; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + r3; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = r2 - r4; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1] = r1 + r2; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r1 - r2; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; 22751 .loc 26 196 0 discriminator 1 22752 0340 92ED018A vldr.32 s16, [r2, #4] 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = pSrc[2 * i1] - pSrc[2 * i5]; 22753 .loc 26 182 0 discriminator 1 22754 0344 7FEE870A vadd.f32 s1, s31, s14 22755 .LVL2389: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = pSrc[2 * i2] - pSrc[2 * i6]; 22756 .loc 26 184 0 discriminator 1 22757 0348 32EE061A vadd.f32 s2, s4, s12 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = pSrc[2 * i3] - pSrc[2 * i7]; 22758 .loc 26 186 0 discriminator 1 22759 034c 37EEA24A vadd.f32 s8, s15, s5 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = pSrc[2 * i4] - pSrc[2 * i8]; 22760 .loc 26 188 0 discriminator 1 22761 0350 75EEA64A vadd.f32 s9, s11, s13 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = r2 - r4; 22762 .loc 26 191 0 discriminator 1 22763 0354 70EE841A vadd.f32 s3, s1, s8 ARM GAS /tmp/ccfbYRip.s page 704 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1] = r1 + r2; 22764 .loc 26 193 0 discriminator 1 22765 0358 31EE245A vadd.f32 s10, s2, s9 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r3 = pSrc[2 * i3] + pSrc[2 * i7]; 22766 .loc 26 185 0 discriminator 1 22767 035c 32EE462A vsub.f32 s4, s4, s12 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r1 - r2; 22768 .loc 26 194 0 discriminator 1 22769 0360 31EE856A vadd.f32 s12, s3, s10 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r1 - r3; 22770 .loc 26 189 0 discriminator 1 22771 0364 75EEE65A vsub.f32 s11, s11, s13 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r1 - r2; 22772 .loc 26 194 0 discriminator 1 22773 0368 82ED006A vstr.32 s12, [r2] 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; 22774 .loc 26 202 0 discriminator 1 22775 036c D7ED018A vldr.32 s17, [r7, #4] 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 22776 .loc 26 198 0 discriminator 1 22777 0370 90ED019A vldr.32 s18, [r0, #4] 22778 0374 94ED013A vldr.32 s6, [r4, #4] 22779 .loc 26 202 0 discriminator 1 22780 0378 9CED016A vldr.32 s12, [ip, #4] 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 22781 .loc 26 200 0 discriminator 1 22782 037c 95ED010A vldr.32 s0, [r5, #4] 22783 0380 D6ED016A vldr.32 s13, [r6, #4] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 22784 .loc 26 196 0 discriminator 1 22785 0384 D1ED013A vldr.32 s7, [r1, #4] 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = pSrc[2 * i2] + pSrc[2 * i6]; 22786 .loc 26 183 0 discriminator 1 22787 0388 3FEEC77A vsub.f32 s14, s31, s14 22788 .LVL2390: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r4 = pSrc[2 * i4] + pSrc[2 * i8]; 22789 .loc 26 187 0 discriminator 1 22790 038c 77EEE27A vsub.f32 s15, s15, s5 22791 .LVL2391: 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; 22792 .loc 26 203 0 discriminator 1 22793 0390 78EEC6FA vsub.f32 s31, s17, s12 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; 22794 .loc 26 199 0 discriminator 1 22795 0394 79EE432A vsub.f32 s5, s18, s6 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; 22796 .loc 26 198 0 discriminator 1 22797 0398 39EE033A vadd.f32 s6, s18, s6 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; 22798 .loc 26 201 0 discriminator 1 22799 039c 30EE669A vsub.f32 s18, s0, s13 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; ARM GAS /tmp/ccfbYRip.s page 705 22800 .loc 26 202 0 discriminator 1 22801 03a0 38EE866A vadd.f32 s12, s17, s12 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; 22802 .loc 26 200 0 discriminator 1 22803 03a4 70EE266A vadd.f32 s13, s0, s13 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; 22804 .loc 26 197 0 discriminator 1 22805 03a8 78EE638A vsub.f32 s17, s16, s7 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s1 - s3; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = s1 + s3; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = s2 - s4; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = s2 + s4; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = t1 + s3; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = t1 - s3; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1 + 1] = s1 + s2; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = s1 - s2; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = t2 - r3; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = t2 + r3; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co5 * r2; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si5 * s2; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co5 * s2; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si5 * r2; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5] = p1 + p2; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = p3 - p4; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co3 * r1; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si3 * s1; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co3 * s1; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si3 * r1; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3] = p1 + p2; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = p3 - p4; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co7 * t1; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si7 * t2; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co7 * t2; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si7 * t1; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7] = p1 + p2; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = p3 - p4; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = (r6 + r8) * C81; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = (s6 - s8) * C81; 22806 .loc 26 234 0 discriminator 1 22807 03ac 32EEEF0A vsub.f32 s0, s5, s31 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = (s6 + s8) * C81; 22808 .loc 26 235 0 discriminator 1 22809 03b0 72EEAF2A vadd.f32 s5, s5, s31 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; 22810 .loc 26 196 0 discriminator 1 22811 03b4 78EE233A vadd.f32 s7, s16, s7 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r1 + r3; 22812 .loc 26 190 0 discriminator 1 22813 03b8 30EEC44A vsub.f32 s8, s1, s8 22814 .LVL2392: 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = (s6 - s8) * C81; 22815 .loc 26 233 0 discriminator 1 22816 03bc 32EE258A vadd.f32 s16, s4, s11 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = r5 - r1; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 + r1; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = r7 - r6; ARM GAS /tmp/ccfbYRip.s page 706 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = r7 + r6; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - s1; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + s1; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = s7 - s6; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = s7 + s6; 22817 .loc 26 243 0 discriminator 1 22818 03c0 F0EE490A vmov.f32 s1, s18 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = (r6 + r8) * C81; 22819 .loc 26 232 0 discriminator 1 22820 03c4 72EE655A vsub.f32 s11, s4, s11 22821 .LVL2393: 22822 .loc 26 243 0 discriminator 1 22823 03c8 E2EE8B0A vfma.f32 s1, s5, s22 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = r5 + s7; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 - s7; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = t1 + s8; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = t1 - s8; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = s5 - r7; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + r7; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = t2 - r8; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = t2 + r8; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co2 * r1; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si2 * s1; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co2 * s1; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si2 * r1; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2] = p1 + p2; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = p3 - p4; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co8 * r5; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si8 * s5; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co8 * s5; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si8 * r5; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8] = p1 + p2; 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = p3 - p4; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co6 * r6; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si6 * s6; 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co6 * s6; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si6 * r6; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6] = p1 + p2; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = p3 - p4; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co4 * t1; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p2 = si4 * t2; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co4 * t2; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p4 = si4 * t1; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4] = p1 + p2; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = p3 - p4; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** i1 += n1; 22824 .loc 26 277 0 discriminator 1 22825 03cc DE44 add lr, lr, fp 22826 .LVL2394: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } while (i1 < fftLen); 22827 .loc 26 278 0 discriminator 1 22828 03ce F245 cmp r10, lr 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s7 = s7 + s6; 22829 .loc 26 242 0 discriminator 1 22830 03d0 A2EECB9A vfms.f32 s18, s5, s22 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = s7 - s6; ARM GAS /tmp/ccfbYRip.s page 707 22831 .loc 26 241 0 discriminator 1 22832 03d4 B0EE682A vmov.f32 s4, s17 22833 .LVL2395: 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r8 = r7 - r6; 22834 .loc 26 237 0 discriminator 1 22835 03d8 F0EE472A vmov.f32 s5, s14 22836 03dc E5EE8B2A vfma.f32 s5, s11, s22 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 + r1; 22837 .loc 26 236 0 discriminator 1 22838 03e0 A5EECB7A vfms.f32 s14, s11, s22 22839 .LVL2396: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s8 = s7 - s6; 22840 .loc 26 241 0 discriminator 1 22841 03e4 A0EE0B2A vfma.f32 s4, s0, s22 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = t1 + s3; 22842 .loc 26 207 0 discriminator 1 22843 03e8 73EE065A vadd.f32 s11, s6, s12 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + s1; 22844 .loc 26 240 0 discriminator 1 22845 03ec E0EE4B8A vfms.f32 s17, s0, s22 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - s1; 22846 .loc 26 239 0 discriminator 1 22847 03f0 F0EE67FA vmov.f32 s31, s15 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s3 = s2 - s4; 22848 .loc 26 205 0 discriminator 1 22849 03f4 33EEA60A vadd.f32 s0, s7, s13 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r7 = r7 + r6; 22850 .loc 26 238 0 discriminator 1 22851 03f8 E8EE4B7A vfms.f32 s15, s16, s22 22852 .LVL2397: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r2 = r2 + r4; 22853 .loc 26 192 0 discriminator 1 22854 03fc 71EE644A vsub.f32 s9, s2, s9 22855 .LVL2398: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; 22856 .loc 26 195 0 discriminator 1 22857 0400 31EEC55A vsub.f32 s10, s3, s10 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = s2 + s4; 22858 .loc 26 206 0 discriminator 1 22859 0404 33EE463A vsub.f32 s6, s6, s12 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = t2 - r3; 22860 .loc 26 211 0 discriminator 1 22861 0408 70EE651A vsub.f32 s3, s0, s11 22862 .LVL2399: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = s1 + s3; 22863 .loc 26 204 0 discriminator 1 22864 040c 73EEE63A vsub.f32 s7, s7, s13 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = t1 - s3; 22865 .loc 26 208 0 discriminator 1 22866 0410 34EE036A vadd.f32 s12, s8, s6 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r5 = r5 - s7; 22867 .loc 26 244 0 discriminator 1 22868 0414 72EEA06A vadd.f32 s13, s5, s1 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i1 + 1] = s1 + s2; 22869 .loc 26 209 0 discriminator 1 22870 0418 34EE434A vsub.f32 s8, s8, s6 22871 .LVL2400: ARM GAS /tmp/ccfbYRip.s page 708 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r6 = t1 + s8; 22872 .loc 26 245 0 discriminator 1 22873 041c 72EEE00A vsub.f32 s1, s5, s1 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = t2 + r3; 22874 .loc 26 212 0 discriminator 1 22875 0420 33EEE43A vsub.f32 s6, s7, s9 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = s5 - s1; 22876 .loc 26 239 0 discriminator 1 22877 0424 E8EE0BFA vfma.f32 s31, s16, s22 22878 .LVL2401: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co5 * r2; 22879 .loc 26 213 0 discriminator 1 22880 0428 74EEA33A vadd.f32 s7, s9, s7 22881 .LVL2402: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co3 * r1; 22882 .loc 26 219 0 discriminator 1 22883 042c 65EE692A vnmul.f32 s5, s10, s19 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t1 = t1 - s8; 22884 .loc 26 246 0 discriminator 1 22885 0430 77EE094A vadd.f32 s9, s14, s18 22886 .LVL2403: 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s1 = s5 - r7; 22887 .loc 26 247 0 discriminator 1 22888 0434 37EE499A vsub.f32 s18, s14, s18 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** t2 = t2 + r8; 22889 .loc 26 250 0 discriminator 1 22890 0438 38EEE77A vsub.f32 s14, s17, s15 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co2 * r1; 22891 .loc 26 251 0 discriminator 1 22892 043c 77EEA88A vadd.f32 s17, s15, s17 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co5 * s2; 22893 .loc 26 215 0 discriminator 1 22894 0440 69EEA17A vmul.f32 s15, s19, s3 22895 .LVL2404: 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co7 * t2; 22896 .loc 26 227 0 discriminator 1 22897 0444 9DED028A vldr.32 s16, [sp, #8] 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = p3 - p4; 22898 .loc 26 218 0 discriminator 1 22899 0448 EDEE857A vfma.f32 s15, s27, s10 22900 .LVL2405: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co3 * r1; 22901 .loc 26 219 0 discriminator 1 22902 044c EDEEA12A vfma.f32 s5, s27, s3 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co7 * t1; 22903 .loc 26 225 0 discriminator 1 22904 0450 26EE6A5A vnmul.f32 s10, s12, s21 22905 .LVL2406: 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co3 * s1; 22906 .loc 26 221 0 discriminator 1 22907 0454 6AEE831A vmul.f32 s3, s21, s6 22908 .LVL2407: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s5 = s5 + r7; 22909 .loc 26 248 0 discriminator 1 22910 0458 32EE6F1A vsub.f32 s2, s4, s31 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co7 * t1; 22911 .loc 26 225 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 709 22912 045c AEEE835A vfma.f32 s10, s29, s6 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = p3 - p4; 22913 .loc 26 224 0 discriminator 1 22914 0460 EEEE861A vfma.f32 s3, s29, s12 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co7 * t2; 22915 .loc 26 227 0 discriminator 1 22916 0464 28EE233A vmul.f32 s6, s16, s7 22917 .LVL2408: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 22918 .loc 26 231 0 discriminator 1 22919 0468 24EE486A vnmul.f32 s12, s8, s16 22920 .LVL2409: 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s6 = t2 - r8; 22921 .loc 26 249 0 discriminator 1 22922 046c 3FEE822A vadd.f32 s4, s31, s4 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co8 * s5; 22923 .loc 26 259 0 discriminator 1 22924 0470 9DED038A vldr.32 s16, [sp, #12] 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = p3 - p4; 22925 .loc 26 230 0 discriminator 1 22926 0474 ACEE843A vfma.f32 s6, s25, s8 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 22927 .loc 26 231 0 discriminator 1 22928 0478 ACEEA36A vfma.f32 s12, s25, s7 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co2 * s1; 22929 .loc 26 253 0 discriminator 1 22930 047c 2BEE814A vmul.f32 s8, s23, s2 22931 .LVL2410: 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co8 * r5; 22932 .loc 26 257 0 discriminator 1 22933 0480 66EEEB3A vnmul.f32 s7, s13, s23 22934 .LVL2411: 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = p3 - p4; 22935 .loc 26 256 0 discriminator 1 22936 0484 AFEE264A vfma.f32 s8, s30, s13 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co8 * r5; 22937 .loc 26 257 0 discriminator 1 22938 0488 EFEE013A vfma.f32 s7, s30, s2 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co8 * s5; 22939 .loc 26 259 0 discriminator 1 22940 048c 68EE026A vmul.f32 s13, s16, s4 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co6 * r6; 22941 .loc 26 263 0 discriminator 1 22942 0490 20EEC81A vnmul.f32 s2, s1, s16 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co4 * t1; 22943 .loc 26 269 0 discriminator 1 22944 0494 9DED018A vldr.32 s16, [sp, #4] 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = p3 - p4; 22945 .loc 26 262 0 discriminator 1 22946 0498 ECEE206A vfma.f32 s13, s24, s1 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co6 * r6; 22947 .loc 26 263 0 discriminator 1 22948 049c ACEE021A vfma.f32 s2, s24, s4 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co4 * t1; 22949 .loc 26 269 0 discriminator 1 22950 04a0 64EEC80A vnmul.f32 s1, s9, s16 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co6 * s6; ARM GAS /tmp/ccfbYRip.s page 710 22951 .loc 26 265 0 discriminator 1 22952 04a4 28EE072A vmul.f32 s4, s16, s14 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co4 * t1; 22953 .loc 26 269 0 discriminator 1 22954 04a8 EDEE070A vfma.f32 s1, s26, s14 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = p3 - p4; 22955 .loc 26 268 0 discriminator 1 22956 04ac ADEE242A vfma.f32 s4, s26, s9 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p3 = co4 * t2; 22957 .loc 26 271 0 discriminator 1 22958 04b0 2AEE287A vmul.f32 s14, s20, s17 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22959 .loc 26 275 0 discriminator 1 22960 04b4 69EE4A4A vnmul.f32 s9, s18, s20 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = p3 - p4; 22961 .loc 26 274 0 discriminator 1 22962 04b8 AEEE097A vfma.f32 s14, s28, s18 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 22963 .loc 26 275 0 discriminator 1 22964 04bc EEEE284A vfma.f32 s9, s28, s17 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** s2 = s1 - s2; 22965 .loc 26 210 0 discriminator 1 22966 04c0 70EE255A vadd.f32 s11, s0, s11 22967 .LVL2412: 22968 04c4 C2ED015A vstr.32 s11, [r2, #4] 22969 .LVL2413: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i5 + 1] = p3 - p4; 22970 .loc 26 218 0 discriminator 1 22971 04c8 C1ED007A vstr.32 s15, [r1] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co3 * r1; 22972 .loc 26 219 0 discriminator 1 22973 04cc C1ED012A vstr.32 s5, [r1, #4] 22974 04d0 1A44 add r2, r2, r3 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i3 + 1] = p3 - p4; 22975 .loc 26 224 0 discriminator 1 22976 04d2 C5ED001A vstr.32 s3, [r5] 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co7 * t1; 22977 .loc 26 225 0 discriminator 1 22978 04d6 85ED015A vstr.32 s10, [r5, #4] 22979 .LVL2414: 22980 04da 1944 add r1, r1, r3 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i7 + 1] = p3 - p4; 22981 .loc 26 230 0 discriminator 1 22982 04dc 86ED003A vstr.32 s6, [r6] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** r1 = (r6 - r8) * C81; 22983 .loc 26 231 0 discriminator 1 22984 04e0 86ED016A vstr.32 s12, [r6, #4] 22985 04e4 1D44 add r5, r5, r3 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i2 + 1] = p3 - p4; 22986 .loc 26 256 0 discriminator 1 22987 04e6 80ED004A vstr.32 s8, [r0] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co8 * r5; 22988 .loc 26 257 0 discriminator 1 22989 04ea C0ED013A vstr.32 s7, [r0, #4] 22990 04ee 1E44 add r6, r6, r3 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i8 + 1] = p3 - p4; 22991 .loc 26 262 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 711 22992 04f0 CCED006A vstr.32 s13, [ip] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co6 * r6; 22993 .loc 26 263 0 discriminator 1 22994 04f4 8CED011A vstr.32 s2, [ip, #4] 22995 04f8 1844 add r0, r0, r3 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i6 + 1] = p3 - p4; 22996 .loc 26 268 0 discriminator 1 22997 04fa 84ED002A vstr.32 s4, [r4] 22998 04fe 9C44 add ip, ip, r3 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** p1 = co4 * t1; 22999 .loc 26 269 0 discriminator 1 23000 0500 C4ED010A vstr.32 s1, [r4, #4] 23001 .LVL2415: 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** pSrc[2 * i4 + 1] = p3 - p4; 23002 .loc 26 274 0 discriminator 1 23003 0504 87ED007A vstr.32 s14, [r7] 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 23004 .loc 26 275 0 discriminator 1 23005 0508 C7ED014A vstr.32 s9, [r7, #4] 23006 050c 1C44 add r4, r4, r3 23007 050e 1F44 add r7, r7, r3 23008 .loc 26 278 0 discriminator 1 23009 0510 3FF606AF bhi .L1061 23010 0514 109A ldr r2, [sp, #64] 23011 0516 1499 ldr r1, [sp, #80] 23012 0518 0A44 add r2, r2, r1 23013 051a 1092 str r2, [sp, #64] 23014 051c 1599 ldr r1, [sp, #84] 23015 051e 0F9A ldr r2, [sp, #60] 23016 0520 0A44 add r2, r2, r1 23017 0522 0F92 str r2, [sp, #60] 23018 0524 1399 ldr r1, [sp, #76] 23019 0526 0E9A ldr r2, [sp, #56] 23020 0528 0A44 add r2, r2, r1 23021 052a 0E92 str r2, [sp, #56] 23022 052c 1699 ldr r1, [sp, #88] 23023 052e 0D9A ldr r2, [sp, #52] 23024 0530 0A44 add r2, r2, r1 23025 0532 0D92 str r2, [sp, #52] 23026 0534 179A ldr r2, [sp, #92] 23027 0536 1899 ldr r1, [sp, #96] 23028 0538 9144 add r9, r9, r2 23029 053a 0C9A ldr r2, [sp, #48] 23030 053c 0A44 add r2, r2, r1 23031 053e 0C92 str r2, [sp, #48] 23032 0540 0B9A ldr r2, [sp, #44] 23033 0542 0832 adds r2, r2, #8 23034 0544 0B92 str r2, [sp, #44] 23035 0546 0A9A ldr r2, [sp, #40] 23036 0548 0832 adds r2, r2, #8 23037 054a 0A92 str r2, [sp, #40] 23038 054c 099A ldr r2, [sp, #36] 23039 054e 0832 adds r2, r2, #8 23040 0550 0992 str r2, [sp, #36] 23041 0552 089A ldr r2, [sp, #32] 23042 0554 0832 adds r2, r2, #8 23043 0556 0892 str r2, [sp, #32] ARM GAS /tmp/ccfbYRip.s page 712 23044 0558 079A ldr r2, [sp, #28] 23045 055a 0832 adds r2, r2, #8 23046 055c 0792 str r2, [sp, #28] 23047 055e 069A ldr r2, [sp, #24] 23048 0560 0832 adds r2, r2, #8 23049 0562 0692 str r2, [sp, #24] 23050 0564 059A ldr r2, [sp, #20] 23051 0566 0832 adds r2, r2, #8 23052 0568 0592 str r2, [sp, #20] 23053 056a 049A ldr r2, [sp, #16] 23054 056c 0832 adds r2, r2, #8 23055 056e 0492 str r2, [sp, #16] 23056 0570 1198 ldr r0, [sp, #68] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** j++; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } while (j < n2); 23057 .loc 26 281 0 23058 0572 1299 ldr r1, [sp, #72] 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } while (j < n2); 23059 .loc 26 280 0 23060 0574 08F10108 add r8, r8, #1 23061 .LVL2416: 23062 .loc 26 281 0 23063 0578 4145 cmp r1, r8 23064 057a 0246 mov r2, r0 23065 057c 04D0 beq .L1067 23066 057e 0146 mov r1, r0 23067 0580 1998 ldr r0, [sp, #100] 23068 0582 0144 add r1, r1, r0 23069 0584 1191 str r1, [sp, #68] 23070 0586 97E6 b .L1062 23071 .L1067: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** twidCoefModifier <<= 3; 23072 .loc 26 283 0 23073 0588 BDF86430 ldrh r3, [sp, #100] 23074 058c 0193 str r3, [sp, #4] 23075 .LVL2417: 23076 058e 8B46 mov fp, r1 23077 .LVL2418: 23078 0590 1A98 ldr r0, [sp, #104] 23079 0592 45E5 b .L1063 23080 .LVL2419: 23081 .L1058: 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } while (n2 > 7); 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c **** } 23082 .loc 26 285 0 23083 0594 1FB0 add sp, sp, #124 23084 .LCFI256: 23085 .cfi_def_cfa_offset 100 23086 @ sp needed 23087 0596 BDEC108B vldm sp!, {d8-d15} 23088 .LCFI257: 23089 .cfi_restore 94 23090 .cfi_restore 95 23091 .cfi_restore 92 23092 .cfi_restore 93 ARM GAS /tmp/ccfbYRip.s page 713 23093 .cfi_restore 90 23094 .cfi_restore 91 23095 .cfi_restore 88 23096 .cfi_restore 89 23097 .cfi_restore 86 23098 .cfi_restore 87 23099 .cfi_restore 84 23100 .cfi_restore 85 23101 .cfi_restore 82 23102 .cfi_restore 83 23103 .cfi_restore 80 23104 .cfi_restore 81 23105 .cfi_def_cfa_offset 36 23106 .LVL2420: 23107 059a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 23108 .cfi_endproc 23109 .LFE194: 23111 059e 00BF .section .text.arm_cfft_radix8by2_f32,"ax",%progbits 23112 .align 1 23113 .p2align 2,,3 23114 .global arm_cfft_radix8by2_f32 23115 .syntax unified 23116 .thumb 23117 .thumb_func 23118 .fpu fpv4-sp-d16 23120 arm_cfft_radix8by2_f32: 23121 .LFB154: 23122 .file 27 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Title: arm_cfft_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Description: Combined Radix Decimation in Frequency CFFT Floating point processing function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #include "arm_math.h" ARM GAS /tmp/ccfbYRip.s page 714 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #include "arm_helium_utils.h" 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #include "arm_vec_fft.h" 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #include "arm_mve_tables.h" 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static float32_t arm_inverse_fft_length_f32(uint16_t fftLen) 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t retValue=1.0; 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (fftLen) 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096U: 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.000244140625; 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048U: 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.00048828125; 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024U: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.0009765625f; 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512U: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.001953125; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256U: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.00390625f; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128U: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.0078125; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64U: 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.015625f; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32U: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.03125; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16U: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** retValue = 0.0625f; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** default: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** return(retValue); ARM GAS /tmp/ccfbYRip.s page 715 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static void arm_bitreversal_f32_inpl_mve( 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t *pSrc, 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const uint16_t bitRevLen, 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const uint16_t *pBitRevTab) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint64_t *src = (uint64_t *) pSrc; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t blkCnt; /* loop counters */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32x4_t bitRevTabOff; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32x4_t one = vdupq_n_u32(1); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = (bitRevLen / 2) / 2; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) { 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** bitRevTabOff = vldrhq_u32(pBitRevTab); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pBitRevTab += 4; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint64x2_t bitRevOff1 = vmullbq_int_u32(bitRevTabOff, one); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint64x2_t bitRevOff2 = vmulltq_int_u32(bitRevTabOff, one); 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint64x2_t in1 = vldrdq_gather_offset_u64(src, bitRevOff1); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint64x2_t in2 = vldrdq_gather_offset_u64(src, bitRevOff2); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrdq_scatter_offset_u64(src, bitRevOff1, in2); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrdq_scatter_offset_u64(src, bitRevOff2, in1); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * Decrement the blockSize loop counter 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static void _arm_radix4_butterfly_f32_mve(const arm_cfft_instance_f32 * S,float32_t * pSrc, uint32_ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecTmp0, vecTmp1; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecA, vecB, vecC, vecD; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t blkCnt; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t n1, n2; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t stage = 0; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** int32_t iter = 1; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static const uint32_t strides[4] = { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (0 - 16) * sizeof(q31_t *), 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (1 - 16) * sizeof(q31_t *), 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (8 - 16) * sizeof(q31_t *), 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (9 - 16) * sizeof(q31_t *) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** }; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 = fftLen; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n1 = n2; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 >>= 2u; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (int k = fftLen / 4u; k > 1; k >>= 2) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { ARM GAS /tmp/ccfbYRip.s page 716 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (int i = 0; i < iter; i++) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride1 = 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride1[ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride2 = 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride2[ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride3 = 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride3[ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pW1, *pW2, *pW3; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inA = pSrc + CMPLX_DIM * i * n1; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inB = inA + n2 * CMPLX_DIM; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inC = inB + n2 * CMPLX_DIM; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inD = inC + n2 * CMPLX_DIM; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecW; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW1 = p_rearranged_twiddle_tab_stride1; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW2 = p_rearranged_twiddle_tab_stride2; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW3 = p_rearranged_twiddle_tab_stride3; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = n2 / 2; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * load 2 f32 complex pair 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_f32(inA); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_f32(inC); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecB = vldrwq_f32(inB); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecD = vldrwq_f32(inD); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum1 = vecB + vecD; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff1 = vecB - vecD; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 + vecSum1; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inA, vecTmp0); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inA += 4; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 - vecSum1; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW2); 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW2 += 4; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inB, vecTmp1); ARM GAS /tmp/ccfbYRip.s page 717 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inB += 4; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW1); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW1 +=4; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inC, vecTmp1); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inC += 4; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW3); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW3 += 4; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inD, vecTmp1); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inD += 4; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_f32(inA); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_f32(inC); 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n1 = n2; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 >>= 2u; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** iter = iter << 2; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** stage++; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * start of Last stage process 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* load scheduling */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = (fftLen >> 3); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecB = vldrwq_gather_base_f32(vecScGathAddr, 8); ARM GAS /tmp/ccfbYRip.s page 718 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecD = vldrwq_gather_base_f32(vecScGathAddr, 24); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum1 = vecB + vecD; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff1 = vecB - vecD; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* pre-load for next iteration */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 + vecSum1; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 - vecSum1; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0); 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0); 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0); 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * End of last stage process 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static void arm_cfft_radix4by2_f32_mve(const arm_cfft_instance_f32 * S, float32_t *pSrc, uint32_t f 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pCoefVec; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pCoef = S->pTwiddle; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *pIn0, *pIn1; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t n2; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t blkCnt; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecIn0, vecIn1, vecSum, vecDiff; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecCmplxTmp, vecTw; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 = fftLen >> 1; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn0 = pSrc; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn1 = pSrc + fftLen; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCoefVec = pCoef; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = n2 / 2; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecIn0 = *(f32x4_t *) pIn0; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecIn1 = *(f32x4_t *) pIn1; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTw = vld1q(pCoefVec); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCoefVec += 4; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum = vecIn0 + vecIn1; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff = vecIn0 - vecIn1; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecCmplxTmp = MVE_CMPLX_MULT_FLT_Conj_AxB(vecTw, vecDiff); ARM GAS /tmp/ccfbYRip.s page 719 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(pIn0, vecSum); 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn0 += 4; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(pIn1, vecCmplxTmp); 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn1 += 4; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_f32_mve(S, pSrc, n2); 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_f32_mve(S, pSrc + fftLen, n2); 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn0 = pSrc; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static void _arm_radix4_butterfly_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t * pSrc, 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecTmp0, vecTmp1; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecA, vecB, vecC, vecD; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecW; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t blkCnt; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t n1, n2; 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t stage = 0; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** int32_t iter = 1; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static const uint32_t strides[4] = { 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (0 - 16) * sizeof(q31_t *), 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (1 - 16) * sizeof(q31_t *), 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (8 - 16) * sizeof(q31_t *), 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** (9 - 16) * sizeof(q31_t *) 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** }; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 = fftLen; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n1 = n2; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 >>= 2u; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (int k = fftLen / 4; k > 1; k >>= 2) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (int i = 0; i < iter; i++) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride1 = 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride1[ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride1_arr[stage]]; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride2 = 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride2[ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride2_arr[stage]]; 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *p_rearranged_twiddle_tab_stride3 = 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** &S->rearranged_twiddle_stride3[ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S->rearranged_twiddle_tab_stride3_arr[stage]]; 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pW1, *pW2, *pW3; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inA = pSrc + CMPLX_DIM * i * n1; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inB = inA + n2 * CMPLX_DIM; 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inC = inB + n2 * CMPLX_DIM; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *inD = inC + n2 * CMPLX_DIM; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW1 = p_rearranged_twiddle_tab_stride1; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW2 = p_rearranged_twiddle_tab_stride2; ARM GAS /tmp/ccfbYRip.s page 720 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW3 = p_rearranged_twiddle_tab_stride3; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = n2 / 2; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * load 2 f32 complex pair 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_f32(inA); 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_f32(inC); 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecB = vldrwq_f32(inB); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecD = vldrwq_f32(inD); 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum1 = vecB + vecD; 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff1 = vecB - vecD; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 1 1 1 ] * [ A B C D ]' .* 1 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 + vecSum1; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inA, vecTmp0); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inA += 4; 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -1 1 -1 ] * [ A B C D ]' 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 - vecSum1; 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -1 1 -1 ] * [ A B C D ]'.* W1 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW2); 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW2 += 4; 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inB, vecTmp1); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inB += 4; 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -i -1 +i ] * [ A B C D ]' 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 -i -1 +i ] * [ A B C D ]'.* W2 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW1); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW1 += 4; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inC, vecTmp1); 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inC += 4; 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 +i -1 -i ] * [ A B C D ]' 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ ARM GAS /tmp/ccfbYRip.s page 721 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecW = vld1q(pW3); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pW3 += 4; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(inD, vecTmp1); 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inD += 4; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_f32(inA); 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_f32(inC); 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n1 = n2; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 >>= 2u; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** iter = iter << 2; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** stage++; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * start of Last stage process 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32x4_t vecScGathAddr = *(uint32x4_t *) strides; 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * load scheduling 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = (fftLen >> 3); 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecB = vldrwq_gather_base_f32(vecScGathAddr, 8); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecD = vldrwq_gather_base_f32(vecScGathAddr, 24); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum1 = vecB + vecD; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff1 = vecB - vecD; 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 + vecSum1; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecTmp0 * onebyfftLen; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecSum0 - vecSum1; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecTmp0 * onebyfftLen; 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecTmp0 * onebyfftLen; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** ARM GAS /tmp/ccfbYRip.s page 722 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTmp0 = vecTmp0 * onebyfftLen; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0); 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** * End of last stage process 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** static void arm_cfft_radix4by2_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t *pSrc, uin 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pCoefVec; 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t const *pCoef = S->pTwiddle; 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t *pIn0, *pIn1; 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t n2; 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t onebyfftLen = arm_inverse_fft_length_f32(fftLen); 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t blkCnt; 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecIn0, vecIn1, vecSum, vecDiff; 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** f32x4_t vecCmplxTmp, vecTw; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** n2 = fftLen >> 1; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn0 = pSrc; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn1 = pSrc + fftLen; 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCoefVec = pCoef; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt = n2 / 2; 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** while (blkCnt > 0U) 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecIn0 = *(f32x4_t *) pIn0; 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecIn1 = *(f32x4_t *) pIn1; 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecTw = vld1q(pCoefVec); 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCoefVec += 4; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecSum = vecIn0 + vecIn1; 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecDiff = vecIn0 - vecIn1; 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vecCmplxTmp = MVE_CMPLX_MULT_FLT_AxB(vecTw, vecDiff); 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(pIn0, vecSum); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn0 += 4; 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** vst1q(pIn1, vecCmplxTmp); 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pIn1 += 4; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** blkCnt--; 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, n2, onebyfftLen); 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_inverse_f32_mve(S, pSrc + fftLen, n2, onebyfftLen); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** ARM GAS /tmp/ccfbYRip.s page 723 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @addtogroup ComplexFFT 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @{ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @brief Processing function for the floating-point complex FFT. 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] S points to an instance of the floating-point CFFT structure 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Pr 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] ifftFlag flag that selects transform direction 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 0: forward transform 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 1: inverse transform 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 0: disables bit reversal of output 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 1: enables bit reversal of output 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @return none 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** void arm_cfft_f32( 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const arm_cfft_instance_f32 * S, 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * pSrc, 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint8_t ifftFlag, 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint8_t bitReverseFlag) 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t fftLen = S->fftLen; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** if (ifftFlag == 1U) { 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (fftLen) { 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16: 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256: 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024: 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096: 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, fftLen, arm_inverse_fft_length_f32(S 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32: 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128: 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512: 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048: 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_cfft_radix4by2_inverse_f32_mve(S, pSrc, fftLen); 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } else { 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (fftLen) { 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16: 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256: 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024: 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096: 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** _arm_radix4_butterfly_f32_mve(S, pSrc, fftLen); 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32: 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128: 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512: ARM GAS /tmp/ccfbYRip.s page 724 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048: 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_cfft_radix4by2_f32_mve(S, pSrc, fftLen); 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** if (bitReverseFlag) 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_bitreversal_f32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable); 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** #else 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** extern void arm_radix8_butterfly_f32( 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * pSrc, 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint16_t fftLen, 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const float32_t * pCoef, 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint16_t twidCoefModifier); 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** extern void arm_bitreversal_32( 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t * pSrc, 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const uint16_t bitRevLen, 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const uint16_t * pBitRevTable); 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @ingroup groupTransforms 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @defgroup ComplexFFT Complex FFT Functions 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The Fast Fourier Transform (FFT) is an efficient algorithm for computing the 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** than the DFT, especially for long lengths. 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The algorithms described in this section 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** operate on complex data. A separate set of functions is devoted to handling 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** of real sequences. 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** There are separate algorithms for handling floating-point, Q15, and Q31 data 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** types. The algorithms available for each data type are described next. 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The FFT functions operate in-place. That is, the array holding the input data 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** will also be used to hold the corresponding result. The input data is complex 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** and contains 2*fftLen interleaved values as shown below. 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 
{real[0], imag[0], real[1], imag[1], ...}
650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The FFT result will be contained in the same array and the frequency domain 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** values will have the same interleaving. 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par Floating-point 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** stages are performed along with a single radix-2 or radix-4 stage, as needed. 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses ARM GAS /tmp/ccfbYRip.s page 725 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** a different twiddle factor table. 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The function uses the standard FFT definition and output values may grow by a 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** factor of fftLen when computing the forward transform. The 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inverse transform includes a scale of 1/fftLen as part of the 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** calculation and this matches the textbook definition of the inverse FFT. 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** For the MVE version, the new arm_cfft_init_f32 initialization function is 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** mandatory. Compilation flags are available to include only the require 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** needed FFTs. Other FFT versions can continue to be initialized as 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** explained below. 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** For not MVE versions, pre-initialized data structures containing twiddle factors 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** and bit reversal tables are provided and defined in arm_const_structs.harm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1) 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** computes a 64-point inverse complex FFT including bit reversal. 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The data structures are treated as constant data and not modified during the 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** calculation. The same data structure can be reused for multiple transforms 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** including mixing forward and inverse transforms. 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** Earlier releases of the library provided separate radix-2 and radix-4 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** algorithms that operated on floating-point data. These functions are still 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** provided but are deprecated. The older functions are slower and less general 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** than the new functions. 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** An example of initialization of the constants for the arm_cfft_f32 function foll 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @code 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const static arm_cfft_instance_f32 *S; 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** ... 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (length) { 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16: 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len16; 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32: 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len32; 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len64; 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128: 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len128; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256: 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len256; 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512: 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len512; 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024: 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len1024; 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048: 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len2048; ARM GAS /tmp/ccfbYRip.s page 726 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096: 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_f32_len4096; 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @endcode 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The new arm_cfft_init_f32 can also be used. 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par Q15 and Q31 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** stages are performed along with a single radix-2 stage, as needed. 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** a different twiddle factor table. 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The function uses the standard FFT definition and output values may grow by a 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** factor of fftLen when computing the forward transform. The 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** inverse transform includes a scale of 1/fftLen as part of the 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** calculation and this matches the textbook definition of the inverse FFT. 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** Pre-initialized data structures containing twiddle factors and bit reversal 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tables are provided and defined in arm_const_structs.h. Include 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** this header in your function and then pass one of the constant structures as 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** an argument to arm_cfft_q31. For example: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1) 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** computes a 64-point inverse complex FFT including bit reversal. 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** The data structures are treated as constant data and not modified during the 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** calculation. The same data structure can be reused for multiple transforms 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** including mixing forward and inverse transforms. 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** Earlier releases of the library provided separate radix-2 and radix-4 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** algorithms that operated on floating-point data. These functions are still 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** provided but are deprecated. The older functions are slower and less general 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** than the new functions. 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @par 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** An example of initialization of the constants for the arm_cfft_q31 function foll 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @code 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const static arm_cfft_instance_q31 *S; 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** ... 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (length) { 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16: 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len16; 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32: 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len32; 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len64; 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128: 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len128; 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256: 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len256; 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512: ARM GAS /tmp/ccfbYRip.s page 727 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len512; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024: 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len1024; 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048: 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len2048; 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096: 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** S = &arm_cfft_sR_q31_len4096; 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @endcode 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1) 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23123 .loc 27 788 0 23124 .cfi_startproc 23125 @ args = 0, pretend = 0, frame = 0 23126 @ frame_needed = 0, uses_anonymous_args = 0 23127 .LVL2421: 23128 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 23129 .LCFI258: 23130 .cfi_def_cfa_offset 32 23131 .cfi_offset 4, -32 23132 .cfi_offset 5, -28 23133 .cfi_offset 6, -24 23134 .cfi_offset 7, -20 23135 .cfi_offset 8, -16 23136 .cfi_offset 9, -12 23137 .cfi_offset 10, -8 23138 .cfi_offset 14, -4 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen; 23139 .loc 27 789 0 23140 0004 B0F800E0 ldrh lr, [r0] 23141 .LVL2422: 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * pCol1, * pCol2, * pMid1, * pMid2; 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p2 = p1 + L; 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const float32_t * tw = (float32_t *) S->pTwiddle; 23142 .loc 27 792 0 23143 0008 4268 ldr r2, [r0, #4] 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t t1[4], t2[4], t3[4], t4[4], twR, twI; 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t m0, m1, m2, m3; 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t l; 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol1 = p1; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol2 = p2; 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Define new length */ 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** L >>= 1; 23144 .loc 27 801 0 23145 000a 4FEA5E09 lsr r9, lr, #1 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const float32_t * tw = (float32_t *) S->pTwiddle; 23146 .loc 27 791 0 23147 000e 01EB8E08 add r8, r1, lr, lsl #2 ARM GAS /tmp/ccfbYRip.s page 728 23148 .LVL2423: 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Initialize mid pointers */ 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pMid1 = p1 + L; 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pMid2 = p2 + L; 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* do two dot Fourier transform */ 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (l = L >> 2; l > 0; l-- ) 23149 .loc 27 808 0 23150 0012 5FEADE0E lsrs lr, lr, #3 23151 .LVL2424: 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen; 23152 .loc 27 788 0 23153 0016 2DED088B vpush.64 {d8, d9, d10, d11} 23154 .LCFI259: 23155 .cfi_def_cfa_offset 64 23156 .cfi_offset 80, -64 23157 .cfi_offset 81, -60 23158 .cfi_offset 82, -56 23159 .cfi_offset 83, -52 23160 .cfi_offset 84, -48 23161 .cfi_offset 85, -44 23162 .cfi_offset 86, -40 23163 .cfi_offset 87, -36 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen; 23164 .loc 27 788 0 23165 001a 0746 mov r7, r0 23166 .loc 27 808 0 23167 001c 00F0A180 beq .L1073 23168 0020 4FEA8904 lsl r4, r9, #2 23169 .LVL2425: 23170 0024 1034 adds r4, r4, #16 23171 .LVL2426: 23172 0026 01F11003 add r3, r1, #16 23173 002a 0E19 adds r6, r1, r4 23174 002c 03EB0E1E add lr, r3, lr, lsl #4 23175 .LVL2427: 23176 0030 4444 add r4, r4, r8 23177 .LVL2428: 23178 0032 02F1100C add ip, r2, #16 23179 0036 08F11005 add r5, r8, #16 23180 .LVL2429: 23181 .L1074: 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[0] = p1[0]; 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[1] = p1[1]; 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[2] = p1[2]; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[3] = p1[3]; 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[0] = p2[0]; 23182 .loc 27 815 0 discriminator 3 23183 003a 15ED042A vldr.32 s4, [r5, #-16] 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p2[1]; 23184 .loc 27 816 0 discriminator 3 23185 003e 55ED032A vldr.32 s5, [r5, #-12] 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[2] = p2[2]; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = p2[3]; ARM GAS /tmp/ccfbYRip.s page 729 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[0] = pMid1[0]; 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = pMid1[1]; 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[2] = pMid1[2]; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[3] = pMid1[3]; 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[0] = pMid2[0]; 23186 .loc 27 825 0 discriminator 3 23187 0042 14ED045A vldr.32 s10, [r4, #-16] 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = pMid2[1]; 23188 .loc 27 826 0 discriminator 3 23189 0046 54ED035A vldr.32 s11, [r4, #-12] 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[1] = p1[1]; 23190 .loc 27 810 0 discriminator 3 23191 004a 53ED044A vldr.32 s9, [r3, #-16] 23192 .LVL2430: 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[2] = p2[2]; 23193 .loc 27 817 0 discriminator 3 23194 004e 55ED028A vldr.32 s17, [r5, #-8] 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23195 .loc 27 818 0 discriminator 3 23196 0052 15ED018A vldr.32 s16, [r5, #-4] 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = pMid1[1]; 23197 .loc 27 820 0 discriminator 3 23198 0056 16ED043A vldr.32 s6, [r6, #-16] 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[2] = pMid1[2]; 23199 .loc 27 821 0 discriminator 3 23200 005a 56ED033A vldr.32 s7, [r6, #-12] 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[2] = pMid2[2]; 23201 .loc 27 827 0 discriminator 3 23202 005e 14ED027A vldr.32 s14, [r4, #-8] 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[3] = pMid2[3]; 23203 .loc 27 828 0 discriminator 3 23204 0062 54ED017A vldr.32 s15, [r4, #-4] 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[2] = p1[2]; 23205 .loc 27 811 0 discriminator 3 23206 0066 13ED034A vldr.32 s8, [r3, #-12] 23207 .LVL2431: 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t1[3] = p1[3]; 23208 .loc 27 812 0 discriminator 3 23209 006a 53ED026A vldr.32 s13, [r3, #-8] 23210 .LVL2432: 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23211 .loc 27 813 0 discriminator 3 23212 006e 13ED016A vldr.32 s12, [r3, #-4] 23213 .LVL2433: 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[3] = pMid1[3]; 23214 .loc 27 822 0 discriminator 3 23215 0072 16ED020A vldr.32 s0, [r6, #-8] 23216 .LVL2434: 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23217 .loc 27 823 0 discriminator 3 23218 0076 56ED010A vldr.32 s1, [r6, #-4] 23219 .LVL2435: 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[0] + t2[0]; 23220 .loc 27 830 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 730 23221 007a 74EE82BA vadd.f32 s23, s9, s4 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[1] + t2[1]; 23222 .loc 27 831 0 discriminator 3 23223 007e 34EE22BA vadd.f32 s22, s8, s5 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[2] + t2[2]; 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[3] + t2[3]; /* col 1 */ 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[0] = t1[0] - t2[0]; 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = t1[1] - t2[1]; 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[2] = t1[2] - t2[2]; 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = t1[3] - t2[3]; /* for col 2 */ 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[0] + t4[0]; 23224 .loc 27 840 0 discriminator 3 23225 0082 73EE059A vadd.f32 s19, s6, s10 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[1] + t4[1]; 23226 .loc 27 841 0 discriminator 3 23227 0086 33EEA59A vadd.f32 s18, s7, s11 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[2] + t4[2]; 23228 .loc 27 842 0 discriminator 3 23229 008a 30EE071A vadd.f32 s2, s0, s14 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[3] + t4[3]; /* col 1 */ 23230 .loc 27 843 0 discriminator 3 23231 008e 70EEA71A vadd.f32 s3, s1, s15 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[3] + t2[3]; /* col 1 */ 23232 .loc 27 832 0 discriminator 3 23233 0092 76EEA8AA vadd.f32 s21, s13, s17 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23234 .loc 27 833 0 discriminator 3 23235 0096 36EE08AA vadd.f32 s20, s12, s16 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[1] + t2[1]; 23236 .loc 27 830 0 discriminator 3 23237 009a 43ED04BA vstr.32 s23, [r3, #-16] 23238 .LVL2436: 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[2] + t2[2]; 23239 .loc 27 831 0 discriminator 3 23240 009e 03ED03BA vstr.32 s22, [r3, #-12] 23241 .LVL2437: 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = t1[3] + t2[3]; /* col 1 */ 23242 .loc 27 832 0 discriminator 3 23243 00a2 43ED02AA vstr.32 s21, [r3, #-8] 23244 .LVL2438: 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23245 .loc 27 833 0 discriminator 3 23246 00a6 03ED01AA vstr.32 s20, [r3, #-4] 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[3] + t4[3]; /* col 1 */ 23247 .loc 27 842 0 discriminator 3 23248 00aa 06ED021A vstr.32 s2, [r6, #-8] 23249 .loc 27 843 0 discriminator 3 23250 00ae 46ED011A vstr.32 s3, [r6, #-4] 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[1] + t4[1]; 23251 .loc 27 840 0 discriminator 3 23252 00b2 46ED049A vstr.32 s19, [r6, #-16] 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid1++ = t3[2] + t4[2]; 23253 .loc 27 841 0 discriminator 3 23254 00b6 06ED039A vstr.32 s18, [r6, #-12] 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = t1[1] - t2[1]; ARM GAS /tmp/ccfbYRip.s page 731 23255 .loc 27 835 0 discriminator 3 23256 00ba 74EEC24A vsub.f32 s9, s9, s4 23257 .LVL2439: 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[2] = t1[2] - t2[2]; 23258 .loc 27 836 0 discriminator 3 23259 00be 34EE624A vsub.f32 s8, s8, s5 23260 .LVL2440: 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[0] = t4[0] - t3[0]; 23261 .loc 27 845 0 discriminator 3 23262 00c2 35EE435A vsub.f32 s10, s10, s6 23263 .LVL2441: 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = t4[1] - t3[1]; 23264 .loc 27 846 0 discriminator 3 23265 00c6 75EEE35A vsub.f32 s11, s11, s7 23266 .LVL2442: 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[2] = t4[2] - t3[2]; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[3] = t4[3] - t3[3]; /* for col 2 */ 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = *tw++; 23267 .loc 27 850 0 discriminator 3 23268 00ca 1CED043A vldr.32 s6, [ip, #-16] 23269 .LVL2443: 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = *tw++; 23270 .loc 27 851 0 discriminator 3 23271 00ce 5CED033A vldr.32 s7, [ip, #-12] 23272 .LVL2444: 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* multiply by twiddle factors */ 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t2[0] * twR; 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t2[1] * twI; 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t2[0] * twI; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* R = R * Tr - I * Ti */ 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m0 + m1; 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* I = I * Tr + R * Ti */ 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry */ 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 0.9988 - 0.0491i <==> -0.0491 - 0.9988i */ 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t4[0] * twI; 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t4[1] * twR; 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[1] * twI; 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t4[0] * twR; 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m0 - m1; 23273 .loc 27 871 0 discriminator 3 23274 00d2 23EE652A vnmul.f32 s4, s6, s11 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 23275 .loc 27 855 0 discriminator 3 23276 00d6 64EE231A vmul.f32 s3, s8, s7 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23277 .loc 27 862 0 discriminator 3 23278 00da 23EEE41A vnmul.f32 s2, s7, s9 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23279 .loc 27 869 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 732 23280 00de 65EE032A vmul.f32 s5, s10, s6 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23281 .loc 27 862 0 discriminator 3 23282 00e2 A4EE031A vfma.f32 s2, s8, s6 23283 00e6 1033 adds r3, r3, #16 23284 .LVL2445: 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23285 .loc 27 808 0 discriminator 3 23286 00e8 7345 cmp r3, lr 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* I = I * Tr + R * Ti */ 23287 .loc 27 860 0 discriminator 3 23288 00ea E4EE831A vfma.f32 s3, s9, s6 23289 00ee 06F11006 add r6, r6, #16 23290 00f2 0CF1100C add ip, ip, #16 23291 .loc 27 871 0 discriminator 3 23292 00f6 A5EE232A vfma.f32 s4, s10, s7 23293 00fa 05F11005 add r5, r5, #16 23294 00fe 04F11004 add r4, r4, #16 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m2 + m3; 23295 .loc 27 872 0 discriminator 3 23296 0102 E5EEA32A vfma.f32 s5, s11, s7 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23297 .loc 27 862 0 discriminator 3 23298 0106 05ED071A vstr.32 s2, [r5, #-28] 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* I = I * Tr + R * Ti */ 23299 .loc 27 860 0 discriminator 3 23300 010a 45ED081A vstr.32 s3, [r5, #-32] 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m2 + m3; 23301 .loc 27 871 0 discriminator 3 23302 010e 04ED082A vstr.32 s4, [r4, #-32] 23303 .loc 27 872 0 discriminator 3 23304 0112 44ED072A vstr.32 s5, [r4, #-28] 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = *tw++; 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = *tw++; 23305 .loc 27 875 0 discriminator 3 23306 0116 5CED055A vldr.32 s11, [ip, #-20] 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = *tw++; 23307 .loc 27 874 0 discriminator 3 23308 011a 1CED065A vldr.32 s10, [ip, #-24] 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = t1[3] - t2[3]; /* for col 2 */ 23309 .loc 27 837 0 discriminator 3 23310 011e 76EEE86A vsub.f32 s13, s13, s17 23311 .LVL2446: 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23312 .loc 27 838 0 discriminator 3 23313 0122 36EE486A vsub.f32 s12, s12, s16 23314 .LVL2447: 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[3] = t4[3] - t3[3]; /* for col 2 */ 23315 .loc 27 847 0 discriminator 3 23316 0126 37EE407A vsub.f32 s14, s14, s0 23317 .LVL2448: 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23318 .loc 27 848 0 discriminator 3 23319 012a 77EEE07A vsub.f32 s15, s15, s1 23320 .LVL2449: 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** ARM GAS /tmp/ccfbYRip.s page 733 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t2[2] * twR; 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t2[3] * twI; 23321 .loc 27 878 0 discriminator 3 23322 012e 26EE253A vmul.f32 s6, s12, s11 23323 .LVL2450: 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[3] * twR; 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t2[2] * twI; 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m0 + m1; 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23324 .loc 27 883 0 discriminator 3 23325 0132 65EEE63A vnmul.f32 s7, s11, s13 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t4[2] * twI; 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t4[3] * twR; 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[3] * twI; 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t4[2] * twR; 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m0 - m1; 23326 .loc 27 890 0 discriminator 3 23327 0136 25EE674A vnmul.f32 s8, s10, s15 23328 .LVL2451: 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23329 .loc 27 888 0 discriminator 3 23330 013a 67EE054A vmul.f32 s9, s14, s10 23331 .LVL2452: 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23332 .loc 27 883 0 discriminator 3 23333 013e E6EE053A vfma.f32 s7, s12, s10 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23334 .loc 27 882 0 discriminator 3 23335 0142 A6EE853A vfma.f32 s6, s13, s10 23336 .LVL2453: 23337 .loc 27 890 0 discriminator 3 23338 0146 A7EE254A vfma.f32 s8, s14, s11 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m2 + m3; 23339 .loc 27 891 0 discriminator 3 23340 014a E7EEA54A vfma.f32 s9, s15, s11 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23341 .loc 27 882 0 discriminator 3 23342 014e 05ED063A vstr.32 s6, [r5, #-24] 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23343 .loc 27 883 0 discriminator 3 23344 0152 45ED053A vstr.32 s7, [r5, #-20] 23345 .LVL2454: 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pMid2++ = m2 + m3; 23346 .loc 27 890 0 discriminator 3 23347 0156 04ED064A vstr.32 s8, [r4, #-24] 23348 .loc 27 891 0 discriminator 3 23349 015a 44ED054A vstr.32 s9, [r4, #-20] 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23350 .loc 27 808 0 discriminator 3 23351 015e 7FF46CAF bne .L1074 23352 .LVL2455: 23353 .L1073: 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** ARM GAS /tmp/ccfbYRip.s page 734 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* first col */ 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U); 23354 .loc 27 895 0 23355 0162 1FFA89F9 uxth r9, r9 23356 .LVL2456: 23357 0166 0846 mov r0, r1 23358 .LVL2457: 23359 0168 0223 movs r3, #2 23360 016a 4946 mov r1, r9 23361 .LVL2458: 23362 016c FFF7FEFF bl arm_radix8_butterfly_f32 23363 .LVL2459: 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* second col */ 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U); 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 23364 .loc 27 899 0 23365 0170 BDEC088B vldm sp!, {d8-d11} 23366 .LCFI260: 23367 .cfi_restore 86 23368 .cfi_restore 87 23369 .cfi_restore 84 23370 .cfi_restore 85 23371 .cfi_restore 82 23372 .cfi_restore 83 23373 .cfi_restore 80 23374 .cfi_restore 81 23375 .cfi_def_cfa_offset 32 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 23376 .loc 27 898 0 23377 0174 4946 mov r1, r9 23378 0176 7A68 ldr r2, [r7, #4] 23379 0178 4046 mov r0, r8 23380 017a 0223 movs r3, #2 23381 .loc 27 899 0 23382 017c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 23383 .LCFI261: 23384 .cfi_restore 14 23385 .cfi_restore 10 23386 .cfi_restore 9 23387 .cfi_restore 8 23388 .cfi_restore 7 23389 .cfi_restore 6 23390 .cfi_restore 5 23391 .cfi_restore 4 23392 .cfi_def_cfa_offset 0 23393 .LVL2460: 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 23394 .loc 27 898 0 23395 0180 FFF7FEBF b arm_radix8_butterfly_f32 23396 .LVL2461: 23397 .cfi_endproc 23398 .LFE154: 23400 .section .text.arm_cfft_radix8by4_f32,"ax",%progbits 23401 .align 1 23402 .p2align 2,,3 23403 .global arm_cfft_radix8by4_f32 ARM GAS /tmp/ccfbYRip.s page 735 23404 .syntax unified 23405 .thumb 23406 .thumb_func 23407 .fpu fpv4-sp-d16 23409 arm_cfft_radix8by4_f32: 23410 .LFB155: 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1) 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23411 .loc 27 902 0 23412 .cfi_startproc 23413 @ args = 0, pretend = 0, frame = 64 23414 @ frame_needed = 0, uses_anonymous_args = 0 23415 .LVL2462: 23416 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 23417 .LCFI262: 23418 .cfi_def_cfa_offset 36 23419 .cfi_offset 4, -36 23420 .cfi_offset 5, -32 23421 .cfi_offset 6, -28 23422 .cfi_offset 7, -24 23423 .cfi_offset 8, -20 23424 .cfi_offset 9, -16 23425 .cfi_offset 10, -12 23426 .cfi_offset 11, -8 23427 .cfi_offset 14, -4 23428 0004 2DED0C8B vpush.64 {d8, d9, d10, d11, d12, d13} 23429 .LCFI263: 23430 .cfi_def_cfa_offset 84 23431 .cfi_offset 80, -84 23432 .cfi_offset 81, -80 23433 .cfi_offset 82, -76 23434 .cfi_offset 83, -72 23435 .cfi_offset 84, -68 23436 .cfi_offset 85, -64 23437 .cfi_offset 86, -60 23438 .cfi_offset 87, -56 23439 .cfi_offset 88, -52 23440 .cfi_offset 89, -48 23441 .cfi_offset 90, -44 23442 .cfi_offset 91, -40 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen >> 1; 23443 .loc 27 903 0 23444 0008 0488 ldrh r4, [r0] 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4; 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const float32_t *tw2, *tw3, *tw4; 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p2 = p1 + L; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p3 = p2 + L; 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p4 = p3 + L; 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t t2[4], t3[4], t4[4], twR, twI; 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1; 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t m0, m1, m2, m3; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t l, twMod2, twMod3, twMod4; 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol1 = p1; /* points to real values by default */ 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol2 = p2; 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol3 = p3; ARM GAS /tmp/ccfbYRip.s page 736 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pCol4 = p4; 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd1 = p2 - 1; /* points to imaginary values by default */ 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd2 = p3 - 1; 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd3 = p4 - 1; 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd4 = pEnd3 + L; 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle; 23445 .loc 27 923 0 23446 000a 4268 ldr r2, [r0, #4] 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** L >>= 1; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* do four dot Fourier transform */ 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twMod2 = 2; 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twMod3 = 4; 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twMod4 = 6; 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* TOP */ 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_0 = p1[0] + p3[0]; 23447 .loc 27 934 0 23448 000c 91ED007A vldr.32 s14, [r1] 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 23449 .loc 27 936 0 23450 0010 D1ED017A vldr.32 s15, [r1, #4] 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen >> 1; 23451 .loc 27 902 0 23452 0014 91B0 sub sp, sp, #68 23453 .LCFI264: 23454 .cfi_def_cfa_offset 152 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4; 23455 .loc 27 903 0 23456 0016 6408 lsrs r4, r4, #1 23457 .LVL2463: 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p3 = p2 + L; 23458 .loc 27 906 0 23459 0018 A300 lsls r3, r4, #2 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen >> 1; 23460 .loc 27 902 0 23461 001a 0D90 str r0, [sp, #52] 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p3 = p2 + L; 23462 .loc 27 906 0 23463 001c C818 adds r0, r1, r3 23464 .LVL2464: 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23465 .loc 27 923 0 23466 001e 0192 str r2, [sp, #4] 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p4 = p3 + L; 23467 .loc 27 907 0 23468 0020 C218 adds r2, r0, r3 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23469 .loc 27 934 0 23470 0022 D2ED005A vldr.32 s11, [r2] 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ ARM GAS /tmp/ccfbYRip.s page 737 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[0] = p1sp3_0 + p2[1] - p4[1]; 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23471 .loc 27 941 0 23472 0026 D0ED004A vldr.32 s9, [r0] 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen >> 1; 23473 .loc 27 902 0 23474 002a 0E91 str r1, [sp, #56] 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t t2[4], t3[4], t4[4], twR, twI; 23475 .loc 27 908 0 23476 002c D718 adds r7, r2, r3 23477 .loc 27 941 0 23478 002e 97ED005A vldr.32 s10, [r7] 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23479 .loc 27 936 0 23480 0032 92ED014A vldr.32 s8, [r2, #4] 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23481 .loc 27 940 0 23482 0036 90ED013A vldr.32 s6, [r0, #4] 23483 003a D7ED012A vldr.32 s5, [r7, #4] 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p4 = p3 + L; 23484 .loc 27 907 0 23485 003e 0A92 str r2, [sp, #40] 23486 .LVL2465: 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23487 .loc 27 934 0 23488 0040 37EE256A vadd.f32 s12, s14, s11 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen >> 1; 23489 .loc 27 902 0 23490 0044 0D46 mov r5, r1 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[0] = p1ap3_0 - p2[0] - p4[0]; 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[0] = p1sp3_0 - p2[1] + p4[1]; 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 */ 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_0 + p2[0] + p4[0]; 23491 .loc 27 949 0 23492 0046 75EE066A vadd.f32 s13, s10, s12 23493 004a 2946 mov r1, r5 23494 004c 76EEA46A vadd.f32 s13, s13, s9 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 23495 .loc 27 935 0 23496 0050 37EE657A vsub.f32 s14, s14, s11 23497 .loc 27 949 0 23498 0054 16EE906A vmov r6, s13 23499 0058 41F8086B str r6, [r1], #8 @ float 23500 .LVL2466: 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23501 .loc 27 950 0 23502 005c D7ED015A vldr.32 s11, [r7, #4] 23503 0060 90ED012A vldr.32 s4, [r0, #4] 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23504 .loc 27 949 0 23505 0064 0591 str r1, [sp, #20] 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23506 .loc 27 936 0 ARM GAS /tmp/ccfbYRip.s page 738 23507 0066 77EE846A vadd.f32 s13, s15, s8 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23508 .loc 27 940 0 23509 006a 73EE073A vadd.f32 s7, s6, s14 23510 .loc 27 950 0 23511 006e 0146 mov r1, r0 23512 0070 76EEA55A vadd.f32 s11, s13, s11 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23513 .loc 27 940 0 23514 0074 73EEE23A vsub.f32 s7, s7, s5 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23515 .loc 27 925 0 23516 0078 6008 lsrs r0, r4, #1 23517 .LVL2467: 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Twiddle factors are ones */ 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[0]; 23518 .loc 27 953 0 23519 007a 8846 mov r8, r1 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23520 .loc 27 937 0 23521 007c 77EEC47A vsub.f32 s15, s15, s8 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[1]; 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[0]; 23522 .loc 27 955 0 23523 0080 1146 mov r1, r2 23524 .LVL2468: 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 23525 .loc 27 943 0 23526 0082 36EE646A vsub.f32 s12, s12, s9 23527 .loc 27 955 0 23528 0086 1446 mov r4, r2 23529 .LVL2469: 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd3 = p4 - 1; 23530 .loc 27 919 0 23531 0088 043A subs r2, r2, #4 23532 .LVL2470: 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23533 .loc 27 925 0 23534 008a 0C90 str r0, [sp, #48] 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[1]; 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[0]; 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[1]; 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw2 += twMod2; 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw3 += twMod3; 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw4 += twMod4; 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (l = (L - 2) >> 1; l > 0; l-- ) 23535 .loc 27 964 0 23536 008c A0F10209 sub r9, r0, #2 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pEnd3 = p4 - 1; 23537 .loc 27 919 0 23538 0090 0F92 str r2, [sp, #60] 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[1]; 23539 .loc 27 953 0 23540 0092 4046 mov r0, r8 ARM GAS /tmp/ccfbYRip.s page 739 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw3 += twMod3; 23541 .loc 27 960 0 23542 0094 019A ldr r2, [sp, #4] 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t t2[4], t3[4], t4[4], twR, twI; 23543 .loc 27 908 0 23544 0096 0B97 str r7, [sp, #44] 23545 .LVL2471: 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[1]; 23546 .loc 27 953 0 23547 0098 13EE90CA vmov ip, s7 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23548 .loc 27 950 0 23549 009c 75EE825A vadd.f32 s11, s11, s4 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23550 .loc 27 941 0 23551 00a0 35EE274A vadd.f32 s8, s10, s15 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 23552 .loc 27 943 0 23553 00a4 36EE456A vsub.f32 s12, s12, s10 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23554 .loc 27 950 0 23555 00a8 C5ED015A vstr.32 s11, [r5, #4] 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[1]; 23556 .loc 27 953 0 23557 00ac 40F808CB str ip, [r0], #8 @ float 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw3 += twMod3; 23558 .loc 27 960 0 23559 00b0 02F1080C add ip, r2, #8 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 */ 23560 .loc 27 947 0 23561 00b4 74EEA77A vadd.f32 s15, s9, s15 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw3 += twMod3; 23562 .loc 27 960 0 23563 00b8 CDF810C0 str ip, [sp, #16] 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23564 .loc 27 941 0 23565 00bc 74EE644A vsub.f32 s9, s8, s9 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[1]; 23566 .loc 27 955 0 23567 00c0 16EE10CA vmov ip, s12 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[0]; 23568 .loc 27 954 0 23569 00c4 C8ED014A vstr.32 s9, [r8, #4] 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[1]; 23570 .loc 27 955 0 23571 00c8 41F808CB str ip, [r1], #8 @ float 23572 .LVL2472: 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = t2[1]; 23573 .loc 27 953 0 23574 00cc 0790 str r0, [sp, #28] 23575 .LVL2473: 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw4 += twMod4; 23576 .loc 27 961 0 23577 00ce 02F11000 add r0, r2, #16 23578 .LVL2474: 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[1]; 23579 .loc 27 955 0 ARM GAS /tmp/ccfbYRip.s page 740 23580 00d2 0291 str r1, [sp, #8] 23581 .LVL2475: 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 23582 .loc 27 946 0 23583 00d4 32EE877A vadd.f32 s14, s5, s14 23584 .LVL2476: 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = t3[0]; 23585 .loc 27 954 0 23586 00d8 CDF82080 str r8, [sp, #32] 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw4 += twMod4; 23587 .loc 27 961 0 23588 00dc 0246 mov r2, r0 23589 .LVL2477: 23590 00de 0690 str r0, [sp, #24] 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23591 .loc 27 962 0 23592 00e0 0198 ldr r0, [sp, #4] 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23593 .loc 27 944 0 23594 00e2 76EEC36A vsub.f32 s13, s13, s6 23595 .LVL2478: 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 23596 .loc 27 946 0 23597 00e6 37EE437A vsub.f32 s14, s14, s6 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23598 .loc 27 962 0 23599 00ea 0146 mov r1, r0 23600 .LVL2479: 23601 00ec 1831 adds r1, r1, #24 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23602 .loc 27 944 0 23603 00ee 76EEE26A vsub.f32 s13, s13, s5 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23604 .loc 27 962 0 23605 00f2 0391 str r1, [sp, #12] 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[1]; 23606 .loc 27 957 0 23607 00f4 17EE101A vmov r1, s14 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 */ 23608 .loc 27 947 0 23609 00f8 77EEC57A vsub.f32 s15, s15, s10 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[1]; 23610 .loc 27 957 0 23611 00fc 3E46 mov r6, r7 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[0]; 23612 .loc 27 956 0 23613 00fe C4ED016A vstr.32 s13, [r4, #4] 23614 .LVL2480: 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = t4[1]; 23615 .loc 27 957 0 23616 0102 47F8081B str r1, [r7], #8 @ float 23617 .LVL2481: 23618 .loc 27 964 0 23619 0106 5FEA5901 lsrs r1, r9, #1 23620 .LVL2482: 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23621 .loc 27 958 0 ARM GAS /tmp/ccfbYRip.s page 741 23622 010a C6ED017A vstr.32 s15, [r6, #4] 23623 .loc 27 964 0 23624 010e 0991 str r1, [sp, #36] 23625 0110 00F02581 beq .L1081 23626 0114 8B46 mov fp, r1 23627 0116 0C3B subs r3, r3, #12 23628 .LVL2483: 23629 0118 4146 mov r1, r8 23630 .LVL2484: 23631 011a 9246 mov r10, r2 23632 011c 00F12009 add r9, r0, #32 23633 0120 0246 mov r2, r0 23634 .LVL2485: 23635 0122 0F98 ldr r0, [sp, #60] 23636 0124 A8F1040E sub lr, r8, #4 23637 .LVL2486: 23638 0128 05F1100C add ip, r5, #16 23639 012c 02F13008 add r8, r2, #48 23640 0130 04F11005 add r5, r4, #16 23641 .LVL2487: 23642 0134 3344 add r3, r3, r6 23643 .LVL2488: 23644 0136 1031 adds r1, r1, #16 23645 0138 A6F10C04 sub r4, r6, #12 23646 013c 06F11002 add r2, r6, #16 23647 .LVL2489: 23648 .L1082: 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* TOP */ 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_0 = p1[0] + p3[0]; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[0] = p1sp3_0 + p2[1] - p4[1]; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23649 .loc 27 973 0 discriminator 3 23650 0140 12ED027A vldr.32 s14, [r2, #-8] 23651 0144 51ED027A vldr.32 s15, [r1, #-8] 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23652 .loc 27 967 0 discriminator 3 23653 0148 1CED024A vldr.32 s8, [ip, #-8] 23654 014c 15ED025A vldr.32 s10, [r5, #-8] 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23655 .loc 27 972 0 discriminator 3 23656 0150 12ED016A vldr.32 s12, [r2, #-4] 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23657 .loc 27 969 0 discriminator 3 23658 0154 55ED016A vldr.32 s13, [r5, #-4] 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23659 .loc 27 972 0 discriminator 3 23660 0158 51ED015A vldr.32 s11, [r1, #-4] 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23661 .loc 27 969 0 discriminator 3 23662 015c 5CED013A vldr.32 s7, [ip, #-4] 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23663 .loc 27 967 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 742 23664 0160 74EE058A vadd.f32 s17, s8, s10 23665 .LVL2490: 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[0] = p1ap3_0 - p2[0] - p4[0]; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[0] = p1sp3_0 - p2[1] + p4[1]; 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - top */ 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_0 + p2[0] + p4[0]; 23666 .loc 27 981 0 discriminator 3 23667 0164 77EE874A vadd.f32 s9, s15, s14 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 23668 .loc 27 968 0 discriminator 3 23669 0168 34EE455A vsub.f32 s10, s8, s10 23670 .LVL2491: 23671 .loc 27 981 0 discriminator 3 23672 016c 74EEA84A vadd.f32 s9, s9, s17 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23673 .loc 27 969 0 discriminator 3 23674 0170 33EEA69A vadd.f32 s18, s7, s13 23675 .LVL2492: 23676 .loc 27 981 0 discriminator 3 23677 0174 4CED024A vstr.32 s9, [ip, #-8] 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23678 .loc 27 982 0 discriminator 3 23679 0178 11ED014A vldr.32 s8, [r1, #-4] 23680 017c 52ED014A vldr.32 s9, [r2, #-4] 23681 0180 74EE244A vadd.f32 s9, s8, s9 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ 23682 .loc 27 970 0 discriminator 3 23683 0184 73EEE66A vsub.f32 s13, s7, s13 23684 .LVL2493: 23685 .loc 27 982 0 discriminator 3 23686 0188 74EE894A vadd.f32 s9, s9, s18 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23687 .loc 27 973 0 discriminator 3 23688 018c 76EEE7AA vsub.f32 s21, s13, s15 23689 .loc 27 982 0 discriminator 3 23690 0190 4CED014A vstr.32 s9, [ip, #-4] 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* BOTTOM */ 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = pEnd1[-1] + pEnd3[-1]; 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = pEnd1[-1] - pEnd3[-1]; 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_0 = pEnd1[ 0] + pEnd3[0]; 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = pEnd1[ 0] - pEnd3[0]; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1; 23691 .loc 27 990 0 discriminator 3 23692 0194 D3ED024A vldr.32 s9, [r3, #8] 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = pEnd1[ 0] - pEnd3[0]; 23693 .loc 27 987 0 discriminator 3 23694 0198 D4ED020A vldr.32 s1, [r4, #8] 23695 019c DEED009A vldr.32 s19, [lr] 23696 .loc 27 990 0 discriminator 3 23697 01a0 90ED004A vldr.32 s8, [r0] 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1]; ARM GAS /tmp/ccfbYRip.s page 743 23698 .loc 27 991 0 discriminator 3 23699 01a4 93ED013A vldr.32 s6, [r3, #4] 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = pEnd1[-1] - pEnd3[-1]; 23700 .loc 27 985 0 discriminator 3 23701 01a8 D4ED011A vldr.32 s3, [r4, #4] 23702 01ac 1EED01AA vldr.32 s20, [lr, #-4] 23703 .loc 27 991 0 discriminator 3 23704 01b0 50ED012A vldr.32 s5, [r0, #-4] 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = pEnd1[ 0] - pEnd3[0]; 23705 .loc 27 987 0 discriminator 3 23706 01b4 79EEA03A vadd.f32 s7, s19, s1 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1]; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0]; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1; 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0; 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - Bottom */ 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0]; 23707 .loc 27 999 0 discriminator 3 23708 01b8 34EE240A vadd.f32 s0, s8, s9 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = pEnd1[-1] - pEnd3[-1]; 23709 .loc 27 985 0 discriminator 3 23710 01bc 3AEE212A vadd.f32 s4, s20, s3 23711 .loc 27 999 0 discriminator 3 23712 01c0 30EE230A vadd.f32 s0, s0, s7 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_0 = pEnd1[ 0] + pEnd3[0]; 23713 .loc 27 986 0 discriminator 3 23714 01c4 7AEE611A vsub.f32 s3, s20, s3 23715 .loc 27 999 0 discriminator 3 23716 01c8 10EE106A vmov r6, s0 23717 01cc 4EF80869 str r6, [lr], #-8 @ float 23718 .LVL2494: 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1]; 23719 .loc 27 1000 0 discriminator 3 23720 01d0 93ED010A vldr.32 s0, [r3, #4] 23721 01d4 10ED018A vldr.32 s16, [r0, #-4] 23722 01d8 38EE000A vadd.f32 s0, s16, s0 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23723 .loc 27 972 0 discriminator 3 23724 01dc 35EE46AA vsub.f32 s20, s10, s12 23725 .loc 27 1000 0 discriminator 3 23726 01e0 30EE020A vadd.f32 s0, s0, s4 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1]; 23727 .loc 27 990 0 discriminator 3 23728 01e4 34EE641A vsub.f32 s2, s8, s9 23729 .loc 27 1000 0 discriminator 3 23730 01e8 8EED010A vstr.32 s0, [lr, #4] 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23731 .loc 27 973 0 discriminator 3 23732 01ec 7AEE87AA vadd.f32 s21, s21, s14 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23733 .loc 27 972 0 discriminator 3 23734 01f0 3AEE25AA vadd.f32 s20, s20, s11 23735 .LVL2495: 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ 23736 .loc 27 988 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 744 23737 01f4 79EEE00A vsub.f32 s1, s19, s1 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 2 */ 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* read twiddle factors */ 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = *tw2++; 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = *tw2++; 23738 .loc 27 1005 0 discriminator 3 23739 01f8 5AED019A vldr.32 s19, [r10, #-4] 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = *tw2++; 23740 .loc 27 1004 0 discriminator 3 23741 01fc 1AED028A vldr.32 s16, [r10, #-8] 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1]; 23742 .loc 27 990 0 discriminator 3 23743 0200 71EE21CA vadd.f32 s25, s2, s3 23744 0204 33EE620A vsub.f32 s0, s6, s5 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* multiply by twiddle factors */ 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* let Z1 = a + i(b), Z2 = c + i(d) */ 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* => Z1 * Z2 = (a*c - b*d) + i(b*c + a*d) */ 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Top */ 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t2[0] * twR; 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t2[1] * twI; 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t2[0] * twI; 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m0 + m1; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23745 .loc 27 1017 0 discriminator 3 23746 0208 29EECACA vnmul.f32 s24, s19, s20 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 23747 .loc 27 1012 0 discriminator 3 23748 020c 6AEEA9BA vmul.f32 s23, s21, s19 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 2 */ 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 0.9997 - 0.0245i <==> 0.0245 - 0.9997i */ 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Bottom */ 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t2[3] * twI; 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t2[2] * twR; 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[2] * twI; 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t2[3] * twR; 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd2-- = m0 - m1; 23749 .loc 27 1026 0 discriminator 3 23750 0210 28EE6CBA vnmul.f32 s22, s16, s25 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 2 */ 23751 .loc 27 1017 0 discriminator 3 23752 0214 AAEE88CA vfma.f32 s24, s21, s16 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23753 .loc 27 964 0 discriminator 3 23754 0218 BBF1010B subs fp, fp, #1 23755 .LVL2496: 23756 021c 0CF1080C add ip, ip, #8 23757 .LVL2497: 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23758 .loc 27 991 0 discriminator 3 23759 0220 30EE80DA vadd.f32 s26, s1, s0 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23760 .loc 27 1016 0 discriminator 3 ARM GAS /tmp/ccfbYRip.s page 745 23761 0224 F0EE6BAA vmov.f32 s21, s23 23762 .LVL2498: 23763 0228 EAEE08AA vfma.f32 s21, s20, s16 23764 022c 0AF1080A add r10, r10, #8 23765 0230 01F10801 add r1, r1, #8 23766 .loc 27 1026 0 discriminator 3 23767 0234 B0EE4BAA vmov.f32 s20, s22 23768 .LVL2499: 23769 0238 ADEE29AA vfma.f32 s20, s26, s19 23770 023c 09F11009 add r9, r9, #16 23771 .LVL2500: 23772 0240 05F10805 add r5, r5, #8 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23773 .loc 27 1024 0 discriminator 3 23774 0244 2DEE088A vmul.f32 s16, s26, s16 23775 .loc 27 1026 0 discriminator 3 23776 0248 1AEE106A vmov r6, s20 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd2-- = m2 + m3; 23777 .loc 27 1027 0 discriminator 3 23778 024c ACEEA98A vfma.f32 s16, s25, s19 23779 0250 A4F10804 sub r4, r4, #8 23780 0254 08F11808 add r8, r8, #24 23781 .LVL2501: 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 2 */ 23782 .loc 27 1017 0 discriminator 3 23783 0258 01ED03CA vstr.32 s24, [r1, #-12] 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 23784 .loc 27 1016 0 discriminator 3 23785 025c 41ED04AA vstr.32 s21, [r1, #-16] 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd2-- = m2 + m3; 23786 .loc 27 1026 0 discriminator 3 23787 0260 40F80869 str r6, [r0], #-8 @ float 23788 .LVL2502: 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0]; 23789 .loc 27 993 0 discriminator 3 23790 0264 72EE622A vsub.f32 s5, s4, s5 23791 .loc 27 1027 0 discriminator 3 23792 0268 80ED018A vstr.32 s16, [r0, #4] 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23793 .loc 27 994 0 discriminator 3 23794 026c 33EEC44A vsub.f32 s8, s7, s8 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0]; 23795 .loc 27 993 0 discriminator 3 23796 0270 72EEC33A vsub.f32 s7, s5, s6 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 3 */ 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = tw3[0]; 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw3[1]; 23797 .loc 27 1031 0 discriminator 3 23798 0274 19ED073A vldr.32 s6, [r9, #-28] 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw3[1]; 23799 .loc 27 1030 0 discriminator 3 23800 0278 19ED088A vldr.32 s16, [r9, #-32] 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23801 .loc 27 994 0 discriminator 3 23802 027c 74EE644A vsub.f32 s9, s8, s9 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; ARM GAS /tmp/ccfbYRip.s page 746 23803 .loc 27 975 0 discriminator 3 23804 0280 78EEE78A vsub.f32 s17, s17, s15 23805 .LVL2503: 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw3 += twMod3; 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Top */ 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t3[0] * twR; 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t3[1] * twI; 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t3[1] * twR; 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t3[0] * twI; 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m0 + m1; 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 3 */ 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 0.9988 - 0.0491i <==> -0.9988 - 0.0491i */ 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Bottom */ 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = -t3[3] * twR; 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t3[2] * twI; 23806 .loc 27 1045 0 discriminator 3 23807 0284 23EE834A vmul.f32 s8, s7, s6 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23808 .loc 27 976 0 discriminator 3 23809 0288 39EE652A vsub.f32 s4, s18, s11 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 23810 .loc 27 975 0 discriminator 3 23811 028c 78EEC72A vsub.f32 s5, s17, s14 23812 .LVL2504: 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t3[2] * twR; 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t3[3] * twI; 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd3-- = m0 - m1; 23813 .loc 27 1049 0 discriminator 3 23814 0290 A4EE884A vfma.f32 s8, s9, s16 23815 0294 02F10802 add r2, r2, #8 23816 0298 A3F10803 sub r3, r3, #8 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 23817 .loc 27 976 0 discriminator 3 23818 029c 32EE462A vsub.f32 s4, s4, s12 23819 .LVL2505: 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 3 */ 23820 .loc 27 1040 0 discriminator 3 23821 02a0 63EE628A vnmul.f32 s17, s6, s5 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t3[1] * twR; 23822 .loc 27 1035 0 discriminator 3 23823 02a4 22EE039A vmul.f32 s18, s4, s6 23824 .LVL2506: 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23825 .loc 27 1047 0 discriminator 3 23826 02a8 24EE833A vmul.f32 s6, s9, s6 23827 .loc 27 1049 0 discriminator 3 23828 02ac F0EE444A vmov.f32 s9, s8 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 3 */ 23829 .loc 27 1040 0 discriminator 3 23830 02b0 B0EE684A vmov.f32 s8, s17 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd3-- = m3 - m2; 23831 .loc 27 1050 0 discriminator 3 23832 02b4 A3EEC83A vfms.f32 s6, s7, s16 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 3 */ ARM GAS /tmp/ccfbYRip.s page 747 23833 .loc 27 1040 0 discriminator 3 23834 02b8 A2EE084A vfma.f32 s8, s4, s16 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 23835 .loc 27 1039 0 discriminator 3 23836 02bc A2EE889A vfma.f32 s18, s5, s16 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - top */ 23837 .loc 27 979 0 discriminator 3 23838 02c0 36EEC77A vsub.f32 s14, s13, s14 23839 .LVL2507: 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 23840 .loc 27 978 0 discriminator 3 23841 02c4 75EE655A vsub.f32 s11, s10, s11 23842 .LVL2508: 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd3-- = m3 - m2; 23843 .loc 27 1049 0 discriminator 3 23844 02c8 F1EE646A vneg.f32 s13, s9 23845 .LVL2509: 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 23846 .loc 27 1039 0 discriminator 3 23847 02cc 05ED049A vstr.32 s18, [r5, #-16] 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 3 */ 23848 .loc 27 1040 0 discriminator 3 23849 02d0 05ED034A vstr.32 s8, [r5, #-12] 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd3-- = m3 - m2; 23850 .loc 27 1049 0 discriminator 3 23851 02d4 C4ED046A vstr.32 s13, [r4, #16] 23852 .loc 27 1050 0 discriminator 3 23853 02d8 84ED033A vstr.32 s6, [r4, #12] 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 4 */ 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = tw4[0]; 23854 .loc 27 1053 0 discriminator 3 23855 02dc 18ED0C5A vldr.32 s10, [r8, #-48] 23856 .LVL2510: 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 23857 .loc 27 978 0 discriminator 3 23858 02e0 35EE866A vadd.f32 s12, s11, s12 23859 .LVL2511: 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - Bottom */ 23860 .loc 27 997 0 discriminator 3 23861 02e4 70EE606A vsub.f32 s13, s0, s1 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw4[1]; 23862 .loc 27 1054 0 discriminator 3 23863 02e8 58ED0B5A vldr.32 s11, [r8, #-44] 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - top */ 23864 .loc 27 979 0 discriminator 3 23865 02ec 77EE277A vadd.f32 s15, s14, s15 23866 .LVL2512: 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0; 23867 .loc 27 996 0 discriminator 3 23868 02f0 31EE617A vsub.f32 s14, s2, s3 23869 .LVL2513: 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** tw4 += twMod4; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Top */ 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t4[0] * twR; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t4[1] * twI; 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[1] * twR; ARM GAS /tmp/ccfbYRip.s page 748 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t4[0] * twI; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m0 + m1; 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 23870 .loc 27 1063 0 discriminator 3 23871 02f4 25EEC63A vnmul.f32 s6, s11, s12 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 4 */ 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 0.9973 - 0.0736i <==> -0.0736 + 0.9973i */ 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Bottom */ 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t4[3] * twI; 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t4[2] * twR; 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[2] * twI; 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t4[3] * twR; 23872 .loc 27 1070 0 discriminator 3 23873 02f8 66EE854A vmul.f32 s9, s13, s10 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[1] * twR; 23874 .loc 27 1058 0 discriminator 3 23875 02fc 67EEA53A vmul.f32 s7, s15, s11 23876 .LVL2514: 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd4-- = m0 - m1; 23877 .loc 27 1072 0 discriminator 3 23878 0300 25EE474A vnmul.f32 s8, s10, s14 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 4 */ 23879 .loc 27 1063 0 discriminator 3 23880 0304 A7EE853A vfma.f32 s6, s15, s10 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd4-- = m2 + m3; 23881 .loc 27 1073 0 discriminator 3 23882 0308 F0EE647A vmov.f32 s15, s9 23883 .LVL2515: 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 23884 .loc 27 1062 0 discriminator 3 23885 030c E6EE053A vfma.f32 s7, s12, s10 23886 .LVL2516: 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd4-- = m2 + m3; 23887 .loc 27 1072 0 discriminator 3 23888 0310 A6EEA54A vfma.f32 s8, s13, s11 23889 .loc 27 1073 0 discriminator 3 23890 0314 E7EE257A vfma.f32 s15, s14, s11 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* use vertical symmetry col 4 */ 23891 .loc 27 1063 0 discriminator 3 23892 0318 02ED033A vstr.32 s6, [r2, #-12] 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 23893 .loc 27 1062 0 discriminator 3 23894 031c 42ED043A vstr.32 s7, [r2, #-16] 23895 .LVL2517: 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pEnd4-- = m2 + m3; 23896 .loc 27 1072 0 discriminator 3 23897 0320 83ED044A vstr.32 s8, [r3, #16] 23898 .LVL2518: 23899 .loc 27 1073 0 discriminator 3 23900 0324 C3ED037A vstr.32 s15, [r3, #12] 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 23901 .loc 27 964 0 discriminator 3 23902 0328 7FF40AAF bne .L1082 23903 032c 0999 ldr r1, [sp, #36] 23904 032e 0698 ldr r0, [sp, #24] ARM GAS /tmp/ccfbYRip.s page 749 23905 .LVL2519: 23906 0330 CB00 lsls r3, r1, #3 23907 0332 01EB4102 add r2, r1, r1, lsl #1 23908 0336 00EB0111 add r1, r0, r1, lsl #4 23909 033a 0691 str r1, [sp, #24] 23910 033c 0599 ldr r1, [sp, #20] 23911 033e 1944 add r1, r1, r3 23912 0340 0591 str r1, [sp, #20] 23913 0342 0499 ldr r1, [sp, #16] 23914 0344 1944 add r1, r1, r3 23915 0346 0491 str r1, [sp, #16] 23916 0348 0799 ldr r1, [sp, #28] 23917 034a 1944 add r1, r1, r3 23918 034c 0791 str r1, [sp, #28] 23919 034e 0299 ldr r1, [sp, #8] 23920 0350 1F44 add r7, r7, r3 23921 0352 1944 add r1, r1, r3 23922 0354 039B ldr r3, [sp, #12] 23923 0356 0291 str r1, [sp, #8] 23924 0358 03EBC203 add r3, r3, r2, lsl #3 23925 035c 0393 str r3, [sp, #12] 23926 .LVL2520: 23927 .L1081: 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* MIDDLE */ 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Twiddle factors are */ 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* 1.0000 0.7071-0.7071i -1.0000i -0.7071-0.7071i */ 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_0 = p1[0] + p3[0]; 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 2 */ 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[0] = p1sp3_0 + p2[1] - p4[1]; 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23928 .loc 27 1086 0 23929 035e 079B ldr r3, [sp, #28] 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23930 .loc 27 1079 0 23931 0360 0599 ldr r1, [sp, #20] 23932 0362 0298 ldr r0, [sp, #8] 23933 .loc 27 1086 0 23934 0364 D3ED004A vldr.32 s9, [r3] 23935 0368 D7ED007A vldr.32 s15, [r7] 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; 23936 .loc 27 1079 0 23937 036c D1ED003A vldr.32 s7, [r1] 23938 0370 D0ED006A vldr.32 s13, [r0] 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23939 .loc 27 1085 0 23940 0374 D3ED012A vldr.32 s5, [r3, #4] 23941 0378 97ED013A vldr.32 s6, [r7, #4] 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23942 .loc 27 1081 0 23943 037c 90ED014A vldr.32 s8, [r0, #4] 23944 0380 91ED017A vldr.32 s14, [r1, #4] ARM GAS /tmp/ccfbYRip.s page 750 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[0] = p1ap3_0 - p2[0] - p4[0]; 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[0] = p1sp3_0 - p2[1] + p4[1]; 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - Top */ 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_0 + p2[0] + p4[0]; 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 2 */ 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = tw2[0]; 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw2[1]; 23945 .loc 27 1099 0 23946 0384 049A ldr r2, [sp, #16] 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t2[0] * twR; 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t2[1] * twI; 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t2[0] * twI; 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m0 + m1; 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 3 */ 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = tw3[0]; 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw3[1]; 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t3[0] * twR; 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t3[1] * twI; 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t3[1] * twR; 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t3[0] * twI; 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m0 + m1; 23947 .loc 27 1117 0 23948 0386 029D ldr r5, [sp, #8] 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 4 */ 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twR = tw4[0]; 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw4[1]; 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m0 = t4[0] * twR; 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m1 = t4[1] * twI; 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[1] * twR; 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m3 = t4[0] * twI; 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m0 + m1; 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* first col */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U); 23949 .loc 27 1132 0 23950 0388 BDF83040 ldrh r4, [sp, #48] 23951 038c 0E98 ldr r0, [sp, #56] 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23952 .loc 27 1094 0 23953 038e 34EEA75A vadd.f32 s10, s9, s15 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_0 = p1[0] - p3[0]; ARM GAS /tmp/ccfbYRip.s page 751 23954 .loc 27 1079 0 23955 0392 73EEA65A vadd.f32 s11, s7, s13 23956 .LVL2521: 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1ap3_1 = p1[1] + p3[1]; 23957 .loc 27 1080 0 23958 0396 73EEE66A vsub.f32 s13, s7, s13 23959 .LVL2522: 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23960 .loc 27 1094 0 23961 039a 35EE255A vadd.f32 s10, s10, s11 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** p1sp3_1 = p1[1] - p3[1]; 23962 .loc 27 1081 0 23963 039e 37EE046A vadd.f32 s12, s14, s8 23964 .LVL2523: 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p1++ = p1ap3_1 + p2[1] + p4[1]; 23965 .loc 27 1094 0 23966 03a2 81ED005A vstr.32 s10, [r1] 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23967 .loc 27 1095 0 23968 03a6 D7ED013A vldr.32 s7, [r7, #4] 23969 03aa 93ED015A vldr.32 s10, [r3, #4] 23970 03ae 35EE235A vadd.f32 s10, s10, s7 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23971 .loc 27 1082 0 23972 03b2 37EE447A vsub.f32 s14, s14, s8 23973 .LVL2524: 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23974 .loc 27 1095 0 23975 03b6 35EE065A vadd.f32 s10, s10, s12 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23976 .loc 27 1086 0 23977 03ba 37EE644A vsub.f32 s8, s14, s9 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23978 .loc 27 1085 0 23979 03be 76EEC33A vsub.f32 s7, s13, s6 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23980 .loc 27 1095 0 23981 03c2 81ED015A vstr.32 s10, [r1, #4] 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 23982 .loc 27 1099 0 23983 03c6 92ED015A vldr.32 s10, [r2, #4] 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw2[1]; 23984 .loc 27 1098 0 23985 03ca D2ED001A vldr.32 s3, [r2] 23986 .loc 27 1132 0 23987 03ce 019A ldr r2, [sp, #4] 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t2[1] = p1sp3_1 - p2[0] + p4[0]; 23988 .loc 27 1085 0 23989 03d0 73EEA23A vadd.f32 s7, s7, s5 23990 .LVL2525: 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 3 */ 23991 .loc 27 1086 0 23992 03d4 34EE274A vadd.f32 s8, s8, s15 23993 .LVL2526: 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 23994 .loc 27 1088 0 23995 03d8 75EEE45A vsub.f32 s11, s11, s9 ARM GAS /tmp/ccfbYRip.s page 752 23996 .LVL2527: 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t2[1] * twR; 23997 .loc 27 1102 0 23998 03dc 24EE052A vmul.f32 s4, s8, s10 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 3 */ 23999 .loc 27 1107 0 24000 03e0 25EE635A vnmul.f32 s10, s10, s7 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 24001 .loc 27 1106 0 24002 03e4 A3EEA12A vfma.f32 s4, s7, s3 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 24003 .loc 27 1117 0 24004 03e8 2E46 mov r6, r5 24005 .loc 27 1132 0 24006 03ea 2146 mov r1, r4 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 3 */ 24007 .loc 27 1107 0 24008 03ec A4EE215A vfma.f32 s10, s8, s3 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p2++ = m2 - m3; 24009 .loc 27 1106 0 24010 03f0 83ED002A vstr.32 s4, [r3] 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 3 */ 24011 .loc 27 1107 0 24012 03f4 83ED015A vstr.32 s10, [r3, #4] 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 24013 .loc 27 1089 0 24014 03f8 36EE626A vsub.f32 s12, s12, s5 24015 .LVL2528: 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24016 .loc 27 1110 0 24017 03fc 069B ldr r3, [sp, #24] 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 4 */ 24018 .loc 27 1089 0 24019 03fe 36EE436A vsub.f32 s12, s12, s6 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24020 .loc 27 1110 0 24021 0402 93ED015A vldr.32 s10, [r3, #4] 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw3[1]; 24022 .loc 27 1109 0 24023 0406 D3ED003A vldr.32 s7, [r3] 24024 .LVL2529: 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t3[1] = p1ap3_1 - p2[1] - p4[1]; 24025 .loc 27 1088 0 24026 040a 75EEE75A vsub.f32 s11, s11, s15 24027 .LVL2530: 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t3[1] * twR; 24028 .loc 27 1113 0 24029 040e 26EE054A vmul.f32 s8, s12, s10 24030 .LVL2531: 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 4 */ 24031 .loc 27 1118 0 24032 0412 25EE655A vnmul.f32 s10, s10, s11 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 24033 .loc 27 1117 0 24034 0416 A5EEA34A vfma.f32 s8, s11, s7 24035 .loc 27 1132 0 24036 041a 0423 movs r3, #4 ARM GAS /tmp/ccfbYRip.s page 753 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 4 */ 24037 .loc 27 1118 0 24038 041c A6EE235A vfma.f32 s10, s12, s7 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p3++ = m2 - m3; 24039 .loc 27 1117 0 24040 0420 86ED004A vstr.32 s8, [r6] 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - Top */ 24041 .loc 27 1092 0 24042 0424 77EE677A vsub.f32 s15, s14, s15 24043 .LVL2532: 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* COL 4 */ 24044 .loc 27 1118 0 24045 0428 85ED015A vstr.32 s10, [r5, #4] 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 24046 .loc 27 1091 0 24047 042c 36EEE27A vsub.f32 s14, s13, s5 24048 .LVL2533: 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24049 .loc 27 1121 0 24050 0430 039D ldr r5, [sp, #12] 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* col 1 - Top */ 24051 .loc 27 1092 0 24052 0432 77EEA47A vadd.f32 s15, s15, s9 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** t4[1] = p1sp3_1 + p2[0] - p4[0]; 24053 .loc 27 1091 0 24054 0436 37EE037A vadd.f32 s14, s14, s6 24055 .LVL2534: 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24056 .loc 27 1121 0 24057 043a D5ED016A vldr.32 s13, [r5, #4] 24058 .LVL2535: 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** twI = tw4[1]; 24059 .loc 27 1120 0 24060 043e D5ED005A vldr.32 s11, [r5] 24061 .LVL2536: 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** m2 = t4[1] * twR; 24062 .loc 27 1124 0 24063 0442 27EEA66A vmul.f32 s12, s15, s13 24064 .LVL2537: 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24065 .loc 27 1129 0 24066 0446 66EEC76A vnmul.f32 s13, s13, s14 24067 .LVL2538: 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 24068 .loc 27 1128 0 24069 044a A7EE256A vfma.f32 s12, s14, s11 24070 .LVL2539: 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24071 .loc 27 1129 0 24072 044e E7EEA56A vfma.f32 s13, s15, s11 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *p4++ = m2 - m3; 24073 .loc 27 1128 0 24074 0452 87ED006A vstr.32 s12, [r7] 24075 .LVL2540: 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24076 .loc 27 1129 0 24077 0456 C7ED016A vstr.32 s13, [r7, #4] ARM GAS /tmp/ccfbYRip.s page 754 24078 .loc 27 1132 0 24079 045a FFF7FEFF bl arm_radix8_butterfly_f32 24080 .LVL2541: 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* second col */ 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U); 24081 .loc 27 1135 0 24082 045e 0D9D ldr r5, [sp, #52] 24083 0460 0898 ldr r0, [sp, #32] 24084 0462 6A68 ldr r2, [r5, #4] 24085 0464 2146 mov r1, r4 24086 0466 0423 movs r3, #4 24087 0468 FFF7FEFF bl arm_radix8_butterfly_f32 24088 .LVL2542: 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* third col */ 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U); 24089 .loc 27 1138 0 24090 046c 0A98 ldr r0, [sp, #40] 24091 046e 6A68 ldr r2, [r5, #4] 24092 0470 2146 mov r1, r4 24093 0472 0423 movs r3, #4 24094 0474 FFF7FEFF bl arm_radix8_butterfly_f32 24095 .LVL2543: 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* fourth col */ 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U); 24096 .loc 27 1141 0 24097 0478 6A68 ldr r2, [r5, #4] 24098 047a 0B98 ldr r0, [sp, #44] 24099 047c 2146 mov r1, r4 24100 047e 0423 movs r3, #4 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 24101 .loc 27 1142 0 24102 0480 11B0 add sp, sp, #68 24103 .LCFI265: 24104 .cfi_def_cfa_offset 84 24105 @ sp needed 24106 0482 BDEC0C8B vldm sp!, {d8-d13} 24107 .LCFI266: 24108 .cfi_restore 90 24109 .cfi_restore 91 24110 .cfi_restore 88 24111 .cfi_restore 89 24112 .cfi_restore 86 24113 .cfi_restore 87 24114 .cfi_restore 84 24115 .cfi_restore 85 24116 .cfi_restore 82 24117 .cfi_restore 83 24118 .cfi_restore 80 24119 .cfi_restore 81 24120 .cfi_def_cfa_offset 36 24121 0486 BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} 24122 .LCFI267: 24123 .cfi_restore 14 24124 .cfi_restore 11 ARM GAS /tmp/ccfbYRip.s page 755 24125 .cfi_restore 10 24126 .cfi_restore 9 24127 .cfi_restore 8 24128 .cfi_restore 7 24129 .cfi_restore 6 24130 .cfi_restore 5 24131 .cfi_restore 4 24132 .cfi_def_cfa_offset 0 24133 .LVL2544: 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 24134 .loc 27 1141 0 24135 048a FFF7FEBF b arm_radix8_butterfly_f32 24136 .LVL2545: 24137 .cfi_endproc 24138 .LFE155: 24140 048e 00BF .section .text.arm_cfft_f32,"ax",%progbits 24141 .align 1 24142 .p2align 2,,3 24143 .global arm_cfft_f32 24144 .syntax unified 24145 .thumb 24146 .thumb_func 24147 .fpu fpv4-sp-d16 24149 arm_cfft_f32: 24150 .LFB156: 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @addtogroup ComplexFFT 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @{ 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /** 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @brief Processing function for the floating-point complex FFT. 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] S points to an instance of the floating-point CFFT structure 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Pr 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] ifftFlag flag that selects transform direction 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 0: forward transform 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 1: inverse transform 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 0: disables bit reversal of output 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** - value = 1: enables bit reversal of output 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** @return none 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** */ 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** void arm_cfft_f32( 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** const arm_cfft_instance_f32 * S, 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t * p1, 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint8_t ifftFlag, 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint8_t bitReverseFlag) 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24151 .loc 27 1167 0 24152 .cfi_startproc 24153 @ args = 0, pretend = 0, frame = 0 24154 @ frame_needed = 0, uses_anonymous_args = 0 24155 .LVL2546: 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen, l; 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** float32_t invL, * pSrc; ARM GAS /tmp/ccfbYRip.s page 756 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** if (ifftFlag == 1U) 24156 .loc 27 1171 0 24157 0000 012A cmp r2, #1 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen, l; 24158 .loc 27 1167 0 24159 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} 24160 .LCFI268: 24161 .cfi_def_cfa_offset 24 24162 .cfi_offset 4, -24 24163 .cfi_offset 5, -20 24164 .cfi_offset 6, -16 24165 .cfi_offset 7, -12 24166 .cfi_offset 8, -8 24167 .cfi_offset 14, -4 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen, l; 24168 .loc 27 1167 0 24169 0006 8046 mov r8, r0 24170 0008 1646 mov r6, r2 24171 000a 0C46 mov r4, r1 24172 000c 1F46 mov r7, r3 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** uint32_t L = S->fftLen, l; 24173 .loc 27 1168 0 24174 000e 0588 ldrh r5, [r0] 24175 .LVL2547: 24176 .loc 27 1171 0 24177 0010 6ED0 beq .L1144 24178 .LVL2548: 24179 .L1089: 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Conjugate input data */ 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc = p1 + 1; 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (l = 0; l < L; l++) 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc = -*pSrc; 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc += 2; 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** switch (L) 24180 .loc 27 1182 0 24181 0012 B5F5807F cmp r5, #256 24182 0016 66D0 beq .L1093 24183 0018 0FD8 bhi .L1094 24184 001a 202D cmp r5, #32 24185 001c 63D0 beq .L1093 24186 001e 7BD9 bls .L1145 24187 0020 402D cmp r5, #64 24188 0022 14D0 beq .L1097 24189 0024 802D cmp r5, #128 24190 0026 03D1 bne .L1092 24191 .L1096: 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 16: 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 128: 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 1024: 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1); ARM GAS /tmp/ccfbYRip.s page 757 24192 .loc 27 1187 0 24193 0028 2146 mov r1, r4 24194 .LVL2549: 24195 002a 4046 mov r0, r8 24196 .LVL2550: 24197 002c FFF7FEFF bl arm_cfft_radix8by2_f32 24198 .LVL2551: 24199 .L1092: 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 32: 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 256: 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 2048: 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1); 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 512: 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 4096: 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1); 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** if ( bitReverseFlag ) 24200 .loc 27 1201 0 24201 0030 B7B9 cbnz r7, .L1103 24202 .L1099: 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** if (ifftFlag == 1U) 24203 .loc 27 1204 0 24204 0032 012E cmp r6, #1 24205 0034 38D0 beq .L1146 24206 .L1088: 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** invL = 1.0f / (float32_t)L; 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** /* Conjugate and scale output data */ 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc = p1; 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** for (l= 0; l < L; l++) 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc++ *= invL ; 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc = -(*pSrc) * invL; 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc++; 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** } 24207 .loc 27 1217 0 24208 0036 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 24209 .LVL2552: 24210 .L1094: 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24211 .loc 27 1182 0 24212 003a B5F5806F cmp r5, #1024 24213 003e F3D0 beq .L1096 24214 0040 66D9 bls .L1147 24215 0042 B5F5006F cmp r5, #2048 24216 0046 4ED0 beq .L1093 24217 0048 B5F5805F cmp r5, #4096 ARM GAS /tmp/ccfbYRip.s page 758 24218 004c F0D1 bne .L1092 24219 .L1097: 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 24220 .loc 27 1197 0 24221 004e 0123 movs r3, #1 24222 0050 D8F80420 ldr r2, [r8, #4] 24223 0054 2946 mov r1, r5 24224 .LVL2553: 24225 0056 2046 mov r0, r4 24226 .LVL2554: 24227 0058 FFF7FEFF bl arm_radix8_butterfly_f32 24228 .LVL2555: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 24229 .loc 27 1201 0 24230 005c 002F cmp r7, #0 24231 005e E8D0 beq .L1099 24232 .L1103: 24233 .LBB2688: 24234 .LBB2689: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 24235 .loc 8 82 0 24236 0060 B8F80C70 ldrh r7, [r8, #12] 24237 .LBE2689: 24238 .LBE2688: 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24239 .loc 27 1202 0 24240 0064 D8F80810 ldr r1, [r8, #8] 24241 .LVL2556: 24242 .LBB2691: 24243 .LBB2690: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 24244 .loc 8 82 0 24245 0068 002F cmp r7, #0 24246 006a E2D0 beq .L1099 24247 006c 013F subs r7, r7, #1 24248 006e 7F08 lsrs r7, r7, #1 24249 0070 0B1D adds r3, r1, #4 24250 0072 03EB870E add lr, r3, r7, lsl #2 24251 .LVL2557: 24252 .L1100: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 24253 .loc 8 85 0 24254 0076 4A88 ldrh r2, [r1, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 24255 .loc 8 84 0 24256 0078 0B88 ldrh r3, [r1] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 24257 .loc 8 85 0 24258 007a 9208 lsrs r2, r2, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 24259 .loc 8 84 0 24260 007c 9B08 lsrs r3, r3, #2 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 24261 .loc 8 89 0 24262 007e 54F82200 ldr r0, [r4, r2, lsl #2] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 24263 .loc 8 88 0 ARM GAS /tmp/ccfbYRip.s page 759 24264 0082 54F823C0 ldr ip, [r4, r3, lsl #2] 24265 .LVL2558: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 24266 .loc 8 89 0 24267 0086 44F82300 str r0, [r4, r3, lsl #2] 24268 .LVL2559: 24269 008a 9000 lsls r0, r2, #2 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 24270 .loc 8 88 0 24271 008c 9B00 lsls r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 24272 .loc 8 90 0 24273 008e 44F822C0 str ip, [r4, r2, lsl #2] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 24274 .loc 8 93 0 24275 0092 0433 adds r3, r3, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 24276 .loc 8 94 0 24277 0094 021D adds r2, r0, #4 24278 0096 0431 adds r1, r1, #4 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 24279 .loc 8 93 0 24280 0098 E058 ldr r0, [r4, r3] 24281 .LVL2560: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 24282 .loc 8 94 0 24283 009a A758 ldr r7, [r4, r2] 24284 009c E750 str r7, [r4, r3] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 24285 .loc 8 82 0 24286 009e 8E45 cmp lr, r1 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 24287 .loc 8 95 0 24288 00a0 A050 str r0, [r4, r2] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 24289 .loc 8 82 0 24290 00a2 E8D1 bne .L1100 24291 .LBE2690: 24292 .LBE2691: 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24293 .loc 27 1204 0 24294 00a4 012E cmp r6, #1 24295 00a6 C6D1 bne .L1088 24296 .LVL2561: 24297 .L1146: 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 24298 .loc 27 1206 0 24299 00a8 07EE905A vmov s15, r5 @ int 24300 00ac F8EE677A vcvt.f32.u32 s15, s15 24301 00b0 B7EE007A vmov.f32 s14, #1.0e+0 24302 00b4 C7EE276A vdiv.f32 s13, s14, s15 24303 .LVL2562: 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24304 .loc 27 1210 0 24305 00b8 002D cmp r5, #0 24306 00ba BCD0 beq .L1088 24307 00bc 0834 adds r4, r4, #8 ARM GAS /tmp/ccfbYRip.s page 760 24308 .LVL2563: 24309 00be 0023 movs r3, #0 24310 .LVL2564: 24311 .L1102: 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24312 .loc 27 1210 0 is_stmt 0 discriminator 3 24313 00c0 0133 adds r3, r3, #1 24314 .LVL2565: 24315 00c2 9D42 cmp r5, r3 24316 00c4 04F10804 add r4, r4, #8 24317 .LVL2566: 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc = -(*pSrc) * invL; 24318 .loc 27 1212 0 is_stmt 1 discriminator 3 24319 00c8 14ED047A vldr.32 s14, [r4, #-16] 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc++; 24320 .loc 27 1213 0 discriminator 3 24321 00cc 54ED037A vldr.32 s15, [r4, #-12] 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc = -(*pSrc) * invL; 24322 .loc 27 1212 0 discriminator 3 24323 00d0 27EE267A vmul.f32 s14, s14, s13 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc++; 24324 .loc 27 1213 0 discriminator 3 24325 00d4 67EEE67A vnmul.f32 s15, s15, s13 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** *pSrc = -(*pSrc) * invL; 24326 .loc 27 1212 0 discriminator 3 24327 00d8 04ED047A vstr.32 s14, [r4, #-16] 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc++; 24328 .loc 27 1213 0 discriminator 3 24329 00dc 44ED037A vstr.32 s15, [r4, #-12] 24330 .LVL2567: 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24331 .loc 27 1210 0 discriminator 3 24332 00e0 EED1 bne .L1102 24333 .loc 27 1217 0 24334 00e2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 24335 .LVL2568: 24336 .L1093: 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 24337 .loc 27 1192 0 24338 00e6 2146 mov r1, r4 24339 .LVL2569: 24340 00e8 4046 mov r0, r8 24341 .LVL2570: 24342 00ea FFF7FEFF bl arm_cfft_radix8by4_f32 24343 .LVL2571: 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** case 64: 24344 .loc 27 1193 0 24345 00ee 9FE7 b .L1092 24346 .LVL2572: 24347 .L1144: 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24348 .loc 27 1175 0 24349 00f0 ADB1 cbz r5, .L1090 24350 00f2 01F10C03 add r3, r1, #12 24351 .LVL2573: 24352 00f6 0022 movs r2, #0 24353 .LVL2574: ARM GAS /tmp/ccfbYRip.s page 761 24354 .L1091: 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc += 2; 24355 .loc 27 1177 0 discriminator 3 24356 00f8 53ED027A vldr.32 s15, [r3, #-8] 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24357 .loc 27 1175 0 discriminator 3 24358 00fc 0132 adds r2, r2, #1 24359 .LVL2575: 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc += 2; 24360 .loc 27 1177 0 discriminator 3 24361 00fe F1EE677A vneg.f32 s15, s15 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24362 .loc 27 1175 0 discriminator 3 24363 0102 9542 cmp r5, r2 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** pSrc += 2; 24364 .loc 27 1177 0 discriminator 3 24365 0104 43ED027A vstr.32 s15, [r3, #-8] 24366 .LVL2576: 24367 0108 03F10803 add r3, r3, #8 24368 .LVL2577: 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24369 .loc 27 1175 0 discriminator 3 24370 010c F4D1 bne .L1091 24371 010e 80E7 b .L1089 24372 .LVL2578: 24373 .L1147: 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 24374 .loc 27 1182 0 24375 0110 B5F5007F cmp r5, #512 24376 0114 9BD0 beq .L1097 24377 0116 8BE7 b .L1092 24378 .L1145: 24379 0118 102D cmp r5, #16 24380 011a 85D0 beq .L1096 24381 011c 88E7 b .L1092 24382 .LVL2579: 24383 .L1090: 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 24384 .loc 27 1201 0 24385 011e 002B cmp r3, #0 24386 0120 89D0 beq .L1088 24387 0122 9DE7 b .L1103 24388 .cfi_endproc 24389 .LFE156: 24391 .section .text.arm_dct4_init_f32,"ax",%progbits 24392 .align 1 24393 .p2align 2,,3 24394 .global arm_dct4_init_f32 24395 .syntax unified 24396 .thumb 24397 .thumb_func 24398 .fpu fpv4-sp-d16 24400 arm_dct4_init_f32: 24401 .LFB196: 24402 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Project: CMSIS DSP Library ARM GAS /tmp/ccfbYRip.s page 762 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Title: arm_dct4_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Description: Initialization function of DCT-4 & IDCT4 F32 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @addtogroup DCT4_IDCT4 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @brief Initialization function for the floating-point DCT4/IDCT4. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in] N length of the DCT4 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in] Nby2 half of the length of the DCT4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @param[in] normalize normalizing factor. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform len 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** @par Normalizing factor 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** The normalizing factor is sqrt(2/N), which depends on the size of t 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** Floating-point normalizing factors are mentioned in the table below for differen 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** \image html dct4NormalizingF32Table.gif 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 763 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_status arm_dct4_init_f32( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_dct4_instance_f32 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_rfft_instance_f32 * S_RFFT, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_cfft_radix4_instance_f32 * S_CFFT, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** uint16_t N, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** uint16_t Nby2, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** float32_t normalize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** { 24403 .loc 28 67 0 24404 .cfi_startproc 24405 @ args = 4, pretend = 0, frame = 0 24406 @ frame_needed = 0, uses_anonymous_args = 0 24407 @ link register save eliminated. 24408 .LVL2580: 24409 0000 70B4 push {r4, r5, r6} 24410 .LCFI269: 24411 .cfi_def_cfa_offset 12 24412 .cfi_offset 4, -12 24413 .cfi_offset 5, -8 24414 .cfi_offset 6, -4 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the default arm status */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the DCT4 length */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->N = N; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the half of DCT4 length */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->Nby2 = Nby2; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the DCT4 Normalizing factor */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->normalize = normalize; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize Real FFT Instance */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pRfft = S_RFFT; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize Complex FFT Instance */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCfft = S_CFFT; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** switch (N) 24415 .loc 28 87 0 24416 0002 B3F5007F cmp r3, #512 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the default arm status */ 24417 .loc 28 67 0 24418 0006 BDF80C40 ldrh r4, [sp, #12] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24419 .loc 28 76 0 24420 000a 4480 strh r4, [r0, #2] @ movhi 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24421 .loc 28 79 0 24422 000c 80ED010A vstr.32 s0, [r0, #4] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24423 .loc 28 85 0 24424 0010 C0E90412 strd r1, r2, [r0, #16] 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24425 .loc 28 73 0 24426 0014 0380 strh r3, [r0] @ movhi ARM GAS /tmp/ccfbYRip.s page 764 24427 0016 4FEA5304 lsr r4, r3, #1 24428 .loc 28 87 0 24429 001a 5BD0 beq .L1150 24430 001c 49D9 bls .L1172 24431 001e B3F5006F cmp r3, #2048 24432 0022 28D0 beq .L1153 24433 0024 B3F5005F cmp r3, #8192 24434 0028 64D1 bne .L1149 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** { 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the table modifier values */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** case 8192U: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pTwiddle = Weights_8192; 24435 .loc 28 92 0 24436 002a 4F4E ldr r6, .L1173 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_8192; 24437 .loc 28 93 0 24438 002c 4F4D ldr r5, .L1173+4 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_8192; 24439 .loc 28 92 0 24440 002e 8660 str r6, [r0, #8] 24441 .loc 28 93 0 24442 0030 C560 str r5, [r0, #12] 24443 .LVL2581: 24444 .LBB2702: 24445 .LBB2703: 24446 .file 29 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Title: arm_rfft_init_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Description: RFFT & RIFFT Floating point initialisation function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** #include "arm_common_tables.h" ARM GAS /tmp/ccfbYRip.s page 765 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @addtogroup RealFFT 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @{ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** */ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @brief Initialization function for the floating-point RFFT/RIFFT. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 an 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @param[in,out] S points to an instance of the floating-point RFFT/RIFFT structure 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @param[in,out] S_CFFT points to an instance of the floating-point CFFT/CIFFT structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @param[in] fftLenReal length of the FFT. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @param[in] ifftFlagR flag that selects transform direction 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - value = 0: forward transform 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - value = 1: inverse transform 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - value = 0: disables bit reversal of output 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - value = 1: enables bit reversal of output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @return execution status 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported leng 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @par Description 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** The parameter fftLenRealspecifies length of RFFT/RIFFT Process. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** Supported FFT Lengths are 128, 512, 2048. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** The parameter ifftFlagR controls whether a forward or inverse trans 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** The parameter bitReverseFlag controls whether output is in normal o 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** This function also initializes Twiddle factor table. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_status arm_rfft_init_f32( 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_rfft_instance_f32 * S, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_cfft_radix4_instance_f32 * S_CFFT, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** uint32_t fftLenReal, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** uint32_t ifftFlagR, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** uint32_t bitReverseFlag) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialise the default arm status */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_status status = ARM_MATH_SUCCESS; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Real FFT length */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->fftLenReal = (uint16_t) fftLenReal; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Complex FFT length */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->fftLenBy2 = (uint16_t) fftLenReal / 2U; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Twiddle coefficientA pointer */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->pTwiddleAReal = (float32_t *) realCoefA; 24447 .loc 29 85 0 24448 0032 4F4E ldr r6, .L1173+8 ARM GAS /tmp/ccfbYRip.s page 766 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Twiddle coefficientB pointer */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->pTwiddleBReal = (float32_t *) realCoefB; 24449 .loc 29 88 0 24450 0034 4F4D ldr r5, .L1173+12 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24451 .loc 29 79 0 24452 0036 5048 ldr r0, .L1173+16 24453 .LVL2582: 24454 0038 4860 str r0, [r1, #4] 24455 .loc 29 88 0 24456 003a C1E90365 strd r6, r5, [r1, #12] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24457 .loc 29 79 0 24458 003e 0B60 str r3, [r1] 24459 .LBE2703: 24460 .LBE2702: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24461 .loc 28 69 0 24462 0040 0020 movs r0, #0 24463 .LVL2583: 24464 .L1155: 24465 .LBB2722: 24466 .LBB2714: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Flag for selection of RFFT or RIFFT */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->ifftFlagR = (uint8_t) ifftFlagR; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initialize the Flag for calculation Bit reversal or not */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->bitReverseFlagR = (uint8_t) bitReverseFlag; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initializations of structure parameters depending on the FFT length */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** switch (S->fftLenReal) 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Init table modifier value */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** case 8192U: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->twidCoefRModifier = 1U; 24467 .loc 29 101 0 24468 0042 0123 movs r3, #1 24469 .LVL2584: 24470 0044 8B60 str r3, [r1, #8] 24471 .LVL2585: 24472 .L1158: 24473 .LBB2704: 24474 .LBB2705: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 24475 .loc 23 81 0 24476 0046 4D4D ldr r5, .L1173+20 24477 .LBE2705: 24478 .LBE2704: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** case 2048U: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->twidCoefRModifier = 4U; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** case 512U: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->twidCoefRModifier = 16U; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; ARM GAS /tmp/ccfbYRip.s page 767 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** case 128U: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->twidCoefRModifier = 64U; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** default: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Reporting argument error if rfftSize is not valid value */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** } 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Init Complex FFT Instance */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** S->pCfft = S_CFFT; 24479 .loc 29 119 0 24480 0048 4A61 str r2, [r1, #20] 24481 .LVL2586: 24482 .LBB2711: 24483 .LBB2708: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 24484 .loc 23 84 0 24485 004a 0023 movs r3, #0 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 24486 .loc 23 90 0 24487 004c B4F5807F cmp r4, #256 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 24488 .loc 23 78 0 24489 0050 1480 strh r4, [r2] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 24490 .loc 23 81 0 24491 0052 5560 str r5, [r2, #4] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 24492 .loc 23 84 0 24493 0054 5380 strh r3, [r2, #2] @ movhi 24494 .LVL2587: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 24495 .loc 23 90 0 24496 0056 65D0 beq .L1160 24497 0058 1CD8 bhi .L1161 24498 005a 102C cmp r4, #16 24499 005c 6BD0 beq .L1162 24500 005e 402C cmp r4, #64 24501 0060 07D1 bne .L1159 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24502 .loc 23 133 0 24503 0062 4FF07251 mov r1, #1015021568 24504 .LVL2588: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 24505 .loc 23 132 0 24506 0066 464B ldr r3, .L1173+24 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24507 .loc 23 133 0 24508 0068 1161 str r1, [r2, #16] @ float 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 64U; 24509 .loc 23 130 0 24510 006a 4FF04011 mov r1, #4194368 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 24511 .loc 23 132 0 24512 006e C2E90231 strd r3, r1, [r2, #8] 24513 .L1159: ARM GAS /tmp/ccfbYRip.s page 768 24514 .LVL2589: 24515 .LBE2708: 24516 .LBE2711: 24517 .LBE2714: 24518 .LBE2722: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #endif 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** case 2048U: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pTwiddle = Weights_2048; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_2048; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #endif 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** case 512U: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pTwiddle = Weights_512; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_512; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #endif 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** case 128U: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pTwiddle = Weights_128; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_128; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** #endif 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** default: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** status = ARM_MATH_ARGUMENT_ERROR; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** } 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* Initialize the RFFT/RIFFT Function */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** /* return the status of DCT4 Init function */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** return (status); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** } 24519 .loc 28 126 0 24520 0072 70BC pop {r4, r5, r6} 24521 .LCFI270: 24522 .cfi_remember_state 24523 .cfi_restore 6 24524 .cfi_restore 5 24525 .cfi_restore 4 24526 .cfi_def_cfa_offset 0 24527 .LVL2590: 24528 0074 7047 bx lr 24529 .LVL2591: 24530 .L1153: 24531 .LCFI271: 24532 .cfi_restore_state 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_2048; 24533 .loc 28 99 0 24534 0076 434E ldr r6, .L1173+28 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24535 .loc 28 100 0 ARM GAS /tmp/ccfbYRip.s page 769 24536 0078 434D ldr r5, .L1173+32 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_2048; 24537 .loc 28 99 0 24538 007a 8660 str r6, [r0, #8] 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24539 .loc 28 100 0 24540 007c C560 str r5, [r0, #12] 24541 .LVL2592: 24542 .LBB2723: 24543 .LBB2715: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24544 .loc 29 85 0 24545 007e 3C4E ldr r6, .L1173+8 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24546 .loc 29 88 0 24547 0080 3C4D ldr r5, .L1173+12 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24548 .loc 29 79 0 24549 0082 4248 ldr r0, .L1173+36 24550 .LVL2593: 24551 0084 4860 str r0, [r1, #4] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24552 .loc 29 88 0 24553 0086 C1E90365 strd r6, r5, [r1, #12] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24554 .loc 29 79 0 24555 008a 0B60 str r3, [r1] 24556 .LBE2715: 24557 .LBE2723: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24558 .loc 28 69 0 24559 008c 0020 movs r0, #0 24560 .LVL2594: 24561 .L1156: 24562 .LBB2724: 24563 .LBB2716: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 24564 .loc 29 104 0 24565 008e 0423 movs r3, #4 24566 .LVL2595: 24567 0090 8B60 str r3, [r1, #8] 24568 0092 D8E7 b .L1158 24569 .LVL2596: 24570 .L1161: 24571 .LBB2712: 24572 .LBB2709: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 24573 .loc 23 90 0 24574 0094 B4F5806F cmp r4, #1024 24575 0098 56D0 beq .L1164 24576 009a B4F5805F cmp r4, #4096 24577 009e E8D1 bne .L1159 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24578 .loc 23 103 0 24579 00a0 4FF06651 mov r1, #964689920 24580 .LVL2597: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ ARM GAS /tmp/ccfbYRip.s page 770 24581 .loc 23 101 0 24582 00a4 3A4B ldr r3, .L1173+40 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24583 .loc 23 103 0 24584 00a6 1161 str r1, [r2, #16] @ float 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 24585 .loc 23 97 0 24586 00a8 4FF00111 mov r1, #65537 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 24587 .loc 23 101 0 24588 00ac C2E90231 strd r3, r1, [r2, #8] 24589 00b0 DFE7 b .L1159 24590 .LVL2598: 24591 .L1172: 24592 .LBE2709: 24593 .LBE2712: 24594 .LBE2716: 24595 .LBE2724: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** { 24596 .loc 28 87 0 24597 00b2 802B cmp r3, #128 24598 00b4 1ED1 bne .L1149 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_128; 24599 .loc 28 113 0 24600 00b6 374E ldr r6, .L1173+44 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24601 .loc 28 114 0 24602 00b8 374D ldr r5, .L1173+48 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_128; 24603 .loc 28 113 0 24604 00ba 8660 str r6, [r0, #8] 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24605 .loc 28 114 0 24606 00bc C560 str r5, [r0, #12] 24607 .LVL2599: 24608 .LBB2725: 24609 .LBB2717: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24610 .loc 29 85 0 24611 00be 2C4E ldr r6, .L1173+8 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24612 .loc 29 79 0 24613 00c0 3648 ldr r0, .L1173+52 24614 .LVL2600: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24615 .loc 29 88 0 24616 00c2 2C4D ldr r5, .L1173+12 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24617 .loc 29 79 0 24618 00c4 0B60 str r3, [r1] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24619 .loc 29 94 0 24620 00c6 4023 movs r3, #64 24621 .LVL2601: 24622 00c8 C1E90103 strd r0, r3, [r1, #4] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24623 .loc 29 88 0 ARM GAS /tmp/ccfbYRip.s page 771 24624 00cc C1E90365 strd r6, r5, [r1, #12] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24625 .loc 29 94 0 24626 00d0 0020 movs r0, #0 24627 00d2 B8E7 b .L1158 24628 .LVL2602: 24629 .L1150: 24630 .LBE2717: 24631 .LBE2725: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_512; 24632 .loc 28 106 0 24633 00d4 324D ldr r5, .L1173+56 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24634 .loc 28 107 0 24635 00d6 334E ldr r6, .L1173+60 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** S->pCosFactor = cos_factors_512; 24636 .loc 28 106 0 24637 00d8 8560 str r5, [r0, #8] 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** break; 24638 .loc 28 107 0 24639 00da C660 str r6, [r0, #12] 24640 .LVL2603: 24641 .LBB2726: 24642 .LBB2718: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24643 .loc 29 85 0 24644 00dc 244D ldr r5, .L1173+8 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24645 .loc 29 88 0 24646 00de 2548 ldr r0, .L1173+12 24647 .LVL2604: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24648 .loc 29 79 0 24649 00e0 0B60 str r3, [r1] 24650 00e2 4FF00123 mov r3, #16777472 24651 .LVL2605: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24652 .loc 29 88 0 24653 00e6 C1E90350 strd r5, r0, [r1, #12] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24654 .loc 29 79 0 24655 00ea 4B60 str r3, [r1, #4] 24656 .LBE2718: 24657 .LBE2726: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** 24658 .loc 28 69 0 24659 00ec 0020 movs r0, #0 24660 .LVL2606: 24661 .L1157: 24662 .LBB2727: 24663 .LBB2719: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 24664 .loc 29 107 0 24665 00ee 1023 movs r3, #16 24666 00f0 8B60 str r3, [r1, #8] 24667 00f2 A8E7 b .L1158 24668 .LVL2607: ARM GAS /tmp/ccfbYRip.s page 772 24669 .L1149: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24670 .loc 29 85 0 24671 00f4 1E48 ldr r0, .L1173+8 24672 .LVL2608: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24673 .loc 29 88 0 24674 00f6 1F4D ldr r5, .L1173+12 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24675 .loc 29 85 0 24676 00f8 C860 str r0, [r1, #12] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 24677 .loc 29 97 0 24678 00fa B3F5006F cmp r3, #2048 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24679 .loc 29 91 0 24680 00fe 4FF48070 mov r0, #256 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24681 .loc 29 79 0 24682 0102 0B60 str r3, [r1] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24683 .loc 29 82 0 24684 0104 8C80 strh r4, [r1, #4] @ movhi 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24685 .loc 29 88 0 24686 0106 0D61 str r5, [r1, #16] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 24687 .loc 29 91 0 24688 0108 C880 strh r0, [r1, #6] @ movhi 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 24689 .loc 29 97 0 24690 010a 26D0 beq .L1169 24691 010c B3F5005F cmp r3, #8192 24692 0110 26D0 beq .L1167 24693 0112 B3F5007F cmp r3, #512 24694 .LBE2719: 24695 .LBE2727: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** } 24696 .loc 28 118 0 24697 0116 18BF it ne 24698 0118 4FF0FF30 movne r0, #-1 24699 .LBB2728: 24700 .LBB2720: 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 24701 .loc 29 97 0 24702 011c 93D1 bne .L1158 24703 .LBE2720: 24704 .LBE2728: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** } 24705 .loc 28 118 0 24706 011e 4FF0FF30 mov r0, #-1 24707 0122 E4E7 b .L1157 24708 .LVL2609: 24709 .L1160: 24710 .LBB2729: 24711 .LBB2721: 24712 .LBB2713: ARM GAS /tmp/ccfbYRip.s page 773 24713 .LBB2710: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24714 .loc 23 125 0 24715 0124 4FF06E51 mov r1, #998244352 24716 .LVL2610: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 24717 .loc 23 124 0 24718 0128 1F4B ldr r3, .L1173+64 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24719 .loc 23 125 0 24720 012a 1161 str r1, [r2, #16] @ float 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 16U; 24721 .loc 23 122 0 24722 012c 4FF01011 mov r1, #1048592 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 24723 .loc 23 124 0 24724 0130 C2E90231 strd r3, r1, [r2, #8] 24725 0134 9DE7 b .L1159 24726 .LVL2611: 24727 .L1162: 24728 .LBB2706: 24729 .LBB2707: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24730 .loc 23 141 0 24731 0136 4FF07651 mov r1, #1031798784 24732 .LVL2612: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 24733 .loc 23 140 0 24734 013a 1C4B ldr r3, .L1173+68 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24735 .loc 23 141 0 24736 013c 1161 str r1, [r2, #16] @ float 24737 .LVL2613: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 256U; 24738 .loc 23 138 0 24739 013e 4FF00121 mov r1, #16777472 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 24740 .loc 23 140 0 24741 0142 C2E90231 strd r3, r1, [r2, #8] 24742 0146 94E7 b .L1159 24743 .LVL2614: 24744 .L1164: 24745 .LBE2707: 24746 .LBE2706: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24747 .loc 23 116 0 24748 0148 4FF06A51 mov r1, #981467136 24749 .LVL2615: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 24750 .loc 23 114 0 24751 014c 184B ldr r3, .L1173+72 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 24752 .loc 23 116 0 24753 014e 1161 str r1, [r2, #16] @ float 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 24754 .loc 23 110 0 24755 0150 4FF00411 mov r1, #262148 ARM GAS /tmp/ccfbYRip.s page 774 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 24756 .loc 23 114 0 24757 0154 C2E90231 strd r3, r1, [r2, #8] 24758 0158 8BE7 b .L1159 24759 .LVL2616: 24760 .L1169: 24761 .LBE2710: 24762 .LBE2713: 24763 .LBE2721: 24764 .LBE2729: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c **** } 24765 .loc 28 118 0 24766 015a 4FF0FF30 mov r0, #-1 24767 015e 96E7 b .L1156 24768 .L1167: 24769 0160 4FF0FF30 mov r0, #-1 24770 0164 6DE7 b .L1155 24771 .L1174: 24772 0166 00BF .align 2 24773 .L1173: 24774 0168 00000000 .word Weights_8192 24775 016c 00000000 .word cos_factors_8192 24776 0170 00000000 .word realCoefA 24777 0174 00000000 .word realCoefB 24778 0178 00100001 .word 16781312 24779 017c 00000000 .word twiddleCoef_4096 24780 0180 7E000000 .word armBitRevTable+126 24781 0184 00000000 .word Weights_2048 24782 0188 00000000 .word cos_factors_2048 24783 018c 00040001 .word 16778240 24784 0190 00000000 .word armBitRevTable 24785 0194 00000000 .word Weights_128 24786 0198 00000000 .word cos_factors_128 24787 019c 40000001 .word 16777280 24788 01a0 00000000 .word Weights_512 24789 01a4 00000000 .word cos_factors_512 24790 01a8 1E000000 .word armBitRevTable+30 24791 01ac FE010000 .word armBitRevTable+510 24792 01b0 06000000 .word armBitRevTable+6 24793 .cfi_endproc 24794 .LFE196: 24796 .section .text.arm_dct4_init_q15,"ax",%progbits 24797 .align 1 24798 .p2align 2,,3 24799 .global arm_dct4_init_q15 24800 .syntax unified 24801 .thumb 24802 .thumb_func 24803 .fpu fpv4-sp-d16 24805 arm_dct4_init_q15: 24806 .LFB197: 24807 .file 30 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Title: arm_dct4_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Description: Initialization function of DCT-4 & IDCT4 Q15 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * ARM GAS /tmp/ccfbYRip.s page 775 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @addtogroup DCT4_IDCT4 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @brief Initialization function for the Q15 DCT4/IDCT4. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in] N length of the DCT4 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in] Nby2 half of the length of the DCT4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @param[in] normalize normalizing factor 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform len 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** @par Normalizing factor 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** The normalizing factor is sqrt(2/N), which depends on the size of t 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** Normalizing factors in 1.15 format are mentioned in the table below for differen 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** \image html dct4NormalizingQ15Table.gif 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_status arm_dct4_init_q15( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_dct4_instance_q15 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_rfft_instance_q15 * S_RFFT, ARM GAS /tmp/ccfbYRip.s page 776 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_cfft_radix4_instance_q15 * S_CFFT, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** uint16_t N, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** uint16_t Nby2, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** q15_t normalize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** { 24808 .loc 30 67 0 24809 .cfi_startproc 24810 @ args = 8, pretend = 0, frame = 0 24811 @ frame_needed = 0, uses_anonymous_args = 0 24812 @ link register save eliminated. 24813 .LVL2617: 24814 0000 30B4 push {r4, r5} 24815 .LCFI272: 24816 .cfi_def_cfa_offset 8 24817 .cfi_offset 4, -8 24818 .cfi_offset 5, -4 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialise the default arm status */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize the DCT4 length */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->N = N; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize the half of DCT4 length */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->Nby2 = Nby2; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize the DCT4 Normalizing factor */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->normalize = normalize; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize Real FFT Instance */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pRfft = S_RFFT; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize Complex FFT Instance */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCfft = S_CFFT; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** switch (N) 24819 .loc 30 86 0 24820 0002 B3F5007F cmp r3, #512 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialise the default arm status */ 24821 .loc 30 67 0 24822 0006 BDF80850 ldrh r5, [sp, #8] 24823 000a BDF90C40 ldrsh r4, [sp, #12] 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24824 .loc 30 72 0 24825 000e 0380 strh r3, [r0] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24826 .loc 30 81 0 24827 0010 C0E90412 strd r1, r2, [r0, #16] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24828 .loc 30 75 0 24829 0014 4580 strh r5, [r0, #2] @ movhi 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24830 .loc 30 78 0 24831 0016 8480 strh r4, [r0, #4] @ movhi 24832 .loc 30 86 0 24833 0018 56D0 beq .L1177 24834 001a 2BD9 bls .L1198 24835 001c B3F5006F cmp r3, #2048 ARM GAS /tmp/ccfbYRip.s page 777 24836 0020 15D0 beq .L1180 24837 0022 B3F5005F cmp r3, #8192 24838 0026 3AD1 bne .L1176 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize the table modifier values */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** case 8192U: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pTwiddle = WeightsQ15_8192; 24839 .loc 30 91 0 24840 0028 4F4C ldr r4, .L1201 24841 002a 8460 str r4, [r0, #8] 24842 .LBB2732: 24843 .LBB2733: 24844 .file 31 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Title: arm_rfft_init_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Description: RFFT & RIFFT Q15 initialisation function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #include "arm_const_structs.h" 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @addtogroup RealFFT 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @{ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** */ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @brief Initialization function for the Q15 RFFT/RIFFT. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @param[in,out] S points to an instance of the Q15 RFFT/RIFFT structure 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @param[in] fftLenReal length of the FFT 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @param[in] ifftFlagR flag that selects transform direction 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - value = 0: forward transform ARM GAS /tmp/ccfbYRip.s page 778 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - value = 1: inverse transform 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - value = 0: disables bit reversal of output 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - value = 1: enables bit reversal of output 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @return execution status 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - \ref ARM_MATH_SUCCESS : Operation successful 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported leng 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @par Details 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** The parameter fftLenReal specifies length of RFFT/RIFFT Process. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @par 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** The parameter ifftFlagR controls whether a forward or inverse trans 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @par 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** The parameter bitReverseFlag controls whether output is in normal o 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** @par 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** This function also initializes Twiddle factor table. 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** arm_status arm_rfft_init_q15( 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** arm_rfft_instance_q15 * S, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** uint32_t fftLenReal, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** uint32_t ifftFlagR, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** uint32_t bitReverseFlag) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialise the default arm status */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** arm_status status = ARM_MATH_SUCCESS; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialize the Real FFT length */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->fftLenReal = (uint16_t) fftLenReal; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialize the Twiddle coefficientA pointer */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pTwiddleAReal = (q15_t *) realCoefAQ15; 24845 .loc 31 78 0 24846 002c 4F4D ldr r5, .L1201+4 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialize the Twiddle coefficientB pointer */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pTwiddleBReal = (q15_t *) realCoefBQ15; 24847 .loc 31 81 0 24848 002e 504C ldr r4, .L1201+8 24849 .LBE2733: 24850 .LBE2732: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_8192; 24851 .loc 30 92 0 24852 0030 504A ldr r2, .L1201+12 24853 .LVL2618: 24854 0032 C260 str r2, [r0, #12] 24855 .LVL2619: 24856 .LBB2756: 24857 .LBB2734: 24858 .loc 31 81 0 24859 0034 C1E90354 strd r5, r4, [r1, #12] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24860 .loc 31 75 0 24861 0038 4FF48072 mov r2, #256 ARM GAS /tmp/ccfbYRip.s page 779 24862 003c 0B60 str r3, [r1] 24863 .LVL2620: 24864 003e 8A80 strh r2, [r1, #4] @ movhi 24865 .LBE2734: 24866 .LBE2756: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24867 .loc 30 69 0 24868 0040 0020 movs r0, #0 24869 .LVL2621: 24870 .L1182: 24871 .LBB2757: 24872 .LBB2735: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialize the Flag for selection of RFFT or RIFFT */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->ifftFlagR = (uint8_t) ifftFlagR; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialize the Flag for calculation Bit reversal or not */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->bitReverseFlagR = (uint8_t) bitReverseFlag; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialization of coef modifier depending on the FFT length */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** switch (S->fftLenReal) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 8192U: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 1U; 24873 .loc 31 94 0 24874 0042 0122 movs r2, #1 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),4096); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len4096; 24875 .loc 31 103 0 24876 0044 4C4B ldr r3, .L1201+16 24877 .LVL2622: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24878 .loc 31 94 0 24879 0046 8A60 str r2, [r1, #8] 24880 .loc 31 103 0 24881 0048 4B61 str r3, [r1, #20] 24882 .LVL2623: 24883 .L1185: 24884 .LBE2735: 24885 .LBE2757: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #endif 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** case 2048U: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pTwiddle = WeightsQ15_2048; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_2048; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #endif ARM GAS /tmp/ccfbYRip.s page 780 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** case 512U: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pTwiddle = WeightsQ15_512; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_512; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #endif 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** case 128U: 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pTwiddle = WeightsQ15_128; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_128; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** #endif 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** default: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* Initialize the RFFT/RIFFT */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** /* return the status of DCT4 Init function */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** return (status); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 24886 .loc 30 126 0 24887 004a 30BC pop {r4, r5} 24888 .LCFI273: 24889 .cfi_remember_state 24890 .cfi_restore 5 24891 .cfi_restore 4 24892 .cfi_def_cfa_offset 0 24893 .LVL2624: 24894 004c 7047 bx lr 24895 .LVL2625: 24896 .L1180: 24897 .LCFI274: 24898 .cfi_restore_state 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_2048; 24899 .loc 30 98 0 24900 004e 4B4C ldr r4, .L1201+20 24901 0050 8460 str r4, [r0, #8] 24902 .LBB2758: 24903 .LBB2736: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24904 .loc 31 78 0 24905 0052 464D ldr r5, .L1201+4 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24906 .loc 31 81 0 24907 0054 464C ldr r4, .L1201+8 24908 .LBE2736: 24909 .LBE2758: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 24910 .loc 30 99 0 24911 0056 4A4A ldr r2, .L1201+24 24912 .LVL2626: 24913 0058 C260 str r2, [r0, #12] ARM GAS /tmp/ccfbYRip.s page 781 24914 .LVL2627: 24915 .LBB2759: 24916 .LBB2737: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24917 .loc 31 81 0 24918 005a C1E90354 strd r5, r4, [r1, #12] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24919 .loc 31 75 0 24920 005e 4FF48072 mov r2, #256 24921 0062 0B60 str r3, [r1] 24922 .LVL2628: 24923 0064 8A80 strh r2, [r1, #4] @ movhi 24924 .LBE2737: 24925 .LBE2759: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 24926 .loc 30 69 0 24927 0066 0020 movs r0, #0 24928 .LVL2629: 24929 .L1183: 24930 .LBB2760: 24931 .LBB2738: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 4096U: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 2U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),2048); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len2048; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 2048U: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 4U; 24932 .loc 31 124 0 24933 0068 0422 movs r2, #4 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),1024); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len1024; 24934 .loc 31 133 0 24935 006a 464B ldr r3, .L1201+28 24936 .LVL2630: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** ARM GAS /tmp/ccfbYRip.s page 782 24937 .loc 31 124 0 24938 006c 8A60 str r2, [r1, #8] 24939 .loc 31 133 0 24940 006e 4B61 str r3, [r1, #20] 24941 .LVL2631: 24942 .LBE2738: 24943 .LBE2760: 24944 .loc 30 126 0 24945 0070 30BC pop {r4, r5} 24946 .LCFI275: 24947 .cfi_remember_state 24948 .cfi_restore 5 24949 .cfi_restore 4 24950 .cfi_def_cfa_offset 0 24951 .LVL2632: 24952 0072 7047 bx lr 24953 .LVL2633: 24954 .L1198: 24955 .LCFI276: 24956 .cfi_restore_state 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** { 24957 .loc 30 86 0 24958 0074 802B cmp r3, #128 24959 0076 12D1 bne .L1176 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_128; 24960 .loc 30 112 0 24961 0078 434C ldr r4, .L1201+32 24962 007a 8460 str r4, [r0, #8] 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 24963 .loc 30 113 0 24964 007c 434A ldr r2, .L1201+36 24965 .LVL2634: 24966 .LBB2761: 24967 .LBB2739: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24968 .loc 31 78 0 24969 007e 3B4D ldr r5, .L1201+4 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24970 .loc 31 81 0 24971 0080 3B4C ldr r4, .L1201+8 24972 .LBE2739: 24973 .LBE2761: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 24974 .loc 30 113 0 24975 0082 C260 str r2, [r0, #12] 24976 .LVL2635: 24977 .LBB2762: 24978 .LBB2740: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24979 .loc 31 75 0 24980 0084 4FF48070 mov r0, #256 24981 .LVL2636: 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 1024U: ARM GAS /tmp/ccfbYRip.s page 783 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 8U; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),512); 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len512; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 512U: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 16U; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),256); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len256; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 256U: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 32U; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),128); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len128; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 128U: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 64U; 24982 .loc 31 184 0 24983 0088 4022 movs r2, #64 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24984 .loc 31 75 0 24985 008a 0B60 str r3, [r1] 24986 .LVL2637: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),64); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { ARM GAS /tmp/ccfbYRip.s page 784 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len64; 24987 .loc 31 193 0 24988 008c 404B ldr r3, .L1201+40 24989 .LVL2638: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24990 .loc 31 75 0 24991 008e 8880 strh r0, [r1, #4] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24992 .loc 31 81 0 24993 0090 C1E90354 strd r5, r4, [r1, #12] 24994 .loc 31 193 0 24995 0094 0020 movs r0, #0 24996 .LVL2639: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 24997 .loc 31 184 0 24998 0096 8A60 str r2, [r1, #8] 24999 .loc 31 193 0 25000 0098 4B61 str r3, [r1, #20] 25001 .LBE2740: 25002 .LBE2762: 25003 .loc 30 126 0 25004 009a 30BC pop {r4, r5} 25005 .LCFI277: 25006 .cfi_remember_state 25007 .cfi_restore 5 25008 .cfi_restore 4 25009 .cfi_def_cfa_offset 0 25010 .LVL2640: 25011 009c 7047 bx lr 25012 .LVL2641: 25013 .L1176: 25014 .LCFI278: 25015 .cfi_restore_state 25016 .LBB2763: 25017 .LBB2741: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25018 .loc 31 78 0 25019 009e 334C ldr r4, .L1201+4 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25020 .loc 31 81 0 25021 00a0 3348 ldr r0, .L1201+8 25022 .LVL2642: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25023 .loc 31 75 0 25024 00a2 0B60 str r3, [r1] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25025 .loc 31 84 0 25026 00a4 4FF48072 mov r2, #256 25027 .LVL2643: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 25028 .loc 31 90 0 25029 00a8 B3F5007F cmp r3, #512 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25030 .loc 31 81 0 ARM GAS /tmp/ccfbYRip.s page 785 25031 00ac C1E90340 strd r4, r0, [r1, #12] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25032 .loc 31 84 0 25033 00b0 8A80 strh r2, [r1, #4] @ movhi 25034 .LVL2644: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 25035 .loc 31 90 0 25036 00b2 56D0 beq .L1195 25037 00b4 1BD8 bhi .L1186 25038 00b6 402B cmp r3, #64 25039 00b8 37D0 beq .L1187 25040 00ba 9342 cmp r3, r2 25041 00bc 2DD0 beq .L1188 25042 00be 202B cmp r3, #32 25043 00c0 24D0 beq .L1199 25044 .L1193: 25045 .LBE2741: 25046 .LBE2763: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25047 .loc 30 118 0 25048 00c2 4FF0FF30 mov r0, #-1 25049 00c6 C0E7 b .L1185 25050 .LVL2645: 25051 .L1177: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** S->pCosFactor = cos_factorsQ15_512; 25052 .loc 30 105 0 25053 00c8 324C ldr r4, .L1201+44 25054 00ca 8460 str r4, [r0, #8] 25055 .LBB2764: 25056 .LBB2742: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25057 .loc 31 78 0 25058 00cc 274D ldr r5, .L1201+4 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25059 .loc 31 81 0 25060 00ce 284C ldr r4, .L1201+8 25061 .LBE2742: 25062 .LBE2764: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** break; 25063 .loc 30 106 0 25064 00d0 314A ldr r2, .L1201+48 25065 .LVL2646: 25066 00d2 C260 str r2, [r0, #12] 25067 .LVL2647: 25068 .LBB2765: 25069 .LBB2743: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25070 .loc 31 81 0 25071 00d4 C1E90354 strd r5, r4, [r1, #12] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25072 .loc 31 75 0 25073 00d8 4FF48072 mov r2, #256 25074 00dc 0B60 str r3, [r1] 25075 .LVL2648: 25076 00de 8A80 strh r2, [r1, #4] @ movhi 25077 .LBE2743: 25078 .LBE2765: ARM GAS /tmp/ccfbYRip.s page 786 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** 25079 .loc 30 69 0 25080 00e0 0020 movs r0, #0 25081 .LVL2649: 25082 .L1184: 25083 .LBB2766: 25084 .LBB2744: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25085 .loc 31 154 0 25086 00e2 1022 movs r2, #16 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25087 .loc 31 163 0 25088 00e4 2D4B ldr r3, .L1201+52 25089 .LVL2650: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25090 .loc 31 154 0 25091 00e6 8A60 str r2, [r1, #8] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25092 .loc 31 163 0 25093 00e8 4B61 str r3, [r1, #20] 25094 .LVL2651: 25095 .LBE2744: 25096 .LBE2766: 25097 .loc 30 126 0 25098 00ea 30BC pop {r4, r5} 25099 .LCFI279: 25100 .cfi_remember_state 25101 .cfi_restore 5 25102 .cfi_restore 4 25103 .cfi_def_cfa_offset 0 25104 .LVL2652: 25105 00ec 7047 bx lr 25106 .LVL2653: 25107 .L1186: 25108 .LCFI280: 25109 .cfi_restore_state 25110 .LBB2767: 25111 .LBB2745: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 25112 .loc 31 90 0 25113 00ee B3F5006F cmp r3, #2048 25114 00f2 33D0 beq .L1196 25115 00f4 21D8 bhi .L1190 25116 00f6 B3F5806F cmp r3, #1024 25117 00fa E2D1 bne .L1193 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25118 .loc 31 139 0 25119 00fc 0822 movs r2, #8 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25120 .loc 31 148 0 25121 00fe 284B ldr r3, .L1201+56 25122 .LVL2654: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25123 .loc 31 139 0 25124 0100 8A60 str r2, [r1, #8] 25125 .LBE2745: 25126 .LBE2767: ARM GAS /tmp/ccfbYRip.s page 787 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25127 .loc 30 118 0 25128 0102 4FF0FF30 mov r0, #-1 25129 .LVL2655: 25130 .LBB2768: 25131 .LBB2746: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25132 .loc 31 148 0 25133 0106 4B61 str r3, [r1, #20] 25134 .LBE2746: 25135 .LBE2768: 25136 .loc 30 126 0 25137 0108 30BC pop {r4, r5} 25138 .LCFI281: 25139 .cfi_remember_state 25140 .cfi_restore 5 25141 .cfi_restore 4 25142 .cfi_def_cfa_offset 0 25143 .LVL2656: 25144 010a 7047 bx lr 25145 .LVL2657: 25146 .L1199: 25147 .LCFI282: 25148 .cfi_restore_state 25149 .LBB2769: 25150 .LBB2747: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 64U: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 128U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),32); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len32; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** case 32U: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->twidCoefRModifier = 256U; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #if defined(ARM_MATH_MVEI) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status=arm_cfft_init_q15(&(S->cfftInst),16); 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** if (status != ARM_MATH_SUCCESS) 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return(status); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #else 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** S->pCfft = &arm_cfft_sR_q15_len16; 25151 .loc 31 223 0 ARM GAS /tmp/ccfbYRip.s page 788 25152 010c 254B ldr r3, .L1201+60 25153 .LVL2658: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25154 .loc 31 214 0 25155 010e 8A60 str r2, [r1, #8] 25156 .LBE2747: 25157 .LBE2769: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25158 .loc 30 118 0 25159 0110 4FF0FF30 mov r0, #-1 25160 .LVL2659: 25161 .LBB2770: 25162 .LBB2748: 25163 .loc 31 223 0 25164 0114 4B61 str r3, [r1, #20] 25165 .LBE2748: 25166 .LBE2770: 25167 .loc 30 126 0 25168 0116 30BC pop {r4, r5} 25169 .LCFI283: 25170 .cfi_remember_state 25171 .cfi_restore 5 25172 .cfi_restore 4 25173 .cfi_def_cfa_offset 0 25174 .LVL2660: 25175 0118 7047 bx lr 25176 .LVL2661: 25177 .L1188: 25178 .LCFI284: 25179 .cfi_restore_state 25180 .LBB2771: 25181 .LBB2749: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25182 .loc 31 169 0 25183 011a 2022 movs r2, #32 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25184 .loc 31 178 0 25185 011c 224B ldr r3, .L1201+64 25186 .LVL2662: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25187 .loc 31 169 0 25188 011e 8A60 str r2, [r1, #8] 25189 .LBE2749: 25190 .LBE2771: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25191 .loc 30 118 0 25192 0120 4FF0FF30 mov r0, #-1 25193 .LVL2663: 25194 .LBB2772: 25195 .LBB2750: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25196 .loc 31 178 0 25197 0124 4B61 str r3, [r1, #20] 25198 .LBE2750: 25199 .LBE2772: 25200 .loc 30 126 0 25201 0126 30BC pop {r4, r5} ARM GAS /tmp/ccfbYRip.s page 789 25202 .LCFI285: 25203 .cfi_remember_state 25204 .cfi_restore 5 25205 .cfi_restore 4 25206 .cfi_def_cfa_offset 0 25207 .LVL2664: 25208 0128 7047 bx lr 25209 .LVL2665: 25210 .L1187: 25211 .LCFI286: 25212 .cfi_restore_state 25213 .LBB2773: 25214 .LBB2751: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25215 .loc 31 199 0 25216 012a 8022 movs r2, #128 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25217 .loc 31 208 0 25218 012c 1F4B ldr r3, .L1201+68 25219 .LVL2666: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25220 .loc 31 199 0 25221 012e 8A60 str r2, [r1, #8] 25222 .LBE2751: 25223 .LBE2773: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25224 .loc 30 118 0 25225 0130 4FF0FF30 mov r0, #-1 25226 .LVL2667: 25227 .LBB2774: 25228 .LBB2752: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25229 .loc 31 208 0 25230 0134 4B61 str r3, [r1, #20] 25231 .LBE2752: 25232 .LBE2774: 25233 .loc 30 126 0 25234 0136 30BC pop {r4, r5} 25235 .LCFI287: 25236 .cfi_remember_state 25237 .cfi_restore 5 25238 .cfi_restore 4 25239 .cfi_def_cfa_offset 0 25240 .LVL2668: 25241 0138 7047 bx lr 25242 .LVL2669: 25243 .L1190: 25244 .LCFI288: 25245 .cfi_restore_state 25246 .LBB2775: 25247 .LBB2753: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 25248 .loc 31 90 0 25249 013a B3F5805F cmp r3, #4096 25250 013e 07D1 bne .L1200 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25251 .loc 31 109 0 ARM GAS /tmp/ccfbYRip.s page 790 25252 0140 0222 movs r2, #2 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25253 .loc 31 118 0 25254 0142 1B4B ldr r3, .L1201+72 25255 .LVL2670: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 25256 .loc 31 109 0 25257 0144 8A60 str r2, [r1, #8] 25258 .LBE2753: 25259 .LBE2775: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25260 .loc 30 118 0 25261 0146 4FF0FF30 mov r0, #-1 25262 .LVL2671: 25263 .LBB2776: 25264 .LBB2754: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 25265 .loc 31 118 0 25266 014a 4B61 str r3, [r1, #20] 25267 .LBE2754: 25268 .LBE2776: 25269 .loc 30 126 0 25270 014c 30BC pop {r4, r5} 25271 .LCFI289: 25272 .cfi_remember_state 25273 .cfi_restore 5 25274 .cfi_restore 4 25275 .cfi_def_cfa_offset 0 25276 .LVL2672: 25277 014e 7047 bx lr 25278 .LVL2673: 25279 .L1200: 25280 .LCFI290: 25281 .cfi_restore_state 25282 .LBB2777: 25283 .LBB2755: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 25284 .loc 31 90 0 25285 0150 B3F5005F cmp r3, #8192 25286 0154 B5D1 bne .L1193 25287 .LBE2755: 25288 .LBE2777: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c **** } 25289 .loc 30 118 0 25290 0156 4FF0FF30 mov r0, #-1 25291 015a 72E7 b .L1182 25292 .L1196: 25293 015c 4FF0FF30 mov r0, #-1 25294 0160 82E7 b .L1183 25295 .L1195: 25296 0162 4FF0FF30 mov r0, #-1 25297 0166 BCE7 b .L1184 25298 .L1202: 25299 .align 2 25300 .L1201: 25301 0168 00000000 .word WeightsQ15_8192 25302 016c 00000000 .word realCoefAQ15 ARM GAS /tmp/ccfbYRip.s page 791 25303 0170 00000000 .word realCoefBQ15 25304 0174 00000000 .word cos_factorsQ15_8192 25305 0178 00000000 .word arm_cfft_sR_q15_len4096 25306 017c 00000000 .word WeightsQ15_2048 25307 0180 00000000 .word cos_factorsQ15_2048 25308 0184 00000000 .word arm_cfft_sR_q15_len1024 25309 0188 00000000 .word WeightsQ15_128 25310 018c 00000000 .word cos_factorsQ15_128 25311 0190 00000000 .word arm_cfft_sR_q15_len64 25312 0194 00000000 .word WeightsQ15_512 25313 0198 00000000 .word cos_factorsQ15_512 25314 019c 00000000 .word arm_cfft_sR_q15_len256 25315 01a0 00000000 .word arm_cfft_sR_q15_len512 25316 01a4 00000000 .word arm_cfft_sR_q15_len16 25317 01a8 00000000 .word arm_cfft_sR_q15_len128 25318 01ac 00000000 .word arm_cfft_sR_q15_len32 25319 01b0 00000000 .word arm_cfft_sR_q15_len2048 25320 .cfi_endproc 25321 .LFE197: 25323 .section .text.arm_dct4_init_q31,"ax",%progbits 25324 .align 1 25325 .p2align 2,,3 25326 .global arm_dct4_init_q31 25327 .syntax unified 25328 .thumb 25329 .thumb_func 25330 .fpu fpv4-sp-d16 25332 arm_dct4_init_q31: 25333 .LFB198: 25334 .file 32 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Title: arm_dct4_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Description: Initialization function of DCT-4 & IDCT4 Q31 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** */ ARM GAS /tmp/ccfbYRip.s page 792 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @ingroup groupTransforms 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @addtogroup DCT4_IDCT4 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @brief Initialization function for the Q31 DCT4/IDCT4. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in] N length of the DCT4. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in] Nby2 half of the length of the DCT4. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @param[in] normalize normalizing factor. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @return execution status 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform len 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** @par Normalizing factor: 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** The normalizing factor is sqrt(2/N), which depends on the size of t 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** Normalizing factors in 1.31 format are mentioned in the table below for differen 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** \image html dct4NormalizingQ31Table.gif 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_status arm_dct4_init_q31( 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_dct4_instance_q31 * S, 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_rfft_instance_q31 * S_RFFT, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_cfft_radix4_instance_q31 * S_CFFT, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** uint16_t N, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** uint16_t Nby2, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** q31_t normalize) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** { 25335 .loc 32 67 0 25336 .cfi_startproc 25337 @ args = 8, pretend = 0, frame = 0 25338 @ frame_needed = 0, uses_anonymous_args = 0 25339 @ link register save eliminated. 25340 .LVL2674: 25341 0000 30B4 push {r4, r5} 25342 .LCFI291: 25343 .cfi_def_cfa_offset 8 25344 .cfi_offset 4, -8 25345 .cfi_offset 5, -4 25346 .loc 32 67 0 25347 0002 039C ldr r4, [sp, #12] 25348 0004 BDF80850 ldrh r5, [sp, #8] 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the default arm status */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** ARM GAS /tmp/ccfbYRip.s page 793 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the DCT4 length */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->N = N; 25349 .loc 32 72 0 25350 0008 0380 strh r3, [r0] @ movhi 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the half of DCT4 length */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->Nby2 = Nby2; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the DCT4 Normalizing factor */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->normalize = normalize; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize Real FFT Instance */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pRfft = S_RFFT; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize Complex FFT Instance */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCfft = S_CFFT; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** switch (N) 25351 .loc 32 86 0 25352 000a B3F5007F cmp r3, #512 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25353 .loc 32 81 0 25354 000e C0E90412 strd r1, r2, [r0, #16] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25355 .loc 32 75 0 25356 0012 4580 strh r5, [r0, #2] @ movhi 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25357 .loc 32 78 0 25358 0014 4460 str r4, [r0, #4] 25359 .loc 32 86 0 25360 0016 56D0 beq .L1205 25361 0018 2BD9 bls .L1226 25362 001a B3F5006F cmp r3, #2048 25363 001e 15D0 beq .L1208 25364 0020 B3F5005F cmp r3, #8192 25365 0024 3AD1 bne .L1204 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the table modifier values */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** case 8192U: 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pTwiddle = WeightsQ31_8192; 25366 .loc 32 91 0 25367 0026 504C ldr r4, .L1229 25368 0028 8460 str r4, [r0, #8] 25369 .LBB2780: 25370 .LBB2781: 25371 .file 33 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Title: arm_rfft_init_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Description: RFFT & RIFFT Q31 initialisation function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccfbYRip.s page 794 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #include "arm_common_tables.h" 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #include "arm_const_structs.h" 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @addtogroup RealFFT 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @brief Initialization function for the Q31 RFFT/RIFFT. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @param[in,out] S points to an instance of the Q31 RFFT/RIFFT structure 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @param[in] fftLenReal length of the FFT 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @param[in] ifftFlagR flag that selects transform direction 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - value = 0: forward transform 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - value = 1: inverse transform 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @param[in] bitReverseFlag flag that enables / disables bit reversal of output 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - value = 0: disables bit reversal of output 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - value = 1: enables bit reversal of output 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @return execution status 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - \ref ARM_MATH_SUCCESS : Operation successful 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported leng 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @par Details 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** The parameter fftLenReal specifies length of RFFT/RIFFT Process. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @par 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** The parameter ifftFlagR controls whether a forward or inverse trans 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @par 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** The parameter bitReverseFlag controls whether output is in normal o 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** Set(=1) bitReverseFlag for output to be in normal order otherwise output is in b 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** @par 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** This function also initializes Twiddle factor table. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** arm_status arm_rfft_init_q31( ARM GAS /tmp/ccfbYRip.s page 795 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** arm_rfft_instance_q31 * S, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** uint32_t fftLenReal, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** uint32_t ifftFlagR, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** uint32_t bitReverseFlag) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialise the default arm status */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** arm_status status = ARM_MATH_SUCCESS; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialize the Real FFT length */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->fftLenReal = (uint16_t) fftLenReal; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialize the Twiddle coefficientA pointer */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pTwiddleAReal = (q31_t *) realCoefAQ31; 25372 .loc 33 80 0 25373 002a 504D ldr r5, .L1229+4 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialize the Twiddle coefficientB pointer */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pTwiddleBReal = (q31_t *) realCoefBQ31; 25374 .loc 33 83 0 25375 002c 504C ldr r4, .L1229+8 25376 .LBE2781: 25377 .LBE2780: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_8192; 25378 .loc 32 92 0 25379 002e 514A ldr r2, .L1229+12 25380 .LVL2675: 25381 0030 C260 str r2, [r0, #12] 25382 .LVL2676: 25383 .LBB2804: 25384 .LBB2782: 25385 .loc 33 83 0 25386 0032 C1E90354 strd r5, r4, [r1, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25387 .loc 33 77 0 25388 0036 4FF48072 mov r2, #256 25389 003a 0B60 str r3, [r1] 25390 .LVL2677: 25391 003c 8A80 strh r2, [r1, #4] @ movhi 25392 .LBE2782: 25393 .LBE2804: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25394 .loc 32 69 0 25395 003e 0020 movs r0, #0 25396 .LVL2678: 25397 .L1210: 25398 .LBB2805: 25399 .LBB2783: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialize the Flag for selection of RFFT or RIFFT */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->ifftFlagR = (uint8_t) ifftFlagR; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialize the Flag for calculation Bit reversal or not */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->bitReverseFlagR = (uint8_t) bitReverseFlag; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialization of coef modifier depending on the FFT length */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** switch (S->fftLenReal) 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 796 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 8192U: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 1U; 25400 .loc 33 98 0 25401 0040 0122 movs r2, #1 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),4096); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len4096; 25402 .loc 33 107 0 25403 0042 4D4B ldr r3, .L1229+16 25404 .LVL2679: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25405 .loc 33 98 0 25406 0044 8A60 str r2, [r1, #8] 25407 .loc 33 107 0 25408 0046 4B61 str r3, [r1, #20] 25409 .LVL2680: 25410 .L1213: 25411 .LBE2783: 25412 .LBE2805: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #endif 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** case 2048U: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pTwiddle = WeightsQ31_2048; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_2048; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #endif 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** case 512U: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pTwiddle = WeightsQ31_512; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_512; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #endif 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** case 128U: 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pTwiddle = WeightsQ31_128; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_128; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** #endif 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** default: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* Initialize the RFFT/RIFFT Function */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** arm_rfft_init_q31(S->pRfft, S->N, 0U, 1U); ARM GAS /tmp/ccfbYRip.s page 797 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** /* return the status of DCT4 Init function */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** return (status); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25413 .loc 32 125 0 25414 0048 30BC pop {r4, r5} 25415 .LCFI292: 25416 .cfi_remember_state 25417 .cfi_restore 5 25418 .cfi_restore 4 25419 .cfi_def_cfa_offset 0 25420 .LVL2681: 25421 004a 7047 bx lr 25422 .LVL2682: 25423 .L1208: 25424 .LCFI293: 25425 .cfi_restore_state 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_2048; 25426 .loc 32 98 0 25427 004c 4B4C ldr r4, .L1229+20 25428 004e 8460 str r4, [r0, #8] 25429 .LBB2806: 25430 .LBB2784: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25431 .loc 33 80 0 25432 0050 464D ldr r5, .L1229+4 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25433 .loc 33 83 0 25434 0052 474C ldr r4, .L1229+8 25435 .LBE2784: 25436 .LBE2806: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 25437 .loc 32 99 0 25438 0054 4A4A ldr r2, .L1229+24 25439 .LVL2683: 25440 0056 C260 str r2, [r0, #12] 25441 .LVL2684: 25442 .LBB2807: 25443 .LBB2785: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25444 .loc 33 83 0 25445 0058 C1E90354 strd r5, r4, [r1, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25446 .loc 33 77 0 25447 005c 4FF48072 mov r2, #256 25448 0060 0B60 str r3, [r1] 25449 .LVL2685: 25450 0062 8A80 strh r2, [r1, #4] @ movhi 25451 .LBE2785: 25452 .LBE2807: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25453 .loc 32 69 0 25454 0064 0020 movs r0, #0 25455 .LVL2686: 25456 .L1211: 25457 .LBB2808: 25458 .LBB2786: ARM GAS /tmp/ccfbYRip.s page 798 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 4096U: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 2U; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),2048); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len2048; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 2048U: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 4U; 25459 .loc 33 128 0 25460 0066 0422 movs r2, #4 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),1024); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len1024; 25461 .loc 33 137 0 25462 0068 464B ldr r3, .L1229+28 25463 .LVL2687: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25464 .loc 33 128 0 25465 006a 8A60 str r2, [r1, #8] 25466 .loc 33 137 0 25467 006c 4B61 str r3, [r1, #20] 25468 .LVL2688: 25469 .LBE2786: 25470 .LBE2808: 25471 .loc 32 125 0 25472 006e 30BC pop {r4, r5} 25473 .LCFI294: 25474 .cfi_remember_state 25475 .cfi_restore 5 25476 .cfi_restore 4 25477 .cfi_def_cfa_offset 0 25478 .LVL2689: 25479 0070 7047 bx lr 25480 .LVL2690: 25481 .L1226: 25482 .LCFI295: 25483 .cfi_restore_state 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** { ARM GAS /tmp/ccfbYRip.s page 799 25484 .loc 32 86 0 25485 0072 802B cmp r3, #128 25486 0074 12D1 bne .L1204 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_128; 25487 .loc 32 112 0 25488 0076 444C ldr r4, .L1229+32 25489 0078 8460 str r4, [r0, #8] 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 25490 .loc 32 113 0 25491 007a 444A ldr r2, .L1229+36 25492 .LVL2691: 25493 .LBB2809: 25494 .LBB2787: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25495 .loc 33 80 0 25496 007c 3B4D ldr r5, .L1229+4 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25497 .loc 33 83 0 25498 007e 3C4C ldr r4, .L1229+8 25499 .LBE2787: 25500 .LBE2809: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 25501 .loc 32 113 0 25502 0080 C260 str r2, [r0, #12] 25503 .LVL2692: 25504 .LBB2810: 25505 .LBB2788: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25506 .loc 33 77 0 25507 0082 4FF48070 mov r0, #256 25508 .LVL2693: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 1024U: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 8U; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),512); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len512; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 512U: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 16U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),256); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } ARM GAS /tmp/ccfbYRip.s page 800 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len256; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 256U: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 32U; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),128); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len128; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 128U: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 64U; 25509 .loc 33 185 0 25510 0086 4022 movs r2, #64 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25511 .loc 33 77 0 25512 0088 0B60 str r3, [r1] 25513 .LVL2694: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),64); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len64; 25514 .loc 33 193 0 25515 008a 414B ldr r3, .L1229+40 25516 .LVL2695: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25517 .loc 33 77 0 25518 008c 8880 strh r0, [r1, #4] @ movhi 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25519 .loc 33 83 0 25520 008e C1E90354 strd r5, r4, [r1, #12] 25521 .loc 33 193 0 25522 0092 0020 movs r0, #0 25523 .LVL2696: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25524 .loc 33 185 0 25525 0094 8A60 str r2, [r1, #8] 25526 .loc 33 193 0 25527 0096 4B61 str r3, [r1, #20] 25528 .LBE2788: 25529 .LBE2810: 25530 .loc 32 125 0 25531 0098 30BC pop {r4, r5} ARM GAS /tmp/ccfbYRip.s page 801 25532 .LCFI296: 25533 .cfi_remember_state 25534 .cfi_restore 5 25535 .cfi_restore 4 25536 .cfi_def_cfa_offset 0 25537 .LVL2697: 25538 009a 7047 bx lr 25539 .LVL2698: 25540 .L1204: 25541 .LCFI297: 25542 .cfi_restore_state 25543 .LBB2811: 25544 .LBB2789: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25545 .loc 33 80 0 25546 009c 334C ldr r4, .L1229+4 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25547 .loc 33 83 0 25548 009e 3448 ldr r0, .L1229+8 25549 .LVL2699: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25550 .loc 33 77 0 25551 00a0 0B60 str r3, [r1] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25552 .loc 33 86 0 25553 00a2 4FF48072 mov r2, #256 25554 .LVL2700: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 25555 .loc 33 92 0 25556 00a6 B3F5007F cmp r3, #512 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25557 .loc 33 83 0 25558 00aa C1E90340 strd r4, r0, [r1, #12] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25559 .loc 33 86 0 25560 00ae 8A80 strh r2, [r1, #4] @ movhi 25561 .LVL2701: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 25562 .loc 33 92 0 25563 00b0 56D0 beq .L1223 25564 00b2 1BD8 bhi .L1214 25565 00b4 402B cmp r3, #64 25566 00b6 37D0 beq .L1215 25567 00b8 9342 cmp r3, r2 25568 00ba 2DD0 beq .L1216 25569 00bc 202B cmp r3, #32 25570 00be 24D0 beq .L1227 25571 .L1221: 25572 .LBE2789: 25573 .LBE2811: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25574 .loc 32 117 0 25575 00c0 4FF0FF30 mov r0, #-1 25576 00c4 C0E7 b .L1213 25577 .LVL2702: 25578 .L1205: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** S->pCosFactor = cos_factorsQ31_512; ARM GAS /tmp/ccfbYRip.s page 802 25579 .loc 32 105 0 25580 00c6 334C ldr r4, .L1229+44 25581 00c8 8460 str r4, [r0, #8] 25582 .LBB2812: 25583 .LBB2790: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25584 .loc 33 80 0 25585 00ca 284D ldr r5, .L1229+4 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25586 .loc 33 83 0 25587 00cc 284C ldr r4, .L1229+8 25588 .LBE2790: 25589 .LBE2812: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** break; 25590 .loc 32 106 0 25591 00ce 324A ldr r2, .L1229+48 25592 .LVL2703: 25593 00d0 C260 str r2, [r0, #12] 25594 .LVL2704: 25595 .LBB2813: 25596 .LBB2791: 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25597 .loc 33 83 0 25598 00d2 C1E90354 strd r5, r4, [r1, #12] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25599 .loc 33 77 0 25600 00d6 4FF48072 mov r2, #256 25601 00da 0B60 str r3, [r1] 25602 .LVL2705: 25603 00dc 8A80 strh r2, [r1, #4] @ movhi 25604 .LBE2791: 25605 .LBE2813: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** 25606 .loc 32 69 0 25607 00de 0020 movs r0, #0 25608 .LVL2706: 25609 .L1212: 25610 .LBB2814: 25611 .LBB2792: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25612 .loc 33 157 0 25613 00e0 1022 movs r2, #16 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25614 .loc 33 165 0 25615 00e2 2E4B ldr r3, .L1229+52 25616 .LVL2707: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25617 .loc 33 157 0 25618 00e4 8A60 str r2, [r1, #8] 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25619 .loc 33 165 0 25620 00e6 4B61 str r3, [r1, #20] 25621 .LVL2708: 25622 .LBE2792: 25623 .LBE2814: 25624 .loc 32 125 0 25625 00e8 30BC pop {r4, r5} ARM GAS /tmp/ccfbYRip.s page 803 25626 .LCFI298: 25627 .cfi_remember_state 25628 .cfi_restore 5 25629 .cfi_restore 4 25630 .cfi_def_cfa_offset 0 25631 .LVL2709: 25632 00ea 7047 bx lr 25633 .LVL2710: 25634 .L1214: 25635 .LCFI299: 25636 .cfi_restore_state 25637 .LBB2815: 25638 .LBB2793: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 25639 .loc 33 92 0 25640 00ec B3F5006F cmp r3, #2048 25641 00f0 33D0 beq .L1224 25642 00f2 21D8 bhi .L1218 25643 00f4 B3F5806F cmp r3, #1024 25644 00f8 E2D1 bne .L1221 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25645 .loc 33 143 0 25646 00fa 0822 movs r2, #8 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25647 .loc 33 151 0 25648 00fc 284B ldr r3, .L1229+56 25649 .LVL2711: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25650 .loc 33 143 0 25651 00fe 8A60 str r2, [r1, #8] 25652 .LBE2793: 25653 .LBE2815: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25654 .loc 32 117 0 25655 0100 4FF0FF30 mov r0, #-1 25656 .LVL2712: 25657 .LBB2816: 25658 .LBB2794: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25659 .loc 33 151 0 25660 0104 4B61 str r3, [r1, #20] 25661 .LBE2794: 25662 .LBE2816: 25663 .loc 32 125 0 25664 0106 30BC pop {r4, r5} 25665 .LCFI300: 25666 .cfi_remember_state 25667 .cfi_restore 5 25668 .cfi_restore 4 25669 .cfi_def_cfa_offset 0 25670 .LVL2713: 25671 0108 7047 bx lr 25672 .LVL2714: 25673 .L1227: 25674 .LCFI301: 25675 .cfi_restore_state 25676 .LBB2817: ARM GAS /tmp/ccfbYRip.s page 804 25677 .LBB2795: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 64U: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 128U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),32); 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len32; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** case 32U: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->twidCoefRModifier = 256U; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status=arm_cfft_init_q31(&(S->cfftInst),16); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** if (status != ARM_MATH_SUCCESS) 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return(status); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #else 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** S->pCfft = &arm_cfft_sR_q31_len16; 25678 .loc 33 221 0 25679 010a 264B ldr r3, .L1229+60 25680 .LVL2715: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25681 .loc 33 213 0 25682 010c 8A60 str r2, [r1, #8] 25683 .LBE2795: 25684 .LBE2817: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25685 .loc 32 117 0 25686 010e 4FF0FF30 mov r0, #-1 25687 .LVL2716: 25688 .LBB2818: 25689 .LBB2796: 25690 .loc 33 221 0 25691 0112 4B61 str r3, [r1, #20] 25692 .LBE2796: 25693 .LBE2818: 25694 .loc 32 125 0 25695 0114 30BC pop {r4, r5} 25696 .LCFI302: 25697 .cfi_remember_state 25698 .cfi_restore 5 25699 .cfi_restore 4 25700 .cfi_def_cfa_offset 0 25701 .LVL2717: 25702 0116 7047 bx lr 25703 .LVL2718: ARM GAS /tmp/ccfbYRip.s page 805 25704 .L1216: 25705 .LCFI303: 25706 .cfi_restore_state 25707 .LBB2819: 25708 .LBB2797: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25709 .loc 33 171 0 25710 0118 2022 movs r2, #32 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25711 .loc 33 179 0 25712 011a 234B ldr r3, .L1229+64 25713 .LVL2719: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25714 .loc 33 171 0 25715 011c 8A60 str r2, [r1, #8] 25716 .LBE2797: 25717 .LBE2819: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25718 .loc 32 117 0 25719 011e 4FF0FF30 mov r0, #-1 25720 .LVL2720: 25721 .LBB2820: 25722 .LBB2798: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25723 .loc 33 179 0 25724 0122 4B61 str r3, [r1, #20] 25725 .LBE2798: 25726 .LBE2820: 25727 .loc 32 125 0 25728 0124 30BC pop {r4, r5} 25729 .LCFI304: 25730 .cfi_remember_state 25731 .cfi_restore 5 25732 .cfi_restore 4 25733 .cfi_def_cfa_offset 0 25734 .LVL2721: 25735 0126 7047 bx lr 25736 .LVL2722: 25737 .L1215: 25738 .LCFI305: 25739 .cfi_restore_state 25740 .LBB2821: 25741 .LBB2799: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25742 .loc 33 199 0 25743 0128 8022 movs r2, #128 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25744 .loc 33 207 0 25745 012a 204B ldr r3, .L1229+68 25746 .LVL2723: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 25747 .loc 33 199 0 25748 012c 8A60 str r2, [r1, #8] 25749 .LBE2799: 25750 .LBE2821: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25751 .loc 32 117 0 ARM GAS /tmp/ccfbYRip.s page 806 25752 012e 4FF0FF30 mov r0, #-1 25753 .LVL2724: 25754 .LBB2822: 25755 .LBB2800: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25756 .loc 33 207 0 25757 0132 4B61 str r3, [r1, #20] 25758 .LBE2800: 25759 .LBE2822: 25760 .loc 32 125 0 25761 0134 30BC pop {r4, r5} 25762 .LCFI306: 25763 .cfi_remember_state 25764 .cfi_restore 5 25765 .cfi_restore 4 25766 .cfi_def_cfa_offset 0 25767 .LVL2725: 25768 0136 7047 bx lr 25769 .LVL2726: 25770 .L1218: 25771 .LCFI307: 25772 .cfi_restore_state 25773 .LBB2823: 25774 .LBB2801: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 25775 .loc 33 92 0 25776 0138 B3F5805F cmp r3, #4096 25777 013c 07D1 bne .L1228 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25778 .loc 33 113 0 25779 013e 0222 movs r2, #2 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25780 .loc 33 122 0 25781 0140 1B4B ldr r3, .L1229+72 25782 .LVL2727: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 25783 .loc 33 113 0 25784 0142 8A60 str r2, [r1, #8] 25785 .LBE2801: 25786 .LBE2823: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25787 .loc 32 117 0 25788 0144 4FF0FF30 mov r0, #-1 25789 .LVL2728: 25790 .LBB2824: 25791 .LBB2802: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 25792 .loc 33 122 0 25793 0148 4B61 str r3, [r1, #20] 25794 .LBE2802: 25795 .LBE2824: 25796 .loc 32 125 0 25797 014a 30BC pop {r4, r5} 25798 .LCFI308: 25799 .cfi_remember_state 25800 .cfi_restore 5 25801 .cfi_restore 4 ARM GAS /tmp/ccfbYRip.s page 807 25802 .cfi_def_cfa_offset 0 25803 .LVL2729: 25804 014c 7047 bx lr 25805 .LVL2730: 25806 .L1228: 25807 .LCFI309: 25808 .cfi_restore_state 25809 .LBB2825: 25810 .LBB2803: 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 25811 .loc 33 92 0 25812 014e B3F5005F cmp r3, #8192 25813 0152 B5D1 bne .L1221 25814 .LBE2803: 25815 .LBE2825: 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c **** } 25816 .loc 32 117 0 25817 0154 4FF0FF30 mov r0, #-1 25818 0158 72E7 b .L1210 25819 .L1224: 25820 015a 4FF0FF30 mov r0, #-1 25821 015e 82E7 b .L1211 25822 .L1223: 25823 0160 4FF0FF30 mov r0, #-1 25824 0164 BCE7 b .L1212 25825 .L1230: 25826 0166 00BF .align 2 25827 .L1229: 25828 0168 00000000 .word WeightsQ31_8192 25829 016c 00000000 .word realCoefAQ31 25830 0170 00000000 .word realCoefBQ31 25831 0174 00000000 .word cos_factorsQ31_8192 25832 0178 00000000 .word arm_cfft_sR_q31_len4096 25833 017c 00000000 .word WeightsQ31_2048 25834 0180 00000000 .word cos_factorsQ31_2048 25835 0184 00000000 .word arm_cfft_sR_q31_len1024 25836 0188 00000000 .word WeightsQ31_128 25837 018c 00000000 .word cos_factorsQ31_128 25838 0190 00000000 .word arm_cfft_sR_q31_len64 25839 0194 00000000 .word WeightsQ31_512 25840 0198 00000000 .word cos_factorsQ31_512 25841 019c 00000000 .word arm_cfft_sR_q31_len256 25842 01a0 00000000 .word arm_cfft_sR_q31_len512 25843 01a4 00000000 .word arm_cfft_sR_q31_len16 25844 01a8 00000000 .word arm_cfft_sR_q31_len128 25845 01ac 00000000 .word arm_cfft_sR_q31_len32 25846 01b0 00000000 .word arm_cfft_sR_q31_len2048 25847 .cfi_endproc 25848 .LFE198: 25850 .section .text.arm_split_rfft_f32,"ax",%progbits 25851 .align 1 25852 .p2align 2,,3 25853 .global arm_split_rfft_f32 25854 .syntax unified 25855 .thumb 25856 .thumb_func 25857 .fpu fpv4-sp-d16 ARM GAS /tmp/ccfbYRip.s page 808 25859 arm_split_rfft_f32: 25860 .LFB202: 25861 .file 34 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Title: arm_rfft_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Description: RFFT & RIFFT Floating point process function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* ---------------------------------------------------------------------- 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * Internal functions prototypes 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** * -------------------------------------------------------------------- */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** extern void arm_radix4_butterfly_f32( 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t fftLen, 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pCoef, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t twidCoefModifier); 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** extern void arm_radix4_butterfly_inverse_f32( 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t fftLen, 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pCoef, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t twidCoefModifier, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t onebyfftLen); 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** extern void arm_bitreversal_f32( 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t fftSize, 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint16_t bitRevFactor, 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const uint16_t * pBitRevTab); 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** void arm_split_rfft_f32( ARM GAS /tmp/ccfbYRip.s page 809 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t fftLen, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pATable, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pBTable, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pDst, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t modifier); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** void arm_split_rifft_f32( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t fftLen, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pATable, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pBTable, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pDst, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t modifier); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @ingroup groupTransforms 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @addtogroup RealFFT 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @{ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @brief Processing function for the floating-point RFFT/RIFFT. 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** Source buffer is modified by this function. 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_f32 and wi 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] S points to an instance of the floating-point RFFT/RIFFT structure 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pSrc points to the input buffer 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[out] pDst points to the output buffer 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @return none 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** void arm_rfft_f32( 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_rfft_instance_f32 * S, 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pDst) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Calculation of Real IFFT of input */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** if (S->ifftFlagR == 1U) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Real IFFT core process */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoef 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Complex radix-4 IFFT process */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModi 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Bit reversal process */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** if (S->bitReverseFlagR == 1U) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } ARM GAS /tmp/ccfbYRip.s page 810 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** else 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Calculation of RFFT of input */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Complex radix-4 FFT process */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Bit reversal process */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** if (S->bitReverseFlagR == 1U) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Real FFT core process */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRM 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @} end of RealFFT group 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @brief Core Real FFT process 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pSrc points to input buffer 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] fftLen length of FFT 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pATable points to twiddle Coef A buffer 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pBTable points to twiddle Coef B buffer 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[out] pDst points to output buffer 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @return none 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** void arm_split_rfft_f32( 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t fftLen, 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pATable, 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pBTable, 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pDst, 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t modifier) 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 25862 .loc 34 154 0 25863 .cfi_startproc 25864 @ args = 8, pretend = 0, frame = 0 25865 @ frame_needed = 0, uses_anonymous_args = 0 25866 .LVL2731: 25867 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 25868 .LCFI310: 25869 .cfi_def_cfa_offset 24 25870 .cfi_offset 4, -24 25871 .cfi_offset 5, -20 25872 .cfi_offset 6, -16 25873 .cfi_offset 7, -12 25874 .cfi_offset 8, -8 25875 .cfi_offset 14, -4 ARM GAS /tmp/ccfbYRip.s page 811 25876 .loc 34 154 0 25877 0004 DDE90674 ldrd r7, r4, [sp, #24] 25878 .LVL2732: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t i; /* Loop Counter */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t outR, outI; /* Temporary variables for output */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficie 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U]; /* temp pointers for 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for 25879 .loc 34 160 0 25880 0008 4FEAC10E lsl lr, r1, #3 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Init coefficient pointers */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = &pATable[modifier * 2]; 25881 .loc 34 163 0 25882 000c 4FEAC40C lsl ip, r4, #3 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for 25883 .loc 34 159 0 25884 0010 0C01 lsls r4, r1, #4 25885 .LVL2733: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = &pBTable[modifier * 2]; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** i = fftLen - 1U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** while (i > 0U) 25886 .loc 34 168 0 25887 0012 0139 subs r1, r1, #1 25888 .LVL2734: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = &pBTable[modifier * 2]; 25889 .loc 34 163 0 25890 0014 6244 add r2, r2, ip 25891 .LVL2735: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = &pBTable[modifier * 2]; 25892 .loc 34 164 0 25893 0016 6344 add r3, r3, ip 25894 .LVL2736: 25895 .loc 34 168 0 25896 0018 3CD0 beq .L1232 25897 001a 0C3C subs r4, r4, #12 25898 .LVL2737: 25899 001c AEF10C05 sub r5, lr, #12 25900 0020 3C44 add r4, r4, r7 25901 .LVL2738: 25902 0022 0544 add r5, r5, r0 25903 0024 00F11008 add r8, r0, #16 25904 0028 07F11006 add r6, r7, #16 25905 .LVL2739: 25906 .L1233: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR = ( pSrc[2 * i] * pATable[2 * i] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pSrc[2 * i + 1] * pATable[2 * i + 1] 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pSrc[2 * n - 2 * i] * pBTable[2 * i] 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pIn[2 * i] * pATable[2 * i + 1] ARM GAS /tmp/ccfbYRip.s page 812 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* read pATable[2 * i] */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA1 = *pCoefA++; 25907 .loc 34 183 0 25908 002c 92ED004A vldr.32 s8, [r2] 25909 .LVL2740: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pATable[2 * i + 1] */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA2 = *pCoefA; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i] * pATable[2 * i] */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR = *pSrc1 * CoefA1; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i] * CoefA2 */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI = *pSrc1++ * CoefA2; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR -= (*pSrc1 + *pSrc2) * CoefA2; 25910 .loc 34 193 0 25911 0030 58ED016A vldr.32 s13, [r8, #-4] 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25912 .loc 34 185 0 25913 0034 92ED016A vldr.32 s12, [r2, #4] 25914 .LVL2741: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i] * CoefA2 */ 25915 .loc 34 188 0 25916 0038 58ED023A vldr.32 s7, [r8, #-8] 25917 .LVL2742: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i + 1] * CoefA1 */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI += *pSrc1++ * CoefA1; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefB1 = *pCoefB; 25918 .loc 34 197 0 25919 003c D3ED004A vldr.32 s9, [r3] 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI -= *pSrc2-- * CoefB1; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI -= *pSrc2 * CoefA2; 25920 .loc 34 202 0 25921 0040 D5ED015A vldr.32 s11, [r5, #4] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i + 1] * CoefA1 */ 25922 .loc 34 193 0 25923 0044 95ED025A vldr.32 s10, [r5, #8] 25924 .LVL2743: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25925 .loc 34 195 0 25926 0048 66EE847A vmul.f32 s15, s13, s8 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR += *pSrc2-- * CoefB1; 25927 .loc 34 205 0 25928 004c 25EEA47A vmul.f32 s14, s11, s9 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25929 .loc 34 195 0 25930 0050 E3EE867A vfma.f32 s15, s7, s12 ARM GAS /tmp/ccfbYRip.s page 813 25931 .LVL2744: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 25932 .loc 34 168 0 25933 0054 0139 subs r1, r1, #1 25934 .LVL2745: 25935 0056 08F10808 add r8, r8, #8 25936 .LVL2746: 25937 .loc 34 205 0 25938 005a A3EE847A vfma.f32 s14, s7, s8 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* write output */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst1++ = outR; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst1++ = outI; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* write complex conjugate output */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst2-- = -outI; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst2-- = outR; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* update coefficient pointer */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = pCoefB + (modifier * 2U); 25939 .loc 34 216 0 25940 005e 6344 add r3, r3, ip 25941 .LVL2747: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = pCoefA + ((modifier * 2U) - 1U); 25942 .loc 34 217 0 25943 0060 6244 add r2, r2, ip 25944 .LVL2748: 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ 25945 .loc 34 200 0 25946 0062 E5EE647A vfms.f32 s15, s10, s9 25947 .LVL2749: 25948 0066 A5F10805 sub r5, r5, #8 25949 .LVL2750: 25950 006a 06F10806 add r6, r6, #8 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i + 1] * CoefA1 */ 25951 .loc 34 193 0 25952 006e 76EE856A vadd.f32 s13, s13, s10 25953 .LVL2751: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25954 .loc 34 202 0 25955 0072 E5EEC67A vfms.f32 s15, s11, s12 25956 .LVL2752: 25957 0076 A4F10804 sub r4, r4, #8 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25958 .loc 34 205 0 25959 007a A6EEC67A vfms.f32 s14, s13, s12 25960 .LVL2753: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst2-- = outR; 25961 .loc 34 212 0 25962 007e F1EE676A vneg.f32 s13, s15 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25963 .loc 34 209 0 25964 0082 46ED037A vstr.32 s15, [r6, #-12] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst1++ = outI; 25965 .loc 34 208 0 25966 0086 06ED047A vstr.32 s14, [r6, #-16] 25967 .LVL2754: ARM GAS /tmp/ccfbYRip.s page 814 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst2-- = outR; 25968 .loc 34 212 0 25969 008a C4ED046A vstr.32 s13, [r4, #16] 25970 .LVL2755: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 25971 .loc 34 213 0 25972 008e 84ED037A vstr.32 s14, [r4, #12] 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 25973 .loc 34 168 0 25974 0092 CBD1 bne .L1233 25975 .LVL2756: 25976 .L1232: 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** i--; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[2U * fftLen] = pSrc[0] - pSrc[1]; 25977 .loc 34 223 0 25978 0094 90ED017A vldr.32 s14, [r0, #4] 25979 0098 D0ED007A vldr.32 s15, [r0] 25980 009c BE44 add lr, lr, r7 25981 009e 77EEC77A vsub.f32 s15, s15, s14 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[(2U * fftLen) + 1U] = 0.0f; 25982 .loc 34 224 0 25983 00a2 0023 movs r3, #0 25984 .LVL2757: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[(2U * fftLen) + 1U] = 0.0f; 25985 .loc 34 223 0 25986 00a4 CEED007A vstr.32 s15, [lr] 25987 .loc 34 224 0 25988 00a8 CEF80430 str r3, [lr, #4] @ float 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[0] = pSrc[0] + pSrc[1]; 25989 .loc 34 226 0 25990 00ac D0ED007A vldr.32 s15, [r0] 25991 00b0 90ED017A vldr.32 s14, [r0, #4] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[1] = 0.0f; 25992 .loc 34 227 0 25993 00b4 7B60 str r3, [r7, #4] @ float 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pDst[1] = 0.0f; 25994 .loc 34 226 0 25995 00b6 77EE877A vadd.f32 s15, s15, s14 25996 00ba C7ED007A vstr.32 s15, [r7] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 25997 .loc 34 229 0 25998 00be BDE8F081 pop {r4, r5, r6, r7, r8, pc} 25999 .cfi_endproc 26000 .LFE202: 26002 00c2 00BF .section .text.arm_rfft_f32,"ax",%progbits 26003 .align 1 26004 .p2align 2,,3 26005 .global arm_rfft_f32 26006 .syntax unified 26007 .thumb 26008 .thumb_func ARM GAS /tmp/ccfbYRip.s page 815 26009 .fpu fpv4-sp-d16 26011 arm_rfft_f32: 26012 .LFB201: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; 26013 .loc 34 94 0 26014 .cfi_startproc 26015 @ args = 0, pretend = 0, frame = 0 26016 @ frame_needed = 0, uses_anonymous_args = 0 26017 .LVL2758: 26018 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 26019 .LCFI311: 26020 .cfi_def_cfa_offset 32 26021 .cfi_offset 4, -32 26022 .cfi_offset 5, -28 26023 .cfi_offset 6, -24 26024 .cfi_offset 7, -20 26025 .cfi_offset 8, -16 26026 .cfi_offset 9, -12 26027 .cfi_offset 10, -8 26028 .cfi_offset 14, -4 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26029 .loc 34 95 0 26030 0004 4769 ldr r7, [r0, #20] 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; 26031 .loc 34 94 0 26032 0006 0646 mov r6, r0 26033 .LVL2759: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26034 .loc 34 98 0 26035 0008 8079 ldrb r0, [r0, #6] @ zero_extendqisi2 26036 .LVL2760: 26037 000a D7F80490 ldr r9, [r7, #4] 26038 000e BB89 ldrh r3, [r7, #12] 26039 0010 0128 cmp r0, #1 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; 26040 .loc 34 94 0 26041 0012 0D46 mov r5, r1 26042 0014 82B0 sub sp, sp, #8 26043 .LCFI312: 26044 .cfi_def_cfa_offset 40 26045 0016 3988 ldrh r1, [r7] 26046 .LVL2761: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; 26047 .loc 34 94 0 26048 0018 9046 mov r8, r2 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26049 .loc 34 98 0 26050 001a 13D0 beq .L1250 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26051 .loc 34 118 0 26052 001c 4A46 mov r2, r9 26053 .LVL2762: 26054 001e 2846 mov r0, r5 26055 0020 FFF7FEFF bl arm_radix4_butterfly_f32 26056 .LVL2763: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26057 .loc 34 121 0 ARM GAS /tmp/ccfbYRip.s page 816 26058 0024 F379 ldrb r3, [r6, #7] @ zero_extendqisi2 26059 0026 012B cmp r3, #1 26060 0028 5DD0 beq .L1251 26061 .L1244: 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 26062 .loc 34 127 0 26063 002a B468 ldr r4, [r6, #8] 26064 002c B188 ldrh r1, [r6, #4] 26065 002e D6E90323 ldrd r2, r3, [r6, #12] 26066 0032 2846 mov r0, r5 26067 0034 CDF80080 str r8, [sp] 26068 0038 0194 str r4, [sp, #4] 26069 003a FFF7FEFF bl arm_split_rfft_f32 26070 .LVL2764: 26071 .L1239: 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26072 .loc 34 130 0 26073 003e 02B0 add sp, sp, #8 26074 .LCFI313: 26075 .cfi_remember_state 26076 .cfi_def_cfa_offset 32 26077 @ sp needed 26078 0040 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 26079 .LVL2765: 26080 .L1250: 26081 .LCFI314: 26082 .cfi_restore_state 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26083 .loc 34 101 0 26084 0044 B6F804C0 ldrh ip, [r6, #4] 26085 0048 B068 ldr r0, [r6, #8] 26086 .LVL2766: 26087 004a D6E9034E ldrd r4, lr, [r6, #12] 26088 .LVL2767: 26089 .LBB2828: 26090 .LBB2829: 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @brief Core Real IFFT process 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pSrc points to input buffer 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] fftLen length of FFT 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pATable points to twiddle Coef A buffer 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] pBTable points to twiddle Coef B buffer 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[out] pDst points to output buffer 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** @return none 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** void arm_split_rifft_f32( 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pSrc, 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t fftLen, 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pATable, 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t * pBTable, 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t * pDst, 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** uint32_t modifier) 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { ARM GAS /tmp/ccfbYRip.s page 817 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t outR, outI; /* Temporary variables for output */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficie 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U]; 26091 .loc 34 254 0 26092 004e 4FEACC02 lsl r2, ip, #3 26093 .LVL2768: 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = &pATable[0]; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = &pBTable[0]; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** while (fftLen > 0U) 26094 .loc 34 259 0 26095 0052 BCF1000F cmp ip, #0 26096 0056 34D0 beq .L1241 26097 0058 043A subs r2, r2, #4 26098 .LVL2769: 26099 005a 2A44 add r2, r2, r5 26100 .LVL2770: 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR = ( pIn[2 * i] * pATable[2 * i] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pIn[2 * i + 1] * pATable[2 * i + 1] 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i] 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pIn[2 * i] * pATable[2 * i + 1] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA1 = *pCoefA++; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA2 = *pCoefA; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* outR = (pSrc[2 * i] * CoefA1 */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR = *pSrc1 * CoefA1; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* - pSrc[2 * i] * CoefA2 */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI = -(*pSrc1++) * CoefA2; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR += (*pSrc1 + *pSrc2) * CoefA2; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * i + 1] * CoefA1 */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI += (*pSrc1++) * CoefA1; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefB1 = *pCoefB; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI -= *pSrc2-- * CoefB1; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outR += *pSrc2 * CoefB1; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** outI += *pSrc2-- * CoefA2; ARM GAS /tmp/ccfbYRip.s page 818 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* write output */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst++ = outR; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst++ = outI; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* update coefficient pointer */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefB = pCoefB + (modifier * 2); 26101 .loc 34 304 0 26102 005c 4FEAC00A lsl r10, r0, #3 26103 0060 05F10800 add r0, r5, #8 26104 .LVL2771: 26105 0064 08F10805 add r5, r8, #8 26106 .LVL2772: 26107 .L1242: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26108 .loc 34 283 0 26109 0068 D2ED024A vldr.32 s9, [r2, #8] 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26110 .loc 34 288 0 26111 006c DEED007A vldr.32 s15, [lr] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26112 .loc 34 294 0 26113 0070 D2ED016A vldr.32 s13, [r2, #4] 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA2 = *pCoefA; 26114 .loc 34 273 0 26115 0074 94ED004A vldr.32 s8, [r4] 26116 .LVL2773: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26117 .loc 34 283 0 26118 0078 10ED016A vldr.32 s12, [r0, #-4] 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26119 .loc 34 277 0 26120 007c 10ED025A vldr.32 s10, [r0, #-8] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26121 .loc 34 274 0 26122 0080 D4ED015A vldr.32 s11, [r4, #4] 26123 .LVL2774: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26124 .loc 34 297 0 26125 0084 27EEE47A vnmul.f32 s14, s15, s9 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26126 .loc 34 294 0 26127 0088 67EEA67A vmul.f32 s15, s15, s13 26128 .LVL2775: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26129 .loc 34 297 0 26130 008c A4EE067A vfma.f32 s14, s8, s12 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26131 .loc 34 259 0 26132 0090 BCF1010C subs ip, ip, #1 26133 .LVL2776: 26134 .loc 34 304 0 26135 0094 D644 add lr, lr, r10 26136 .LVL2777: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26137 .loc 34 294 0 26138 0096 E4EE057A vfma.f32 s15, s8, s10 ARM GAS /tmp/ccfbYRip.s page 819 26139 009a A2F10802 sub r2, r2, #8 26140 .LVL2778: 26141 009e 00F10800 add r0, r0, #8 26142 .LVL2779: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26143 .loc 34 283 0 26144 00a2 36EE246A vadd.f32 s12, s12, s9 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26145 .loc 34 297 0 26146 00a6 76EEC56A vsub.f32 s13, s13, s10 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26147 .loc 34 294 0 26148 00aa E5EE867A vfma.f32 s15, s11, s12 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = pCoefA + (modifier * 2 - 1); 26149 .loc 34 305 0 26150 00ae 5444 add r4, r4, r10 26151 .LVL2780: 26152 00b0 05F10805 add r5, r5, #8 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26153 .loc 34 297 0 26154 00b4 A5EEA67A vfma.f32 s14, s11, s13 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst++ = outI; 26155 .loc 34 300 0 26156 00b8 45ED047A vstr.32 s15, [r5, #-16] 26157 .LVL2781: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26158 .loc 34 301 0 26159 00bc 05ED037A vstr.32 s14, [r5, #-12] 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26160 .loc 34 259 0 26161 00c0 D2D1 bne .L1242 26162 .LVL2782: 26163 .L1241: 26164 .LBE2829: 26165 .LBE2828: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26166 .loc 34 105 0 26167 00c2 4A46 mov r2, r9 26168 00c4 97ED040A vldr.32 s0, [r7, #16] 26169 00c8 4046 mov r0, r8 26170 00ca FFF7FEFF bl arm_radix4_butterfly_inverse_f32 26171 .LVL2783: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26172 .loc 34 108 0 26173 00ce F379 ldrb r3, [r6, #7] @ zero_extendqisi2 26174 00d0 012B cmp r3, #1 26175 00d2 B4D1 bne .L1239 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 26176 .loc 34 110 0 26177 00d4 BB68 ldr r3, [r7, #8] 26178 00d6 FA89 ldrh r2, [r7, #14] 26179 00d8 3988 ldrh r1, [r7] 26180 00da 4046 mov r0, r8 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26181 .loc 34 130 0 26182 00dc 02B0 add sp, sp, #8 26183 .LCFI315: ARM GAS /tmp/ccfbYRip.s page 820 26184 .cfi_remember_state 26185 .cfi_def_cfa_offset 32 26186 @ sp needed 26187 00de BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 26188 .LCFI316: 26189 .cfi_restore 14 26190 .cfi_restore 10 26191 .cfi_restore 9 26192 .cfi_restore 8 26193 .cfi_restore 7 26194 .cfi_restore 6 26195 .cfi_restore 5 26196 .cfi_restore 4 26197 .cfi_def_cfa_offset 0 26198 .LVL2784: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 26199 .loc 34 110 0 26200 00e2 FFF7FEBF b arm_bitreversal_f32 26201 .LVL2785: 26202 .L1251: 26203 .LCFI317: 26204 .cfi_restore_state 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 26205 .loc 34 123 0 26206 00e6 BB68 ldr r3, [r7, #8] 26207 00e8 FA89 ldrh r2, [r7, #14] 26208 00ea 3988 ldrh r1, [r7] 26209 00ec 2846 mov r0, r5 26210 00ee FFF7FEFF bl arm_bitreversal_f32 26211 .LVL2786: 26212 00f2 9AE7 b .L1244 26213 .cfi_endproc 26214 .LFE201: 26216 .section .text.arm_dct4_f32,"ax",%progbits 26217 .align 1 26218 .p2align 2,,3 26219 .global arm_dct4_f32 26220 .syntax unified 26221 .thumb 26222 .thumb_func 26223 .fpu fpv4-sp-d16 26225 arm_dct4_f32: 26226 .LFB195: 26227 .file 35 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Title: arm_dct4_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Description: Processing function of DCT4 & IDCT4 F32 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * ARM GAS /tmp/ccfbYRip.s page 821 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @ingroup groupTransforms 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @defgroup DCT4_IDCT4 DCT Type IV Functions 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Representation of signals by minimum number of values is important for storage and transmission. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The possibility of large discontinuity between the beginning and end of a period of a signal 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in DFT can be avoided by extending the signal so that it is even-symmetric. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in th 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** spectrum and is very widely used in signal and image coding applications. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous bo 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** DCT has an excellent energy-packing capability, hence has many applications and in data compressi 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Reordering of the input data makes the computation of DCT just a problem of 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** computing the DFT of a real signal with a few additional operations. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** This approach provides regular, simple, and very efficient DCT algorithms for practical hardware 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-pr 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** DCT2 implementation can be described in the following steps: 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** - Re-ordering input 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** - Calculating Real FFT 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** - Multiplication of weights and Real FFT output and getting real part from the product. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** This process is explained by the block diagram below: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \image html DCT4.gif "Discrete Cosine Transform - type-IV" 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par Algorithm 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The N-point type-IV DCT is defined as a real, linear transformation by the formu 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \image html DCT4Equation.gif 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** where k = 0, 1, 2, ..., N-1 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Its inverse is defined as follows: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \image html IDCT4Equation.gif 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** where n = 0, 1, 2, ..., N-1 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying ARM GAS /tmp/ccfbYRip.s page 822 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The symmetry of the transform matrix indicates that the fast algorithms for the 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** and inverse transform computation are identical. 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Note that the implementation of Inverse DCT4 and DCT4 is same, hence same proces 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par Lengths supported by the transform: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The library provides separate functions for Q15, Q31, and floating-point data ty 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par Instance Structure 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The instances for Real FFT and FFT, cosine values table and twiddle factor table 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** A separate instance structure must be defined for each transform. 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** There are separate instance structure declarations for each of the 3 supported d 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par Initialization Functions 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** There is also an associated initialization function for each data type. 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The initialization function performs the following operations: 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** - Sets the values of the internal structure fields. 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** - Initializes Real FFT as its process function is used internally in DCT4, by ca 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Use of the initialization function is optional. 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** However, if the initialization function is used, then the instance structure can 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** To place an instance structure into a const data section, the instance structure 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Manually initialize the instance structure as follows: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c ****       arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c ****       arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c ****       arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c ****
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \c normalize is normalizing factor used and is equal to sqrt(2/N); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \c pTwiddle points to the twiddle factor table; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \c pCosFactor points to the cosFactor table; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \c pRfft points to the real FFT instance; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** \c pCfft points to the complex FFT instance; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_rad 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** and arm_rfft_f32() respectively for details regarding static initialization. 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @par Fixed-Point Behavior 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Care must be taken when using the fixed-point versions of the DCT4 transform fun 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** In particular, the overflow and saturation behavior of the accumulator used in e 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** Refer to the function specific documentation below for usage guidelines. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @addtogroup DCT4_IDCT4 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @{ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @brief Processing function for the floating-point DCT4/IDCT4. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @param[in] pState points to state buffer 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @param[in,out] pInlineBuffer points to the in-place input and output buffer 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** @return none 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** void arm_dct4_f32( ARM GAS /tmp/ccfbYRip.s page 823 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** const arm_dct4_instance_f32 * S, 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** float32_t * pState, 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** float32_t * pInlineBuffer) 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 26228 .loc 35 131 0 26229 .cfi_startproc 26230 @ args = 0, pretend = 0, frame = 0 26231 @ frame_needed = 0, uses_anonymous_args = 0 26232 .LVL2787: 26233 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 26234 .LCFI318: 26235 .cfi_def_cfa_offset 24 26236 .cfi_offset 4, -24 26237 .cfi_offset 5, -20 26238 .cfi_offset 6, -16 26239 .cfi_offset 7, -12 26240 .cfi_offset 8, -8 26241 .cfi_offset 14, -4 26242 .loc 35 131 0 26243 0004 1546 mov r5, r2 26244 0006 0646 mov r6, r0 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** const float32_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ 26245 .loc 35 133 0 26246 0008 D0F80C80 ldr r8, [r0, #12] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** float32_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and p 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** float32_t in; /* Temporary variable */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** uint32_t i; /* Loop counter */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* DCT4 computation involves DCT2 (which is calculated using RFFT) 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * along with some pre-processing and post-processing. 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Computational procedure is explained as follows: 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * (a) Pre-processing involves multiplying input with cos factor, 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * where, 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * r(n) -- output of preprocessing 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * u(n) -- input to preprocessing(actual Source buffer) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * (b) Calculation of DCT2 using FFT is divided into three steps: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step1: Re-ordering of even and odd elements of input. 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step2: Calculating FFT of the re-ordered input. 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step3: Taking the real part of the product of FFT output and weights. 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * where, 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Y4 -- DCT4 output, Y2 -- DCT2 output 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * (d) Multiplying the output with the normalizing factor sqrt(2/N). 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /*-------- Pre-processing ------------*/ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N); 26247 .loc 35 160 0 26248 000c 0288 ldrh r2, [r0] 26249 .LVL2788: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 26250 .loc 35 132 0 ARM GAS /tmp/ccfbYRip.s page 824 26251 000e 8768 ldr r7, [r0, #8] 26252 .LVL2789: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 26253 .loc 35 131 0 26254 0010 0C46 mov r4, r1 26255 .loc 35 160 0 26256 0012 2846 mov r0, r5 26257 .LVL2790: 26258 0014 2946 mov r1, r5 26259 .LVL2791: 26260 0016 B0EE000A vmov.f32 s0, #2.0e+0 26261 001a FFF7FEFF bl arm_scale_f32 26262 .LVL2792: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N); 26263 .loc 35 161 0 26264 001e 4146 mov r1, r8 26265 0020 3388 ldrh r3, [r6] 26266 0022 2A46 mov r2, r5 26267 0024 2846 mov r0, r5 26268 0026 FFF7FEFF bl arm_mult_f32 26269 .LVL2793: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* ---------------------------------------------------------------- 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step1: Re-ordering of even and odd elements as 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * pState[i] = pInlineBuffer[2*i] and 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** ---------------------------------------------------------------------*/ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS1 initialized to pState */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1 = pState; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS2 = pState + (S->N - 1U); 26270 .loc 35 173 0 26271 002a 3288 ldrh r2, [r6] 26272 .LVL2794: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to input buffer */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->Nby2 >> 2U; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Re-ordering of even and odd elements */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState[i] = pInlineBuffer[2*i] */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS1++ = *pbuff++; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS2-- = *pbuff++; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS1++ = *pbuff++; ARM GAS /tmp/ccfbYRip.s page 825 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS2-- = *pbuff++; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS1++ = *pbuff++; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS2-- = *pbuff++; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS1++ = *pbuff++; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS2-- = *pbuff++; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement loop counter */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to input buffer */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS1 initialized to pState */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1 = pState; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->N >> 2U; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Compute 4 outputs at a time */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Writing the re-ordered output back to inplace input buffer */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = *pS1++; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = *pS1++; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = *pS1++; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = *pS1++; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* --------------------------------------------------------- 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step2: Calculate RFFT for N-point input 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * ---------------------------------------------------------- */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_rfft_f32 (S->pRfft, pInlineBuffer, pState); 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /*---------------------------------------------------------------------- 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step3: Multiply the FFT output with the weights. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *----------------------------------------------------------------------*/ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* ----------- Post-processing ---------- */ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* DCT-IV can be obtained from DCT-II by the equation, 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Hence, Y4(0) = Y2(0)/2 */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Getting only real part from the output and Converting to DCT-IV */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = (S->N - 1U) >> 2U; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to input buffer. */ ARM GAS /tmp/ccfbYRip.s page 826 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS1 initialized to pState */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1 = pState; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ * (float32_t) 0.5; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* points to the next real value */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** ** No loop unrolling is used. */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = (S->N - 1U) % 0x4U; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** while (i > 0U) 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* points to the next real value */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } ARM GAS /tmp/ccfbYRip.s page 827 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->N >> 2U; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to the pInlineBuffer(now contains the output values) */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a t 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pbuff; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in * S->normalize; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pbuff; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in * S->normalize; 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pbuff; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in * S->normalize; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pbuff; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in * S->normalize; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** #else 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter to N/2 */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->Nby2; 26273 .loc 35 343 0 26274 002c 7188 ldrh r1, [r6, #2] 26275 .LVL2795: 26276 002e 04EB820C add ip, r4, r2, lsl #2 26277 0032 05F10803 add r3, r5, #8 26278 0036 2046 mov r0, r4 26279 .LVL2796: 26280 .L1253: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Re-ordering of even and odd elements */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState[i] = pInlineBuffer[2*i] */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS1++ = *pbuff++; 26281 .loc 35 349 0 discriminator 1 26282 0038 53F808EC ldr lr, [r3, #-8] @ float 26283 003c 40F804EB str lr, [r0], #4 @ float 26284 .LVL2797: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pS2-- = *pbuff++; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ ARM GAS /tmp/ccfbYRip.s page 828 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 26285 .loc 35 355 0 discriminator 1 26286 0040 0139 subs r1, r1, #1 26287 .LVL2798: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 26288 .loc 35 351 0 discriminator 1 26289 0042 53F804EC ldr lr, [r3, #-4] @ float 26290 0046 4CF804ED str lr, [ip, #-4]! @ float 26291 .LVL2799: 26292 004a 03F10803 add r3, r3, #8 26293 .LVL2800: 26294 .loc 35 355 0 discriminator 1 26295 004e F3D1 bne .L1253 26296 0050 2946 mov r1, r5 26297 .LVL2801: 26298 .loc 35 355 0 is_stmt 0 26299 0052 2346 mov r3, r4 26300 .LVL2802: 26301 .L1254: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to input buffer */ 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS1 initialized to pState */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1 = pState; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter */ 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->N; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Writing the re-ordered output back to inplace input buffer */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = *pS1++; 26302 .loc 35 369 0 is_stmt 1 discriminator 1 26303 0054 53F8040B ldr r0, [r3], #4 @ float 26304 .LVL2803: 26305 0058 41F8040B str r0, [r1], #4 @ float 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement the loop counter */ 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 26306 .loc 35 373 0 discriminator 1 26307 005c 013A subs r2, r2, #1 26308 .LVL2804: 26309 005e F9D1 bne .L1254 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* --------------------------------------------------------- 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step2: Calculate RFFT for N-point input 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * ---------------------------------------------------------- */ 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_rfft_f32 (S->pRfft, pInlineBuffer, pState); 26310 .loc 35 380 0 26311 0060 2246 mov r2, r4 26312 .LVL2805: 26313 0062 2946 mov r1, r5 ARM GAS /tmp/ccfbYRip.s page 829 26314 0064 3069 ldr r0, [r6, #16] 26315 0066 FFF7FEFF bl arm_rfft_f32 26316 .LVL2806: 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /*---------------------------------------------------------------------- 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Step3: Multiply the FFT output with the weights. 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *----------------------------------------------------------------------*/ 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); 26317 .loc 35 385 0 26318 006a 2246 mov r2, r4 26319 006c 2046 mov r0, r4 26320 006e 3946 mov r1, r7 26321 0070 3388 ldrh r3, [r6] 26322 0072 FFF7FEFF bl arm_cmplx_mult_cmplx_f32 26323 .LVL2807: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* ----------- Post-processing ---------- */ 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* DCT-IV can be obtained from DCT-II by the equation, 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** * Hence, Y4(0) = Y2(0)/2 */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Getting only real part from the output and Converting to DCT-IV */ 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to input buffer. */ 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pS1 initialized to pState */ 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1 = pState; 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ * (float32_t) 0.5; 26324 .loc 35 400 0 26325 0076 D4ED007A vldr.32 s15, [r4] 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing the loop counter */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = (S->N - 1U); 26326 .loc 35 408 0 26327 007a 3188 ldrh r1, [r6] 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 26328 .loc 35 400 0 26329 007c B6EE007A vmov.f32 s14, #5.0e-1 26330 0080 67EE877A vmul.f32 s15, s15, s14 26331 .LVL2808: 26332 0084 2246 mov r2, r4 26333 .loc 35 408 0 26334 0086 0139 subs r1, r1, #1 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 26335 .loc 35 402 0 26336 0088 2B1D adds r3, r5, #4 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 26337 .loc 35 400 0 26338 008a 1032 adds r2, r2, #16 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** ARM GAS /tmp/ccfbYRip.s page 830 26339 .loc 35 402 0 26340 008c C5ED007A vstr.32 s15, [r5] 26341 .loc 35 408 0 26342 0090 0846 mov r0, r1 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 26343 .loc 35 402 0 26344 0092 1C46 mov r4, r3 26345 .LVL2809: 26346 .L1255: 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pS1++ - in; 26347 .loc 35 414 0 discriminator 1 26348 0094 12ED027A vldr.32 s14, [r2, #-8] 26349 0098 77EE677A vsub.f32 s15, s14, s15 26350 .LVL2810: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* points to the next real value */ 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pS1++; 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement loop counter */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 26351 .loc 35 422 0 discriminator 1 26352 009c 0138 subs r0, r0, #1 26353 .LVL2811: 26354 009e 02F10802 add r2, r2, #8 26355 .LVL2812: 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in; 26356 .loc 35 415 0 discriminator 1 26357 00a2 E4EC017A vstmia.32 r4!, {s15} 26358 .LVL2813: 26359 .loc 35 422 0 discriminator 1 26360 00a6 F5D1 bne .L1255 26361 00a8 01E0 b .L1256 26362 .LVL2814: 26363 .L1263: 26364 00aa 0433 adds r3, r3, #4 26365 .LVL2815: 26366 00ac 0139 subs r1, r1, #1 26367 .LVL2816: 26368 .L1256: 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Initializing loop counter */ 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i = S->N; 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* pbuff initialized to the pInlineBuffer (now contains the output values) */ 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** pbuff = pInlineBuffer; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** do 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** { ARM GAS /tmp/ccfbYRip.s page 831 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** in = *pbuff; 26369 .loc 35 435 0 discriminator 1 26370 00ae 95ED007A vldr.32 s14, [r5] 26371 .LVL2817: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** *pbuff++ = in * S->normalize; 26372 .loc 35 436 0 discriminator 1 26373 00b2 D6ED017A vldr.32 s15, [r6, #4] 26374 00b6 67EE877A vmul.f32 s15, s15, s14 26375 00ba 1D46 mov r5, r3 26376 .LVL2818: 26377 00bc 43ED017A vstr.32 s15, [r3, #-4] 26378 .LVL2819: 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** /* Decrement loop counter */ 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** i--; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } while (i > 0U); 26379 .loc 35 440 0 discriminator 1 26380 00c0 0029 cmp r1, #0 26381 00c2 F2D1 bne .L1263 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c **** } 26382 .loc 35 444 0 26383 00c4 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 26384 .cfi_endproc 26385 .LFE195: 26387 .section .text.arm_split_rifft_f32,"ax",%progbits 26388 .align 1 26389 .p2align 2,,3 26390 .global arm_split_rifft_f32 26391 .syntax unified 26392 .thumb 26393 .thumb_func 26394 .fpu fpv4-sp-d16 26396 arm_split_rifft_f32: 26397 .LFB203: 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t outR, outI; /* Temporary variables for output */ 26398 .loc 34 250 0 26399 .cfi_startproc 26400 @ args = 8, pretend = 0, frame = 0 26401 @ frame_needed = 0, uses_anonymous_args = 0 26402 @ link register save eliminated. 26403 .LVL2820: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26404 .loc 34 259 0 26405 0000 B1B3 cbz r1, .L1272 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** float32_t outR, outI; /* Temporary variables for output */ 26406 .loc 34 250 0 26407 0002 70B4 push {r4, r5, r6} 26408 .LCFI319: 26409 .cfi_def_cfa_offset 12 26410 .cfi_offset 4, -12 26411 .cfi_offset 5, -8 26412 .cfi_offset 6, -4 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = pCoefA + (modifier * 2 - 1); ARM GAS /tmp/ccfbYRip.s page 832 26413 .loc 34 304 0 26414 0004 049D ldr r5, [sp, #16] 26415 0006 CC00 lsls r4, r1, #3 26416 .LVL2821: 26417 0008 EE00 lsls r6, r5, #3 26418 000a 039D ldr r5, [sp, #12] 26419 000c 043C subs r4, r4, #4 26420 .LVL2822: 26421 000e 0444 add r4, r4, r0 26422 .LVL2823: 26423 0010 0835 adds r5, r5, #8 26424 0012 0830 adds r0, r0, #8 26425 .LVL2824: 26426 .L1266: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26427 .loc 34 283 0 26428 0014 D4ED024A vldr.32 s9, [r4, #8] 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26429 .loc 34 288 0 26430 0018 D3ED007A vldr.32 s15, [r3] 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26431 .loc 34 294 0 26432 001c D4ED016A vldr.32 s13, [r4, #4] 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** CoefA2 = *pCoefA; 26433 .loc 34 273 0 26434 0020 92ED004A vldr.32 s8, [r2] 26435 .LVL2825: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26436 .loc 34 283 0 26437 0024 10ED016A vldr.32 s12, [r0, #-4] 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26438 .loc 34 277 0 26439 0028 10ED025A vldr.32 s10, [r0, #-8] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26440 .loc 34 274 0 26441 002c D2ED015A vldr.32 s11, [r2, #4] 26442 .LVL2826: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26443 .loc 34 297 0 26444 0030 27EEE47A vnmul.f32 s14, s15, s9 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26445 .loc 34 294 0 26446 0034 66EEA77A vmul.f32 s15, s13, s15 26447 .LVL2827: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26448 .loc 34 297 0 26449 0038 A6EE047A vfma.f32 s14, s12, s8 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26450 .loc 34 259 0 26451 003c 0139 subs r1, r1, #1 26452 .LVL2828: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** pCoefA = pCoefA + (modifier * 2 - 1); 26453 .loc 34 304 0 26454 003e 3344 add r3, r3, r6 26455 .LVL2829: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26456 .loc 34 294 0 ARM GAS /tmp/ccfbYRip.s page 833 26457 0040 E5EE047A vfma.f32 s15, s10, s8 26458 0044 A4F10804 sub r4, r4, #8 26459 .LVL2830: 26460 0048 00F10800 add r0, r0, #8 26461 .LVL2831: 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26462 .loc 34 283 0 26463 004c 36EE246A vadd.f32 s12, s12, s9 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26464 .loc 34 297 0 26465 0050 76EEC56A vsub.f32 s13, s13, s10 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26466 .loc 34 294 0 26467 0054 E6EE257A vfma.f32 s15, s12, s11 26468 .LVL2832: 26469 .loc 34 305 0 26470 0058 3244 add r2, r2, r6 26471 .LVL2833: 26472 005a 05F10805 add r5, r5, #8 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26473 .loc 34 297 0 26474 005e A6EEA57A vfma.f32 s14, s13, s11 26475 .LVL2834: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** *pDst++ = outI; 26476 .loc 34 300 0 26477 0062 45ED047A vstr.32 s15, [r5, #-16] 26478 .LVL2835: 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 26479 .loc 34 301 0 26480 0066 05ED037A vstr.32 s14, [r5, #-12] 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** { 26481 .loc 34 259 0 26482 006a D3D1 bne .L1266 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** /* Decrement loop count */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** fftLen--; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c **** } 26483 .loc 34 311 0 26484 006c 70BC pop {r4, r5, r6} 26485 .LCFI320: 26486 .cfi_restore 6 26487 .cfi_restore 5 26488 .cfi_restore 4 26489 .cfi_def_cfa_offset 0 26490 .LVL2836: 26491 006e 7047 bx lr 26492 .LVL2837: 26493 .L1272: 26494 0070 7047 bx lr 26495 .cfi_endproc 26496 .LFE203: 26498 0072 00BF .section .text.stage_rfft_f32,"ax",%progbits 26499 .align 1 26500 .p2align 2,,3 26501 .global stage_rfft_f32 ARM GAS /tmp/ccfbYRip.s page 834 26502 .syntax unified 26503 .thumb 26504 .thumb_func 26505 .fpu fpv4-sp-d16 26507 stage_rfft_f32: 26508 .LFB204: 26509 .file 36 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Title: arm_rfft_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Description: RFFT & RIFFT Floating point process function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** void stage_rfft_f32( 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_rfft_fast_instance_f32 * S, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * p, 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * pOut) 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t twR, twI; /* RFFT Twiddle coefficients */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pB = p; /* decreasing pointer */ 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t xAR, xAI, xBR, xBI; /* temporary variables */ 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t t1a, t1b; /* temporary variables */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t p0, p1, p2, p3; /* temporary variables */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32x4x2_t tw,xA,xB; 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32x4x2_t tmp1, tmp2, res; 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32x4_t vecStridesFwd, vecStridesBkwd; 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** ARM GAS /tmp/ccfbYRip.s page 835 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vecStridesFwd = vidupq_u32((uint32_t)0, 2); 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vecStridesBkwd = -vecStridesFwd; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** int blockCnt; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k = (S->Sint).fftLen - 1; 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Pack first and last sample of the frequency domain together */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++ ; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++ ; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // U1 = XA(1) + XB(1); % It is real 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xBR + xAR ; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // U2 = XB(1) - XA(1); % It is imaginary 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xBI + xAI ; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a + t1b ); 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB = p + 2*k; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt = k >> 2; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** while (blockCnt > 0) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** function X = my_split_rfft(X, ifftFlag) 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** % X is a series of real numbers 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** L = length(X); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XC = X(1:2:end) +i*X(2:2:end); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA = fft(XC); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XB = conj(XA([1 end:-1:2])); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** for l = 2:L/2 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** end 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA( 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** X = XA; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xA = vld2q_f32(pA); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 8; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB = vld2q_f32(pB); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** ARM GAS /tmp/ccfbYRip.s page 836 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[1] = vnegq_f32(xB.val[1]); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 8; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tw = vld2q_f32(pCoeff); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pCoeff += 8; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vmulq(tw.val[0], tmp2.val[0]); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vmulq(tw.val[0], tmp2.val[1]); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] ); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] ); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vmulq_n_f32(res.val[0], 0.5f); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vmulq_n_f32(res.val[1], 0.5f); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vst2q_f32(pOut, res); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pOut += 8; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt--; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt = k & 3; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** while (blockCnt > 0) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** function X = my_split_rfft(X, ifftFlag) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** % X is a series of real numbers 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** L = length(X); 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XC = X(1:2:end) +i*X(2:2:end); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA = fft(XC); 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XB = conj(XA([1 end:-1:2])); 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** for l = 2:L/2 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** end 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA( 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** X = XA; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; ARM GAS /tmp/ccfbYRip.s page 837 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xBR - xAR ; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xBI + xAI ; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p0 = twR * t1a; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p1 = twI * t1a; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p2 = twR * t1b; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p3 = twI * t1b; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 2; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt--; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Prepares data for inverse cfft */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** void merge_rfft_f32( 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_rfft_fast_instance_f32 * S, 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * p, 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * pOut) 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t twR, twI; /* RFFT Twiddle coefficients */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pB = p; /* decreasing pointer */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t xAR, xAI, xBR, xBI; /* temporary variables */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t t1a, t1b, r, s, t, u; /* temporary variables */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32x4x2_t tw,xA,xB; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32x4x2_t tmp1, tmp2, res; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32x4_t vecStridesFwd, vecStridesBkwd; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vecStridesFwd = vidupq_u32((uint32_t)0, 2); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vecStridesBkwd = -vecStridesFwd; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** int blockCnt; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k = (S->Sint).fftLen - 1; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pCoeff += 2 ; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR + xAI ); ARM GAS /tmp/ccfbYRip.s page 838 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB = p + 2*k ; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2 ; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt = k >> 2; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** while (blockCnt > 0) 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* G is half of the frequency complex spectrum */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** //for k = 2:N 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xA = vld2q_f32(pA); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 8; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB = vld2q_f32(pB); 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd); 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd); 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xB.val[1] = vnegq_f32(xB.val[1]); 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 8; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tw = vld2q_f32(pCoeff); 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tw.val[1] = vnegq_f32(tw.val[1]); 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pCoeff += 8; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]); 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]); 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]); 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]); 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vmulq(tw.val[0], tmp2.val[0]); 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vmulq(tw.val[0], tmp2.val[1]); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] ); 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] ); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[0] = vmulq_n_f32(res.val[0], 0.5f); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** res.val[1] = vmulq_n_f32(res.val[1], 0.5f); 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** vst2q_f32(pOut, res); 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pOut += 8; 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt--; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt = k & 3; 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** while (blockCnt > 0) 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { ARM GAS /tmp/ccfbYRip.s page 839 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* G is half of the frequency complex spectrum */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** //for k = 2:N 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1] ; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0] ; 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xAR - xBR ; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xAI + xBI ; 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** r = twR * t1a; 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** s = twI * t1b; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t = twI * t1a; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** u = twR * t1b; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 2; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** blockCnt--; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** #else 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** void stage_rfft_f32( 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_rfft_fast_instance_f32 * S, 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * p, 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * pOut) 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 26510 .loc 36 314 0 26511 .cfi_startproc 26512 @ args = 0, pretend = 0, frame = 0 26513 @ frame_needed = 0, uses_anonymous_args = 0 26514 @ link register save eliminated. 26515 .LVL2838: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t twR, twI; /* RFFT Twiddle coefficients */ 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pB = p; /* decreasing pointer */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t xAR, xAI, xBR, xBI; /* temporary variables */ 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t t1a, t1b; /* temporary variables */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t p0, p1, p2, p3; /* temporary variables */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k = (S->Sint).fftLen - 1; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Pack first and last sample of the frequency domain together */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; ARM GAS /tmp/ccfbYRip.s page 840 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++ ; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++ ; 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // U1 = XA(1) + XB(1); % It is real 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xBR + xAR ; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // U2 = XB(1) - XA(1); % It is imaginary 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xBI + xAI ; 26516 .loc 36 342 0 26517 0000 D1ED017A vldr.32 s15, [r1, #4] 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 26518 .loc 36 329 0 26519 0004 91ED006A vldr.32 s12, [r1] 26520 .loc 36 342 0 26521 0008 77EEA77A vadd.f32 s15, s15, s15 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a + t1b ); 26522 .loc 36 346 0 26523 000c F0EE006A vmov.f32 s13, #2.0e+0 26524 0010 B0EE677A vmov.f32 s14, s15 26525 0014 A6EE267A vfma.f32 s14, s12, s13 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 26526 .loc 36 314 0 26527 0018 10B4 push {r4} 26528 .LCFI321: 26529 .cfi_def_cfa_offset 4 26530 .cfi_offset 4, -4 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26531 .loc 36 347 0 26532 001a D6EE267A vfnms.f32 s15, s12, s13 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26533 .loc 36 325 0 26534 001e 0488 ldrh r4, [r0] 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 26535 .loc 36 317 0 26536 0020 4069 ldr r0, [r0, #20] 26537 .LVL2839: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26538 .loc 36 346 0 26539 0022 F6EE003A vmov.f32 s7, #5.0e-1 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26540 .loc 36 325 0 26541 0026 013C subs r4, r4, #1 26542 .LVL2840: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26543 .loc 36 346 0 26544 0028 27EE237A vmul.f32 s14, s14, s7 26545 .loc 36 347 0 26546 002c 67EEA37A vmul.f32 s15, s15, s7 26547 0030 01EBC403 add r3, r1, r4, lsl #3 ARM GAS /tmp/ccfbYRip.s page 841 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26548 .loc 36 346 0 26549 0034 82ED007A vstr.32 s14, [r2] 26550 .LVL2841: 26551 .loc 36 347 0 26552 0038 C2ED017A vstr.32 s15, [r2, #4] 26553 .LVL2842: 26554 003c 1030 adds r0, r0, #16 26555 .LVL2843: 26556 003e 1032 adds r2, r2, #16 26557 .LVL2844: 26558 0040 083B subs r3, r3, #8 26559 0042 1031 adds r1, r1, #16 26560 .LVL2845: 26561 .L1276: 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB = p + 2*k; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** do 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** function X = my_split_rfft(X, ifftFlag) 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** % X is a series of real numbers 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** L = length(X); 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XC = X(1:2:end) +i*X(2:2:end); 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA = fft(XC); 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XB = conj(XA([1 end:-1:2])); 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** for l = 2:L/2 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** end 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA( 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** X = XA; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 26562 .loc 36 370 0 discriminator 1 26563 0044 D3ED036A vldr.32 s13, [r3, #12] 26564 .LVL2846: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26565 .loc 36 373 0 discriminator 1 26566 0048 11ED015A vldr.32 s10, [r1, #-4] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; 26567 .loc 36 371 0 discriminator 1 26568 004c D3ED027A vldr.32 s15, [r3, #8] 26569 .LVL2847: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26570 .loc 36 372 0 discriminator 1 26571 0050 11ED024A vldr.32 s8, [r1, #-8] 26572 .LVL2848: 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; ARM GAS /tmp/ccfbYRip.s page 842 26573 .loc 36 376 0 discriminator 1 26574 0054 50ED015A vldr.32 s11, [r0, #-4] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 26575 .loc 36 375 0 discriminator 1 26576 0058 10ED026A vldr.32 s12, [r0, #-8] 26577 .LVL2849: 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xBR - xAR ; 26578 .loc 36 378 0 discriminator 1 26579 005c 77EEC44A vsub.f32 s9, s15, s8 26580 .LVL2850: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xBI + xAI ; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p0 = twR * t1a; 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p1 = twI * t1a; 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p2 = twR * t1b; 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** p3 = twI * t1b; 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26581 .loc 36 389 0 discriminator 1 26582 0060 35EE667A vsub.f32 s14, s10, s13 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26583 .loc 36 388 0 discriminator 1 26584 0064 77EE847A vadd.f32 s15, s15, s8 26585 .LVL2851: 26586 .loc 36 389 0 discriminator 1 26587 0068 A5EEA47A vfma.f32 s14, s11, s9 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 2; 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k--; 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } while (k > 0U); 26588 .loc 36 395 0 discriminator 1 26589 006c 013C subs r4, r4, #1 26590 .LVL2852: 26591 006e A3F10803 sub r3, r3, #8 26592 .LVL2853: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26593 .loc 36 388 0 discriminator 1 26594 0072 E6EE247A vfma.f32 s15, s12, s9 26595 0076 01F10801 add r1, r1, #8 26596 .LVL2854: 26597 007a 00F10800 add r0, r0, #8 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26598 .loc 36 379 0 discriminator 1 26599 007e 76EE856A vadd.f32 s13, s13, s10 26600 .LVL2855: 26601 0082 02F10802 add r2, r2, #8 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26602 .loc 36 388 0 discriminator 1 26603 0086 E5EEA67A vfma.f32 s15, s11, s13 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26604 .loc 36 389 0 discriminator 1 ARM GAS /tmp/ccfbYRip.s page 843 26605 008a A6EE667A vfms.f32 s14, s12, s13 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26606 .loc 36 388 0 discriminator 1 26607 008e 67EEA37A vmul.f32 s15, s15, s7 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26608 .loc 36 389 0 discriminator 1 26609 0092 27EE237A vmul.f32 s14, s14, s7 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26610 .loc 36 388 0 discriminator 1 26611 0096 42ED047A vstr.32 s15, [r2, #-16] 26612 .LVL2856: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26613 .loc 36 389 0 discriminator 1 26614 009a 02ED037A vstr.32 s14, [r2, #-12] 26615 .LVL2857: 26616 .loc 36 395 0 discriminator 1 26617 009e D1D1 bne .L1276 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 26618 .loc 36 396 0 26619 00a0 5DF8044B ldr r4, [sp], #4 26620 .LCFI322: 26621 .cfi_restore 4 26622 .cfi_def_cfa_offset 0 26623 00a4 7047 bx lr 26624 .cfi_endproc 26625 .LFE204: 26627 00a6 00BF .section .text.merge_rfft_f32,"ax",%progbits 26628 .align 1 26629 .p2align 2,,3 26630 .global merge_rfft_f32 26631 .syntax unified 26632 .thumb 26633 .thumb_func 26634 .fpu fpv4-sp-d16 26636 merge_rfft_f32: 26637 .LFB205: 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Prepares data for inverse cfft */ 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** void merge_rfft_f32( 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_rfft_fast_instance_f32 * S, 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * p, 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * pOut) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 26638 .loc 36 403 0 26639 .cfi_startproc 26640 @ args = 0, pretend = 0, frame = 0 26641 @ frame_needed = 0, uses_anonymous_args = 0 26642 @ link register save eliminated. 26643 .LVL2858: 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t twR, twI; /* RFFT Twiddle coefficients */ 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pB = p; /* decreasing pointer */ 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t xAR, xAI, xBR, xBI; /* temporary variables */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t t1a, t1b, r, s, t, u; /* temporary variables */ 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** ARM GAS /tmp/ccfbYRip.s page 844 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k = (S->Sint).fftLen - 1; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 26644 .loc 36 414 0 26645 0000 D1ED007A vldr.32 s15, [r1] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26646 .loc 36 415 0 26647 0004 D1ED016A vldr.32 s13, [r1, #4] 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pCoeff += 2 ; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR + xAI ); 26648 .loc 36 419 0 26649 0008 37EEA67A vadd.f32 s14, s15, s13 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26650 .loc 36 420 0 26651 000c 77EEE67A vsub.f32 s15, s15, s13 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint32_t k; /* Loop Counter */ 26652 .loc 36 403 0 26653 0010 10B4 push {r4} 26654 .LCFI323: 26655 .cfi_def_cfa_offset 4 26656 .cfi_offset 4, -4 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26657 .loc 36 419 0 26658 0012 F6EE003A vmov.f32 s7, #5.0e-1 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26659 .loc 36 412 0 26660 0016 0488 ldrh r4, [r0] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 26661 .loc 36 406 0 26662 0018 4069 ldr r0, [r0, #20] 26663 .LVL2859: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26664 .loc 36 419 0 26665 001a 27EE237A vmul.f32 s14, s14, s7 26666 .loc 36 420 0 26667 001e 67EEA37A vmul.f32 s15, s15, s7 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26668 .loc 36 412 0 26669 0022 013C subs r4, r4, #1 26670 .LVL2860: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26671 .loc 36 419 0 26672 0024 82ED007A vstr.32 s14, [r2] 26673 .LVL2861: 26674 .loc 36 420 0 26675 0028 C2ED017A vstr.32 s15, [r2, #4] 26676 .LVL2862: 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB = p + 2*k ; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2 ; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** while (k > 0U) 26677 .loc 36 425 0 26678 002c ACB3 cbz r4, .L1279 26679 002e E300 lsls r3, r4, #3 ARM GAS /tmp/ccfbYRip.s page 845 26680 .LVL2863: 26681 0030 083B subs r3, r3, #8 26682 .LVL2864: 26683 0032 0B44 add r3, r3, r1 26684 .LVL2865: 26685 0034 1030 adds r0, r0, #16 26686 0036 1032 adds r2, r2, #16 26687 .LVL2866: 26688 0038 1031 adds r1, r1, #16 26689 .LVL2867: 26690 .L1281: 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* G is half of the frequency complex spectrum */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** //for k = 2:N 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1] ; 26691 .loc 36 430 0 26692 003a D3ED036A vldr.32 s13, [r3, #12] 26693 .LVL2868: 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0] ; 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26694 .loc 36 433 0 26695 003e 11ED015A vldr.32 s10, [r1, #-4] 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0] ; 26696 .loc 36 431 0 26697 0042 D3ED027A vldr.32 s15, [r3, #8] 26698 .LVL2869: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26699 .loc 36 432 0 26700 0046 11ED024A vldr.32 s8, [r1, #-8] 26701 .LVL2870: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twR = *pCoeff++; 26702 .loc 36 435 0 26703 004a 10ED026A vldr.32 s12, [r0, #-8] 26704 .LVL2871: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 26705 .loc 36 436 0 26706 004e 50ED015A vldr.32 s11, [r0, #-4] 26707 .LVL2872: 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1a = xAR - xBR ; 26708 .loc 36 438 0 26709 0052 74EE674A vsub.f32 s9, s8, s15 26710 .LVL2873: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xAI + xBI ; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** r = twR * t1a; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** s = twI * t1b; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t = twI * t1a; 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** u = twR * t1b; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI ARM GAS /tmp/ccfbYRip.s page 846 26711 .loc 36 449 0 26712 0056 35EE667A vsub.f32 s14, s10, s13 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 26713 .loc 36 448 0 26714 005a 77EE847A vadd.f32 s15, s15, s8 26715 .LVL2874: 26716 005e B1EE466A vneg.f32 s12, s12 26717 .LVL2875: 26718 .loc 36 449 0 26719 0062 A5EEA47A vfma.f32 s14, s11, s9 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 26720 .loc 36 425 0 26721 0066 013C subs r4, r4, #1 26722 .LVL2876: 26723 0068 A3F10803 sub r3, r3, #8 26724 .LVL2877: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 26725 .loc 36 448 0 26726 006c E6EE247A vfma.f32 s15, s12, s9 26727 0070 01F10801 add r1, r1, #8 26728 .LVL2878: 26729 0074 00F10800 add r0, r0, #8 26730 .LVL2879: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xAI + xBI ; 26731 .loc 36 439 0 26732 0078 76EE856A vadd.f32 s13, s13, s10 26733 .LVL2880: 26734 007c 02F10802 add r2, r2, #8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 26735 .loc 36 448 0 26736 0080 E5EEE67A vfms.f32 s15, s11, s13 26737 .loc 36 449 0 26738 0084 A6EE267A vfma.f32 s14, s12, s13 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 26739 .loc 36 448 0 26740 0088 67EEA37A vmul.f32 s15, s15, s7 26741 .loc 36 449 0 26742 008c 27EE237A vmul.f32 s14, s14, s7 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 26743 .loc 36 448 0 26744 0090 42ED047A vstr.32 s15, [r2, #-16] 26745 .LVL2881: 26746 .loc 36 449 0 26747 0094 02ED037A vstr.32 s14, [r2, #-12] 26748 .LVL2882: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 26749 .loc 36 425 0 26750 0098 CFD1 bne .L1281 26751 .LVL2883: 26752 .L1279: 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2; 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pB -= 2; 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** k--; 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } ARM GAS /tmp/ccfbYRip.s page 847 26753 .loc 36 456 0 26754 009a 5DF8044B ldr r4, [sp], #4 26755 .LCFI324: 26756 .cfi_restore 4 26757 .cfi_def_cfa_offset 0 26758 009e 7047 bx lr 26759 .cfi_endproc 26760 .LFE205: 26762 .section .text.arm_rfft_fast_f32,"ax",%progbits 26763 .align 1 26764 .p2align 2,,3 26765 .global arm_rfft_fast_f32 26766 .syntax unified 26767 .thumb 26768 .thumb_func 26769 .fpu fpv4-sp-d16 26771 arm_rfft_fast_f32: 26772 .LFB206: 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @ingroup groupTransforms 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /** 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @defgroup RealFFT Real FFT Functions 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The CMSIS DSP library includes specialized algorithms for computing the 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** FFT of real data sequences. The FFT is defined over complex data but 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** in many applications the input is real. Real FFT algorithms take advantage 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** of the symmetry properties of the FFT and have a speed advantage over complex 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** algorithms of the same length. 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage. 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The real length N forward FFT of a sequence is computed using the steps shown be 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** \image html RFFT.gif "Real Fast Fourier Transform" 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The real sequence is initially treated as if it were complex to perform a CFFT. 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** Later, a processing stage reshapes the data to obtain half of the frequency spec 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** in complex format. Except the first complex number that contains the two real nu 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** X[0] and X[N/2] all the data is complex. In other words, the first complex sampl 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** contains two real values packed. 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The input for the inverse RFFT should keep the same format as the output of the 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** forward RFFT. A first processing stage pre-process the data to later perform an 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** inverse CFFT. 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** \image html RIFFT.gif "Real Inverse Fast Fourier Transform" 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The algorithms for floating-point, Q15, and Q31 data are slightly different 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** and we describe each algorithm in turn. 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par Floating-point 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32( ARM GAS /tmp/ccfbYRip.s page 848 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been d 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** but are still documented. 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The FFT of a real N-point sequence has even symmetry in the frequency domain. 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The second half of the data equals the conjugate of the first half flipped in fr 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** Looking at the data, we see that we can uniquely represent the FFT using only N/ 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** These are packed into the output array in alternating real and imaginary compone 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ... 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** real[(N/2)-1], imag[(N/2)-1 } 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** It happens that the first complex number (real[0], imag[0]) is actually 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** all real. real[0] represents the DC offset, and imag[0] should be 0. 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** the first harmonic and so on. 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The real FFT functions pack the frequency domain data in this fashion. 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The forward transform outputs the data in this form and the inverse 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** transform expects input data in this form. The function always performs 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** the needed bitreversal so that the input and output data is always in 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** normal order. The functions support lengths of [32, 64, 128, ..., 4096] 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** samples. 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par Q15 and Q31 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The real algorithms are defined in a similar manner and utilize N/2 complex 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** transforms behind the scenes. 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The complex transforms used internally include scaling to prevent fixed-point 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** overflows. The overall scaling equals 1/(fftLen/2). 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** Due to the use of complex transform internally, the source buffer is 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** modified by the rfft. 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** A separate instance structure must be defined for each transform used but 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twiddle factor and bit reversal tables can be reused. 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** There is also an associated initialization function for each data type. 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The initialization function performs the following operations: 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** - Sets the values of the internal structure fields. 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** - Initializes twiddle factor table and bit reversal table pointers. 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** - Initializes the internal complex FFT data structure. 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** Use of the initialization function is optional **except for MVE versions where i 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** If you don't use the initialization functions, then the structures should be ini 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** similar to the one below: 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 
 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c ****       arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifi
 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c ****       arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifi
 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c ****
543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** where fftLenReal is the length of the real transform; 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** fftLenBy2 length of the internal complex transform (fftLenReal/2). 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** ifftFlagR Selects forward (=0) or inverse (=1) transform. 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** bitReverseFlagR Selects bit reversed output (=0) or normal order 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** output (=1). 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twidCoefRModifier stride modifier for the twiddle factor table. 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** The value is based on the FFT length; 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pTwiddleARealpoints to the A array of twiddle coefficients; 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pTwiddleBRealpoints to the B array of twiddle coefficients; 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pCfft points to the CFFT Instance structure. The CFFT structure ARM GAS /tmp/ccfbYRip.s page 849 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** must also be initialized. 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @par 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** Note that with MVE versions you can't initialize instance structures directly an 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** use the initialization function**. 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /** 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @addtogroup RealFFT 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @{ 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /** 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @brief Processing function for the floating-point real FFT. 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @param[in] S points to an arm_rfft_fast_instance_f32 structure 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @param[in] p points to input buffer (Source buffer is modified by this function.) 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @param[in] pOut points to output buffer 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @param[in] ifftFlag 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** - value = 0: RFFT 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** - value = 1: RIFFT 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** @return none 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** */ 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** void arm_rfft_fast_f32( 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_rfft_fast_instance_f32 * S, 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * p, 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t * pOut, 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** uint8_t ifftFlag) 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 26773 .loc 36 580 0 26774 .cfi_startproc 26775 @ args = 0, pretend = 0, frame = 0 26776 @ frame_needed = 0, uses_anonymous_args = 0 26777 .LVL2884: 26778 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 26779 .LCFI325: 26780 .cfi_def_cfa_offset 24 26781 .cfi_offset 4, -24 26782 .cfi_offset 5, -20 26783 .cfi_offset 6, -16 26784 .cfi_offset 7, -12 26785 .cfi_offset 8, -8 26786 .cfi_offset 14, -4 26787 .loc 36 580 0 26788 0004 1546 mov r5, r2 26789 0006 0788 ldrh r7, [r0] 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** const arm_cfft_instance_f32 * Sint = &(S->Sint); 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Calculation of Real FFT */ 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** if (ifftFlag) 26790 .loc 36 584 0 26791 0008 002B cmp r3, #0 26792 000a 40F08980 bne .L1338 26793 .LBB2838: 26794 .LBB2839: 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 26795 .loc 27 1182 0 26796 000e B7F5807F cmp r7, #256 ARM GAS /tmp/ccfbYRip.s page 850 26797 0012 9046 mov r8, r2 26798 0014 0C46 mov r4, r1 26799 0016 0646 mov r6, r0 26800 .LVL2885: 26801 0018 00F0F580 beq .L1292 26802 001c 00F2D780 bhi .L1293 26803 0020 202F cmp r7, #32 26804 0022 00F0F080 beq .L1292 26805 0026 40F2EA80 bls .L1339 26806 002a 402F cmp r7, #64 26807 002c 00F0DB80 beq .L1296 26808 0030 802F cmp r7, #128 26809 0032 04D1 bne .L1291 26810 .L1295: 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 26811 .loc 27 1187 0 26812 0034 2146 mov r1, r4 26813 .LVL2886: 26814 0036 3046 mov r0, r6 26815 .LVL2887: 26816 0038 FFF7FEFF bl arm_cfft_radix8by2_f32 26817 .LVL2888: 26818 003c 3788 ldrh r7, [r6] 26819 .LVL2889: 26820 .L1291: 26821 .LBB2840: 26822 .LBB2841: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 26823 .loc 8 82 0 26824 003e B389 ldrh r3, [r6, #12] 26825 .LBE2841: 26826 .LBE2840: 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** 26827 .loc 27 1202 0 26828 0040 B068 ldr r0, [r6, #8] 26829 .LVL2890: 26830 .LBB2843: 26831 .LBB2842: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 26832 .loc 8 82 0 26833 0042 E3B1 cbz r3, .L1298 26834 0044 013B subs r3, r3, #1 26835 0046 5B08 lsrs r3, r3, #1 26836 0048 00F1040C add ip, r0, #4 26837 004c 0CEB830C add ip, ip, r3, lsl #2 26838 .LVL2891: 26839 .L1299: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 26840 .loc 8 85 0 26841 0050 4288 ldrh r2, [r0, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 26842 .loc 8 84 0 26843 0052 0388 ldrh r3, [r0] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 26844 .loc 8 85 0 26845 0054 9208 lsrs r2, r2, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; ARM GAS /tmp/ccfbYRip.s page 851 26846 .loc 8 84 0 26847 0056 9B08 lsrs r3, r3, #2 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 26848 .loc 8 89 0 26849 0058 54F82210 ldr r1, [r4, r2, lsl #2] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 26850 .loc 8 88 0 26851 005c 54F823E0 ldr lr, [r4, r3, lsl #2] 26852 .LVL2892: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 26853 .loc 8 89 0 26854 0060 44F82310 str r1, [r4, r3, lsl #2] 26855 .LVL2893: 26856 0064 9100 lsls r1, r2, #2 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 26857 .loc 8 88 0 26858 0066 9B00 lsls r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 26859 .loc 8 90 0 26860 0068 44F822E0 str lr, [r4, r2, lsl #2] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 26861 .loc 8 93 0 26862 006c 0433 adds r3, r3, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 26863 .loc 8 94 0 26864 006e 0431 adds r1, r1, #4 26865 0070 0430 adds r0, r0, #4 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 26866 .loc 8 93 0 26867 0072 E258 ldr r2, [r4, r3] 26868 .LVL2894: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 26869 .loc 8 94 0 26870 0074 6558 ldr r5, [r4, r1] 26871 0076 E550 str r5, [r4, r3] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 26872 .loc 8 82 0 26873 0078 8445 cmp ip, r0 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 26874 .loc 8 95 0 26875 007a 6250 str r2, [r4, r1] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 26876 .loc 8 82 0 26877 007c E8D1 bne .L1299 26878 .LVL2895: 26879 .L1298: 26880 .LBE2842: 26881 .LBE2843: 26882 .LBE2839: 26883 .LBE2838: 26884 .LBB2845: 26885 .LBB2846: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26886 .loc 36 342 0 26887 007e D4ED017A vldr.32 s15, [r4, #4] 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBI = pB[1]; 26888 .loc 36 329 0 ARM GAS /tmp/ccfbYRip.s page 852 26889 0082 94ED006A vldr.32 s12, [r4] 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 26890 .loc 36 317 0 26891 0086 7269 ldr r2, [r6, #20] 26892 .LVL2896: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26893 .loc 36 342 0 26894 0088 77EEA77A vadd.f32 s15, s15, s15 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26895 .loc 36 346 0 26896 008c F0EE006A vmov.f32 s13, #2.0e+0 26897 0090 B0EE677A vmov.f32 s14, s15 26898 0094 A6EE267A vfma.f32 s14, s12, s13 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26899 .loc 36 325 0 26900 0098 791E subs r1, r7, #1 26901 .LVL2897: 26902 009a 04EBC103 add r3, r4, r1, lsl #3 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26903 .loc 36 347 0 26904 009e D6EE267A vfnms.f32 s15, s12, s13 26905 .LVL2898: 26906 00a2 1032 adds r2, r2, #16 26907 .LVL2899: 26908 00a4 083B subs r3, r3, #8 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26909 .loc 36 346 0 26910 00a6 F6EE003A vmov.f32 s7, #5.0e-1 26911 00aa 27EE237A vmul.f32 s14, s14, s7 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26912 .loc 36 347 0 26913 00ae 67EEA37A vmul.f32 s15, s15, s7 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( t1a - t1b ); 26914 .loc 36 346 0 26915 00b2 88ED007A vstr.32 s14, [r8] 26916 .LVL2900: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26917 .loc 36 347 0 26918 00b6 C8ED017A vstr.32 s15, [r8, #4] 26919 .LVL2901: 26920 00ba 08F11005 add r5, r8, #16 26921 00be 1034 adds r4, r4, #16 26922 .LVL2902: 26923 .L1300: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0]; 26924 .loc 36 370 0 26925 00c0 D3ED036A vldr.32 s13, [r3, #12] 26926 .LVL2903: 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26927 .loc 36 373 0 26928 00c4 14ED015A vldr.32 s10, [r4, #-4] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 26929 .loc 36 371 0 26930 00c8 D3ED027A vldr.32 s15, [r3, #8] 26931 .LVL2904: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26932 .loc 36 372 0 ARM GAS /tmp/ccfbYRip.s page 853 26933 00cc 14ED024A vldr.32 s8, [r4, #-8] 26934 .LVL2905: 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26935 .loc 36 376 0 26936 00d0 52ED015A vldr.32 s11, [r2, #-4] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 26937 .loc 36 375 0 26938 00d4 12ED026A vldr.32 s12, [r2, #-8] 26939 .LVL2906: 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xBI + xAI ; 26940 .loc 36 378 0 26941 00d8 77EEC44A vsub.f32 s9, s15, s8 26942 .LVL2907: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26943 .loc 36 389 0 26944 00dc 35EE667A vsub.f32 s14, s10, s13 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26945 .loc 36 388 0 26946 00e0 77EE847A vadd.f32 s15, s15, s8 26947 .LVL2908: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26948 .loc 36 389 0 26949 00e4 A5EEA47A vfma.f32 s14, s11, s9 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 26950 .loc 36 395 0 26951 00e8 0139 subs r1, r1, #1 26952 .LVL2909: 26953 00ea A3F10803 sub r3, r3, #8 26954 .LVL2910: 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26955 .loc 36 388 0 26956 00ee E6EE247A vfma.f32 s15, s12, s9 26957 00f2 04F10804 add r4, r4, #8 26958 .LVL2911: 26959 00f6 02F10802 add r2, r2, #8 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26960 .loc 36 379 0 26961 00fa 76EE856A vadd.f32 s13, s13, s10 26962 .LVL2912: 26963 00fe 05F10805 add r5, r5, #8 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26964 .loc 36 388 0 26965 0102 E5EEA67A vfma.f32 s15, s11, s13 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26966 .loc 36 389 0 26967 0106 A6EE667A vfms.f32 s14, s12, s13 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26968 .loc 36 388 0 26969 010a 67EEA37A vmul.f32 s15, s15, s7 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26970 .loc 36 389 0 26971 010e 27EE237A vmul.f32 s14, s14, s7 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI 26972 .loc 36 388 0 26973 0112 45ED047A vstr.32 s15, [r5, #-16] 26974 .LVL2913: 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** ARM GAS /tmp/ccfbYRip.s page 854 26975 .loc 36 389 0 26976 0116 05ED037A vstr.32 s14, [r5, #-12] 26977 .LVL2914: 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 26978 .loc 36 395 0 26979 011a D1D1 bne .L1300 26980 .LBE2846: 26981 .LBE2845: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Real FFT compression */ 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** merge_rfft_f32(S, p, pOut); 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Complex radix-4 IFFT process */ 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** arm_cfft_f32( Sint, pOut, ifftFlag, 1); 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** else 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Calculation of RFFT of input */ 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** arm_cfft_f32( Sint, p, ifftFlag, 1); 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** /* Real FFT extraction */ 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** stage_rfft_f32(S, p, pOut); 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 26982 .loc 36 599 0 26983 011c BDE8F081 pop {r4, r5, r6, r7, r8, pc} 26984 .LVL2915: 26985 .L1338: 26986 .LBB2847: 26987 .LBB2848: 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 26988 .loc 36 414 0 26989 0120 D1ED007A vldr.32 s15, [r1] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26990 .loc 36 415 0 26991 0124 D1ED016A vldr.32 s13, [r1, #4] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** float32_t *pA = p; /* increasing pointer */ 26992 .loc 36 406 0 26993 0128 4469 ldr r4, [r0, #20] 26994 .LVL2916: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26995 .loc 36 419 0 26996 012a 37EEA67A vadd.f32 s14, s15, s13 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 26997 .loc 36 420 0 26998 012e 77EEE67A vsub.f32 s15, s15, s13 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); 26999 .loc 36 419 0 27000 0132 F6EE003A vmov.f32 s7, #5.0e-1 27001 0136 27EE237A vmul.f32 s14, s14, s7 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27002 .loc 36 420 0 27003 013a 67EEA37A vmul.f32 s15, s15, s7 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27004 .loc 36 412 0 27005 013e 013F subs r7, r7, #1 27006 .LVL2917: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * ( xAR - xAI ); ARM GAS /tmp/ccfbYRip.s page 855 27007 .loc 36 419 0 27008 0140 82ED007A vstr.32 s14, [r2] 27009 .LVL2918: 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27010 .loc 36 420 0 27011 0144 C2ED017A vstr.32 s15, [r2, #4] 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** pA += 2 ; 27012 .loc 36 422 0 27013 0148 4FEAC70C lsl ip, r7, #3 27014 .LVL2919: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 27015 .loc 36 425 0 27016 014c C7B3 cbz r7, .L1289 27017 014e ACF1080C sub ip, ip, #8 27018 .LVL2920: 27019 0152 04F1100E add lr, r4, #16 27020 0156 8C44 add ip, ip, r1 27021 .LVL2921: 27022 0158 01F11004 add r4, r1, #16 27023 .LVL2922: 27024 015c 02F11006 add r6, r2, #16 27025 .LVL2923: 27026 .L1290: 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xBR = pB[0] ; 27027 .loc 36 430 0 27028 0160 DCED036A vldr.32 s13, [ip, #12] 27029 .LVL2924: 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27030 .loc 36 433 0 27031 0164 14ED015A vldr.32 s10, [r4, #-4] 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAR = pA[0]; 27032 .loc 36 431 0 27033 0168 DCED027A vldr.32 s15, [ip, #8] 27034 .LVL2925: 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** xAI = pA[1]; 27035 .loc 36 432 0 27036 016c 14ED024A vldr.32 s8, [r4, #-8] 27037 .LVL2926: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** twI = *pCoeff++; 27038 .loc 36 435 0 27039 0170 1EED026A vldr.32 s12, [lr, #-8] 27040 .LVL2927: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27041 .loc 36 436 0 27042 0174 5EED015A vldr.32 s11, [lr, #-4] 27043 .LVL2928: 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** t1b = xAI + xBI ; 27044 .loc 36 438 0 27045 0178 74EE674A vsub.f32 s9, s8, s15 27046 .LVL2929: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27047 .loc 36 449 0 27048 017c 35EE667A vsub.f32 s14, s10, s13 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 27049 .loc 36 448 0 27050 0180 77EE847A vadd.f32 s15, s15, s8 27051 .LVL2930: ARM GAS /tmp/ccfbYRip.s page 856 27052 0184 B1EE466A vneg.f32 s12, s12 27053 .LVL2931: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27054 .loc 36 449 0 27055 0188 A5EEA47A vfma.f32 s14, s11, s9 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 27056 .loc 36 425 0 27057 018c 013F subs r7, r7, #1 27058 .LVL2932: 27059 018e ACF1080C sub ip, ip, #8 27060 .LVL2933: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 27061 .loc 36 448 0 27062 0192 E6EE247A vfma.f32 s15, s12, s9 27063 0196 04F10804 add r4, r4, #8 27064 .LVL2934: 27065 019a 0EF1080E add lr, lr, #8 27066 .LVL2935: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27067 .loc 36 439 0 27068 019e 76EE856A vadd.f32 s13, s13, s10 27069 .LVL2936: 27070 01a2 06F10806 add r6, r6, #8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 27071 .loc 36 448 0 27072 01a6 E5EEE67A vfms.f32 s15, s11, s13 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27073 .loc 36 449 0 27074 01aa A6EE267A vfma.f32 s14, s12, s13 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 27075 .loc 36 448 0 27076 01ae 67EEA37A vmul.f32 s15, s15, s7 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27077 .loc 36 449 0 27078 01b2 27EE237A vmul.f32 s14, s14, s7 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI 27079 .loc 36 448 0 27080 01b6 46ED047A vstr.32 s15, [r6, #-16] 27081 .LVL2937: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** 27082 .loc 36 449 0 27083 01ba 06ED037A vstr.32 s14, [r6, #-12] 27084 .LVL2938: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** { 27085 .loc 36 425 0 27086 01be CFD1 bne .L1290 27087 .LVL2939: 27088 .L1289: 27089 .LBE2848: 27090 .LBE2847: 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 27091 .loc 36 589 0 27092 01c0 1A46 mov r2, r3 27093 .LVL2940: 27094 01c2 2946 mov r1, r5 27095 .LVL2941: 27096 01c4 0123 movs r3, #1 ARM GAS /tmp/ccfbYRip.s page 857 27097 .LVL2942: 27098 .loc 36 599 0 27099 01c6 BDE8F041 pop {r4, r5, r6, r7, r8, lr} 27100 .LCFI326: 27101 .cfi_remember_state 27102 .cfi_restore 14 27103 .cfi_restore 8 27104 .cfi_restore 7 27105 .cfi_restore 6 27106 .cfi_restore 5 27107 .cfi_restore 4 27108 .cfi_def_cfa_offset 0 27109 .LVL2943: 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c **** } 27110 .loc 36 589 0 27111 01ca FFF7FEBF b arm_cfft_f32 27112 .LVL2944: 27113 .L1293: 27114 .LCFI327: 27115 .cfi_restore_state 27116 .LBB2849: 27117 .LBB2844: 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 27118 .loc 27 1182 0 27119 01ce B7F5806F cmp r7, #1024 27120 01d2 3FF42FAF beq .L1295 27121 01d6 0ED9 bls .L1340 27122 01d8 B7F5006F cmp r7, #2048 27123 01dc 13D0 beq .L1292 27124 01de B7F5805F cmp r7, #4096 27125 01e2 7FF42CAF bne .L1291 27126 .L1296: 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 27127 .loc 27 1197 0 27128 01e6 3946 mov r1, r7 27129 .LVL2945: 27130 01e8 0123 movs r3, #1 27131 .LVL2946: 27132 01ea 7268 ldr r2, [r6, #4] 27133 .LVL2947: 27134 01ec 2046 mov r0, r4 27135 .LVL2948: 27136 01ee FFF7FEFF bl arm_radix8_butterfly_f32 27137 .LVL2949: 27138 01f2 3788 ldrh r7, [r6] 27139 .LVL2950: 27140 01f4 23E7 b .L1291 27141 .LVL2951: 27142 .L1340: 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** { 27143 .loc 27 1182 0 27144 01f6 B7F5007F cmp r7, #512 27145 01fa F4D0 beq .L1296 27146 01fc 1FE7 b .L1291 27147 .L1339: 27148 01fe 102F cmp r7, #16 27149 0200 3FF418AF beq .L1295 ARM GAS /tmp/ccfbYRip.s page 858 27150 0204 1BE7 b .L1291 27151 .L1292: 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c **** break; 27152 .loc 27 1192 0 27153 0206 2146 mov r1, r4 27154 .LVL2952: 27155 0208 3046 mov r0, r6 27156 .LVL2953: 27157 020a FFF7FEFF bl arm_cfft_radix8by4_f32 27158 .LVL2954: 27159 020e 3788 ldrh r7, [r6] 27160 .LVL2955: 27161 0210 15E7 b .L1291 27162 .LBE2844: 27163 .LBE2849: 27164 .cfi_endproc 27165 .LFE206: 27167 0212 00BF .section .text.stage_rfft_f64,"ax",%progbits 27168 .align 1 27169 .p2align 2,,3 27170 .global stage_rfft_f64 27171 .syntax unified 27172 .thumb 27173 .thumb_func 27174 .fpu fpv4-sp-d16 27176 stage_rfft_f64: 27177 .LFB207: 27178 .file 37 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Title: arm_rfft_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Description: RFFT & RIFFT Double precision Floating point process function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * $Date: 29. November 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * $Revision: V1.0.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** #include "arm_math.h" ARM GAS /tmp/ccfbYRip.s page 859 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** void stage_rfft_f64( 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** const arm_rfft_fast_instance_f64 * S, 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * p, 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * pOut) 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 27179 .loc 37 35 0 27180 .cfi_startproc 27181 @ args = 0, pretend = 0, frame = 48 27182 @ frame_needed = 0, uses_anonymous_args = 0 27183 .LVL2956: 27184 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27185 .LCFI328: 27186 .cfi_def_cfa_offset 36 27187 .cfi_offset 4, -36 27188 .cfi_offset 5, -32 27189 .cfi_offset 6, -28 27190 .cfi_offset 7, -24 27191 .cfi_offset 8, -20 27192 .cfi_offset 9, -16 27193 .cfi_offset 10, -12 27194 .cfi_offset 11, -8 27195 .cfi_offset 14, -4 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t twR, twI; /* RFFT Twiddle coefficients */ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** const float64_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pA = p; /* increasing pointer */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pB = p; /* decreasing pointer */ 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t xAR, xAI, xBR, xBI; /* temporary variables */ 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t t1a, t1b; /* temporary variables */ 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t p0, p1, p2, p3; /* temporary variables */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** k = (S->Sint).fftLen - 1; 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Pack first and last sample of the frequency domain together */ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0]; 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBI = pB[1]; 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAR = pA[0]; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twR = *pCoeff++ ; 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++ ; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // U1 = XA(1) + XB(1); % It is real 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1a = xBR + xAR ; 27196 .loc 37 59 0 27197 0004 D1E90067 ldrd r6, [r1] 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27198 .loc 37 46 0 27199 0008 B0F800C0 ldrh ip, [r0] 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pA = p; /* increasing pointer */ 27200 .loc 37 38 0 27201 000c D0F814A0 ldr r10, [r0, #20] 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 27202 .loc 37 35 0 ARM GAS /tmp/ccfbYRip.s page 860 27203 0010 8DB0 sub sp, sp, #52 27204 .LCFI329: 27205 .cfi_def_cfa_offset 88 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 27206 .loc 37 35 0 27207 0012 0C46 mov r4, r1 27208 .LVL2957: 27209 0014 1546 mov r5, r2 27210 .loc 37 59 0 27211 0016 3B46 mov r3, r7 27212 0018 3246 mov r2, r6 27213 .LVL2958: 27214 001a 3046 mov r0, r6 27215 .LVL2959: 27216 001c 3946 mov r1, r7 27217 .LVL2960: 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27218 .loc 37 46 0 27219 001e 0CF1FF36 add r6, ip, #-1 27220 0022 0B96 str r6, [sp, #44] 27221 .LVL2961: 27222 .loc 37 59 0 27223 0024 FFF7FEFF bl __aeabi_dadd 27224 .LVL2962: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // U2 = XB(1) - XA(1); % It is imaginary 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1b = xBI + xAI ; 27225 .loc 37 62 0 27226 0028 D4E90223 ldrd r2, [r4, #8] 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27227 .loc 37 59 0 27228 002c 0646 mov r6, r0 27229 002e 0F46 mov r7, r1 27230 .LVL2963: 27231 .loc 37 62 0 27232 0030 1046 mov r0, r2 27233 0032 1946 mov r1, r3 27234 0034 FFF7FEFF bl __aeabi_dadd 27235 .LVL2964: 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( t1a + t1b ); 27236 .loc 37 66 0 27237 0038 0246 mov r2, r0 27238 003a 0B46 mov r3, r1 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27239 .loc 37 62 0 27240 003c 8046 mov r8, r0 27241 003e 8946 mov r9, r1 27242 .LVL2965: 27243 .loc 37 66 0 27244 0040 3046 mov r0, r6 27245 0042 3946 mov r1, r7 27246 0044 FFF7FEFF bl __aeabi_dadd 27247 .LVL2966: 27248 0048 0022 movs r2, #0 ARM GAS /tmp/ccfbYRip.s page 861 27249 004a 4F4B ldr r3, .L1345 27250 004c FFF7FEFF bl __aeabi_dmul 27251 .LVL2967: 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( t1a - t1b ); 27252 .loc 37 67 0 27253 0050 4246 mov r2, r8 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( t1a - t1b ); 27254 .loc 37 66 0 27255 0052 C5E90001 strd r0, [r5] 27256 .LVL2968: 27257 .loc 37 67 0 27258 0056 4B46 mov r3, r9 27259 0058 3046 mov r0, r6 27260 005a 3946 mov r1, r7 27261 005c FFF7FEFF bl __aeabi_dsub 27262 .LVL2969: 27263 0060 0022 movs r2, #0 27264 0062 494B ldr r3, .L1345 27265 0064 FFF7FEFF bl __aeabi_dmul 27266 .LVL2970: 27267 0068 0B9E ldr r6, [sp, #44] 27268 .LVL2971: 27269 006a 05F12002 add r2, r5, #32 27270 006e 04EB0613 add r3, r4, r6, lsl #4 27271 0072 C5E90201 strd r0, [r5, #8] 27272 .LVL2972: 27273 0076 0AF1200A add r10, r10, #32 27274 .LVL2973: 27275 007a 04F12005 add r5, r4, #32 27276 .LVL2974: 27277 007e A3F1100B sub fp, r3, #16 27278 0082 1446 mov r4, r2 27279 .LVL2975: 27280 .L1342: 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pB = p + 2*k; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pA += 2; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** do 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** function X = my_split_rfft(X, ifftFlag) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** % X is a series of real numbers 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** L = length(X); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** XC = X(1:2:end) +i*X(2:2:end); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** XA = fft(XC); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** XB = conj(XA([1 end:-1:2])); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** for l = 2:L/2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** end 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA( 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** X = XA; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBI = pB[1]; ARM GAS /tmp/ccfbYRip.s page 862 27281 .loc 37 90 0 discriminator 1 27282 0084 9BED067B vldr.64 d7, [fp, #24] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0]; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAR = pA[0]; 27283 .loc 37 92 0 discriminator 1 27284 0088 55E90467 ldrd r6, [r5, #-16] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0]; 27285 .loc 37 91 0 discriminator 1 27286 008c DBE90489 ldrd r8, [fp, #16] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0]; 27287 .loc 37 90 0 discriminator 1 27288 0090 8DED007B vstr.64 d7, [sp] 27289 .LVL2976: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27290 .loc 37 93 0 discriminator 1 27291 0094 15ED027B vldr.64 d7, [r5, #-8] 27292 .LVL2977: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twR = *pCoeff++; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1a = xBR - xAR ; 27293 .loc 37 98 0 discriminator 1 27294 0098 3246 mov r2, r6 27295 009a 3B46 mov r3, r7 27296 009c 4046 mov r0, r8 27297 009e 4946 mov r1, r9 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27298 .loc 37 93 0 discriminator 1 27299 00a0 8DED027B vstr.64 d7, [sp, #8] 27300 .LVL2978: 27301 .loc 37 98 0 discriminator 1 27302 00a4 FFF7FEFF bl __aeabi_dsub 27303 .LVL2979: 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1b = xBI + xAI ; 27304 .loc 37 99 0 discriminator 1 27305 00a8 DDE90223 ldrd r2, [sp, #8] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1b = xBI + xAI ; 27306 .loc 37 98 0 discriminator 1 27307 00ac CDE90601 strd r0, [sp, #24] 27308 .loc 37 99 0 discriminator 1 27309 00b0 DDE90001 ldrd r0, [sp] 27310 00b4 FFF7FEFF bl __aeabi_dadd 27311 .LVL2980: 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 27312 .loc 37 95 0 discriminator 1 27313 00b8 1AED047B vldr.64 d7, [r10, #-16] 27314 .loc 37 99 0 discriminator 1 27315 00bc CDE90801 strd r0, [sp, #32] 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p0 = twR * t1a; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p1 = twI * t1a; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p2 = twR * t1b; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p3 = twI * t1b; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** ARM GAS /tmp/ccfbYRip.s page 863 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAR + xBR + p0 + p3 ); //xAR 27316 .loc 37 108 0 discriminator 1 27317 00c0 3246 mov r2, r6 27318 00c2 3B46 mov r3, r7 27319 00c4 4046 mov r0, r8 27320 00c6 4946 mov r1, r9 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 27321 .loc 37 95 0 discriminator 1 27322 00c8 8DED047B vstr.64 d7, [sp, #16] 27323 .LVL2981: 27324 .loc 37 108 0 discriminator 1 27325 00cc FFF7FEFF bl __aeabi_dadd 27326 .LVL2982: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p1 = twI * t1a; 27327 .loc 37 103 0 discriminator 1 27328 00d0 DDE90623 ldrd r2, [sp, #24] 27329 .loc 37 108 0 discriminator 1 27330 00d4 0646 mov r6, r0 27331 .LVL2983: 27332 00d6 0F46 mov r7, r1 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p1 = twI * t1a; 27333 .loc 37 103 0 discriminator 1 27334 00d8 DDE90401 ldrd r0, [sp, #16] 27335 00dc FFF7FEFF bl __aeabi_dmul 27336 .LVL2984: 27337 .loc 37 108 0 discriminator 1 27338 00e0 0246 mov r2, r0 27339 00e2 0B46 mov r3, r1 27340 00e4 3046 mov r0, r6 27341 00e6 3946 mov r1, r7 27342 00e8 FFF7FEFF bl __aeabi_dadd 27343 .LVL2985: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27344 .loc 37 96 0 discriminator 1 27345 00ec 5AE90289 ldrd r8, [r10, #-8] 27346 .LVL2986: 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27347 .loc 37 106 0 discriminator 1 27348 00f0 DDE90823 ldrd r2, [sp, #32] 27349 .loc 37 108 0 discriminator 1 27350 00f4 0646 mov r6, r0 27351 00f6 0F46 mov r7, r1 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27352 .loc 37 106 0 discriminator 1 27353 00f8 4046 mov r0, r8 27354 00fa 4946 mov r1, r9 27355 00fc FFF7FEFF bl __aeabi_dmul 27356 .LVL2987: 27357 .loc 37 108 0 discriminator 1 27358 0100 0246 mov r2, r0 27359 0102 0B46 mov r3, r1 27360 0104 3046 mov r0, r6 27361 0106 3946 mov r1, r7 27362 0108 FFF7FEFF bl __aeabi_dadd 27363 .LVL2988: 27364 010c 0022 movs r2, #0 27365 010e 1E4B ldr r3, .L1345 ARM GAS /tmp/ccfbYRip.s page 864 27366 0110 FFF7FEFF bl __aeabi_dmul 27367 .LVL2989: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAI - xBI + p1 - p2 ); //xAI 27368 .loc 37 109 0 discriminator 1 27369 0114 DDE90023 ldrd r2, [sp] 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAI - xBI + p1 - p2 ); //xAI 27370 .loc 37 108 0 discriminator 1 27371 0118 44E90401 strd r0, [r4, #-16] 27372 .LVL2990: 27373 .loc 37 109 0 discriminator 1 27374 011c DDE90201 ldrd r0, [sp, #8] 27375 0120 FFF7FEFF bl __aeabi_dsub 27376 .LVL2991: 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p2 = twR * t1b; 27377 .loc 37 104 0 discriminator 1 27378 0124 DDE90623 ldrd r2, [sp, #24] 27379 .loc 37 109 0 discriminator 1 27380 0128 0646 mov r6, r0 27381 012a 0F46 mov r7, r1 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p2 = twR * t1b; 27382 .loc 37 104 0 discriminator 1 27383 012c 4046 mov r0, r8 27384 012e 4946 mov r1, r9 27385 0130 FFF7FEFF bl __aeabi_dmul 27386 .LVL2992: 27387 .loc 37 109 0 discriminator 1 27388 0134 0246 mov r2, r0 27389 0136 0B46 mov r3, r1 27390 0138 3046 mov r0, r6 27391 013a 3946 mov r1, r7 27392 013c FFF7FEFF bl __aeabi_dadd 27393 .LVL2993: 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p3 = twI * t1b; 27394 .loc 37 105 0 discriminator 1 27395 0140 DDE90823 ldrd r2, [sp, #32] 27396 .loc 37 109 0 discriminator 1 27397 0144 0646 mov r6, r0 27398 0146 0F46 mov r7, r1 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** p3 = twI * t1b; 27399 .loc 37 105 0 discriminator 1 27400 0148 DDE90401 ldrd r0, [sp, #16] 27401 014c FFF7FEFF bl __aeabi_dmul 27402 .LVL2994: 27403 .loc 37 109 0 discriminator 1 27404 0150 0246 mov r2, r0 27405 0152 0B46 mov r3, r1 27406 0154 3046 mov r0, r6 27407 0156 3946 mov r1, r7 27408 0158 FFF7FEFF bl __aeabi_dsub 27409 .LVL2995: 27410 015c 0A4B ldr r3, .L1345 27411 015e 0022 movs r2, #0 27412 0160 FFF7FEFF bl __aeabi_dmul 27413 .LVL2996: 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pA += 2; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pB -= 2; ARM GAS /tmp/ccfbYRip.s page 865 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** k--; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } while (k > 0U); 27414 .loc 37 114 0 discriminator 1 27415 0164 0B9B ldr r3, [sp, #44] 27416 0166 013B subs r3, r3, #1 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27417 .loc 37 109 0 discriminator 1 27418 0168 44E90201 strd r0, [r4, #-8] 27419 .LVL2997: 27420 016c ABF1100B sub fp, fp, #16 27421 0170 05F11005 add r5, r5, #16 27422 .LVL2998: 27423 0174 0AF1100A add r10, r10, #16 27424 0178 04F11004 add r4, r4, #16 27425 .loc 37 114 0 discriminator 1 27426 017c 0B93 str r3, [sp, #44] 27427 017e 81D1 bne .L1342 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 27428 .loc 37 115 0 27429 0180 0DB0 add sp, sp, #52 27430 .LCFI330: 27431 .cfi_def_cfa_offset 36 27432 .LVL2999: 27433 @ sp needed 27434 0182 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27435 .LVL3000: 27436 .L1346: 27437 0186 00BF .align 2 27438 .L1345: 27439 0188 0000E03F .word 1071644672 27440 .cfi_endproc 27441 .LFE207: 27443 .section .text.merge_rfft_f64,"ax",%progbits 27444 .align 1 27445 .p2align 2,,3 27446 .global merge_rfft_f64 27447 .syntax unified 27448 .thumb 27449 .thumb_func 27450 .fpu fpv4-sp-d16 27452 merge_rfft_f64: 27453 .LFB208: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Prepares data for inverse cfft */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** void merge_rfft_f64( 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** const arm_rfft_fast_instance_f64 * S, 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * p, 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * pOut) 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 27454 .loc 37 122 0 27455 .cfi_startproc 27456 @ args = 0, pretend = 0, frame = 48 27457 @ frame_needed = 0, uses_anonymous_args = 0 27458 .LVL3001: 27459 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 27460 .LCFI331: 27461 .cfi_def_cfa_offset 36 ARM GAS /tmp/ccfbYRip.s page 866 27462 .cfi_offset 4, -36 27463 .cfi_offset 5, -32 27464 .cfi_offset 6, -28 27465 .cfi_offset 7, -24 27466 .cfi_offset 8, -20 27467 .cfi_offset 9, -16 27468 .cfi_offset 10, -12 27469 .cfi_offset 11, -8 27470 .cfi_offset 14, -4 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t twR, twI; /* RFFT Twiddle coefficients */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** const float64_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pA = p; /* increasing pointer */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pB = p; /* decreasing pointer */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t xAR, xAI, xBR, xBI; /* temporary variables */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t t1a, t1b, r, s, t, u; /* temporary variables */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** k = (S->Sint).fftLen - 1; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAR = pA[0]; 27471 .loc 37 133 0 27472 0004 91ED007B vldr.64 d7, [r1] 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27473 .loc 37 134 0 27474 0008 D1E90289 ldrd r8, [r1, #8] 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27475 .loc 37 131 0 27476 000c B0F800C0 ldrh ip, [r0] 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t *pA = p; /* increasing pointer */ 27477 .loc 37 125 0 27478 0010 D0F814A0 ldr r10, [r0, #20] 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 27479 .loc 37 122 0 27480 0014 8DB0 sub sp, sp, #52 27481 .LCFI332: 27482 .cfi_def_cfa_offset 88 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27483 .loc 37 131 0 27484 0016 0CF1FF36 add r6, ip, #-1 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 27485 .loc 37 122 0 27486 001a 1546 mov r5, r2 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pCoeff += 2 ; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( xAR + xAI ); 27487 .loc 37 138 0 27488 001c 4B46 mov r3, r9 27489 001e 4246 mov r2, r8 27490 .LVL3002: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint32_t k; /* Loop Counter */ 27491 .loc 37 122 0 27492 0020 0C46 mov r4, r1 27493 .LVL3003: 27494 .loc 37 138 0 27495 0022 51EC170B vmov r0, r1, d7 27496 .LVL3004: ARM GAS /tmp/ccfbYRip.s page 867 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27497 .loc 37 133 0 27498 0026 8DED007B vstr.64 d7, [sp] 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27499 .loc 37 131 0 27500 002a 0B96 str r6, [sp, #44] 27501 .LVL3005: 27502 .loc 37 138 0 27503 002c FFF7FEFF bl __aeabi_dadd 27504 .LVL3006: 27505 0030 0022 movs r2, #0 27506 0032 4E4B ldr r3, .L1355 27507 0034 FFF7FEFF bl __aeabi_dmul 27508 .LVL3007: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( xAR - xAI ); 27509 .loc 37 139 0 27510 0038 4246 mov r2, r8 27511 003a 4B46 mov r3, r9 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * ( xAR - xAI ); 27512 .loc 37 138 0 27513 003c C5E90001 strd r0, [r5] 27514 .LVL3008: 27515 .loc 37 139 0 27516 0040 DDE90001 ldrd r0, [sp] 27517 0044 FFF7FEFF bl __aeabi_dsub 27518 .LVL3009: 27519 0048 0022 movs r2, #0 27520 004a 484B ldr r3, .L1355 27521 004c FFF7FEFF bl __aeabi_dmul 27522 .LVL3010: 27523 0050 C5E90201 strd r0, [r5, #8] 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pB = p + 2*k ; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pA += 2 ; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** while (k > 0U) 27524 .loc 37 144 0 27525 0054 002E cmp r6, #0 27526 0056 00F08680 beq .L1347 27527 005a 3301 lsls r3, r6, #4 27528 .LVL3011: 27529 005c 103B subs r3, r3, #16 27530 .LVL3012: 27531 005e 04EB0309 add r9, r4, r3 27532 0062 0AF12008 add r8, r10, #32 27533 .LVL3013: 27534 0066 2035 adds r5, r5, #32 27535 .LVL3014: 27536 0068 2034 adds r4, r4, #32 27537 .LVL3015: 27538 .L1349: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* G is half of the frequency complex spectrum */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** //for k = 2:N 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBI = pB[1] ; 27539 .loc 37 149 0 ARM GAS /tmp/ccfbYRip.s page 868 27540 006a 99ED067B vldr.64 d7, [r9, #24] 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0] ; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAR = pA[0]; 27541 .loc 37 151 0 27542 006e 54E90467 ldrd r6, [r4, #-16] 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0] ; 27543 .loc 37 150 0 27544 0072 D9E904AB ldrd r10, [r9, #16] 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xBR = pB[0] ; 27545 .loc 37 149 0 27546 0076 8DED007B vstr.64 d7, [sp] 27547 .LVL3016: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27548 .loc 37 152 0 27549 007a 14ED027B vldr.64 d7, [r4, #-8] 27550 .LVL3017: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twR = *pCoeff++; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1a = xAR - xBR ; 27551 .loc 37 157 0 27552 007e 5246 mov r2, r10 27553 0080 5B46 mov r3, fp 27554 0082 3046 mov r0, r6 27555 0084 3946 mov r1, r7 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** xAI = pA[1]; 27556 .loc 37 152 0 27557 0086 8DED027B vstr.64 d7, [sp, #8] 27558 .LVL3018: 27559 .loc 37 157 0 27560 008a FFF7FEFF bl __aeabi_dsub 27561 .LVL3019: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1b = xAI + xBI ; 27562 .loc 37 158 0 27563 008e DDE90223 ldrd r2, [sp, #8] 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t1b = xAI + xBI ; 27564 .loc 37 157 0 27565 0092 CDE90601 strd r0, [sp, #24] 27566 .loc 37 158 0 27567 0096 DDE90001 ldrd r0, [sp] 27568 009a FFF7FEFF bl __aeabi_dadd 27569 .LVL3020: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 27570 .loc 37 154 0 27571 009e 18ED047B vldr.64 d7, [r8, #-16] 27572 .loc 37 158 0 27573 00a2 CDE90801 strd r0, [sp, #32] 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** r = twR * t1a; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** s = twI * t1b; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t = twI * t1a; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** u = twR * t1b; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAR + xBR - r - s ); //xAR ARM GAS /tmp/ccfbYRip.s page 869 27574 .loc 37 167 0 27575 00a6 3246 mov r2, r6 27576 00a8 3B46 mov r3, r7 27577 00aa 5046 mov r0, r10 27578 00ac 5946 mov r1, fp 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** twI = *pCoeff++; 27579 .loc 37 154 0 27580 00ae 8DED047B vstr.64 d7, [sp, #16] 27581 .LVL3021: 27582 .loc 37 167 0 27583 00b2 FFF7FEFF bl __aeabi_dadd 27584 .LVL3022: 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** s = twI * t1b; 27585 .loc 37 160 0 27586 00b6 DDE90623 ldrd r2, [sp, #24] 27587 .loc 37 167 0 27588 00ba 0646 mov r6, r0 27589 .LVL3023: 27590 00bc 0F46 mov r7, r1 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** s = twI * t1b; 27591 .loc 37 160 0 27592 00be DDE90401 ldrd r0, [sp, #16] 27593 00c2 FFF7FEFF bl __aeabi_dmul 27594 .LVL3024: 27595 .loc 37 167 0 27596 00c6 0246 mov r2, r0 27597 00c8 0B46 mov r3, r1 27598 00ca 3046 mov r0, r6 27599 00cc 3946 mov r1, r7 27600 00ce FFF7FEFF bl __aeabi_dsub 27601 .LVL3025: 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27602 .loc 37 155 0 27603 00d2 58E902AB ldrd r10, [r8, #-8] 27604 .LVL3026: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t = twI * t1a; 27605 .loc 37 161 0 27606 00d6 DDE90823 ldrd r2, [sp, #32] 27607 .loc 37 167 0 27608 00da 0646 mov r6, r0 27609 00dc 0F46 mov r7, r1 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** t = twI * t1a; 27610 .loc 37 161 0 27611 00de 5046 mov r0, r10 27612 00e0 5946 mov r1, fp 27613 00e2 FFF7FEFF bl __aeabi_dmul 27614 .LVL3027: 27615 .loc 37 167 0 27616 00e6 0246 mov r2, r0 27617 00e8 0B46 mov r3, r1 27618 00ea 3046 mov r0, r6 27619 00ec 3946 mov r1, r7 27620 00ee FFF7FEFF bl __aeabi_dsub 27621 .LVL3028: 27622 00f2 0022 movs r2, #0 27623 00f4 1D4B ldr r3, .L1355 27624 00f6 FFF7FEFF bl __aeabi_dmul ARM GAS /tmp/ccfbYRip.s page 870 27625 .LVL3029: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAI - xBI + t - u ); //xAI 27626 .loc 37 168 0 27627 00fa DDE90023 ldrd r2, [sp] 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** *pOut++ = 0.5 * (xAI - xBI + t - u ); //xAI 27628 .loc 37 167 0 27629 00fe 45E90401 strd r0, [r5, #-16] 27630 .LVL3030: 27631 .loc 37 168 0 27632 0102 DDE90201 ldrd r0, [sp, #8] 27633 0106 FFF7FEFF bl __aeabi_dsub 27634 .LVL3031: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** u = twR * t1b; 27635 .loc 37 162 0 27636 010a DDE90623 ldrd r2, [sp, #24] 27637 .loc 37 168 0 27638 010e 0646 mov r6, r0 27639 0110 0F46 mov r7, r1 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** u = twR * t1b; 27640 .loc 37 162 0 27641 0112 5046 mov r0, r10 27642 0114 5946 mov r1, fp 27643 0116 FFF7FEFF bl __aeabi_dmul 27644 .LVL3032: 27645 .loc 37 168 0 27646 011a 0246 mov r2, r0 27647 011c 0B46 mov r3, r1 27648 011e 3046 mov r0, r6 27649 0120 3946 mov r1, r7 27650 0122 FFF7FEFF bl __aeabi_dadd 27651 .LVL3033: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27652 .loc 37 163 0 27653 0126 DDE90823 ldrd r2, [sp, #32] 27654 .loc 37 168 0 27655 012a 0646 mov r6, r0 27656 012c 0F46 mov r7, r1 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27657 .loc 37 163 0 27658 012e DDE90401 ldrd r0, [sp, #16] 27659 0132 FFF7FEFF bl __aeabi_dmul 27660 .LVL3034: 27661 .loc 37 168 0 27662 0136 0246 mov r2, r0 27663 0138 0B46 mov r3, r1 27664 013a 3046 mov r0, r6 27665 013c 3946 mov r1, r7 27666 013e FFF7FEFF bl __aeabi_dsub 27667 .LVL3035: 27668 0142 0A4B ldr r3, .L1355 27669 0144 0022 movs r2, #0 27670 0146 FFF7FEFF bl __aeabi_dmul 27671 .LVL3036: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 27672 .loc 37 144 0 27673 014a 0B9B ldr r3, [sp, #44] 27674 014c 013B subs r3, r3, #1 ARM GAS /tmp/ccfbYRip.s page 871 27675 .loc 37 168 0 27676 014e 45E90201 strd r0, [r5, #-8] 27677 .LVL3037: 27678 0152 A9F11009 sub r9, r9, #16 27679 0156 04F11004 add r4, r4, #16 27680 .LVL3038: 27681 015a 08F11008 add r8, r8, #16 27682 015e 05F11005 add r5, r5, #16 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 27683 .loc 37 144 0 27684 0162 0B93 str r3, [sp, #44] 27685 0164 81D1 bne .L1349 27686 .LVL3039: 27687 .L1347: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pA += 2; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** pB -= 2; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** k--; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 27688 .loc 37 175 0 27689 0166 0DB0 add sp, sp, #52 27690 .LCFI333: 27691 .cfi_def_cfa_offset 36 27692 @ sp needed 27693 0168 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 27694 .LVL3040: 27695 .L1356: 27696 .align 2 27697 .L1355: 27698 016c 0000E03F .word 1071644672 27699 .cfi_endproc 27700 .LFE208: 27702 .section .text.arm_rfft_fast_f64,"ax",%progbits 27703 .align 1 27704 .p2align 2,,3 27705 .global arm_rfft_fast_f64 27706 .syntax unified 27707 .thumb 27708 .thumb_func 27709 .fpu fpv4-sp-d16 27711 arm_rfft_fast_f64: 27712 .LFB209: 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @ingroup groupTransforms 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @addtogroup RealFFT 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @{ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @brief Processing function for the Double Precision floating-point real FFT. ARM GAS /tmp/ccfbYRip.s page 872 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @param[in] S points to an arm_rfft_fast_instance_f64 structure 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @param[in] p points to input buffer (Source buffer is modified by this function.) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @param[in] pOut points to output buffer 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @param[in] ifftFlag 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** - value = 0: RFFT 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** - value = 1: RIFFT 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** @return none 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** void arm_rfft_fast_f64( 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_rfft_fast_instance_f64 * S, 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * p, 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** float64_t * pOut, 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** uint8_t ifftFlag) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 27713 .loc 37 203 0 27714 .cfi_startproc 27715 @ args = 0, pretend = 0, frame = 0 27716 @ frame_needed = 0, uses_anonymous_args = 0 27717 .LVL3041: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_instance_f64 * Sint = &(S->Sint); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** Sint->fftLen = S->fftLenRFFT / 2; 27718 .loc 37 205 0 27719 0000 B0F810C0 ldrh ip, [r0, #16] 27720 0004 4FEA5C0C lsr ip, ip, #1 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_instance_f64 * Sint = &(S->Sint); 27721 .loc 37 203 0 27722 0008 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 27723 .LCFI334: 27724 .cfi_def_cfa_offset 32 27725 .cfi_offset 4, -32 27726 .cfi_offset 5, -28 27727 .cfi_offset 6, -24 27728 .cfi_offset 7, -20 27729 .cfi_offset 8, -16 27730 .cfi_offset 9, -12 27731 .cfi_offset 10, -8 27732 .cfi_offset 14, -4 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_instance_f64 * Sint = &(S->Sint); 27733 .loc 37 203 0 27734 000c 0646 mov r6, r0 27735 .LVL3042: 27736 .loc 37 205 0 27737 000e A0F800C0 strh ip, [r0] @ movhi 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_instance_f64 * Sint = &(S->Sint); 27738 .loc 37 203 0 27739 0012 1446 mov r4, r2 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Calculation of Real FFT */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** if (ifftFlag) 27740 .loc 37 208 0 27741 0014 002B cmp r3, #0 27742 0016 63D1 bne .L1451 27743 .LBB2858: 27744 .LBB2859: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27745 .loc 9 280 0 ARM GAS /tmp/ccfbYRip.s page 873 27746 0018 BCF5807F cmp ip, #256 27747 001c 0D46 mov r5, r1 27748 .LVL3043: 27749 001e 58D0 beq .L1375 27750 0020 4DD8 bhi .L1376 27751 0022 BCF1200F cmp ip, #32 27752 0026 00F0C680 beq .L1377 27753 002a 40F2CA80 bls .L1452 27754 002e BCF1400F cmp ip, #64 27755 0032 4ED0 beq .L1375 27756 0034 BCF1800F cmp ip, #128 27757 0038 00F0BD80 beq .L1377 27758 .LVL3044: 27759 .L1374: 27760 .LBB2860: 27761 .LBB2861: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27762 .loc 8 48 0 27763 003c B089 ldrh r0, [r6, #12] 27764 .LBE2861: 27765 .LBE2860: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 27766 .loc 9 300 0 27767 003e B768 ldr r7, [r6, #8] 27768 .LVL3045: 27769 .LBB2863: 27770 .LBB2862: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27771 .loc 8 48 0 27772 0040 0021 movs r1, #0 27773 0042 50EA0103 orrs r3, r0, r1 27774 0046 33D0 beq .L1380 27775 0048 10F1FF32 adds r2, r0, #-1 27776 004c 41F1FF33 adc r3, r1, #-1 27777 0050 5B08 movs r3, r3, lsr #1 27778 0052 4FEA3202 mov r2, r2, rrx 27779 0056 07F1040C add ip, r7, #4 27780 005a 0CEB820C add ip, ip, r2, lsl #2 27781 .LVL3046: 27782 .L1381: 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 27783 .loc 8 50 0 27784 005e B7F80080 ldrh r8, [r7] 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 27785 .loc 8 51 0 27786 0062 B7F802E0 ldrh lr, [r7, #2] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27787 .loc 8 54 0 27788 0066 4FEA9808 lsr r8, r8, #2 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27789 .loc 8 55 0 27790 006a 4FEA9E0E lsr lr, lr, #2 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27791 .loc 8 54 0 27792 006e 4FEAC808 lsl r8, r8, #3 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27793 .loc 8 55 0 ARM GAS /tmp/ccfbYRip.s page 874 27794 0072 4FEACE0E lsl lr, lr, #3 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27795 .loc 8 54 0 27796 0076 05EB080A add r10, r5, r8 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27797 .loc 8 55 0 27798 007a 05EB0E09 add r9, r5, lr 27799 007e D9E90023 ldrd r2, [r9] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27800 .loc 8 54 0 27801 0082 DAE90001 ldrd r0, [r10] 27802 .LVL3047: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27803 .loc 8 55 0 27804 0086 CAE90023 strd r2, [r10] 27805 .LVL3048: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 27806 .loc 8 56 0 27807 008a C9E90001 strd r0, [r9] 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27808 .loc 8 59 0 27809 008e 08F10802 add r2, r8, #8 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27810 .loc 8 60 0 27811 0092 0EF10803 add r3, lr, #8 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27812 .loc 8 59 0 27813 0096 2A44 add r2, r2, r5 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27814 .loc 8 60 0 27815 0098 2B44 add r3, r3, r5 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27816 .loc 8 59 0 27817 009a D2E90089 ldrd r8, [r2] 27818 .LVL3049: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27819 .loc 8 60 0 27820 009e D3E90001 ldrd r0, [r3] 27821 00a2 0437 adds r7, r7, #4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27822 .loc 8 48 0 27823 00a4 BC45 cmp ip, r7 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27824 .loc 8 60 0 27825 00a6 C2E90001 strd r0, [r2] 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 27826 .loc 8 61 0 27827 00aa C3E90089 strd r8, [r3] 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27828 .loc 8 48 0 27829 00ae D6D1 bne .L1381 27830 .LVL3050: 27831 .L1380: 27832 .LBE2862: 27833 .LBE2863: 27834 .LBE2859: 27835 .LBE2858: ARM GAS /tmp/ccfbYRip.s page 875 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Real FFT compression */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** merge_rfft_f64(S, p, pOut); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Complex radix-4 IFFT process */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_f64( Sint, pOut, ifftFlag, 1); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** else 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** { 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Calculation of RFFT of input */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** arm_cfft_f64( Sint, p, ifftFlag, 1); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** /* Real FFT extraction */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** stage_rfft_f64(S, p, pOut); 27836 .loc 37 222 0 27837 00b0 2246 mov r2, r4 27838 00b2 2946 mov r1, r5 27839 00b4 3046 mov r0, r6 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 27840 .loc 37 224 0 27841 00b6 BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 27842 .LCFI335: 27843 .cfi_remember_state 27844 .cfi_restore 14 27845 .cfi_restore 10 27846 .cfi_restore 9 27847 .cfi_restore 8 27848 .cfi_restore 7 27849 .cfi_restore 6 27850 .cfi_restore 5 27851 .cfi_restore 4 27852 .cfi_def_cfa_offset 0 27853 .LVL3051: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** } 27854 .loc 37 222 0 27855 00ba FFF7FEBF b stage_rfft_f64 27856 .LVL3052: 27857 .L1376: 27858 .LCFI336: 27859 .cfi_restore_state 27860 .LBB2866: 27861 .LBB2864: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27862 .loc 9 280 0 27863 00be BCF5806F cmp ip, #1024 27864 00c2 06D0 beq .L1375 27865 00c4 73D9 bls .L1453 27866 00c6 BCF5006F cmp ip, #2048 27867 00ca 74D0 beq .L1377 27868 00cc BCF5805F cmp ip, #4096 27869 00d0 B4D1 bne .L1374 27870 .L1375: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 27871 .loc 9 287 0 27872 00d2 6146 mov r1, ip 27873 .LVL3053: ARM GAS /tmp/ccfbYRip.s page 876 27874 00d4 0123 movs r3, #1 27875 .LVL3054: 27876 00d6 7268 ldr r2, [r6, #4] 27877 .LVL3055: 27878 00d8 2846 mov r0, r5 27879 .LVL3056: 27880 00da FFF7FEFF bl arm_radix4_butterfly_f64 27881 .LVL3057: 27882 00de ADE7 b .L1374 27883 .LVL3058: 27884 .L1451: 27885 00e0 1F46 mov r7, r3 27886 .LBE2864: 27887 .LBE2866: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c **** 27888 .loc 37 211 0 27889 00e2 FFF7FEFF bl merge_rfft_f64 27890 .LVL3059: 27891 .LBB2867: 27892 .LBB2868: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27893 .loc 9 269 0 27894 00e6 012F cmp r7, #1 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** float64_t invL, * pSrc; 27895 .loc 9 266 0 27896 00e8 3588 ldrh r5, [r6] 27897 .LVL3060: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27898 .loc 9 269 0 27899 00ea 00F09980 beq .L1454 27900 .L1359: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27901 .loc 9 280 0 27902 00ee B5F5807F cmp r5, #256 27903 00f2 55D0 beq .L1363 27904 00f4 4AD8 bhi .L1364 27905 00f6 202D cmp r5, #32 27906 00f8 05D0 beq .L1365 27907 00fa 40F2A680 bls .L1455 27908 00fe 402D cmp r5, #64 27909 0100 4ED0 beq .L1363 27910 0102 802D cmp r5, #128 27911 0104 04D1 bne .L1362 27912 .L1365: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 27913 .loc 9 294 0 27914 0106 7268 ldr r2, [r6, #4] 27915 0108 2946 mov r1, r5 27916 010a 2046 mov r0, r4 27917 010c FFF7FEFF bl arm_cfft_radix4by2_f64 27918 .LVL3061: 27919 .L1362: 27920 .LBB2869: 27921 .LBB2870: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27922 .loc 8 48 0 27923 0110 B089 ldrh r0, [r6, #12] ARM GAS /tmp/ccfbYRip.s page 877 27924 .LBE2870: 27925 .LBE2869: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 27926 .loc 9 300 0 27927 0112 B668 ldr r6, [r6, #8] 27928 .LVL3062: 27929 .LBB2874: 27930 .LBB2871: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27931 .loc 8 48 0 27932 0114 0021 movs r1, #0 27933 .LVL3063: 27934 0116 50EA0103 orrs r3, r0, r1 27935 011a 33D0 beq .L1368 27936 .L1382: 27937 011c 10F1FF32 adds r2, r0, #-1 27938 0120 41F1FF33 adc r3, r1, #-1 27939 0124 5B08 movs r3, r3, lsr #1 27940 0126 4FEA3202 mov r2, r2, rrx 27941 012a 06F1040C add ip, r6, #4 27942 012e 0CEB820C add ip, ip, r2, lsl #2 27943 .LVL3064: 27944 .L1369: 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 27945 .loc 8 50 0 27946 0132 B6F80080 ldrh r8, [r6] 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 27947 .loc 8 51 0 27948 0136 B6F802E0 ldrh lr, [r6, #2] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27949 .loc 8 54 0 27950 013a 4FEA9808 lsr r8, r8, #2 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27951 .loc 8 55 0 27952 013e 4FEA9E0E lsr lr, lr, #2 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27953 .loc 8 54 0 27954 0142 4FEAC808 lsl r8, r8, #3 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27955 .loc 8 55 0 27956 0146 4FEACE0E lsl lr, lr, #3 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27957 .loc 8 54 0 27958 014a 04EB080A add r10, r4, r8 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27959 .loc 8 55 0 27960 014e 04EB0E09 add r9, r4, lr 27961 0152 D9E90023 ldrd r2, [r9] 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 27962 .loc 8 54 0 27963 0156 DAE90001 ldrd r0, [r10] 27964 .LVL3065: 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 27965 .loc 8 55 0 27966 015a CAE90023 strd r2, [r10] 27967 .LVL3066: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** ARM GAS /tmp/ccfbYRip.s page 878 27968 .loc 8 56 0 27969 015e C9E90001 strd r0, [r9] 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27970 .loc 8 59 0 27971 0162 08F10802 add r2, r8, #8 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27972 .loc 8 60 0 27973 0166 0EF10803 add r3, lr, #8 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27974 .loc 8 59 0 27975 016a 2244 add r2, r2, r4 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27976 .loc 8 60 0 27977 016c 2344 add r3, r3, r4 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 27978 .loc 8 59 0 27979 016e D2E90089 ldrd r8, [r2] 27980 .LVL3067: 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27981 .loc 8 60 0 27982 0172 D3E90001 ldrd r0, [r3] 27983 0176 0436 adds r6, r6, #4 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27984 .loc 8 48 0 27985 0178 B445 cmp ip, r6 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 27986 .loc 8 60 0 27987 017a C2E90001 strd r0, [r2] 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 27988 .loc 8 61 0 27989 017e C3E90089 strd r8, [r3] 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 27990 .loc 8 48 0 27991 0182 D6D1 bne .L1369 27992 .LVL3068: 27993 .L1368: 27994 .LBE2871: 27995 .LBE2874: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 27996 .loc 9 302 0 27997 0184 012F cmp r7, #1 27998 0186 21D0 beq .L1456 27999 .LVL3069: 28000 .L1357: 28001 .LBE2868: 28002 .LBE2867: 28003 .loc 37 224 0 28004 0188 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 28005 .LVL3070: 28006 .L1364: 28007 .LBB2880: 28008 .LBB2877: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28009 .loc 9 280 0 28010 018c B5F5806F cmp r5, #1024 28011 0190 06D0 beq .L1363 28012 0192 55D9 bls .L1457 ARM GAS /tmp/ccfbYRip.s page 879 28013 0194 B5F5006F cmp r5, #2048 28014 0198 B5D0 beq .L1365 28015 019a B5F5805F cmp r5, #4096 28016 019e B7D1 bne .L1362 28017 .L1363: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 28018 .loc 9 287 0 28019 01a0 0123 movs r3, #1 28020 01a2 7268 ldr r2, [r6, #4] 28021 01a4 2946 mov r1, r5 28022 01a6 2046 mov r0, r4 28023 01a8 FFF7FEFF bl arm_radix4_butterfly_f64 28024 .LVL3071: 28025 01ac B0E7 b .L1362 28026 .LVL3072: 28027 .L1453: 28028 .LBE2877: 28029 .LBE2880: 28030 .LBB2881: 28031 .LBB2865: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28032 .loc 9 280 0 28033 01ae BCF5007F cmp ip, #512 28034 01b2 7FF443AF bne .L1374 28035 .L1377: 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** break; 28036 .loc 9 294 0 28037 01b6 6146 mov r1, ip 28038 .LVL3073: 28039 01b8 7268 ldr r2, [r6, #4] 28040 .LVL3074: 28041 01ba 2846 mov r0, r5 28042 .LVL3075: 28043 01bc FFF7FEFF bl arm_cfft_radix4by2_f64 28044 .LVL3076: 28045 01c0 3CE7 b .L1374 28046 .LVL3077: 28047 .L1452: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28048 .loc 9 280 0 28049 01c2 BCF1100F cmp ip, #16 28050 01c6 7FF439AF bne .L1374 28051 01ca 82E7 b .L1375 28052 .LVL3078: 28053 .L1456: 28054 .LBE2865: 28055 .LBE2881: 28056 .LBB2882: 28057 .LBB2878: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** /* Conjugate and scale output data */ 28058 .loc 9 304 0 28059 01cc 2846 mov r0, r5 28060 01ce FFF7FEFF bl __aeabi_ui2d 28061 .LVL3079: 28062 01d2 0246 mov r2, r0 28063 01d4 0B46 mov r3, r1 28064 01d6 0020 movs r0, #0 ARM GAS /tmp/ccfbYRip.s page 880 28065 01d8 2249 ldr r1, .L1458 28066 01da FFF7FEFF bl __aeabi_ddiv 28067 .LVL3080: 28068 01de 0646 mov r6, r0 28069 01e0 0F46 mov r7, r1 28070 .LVL3081: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28071 .loc 9 307 0 28072 01e2 002D cmp r5, #0 28073 01e4 D0D0 beq .L1357 28074 01e6 1034 adds r4, r4, #16 28075 .LVL3082: 28076 01e8 4FF00008 mov r8, #0 28077 .LVL3083: 28078 .L1373: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** *pSrc = -(*pSrc) * invL; 28079 .loc 9 309 0 28080 01ec 54E90401 ldrd r0, [r4, #-16] 28081 01f0 3246 mov r2, r6 28082 01f2 3B46 mov r3, r7 28083 01f4 FFF7FEFF bl __aeabi_dmul 28084 .LVL3084: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 28085 .loc 9 310 0 28086 01f8 54E90223 ldrd r2, [r4, #-8] 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** *pSrc = -(*pSrc) * invL; 28087 .loc 9 309 0 28088 01fc 44E90401 strd r0, [r4, #-16] 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 28089 .loc 9 310 0 28090 0200 3046 mov r0, r6 28091 0202 3946 mov r1, r7 28092 0204 FFF7FEFF bl __aeabi_dmul 28093 .LVL3085: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28094 .loc 9 307 0 28095 0208 08F10108 add r8, r8, #1 28096 .LVL3086: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 28097 .loc 9 310 0 28098 020c 01F10043 add r3, r1, #-2147483648 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28099 .loc 9 307 0 28100 0210 4545 cmp r5, r8 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc++; 28101 .loc 9 310 0 28102 0212 44E90203 strd r0, r3, [r4, #-8] 28103 .LVL3087: 28104 0216 04F11004 add r4, r4, #16 28105 .LVL3088: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28106 .loc 9 307 0 28107 021a E7D1 bne .L1373 28108 .LBE2878: 28109 .LBE2882: 28110 .loc 37 224 0 28111 021c BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} ARM GAS /tmp/ccfbYRip.s page 881 28112 .LVL3089: 28113 .L1454: 28114 .LBB2883: 28115 .LBB2879: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28116 .loc 9 273 0 28117 0220 BDB1 cbz r5, .L1360 28118 0222 04F11803 add r3, r4, #24 28119 0226 0021 movs r1, #0 28120 .LVL3090: 28121 .L1361: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 28122 .loc 9 275 0 28123 0228 53F80C2C ldr r2, [r3, #-12] 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28124 .loc 9 273 0 28125 022c 0131 adds r1, r1, #1 28126 .LVL3091: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 28127 .loc 9 275 0 28128 022e 02F10042 add r2, r2, #-2147483648 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28129 .loc 9 273 0 28130 0232 8D42 cmp r5, r1 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** pSrc += 2; 28131 .loc 9 275 0 28132 0234 43F80C2C str r2, [r3, #-12] 28133 .LVL3092: 28134 0238 03F11003 add r3, r3, #16 28135 .LVL3093: 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28136 .loc 9 273 0 28137 023c F4D1 bne .L1361 28138 023e 56E7 b .L1359 28139 .LVL3094: 28140 .L1457: 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** { 28141 .loc 9 280 0 28142 0240 B5F5007F cmp r5, #512 28143 0244 3FF45FAF beq .L1365 28144 0248 62E7 b .L1362 28145 .L1455: 28146 024a 102D cmp r5, #16 28147 024c 7FF460AF bne .L1362 28148 0250 A6E7 b .L1363 28149 .LVL3095: 28150 .L1360: 28151 .LBB2875: 28152 .LBB2872: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 28153 .loc 8 48 0 28154 0252 B089 ldrh r0, [r6, #12] 28155 .LBE2872: 28156 .LBE2875: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c **** 28157 .loc 9 300 0 28158 0254 B668 ldr r6, [r6, #8] ARM GAS /tmp/ccfbYRip.s page 882 28159 .LVL3096: 28160 .LBB2876: 28161 .LBB2873: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 28162 .loc 8 48 0 28163 0256 0021 movs r1, #0 28164 .LVL3097: 28165 0258 50EA0103 orrs r3, r0, r1 28166 025c 7FF45EAF bne .L1382 28167 0260 92E7 b .L1357 28168 .L1459: 28169 0262 00BF .align 2 28170 .L1458: 28171 0264 0000F03F .word 1072693248 28172 .LBE2873: 28173 .LBE2876: 28174 .LBE2879: 28175 .LBE2883: 28176 .cfi_endproc 28177 .LFE209: 28179 .section .text.arm_rfft_fast_init_f32,"ax",%progbits 28180 .align 1 28181 .p2align 2,,3 28182 .global arm_rfft_fast_init_f32 28183 .syntax unified 28184 .thumb 28185 .thumb_func 28186 .fpu fpv4-sp-d16 28188 arm_rfft_fast_init_f32: 28189 .LFB218: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** /** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @brief Initialization function for the floating-point real FFT. 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in,out] S points to an arm_rfft_fast_instance_f32 structure 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @param[in] fftLen length of the Real Sequence 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @return execution status 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_SUCCESS : Operation successful 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @par Description 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** The parameter fftLen specifies the length of RFFT/CIFFT process. 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** @par 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_status arm_rfft_fast_init_f32( 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** arm_rfft_fast_instance_f32 * S, 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** uint16_t fftLen) 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 28190 .loc 1 295 0 28191 .cfi_startproc 28192 @ args = 0, pretend = 0, frame = 0 28193 @ frame_needed = 0, uses_anonymous_args = 0 28194 @ link register save eliminated. 28195 .LVL3098: ARM GAS /tmp/ccfbYRip.s page 883 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *); 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fft_init_ptr fptr = 0x0; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** switch (fftLen) 28196 .loc 1 299 0 28197 0000 B1F5807F cmp r1, #256 28198 0004 24D0 beq .L1462 28199 0006 0BD9 bls .L1473 28200 0008 B1F5806F cmp r1, #1024 28201 000c 1ED0 beq .L1467 28202 000e 14D9 bls .L1474 28203 0010 B1F5006F cmp r1, #2048 28204 0014 0FD0 beq .L1470 28205 0016 B1F5805F cmp r1, #4096 28206 001a 07D1 bne .L1461 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 4096U: 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_4096_fast_init_f32; 28207 .loc 1 303 0 28208 001c 0D4B ldr r3, .L1476 28209 .LVL3099: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 2048U: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_2048_fast_init_f32; 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 1024U: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_1024_fast_init_f32; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 512U: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_512_fast_init_f32; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 256U: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_256_fast_init_f32; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 128U: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_128_fast_init_f32; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 64U: 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_64_fast_init_f32; 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** case 32U: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** fptr = arm_rfft_32_fast_init_f32; ARM GAS /tmp/ccfbYRip.s page 884 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** #endif 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** default: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return ARM_MATH_ARGUMENT_ERROR; 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** return fptr( S ); 28210 .loc 1 346 0 28211 001e 1847 bx r3 28212 .LVL3100: 28213 .L1473: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 28214 .loc 1 299 0 28215 0020 4029 cmp r1, #64 28216 0022 0FD0 beq .L1464 28217 0024 8029 cmp r1, #128 28218 0026 04D0 beq .L1465 28219 0028 2029 cmp r1, #32 28220 002a 0DD0 beq .L1475 28221 .L1461: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** } 28222 .loc 1 348 0 28223 002c 4FF0FF30 mov r0, #-1 28224 .LVL3101: 28225 0030 7047 bx lr 28226 .LVL3102: 28227 .L1465: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28228 .loc 1 328 0 28229 0032 094B ldr r3, .L1476+4 28230 .LVL3103: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28231 .loc 1 346 0 28232 0034 1847 bx r3 28233 .LVL3104: 28234 .L1470: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28235 .loc 1 308 0 28236 0036 094B ldr r3, .L1476+8 28237 .LVL3105: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28238 .loc 1 346 0 28239 0038 1847 bx r3 28240 .LVL3106: 28241 .L1474: 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** { 28242 .loc 1 299 0 28243 003a B1F5007F cmp r1, #512 28244 003e F5D1 bne .L1461 28245 .LVL3107: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28246 .loc 1 318 0 28247 0040 074B ldr r3, .L1476+12 28248 .LVL3108: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 885 28249 .loc 1 346 0 28250 0042 1847 bx r3 28251 .LVL3109: 28252 .L1464: 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28253 .loc 1 333 0 28254 0044 074B ldr r3, .L1476+16 28255 .LVL3110: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28256 .loc 1 346 0 28257 0046 1847 bx r3 28258 .LVL3111: 28259 .L1475: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28260 .loc 1 338 0 28261 0048 074B ldr r3, .L1476+20 28262 .LVL3112: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28263 .loc 1 346 0 28264 004a 1847 bx r3 28265 .LVL3113: 28266 .L1467: 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28267 .loc 1 313 0 28268 004c 074B ldr r3, .L1476+24 28269 .LVL3114: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28270 .loc 1 346 0 28271 004e 1847 bx r3 28272 .LVL3115: 28273 .L1462: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** break; 28274 .loc 1 323 0 28275 0050 074B ldr r3, .L1476+28 28276 .LVL3116: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c **** 28277 .loc 1 346 0 28278 0052 1847 bx r3 28279 .LVL3117: 28280 .L1477: 28281 .align 2 28282 .L1476: 28283 0054 00000000 .word arm_rfft_4096_fast_init_f32 28284 0058 00000000 .word arm_rfft_128_fast_init_f32 28285 005c 00000000 .word arm_rfft_2048_fast_init_f32 28286 0060 00000000 .word arm_rfft_512_fast_init_f32 28287 0064 00000000 .word arm_rfft_64_fast_init_f32 28288 0068 00000000 .word arm_rfft_32_fast_init_f32 28289 006c 00000000 .word arm_rfft_1024_fast_init_f32 28290 0070 00000000 .word arm_rfft_256_fast_init_f32 28291 .cfi_endproc 28292 .LFE218: 28294 .section .text.arm_rfft_fast_init_f64,"ax",%progbits 28295 .align 1 28296 .p2align 2,,3 28297 .global arm_rfft_fast_init_f64 28298 .syntax unified ARM GAS /tmp/ccfbYRip.s page 886 28299 .thumb 28300 .thumb_func 28301 .fpu fpv4-sp-d16 28303 arm_rfft_fast_init_f64: 28304 .LFB227: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** /** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @brief Initialization function for the Double Precision floating-point real FFT. 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in,out] S points to an arm_rfft_fast_instance_f64 structure 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @param[in] fftLen length of the Real Sequence 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @return execution status 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_SUCCESS : Operation successful 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @par Description 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** The parameter fftLen specifies the length of RFFT/CIFFT process. 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** @par 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** This Function also initializes Twiddle factor table pointer and Bit reversal tab 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_status arm_rfft_fast_init_f64( 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** arm_rfft_fast_instance_f64 * S, 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** uint16_t fftLen) 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** { 28305 .loc 3 287 0 28306 .cfi_startproc 28307 @ args = 0, pretend = 0, frame = 0 28308 @ frame_needed = 0, uses_anonymous_args = 0 28309 @ link register save eliminated. 28310 .LVL3118: 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f64 *); 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fft_init_ptr fptr = 0x0; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** switch (fftLen) 28311 .loc 3 291 0 28312 0000 B1F5807F cmp r1, #256 28313 0004 24D0 beq .L1480 28314 0006 0BD9 bls .L1491 28315 0008 B1F5806F cmp r1, #1024 28316 000c 1ED0 beq .L1485 28317 000e 14D9 bls .L1492 28318 0010 B1F5006F cmp r1, #2048 28319 0014 0FD0 beq .L1488 28320 0016 B1F5805F cmp r1, #4096 28321 001a 07D1 bne .L1479 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** { 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 4096U: 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_4096_fast_init_f64; 28322 .loc 3 295 0 28323 001c 0D4B ldr r3, .L1494 28324 .LVL3119: 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE ARM GAS /tmp/ccfbYRip.s page 887 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 2048U: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_2048_fast_init_f64; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 1024U: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_1024_fast_init_f64; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 512U: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_512_fast_init_f64; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 256U: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_256_fast_init_f64; 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 128U: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_128_fast_init_f64; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 64U: 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_64_fast_init_f64; 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOE 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** case 32U: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** fptr = arm_rfft_32_fast_init_f64; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** #endif 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** default: 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return ARM_MATH_ARGUMENT_ERROR; 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** return fptr( S ); 28325 .loc 3 338 0 28326 001e 1847 bx r3 28327 .LVL3120: 28328 .L1491: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** { 28329 .loc 3 291 0 28330 0020 4029 cmp r1, #64 28331 0022 0FD0 beq .L1482 28332 0024 8029 cmp r1, #128 28333 0026 04D0 beq .L1483 28334 0028 2029 cmp r1, #32 28335 002a 0DD0 beq .L1493 28336 .L1479: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** } 28337 .loc 3 340 0 28338 002c 4FF0FF30 mov r0, #-1 ARM GAS /tmp/ccfbYRip.s page 888 28339 .LVL3121: 28340 0030 7047 bx lr 28341 .LVL3122: 28342 .L1483: 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28343 .loc 3 320 0 28344 0032 094B ldr r3, .L1494+4 28345 .LVL3123: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28346 .loc 3 338 0 28347 0034 1847 bx r3 28348 .LVL3124: 28349 .L1488: 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28350 .loc 3 300 0 28351 0036 094B ldr r3, .L1494+8 28352 .LVL3125: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28353 .loc 3 338 0 28354 0038 1847 bx r3 28355 .LVL3126: 28356 .L1492: 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** { 28357 .loc 3 291 0 28358 003a B1F5007F cmp r1, #512 28359 003e F5D1 bne .L1479 28360 .LVL3127: 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28361 .loc 3 310 0 28362 0040 074B ldr r3, .L1494+12 28363 .LVL3128: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28364 .loc 3 338 0 28365 0042 1847 bx r3 28366 .LVL3129: 28367 .L1482: 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28368 .loc 3 325 0 28369 0044 074B ldr r3, .L1494+16 28370 .LVL3130: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28371 .loc 3 338 0 28372 0046 1847 bx r3 28373 .LVL3131: 28374 .L1493: 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28375 .loc 3 330 0 28376 0048 074B ldr r3, .L1494+20 28377 .LVL3132: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28378 .loc 3 338 0 28379 004a 1847 bx r3 28380 .LVL3133: 28381 .L1485: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28382 .loc 3 305 0 28383 004c 074B ldr r3, .L1494+24 ARM GAS /tmp/ccfbYRip.s page 889 28384 .LVL3134: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28385 .loc 3 338 0 28386 004e 1847 bx r3 28387 .LVL3135: 28388 .L1480: 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** break; 28389 .loc 3 315 0 28390 0050 074B ldr r3, .L1494+28 28391 .LVL3136: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c **** 28392 .loc 3 338 0 28393 0052 1847 bx r3 28394 .LVL3137: 28395 .L1495: 28396 .align 2 28397 .L1494: 28398 0054 00000000 .word arm_rfft_4096_fast_init_f64 28399 0058 00000000 .word arm_rfft_128_fast_init_f64 28400 005c 00000000 .word arm_rfft_2048_fast_init_f64 28401 0060 00000000 .word arm_rfft_512_fast_init_f64 28402 0064 00000000 .word arm_rfft_64_fast_init_f64 28403 0068 00000000 .word arm_rfft_32_fast_init_f64 28404 006c 00000000 .word arm_rfft_1024_fast_init_f64 28405 0070 00000000 .word arm_rfft_256_fast_init_f64 28406 .cfi_endproc 28407 .LFE227: 28409 .section .text.arm_rfft_init_f32,"ax",%progbits 28410 .align 1 28411 .p2align 2,,3 28412 .global arm_rfft_init_f32 28413 .syntax unified 28414 .thumb 28415 .thumb_func 28416 .fpu fpv4-sp-d16 28418 arm_rfft_init_f32: 28419 .LFB228: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28420 .loc 29 73 0 28421 .cfi_startproc 28422 @ args = 4, pretend = 0, frame = 0 28423 @ frame_needed = 0, uses_anonymous_args = 0 28424 @ link register save eliminated. 28425 .LVL3138: 28426 0000 30B4 push {r4, r5} 28427 .LCFI337: 28428 .cfi_def_cfa_offset 8 28429 .cfi_offset 4, -8 28430 .cfi_offset 5, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28431 .loc 29 73 0 28432 0002 0446 mov r4, r0 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28433 .loc 29 88 0 28434 0004 3D48 ldr r0, .L1552 28435 .LVL3139: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 890 28436 .loc 29 85 0 28437 0006 3E4D ldr r5, .L1552+4 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28438 .loc 29 88 0 28439 0008 2061 str r0, [r4, #16] 28440 000a 90B2 uxth r0, r2 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28441 .loc 29 91 0 28442 000c DBB2 uxtb r3, r3 28443 .LVL3140: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28444 .loc 29 85 0 28445 000e E560 str r5, [r4, #12] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28446 .loc 29 82 0 28447 0010 C2F34E02 ubfx r2, r2, #1, #15 28448 .LVL3141: 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28449 .loc 29 73 0 28450 0014 029D ldr r5, [sp, #8] 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28451 .loc 29 91 0 28452 0016 A371 strb r3, [r4, #6] 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 28453 .loc 29 97 0 28454 0018 B0F5007F cmp r0, #512 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28455 .loc 29 94 0 28456 001c E571 strb r5, [r4, #7] 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28457 .loc 29 79 0 28458 001e 2060 str r0, [r4] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28459 .loc 29 82 0 28460 0020 A280 strh r2, [r4, #4] @ movhi 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 28461 .loc 29 97 0 28462 0022 52D0 beq .L1498 28463 0024 48D9 bls .L1550 28464 0026 B0F5006F cmp r0, #2048 28465 002a 1DD0 beq .L1501 28466 002c B0F5005F cmp r0, #8192 28467 0030 48D1 bne .L1513 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 28468 .loc 29 101 0 28469 0032 0120 movs r0, #1 28470 0034 A060 str r0, [r4, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28471 .loc 29 76 0 28472 0036 0020 movs r0, #0 28473 .L1497: 28474 .LVL3142: 28475 .loc 29 119 0 28476 0038 6161 str r1, [r4, #20] 28477 .LBB2892: 28478 .LBB2893: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 891 28479 .loc 23 81 0 28480 003a 324C ldr r4, .L1552+8 28481 .LVL3143: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28482 .loc 23 78 0 28483 003c 0A80 strh r2, [r1] @ movhi 28484 .LBE2893: 28485 .LBE2892: 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** if (S->ifftFlagR) 28486 .loc 29 121 0 28487 003e DBB9 cbnz r3, .L1551 28488 .L1503: 28489 .LVL3144: 28490 .LBB2902: 28491 .LBB2903: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 28492 .loc 23 90 0 28493 0040 B2F5807F cmp r2, #256 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28494 .loc 23 84 0 28495 0044 4B80 strh r3, [r1, #2] @ movhi 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28496 .loc 23 81 0 28497 0046 4C60 str r4, [r1, #4] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 28498 .loc 23 90 0 28499 0048 1CD0 beq .L1505 28500 .LVL3145: 28501 .L1549: 28502 004a 25D8 bhi .L1512 28503 004c 102A cmp r2, #16 28504 004e 4AD0 beq .L1507 28505 0050 402A cmp r2, #64 28506 0052 07D1 bne .L1511 28507 .LBE2903: 28508 .LBE2902: 28509 .LBB2905: 28510 .LBB2896: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28511 .loc 23 133 0 28512 0054 4FF07252 mov r2, #1015021568 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 28513 .loc 23 132 0 28514 0058 2B4B ldr r3, .L1552+12 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28515 .loc 23 133 0 28516 005a 0A61 str r2, [r1, #16] @ float 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 64U; 28517 .loc 23 130 0 28518 005c 4FF04012 mov r2, #4194368 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.015625f; 28519 .loc 23 132 0 28520 0060 C1E90232 strd r3, r2, [r1, #8] 28521 .L1511: 28522 .LBE2896: 28523 .LBE2905: ARM GAS /tmp/ccfbYRip.s page 892 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initializes the CIFFT Module for fftLenreal/2 length */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** else 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* Initializes the CFFT Module for fftLenreal/2 length */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** } 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** /* return the status of RFFT Init function */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** return (status); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** } 28524 .loc 29 135 0 28525 0064 30BC pop {r4, r5} 28526 .LCFI338: 28527 .cfi_remember_state 28528 .cfi_restore 5 28529 .cfi_restore 4 28530 .cfi_def_cfa_offset 0 28531 .LVL3146: 28532 0066 7047 bx lr 28533 .LVL3147: 28534 .L1501: 28535 .LCFI339: 28536 .cfi_restore_state 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 28537 .loc 29 104 0 28538 0068 0420 movs r0, #4 28539 006a A060 str r0, [r4, #8] 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28540 .loc 29 119 0 28541 006c 6161 str r1, [r4, #20] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28542 .loc 29 76 0 28543 006e 0020 movs r0, #0 28544 .LVL3148: 28545 .LBB2906: 28546 .LBB2897: 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28547 .loc 23 81 0 28548 0070 244C ldr r4, .L1552+8 28549 .LVL3149: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28550 .loc 23 78 0 28551 0072 0A80 strh r2, [r1] @ movhi 28552 .LBE2897: 28553 .LBE2906: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 28554 .loc 29 121 0 28555 0074 002B cmp r3, #0 28556 0076 E3D0 beq .L1503 28557 .L1551: 28558 .LVL3150: 28559 .LBB2907: 28560 .LBB2898: ARM GAS /tmp/ccfbYRip.s page 893 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28561 .loc 23 84 0 28562 0078 0123 movs r3, #1 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 28563 .loc 23 90 0 28564 007a B2F5807F cmp r2, #256 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28565 .loc 23 81 0 28566 007e 4C60 str r4, [r1, #4] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** 28567 .loc 23 84 0 28568 0080 4B80 strh r3, [r1, #2] @ movhi 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 28569 .loc 23 90 0 28570 0082 E2D1 bne .L1549 28571 .LVL3151: 28572 .L1505: 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28573 .loc 23 125 0 28574 0084 4FF06E52 mov r2, #998244352 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 28575 .loc 23 124 0 28576 0088 204B ldr r3, .L1552+16 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28577 .loc 23 125 0 28578 008a 0A61 str r2, [r1, #16] @ float 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 16U; 28579 .loc 23 122 0 28580 008c 4FF01012 mov r2, #1048592 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.00390625f; 28581 .loc 23 124 0 28582 0090 C1E90232 strd r3, r2, [r1, #8] 28583 .LBE2898: 28584 .LBE2907: 28585 .loc 29 135 0 28586 0094 30BC pop {r4, r5} 28587 .LCFI340: 28588 .cfi_remember_state 28589 .cfi_restore 5 28590 .cfi_restore 4 28591 .cfi_def_cfa_offset 0 28592 .LVL3152: 28593 0096 7047 bx lr 28594 .LVL3153: 28595 .L1512: 28596 .LCFI341: 28597 .cfi_restore_state 28598 .LBB2908: 28599 .LBB2904: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** { 28600 .loc 23 90 0 28601 0098 B2F5806F cmp r2, #1024 28602 009c 19D0 beq .L1509 28603 .LBE2904: 28604 .LBE2908: 28605 .LBB2909: 28606 .LBB2899: ARM GAS /tmp/ccfbYRip.s page 894 28607 009e B2F5805F cmp r2, #4096 28608 00a2 DFD1 bne .L1511 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28609 .loc 23 103 0 28610 00a4 4FF06652 mov r2, #964689920 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 28611 .loc 23 101 0 28612 00a8 194B ldr r3, .L1552+20 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28613 .loc 23 103 0 28614 00aa 0A61 str r2, [r1, #16] @ float 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 28615 .loc 23 97 0 28616 00ac 4FF00112 mov r2, #65537 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 28617 .loc 23 101 0 28618 00b0 C1E90232 strd r3, r2, [r1, #8] 28619 .LBE2899: 28620 .LBE2909: 28621 .loc 29 135 0 28622 00b4 30BC pop {r4, r5} 28623 .LCFI342: 28624 .cfi_remember_state 28625 .cfi_restore 5 28626 .cfi_restore 4 28627 .cfi_def_cfa_offset 0 28628 .LVL3154: 28629 00b6 7047 bx lr 28630 .LVL3155: 28631 .L1550: 28632 .LCFI343: 28633 .cfi_restore_state 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** { 28634 .loc 29 97 0 28635 00b8 8028 cmp r0, #128 28636 00ba 03D1 bne .L1513 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 28637 .loc 29 110 0 28638 00bc 4020 movs r0, #64 28639 00be A060 str r0, [r4, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** 28640 .loc 29 76 0 28641 00c0 0020 movs r0, #0 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** default: 28642 .loc 29 111 0 28643 00c2 B9E7 b .L1497 28644 .L1513: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 28645 .loc 29 114 0 28646 00c4 4FF0FF30 mov r0, #-1 28647 00c8 B6E7 b .L1497 28648 .L1498: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** break; 28649 .loc 29 107 0 28650 00ca 1020 movs r0, #16 28651 00cc A060 str r0, [r4, #8] 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** ARM GAS /tmp/ccfbYRip.s page 895 28652 .loc 29 76 0 28653 00ce 0020 movs r0, #0 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c **** case 128U: 28654 .loc 29 108 0 28655 00d0 B2E7 b .L1497 28656 .LVL3156: 28657 .L1509: 28658 .LBB2910: 28659 .LBB2900: 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28660 .loc 23 116 0 28661 00d2 4FF06A52 mov r2, #981467136 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 28662 .loc 23 114 0 28663 00d6 0F4B ldr r3, .L1552+24 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28664 .loc 23 116 0 28665 00d8 0A61 str r2, [r1, #16] @ float 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the bit reversal table modifier */ 28666 .loc 23 110 0 28667 00da 4FF00412 mov r2, #262148 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** /* Initialise the 1/fftLen Value */ 28668 .loc 23 114 0 28669 00de C1E90232 strd r3, r2, [r1, #8] 28670 .LBE2900: 28671 .LBE2910: 28672 .loc 29 135 0 28673 00e2 30BC pop {r4, r5} 28674 .LCFI344: 28675 .cfi_remember_state 28676 .cfi_restore 5 28677 .cfi_restore 4 28678 .cfi_def_cfa_offset 0 28679 .LVL3157: 28680 00e4 7047 bx lr 28681 .LVL3158: 28682 .L1507: 28683 .LCFI345: 28684 .cfi_restore_state 28685 .LBB2911: 28686 .LBB2901: 28687 .LBB2894: 28688 .LBB2895: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28689 .loc 23 141 0 28690 00e6 4FF07652 mov r2, #1031798784 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; 28691 .loc 23 140 0 28692 00ea 0B4B ldr r3, .L1552+28 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** break; 28693 .loc 23 141 0 28694 00ec 0A61 str r2, [r1, #16] @ float 28695 .LVL3159: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->bitRevFactor = 256U; 28696 .loc 23 138 0 28697 00ee 4FF00122 mov r2, #16777472 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c **** S->onebyfftLen = 0.0625f; ARM GAS /tmp/ccfbYRip.s page 896 28698 .loc 23 140 0 28699 00f2 C1E90232 strd r3, r2, [r1, #8] 28700 .LBE2895: 28701 .LBE2894: 28702 .LBE2901: 28703 .LBE2911: 28704 .loc 29 135 0 28705 00f6 30BC pop {r4, r5} 28706 .LCFI346: 28707 .cfi_restore 5 28708 .cfi_restore 4 28709 .cfi_def_cfa_offset 0 28710 .LVL3160: 28711 00f8 7047 bx lr 28712 .L1553: 28713 00fa 00BF .align 2 28714 .L1552: 28715 00fc 00000000 .word realCoefB 28716 0100 00000000 .word realCoefA 28717 0104 00000000 .word twiddleCoef_4096 28718 0108 7E000000 .word armBitRevTable+126 28719 010c 1E000000 .word armBitRevTable+30 28720 0110 00000000 .word armBitRevTable 28721 0114 06000000 .word armBitRevTable+6 28722 0118 FE010000 .word armBitRevTable+510 28723 .cfi_endproc 28724 .LFE228: 28726 .section .text.arm_rfft_init_q15,"ax",%progbits 28727 .align 1 28728 .p2align 2,,3 28729 .global arm_rfft_init_q15 28730 .syntax unified 28731 .thumb 28732 .thumb_func 28733 .fpu fpv4-sp-d16 28735 arm_rfft_init_q15: 28736 .LFB229: 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Initialise the default arm status */ 28737 .loc 31 70 0 28738 .cfi_startproc 28739 @ args = 0, pretend = 0, frame = 0 28740 @ frame_needed = 0, uses_anonymous_args = 0 28741 @ link register save eliminated. 28742 .LVL3161: 28743 0000 30B4 push {r4, r5} 28744 .LCFI347: 28745 .cfi_def_cfa_offset 8 28746 .cfi_offset 4, -8 28747 .cfi_offset 5, -4 28748 0002 89B2 uxth r1, r1 28749 .LVL3162: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28750 .loc 31 78 0 28751 0004 324D ldr r5, .L1573 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28752 .loc 31 81 0 28753 0006 334C ldr r4, .L1573+4 ARM GAS /tmp/ccfbYRip.s page 897 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28754 .loc 31 84 0 28755 0008 0271 strb r2, [r0, #4] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 28756 .loc 31 90 0 28757 000a B1F5007F cmp r1, #512 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28758 .loc 31 87 0 28759 000e 4371 strb r3, [r0, #5] 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28760 .loc 31 75 0 28761 0010 0160 str r1, [r0] 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28762 .loc 31 81 0 28763 0012 C0E90354 strd r5, r4, [r0, #12] 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 28764 .loc 31 90 0 28765 0016 49D0 beq .L1556 28766 0018 10D9 bls .L1570 28767 001a B1F5006F cmp r1, #2048 28768 001e 4CD0 beq .L1563 28769 0020 33D9 bls .L1571 28770 0022 B1F5805F cmp r1, #4096 28771 0026 1FD0 beq .L1566 28772 0028 B1F5005F cmp r1, #8192 28773 002c 4CD1 bne .L1568 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28774 .loc 31 94 0 28775 002e 0122 movs r2, #1 28776 .LVL3163: 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28777 .loc 31 103 0 28778 0030 294B ldr r3, .L1573+8 28779 .LVL3164: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28780 .loc 31 94 0 28781 0032 8260 str r2, [r0, #8] 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28782 .loc 31 103 0 28783 0034 4361 str r3, [r0, #20] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** default: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* Reporting argument error if rfftSize is not valid value */ 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** status = ARM_MATH_ARGUMENT_ERROR; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** /* return the status of RFFT Init function */ 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** return (status); 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** } 28784 .loc 31 235 0 28785 0036 30BC pop {r4, r5} 28786 .LCFI348: 28787 .cfi_remember_state 28788 .cfi_restore 5 ARM GAS /tmp/ccfbYRip.s page 898 28789 .cfi_restore 4 28790 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28791 .loc 31 72 0 28792 0038 0020 movs r0, #0 28793 .LVL3165: 28794 .loc 31 235 0 28795 003a 7047 bx lr 28796 .LVL3166: 28797 .L1570: 28798 .LCFI349: 28799 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 28800 .loc 31 90 0 28801 003c 4029 cmp r1, #64 28802 003e 2ED0 beq .L1558 28803 0040 19D9 bls .L1572 28804 0042 8029 cmp r1, #128 28805 0044 09D0 beq .L1561 28806 0046 B1F5807F cmp r1, #256 28807 004a 3DD1 bne .L1568 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28808 .loc 31 169 0 28809 004c 2022 movs r2, #32 28810 .LVL3167: 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28811 .loc 31 178 0 28812 004e 234B ldr r3, .L1573+12 28813 .LVL3168: 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28814 .loc 31 169 0 28815 0050 8260 str r2, [r0, #8] 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28816 .loc 31 178 0 28817 0052 4361 str r3, [r0, #20] 28818 .loc 31 235 0 28819 0054 30BC pop {r4, r5} 28820 .LCFI350: 28821 .cfi_remember_state 28822 .cfi_restore 5 28823 .cfi_restore 4 28824 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28825 .loc 31 72 0 28826 0056 0020 movs r0, #0 28827 .LVL3169: 28828 .loc 31 235 0 28829 0058 7047 bx lr 28830 .LVL3170: 28831 .L1561: 28832 .LCFI351: 28833 .cfi_restore_state 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28834 .loc 31 184 0 28835 005a 4022 movs r2, #64 28836 .LVL3171: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif ARM GAS /tmp/ccfbYRip.s page 899 28837 .loc 31 193 0 28838 005c 204B ldr r3, .L1573+16 28839 .LVL3172: 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28840 .loc 31 184 0 28841 005e 8260 str r2, [r0, #8] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28842 .loc 31 193 0 28843 0060 4361 str r3, [r0, #20] 28844 .loc 31 235 0 28845 0062 30BC pop {r4, r5} 28846 .LCFI352: 28847 .cfi_remember_state 28848 .cfi_restore 5 28849 .cfi_restore 4 28850 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28851 .loc 31 72 0 28852 0064 0020 movs r0, #0 28853 .LVL3173: 28854 .loc 31 235 0 28855 0066 7047 bx lr 28856 .LVL3174: 28857 .L1566: 28858 .LCFI353: 28859 .cfi_restore_state 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28860 .loc 31 109 0 28861 0068 0222 movs r2, #2 28862 .LVL3175: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28863 .loc 31 118 0 28864 006a 1E4B ldr r3, .L1573+20 28865 .LVL3176: 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28866 .loc 31 109 0 28867 006c 8260 str r2, [r0, #8] 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28868 .loc 31 118 0 28869 006e 4361 str r3, [r0, #20] 28870 .loc 31 235 0 28871 0070 30BC pop {r4, r5} 28872 .LCFI354: 28873 .cfi_remember_state 28874 .cfi_restore 5 28875 .cfi_restore 4 28876 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28877 .loc 31 72 0 28878 0072 0020 movs r0, #0 28879 .LVL3177: 28880 .loc 31 235 0 28881 0074 7047 bx lr 28882 .LVL3178: 28883 .L1572: 28884 .LCFI355: 28885 .cfi_restore_state ARM GAS /tmp/ccfbYRip.s page 900 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 28886 .loc 31 90 0 28887 0076 2029 cmp r1, #32 28888 0078 26D1 bne .L1568 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28889 .loc 31 214 0 28890 007a 4FF48072 mov r2, #256 28891 .LVL3179: 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28892 .loc 31 223 0 28893 007e 1A4B ldr r3, .L1573+24 28894 .LVL3180: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28895 .loc 31 214 0 28896 0080 8260 str r2, [r0, #8] 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28897 .loc 31 223 0 28898 0082 4361 str r3, [r0, #20] 28899 .loc 31 235 0 28900 0084 30BC pop {r4, r5} 28901 .LCFI356: 28902 .cfi_remember_state 28903 .cfi_restore 5 28904 .cfi_restore 4 28905 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28906 .loc 31 72 0 28907 0086 0020 movs r0, #0 28908 .LVL3181: 28909 .loc 31 235 0 28910 0088 7047 bx lr 28911 .LVL3182: 28912 .L1571: 28913 .LCFI357: 28914 .cfi_restore_state 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** { 28915 .loc 31 90 0 28916 008a B1F5806F cmp r1, #1024 28917 008e 1BD1 bne .L1568 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28918 .loc 31 139 0 28919 0090 0822 movs r2, #8 28920 .LVL3183: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28921 .loc 31 148 0 28922 0092 164B ldr r3, .L1573+28 28923 .LVL3184: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28924 .loc 31 139 0 28925 0094 8260 str r2, [r0, #8] 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28926 .loc 31 148 0 28927 0096 4361 str r3, [r0, #20] 28928 .loc 31 235 0 28929 0098 30BC pop {r4, r5} 28930 .LCFI358: 28931 .cfi_remember_state ARM GAS /tmp/ccfbYRip.s page 901 28932 .cfi_restore 5 28933 .cfi_restore 4 28934 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28935 .loc 31 72 0 28936 009a 0020 movs r0, #0 28937 .LVL3185: 28938 .loc 31 235 0 28939 009c 7047 bx lr 28940 .LVL3186: 28941 .L1558: 28942 .LCFI359: 28943 .cfi_restore_state 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28944 .loc 31 199 0 28945 009e 8022 movs r2, #128 28946 .LVL3187: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28947 .loc 31 208 0 28948 00a0 134B ldr r3, .L1573+32 28949 .LVL3188: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28950 .loc 31 199 0 28951 00a2 8260 str r2, [r0, #8] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28952 .loc 31 208 0 28953 00a4 4361 str r3, [r0, #20] 28954 .loc 31 235 0 28955 00a6 30BC pop {r4, r5} 28956 .LCFI360: 28957 .cfi_remember_state 28958 .cfi_restore 5 28959 .cfi_restore 4 28960 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28961 .loc 31 72 0 28962 00a8 0020 movs r0, #0 28963 .LVL3189: 28964 .loc 31 235 0 28965 00aa 7047 bx lr 28966 .LVL3190: 28967 .L1556: 28968 .LCFI361: 28969 .cfi_restore_state 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28970 .loc 31 154 0 28971 00ac 1022 movs r2, #16 28972 .LVL3191: 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28973 .loc 31 163 0 28974 00ae 114B ldr r3, .L1573+36 28975 .LVL3192: 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28976 .loc 31 154 0 28977 00b0 8260 str r2, [r0, #8] 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28978 .loc 31 163 0 ARM GAS /tmp/ccfbYRip.s page 902 28979 00b2 4361 str r3, [r0, #20] 28980 .loc 31 235 0 28981 00b4 30BC pop {r4, r5} 28982 .LCFI362: 28983 .cfi_remember_state 28984 .cfi_restore 5 28985 .cfi_restore 4 28986 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28987 .loc 31 72 0 28988 00b6 0020 movs r0, #0 28989 .LVL3193: 28990 .loc 31 235 0 28991 00b8 7047 bx lr 28992 .LVL3194: 28993 .L1563: 28994 .LCFI363: 28995 .cfi_restore_state 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 28996 .loc 31 124 0 28997 00ba 0422 movs r2, #4 28998 .LVL3195: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 28999 .loc 31 133 0 29000 00bc 0E4B ldr r3, .L1573+40 29001 .LVL3196: 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 29002 .loc 31 124 0 29003 00be 8260 str r2, [r0, #8] 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** #endif 29004 .loc 31 133 0 29005 00c0 4361 str r3, [r0, #20] 29006 .loc 31 235 0 29007 00c2 30BC pop {r4, r5} 29008 .LCFI364: 29009 .cfi_remember_state 29010 .cfi_restore 5 29011 .cfi_restore 4 29012 .cfi_def_cfa_offset 0 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** 29013 .loc 31 72 0 29014 00c4 0020 movs r0, #0 29015 .LVL3197: 29016 .loc 31 235 0 29017 00c6 7047 bx lr 29018 .LVL3198: 29019 .L1568: 29020 .LCFI365: 29021 .cfi_restore_state 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c **** break; 29022 .loc 31 229 0 29023 00c8 4FF0FF30 mov r0, #-1 29024 .LVL3199: 29025 .loc 31 235 0 29026 00cc 30BC pop {r4, r5} 29027 .LCFI366: 29028 .cfi_restore 5 ARM GAS /tmp/ccfbYRip.s page 903 29029 .cfi_restore 4 29030 .cfi_def_cfa_offset 0 29031 00ce 7047 bx lr 29032 .L1574: 29033 .align 2 29034 .L1573: 29035 00d0 00000000 .word realCoefAQ15 29036 00d4 00000000 .word realCoefBQ15 29037 00d8 00000000 .word arm_cfft_sR_q15_len4096 29038 00dc 00000000 .word arm_cfft_sR_q15_len128 29039 00e0 00000000 .word arm_cfft_sR_q15_len64 29040 00e4 00000000 .word arm_cfft_sR_q15_len2048 29041 00e8 00000000 .word arm_cfft_sR_q15_len16 29042 00ec 00000000 .word arm_cfft_sR_q15_len512 29043 00f0 00000000 .word arm_cfft_sR_q15_len32 29044 00f4 00000000 .word arm_cfft_sR_q15_len256 29045 00f8 00000000 .word arm_cfft_sR_q15_len1024 29046 .cfi_endproc 29047 .LFE229: 29049 .section .text.arm_rfft_init_q31,"ax",%progbits 29050 .align 1 29051 .p2align 2,,3 29052 .global arm_rfft_init_q31 29053 .syntax unified 29054 .thumb 29055 .thumb_func 29056 .fpu fpv4-sp-d16 29058 arm_rfft_init_q31: 29059 .LFB230: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Initialise the default arm status */ 29060 .loc 33 72 0 29061 .cfi_startproc 29062 @ args = 0, pretend = 0, frame = 0 29063 @ frame_needed = 0, uses_anonymous_args = 0 29064 @ link register save eliminated. 29065 .LVL3200: 29066 0000 30B4 push {r4, r5} 29067 .LCFI367: 29068 .cfi_def_cfa_offset 8 29069 .cfi_offset 4, -8 29070 .cfi_offset 5, -4 29071 0002 89B2 uxth r1, r1 29072 .LVL3201: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29073 .loc 33 80 0 29074 0004 324D ldr r5, .L1594 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29075 .loc 33 83 0 29076 0006 334C ldr r4, .L1594+4 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29077 .loc 33 86 0 29078 0008 0271 strb r2, [r0, #4] 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 29079 .loc 33 92 0 29080 000a B1F5007F cmp r1, #512 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29081 .loc 33 89 0 ARM GAS /tmp/ccfbYRip.s page 904 29082 000e 4371 strb r3, [r0, #5] 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29083 .loc 33 77 0 29084 0010 0160 str r1, [r0] 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29085 .loc 33 83 0 29086 0012 C0E90354 strd r5, r4, [r0, #12] 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 29087 .loc 33 92 0 29088 0016 49D0 beq .L1577 29089 0018 10D9 bls .L1591 29090 001a B1F5006F cmp r1, #2048 29091 001e 4CD0 beq .L1584 29092 0020 33D9 bls .L1592 29093 0022 B1F5805F cmp r1, #4096 29094 0026 1FD0 beq .L1587 29095 0028 B1F5005F cmp r1, #8192 29096 002c 4CD1 bne .L1589 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29097 .loc 33 98 0 29098 002e 0122 movs r2, #1 29099 .LVL3202: 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29100 .loc 33 107 0 29101 0030 294B ldr r3, .L1594+8 29102 .LVL3203: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29103 .loc 33 98 0 29104 0032 8260 str r2, [r0, #8] 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29105 .loc 33 107 0 29106 0034 4361 str r3, [r0, #20] 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** default: 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* Reporting argument error if rfftSize is not valid value */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** status = ARM_MATH_ARGUMENT_ERROR; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** /* return the status of RFFT Init function */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** return (status); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** } 29107 .loc 33 233 0 29108 0036 30BC pop {r4, r5} 29109 .LCFI368: 29110 .cfi_remember_state 29111 .cfi_restore 5 29112 .cfi_restore 4 29113 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29114 .loc 33 74 0 29115 0038 0020 movs r0, #0 29116 .LVL3204: 29117 .loc 33 233 0 29118 003a 7047 bx lr ARM GAS /tmp/ccfbYRip.s page 905 29119 .LVL3205: 29120 .L1591: 29121 .LCFI369: 29122 .cfi_restore_state 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 29123 .loc 33 92 0 29124 003c 4029 cmp r1, #64 29125 003e 2ED0 beq .L1579 29126 0040 19D9 bls .L1593 29127 0042 8029 cmp r1, #128 29128 0044 09D0 beq .L1582 29129 0046 B1F5807F cmp r1, #256 29130 004a 3DD1 bne .L1589 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29131 .loc 33 171 0 29132 004c 2022 movs r2, #32 29133 .LVL3206: 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29134 .loc 33 179 0 29135 004e 234B ldr r3, .L1594+12 29136 .LVL3207: 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29137 .loc 33 171 0 29138 0050 8260 str r2, [r0, #8] 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29139 .loc 33 179 0 29140 0052 4361 str r3, [r0, #20] 29141 .loc 33 233 0 29142 0054 30BC pop {r4, r5} 29143 .LCFI370: 29144 .cfi_remember_state 29145 .cfi_restore 5 29146 .cfi_restore 4 29147 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29148 .loc 33 74 0 29149 0056 0020 movs r0, #0 29150 .LVL3208: 29151 .loc 33 233 0 29152 0058 7047 bx lr 29153 .LVL3209: 29154 .L1582: 29155 .LCFI371: 29156 .cfi_restore_state 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29157 .loc 33 185 0 29158 005a 4022 movs r2, #64 29159 .LVL3210: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29160 .loc 33 193 0 29161 005c 204B ldr r3, .L1594+16 29162 .LVL3211: 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29163 .loc 33 185 0 29164 005e 8260 str r2, [r0, #8] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29165 .loc 33 193 0 ARM GAS /tmp/ccfbYRip.s page 906 29166 0060 4361 str r3, [r0, #20] 29167 .loc 33 233 0 29168 0062 30BC pop {r4, r5} 29169 .LCFI372: 29170 .cfi_remember_state 29171 .cfi_restore 5 29172 .cfi_restore 4 29173 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29174 .loc 33 74 0 29175 0064 0020 movs r0, #0 29176 .LVL3212: 29177 .loc 33 233 0 29178 0066 7047 bx lr 29179 .LVL3213: 29180 .L1587: 29181 .LCFI373: 29182 .cfi_restore_state 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29183 .loc 33 113 0 29184 0068 0222 movs r2, #2 29185 .LVL3214: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29186 .loc 33 122 0 29187 006a 1E4B ldr r3, .L1594+20 29188 .LVL3215: 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29189 .loc 33 113 0 29190 006c 8260 str r2, [r0, #8] 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29191 .loc 33 122 0 29192 006e 4361 str r3, [r0, #20] 29193 .loc 33 233 0 29194 0070 30BC pop {r4, r5} 29195 .LCFI374: 29196 .cfi_remember_state 29197 .cfi_restore 5 29198 .cfi_restore 4 29199 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29200 .loc 33 74 0 29201 0072 0020 movs r0, #0 29202 .LVL3216: 29203 .loc 33 233 0 29204 0074 7047 bx lr 29205 .LVL3217: 29206 .L1593: 29207 .LCFI375: 29208 .cfi_restore_state 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 29209 .loc 33 92 0 29210 0076 2029 cmp r1, #32 29211 0078 26D1 bne .L1589 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29212 .loc 33 213 0 29213 007a 4FF48072 mov r2, #256 29214 .LVL3218: ARM GAS /tmp/ccfbYRip.s page 907 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29215 .loc 33 221 0 29216 007e 1A4B ldr r3, .L1594+24 29217 .LVL3219: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29218 .loc 33 213 0 29219 0080 8260 str r2, [r0, #8] 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29220 .loc 33 221 0 29221 0082 4361 str r3, [r0, #20] 29222 .loc 33 233 0 29223 0084 30BC pop {r4, r5} 29224 .LCFI376: 29225 .cfi_remember_state 29226 .cfi_restore 5 29227 .cfi_restore 4 29228 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29229 .loc 33 74 0 29230 0086 0020 movs r0, #0 29231 .LVL3220: 29232 .loc 33 233 0 29233 0088 7047 bx lr 29234 .LVL3221: 29235 .L1592: 29236 .LCFI377: 29237 .cfi_restore_state 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** { 29238 .loc 33 92 0 29239 008a B1F5806F cmp r1, #1024 29240 008e 1BD1 bne .L1589 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29241 .loc 33 143 0 29242 0090 0822 movs r2, #8 29243 .LVL3222: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29244 .loc 33 151 0 29245 0092 164B ldr r3, .L1594+28 29246 .LVL3223: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29247 .loc 33 143 0 29248 0094 8260 str r2, [r0, #8] 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29249 .loc 33 151 0 29250 0096 4361 str r3, [r0, #20] 29251 .loc 33 233 0 29252 0098 30BC pop {r4, r5} 29253 .LCFI378: 29254 .cfi_remember_state 29255 .cfi_restore 5 29256 .cfi_restore 4 29257 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29258 .loc 33 74 0 29259 009a 0020 movs r0, #0 29260 .LVL3224: 29261 .loc 33 233 0 ARM GAS /tmp/ccfbYRip.s page 908 29262 009c 7047 bx lr 29263 .LVL3225: 29264 .L1579: 29265 .LCFI379: 29266 .cfi_restore_state 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29267 .loc 33 199 0 29268 009e 8022 movs r2, #128 29269 .LVL3226: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29270 .loc 33 207 0 29271 00a0 134B ldr r3, .L1594+32 29272 .LVL3227: 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29273 .loc 33 199 0 29274 00a2 8260 str r2, [r0, #8] 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29275 .loc 33 207 0 29276 00a4 4361 str r3, [r0, #20] 29277 .loc 33 233 0 29278 00a6 30BC pop {r4, r5} 29279 .LCFI380: 29280 .cfi_remember_state 29281 .cfi_restore 5 29282 .cfi_restore 4 29283 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29284 .loc 33 74 0 29285 00a8 0020 movs r0, #0 29286 .LVL3228: 29287 .loc 33 233 0 29288 00aa 7047 bx lr 29289 .LVL3229: 29290 .L1577: 29291 .LCFI381: 29292 .cfi_restore_state 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29293 .loc 33 157 0 29294 00ac 1022 movs r2, #16 29295 .LVL3230: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29296 .loc 33 165 0 29297 00ae 114B ldr r3, .L1594+36 29298 .LVL3231: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #if defined(ARM_MATH_MVEI) 29299 .loc 33 157 0 29300 00b0 8260 str r2, [r0, #8] 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29301 .loc 33 165 0 29302 00b2 4361 str r3, [r0, #20] 29303 .loc 33 233 0 29304 00b4 30BC pop {r4, r5} 29305 .LCFI382: 29306 .cfi_remember_state 29307 .cfi_restore 5 29308 .cfi_restore 4 29309 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccfbYRip.s page 909 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29310 .loc 33 74 0 29311 00b6 0020 movs r0, #0 29312 .LVL3232: 29313 .loc 33 233 0 29314 00b8 7047 bx lr 29315 .LVL3233: 29316 .L1584: 29317 .LCFI383: 29318 .cfi_restore_state 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29319 .loc 33 128 0 29320 00ba 0422 movs r2, #4 29321 .LVL3234: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29322 .loc 33 137 0 29323 00bc 0E4B ldr r3, .L1594+40 29324 .LVL3235: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29325 .loc 33 128 0 29326 00be 8260 str r2, [r0, #8] 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** #endif 29327 .loc 33 137 0 29328 00c0 4361 str r3, [r0, #20] 29329 .loc 33 233 0 29330 00c2 30BC pop {r4, r5} 29331 .LCFI384: 29332 .cfi_remember_state 29333 .cfi_restore 5 29334 .cfi_restore 4 29335 .cfi_def_cfa_offset 0 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** 29336 .loc 33 74 0 29337 00c4 0020 movs r0, #0 29338 .LVL3236: 29339 .loc 33 233 0 29340 00c6 7047 bx lr 29341 .LVL3237: 29342 .L1589: 29343 .LCFI385: 29344 .cfi_restore_state 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c **** break; 29345 .loc 33 227 0 29346 00c8 4FF0FF30 mov r0, #-1 29347 .LVL3238: 29348 .loc 33 233 0 29349 00cc 30BC pop {r4, r5} 29350 .LCFI386: 29351 .cfi_restore 5 29352 .cfi_restore 4 29353 .cfi_def_cfa_offset 0 29354 00ce 7047 bx lr 29355 .L1595: 29356 .align 2 29357 .L1594: 29358 00d0 00000000 .word realCoefAQ31 29359 00d4 00000000 .word realCoefBQ31 ARM GAS /tmp/ccfbYRip.s page 910 29360 00d8 00000000 .word arm_cfft_sR_q31_len4096 29361 00dc 00000000 .word arm_cfft_sR_q31_len128 29362 00e0 00000000 .word arm_cfft_sR_q31_len64 29363 00e4 00000000 .word arm_cfft_sR_q31_len2048 29364 00e8 00000000 .word arm_cfft_sR_q31_len16 29365 00ec 00000000 .word arm_cfft_sR_q31_len512 29366 00f0 00000000 .word arm_cfft_sR_q31_len32 29367 00f4 00000000 .word arm_cfft_sR_q31_len256 29368 00f8 00000000 .word arm_cfft_sR_q31_len1024 29369 .cfi_endproc 29370 .LFE230: 29372 .section .text.arm_split_rfft_q15,"ax",%progbits 29373 .align 1 29374 .p2align 2,,3 29375 .global arm_split_rfft_q15 29376 .syntax unified 29377 .thumb 29378 .thumb_func 29379 .fpu fpv4-sp-d16 29381 arm_split_rfft_q15: 29382 .LFB232: 29383 .file 38 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Title: arm_rfft_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Description: RFFT & RIFFT Q15 process function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* ---------------------------------------------------------------------- 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Internal functions prototypes 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * -------------------------------------------------------------------- */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rfft_q15( ARM GAS /tmp/ccfbYRip.s page 911 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier); 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rifft_q15( 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier); 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @addtogroup RealFFT 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @{ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @brief Processing function for the Q15 RFFT/RIFFT. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] S points to an instance of the Q15 RFFT/RIFFT structure 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pSrc points to input buffer (Source buffer is modified by this function.) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[out] pDst points to output buffer 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @return none 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par Input an output formats 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** Internally input is downscaled by 2 for every stage to avoid saturations inside 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** Hence the output format is different for different RFFT sizes. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** The input and output formats for different RFFT sizes and number of bits to upsc 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT" 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT" 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** If the input buffer is of length N, the output buffer must have length 2*N. 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** The input buffer is modified by this function. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_rfft_q15( 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const arm_rfft_instance_q15 * S, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const arm_cfft_instance_q15 *S_CFFT = &(S->cfftInst); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const arm_cfft_instance_q15 *S_CFFT = S->pCfft; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t L2 = S->fftLenReal >> 1U; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Calculation of RIFFT of input */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** if (S->ifftFlagR == 1U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Real IFFT core process */ ARM GAS /tmp/ccfbYRip.s page 912 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Complex IFFT process */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** for(i = 0; i < S->fftLenReal; i++) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[i] = pDst[i] << 1U; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** else 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Calculation of RFFT of input */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Complex FFT process */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Real FFT core process */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @} end of RealFFT group 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @brief Core Real FFT process 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pSrc points to input buffer 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] fftLen length of FFT 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pATable points to twiddle Coef A buffer 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pBTable points to twiddle Coef B buffer 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[out] pDst points to output buffer 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @return none 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** The function implements a Real FFT 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rfft_q15( 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier) 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U - 14]; /* temp pointers fo 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U - 14]; /* temp pointers fo 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pVecSrc1; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pVecDst1; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15x8x2_t vecIn, vecSum; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t blkCnt; ARM GAS /tmp/ccfbYRip.s page 913 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint16x8_t vecStridesFwd, vecStridesBkwd; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15x8_t vecInBkwd, vecCoefFwd0, vecCoefFwd1; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Init coefficient pointers 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = &pATable[modifier * 2U]; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[modifier * 2U]; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * scatter / gather offsets 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * for ascending & descending addressing 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vidupq_u16((uint32_t)0, 2); // 0, 2, 4, 6, 8, 10, 12, 14 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesBkwd = vddupq_u16(14, 2); // 14, 12, 10, 8, 6, 4, 2, 0 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vecStridesFwd * (uint16_t) modifier; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecSrc1 = (q15_t const *) pSrc1; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecDst1 = pDst1; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** blkCnt = fftLen >> 3; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** while (blkCnt > 0U) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd0 = vldrhq_gather_shifted_offset(pCoefA, vecStridesFwd); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd1 = vldrhq_gather_shifted_offset(&pCoefA[1], vecStridesFwd); 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecIn = vld2q(pVecSrc1); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecSrc1 += 16; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR = *pSrc1 * CoefA1; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vrmulhq(vecIn.val[0], vecCoefFwd0); 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI = *pSrc1++ * CoefA2; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vrmulhq(vecIn.val[0], vecCoefFwd1); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(pSrc2, vecStridesBkwd); 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR -= (*pSrc1 + *pSrc2) * CoefA2; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vqaddq(vecIn.val[1], vecInBkwd); 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vqsubq(vecSum.val[0], vrmulhq(vecInBkwd, vecCoefFwd1)); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(pSrc2, vecStridesBkwd); 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI += *pSrc1++ * CoefA1; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vrmulhq(vecIn.val[1], vecCoefFwd0)); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd0 = vldrhq_gather_shifted_offset(pCoefB, vecStridesFwd); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI -= *pSrc2-- * CoefB1; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vrmulhq(vecInBkwd, vecCoefFwd0)); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(&pSrc2[-1], vecStridesBkwd); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI -= *pSrc2 * CoefA2; ARM GAS /tmp/ccfbYRip.s page 914 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vrmulhq(vecInBkwd, vecCoefFwd1)); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR += *pSrc2-- * CoefB1; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vrmulhq(vecInBkwd, vecCoefFwd0)); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vst2q(pVecDst1, vecSum); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecDst1 += 16; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * write complex conjugate output 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = -vecSum.val[1]; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vstrhq_scatter_shifted_offset(pDst2, vecStridesBkwd, vecSum.val[1]); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vstrhq_scatter_shifted_offset(&pDst2[-1], vecStridesBkwd, vecSum.val[0]); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * update fwd and backwd offsets 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vecStridesFwd + (uint16_t)(modifier * 16U); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* cannot use negative 16-bit offsets (would lead to positive 32-65K jump*/ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** //vecStridesBkwd = vecStridesBkwd - (uint16_t)16; 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 = pSrc2 - 16; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst2 = pDst2 - 16; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** blkCnt--; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[(2U * fftLen) + 1U] = 0; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[0] = (pSrc[0] + pSrc[1]) >> 1; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[1] = 0; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rfft_q15( 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier) 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29384 .loc 38 248 0 29385 .cfi_startproc 29386 @ args = 8, pretend = 0, frame = 8 29387 @ frame_needed = 0, uses_anonymous_args = 0 29388 .LVL3239: 29389 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 29390 .LCFI387: 29391 .cfi_def_cfa_offset 36 29392 .cfi_offset 4, -36 29393 .cfi_offset 5, -32 29394 .cfi_offset 6, -28 29395 .cfi_offset 7, -24 29396 .cfi_offset 8, -20 29397 .cfi_offset 9, -16 29398 .cfi_offset 10, -12 ARM GAS /tmp/ccfbYRip.s page 915 29399 .cfi_offset 11, -8 29400 .cfi_offset 14, -4 29401 0004 83B0 sub sp, sp, #12 29402 .LCFI388: 29403 .cfi_def_cfa_offset 48 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; /* Loop Counter */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q31_t outR, outI; /* Temporary variables for output */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pSrc1, *pSrc2; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined (ARM_MATH_DSP) 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pD1, *pD2; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* Init coefficient pointers */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = &pATable[modifier * 2]; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[modifier * 2]; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc1 = &pSrc[2]; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 = &pSrc[(2U * fftLen) - 2U]; 29404 .loc 38 262 0 29405 0006 01F18045 add r5, r1, #1073741824 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; /* Loop Counter */ 29406 .loc 38 248 0 29407 000a 0D9C ldr r4, [sp, #52] 29408 .loc 38 262 0 29409 000c 013D subs r5, r5, #1 29410 000e AD00 lsls r5, r5, #2 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[modifier * 2]; 29411 .loc 38 258 0 29412 0010 4FEA8409 lsl r9, r4, #2 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined (ARM_MATH_DSP) 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** i = 1U; 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD1 = pDst + 2; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2 = pDst + (4U * fftLen) - 2; 29413 .loc 38 268 0 29414 0014 4FEAC10E lsl lr, r1, #3 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** for (i = fftLen - 1; i > 0; i--) 29415 .loc 38 270 0 29416 0018 0139 subs r1, r1, #1 29417 .LVL3240: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29418 .loc 38 262 0 29419 001a 0195 str r5, [sp, #4] 29420 001c 00EB050A add r10, r0, r5 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[modifier * 2]; 29421 .loc 38 258 0 29422 0020 4A44 add r2, r2, r9 29423 .LVL3241: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29424 .loc 38 259 0 29425 0022 4B44 add r3, r3, r9 29426 .LVL3242: 29427 .loc 38 270 0 29428 0024 29D0 beq .L1597 ARM GAS /tmp/ccfbYRip.s page 916 29429 0026 0C9C ldr r4, [sp, #48] 29430 0028 AEF1080E sub lr, lr, #8 29431 .LVL3243: 29432 002c 00F1040B add fp, r0, #4 29433 .LVL3244: 29434 0030 A644 add lr, lr, r4 29435 .LVL3245: 29436 0032 04F10808 add r8, r4, #8 29437 .LVL3246: 29438 .L1598: 29439 .LBB2912: 29440 .LBB2913: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 29441 .loc 6 909 0 discriminator 3 29442 0036 5BF8044B ldr r4, [fp], #4 @ unaligned 29443 .LVL3247: 29444 .LBE2913: 29445 .LBE2912: 29446 .LBB2914: 29447 .LBB2915: 29448 003a 1768 ldr r7, [r2] @ unaligned 29449 .LVL3248: 29450 .LBE2915: 29451 .LBE2914: 29452 .LBB2916: 29453 .LBB2917: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29454 .loc 5 2043 0 discriminator 3 29455 .syntax unified 29456 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29457 003c 44FB07F5 smusd r5, r4, r7 29458 @ 0 "" 2 29459 .LVL3249: 29460 .thumb 29461 .syntax unified 29462 .LBE2917: 29463 .LBE2916: 29464 .LBB2918: 29465 .LBB2919: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 29466 .loc 6 909 0 discriminator 3 29467 0040 5AF80469 ldr r6, [r10], #-4 @ unaligned 29468 .LVL3250: 29469 .LBE2919: 29470 .LBE2918: 29471 .LBB2920: 29472 .LBB2921: 29473 0044 D3F800C0 ldr ip, [r3] @ unaligned 29474 .LVL3251: 29475 .LBE2921: 29476 .LBE2920: 29477 .LBB2922: 29478 .LBB2923: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29479 .loc 5 1993 0 discriminator 3 29480 .syntax unified 29481 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccfbYRip.s page 917 29482 0048 26FB0C55 smlad r5, r6, ip, r5 29483 @ 0 "" 2 29484 .LVL3252: 29485 .thumb 29486 .syntax unified 29487 .LBE2923: 29488 .LBE2922: 29489 .LBB2924: 29490 .LBB2925: 29491 .loc 5 2051 0 discriminator 3 29492 .syntax unified 29493 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29494 004c 46FB1CF6 smusdx r6, r6, ip 29495 @ 0 "" 2 29496 .LVL3253: 29497 .thumb 29498 .syntax unified 29499 .LBE2925: 29500 .LBE2924: 29501 .LBB2926: 29502 .LBB2927: 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29503 .loc 5 2001 0 discriminator 3 29504 .syntax unified 29505 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29506 0050 24FB1764 smladx r4, r4, r7, r6 29507 @ 0 "" 2 29508 .LVL3254: 29509 .thumb 29510 .syntax unified 29511 .LBE2927: 29512 .LBE2926: 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = ( pSrc[2 * i] * pATable[2 * i] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pSrc[2 * i + 1] * pATable[2 * i + 1] 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pSrc[2 * n - 2 * i] * pBTable[2 * i] 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * i] * pATable[2 * i + 1] 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]) 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA))); 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U; 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** ARM GAS /tmp/ccfbYRip.s page 918 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB)); 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2)); 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI); 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write output */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pD1++ = (q15_t) outR; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pD1++ = outI >> 16U; 29513 .loc 38 308 0 discriminator 3 29514 0054 2414 asrs r4, r4, #16 29515 .LVL3255: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pD1++ = outI >> 16U; 29516 .loc 38 307 0 discriminator 3 29517 0056 2D14 asrs r5, r5, #16 29518 .LVL3256: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write complex conjugate output */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2[0] = (q15_t) outR; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2[1] = -(outI >> 16U); 29519 .loc 38 312 0 discriminator 3 29520 0058 6642 negs r6, r4 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29521 .loc 38 270 0 discriminator 3 29522 005a 0139 subs r1, r1, #1 29523 .LVL3257: 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29524 .loc 38 308 0 discriminator 3 29525 005c 28F8024C strh r4, [r8, #-2] @ movhi 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pD1++ = outI >> 16U; 29526 .loc 38 307 0 discriminator 3 29527 0060 28F8045C strh r5, [r8, #-4] @ movhi 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2 -= 2; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* update coefficient pointer */ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = pCoefB + (2U * modifier); 29528 .loc 38 316 0 discriminator 3 29529 0064 4B44 add r3, r3, r9 29530 .LVL3258: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2 -= 2; 29531 .loc 38 312 0 discriminator 3 29532 0066 AEF80660 strh r6, [lr, #6] @ movhi 29533 .LVL3259: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pD2[1] = -(outI >> 16U); 29534 .loc 38 311 0 discriminator 3 29535 006a AEF80450 strh r5, [lr, #4] @ movhi 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = pCoefA + (2U * modifier); 29536 .loc 38 317 0 discriminator 3 29537 006e 4A44 add r2, r2, r9 29538 .LVL3260: 29539 0070 08F10408 add r8, r8, #4 29540 0074 AEF1040E sub lr, lr, #4 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { ARM GAS /tmp/ccfbYRip.s page 919 29541 .loc 38 270 0 discriminator 3 29542 0078 DDD1 bne .L1598 29543 .LVL3261: 29544 .L1597: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; 29545 .loc 38 320 0 29546 007a B0F90210 ldrsh r1, [r0, #2] 29547 007e B0F90020 ldrsh r2, [r0] 29548 .LVL3262: 29549 0082 0C9C ldr r4, [sp, #48] 29550 0084 019B ldr r3, [sp, #4] 29551 .LVL3263: 29552 0086 521A subs r2, r2, r1 29553 0088 2344 add r3, r3, r4 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen + 1U] = 0; 29554 .loc 38 321 0 29555 008a 0021 movs r1, #0 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen + 1U] = 0; 29556 .loc 38 320 0 29557 008c 5210 asrs r2, r2, #1 29558 008e 9A80 strh r2, [r3, #4] @ movhi 29559 .loc 38 321 0 29560 0090 D980 strh r1, [r3, #6] @ movhi 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; 29561 .loc 38 323 0 29562 0092 B0F90030 ldrsh r3, [r0] 29563 0096 B0F90220 ldrsh r2, [r0, #2] 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[1] = 0; 29564 .loc 38 324 0 29565 009a 6180 strh r1, [r4, #2] @ movhi 29566 .LVL3264: 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[1] = 0; 29567 .loc 38 323 0 29568 009c 1344 add r3, r3, r2 29569 009e 5B10 asrs r3, r3, #1 29570 00a0 2380 strh r3, [r4] @ movhi 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** i = 1U; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** while (i < fftLen) 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = ( pSrc[2 * i] * pATable[2 * i] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pSrc[2 * i + 1] * pATable[2 * i + 1] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pSrc[2 * n - 2 * i] * pBTable[2 * i] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = *pSrc1 * *pCoefA; 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1)); 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = outR + (*pSrc2 * *pCoefB); 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16; ARM GAS /tmp/ccfbYRip.s page 920 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * i] * pATable[2 * i + 1] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = *pSrc2 * *(pCoefB + 1); 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI - (*(pSrc2 + 1) * *pCoefB); 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI + (*(pSrc1 + 1) * *pCoefA); 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI + (*pSrc1 * *(pCoefA + 1)); 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* update input pointers */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc1 += 2U; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 -= 2U; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write output */ 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * i] = (q15_t) outR; 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * i + 1U] = outI >> 16U; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write complex conjugate output */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U); 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* update coefficient pointer */ 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = pCoefB + (2U * modifier); 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = pCoefA + (2U * modifier); 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** i++; 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1; 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[2U * fftLen + 1U] = 0; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[0] = (pSrc[0] + pSrc[1]) >> 1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pDst[1] = 0; 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 29571 .loc 38 382 0 29572 00a2 03B0 add sp, sp, #12 29573 .LCFI389: 29574 .cfi_def_cfa_offset 36 29575 @ sp needed 29576 00a4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 29577 .cfi_endproc 29578 .LFE232: 29580 .section .text.arm_rfft_q15,"ax",%progbits 29581 .align 1 29582 .p2align 2,,3 29583 .global arm_rfft_q15 29584 .syntax unified 29585 .thumb 29586 .thumb_func 29587 .fpu fpv4-sp-d16 29589 arm_rfft_q15: ARM GAS /tmp/ccfbYRip.s page 921 29590 .LFB231: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 29591 .loc 38 80 0 29592 .cfi_startproc 29593 @ args = 0, pretend = 0, frame = 8 29594 @ frame_needed = 0, uses_anonymous_args = 0 29595 .LVL3265: 29596 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 29597 .LCFI390: 29598 .cfi_def_cfa_offset 36 29599 .cfi_offset 4, -36 29600 .cfi_offset 5, -32 29601 .cfi_offset 6, -28 29602 .cfi_offset 7, -24 29603 .cfi_offset 8, -20 29604 .cfi_offset 9, -16 29605 .cfi_offset 10, -12 29606 .cfi_offset 11, -8 29607 .cfi_offset 14, -4 29608 0004 1446 mov r4, r2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29609 .loc 38 90 0 29610 0006 0279 ldrb r2, [r0, #4] @ zero_extendqisi2 29611 .LVL3266: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; 29612 .loc 38 86 0 29613 0008 0568 ldr r5, [r0] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif 29614 .loc 38 84 0 29615 000a 4369 ldr r3, [r0, #20] 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 29616 .loc 38 80 0 29617 000c 85B0 sub sp, sp, #20 29618 .LCFI391: 29619 .cfi_def_cfa_offset 56 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29620 .loc 38 90 0 29621 000e 012A cmp r2, #1 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 29622 .loc 38 80 0 29623 0010 0646 mov r6, r0 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif 29624 .loc 38 84 0 29625 0012 0393 str r3, [sp, #12] 29626 .LVL3267: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; 29627 .loc 38 86 0 29628 0014 4FEA5505 lsr r5, r5, #1 29629 .LVL3268: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 29630 .loc 38 80 0 29631 0018 0F46 mov r7, r1 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29632 .loc 38 90 0 29633 001a 0FD0 beq .L1618 29634 001c 1846 mov r0, r3 29635 .LVL3269: ARM GAS /tmp/ccfbYRip.s page 922 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29636 .loc 38 108 0 29637 001e 7379 ldrb r3, [r6, #5] @ zero_extendqisi2 29638 .LVL3270: 29639 0020 FFF7FEFF bl arm_cfft_q15 29640 .LVL3271: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 29641 .loc 38 111 0 29642 0024 D6E90323 ldrd r2, r3, [r6, #12] 29643 0028 B668 ldr r6, [r6, #8] 29644 .LVL3272: 29645 002a 0196 str r6, [sp, #4] 29646 002c 0094 str r4, [sp] 29647 002e 2946 mov r1, r5 29648 0030 3846 mov r0, r7 29649 0032 FFF7FEFF bl arm_split_rfft_q15 29650 .LVL3273: 29651 .L1604: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29652 .loc 38 114 0 29653 0036 05B0 add sp, sp, #20 29654 .LCFI392: 29655 .cfi_remember_state 29656 .cfi_def_cfa_offset 36 29657 @ sp needed 29658 0038 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 29659 .LVL3274: 29660 .L1618: 29661 .LCFI393: 29662 .cfi_restore_state 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29663 .loc 38 93 0 29664 003c D0E9038E ldrd r8, lr, [r0, #12] 29665 0040 8368 ldr r3, [r0, #8] 29666 .LVL3275: 29667 .LBB2952: 29668 .LBB2953: 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* defined(ARM_MATH_MVEI) */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /** 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @brief Core Real IFFT process 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pSrc points to input buffer 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] fftLen length of FFT 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pATable points to twiddle Coef A buffer 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] pBTable points to twiddle Coef B buffer 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[out] pDst points to output buffer 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @return none 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** @par 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** The function implements a Real IFFT 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined(ARM_MATH_MVEI) 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rifft_q15( 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, ARM GAS /tmp/ccfbYRip.s page 923 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier) 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U - 14U]; 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pDst1 = &pDst[0]; 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t const *pVecSrc1; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pVecDst1; 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15x8x2_t vecIn, vecSum; 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t blkCnt; 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint16x8_t vecStridesFwd, vecStridesBkwd; 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15x8_t vecInBkwd, vecCoefFwd0, vecCoefFwd1; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * Init coefficient pointers 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = &pATable[0]; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[0]; 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * scatter / gather offsets 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * for ascending & descending addressing 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vidupq_u16((uint32_t)0, 2); // 0, 2, 4, 6, 8, 10, 12, 14 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesBkwd = vddupq_u16(14, 2); // 14, 12, 10, 8, 6, 4, 2, 0 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vecStridesFwd * (uint16_t) modifier; 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecSrc1 = (q15_t const *) pSrc1; 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecDst1 = pDst1; 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** blkCnt = fftLen >> 3; 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** while (blkCnt > 0U) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd0 = vldrhq_gather_shifted_offset(pCoefA, vecStridesFwd); 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd1 = vldrhq_gather_shifted_offset(&pCoefA[1], vecStridesFwd); 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecIn = vld2q(pVecSrc1); 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecSrc1 += 16; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR = *pSrc1 * CoefA1; 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vmulhq(vecIn.val[0], vecCoefFwd0); 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI = -(*pSrc1++) * CoefA2; 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecIn.val[0] = vnegq(vecIn.val[0]); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vmulhq(vecIn.val[0], vecCoefFwd1); 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(pSrc2, vecStridesBkwd); 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR += (*pSrc1 + *pSrc2) * CoefA2; 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vqaddq(vecIn.val[1], vecInBkwd); 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd1)); 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** ARM GAS /tmp/ccfbYRip.s page 924 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(pSrc2, vecStridesBkwd); 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI += *pSrc1++ * CoefA1; 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vmulhq(vecIn.val[1], vecCoefFwd0)); 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecCoefFwd0 = vldrhq_gather_shifted_offset(pCoefB, vecStridesFwd); 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI -= *pSrc2-- * CoefB1; 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd0)); 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecInBkwd = vldrhq_gather_shifted_offset(&pSrc2[-1], vecStridesBkwd); 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outI += *pSrc2 * CoefA2; 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd1)); 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * outR += *pSrc2-- * CoefB1; 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd0)); 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vst2q(pVecDst1, vecSum); 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pVecDst1 += 16; 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** * update fwd and backwd offsets 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** vecStridesFwd = vecStridesFwd + (uint16_t)(modifier * 16U); 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* cannot use negative 16-bit offsets (would lead to positive 32-65K jump*/ 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** //vecStridesBkwd = vecStridesBkwd - (uint16_t)16; 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 = pSrc2 - 16; 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** blkCnt--; 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** void arm_split_rifft_q15( 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pSrc, 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t fftLen, 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pATable, 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t * pBTable, 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t * pDst, 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t modifier) 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; /* Loop Counter */ 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q31_t outR, outI; /* Temporary variables for output */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pSrc1, *pSrc2; 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** q15_t *pDst1 = &pDst[0]; 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = &pATable[0]; 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = &pBTable[0]; 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc1 = &pSrc[0]; 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 = &pSrc[2 * fftLen]; 29669 .loc 38 514 0 29670 0042 01EB850A add r10, r1, r5, lsl #2 ARM GAS /tmp/ccfbYRip.s page 925 29671 .LVL3276: 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** i = fftLen; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** while (i > 0U) 29672 .loc 38 517 0 29673 0046 F5B1 cbz r5, .L1606 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = ( pIn[2 * i] * pATable[2 * i] 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * i + 1] * pATable[2 * i + 1] 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i] 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * i] * pATable[2 * i + 1] 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** */ 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #if defined (ARM_MATH_DSP) 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)); 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */ 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB))); 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * p 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U; 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB)); 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */ 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI); 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI); 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write output */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16)); 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16)); 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else /* #if defined (ARM_MATH_DSP) */ 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = *pSrc2 * *pCoefB; 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1)); 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = outR + (*pSrc1 * *pCoefA); 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16; 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** ARM GAS /tmp/ccfbYRip.s page 926 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = *(pSrc1 + 1) * *pCoefA; 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI - (*pSrc1 * *(pCoefA + 1)); 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI - (*pSrc2 * *(pCoefB + 1)); 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** outI = outI - (*(pSrc2 + 1) * *(pCoefB)); 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* update input pointers */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc1 += 2U; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pSrc2 -= 2U; 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* write output */ 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pDst1++ = (q15_t) outR; 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** *pDst1++ = (q15_t) (outI >> 16); 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** /* update coefficient pointer */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefB = pCoefB + (2 * modifier); 29674 .loc 38 585 0 29675 0048 4FEA8309 lsl r9, r3, #2 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29676 .loc 38 508 0 29677 004c A346 mov fp, r4 29678 .LVL3277: 29679 .L1607: 29680 .LBB2954: 29681 .LBB2955: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 29682 .loc 6 909 0 29683 004e 5AF80419 ldr r1, [r10], #-4 @ unaligned 29684 .LVL3278: 29685 .LBE2955: 29686 .LBE2954: 29687 .LBB2956: 29688 .LBB2957: 29689 0052 DEF80030 ldr r3, [lr] @ unaligned 29690 .LVL3279: 29691 .LBE2957: 29692 .LBE2956: 29693 .LBB2958: 29694 .LBB2959: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29695 .loc 5 2043 0 29696 .syntax unified 29697 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29698 0056 41FB03F0 smusd r0, r1, r3 29699 @ 0 "" 2 29700 .LVL3280: 29701 .thumb 29702 .syntax unified 29703 .LBE2959: 29704 .LBE2958: 29705 .LBB2960: 29706 .LBB2961: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 29707 .loc 6 909 0 29708 005a 57F804CB ldr ip, [r7], #4 @ unaligned 29709 .LVL3281: ARM GAS /tmp/ccfbYRip.s page 927 29710 .LBE2961: 29711 .LBE2960: 29712 .LBB2962: 29713 .LBB2963: 29714 005e D8F80020 ldr r2, [r8] @ unaligned 29715 .LVL3282: 29716 .LBE2963: 29717 .LBE2962: 29718 .LBB2964: 29719 .LBB2965: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29720 .loc 5 1993 0 29721 .syntax unified 29722 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29723 0062 2CFB0200 smlad r0, ip, r2, r0 29724 @ 0 "" 2 29725 .LVL3283: 29726 .thumb 29727 .syntax unified 29728 .LBE2965: 29729 .LBE2964: 29730 .LBB2966: 29731 .LBB2967: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 29732 .loc 5 1985 0 29733 .syntax unified 29734 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29735 0066 21FB13F3 smuadx r3, r1, r3 29736 @ 0 "" 2 29737 .LVL3284: 29738 .thumb 29739 .syntax unified 29740 .LBE2967: 29741 .LBE2966: 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 29742 .loc 38 549 0 29743 006a 5B42 negs r3, r3 29744 .LVL3285: 29745 .LBB2968: 29746 .LBB2969: 2052:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2053:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2054:Drivers/CMSIS/Include/cmsis_gcc.h **** 2055:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) 2056:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2058:Drivers/CMSIS/Include/cmsis_gcc.h **** 2059:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2060:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2061:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2062:Drivers/CMSIS/Include/cmsis_gcc.h **** 2063:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) 2064:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2065:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2066:Drivers/CMSIS/Include/cmsis_gcc.h **** 2067:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 29747 .loc 5 2067 0 ARM GAS /tmp/ccfbYRip.s page 928 29748 .syntax unified 29749 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 29750 006c 42FB1C32 smlsdx r2, r2, ip, r3 29751 @ 0 "" 2 29752 .LVL3286: 29753 .thumb 29754 .syntax unified 29755 .LBE2969: 29756 .LBE2968: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 29757 .loc 38 556 0 29758 0070 130C lsrs r3, r2, #16 29759 0072 1B04 lsls r3, r3, #16 29760 0074 43EA1043 orr r3, r3, r0, lsr #16 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29761 .loc 38 517 0 29762 0078 013D subs r5, r5, #1 29763 .LVL3287: 29764 .LBB2970: 29765 .LBB2971: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 29766 .loc 6 969 0 29767 007a 4BF8043B str r3, [fp], #4 @ unaligned 29768 .LVL3288: 29769 .LBE2971: 29770 .LBE2970: 29771 .loc 38 585 0 29772 007e CE44 add lr, lr, r9 29773 .LVL3289: 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = pCoefA + (2 * modifier); 29774 .loc 38 586 0 29775 0080 C844 add r8, r8, r9 29776 .LVL3290: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29777 .loc 38 517 0 29778 0082 E4D1 bne .L1607 29779 0084 3279 ldrb r2, [r6, #4] @ zero_extendqisi2 29780 .LVL3291: 29781 .L1606: 29782 .LBE2953: 29783 .LBE2952: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29784 .loc 38 96 0 29785 0086 7379 ldrb r3, [r6, #5] @ zero_extendqisi2 29786 0088 0398 ldr r0, [sp, #12] 29787 008a 2146 mov r1, r4 29788 008c FFF7FEFF bl arm_cfft_q15 29789 .LVL3292: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29790 .loc 38 98 0 29791 0090 3268 ldr r2, [r6] 29792 0092 002A cmp r2, #0 29793 0094 CFD0 beq .L1604 29794 0096 023C subs r4, r4, #2 29795 .LVL3293: 29796 0098 04EB4202 add r2, r4, r2, lsl #1 29797 .LVL3294: ARM GAS /tmp/ccfbYRip.s page 929 29798 .L1610: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 29799 .loc 38 100 0 discriminator 3 29800 009c 34F9023F ldrsh r3, [r4, #2]! 29801 00a0 5B00 lsls r3, r3, #1 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29802 .loc 38 98 0 discriminator 3 29803 00a2 A242 cmp r2, r4 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 29804 .loc 38 100 0 discriminator 3 29805 00a4 2380 strh r3, [r4] @ movhi 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 29806 .loc 38 98 0 discriminator 3 29807 00a6 F9D1 bne .L1610 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 29808 .loc 38 114 0 29809 00a8 05B0 add sp, sp, #20 29810 .LCFI394: 29811 .cfi_def_cfa_offset 36 29812 @ sp needed 29813 00aa BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 29814 .cfi_endproc 29815 .LFE231: 29817 00ae 00BF .section .text.arm_dct4_q15,"ax",%progbits 29818 .align 1 29819 .p2align 2,,3 29820 .global arm_dct4_q15 29821 .syntax unified 29822 .thumb 29823 .thumb_func 29824 .fpu fpv4-sp-d16 29826 arm_dct4_q15: 29827 .LFB199: 29828 .file 39 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Title: arm_dct4_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Description: Processing function of DCT4 & IDCT4 Q15 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT ARM GAS /tmp/ccfbYRip.s page 930 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @addtogroup DCT4_IDCT4 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @{ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @brief Processing function for the Q15 DCT4/IDCT4. 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @param[in] S points to an instance of the Q15 DCT4 structure. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @param[in] pState points to state buffer. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @param[in,out] pInlineBuffer points to the in-place input and output buffer. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @return none 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** @par Input an output formats 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** Internally inputs are downscaled in the RFFT process function to avoid overflows 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** Number of bits downscaled, depends on the size of the transform. The input and o 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** formats for different DCT sizes and number of bits to upscale are mentioned in t 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** \image html dct4FormatsQ15Table.gif 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** void arm_dct4_q15( 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** const arm_dct4_instance_q15 * S, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** q15_t * pState, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** q15_t * pInlineBuffer) 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 29829 .loc 39 55 0 29830 .cfi_startproc 29831 @ args = 0, pretend = 0, frame = 0 29832 @ frame_needed = 0, uses_anonymous_args = 0 29833 .LVL3295: 29834 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 29835 .LCFI395: 29836 .cfi_def_cfa_offset 40 29837 .cfi_offset 3, -40 29838 .cfi_offset 4, -36 29839 .cfi_offset 5, -32 29840 .cfi_offset 6, -28 29841 .cfi_offset 7, -24 29842 .cfi_offset 8, -20 29843 .cfi_offset 9, -16 29844 .cfi_offset 10, -12 29845 .cfi_offset 11, -8 29846 .cfi_offset 14, -4 29847 .loc 39 55 0 29848 0004 0546 mov r5, r0 29849 0006 1746 mov r7, r2 29850 0008 0E46 mov r6, r1 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** const q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** const q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** q15_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and p ARM GAS /tmp/ccfbYRip.s page 931 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** q15_t in; /* Temporary variable */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** uint32_t i; /* Loop counter */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* DCT4 computation involves DCT2 (which is calculated using RFFT) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * along with some pre-processing and post-processing. 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Computational procedure is explained as follows: 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * (a) Pre-processing involves multiplying input with cos factor, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * where, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * r(n) -- output of preprocessing 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * u(n) -- input to preprocessing(actual Source buffer) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * (b) Calculation of DCT2 using FFT is divided into three steps: 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step1: Re-ordering of even and odd elements of input. 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step2: Calculating FFT of the re-ordered input. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step3: Taking the real part of the product of FFT output and weights. 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * where, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Y4 -- DCT4 output, Y2 -- DCT2 output 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * (d) Multiplying the output with the normalizing factor sqrt(2/N). 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /*-------- Pre-processing ------------*/ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N); 29851 .loc 39 84 0 29852 000a 0388 ldrh r3, [r0] 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** const q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 29853 .loc 39 56 0 29854 000c D0E90281 ldrd r8, r1, [r0, #8] 29855 .LVL3296: 29856 .loc 39 84 0 29857 0010 1046 mov r0, r2 29858 .LVL3297: 29859 0012 FFF7FEFF bl arm_mult_q15 29860 .LVL3298: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N); 29861 .loc 39 85 0 29862 0016 2B88 ldrh r3, [r5] 29863 0018 3A46 mov r2, r7 29864 001a 3846 mov r0, r7 29865 001c 0121 movs r1, #1 29866 001e FFF7FEFF bl arm_shift_q15 29867 .LVL3299: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* ---------------------------------------------------------------- 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step1: Re-ordering of even and odd elements as 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * pState[i] = pInlineBuffer[2*i] and 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** ---------------------------------------------------------------------*/ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS1 initialized to pState */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1 = pState; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS2 = pState + (S->N - 1U); ARM GAS /tmp/ccfbYRip.s page 932 29868 .loc 39 97 0 29869 0022 2988 ldrh r1, [r5] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to input buffer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->Nby2 >> 2U; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Re-ordering of even and odd elements */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState[i] = pInlineBuffer[2*i] */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS1++ = *pbuff++; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS2-- = *pbuff++; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS1++ = *pbuff++; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS2-- = *pbuff++; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS1++ = *pbuff++; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS2-- = *pbuff++; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS1++ = *pbuff++; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS2-- = *pbuff++; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement loop counter */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to input buffer */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS1 initialized to pState */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1 = pState; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->N >> 2U; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Compute 4 outputs at a time */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Writing the re-ordered output back to inplace input buffer */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = *pS1++; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = *pS1++; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = *pS1++; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = *pS1++; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement the loop counter */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); ARM GAS /tmp/ccfbYRip.s page 933 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* --------------------------------------------------------- 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step2: Calculate RFFT for N-point input 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * ---------------------------------------------------------- */ 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_rfft_q15 (S->pRfft, pInlineBuffer, pState); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /*---------------------------------------------------------------------- 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step3: Multiply the FFT output with the weights. 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *----------------------------------------------------------------------*/ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* The output of complex multiplication is in 3.13 format. 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_shift_q15 (pState, 2, pState, S->N * 2); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* ----------- Post-processing ---------- */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* DCT-IV can be obtained from DCT-II by the equation, 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Hence, Y4(0) = Y2(0)/2 */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Getting only real part from the output and Converting to DCT-IV */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = (S->N - 1U) >> 2U; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to input buffer. */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS1 initialized to pState */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1 = pState; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ >> 1U; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* points to the next real value */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; ARM GAS /tmp/ccfbYRip.s page 934 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement the loop counter */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** ** No loop unrolling is used. */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = (S->N - 1U) % 0x4U; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** while (i > 0U) 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* points to the next real value */ 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement loop counter */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->N >> 2U; 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to the pInlineBuffer(now contains the output values) */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a t 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pbuff; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pbuff; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pbuff; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pbuff; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement loop counter */ 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** ARM GAS /tmp/ccfbYRip.s page 935 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** #else 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter to N/2 */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->Nby2; 29870 .loc 39 271 0 29871 0024 6A88 ldrh r2, [r5, #2] 29872 .LVL3300: 29873 0026 07F1040C add ip, r7, #4 29874 002a 06EB4101 add r1, r6, r1, lsl #1 29875 002e 6346 mov r3, ip 29876 0030 B01E subs r0, r6, #2 29877 .LVL3301: 29878 .L1620: 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Re-ordering of even and odd elements */ 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState[i] = pInlineBuffer[2*i] */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS1++ = *pbuff++; 29879 .loc 39 277 0 discriminator 1 29880 0032 33F9044C ldrsh r4, [r3, #-4] 29881 0036 20F8024F strh r4, [r0, #2]! @ movhi 29882 .LVL3302: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pS2-- = *pbuff++; 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement the loop counter */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 29883 .loc 39 283 0 discriminator 1 29884 003a 013A subs r2, r2, #1 29885 .LVL3303: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 29886 .loc 39 279 0 discriminator 1 29887 003c 33F9024C ldrsh r4, [r3, #-2] 29888 0040 21F8024D strh r4, [r1, #-2]! @ movhi 29889 .LVL3304: 29890 0044 03F10403 add r3, r3, #4 29891 .LVL3305: 29892 .loc 39 283 0 discriminator 1 29893 0048 F3D1 bne .L1620 29894 .LVL3306: 29895 004a 331D adds r3, r6, #4 29896 004c 6645 cmp r6, ip 29897 004e 38BF it cc 29898 0050 9F42 cmpcc r7, r3 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to input buffer */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS1 initialized to pState */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1 = pState; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->N; 29899 .loc 39 292 0 ARM GAS /tmp/ccfbYRip.s page 936 29900 0052 2A88 ldrh r2, [r5] 29901 .LVL3307: 29902 0054 6CD3 bcc .L1621 29903 0056 0D2A cmp r2, #13 29904 0058 6AD9 bls .L1621 29905 005a C6F34003 ubfx r3, r6, #1, #1 29906 005e 591C adds r1, r3, #1 29907 .LVL3308: 29908 0060 02F1FF3E add lr, r2, #-1 29909 0064 8E45 cmp lr, r1 29910 0066 6DD3 bcc .L1630 29911 0068 002B cmp r3, #0 29912 006a 5CD0 beq .L1631 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Writing the re-ordered output back to inplace input buffer */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = *pS1++; 29913 .loc 39 297 0 29914 006c BC1C adds r4, r7, #2 29915 006e B6F90010 ldrsh r1, [r6] 29916 0072 3980 strh r1, [r7] @ movhi 29917 0074 2046 mov r0, r4 29918 0076 06F1020C add ip, r6, #2 29919 .LVL3309: 29920 .L1623: 29921 007a A2EB0309 sub r9, r2, r3 29922 007e A9F10201 sub r1, r9, #2 29923 0082 5B00 lsls r3, r3, #1 29924 0084 4908 lsrs r1, r1, #1 29925 0086 06EB030A add r10, r6, r3 29926 008a 0131 adds r1, r1, #1 29927 008c 3B44 add r3, r3, r7 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 29928 .loc 39 292 0 29929 008e 0022 movs r2, #0 29930 .LVL3310: 29931 .L1624: 29932 0090 0132 adds r2, r2, #1 29933 .loc 39 297 0 discriminator 1 29934 0092 5AF804BB ldr fp, [r10], #4 29935 0096 43F804BB str fp, [r3], #4 @ unaligned 29936 009a 9142 cmp r1, r2 29937 009c F8D8 bhi .L1624 29938 009e 4B00 lsls r3, r1, #1 29939 00a0 9945 cmp r9, r3 29940 00a2 4FEA8101 lsl r1, r1, #2 29941 00a6 8C44 add ip, ip, r1 29942 00a8 AEEB0302 sub r2, lr, r3 29943 00ac 0144 add r1, r1, r0 29944 00ae 07D0 beq .L1627 29945 .L1622: 29946 .LVL3311: 29947 .loc 39 297 0 is_stmt 0 29948 00b0 BCF90030 ldrsh r3, [ip] 29949 00b4 0B80 strh r3, [r1] @ movhi 29950 .LVL3312: ARM GAS /tmp/ccfbYRip.s page 937 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement the loop counter */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 29951 .loc 39 301 0 is_stmt 1 29952 00b6 012A cmp r2, #1 29953 00b8 02D0 beq .L1627 29954 .LVL3313: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 29955 .loc 39 297 0 29956 00ba BCF90230 ldrsh r3, [ip, #2] 29957 00be 4B80 strh r3, [r1, #2] @ movhi 29958 .LVL3314: 29959 .L1627: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* --------------------------------------------------------- 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step2: Calculate RFFT for N-point input 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * ---------------------------------------------------------- */ 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_rfft_q15 (S->pRfft, pInlineBuffer, pState); 29960 .loc 39 308 0 29961 00c0 3246 mov r2, r6 29962 00c2 3946 mov r1, r7 29963 00c4 2869 ldr r0, [r5, #16] 29964 00c6 FFF7FEFF bl arm_rfft_q15 29965 .LVL3315: 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /*---------------------------------------------------------------------- 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Step3: Multiply the FFT output with the weights. 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *----------------------------------------------------------------------*/ 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N); 29966 .loc 39 313 0 29967 00ca 4146 mov r1, r8 29968 00cc 2B88 ldrh r3, [r5] 29969 00ce 3246 mov r2, r6 29970 00d0 3046 mov r0, r6 29971 00d2 FFF7FEFF bl arm_cmplx_mult_cmplx_q15 29972 .LVL3316: 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* The output of complex multiplication is in 3.13 format. 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** arm_shift_q15 (pState, 2, pState, S->N * 2); 29973 .loc 39 317 0 29974 00d6 2B88 ldrh r3, [r5] 29975 00d8 3246 mov r2, r6 29976 00da 5B00 lsls r3, r3, #1 29977 00dc 0221 movs r1, #2 29978 00de 3046 mov r0, r6 29979 00e0 FFF7FEFF bl arm_shift_q15 29980 .LVL3317: 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* ----------- Post-processing ---------- */ 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* DCT-IV can be obtained from DCT-II by the equation, 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** * Hence, Y4(0) = Y2(0)/2 */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Getting only real part from the output and Converting to DCT-IV */ ARM GAS /tmp/ccfbYRip.s page 938 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to input buffer. */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pS1 initialized to pState */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1 = pState; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ >> 1U; 29981 .loc 39 332 0 29982 00e4 3246 mov r2, r6 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 29983 .loc 39 334 0 29984 00e6 2046 mov r0, r4 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 29985 .loc 39 332 0 29986 00e8 32F9083B ldrsh r3, [r2], #8 29987 00ec 5B10 asrs r3, r3, #1 29988 .LVL3318: 29989 .loc 39 334 0 29990 00ee 3B80 strh r3, [r7] @ movhi 29991 .LVL3319: 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing the loop counter */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = (S->N - 1U); 29992 .loc 39 340 0 29993 00f0 2988 ldrh r1, [r5] 29994 00f2 0139 subs r1, r1, #1 29995 .LVL3320: 29996 .L1628: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pS1++ - in; 29997 .loc 39 346 0 discriminator 1 29998 00f4 32F8046C ldrh r6, [r2, #-4] 29999 00f8 F31A subs r3, r6, r3 30000 .LVL3321: 30001 00fa 1BB2 sxth r3, r3 30002 .LVL3322: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* points to the next real value */ 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pS1++; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement loop counter */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 30003 .loc 39 354 0 discriminator 1 30004 00fc 0139 subs r1, r1, #1 30005 .LVL3323: ARM GAS /tmp/ccfbYRip.s page 939 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = in; 30006 .loc 39 347 0 discriminator 1 30007 00fe 20F8023B strh r3, [r0], #2 @ movhi 30008 .LVL3324: 30009 0102 02F10402 add r2, r2, #4 30010 .LVL3325: 30011 .loc 39 354 0 discriminator 1 30012 0106 F5D1 bne .L1628 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Initializing loop counter */ 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i = S->N; 30013 .loc 39 359 0 30014 0108 2A88 ldrh r2, [r5] 30015 .LVL3326: 30016 010a 00E0 b .L1629 30017 .LVL3327: 30018 .L1648: 30019 010c 0234 adds r4, r4, #2 30020 .LVL3328: 30021 .L1629: 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* pbuff initialized to the pInlineBuffer (now contains the output values) */ 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** pbuff = pInlineBuffer; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** do 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** { 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** in = *pbuff; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); 30022 .loc 39 368 0 discriminator 1 30023 010e 3B88 ldrh r3, [r7] 30024 0110 A988 ldrh r1, [r5, #4] 30025 0112 13FB01F3 smulbb r3, r3, r1 30026 0116 DB13 asrs r3, r3, #15 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** /* Decrement loop counter */ 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** i--; 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } while (i > 0U); 30027 .loc 39 373 0 discriminator 1 30028 0118 013A subs r2, r2, #1 30029 .LVL3329: 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 30030 .loc 39 368 0 discriminator 1 30031 011a 24F8023C strh r3, [r4, #-2] @ movhi 30032 .LVL3330: 30033 011e 2746 mov r7, r4 30034 .LVL3331: 30035 .loc 39 373 0 discriminator 1 30036 0120 F4D1 bne .L1648 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** } 30037 .loc 39 377 0 ARM GAS /tmp/ccfbYRip.s page 940 30038 0122 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 30039 .LVL3332: 30040 .L1631: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 30041 .loc 39 292 0 30042 0126 9646 mov lr, r2 30043 0128 3846 mov r0, r7 30044 012a B446 mov ip, r6 30045 012c BC1C adds r4, r7, #2 30046 012e A4E7 b .L1623 30047 .LVL3333: 30048 .L1621: 30049 0130 B91E subs r1, r7, #2 30050 .LVL3334: 30051 0132 3346 mov r3, r6 30052 .LVL3335: 30053 .L1626: 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 30054 .loc 39 297 0 30055 0134 33F9020B ldrsh r0, [r3], #2 30056 .LVL3336: 30057 0138 21F8020F strh r0, [r1, #2]! @ movhi 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 30058 .loc 39 301 0 30059 013c 013A subs r2, r2, #1 30060 .LVL3337: 30061 013e F9D1 bne .L1626 30062 0140 BC1C adds r4, r7, #2 30063 0142 BDE7 b .L1627 30064 .LVL3338: 30065 .L1630: 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c **** 30066 .loc 39 292 0 30067 0144 3946 mov r1, r7 30068 0146 B446 mov ip, r6 30069 0148 BC1C adds r4, r7, #2 30070 014a B1E7 b .L1622 30071 .cfi_endproc 30072 .LFE199: 30074 .section .text.arm_split_rifft_q15,"ax",%progbits 30075 .align 1 30076 .p2align 2,,3 30077 .global arm_split_rifft_q15 30078 .syntax unified 30079 .thumb 30080 .thumb_func 30081 .fpu fpv4-sp-d16 30083 arm_split_rifft_q15: 30084 .LFB233: 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; /* Loop Counter */ 30085 .loc 38 503 0 30086 .cfi_startproc 30087 @ args = 8, pretend = 0, frame = 0 30088 @ frame_needed = 0, uses_anonymous_args = 0 30089 .LVL3339: 30090 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 30091 .LCFI396: ARM GAS /tmp/ccfbYRip.s page 941 30092 .cfi_def_cfa_offset 32 30093 .cfi_offset 4, -32 30094 .cfi_offset 5, -28 30095 .cfi_offset 6, -24 30096 .cfi_offset 7, -20 30097 .cfi_offset 8, -16 30098 .cfi_offset 9, -12 30099 .cfi_offset 10, -8 30100 .cfi_offset 14, -4 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** uint32_t i; /* Loop Counter */ 30101 .loc 38 503 0 30102 0004 DDF820E0 ldr lr, [sp, #32] 30103 .LVL3340: 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 30104 .loc 38 514 0 30105 0008 00EB810C add ip, r0, r1, lsl #2 30106 .LVL3341: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 30107 .loc 38 517 0 30108 000c D9B1 cbz r1, .L1649 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = pCoefA + (2 * modifier); 30109 .loc 38 585 0 30110 000e 099C ldr r4, [sp, #36] 30111 0010 A700 lsls r7, r4, #2 30112 .LVL3342: 30113 .L1651: 30114 .LBB2972: 30115 .LBB2973: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 30116 .loc 6 909 0 30117 0012 5CF80469 ldr r6, [ip], #-4 @ unaligned 30118 .LVL3343: 30119 .LBE2973: 30120 .LBE2972: 30121 .LBB2974: 30122 .LBB2975: 30123 0016 D3F800A0 ldr r10, [r3] @ unaligned 30124 .LVL3344: 30125 .LBE2975: 30126 .LBE2974: 30127 .LBB2976: 30128 .LBB2977: 2043:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 30129 .loc 5 2043 0 30130 .syntax unified 30131 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30132 001a 46FB0AF4 smusd r4, r6, r10 30133 @ 0 "" 2 30134 .LVL3345: 30135 .thumb 30136 .syntax unified 30137 .LBE2977: 30138 .LBE2976: 30139 .LBB2978: 30140 .LBB2979: 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 30141 .loc 6 909 0 ARM GAS /tmp/ccfbYRip.s page 942 30142 001e 50F8049B ldr r9, [r0], #4 @ unaligned 30143 .LVL3346: 30144 .LBE2979: 30145 .LBE2978: 30146 .LBB2980: 30147 .LBB2981: 30148 0022 1568 ldr r5, [r2] @ unaligned 30149 .LVL3347: 30150 .LBE2981: 30151 .LBE2980: 30152 .LBB2982: 30153 .LBB2983: 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 30154 .loc 5 1993 0 30155 .syntax unified 30156 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30157 0024 29FB0548 smlad r8, r9, r5, r4 30158 @ 0 "" 2 30159 .LVL3348: 30160 .thumb 30161 .syntax unified 30162 .LBE2983: 30163 .LBE2982: 30164 .LBB2984: 30165 .LBB2985: 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 30166 .loc 5 1985 0 30167 .syntax unified 30168 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30169 0028 26FB1AF6 smuadx r6, r6, r10 30170 @ 0 "" 2 30171 .LVL3349: 30172 .thumb 30173 .syntax unified 30174 .LBE2985: 30175 .LBE2984: 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 30176 .loc 38 549 0 30177 002c 7442 negs r4, r6 30178 .LVL3350: 30179 .LBB2986: 30180 .LBB2987: 30181 .loc 5 2067 0 30182 .syntax unified 30183 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 30184 002e 45FB1945 smlsdx r5, r5, r9, r4 30185 @ 0 "" 2 30186 .LVL3351: 30187 .thumb 30188 .syntax unified 30189 .LBE2987: 30190 .LBE2986: 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** #else 30191 .loc 38 556 0 30192 0032 2C0C lsrs r4, r5, #16 30193 0034 2404 lsls r4, r4, #16 30194 0036 44EA1844 orr r4, r4, r8, lsr #16 ARM GAS /tmp/ccfbYRip.s page 943 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 30195 .loc 38 517 0 30196 003a 0139 subs r1, r1, #1 30197 .LVL3352: 30198 .LBB2988: 30199 .LBB2989: 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 30200 .loc 6 969 0 30201 003c 4EF8044B str r4, [lr], #4 @ unaligned 30202 .LVL3353: 30203 .LBE2989: 30204 .LBE2988: 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** pCoefA = pCoefA + (2 * modifier); 30205 .loc 38 585 0 30206 0040 3B44 add r3, r3, r7 30207 .LVL3354: 30208 .loc 38 586 0 30209 0042 3A44 add r2, r2, r7 30210 .LVL3355: 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** { 30211 .loc 38 517 0 30212 0044 E5D1 bne .L1651 30213 .LVL3356: 30214 .L1649: 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** i--; 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c **** } 30215 .loc 38 591 0 30216 0046 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 30217 .cfi_endproc 30218 .LFE233: 30220 004a 00BF .section .text.arm_split_rfft_q31,"ax",%progbits 30221 .align 1 30222 .p2align 2,,3 30223 .global arm_split_rfft_q31 30224 .syntax unified 30225 .thumb 30226 .thumb_func 30227 .fpu fpv4-sp-d16 30229 arm_split_rfft_q31: 30230 .LFB235: 30231 .file 40 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Title: arm_rfft_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Description: FFT & RIFFT Q31 process function 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * ARM GAS /tmp/ccfbYRip.s page 944 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* ---------------------------------------------------------------------- 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Internal functions prototypes 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * -------------------------------------------------------------------- */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rfft_q31( 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pATable, 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pBTable, 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst, 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier); 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rifft_q31( 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pATable, 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pBTable, 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst, 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier); 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @addtogroup RealFFT 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @{ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @brief Processing function for the Q31 RFFT/RIFFT. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] S points to an instance of the Q31 RFFT/RIFFT structure 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pSrc points to input buffer (Source buffer is modified by this function) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[out] pDst points to output buffer 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @return none 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @par Input an output formats 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** Internally input is downscaled by 2 for every stage to avoid saturations inside 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** Hence the output format is different for different RFFT sizes. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** The input and output formats for different RFFT sizes and number of bits to upsc 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @par 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT" 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @par 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT" ARM GAS /tmp/ccfbYRip.s page 945 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @par 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** If the input buffer is of length N, the output buffer must have length 2*N. 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** The input buffer is modified by this function. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_rfft_q31( 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const arm_rfft_instance_q31 * S, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const arm_cfft_instance_q31 *S_CFFT = &(S->cfftInst); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #else 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const arm_cfft_instance_q31 *S_CFFT = S->pCfft; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #endif 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t L2 = S->fftLenReal >> 1U; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Calculation of RIFFT of input */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** if (S->ifftFlagR == 1U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Real IFFT core process */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Complex IFFT process */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** for(i = 0; i < S->fftLenReal; i++) 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[i] = pDst[i] << 1U; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** else 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Calculation of RFFT of input */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Complex FFT process */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Real FFT core process */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @} end of RealFFT group 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @brief Core Real FFT process 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pSrc points to input buffer 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] fftLen length of FFT 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pATable points to twiddle Coef A buffer 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pBTable points to twiddle Coef B buffer 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[out] pDst points to output buffer 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the ARM GAS /tmp/ccfbYRip.s page 946 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @return none 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rfft_q31( 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pSrc, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t *pATable, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t *pBTable, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pDst, 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier) 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U]; /* temp pointers for 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pVecSrc1; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pVecDst1; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31x4x2_t vecIn, vecSum; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t blkCnt; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32x4_t vecStridesFwd, vecStridesBkwd; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31x4_t vecInBkwd, vecCoefFwd0, vecCoefFwd1; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Init coefficient pointers 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = &pATable[modifier * 2U]; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = &pBTable[modifier * 2U]; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * scatter / gather offsets 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * for ascending & descending addressing 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vidupq_u32((uint32_t)0, 2); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesBkwd = -vecStridesFwd; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vecStridesFwd * modifier; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecSrc1 = (q31_t const *) pSrc1; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecDst1 = pDst1; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** blkCnt = fftLen >> 2; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** while (blkCnt > 0U) 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd0 = vldrwq_gather_shifted_offset(pCoefA, vecStridesFwd); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd1 = vldrwq_gather_shifted_offset(&pCoefA[1], vecStridesFwd); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecIn = vld2q(pVecSrc1); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecSrc1 += 8; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR = *pSrc1 * CoefA1; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vmulhq(vecIn.val[0], vecCoefFwd0); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI = *pSrc1++ * CoefA2; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vmulhq(vecIn.val[0], vecCoefFwd1); 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(pSrc2, vecStridesBkwd); 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* ARM GAS /tmp/ccfbYRip.s page 947 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR -= (*pSrc1 + *pSrc2) * CoefA2; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vqaddq(vecIn.val[1], vecInBkwd); 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vqsubq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd1)); 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(pSrc2, vecStridesBkwd); 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI += *pSrc1++ * CoefA1; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vmulhq(vecIn.val[1], vecCoefFwd0)); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd0 = vldrwq_gather_shifted_offset(pCoefB, vecStridesFwd); 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI -= *pSrc2-- * CoefB1; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd0)); 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(&pSrc2[-1], vecStridesBkwd); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI -= *pSrc2 * CoefA2; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd1)); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR += *pSrc2-- * CoefB1; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd0)); 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vst2q(pVecDst1, vecSum); 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecDst1 += 8; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * write complex conjugate output 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = -vecSum.val[1]; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vstrwq_scatter_shifted_offset(pDst2, vecStridesBkwd, vecSum.val[1]); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vstrwq_scatter_shifted_offset(&pDst2[-1], vecStridesBkwd, vecSum.val[0]); 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * update fwd and backwd offsets 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vecStridesFwd + (modifier * 8U); 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesBkwd = vecStridesBkwd - 8; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** blkCnt--; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[(2U * fftLen) + 1U] = 0; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[0] = (pSrc[0] + pSrc[1]) >> 1; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[1] = 0; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #else 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rfft_q31( 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pATable, 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pBTable, 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst, ARM GAS /tmp/ccfbYRip.s page 948 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier) 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30232 .loc 40 243 0 30233 .cfi_startproc 30234 @ args = 8, pretend = 0, frame = 32 30235 @ frame_needed = 0, uses_anonymous_args = 0 30236 .LVL3357: 30237 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30238 .LCFI397: 30239 .cfi_def_cfa_offset 36 30240 .cfi_offset 4, -36 30241 .cfi_offset 5, -32 30242 .cfi_offset 6, -28 30243 .cfi_offset 7, -24 30244 .cfi_offset 8, -20 30245 .cfi_offset 9, -16 30246 .cfi_offset 10, -12 30247 .cfi_offset 11, -8 30248 .cfi_offset 14, -4 30249 0004 89B0 sub sp, sp, #36 30250 .LCFI398: 30251 .cfi_def_cfa_offset 72 30252 .LVL3358: 30253 .loc 40 243 0 30254 0006 139C ldr r4, [sp, #76] 30255 0008 0791 str r1, [sp, #28] 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; /* Loop Counter */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t outR, outI; /* Temporary variables for output */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficie 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1]; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1]; 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Init coefficient pointers */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = &pATable[modifier * 2]; 30256 .loc 40 252 0 30257 000a E400 lsls r4, r4, #3 30258 000c 02EB0409 add r9, r2, r4 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1]; 30259 .loc 40 248 0 30260 0010 0A46 mov r2, r1 30261 .LVL3359: 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = &pBTable[modifier * 2]; 30262 .loc 40 253 0 30263 0012 1D19 adds r5, r3, r4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = &pBTable[modifier * 2]; 30264 .loc 40 252 0 30265 0014 0494 str r4, [sp, #16] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1]; 30266 .loc 40 248 0 30267 0016 0B01 lsls r3, r1, #4 30268 .LVL3360: 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** i = fftLen - 1U; 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** while (i > 0U) 30269 .loc 40 257 0 ARM GAS /tmp/ccfbYRip.s page 949 30270 0018 541E subs r4, r2, #1 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30271 .loc 40 249 0 30272 001a 4FEAC101 lsl r1, r1, #3 30273 .LVL3361: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; /* Loop Counter */ 30274 .loc 40 243 0 30275 001e 0690 str r0, [sp, #24] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30276 .loc 40 249 0 30277 0020 0591 str r1, [sp, #20] 30278 .LVL3362: 30279 .loc 40 257 0 30280 0022 0394 str r4, [sp, #12] 30281 0024 00F08E80 beq .L1658 30282 0028 A1F10C02 sub r2, r1, #12 30283 .LVL3363: 30284 002c 1299 ldr r1, [sp, #72] 30285 .LVL3364: 30286 002e 0C3B subs r3, r3, #12 30287 .LVL3365: 30288 0030 01EB0308 add r8, r1, r3 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** outR = ( pSrc[2 * i] * pATable[2 * i] 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pSrc[2 * i + 1] * pATable[2 * i + 1] 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pSrc[2 * n - 2 * i] * pBTable[2 * i] 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pIn[2 * i] * pATable[2 * i + 1] 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefA1 = *pCoefA++; 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefA2 = *pCoefA; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* outR = (pSrc[2 * i] * pATable[2 * i] */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** mult_32x32_keep32_R (outR, *pIn1, CoefA1); 30289 .loc 40 275 0 30290 0034 CDE90189 strd r8, r9, [sp, #4] 30291 0038 129B ldr r3, [sp, #72] 30292 .LVL3366: 30293 003a 00EB020B add fp, r0, r2 30294 003e 00F1100A add r10, r0, #16 30295 0042 03F1100C add ip, r3, #16 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30296 .loc 40 257 0 30297 0046 4FF0000E mov lr, #0 30298 .LVL3367: 30299 .L1659: 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30300 .loc 40 272 0 30301 004a 029B ldr r3, [sp, #8] 30302 004c 03EB0E02 add r2, r3, lr 30303 .LVL3368: ARM GAS /tmp/ccfbYRip.s page 950 30304 .loc 40 275 0 30305 0050 5AF8083C ldr r3, [r10, #-8] 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30306 .loc 40 272 0 30307 0054 5468 ldr r4, [r2, #4] 30308 .LVL3369: 30309 .loc 40 275 0 30310 0056 029A ldr r2, [sp, #8] 30311 .LVL3370: 30312 0058 52F80E20 ldr r2, [r2, lr] 30313 005c 4FF00040 mov r0, #-2147483648 30314 0060 0021 movs r1, #0 30315 0062 C2FB0301 smlal r0, r1, r2, r3 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* outI = pIn[2 * i] * pATable[2 * i + 1] */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** mult_32x32_keep32_R (outI, *pIn1++, CoefA2); 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multSub_32x32_keep32_R (outR, *pIn1, CoefA2); 30316 .loc 40 281 0 30317 0066 5AF8042C ldr r2, [r10, #-4] 30318 006a 0020 movs r0, #0 30319 006c 84FB0267 smull r6, r7, r4, r2 30320 0070 801B subs r0, r0, r6 30321 0072 61EB0701 sbc r1, r1, r7 30322 0076 0F46 mov r7, r1 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30323 .loc 40 278 0 30324 0078 0022 movs r2, #0 30325 007a 4FF00041 mov r1, #-2147483648 30326 007e C4FB0312 smlal r1, r2, r4, r3 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* (pIn[2 * i + 1] * pATable[2 * i] */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1); 30327 .loc 40 284 0 30328 0082 029B ldr r3, [sp, #8] 30329 .LVL3371: 30330 0084 9146 mov r9, r2 30331 0086 53F80E30 ldr r3, [r3, lr] 30332 008a 5AF8042C ldr r2, [r10, #-4] 30333 008e 4FF00008 mov r8, #0 30334 0092 C2FB0389 smlal r8, r9, r2, r3 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30335 .loc 40 281 0 30336 0096 10F10040 adds r0, r0, #-2147483648 30337 .loc 40 284 0 30338 009a 4246 mov r2, r8 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30339 .loc 40 281 0 30340 009c 47F10001 adc r1, r7, #0 30341 .loc 40 284 0 30342 00a0 12F10042 adds r2, r2, #-2147483648 30343 00a4 49F10003 adc r3, r9, #0 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pSrc[2 * n - 2 * i] * pBTable[2 * i] */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multSub_32x32_keep32_R (outR, *pIn2, CoefA2); 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; ARM GAS /tmp/ccfbYRip.s page 951 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multSub_32x32_keep32_R (outI, *pIn2--, CoefB1); 30344 .loc 40 291 0 30345 00a8 55F80E20 ldr r2, [r5, lr] 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30346 .loc 40 287 0 30347 00ac 0F46 mov r7, r1 30348 .loc 40 291 0 30349 00ae 1946 mov r1, r3 30350 00b0 DBF80830 ldr r3, [fp, #8] 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30351 .loc 40 287 0 30352 00b4 0026 movs r6, #0 30353 .loc 40 291 0 30354 00b6 83FB0223 smull r2, r3, r3, r2 30355 00ba B01A subs r0, r6, r2 30356 00bc 61EB0301 sbc r1, r1, r3 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30357 .loc 40 287 0 30358 00c0 DBF80830 ldr r3, [fp, #8] 30359 .loc 40 291 0 30360 00c4 0A46 mov r2, r1 30361 00c6 10F10041 adds r1, r0, #-2147483648 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30362 .loc 40 287 0 30363 00ca 84FB0389 smull r8, r9, r4, r3 30364 .loc 40 291 0 30365 00ce 42F10002 adc r2, r2, #0 30366 00d2 1146 mov r1, r2 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30367 .loc 40 287 0 30368 00d4 B6EB0802 subs r2, r6, r8 30369 00d8 67EB0903 sbc r3, r7, r9 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outR, *pIn2, CoefB1); 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multSub_32x32_keep32_R (outI, *pIn2--, CoefA2); 30370 .loc 40 297 0 30371 00dc 0F46 mov r7, r1 30372 00de DBF80410 ldr r1, [fp, #4] 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30373 .loc 40 287 0 30374 00e2 12F10048 adds r8, r2, #-2147483648 30375 .loc 40 297 0 30376 00e6 4FF00006 mov r6, #0 30377 00ea 84FB0101 smull r0, r1, r4, r1 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30378 .loc 40 287 0 30379 00ee 43F10009 adc r9, r3, #0 30380 .loc 40 297 0 30381 00f2 301A subs r0, r6, r0 30382 00f4 67EB0101 sbc r1, r7, r1 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30383 .loc 40 294 0 ARM GAS /tmp/ccfbYRip.s page 952 30384 00f8 0023 movs r3, #0 30385 .loc 40 297 0 30386 00fa 10F10048 adds r8, r0, #-2147483648 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30387 .loc 40 294 0 30388 00fe 1A46 mov r2, r3 30389 0100 DBF80400 ldr r0, [fp, #4] 30390 0104 4B46 mov r3, r9 30391 .loc 40 297 0 30392 0106 41F10009 adc r9, r1, #0 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30393 .loc 40 294 0 30394 010a 55F80E10 ldr r1, [r5, lr] 30395 010e C0FB0123 smlal r2, r3, r0, r1 30396 0112 12F10046 adds r6, r2, #-2147483648 30397 0116 43F10007 adc r7, r3, #0 30398 .LVL3372: 30399 011a 049B ldr r3, [sp, #16] 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* write output */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pOut1++ = outR; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pOut1++ = outI; 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* write complex conjugate output */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pOut2-- = -outI; 30400 .loc 40 304 0 30401 011c 4946 mov r1, r9 30402 011e 9E44 add lr, lr, r3 30403 .LVL3373: 30404 0120 019B ldr r3, [sp, #4] 30405 0122 4842 negs r0, r1 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pOut1++ = outI; 30406 .loc 40 300 0 30407 0124 4CE90279 strd r7, r9, [ip, #-8] 30408 .LVL3374: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pOut2-- = outR; 30409 .loc 40 305 0 30410 0128 C3E90170 strd r7, r0, [r3, #4] 30411 .LVL3375: 30412 012c 083B subs r3, r3, #8 30413 012e 0193 str r3, [sp, #4] 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30414 .loc 40 257 0 30415 0130 039B ldr r3, [sp, #12] 30416 0132 013B subs r3, r3, #1 30417 .LVL3376: 30418 0134 0AF1080A add r10, r10, #8 30419 .LVL3377: 30420 0138 ABF1080B sub fp, fp, #8 30421 .LVL3378: 30422 013c 0CF1080C add ip, ip, #8 30423 0140 0393 str r3, [sp, #12] 30424 0142 82D1 bne .L1659 30425 .LVL3379: 30426 .L1658: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* update coefficient pointer */ ARM GAS /tmp/ccfbYRip.s page 953 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = pCoefB + (2 * modifier); 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = pCoefA + (2 * modifier - 1); 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Decrement loop count */ 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** i--; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; 30427 .loc 40 315 0 30428 0144 0698 ldr r0, [sp, #24] 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2 * fftLen + 1] = 0; 30429 .loc 40 316 0 30430 0146 1299 ldr r1, [sp, #72] 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2 * fftLen + 1] = 0; 30431 .loc 40 315 0 30432 0148 4268 ldr r2, [r0, #4] 30433 014a 0368 ldr r3, [r0] 30434 014c 079C ldr r4, [sp, #28] 30435 014e 9B1A subs r3, r3, r2 30436 .loc 40 316 0 30437 0150 059A ldr r2, [sp, #20] 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2 * fftLen + 1] = 0; 30438 .loc 40 315 0 30439 0152 5B10 asrs r3, r3, #1 30440 .loc 40 316 0 30441 0154 0A44 add r2, r2, r1 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[2 * fftLen + 1] = 0; 30442 .loc 40 315 0 30443 0156 41F83430 str r3, [r1, r4, lsl #3] 30444 .loc 40 316 0 30445 015a 0021 movs r1, #0 30446 015c 5160 str r1, [r2, #4] 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; 30447 .loc 40 318 0 30448 015e 0368 ldr r3, [r0] 30449 0160 4268 ldr r2, [r0, #4] 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[1] = 0; 30450 .loc 40 319 0 30451 0162 1298 ldr r0, [sp, #72] 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[1] = 0; 30452 .loc 40 318 0 30453 0164 1344 add r3, r3, r2 30454 0166 5B10 asrs r3, r3, #1 30455 .loc 40 319 0 30456 0168 4160 str r1, [r0, #4] 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pDst[1] = 0; 30457 .loc 40 318 0 30458 016a 0360 str r3, [r0] 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 30459 .loc 40 320 0 30460 016c 09B0 add sp, sp, #36 30461 .LCFI399: 30462 .cfi_def_cfa_offset 36 30463 @ sp needed 30464 016e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30465 .cfi_endproc ARM GAS /tmp/ccfbYRip.s page 954 30466 .LFE235: 30468 0172 00BF .section .text.arm_split_rifft_q31,"ax",%progbits 30469 .align 1 30470 .p2align 2,,3 30471 .global arm_split_rifft_q31 30472 .syntax unified 30473 .thumb 30474 .thumb_func 30475 .fpu fpv4-sp-d16 30477 arm_split_rifft_q31: 30478 .LFB236: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #endif /* defined(ARM_MATH_MVEI) */ 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /** 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @brief Core Real IFFT process 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pSrc points to input buffer 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] fftLen length of FFT 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pATable points to twiddle Coef A buffer 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] pBTable points to twiddle Coef B buffer 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[out] pDst points to output buffer 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** @return none 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rifft_q31( 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pATable, 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pBTable, 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst, 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier) 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U]; 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t const *pVecSrc1; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pVecDst; 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31x4x2_t vecIn, vecSum; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t blkCnt; 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32x4_t vecStridesFwd, vecStridesBkwd; 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31x4_t vecInBkwd, vecCoefFwd0, vecCoefFwd1; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * Init coefficient pointers 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = &pATable[0]; 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = &pBTable[0]; 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * scatter / gather offsets 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * for ascending & descending addressing 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vidupq_u32((uint32_t)0, 2); 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesBkwd = -vecStridesFwd; 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vecStridesFwd * modifier; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 955 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecSrc1 = (q31_t const *) pSrc1; 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecDst = pDst; 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** blkCnt = fftLen >> 2; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** while (blkCnt > 0U) 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd0 = vldrwq_gather_shifted_offset(pCoefA, vecStridesFwd); 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd1 = vldrwq_gather_shifted_offset(&pCoefA[1], vecStridesFwd); 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecIn = vld2q(pVecSrc1); 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecSrc1 += 8; 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR = *pSrc1 * CoefA1; 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vmulhq(vecIn.val[0], vecCoefFwd0); 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI = -(*pSrc1++) * CoefA2; 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecIn.val[0] = (-vecIn.val[0]); 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vmulhq(vecIn.val[0], vecCoefFwd1); 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(pSrc2, vecStridesBkwd); 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR += (*pSrc1 + *pSrc2) * CoefA2; 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vqaddq(vecIn.val[1], vecInBkwd); 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd1)); 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(pSrc2, vecStridesBkwd); 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI += *pSrc1++ * CoefA1; 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vmulhq(vecIn.val[1], vecCoefFwd0)); 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecCoefFwd0 = vldrwq_gather_shifted_offset(pCoefB, vecStridesFwd); 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI -= *pSrc2-- * CoefB1; 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqsubq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd0)); 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecInBkwd = vldrwq_gather_shifted_offset(&pSrc2[-1], vecStridesBkwd); 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outI += *pSrc2-- * CoefA2;; 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[1] = vqaddq(vecSum.val[1], vmulhq(vecInBkwd, vecCoefFwd1)); 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * outR += *pSrc2-- * CoefB1; 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecSum.val[0] = vqaddq(vecSum.val[0], vmulhq(vecInBkwd, vecCoefFwd0)); 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vst2q(pVecDst, vecSum); 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pVecDst += 8; 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** * update fwd and backwd offsets 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesFwd = vecStridesFwd + (modifier * 8U); 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** vecStridesBkwd = vecStridesBkwd - 8; 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 956 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** blkCnt--; 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #else 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** void arm_split_rifft_q31( 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pSrc, 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t fftLen, 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pATable, 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t * pBTable, 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t * pDst, 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t modifier) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30479 .loc 40 435 0 30480 .cfi_startproc 30481 @ args = 8, pretend = 0, frame = 16 30482 @ frame_needed = 0, uses_anonymous_args = 0 30483 .LVL3380: 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t outR, outI; /* Temporary variables for output */ 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficie 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1]; 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = &pATable[0]; 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = &pBTable[0]; 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** while (fftLen > 0U) 30484 .loc 40 444 0 30485 0000 0029 cmp r1, #0 30486 0002 00F08580 beq .L1673 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** q31_t outR, outI; /* Temporary variables for output */ 30487 .loc 40 435 0 30488 0006 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30489 .LCFI400: 30490 .cfi_def_cfa_offset 36 30491 .cfi_offset 4, -36 30492 .cfi_offset 5, -32 30493 .cfi_offset 6, -28 30494 .cfi_offset 7, -24 30495 .cfi_offset 8, -20 30496 .cfi_offset 9, -16 30497 .cfi_offset 10, -12 30498 .cfi_offset 11, -8 30499 .cfi_offset 14, -4 30500 000a 85B0 sub sp, sp, #20 30501 .LCFI401: 30502 .cfi_def_cfa_offset 56 30503 000c 9C46 mov ip, r3 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** outR = ( pIn[2 * i] * pATable[2 * i] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pIn[2 * i + 1] * pATable[2 * i + 1] 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** + pIn[2 * n - 2 * i] * pBTable[2 * i] 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** outI = ( pIn[2 * i + 1] * pATable[2 * i] 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pIn[2 * i] * pATable[2 * i + 1] 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] ARM GAS /tmp/ccfbYRip.s page 957 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** */ 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefA1 = *pCoefA++; 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefA2 = *pCoefA; 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* outR = (pIn[2 * i] * pATable[2 * i] */ 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** mult_32x32_keep32_R (outR, *pIn1, CoefA1); 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* - pIn[2 * i] * pATable[2 * i + 1] */ 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** mult_32x32_keep32_R (outI, *pIn1++, -CoefA2); 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * i + 1] * pATable[2 * i + 1] */ 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outR, *pIn1, CoefA2); 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * i + 1] * pATable[2 * i] */ 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1); 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i] * pBTable[2 * i] */ 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outR, *pIn2, CoefA2); 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multSub_32x32_keep32_R (outI, *pIn2--, CoefB1); 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outR, *pIn2, CoefB1); 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2); 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* write output */ 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pDst++ = outR; 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** *pDst++ = outI; 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* update coefficient pointer */ 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefB = pCoefB + (modifier * 2); 30504 .loc 40 491 0 30505 000e 0F9B ldr r3, [sp, #60] 30506 .LVL3381: 30507 0010 DB00 lsls r3, r3, #3 30508 0012 4FEAC108 lsl r8, r1, #3 30509 .LVL3382: 30510 0016 0393 str r3, [sp, #12] 30511 0018 0E9B ldr r3, [sp, #56] 30512 001a A8F10408 sub r8, r8, #4 30513 .LVL3383: 30514 001e 0F46 mov r7, r1 30515 0020 9346 mov fp, r2 30516 0022 8044 add r8, r8, r0 30517 .LVL3384: 30518 0024 00F10809 add r9, r0, #8 30519 0028 03F1080A add r10, r3, #8 30520 002c 4FF0000E mov lr, #0 30521 .LVL3385: 30522 .L1667: 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 958 30523 .loc 40 459 0 30524 0030 0BEB0E02 add r2, fp, lr 30525 .LVL3386: 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30526 .loc 40 462 0 30527 0034 59F8083C ldr r3, [r9, #-8] 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefA2 = *pCoefA; 30528 .loc 40 458 0 30529 0038 5BF80E50 ldr r5, [fp, lr] 30530 .LVL3387: 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30531 .loc 40 459 0 30532 003c 5468 ldr r4, [r2, #4] 30533 .LVL3388: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30534 .loc 40 468 0 30535 003e 59F8046C ldr r6, [r9, #-4] 30536 .LVL3389: 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30537 .loc 40 462 0 30538 0042 4FF00040 mov r0, #-2147483648 30539 0046 0021 movs r1, #0 30540 0048 C5FB0301 smlal r0, r1, r5, r3 30541 004c CDE90001 strd r0, [sp] 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30542 .loc 40 465 0 30543 0050 6242 negs r2, r4 30544 .LVL3390: 30545 0052 4FF00040 mov r0, #-2147483648 30546 0056 0021 movs r1, #0 30547 0058 C2FB0301 smlal r0, r1, r2, r3 30548 005c 0B46 mov r3, r1 30549 .LVL3391: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30550 .loc 40 468 0 30551 005e DDE90001 ldrd r0, [sp] 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30552 .loc 40 471 0 30553 0062 0022 movs r2, #0 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30554 .loc 40 468 0 30555 0064 0020 movs r0, #0 30556 0066 C4FB0601 smlal r0, r1, r4, r6 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30557 .loc 40 471 0 30558 006a C6FB0523 smlal r2, r3, r6, r5 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30559 .loc 40 468 0 30560 006e 10F10040 adds r0, r0, #-2147483648 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30561 .loc 40 471 0 30562 0072 1546 mov r5, r2 30563 .LVL3392: 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30564 .loc 40 468 0 30565 0074 41F10001 adc r1, r1, #0 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** ARM GAS /tmp/ccfbYRip.s page 959 30566 .loc 40 471 0 30567 0078 15F10042 adds r2, r5, #-2147483648 30568 007c 43F10003 adc r3, r3, #0 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30569 .loc 40 478 0 30570 0080 1E46 mov r6, r3 30571 .LVL3393: 30572 0082 5CF80E00 ldr r0, [ip, lr] 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30573 .loc 40 474 0 30574 0086 0B46 mov r3, r1 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30575 .loc 40 478 0 30576 0088 D8F80810 ldr r1, [r8, #8] 30577 008c 81FB0001 smull r0, r1, r1, r0 30578 0090 CDE90001 strd r0, [sp] 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30579 .loc 40 474 0 30580 0094 D8F80810 ldr r1, [r8, #8] 30581 0098 0022 movs r2, #0 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30582 .loc 40 478 0 30583 009a 1546 mov r5, r2 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30584 .loc 40 474 0 30585 009c C1FB0423 smlal r2, r3, r1, r4 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30586 .loc 40 478 0 30587 00a0 DDE90001 ldrd r0, [sp] 30588 00a4 281A subs r0, r5, r0 30589 00a6 66EB0101 sbc r1, r6, r1 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30590 .loc 40 474 0 30591 00aa 12F10045 adds r5, r2, #-2147483648 30592 00ae 43F10006 adc r6, r3, #0 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30593 .loc 40 478 0 30594 00b2 10F10042 adds r2, r0, #-2147483648 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** CoefB1 = *pCoefB; 30595 .loc 40 474 0 30596 00b6 CDE90056 strd r5, [sp] 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30597 .loc 40 478 0 30598 00ba 41F10003 adc r3, r1, #0 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30599 .loc 40 481 0 30600 00be D8F80450 ldr r5, [r8, #4] 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30601 .loc 40 478 0 30602 00c2 1946 mov r1, r3 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30603 .loc 40 484 0 30604 00c4 0020 movs r0, #0 30605 00c6 C5FB0401 smlal r0, r1, r5, r4 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30606 .loc 40 481 0 30607 00ca DDE90023 ldrd r2, [sp] ARM GAS /tmp/ccfbYRip.s page 960 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30608 .loc 40 484 0 30609 00ce CDE90001 strd r0, [sp] 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30610 .loc 40 481 0 30611 00d2 5CF80E10 ldr r1, [ip, lr] 30612 00d6 0022 movs r2, #0 30613 00d8 C5FB0123 smlal r2, r3, r5, r1 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30614 .loc 40 484 0 30615 00dc DDE90001 ldrd r0, [sp] 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30616 .loc 40 481 0 30617 00e0 1446 mov r4, r2 30618 .LVL3394: 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30619 .loc 40 484 0 30620 00e2 10F10040 adds r0, r0, #-2147483648 30621 00e6 41F10001 adc r1, r1, #0 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30622 .loc 40 481 0 30623 00ea 14F10042 adds r2, r4, #-2147483648 30624 00ee 039C ldr r4, [sp, #12] 30625 00f0 43F10003 adc r3, r3, #0 30626 .LVL3395: 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30627 .loc 40 444 0 30628 00f4 013F subs r7, r7, #1 30629 .LVL3396: 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30630 .loc 40 481 0 30631 00f6 4AE90231 strd r3, r1, [r10, #-8] 30632 .LVL3397: 30633 00fa 09F10809 add r9, r9, #8 30634 .LVL3398: 30635 00fe A644 add lr, lr, r4 30636 0100 A8F10808 sub r8, r8, #8 30637 .LVL3399: 30638 0104 0AF1080A add r10, r10, #8 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30639 .loc 40 444 0 30640 0108 92D1 bne .L1667 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** pCoefA = pCoefA + (modifier * 2 - 1); 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** /* Decrement loop count */ 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** fftLen--; 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 30641 .loc 40 498 0 30642 010a 05B0 add sp, sp, #20 30643 .LCFI402: 30644 .cfi_def_cfa_offset 36 30645 @ sp needed 30646 010c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30647 .LVL3400: 30648 .L1673: ARM GAS /tmp/ccfbYRip.s page 961 30649 .LCFI403: 30650 .cfi_def_cfa_offset 0 30651 .cfi_restore 4 30652 .cfi_restore 5 30653 .cfi_restore 6 30654 .cfi_restore 7 30655 .cfi_restore 8 30656 .cfi_restore 9 30657 .cfi_restore 10 30658 .cfi_restore 11 30659 .cfi_restore 14 30660 0110 7047 bx lr 30661 .cfi_endproc 30662 .LFE236: 30664 0112 00BF .section .text.arm_rfft_q31,"ax",%progbits 30665 .align 1 30666 .p2align 2,,3 30667 .global arm_rfft_q31 30668 .syntax unified 30669 .thumb 30670 .thumb_func 30671 .fpu fpv4-sp-d16 30673 arm_rfft_q31: 30674 .LFB234: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 30675 .loc 40 80 0 30676 .cfi_startproc 30677 @ args = 0, pretend = 0, frame = 144 30678 @ frame_needed = 0, uses_anonymous_args = 0 30679 .LVL3401: 30680 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 30681 .LCFI404: 30682 .cfi_def_cfa_offset 36 30683 .cfi_offset 4, -36 30684 .cfi_offset 5, -32 30685 .cfi_offset 6, -28 30686 .cfi_offset 7, -24 30687 .cfi_offset 8, -20 30688 .cfi_offset 9, -16 30689 .cfi_offset 10, -12 30690 .cfi_offset 11, -8 30691 .cfi_offset 14, -4 30692 0004 A7B0 sub sp, sp, #156 30693 .LCFI405: 30694 .cfi_def_cfa_offset 192 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30695 .loc 40 90 0 30696 0006 0379 ldrb r3, [r0, #4] @ zero_extendqisi2 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 30697 .loc 40 80 0 30698 0008 1091 str r1, [sp, #64] 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 30699 .loc 40 86 0 30700 000a 0168 ldr r1, [r0] 30701 .LVL3402: 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #if defined(ARM_MATH_MVEI) 30702 .loc 40 80 0 ARM GAS /tmp/ccfbYRip.s page 962 30703 000c 1E90 str r0, [sp, #120] 30704 000e 2292 str r2, [sp, #136] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #endif 30705 .loc 40 84 0 30706 0010 4069 ldr r0, [r0, #20] 30707 .LVL3403: 30708 0012 2090 str r0, [sp, #128] 30709 .LVL3404: 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 30710 .loc 40 86 0 30711 0014 4A08 lsrs r2, r1, #1 30712 .LVL3405: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30713 .loc 40 90 0 30714 0016 012B cmp r3, #1 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 30715 .loc 40 86 0 30716 0018 2192 str r2, [sp, #132] 30717 .LVL3406: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30718 .loc 40 90 0 30719 001a 54D0 beq .L1738 30720 .LBB2998: 30721 .LBB2999: 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 30722 .loc 11 706 0 30723 001c 0388 ldrh r3, [r0] 30724 .LBE2999: 30725 .LBE2998: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30726 .loc 40 108 0 30727 001e 1E9A ldr r2, [sp, #120] 30728 .LVL3407: 30729 .LBB3013: 30730 .LBB3010: 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** 30731 .loc 11 706 0 30732 0020 0F93 str r3, [sp, #60] 30733 .LBE3010: 30734 .LBE3013: 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30735 .loc 40 108 0 30736 0022 5279 ldrb r2, [r2, #5] @ zero_extendqisi2 30737 0024 2492 str r2, [sp, #144] 30738 .LVL3408: 30739 .LBB3014: 30740 .LBB3011: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 30741 .loc 11 730 0 30742 0026 B3F5807F cmp r3, #256 30743 002a 74D0 beq .L1683 30744 002c 30D8 bhi .L1684 30745 002e 202B cmp r3, #32 30746 0030 04D0 beq .L1685 30747 0032 6ED9 bls .L1739 30748 0034 402B cmp r3, #64 30749 0036 6ED0 beq .L1683 ARM GAS /tmp/ccfbYRip.s page 963 30750 0038 802B cmp r3, #128 30751 003a 33D1 bne .L1682 30752 .L1685: 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 30753 .loc 11 744 0 30754 003c 209B ldr r3, [sp, #128] 30755 .LVL3409: 30756 003e 0F99 ldr r1, [sp, #60] 30757 0040 5A68 ldr r2, [r3, #4] 30758 0042 1098 ldr r0, [sp, #64] 30759 .LVL3410: 30760 0044 FFF7FEFF bl arm_cfft_radix4by2_q31 30761 .LVL3411: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); 30762 .loc 11 749 0 30763 0048 249B ldr r3, [sp, #144] 30764 004a 73B3 cbz r3, .L1695 30765 .L1741: 30766 .LBB3000: 30767 .LBB3001: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 30768 .loc 8 82 0 30769 004c 209A ldr r2, [sp, #128] 30770 004e 9389 ldrh r3, [r2, #12] 30771 .LBE3001: 30772 .LBE3000: 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** } 30773 .loc 11 750 0 30774 0050 9168 ldr r1, [r2, #8] 30775 .LVL3412: 30776 .LBB3003: 30777 .LBB3002: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 30778 .loc 8 82 0 30779 0052 53B3 cbz r3, .L1695 30780 0054 013B subs r3, r3, #1 30781 0056 5B08 lsrs r3, r3, #1 30782 0058 0C1D adds r4, r1, #4 30783 005a 109A ldr r2, [sp, #64] 30784 .LVL3413: 30785 005c 04EB8304 add r4, r4, r3, lsl #2 30786 .LVL3414: 30787 .L1696: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 30788 .loc 8 85 0 30789 0060 4888 ldrh r0, [r1, #2] 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 30790 .loc 8 84 0 30791 0062 0B88 ldrh r3, [r1] 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 30792 .loc 8 85 0 30793 0064 8008 lsrs r0, r0, #2 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** b = pBitRevTab[i + 1] >> 2; 30794 .loc 8 84 0 30795 0066 9B08 lsrs r3, r3, #2 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 30796 .loc 8 89 0 ARM GAS /tmp/ccfbYRip.s page 964 30797 0068 52F82050 ldr r5, [r2, r0, lsl #2] 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 30798 .loc 8 88 0 30799 006c 52F82360 ldr r6, [r2, r3, lsl #2] 30800 .LVL3415: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b] = tmp; 30801 .loc 8 89 0 30802 0070 42F82350 str r5, [r2, r3, lsl #2] 30803 .LVL3416: 30804 0074 8500 lsls r5, r0, #2 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a] = pSrc[b]; 30805 .loc 8 88 0 30806 0076 9B00 lsls r3, r3, #2 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 30807 .loc 8 90 0 30808 0078 42F82060 str r6, [r2, r0, lsl #2] 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 30809 .loc 8 93 0 30810 007c 0433 adds r3, r3, #4 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 30811 .loc 8 94 0 30812 007e 281D adds r0, r5, #4 30813 0080 0431 adds r1, r1, #4 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[a+1] = pSrc[b+1]; 30814 .loc 8 93 0 30815 0082 D558 ldr r5, [r2, r3] 30816 .LVL3417: 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** pSrc[b+1] = tmp; 30817 .loc 8 94 0 30818 0084 1658 ldr r6, [r2, r0] 30819 0086 D650 str r6, [r2, r3] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 30820 .loc 8 82 0 30821 0088 8C42 cmp r4, r1 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** 30822 .loc 8 95 0 30823 008a 1550 str r5, [r2, r0] 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c **** { 30824 .loc 8 82 0 30825 008c E8D1 bne .L1696 30826 008e 0CE0 b .L1695 30827 .LVL3418: 30828 .L1684: 30829 .LBE3002: 30830 .LBE3003: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 30831 .loc 11 730 0 30832 0090 B3F5806F cmp r3, #1024 30833 0094 3FD0 beq .L1683 30834 0096 38D9 bls .L1740 30835 0098 B3F5006F cmp r3, #2048 30836 009c CED0 beq .L1685 30837 009e B3F5805F cmp r3, #4096 30838 00a2 38D0 beq .L1683 30839 .LVL3419: 30840 .L1682: 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); ARM GAS /tmp/ccfbYRip.s page 965 30841 .loc 11 749 0 30842 00a4 249B ldr r3, [sp, #144] 30843 00a6 002B cmp r3, #0 30844 00a8 D0D1 bne .L1741 30845 .LVL3420: 30846 .L1695: 30847 .LBE3011: 30848 .LBE3014: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 30849 .loc 40 111 0 30850 00aa 1E99 ldr r1, [sp, #120] 30851 00ac 1098 ldr r0, [sp, #64] 30852 00ae 0B69 ldr r3, [r1, #16] 30853 00b0 CA68 ldr r2, [r1, #12] 30854 00b2 8C68 ldr r4, [r1, #8] 30855 00b4 2299 ldr r1, [sp, #136] 30856 00b6 0091 str r1, [sp] 30857 00b8 0194 str r4, [sp, #4] 30858 00ba 2199 ldr r1, [sp, #132] 30859 00bc FFF7FEFF bl arm_split_rfft_q31 30860 .LVL3421: 30861 .L1676: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30862 .loc 40 114 0 30863 00c0 27B0 add sp, sp, #156 30864 .LCFI406: 30865 .cfi_remember_state 30866 .cfi_def_cfa_offset 36 30867 @ sp needed 30868 00c2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30869 .LVL3422: 30870 .L1738: 30871 .LCFI407: 30872 .cfi_restore_state 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30873 .loc 40 93 0 30874 00c6 1E9D ldr r5, [sp, #120] 30875 00c8 229E ldr r6, [sp, #136] 30876 00ca AC68 ldr r4, [r5, #8] 30877 00cc 1098 ldr r0, [sp, #64] 30878 .LVL3423: 30879 00ce 1146 mov r1, r2 30880 00d0 D5E90323 ldrd r2, r3, [r5, #12] 30881 .LVL3424: 30882 00d4 0096 str r6, [sp] 30883 .LVL3425: 30884 00d6 0194 str r4, [sp, #4] 30885 00d8 FFF7FEFF bl arm_split_rifft_q31 30886 .LVL3426: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30887 .loc 40 96 0 30888 00dc 6B79 ldrb r3, [r5, #5] @ zero_extendqisi2 30889 00de 2098 ldr r0, [sp, #128] 30890 00e0 2A79 ldrb r2, [r5, #4] @ zero_extendqisi2 30891 00e2 3146 mov r1, r6 30892 00e4 FFF7FEFF bl arm_cfft_q31 30893 .LVL3427: ARM GAS /tmp/ccfbYRip.s page 966 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30894 .loc 40 98 0 30895 00e8 2B68 ldr r3, [r5] 30896 00ea 002B cmp r3, #0 30897 00ec E8D0 beq .L1676 30898 00ee 311F subs r1, r6, #4 30899 00f0 0022 movs r2, #0 30900 00f2 2846 mov r0, r5 30901 .LVL3428: 30902 .L1680: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 30903 .loc 40 100 0 discriminator 3 30904 00f4 51F8043F ldr r3, [r1, #4]! 30905 00f8 5B00 lsls r3, r3, #1 30906 00fa 0B60 str r3, [r1] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 30907 .loc 40 98 0 discriminator 3 30908 00fc 0368 ldr r3, [r0] 30909 00fe 0132 adds r2, r2, #1 30910 .LVL3429: 30911 0100 9342 cmp r3, r2 30912 0102 F7D8 bhi .L1680 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 30913 .loc 40 114 0 30914 0104 27B0 add sp, sp, #156 30915 .LCFI408: 30916 .cfi_remember_state 30917 .cfi_def_cfa_offset 36 30918 @ sp needed 30919 0106 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 30920 .LVL3430: 30921 .L1740: 30922 .LCFI409: 30923 .cfi_restore_state 30924 .LBB3015: 30925 .LBB3012: 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** { 30926 .loc 11 730 0 30927 010a B3F5007F cmp r3, #512 30928 010e 95D0 beq .L1685 30929 0110 C8E7 b .L1682 30930 .L1739: 30931 0112 102B cmp r3, #16 30932 0114 C6D1 bne .L1682 30933 .L1683: 30934 .LBB3004: 30935 .LBB3005: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 30936 .loc 12 172 0 30937 0116 9B08 lsrs r3, r3, #2 30938 .LVL3431: 30939 0118 03EB4302 add r2, r3, r3, lsl #1 30940 011c 1098 ldr r0, [sp, #64] 30941 .LVL3432: 30942 011e 0B93 str r3, [sp, #44] 30943 0120 D200 lsls r2, r2, #3 30944 0122 C3EB4371 rsb r1, r3, r3, lsl #29 ARM GAS /tmp/ccfbYRip.s page 967 30945 0126 00EB020E add lr, r0, r2 30946 012a C900 lsls r1, r1, #3 30947 012c 0EEB0104 add r4, lr, r1 30948 0130 DB00 lsls r3, r3, #3 30949 0132 1194 str r4, [sp, #68] 30950 0134 0C44 add r4, r4, r1 30951 0136 0D94 str r4, [sp, #52] 30952 0138 1C44 add r4, r4, r3 30953 013a 04EB0109 add r9, r4, r1 30954 .LBE3005: 30955 .LBE3004: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 30956 .loc 11 737 0 30957 013e 209D ldr r5, [sp, #128] 30958 0140 0C94 str r4, [sp, #48] 30959 0142 4B44 add r3, r9, r3 30960 0144 6D68 ldr r5, [r5, #4] 30961 0146 0E93 str r3, [sp, #56] 30962 0148 0432 adds r2, r2, #4 30963 .LBB3008: 30964 .LBB3006: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 30965 .loc 12 174 0 30966 014a 0023 movs r3, #0 30967 014c 8218 adds r2, r0, r2 30968 014e 0293 str r3, [sp, #8] 30969 0150 0392 str r2, [sp, #12] 30970 0152 7346 mov r3, lr 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 30971 .loc 12 172 0 30972 0154 A846 mov r8, r5 30973 0156 029A ldr r2, [sp, #8] 30974 .LBE3006: 30975 .LBE3008: 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c **** break; 30976 .loc 11 737 0 30977 0158 2395 str r5, [sp, #140] 30978 .LVL3433: 30979 .LBB3009: 30980 .LBB3007: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 30981 .loc 12 174 0 30982 015a CE46 mov lr, r9 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** i0 = 0U; 30983 .loc 12 172 0 30984 015c 4FF0040B mov fp, #4 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 30985 .loc 12 174 0 30986 0160 C146 mov r9, r8 30987 0162 9A46 mov r10, r3 30988 .LVL3434: 30989 .L1688: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 30990 .loc 12 191 0 30991 0164 109C ldr r4, [sp, #64] 30992 0166 119B ldr r3, [sp, #68] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 968 30993 .loc 12 196 0 30994 0168 0399 ldr r1, [sp, #12] 30995 016a 0D9D ldr r5, [sp, #52] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 30996 .loc 12 191 0 30997 016c 54F83200 ldr r0, [r4, r2, lsl #3] 30998 0170 53F83230 ldr r3, [r3, r2, lsl #3] 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 30999 .loc 12 196 0 31000 0174 51F8041C ldr r1, [r1, #-4] 31001 0178 55F83250 ldr r5, [r5, r2, lsl #3] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31002 .loc 12 199 0 31003 017c 54F80B70 ldr r7, [r4, fp] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 31004 .loc 12 204 0 31005 0180 029A ldr r2, [sp, #8] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31006 .loc 12 199 0 31007 0182 0C9C ldr r4, [sp, #48] 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 31008 .loc 12 191 0 31009 0184 0611 asrs r6, r0, #4 31010 0186 1B11 asrs r3, r3, #4 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31011 .loc 12 196 0 31012 0188 0811 asrs r0, r1, #4 31013 018a 00EB2510 add r0, r0, r5, asr #4 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 31014 .loc 12 191 0 31015 018e 0496 str r6, [sp, #16] 31016 0190 0693 str r3, [sp, #24] 31017 0192 1E44 add r6, r6, r3 31018 .LVL3435: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 31019 .loc 12 204 0 31020 0194 109B ldr r3, [sp, #64] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31021 .loc 12 199 0 31022 0196 54F80B40 ldr r4, [r4, fp] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa + xc) - (xb + xd) */ 31023 .loc 12 204 0 31024 019a 3118 adds r1, r6, r0 31025 019c 43F83210 str r1, [r3, r2, lsl #3] 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31026 .loc 12 208 0 31027 01a0 DAF80410 ldr r1, [r10, #4] 31028 01a4 5EF80B50 ldr r5, [lr, fp] 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31029 .loc 12 199 0 31030 01a8 4FEA241C asr ip, r4, #4 31031 01ac 3F11 asrs r7, r7, #4 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31032 .loc 12 208 0 31033 01ae 0C11 asrs r4, r1, #4 31034 01b0 04EB2514 add r4, r4, r5, asr #4 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ ARM GAS /tmp/ccfbYRip.s page 969 31035 .loc 12 199 0 31036 01b4 0897 str r7, [sp, #32] 31037 01b6 6744 add r7, r7, ip 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31038 .loc 12 211 0 31039 01b8 3919 adds r1, r7, r4 31040 01ba 43F80B10 str r1, [r3, fp] 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31041 .loc 12 224 0 31042 01be D9E90051 ldrd r5, r1, [r9] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 31043 .loc 12 217 0 31044 01c2 DAF80430 ldr r3, [r10, #4] 31045 01c6 0A93 str r3, [sp, #40] 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31046 .loc 12 214 0 31047 01c8 3C1B subs r4, r7, r4 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* yb + yd */ 31048 .loc 12 206 0 31049 01ca 301A subs r0, r6, r0 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31050 .loc 12 228 0 31051 01cc 84FB0123 smull r2, r3, r4, r1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 31052 .loc 12 227 0 31053 01d0 80FB0567 smull r6, r7, r0, r5 31054 .LVL3436: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31055 .loc 12 232 0 31056 01d4 80FB0101 smull r0, r1, r0, r1 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 31057 .loc 12 231 0 31058 01d8 85FB0445 smull r4, r5, r5, r4 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31059 .loc 12 219 0 31060 01dc 029A ldr r2, [sp, #8] 31061 01de 039C ldr r4, [sp, #12] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 31062 .loc 12 217 0 31063 01e0 5EF80B00 ldr r0, [lr, fp] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 31064 .loc 12 227 0 31065 01e4 DE19 adds r6, r3, r7 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 31066 .loc 12 231 0 31067 01e6 6D1A subs r5, r5, r1 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 31068 .loc 12 217 0 31069 01e8 0A9B ldr r3, [sp, #40] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31070 .loc 12 219 0 31071 01ea 54F8041C ldr r1, [r4, #-4] 31072 01ee 5EF83240 ldr r4, [lr, r2, lsl #3] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31073 .loc 12 228 0 31074 01f2 7600 lsls r6, r6, #1 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 970 31075 .loc 12 232 0 31076 01f4 6D00 lsls r5, r5, #1 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; 31077 .loc 12 227 0 31078 01f6 4EF83260 str r6, [lr, r2, lsl #3] 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; 31079 .loc 12 231 0 31080 01fa 4EF80B50 str r5, [lr, fp] 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31081 .loc 12 193 0 31082 01fe 049E ldr r6, [sp, #16] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31083 .loc 12 201 0 31084 0200 089F ldr r7, [sp, #32] 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 31085 .loc 12 217 0 31086 0202 1D11 asrs r5, r3, #4 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31087 .loc 12 193 0 31088 0204 069B ldr r3, [sp, #24] 31089 0206 F31A subs r3, r6, r3 31090 .LVL3437: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 31091 .loc 12 244 0 31092 0208 239E ldr r6, [sp, #140] 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31093 .loc 12 201 0 31094 020a A7EB0C0C sub ip, r7, ip 31095 .LVL3438: 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xb - xd */ 31096 .loc 12 217 0 31097 020e C5EB2015 rsb r5, r5, r0, asr #4 31098 .LVL3439: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 31099 .loc 12 244 0 31100 0212 56F83270 ldr r7, [r6, r2, lsl #3] 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 31101 .loc 12 235 0 31102 0216 0495 str r5, [sp, #16] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31103 .loc 12 219 0 31104 0218 0911 asrs r1, r1, #4 31105 021a C1EB2411 rsb r1, r1, r4, asr #4 31106 .LVL3440: 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 31107 .loc 12 235 0 31108 021e 5D19 adds r5, r3, r5 31109 .LVL3441: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31110 .loc 12 245 0 31111 0220 56F80B40 ldr r4, [r6, fp] 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 31112 .loc 12 240 0 31113 0224 0A46 mov r2, r1 31114 0226 ACEB0106 sub r6, ip, r1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 31115 .loc 12 248 0 ARM GAS /tmp/ccfbYRip.s page 971 31116 022a 85FB0701 smull r0, r1, r5, r7 31117 022e CDE90601 strd r0, [sp, #24] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31118 .loc 12 249 0 31119 0232 86FB0401 smull r0, r1, r6, r4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 31120 .loc 12 252 0 31121 0236 87FB0667 smull r6, r7, r7, r6 31122 023a CDE90867 strd r6, [sp, #32] 31123 023e 099E ldr r6, [sp, #36] 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 31124 .loc 12 248 0 31125 0240 079F ldr r7, [sp, #28] 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31126 .loc 12 253 0 31127 0242 85FB0445 smull r4, r5, r5, r4 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 31128 .loc 12 252 0 31129 0246 701B subs r0, r6, r5 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 31130 .loc 12 248 0 31131 0248 029C ldr r4, [sp, #8] 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31132 .loc 12 237 0 31133 024a 049D ldr r5, [sp, #16] 31134 .LVL3442: 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 31135 .loc 12 248 0 31136 024c 3944 add r1, r1, r7 31137 .LVL3443: 31138 024e 0E9F ldr r7, [sp, #56] 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31139 .loc 12 249 0 31140 0250 4900 lsls r1, r1, #1 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31141 .loc 12 253 0 31142 0252 4000 lsls r0, r0, #1 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; 31143 .loc 12 248 0 31144 0254 47F83410 str r1, [r7, r4, lsl #3] 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; 31145 .loc 12 252 0 31146 0258 47F80B00 str r0, [r7, fp] 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31147 .loc 12 258 0 31148 025c D8E90040 ldrd r4, r0, [r8] 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31149 .loc 12 242 0 31150 0260 9444 add ip, ip, r2 31151 .LVL3444: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31152 .loc 12 262 0 31153 0262 8CFB0012 smull r1, r2, ip, r0 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31154 .loc 12 237 0 31155 0266 5B1B subs r3, r3, r5 31156 .LVL3445: ARM GAS /tmp/ccfbYRip.s page 972 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31157 .loc 12 262 0 31158 0268 CDE90412 strd r1, [sp, #16] 31159 .LVL3446: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 31160 .loc 12 261 0 31161 026c 83FB0467 smull r6, r7, r3, r4 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31162 .loc 12 266 0 31163 0270 83FB0001 smull r0, r1, r3, r0 31164 .LVL3447: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 31165 .loc 12 261 0 31166 0274 059B ldr r3, [sp, #20] 31167 .LVL3448: 31168 0276 0398 ldr r0, [sp, #12] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31169 .loc 12 269 0 31170 0278 029A ldr r2, [sp, #8] 31171 .LVL3449: 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 31172 .loc 12 261 0 31173 027a 3B44 add r3, r3, r7 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31174 .loc 12 262 0 31175 027c 5B00 lsls r3, r3, #1 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; 31176 .loc 12 261 0 31177 027e 40F8043C str r3, [r0, #-4] 31178 .LVL3450: 31179 0282 00F10803 add r3, r0, #8 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 31180 .loc 12 265 0 31181 0286 84FB0C45 smull r4, r5, r4, ip 31182 .LVL3451: 31183 028a 0393 str r3, [sp, #12] 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31184 .loc 12 274 0 31185 028c 0B9B ldr r3, [sp, #44] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31186 .loc 12 269 0 31187 028e 0132 adds r2, r2, #1 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 31188 .loc 12 265 0 31189 0290 691A subs r1, r5, r1 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31190 .loc 12 266 0 31191 0292 4900 lsls r1, r1, #1 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31192 .loc 12 274 0 31193 0294 9342 cmp r3, r2 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; 31194 .loc 12 265 0 31195 0296 CAF80410 str r1, [r10, #4] 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31196 .loc 12 269 0 31197 029a 0292 str r2, [sp, #8] ARM GAS /tmp/ccfbYRip.s page 973 31198 .LVL3452: 31199 029c 09F11009 add r9, r9, #16 31200 02a0 0BF1080B add fp, fp, #8 31201 02a4 08F11808 add r8, r8, #24 31202 02a8 0AF1080A add r10, r10, #8 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31203 .loc 12 274 0 31204 02ac 7FF45AAF bne .L1688 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31205 .loc 12 289 0 31206 02b0 042A cmp r2, #4 31207 02b2 2592 str r2, [sp, #148] 31208 .LVL3453: 31209 02b4 40F2EA80 bls .L1689 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31210 .loc 12 286 0 31211 02b8 0423 movs r3, #4 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31212 .loc 12 289 0 31213 02ba 1292 str r2, [sp, #72] 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31214 .loc 12 286 0 31215 02bc 1F93 str r3, [sp, #124] 31216 .LVL3454: 31217 .L1693: 31218 02be 1F9D ldr r5, [sp, #124] 31219 02c0 109B ldr r3, [sp, #64] 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 31220 .loc 12 293 0 31221 02c2 129F ldr r7, [sp, #72] 31222 02c4 1A46 mov r2, r3 31223 02c6 05EB4503 add r3, r5, r5, lsl #1 31224 02ca DB00 lsls r3, r3, #3 31225 02cc 1C93 str r3, [sp, #112] 31226 02ce EB00 lsls r3, r5, #3 31227 02d0 1B93 str r3, [sp, #108] 31228 02d2 2B01 lsls r3, r5, #4 31229 02d4 1A93 str r3, [sp, #104] 31230 02d6 FB00 lsls r3, r7, #3 31231 02d8 BC08 lsrs r4, r7, #2 31232 02da 1393 str r3, [sp, #76] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31233 .loc 12 297 0 31234 02dc 239B ldr r3, [sp, #140] 31235 02de 1793 str r3, [sp, #92] 31236 02e0 02EBC400 add r0, r2, r4, lsl #3 31237 02e4 2101 lsls r1, r4, #4 31238 02e6 C4EB4472 rsb r2, r4, r4, lsl #29 31239 02ea D600 lsls r6, r2, #3 31240 02ec 0430 adds r0, r0, #4 31241 02ee 0439 subs r1, r1, #4 31242 02f0 621E subs r2, r4, #1 31243 02f2 CDE91533 strd r3, r3, [sp, #84] 31244 02f6 0023 movs r3, #0 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ia1 = 0U; 31245 .loc 12 293 0 31246 02f8 0C94 str r4, [sp, #48] ARM GAS /tmp/ccfbYRip.s page 974 31247 .LVL3455: 31248 02fa 1890 str r0, [sp, #96] 31249 02fc 1D91 str r1, [sp, #116] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31250 .loc 12 297 0 31251 02fe 1992 str r2, [sp, #100] 31252 0300 1493 str r3, [sp, #80] 31253 0302 0396 str r6, [sp, #12] 31254 .LVL3456: 31255 .L1692: 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 31256 .loc 12 302 0 31257 0304 179B ldr r3, [sp, #92] 31258 0306 1A68 ldr r2, [r3] 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co2 = pCoef[(ia2 * 2U)]; 31259 .loc 12 303 0 31260 0308 5B68 ldr r3, [r3, #4] 31261 030a 0693 str r3, [sp, #24] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 31262 .loc 12 304 0 31263 030c 169B ldr r3, [sp, #88] 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si1 = pCoef[(ia1 * 2U) + 1U]; 31264 .loc 12 302 0 31265 030e 0492 str r2, [sp, #16] 31266 .LVL3457: 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 31267 .loc 12 304 0 31268 0310 1A68 ldr r2, [r3] 31269 .LVL3458: 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** co3 = pCoef[(ia3 * 2U)]; 31270 .loc 12 305 0 31271 0312 5B68 ldr r3, [r3, #4] 31272 0314 0893 str r3, [sp, #32] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 31273 .loc 12 306 0 31274 0316 159B ldr r3, [sp, #84] 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si2 = pCoef[(ia2 * 2U) + 1U]; 31275 .loc 12 304 0 31276 0318 1192 str r2, [sp, #68] 31277 .LVL3459: 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 31278 .loc 12 306 0 31279 031a 1A68 ldr r2, [r3] 31280 .LVL3460: 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* Twiddle coefficients index modifier */ 31281 .loc 12 307 0 31282 031c 5B68 ldr r3, [r3, #4] 31283 031e 0B93 str r3, [sp, #44] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31284 .loc 12 311 0 31285 0320 0F9B ldr r3, [sp, #60] 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** si3 = pCoef[(ia3 * 2U) + 1U]; 31286 .loc 12 306 0 31287 0322 0A92 str r2, [sp, #40] 31288 .LVL3461: 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31289 .loc 12 311 0 ARM GAS /tmp/ccfbYRip.s page 975 31290 0324 1946 mov r1, r3 31291 0326 149B ldr r3, [sp, #80] 31292 0328 9942 cmp r1, r3 31293 032a 40F29180 bls .L1690 31294 032e 1D9A ldr r2, [sp, #116] 31295 .LVL3462: 31296 0330 0293 str r3, [sp, #8] 31297 0332 1046 mov r0, r2 31298 0334 189A ldr r2, [sp, #96] 31299 0336 00EB020A add r10, r0, r2 31300 033a 9346 mov fp, r2 31301 .LVL3463: 31302 .L1691: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 31303 .loc 12 321 0 31304 033c 109F ldr r7, [sp, #64] 31305 033e 029C ldr r4, [sp, #8] 31306 0340 0399 ldr r1, [sp, #12] 31307 0342 57F83450 ldr r5, [r7, r4, lsl #3] 31308 0346 5AF80160 ldr r6, [r10, r1] 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31309 .loc 12 331 0 31310 034a 5BF8042C ldr r2, [fp, #-4] 31311 034e DAF80030 ldr r3, [r10] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31312 .loc 12 326 0 31313 0352 5BF80180 ldr r8, [fp, r1] 31314 0356 0C99 ldr r1, [sp, #48] 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa - xc */ 31315 .loc 12 321 0 31316 0358 05EB060E add lr, r5, r6 31317 .LVL3464: 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31318 .loc 12 331 0 31319 035c 1344 add r3, r3, r2 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 31320 .loc 12 334 0 31321 035e 0EEB0302 add r2, lr, r3 31322 0362 BC46 mov ip, r7 31323 0364 9210 asrs r2, r2, #2 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31324 .loc 12 326 0 31325 0366 5BF83100 ldr r0, [fp, r1, lsl #3] 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* xa + xc -(xb + xd) */ 31326 .loc 12 334 0 31327 036a 4CF83420 str r2, [ip, r4, lsl #3] 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ 31328 .loc 12 339 0 31329 036e DBF80010 ldr r1, [fp] 31330 0372 DAF80420 ldr r2, [r10, #4] 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31331 .loc 12 341 0 31332 0376 039C ldr r4, [sp, #12] 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya - yc */ 31333 .loc 12 326 0 31334 0378 08EB0007 add r7, r8, r0 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* ya' = ya + yb + yc + yd */ ARM GAS /tmp/ccfbYRip.s page 976 31335 .loc 12 339 0 31336 037c 0A44 add r2, r2, r1 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31337 .loc 12 341 0 31338 037e B918 adds r1, r7, r2 31339 0380 8910 asrs r1, r1, #2 31340 0382 4BF80410 str r1, [fp, r4] 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31341 .loc 12 323 0 31342 0386 AE1B subs r6, r5, r6 31343 .LVL3465: 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31344 .loc 12 328 0 31345 0388 A8EB0009 sub r9, r8, r0 31346 .LVL3466: 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 31347 .loc 12 347 0 31348 038c DBF80050 ldr r5, [fp] 31349 0390 DAF80400 ldr r0, [r10, #4] 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31350 .loc 12 349 0 31351 0394 5BF8041C ldr r1, [fp, #-4] 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xb - xd) */ 31352 .loc 12 347 0 31353 0398 A5EB0008 sub r8, r5, r0 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31354 .loc 12 349 0 31355 039c DAF80050 ldr r5, [r10] 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (xa - xc) - (yb - yd) */ 31356 .loc 12 360 0 31357 03a0 06EB080C add ip, r6, r8 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31358 .loc 12 349 0 31359 03a4 491B subs r1, r1, r5 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31360 .loc 12 362 0 31361 03a6 A6EB0808 sub r8, r6, r8 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31362 .loc 12 370 0 31363 03aa 049D ldr r5, [sp, #16] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31364 .loc 12 371 0 31365 03ac 069E ldr r6, [sp, #24] 31366 .LVL3467: 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31367 .loc 12 336 0 31368 03ae AEEB0303 sub r3, lr, r3 31369 .LVL3468: 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** /* (ya - yc) + (xb - xd) */ 31370 .loc 12 365 0 31371 03b2 A9EB010E sub lr, r9, r1 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31372 .loc 12 344 0 31373 03b6 BA1A subs r2, r7, r2 31374 .LVL3469: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31375 .loc 12 370 0 ARM GAS /tmp/ccfbYRip.s page 977 31376 03b8 8CFB0545 smull r4, r5, ip, r5 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31377 .loc 12 371 0 31378 03bc 8EFB0667 smull r6, r7, lr, r6 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31379 .loc 12 370 0 31380 03c0 7E19 adds r6, r7, r5 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31381 .loc 12 367 0 31382 03c2 8944 add r9, r9, r1 31383 .LVL3470: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31384 .loc 12 370 0 31385 03c4 0E96 str r6, [sp, #56] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31386 .loc 12 353 0 31387 03c6 0899 ldr r1, [sp, #32] 31388 .LVL3471: 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 31389 .loc 12 352 0 31390 03c8 119E ldr r6, [sp, #68] 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31391 .loc 12 353 0 31392 03ca 82FB0101 smull r0, r1, r2, r1 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 31393 .loc 12 352 0 31394 03ce 83FB0645 smull r4, r5, r3, r6 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 31395 .loc 12 356 0 31396 03d2 82FB0667 smull r6, r7, r2, r6 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; 31397 .loc 12 352 0 31398 03d6 4A19 adds r2, r1, r5 31399 03d8 0D92 str r2, [sp, #52] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31400 .loc 12 357 0 31401 03da 089A ldr r2, [sp, #32] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 31402 .loc 12 374 0 31403 03dc 049D ldr r5, [sp, #16] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31404 .loc 12 375 0 31405 03de 0698 ldr r0, [sp, #24] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 31406 .loc 12 383 0 31407 03e0 0B9E ldr r6, [sp, #44] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31408 .loc 12 357 0 31409 03e2 1146 mov r1, r2 31410 03e4 83FB0123 smull r2, r3, r3, r1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 31411 .loc 12 374 0 31412 03e8 8EFB0545 smull r4, r5, lr, r5 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31413 .loc 12 375 0 31414 03ec 8CFB0001 smull r0, r1, ip, r0 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 978 31415 .loc 12 374 0 31416 03f0 A5EB010E sub lr, r5, r1 31417 .LVL3472: 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; 31418 .loc 12 356 0 31419 03f4 A7EB030C sub ip, r7, r3 31420 .LVL3473: 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31421 .loc 12 379 0 31422 03f8 0B98 ldr r0, [sp, #44] 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 31423 .loc 12 378 0 31424 03fa 0A9B ldr r3, [sp, #40] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 31425 .loc 12 382 0 31426 03fc 0A9D ldr r5, [sp, #40] 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 31427 .loc 12 383 0 31428 03fe 88FB0667 smull r6, r7, r8, r6 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31429 .loc 12 379 0 31430 0402 89FB0001 smull r0, r1, r9, r0 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 31431 .loc 12 382 0 31432 0406 89FB0545 smull r4, r5, r9, r5 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; 31433 .loc 12 378 0 31434 040a 88FB0323 smull r2, r3, r8, r3 31435 040e 0B44 add r3, r3, r1 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 31436 .loc 12 382 0 31437 0410 E91B subs r1, r5, r7 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31438 .loc 12 311 0 31439 0412 029F ldr r7, [sp, #8] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31440 .loc 12 371 0 31441 0414 0E9A ldr r2, [sp, #56] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31442 .loc 12 311 0 31443 0416 129D ldr r5, [sp, #72] 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31444 .loc 12 371 0 31445 0418 5010 asrs r0, r2, #1 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31446 .loc 12 353 0 31447 041a 0D9A ldr r2, [sp, #52] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31448 .loc 12 311 0 31449 041c 7E19 adds r6, r7, r5 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31450 .loc 12 353 0 31451 041e 5410 asrs r4, r2, #1 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31452 .loc 12 357 0 31453 0420 4FEA6C05 asr r5, ip, #1 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; ARM GAS /tmp/ccfbYRip.s page 979 31454 .loc 12 356 0 31455 0424 4BE90145 strd r4, r5, [fp, #-4] 31456 .LVL3474: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31457 .loc 12 370 0 31458 0428 039C ldr r4, [sp, #12] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31459 .loc 12 311 0 31460 042a 0296 str r6, [sp, #8] 31461 .LVL3475: 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; 31462 .loc 12 370 0 31463 042c 4AF80400 str r0, [r10, r4] 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 31464 .loc 12 374 0 31465 0430 0C98 ldr r0, [sp, #48] 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31466 .loc 12 375 0 31467 0432 4FEA6E02 asr r2, lr, #1 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31468 .loc 12 379 0 31469 0436 5B10 asrs r3, r3, #1 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 31470 .loc 12 383 0 31471 0438 4910 asrs r1, r1, #1 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; 31472 .loc 12 374 0 31473 043a 4BF83020 str r2, [fp, r0, lsl #3] 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; 31474 .loc 12 382 0 31475 043e CAE90031 strd r3, r1, [r10] 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31476 .loc 12 311 0 31477 0442 0F9B ldr r3, [sp, #60] 31478 0444 139A ldr r2, [sp, #76] 31479 0446 B342 cmp r3, r6 31480 0448 9344 add fp, fp, r2 31481 044a 9244 add r10, r10, r2 31482 044c 3FF676AF bhi .L1691 31483 .LVL3476: 31484 .L1690: 31485 0450 179A ldr r2, [sp, #92] 31486 0452 1B99 ldr r1, [sp, #108] 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31487 .loc 12 297 0 31488 0454 149B ldr r3, [sp, #80] 31489 0456 0A44 add r2, r2, r1 31490 0458 1792 str r2, [sp, #92] 31491 045a 1A99 ldr r1, [sp, #104] 31492 045c 169A ldr r2, [sp, #88] 31493 045e 0A44 add r2, r2, r1 31494 0460 1692 str r2, [sp, #88] 31495 0462 1C99 ldr r1, [sp, #112] 31496 0464 159A ldr r2, [sp, #84] 31497 0466 0A44 add r2, r2, r1 31498 0468 1592 str r2, [sp, #84] 31499 046a 189A ldr r2, [sp, #96] ARM GAS /tmp/ccfbYRip.s page 980 31500 046c 0832 adds r2, r2, #8 31501 046e 1892 str r2, [sp, #96] 31502 0470 199A ldr r2, [sp, #100] 31503 0472 0133 adds r3, r3, #1 31504 0474 9A42 cmp r2, r3 31505 0476 1493 str r3, [sp, #80] 31506 .LVL3477: 31507 0478 BFF444AF bcs .L1692 31508 047c 0C9B ldr r3, [sp, #48] 31509 .LVL3478: 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 31510 .loc 12 386 0 31511 047e 1F9A ldr r2, [sp, #124] 31512 0480 1293 str r3, [sp, #72] 31513 .LVL3479: 31514 0482 9200 lsls r2, r2, #2 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31515 .loc 12 289 0 31516 0484 042B cmp r3, #4 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** } 31517 .loc 12 386 0 31518 0486 1F92 str r2, [sp, #124] 31519 .LVL3480: 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** { 31520 .loc 12 289 0 31521 0488 3FF619AF bhi .L1693 31522 .LVL3481: 31523 .L1689: 31524 048c 109B ldr r3, [sp, #64] 31525 048e 259E ldr r6, [sp, #148] 31526 0490 2033 adds r3, r3, #32 31527 .L1694: 31528 .LVL3482: 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31529 .loc 12 411 0 31530 0492 53E906E1 ldrd lr, r1, [r3, #-24] 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31531 .loc 12 415 0 31532 0496 53E9045C ldrd r5, ip, [r3, #-16] 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ya = *ptr1++; 31533 .loc 12 406 0 31534 049a 53F8200C ldr r0, [r3, #-32] 31535 .LVL3483: 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31536 .loc 12 407 0 31537 049e 53F81C2C ldr r2, [r3, #-28] 31538 .LVL3484: 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31539 .loc 12 419 0 31540 04a2 53E90278 ldrd r7, r8, [r3, #-8] 31541 .LVL3485: 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31542 .loc 12 422 0 31543 04a6 00EB0E04 add r4, r0, lr 31544 04aa 2C44 add r4, r4, r5 31545 04ac 3C44 add r4, r4, r7 31546 .LVL3486: ARM GAS /tmp/ccfbYRip.s page 981 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = ya_out; 31547 .loc 12 431 0 31548 04ae 43F8204C str r4, [r3, #-32] 31549 .LVL3487: 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yc_out = (ya - yb + yc - yd); 31550 .loc 12 434 0 31551 04b2 A0EB0E04 sub r4, r0, lr 31552 .LVL3488: 31553 04b6 2C44 add r4, r4, r5 31554 04b8 E41B subs r4, r4, r7 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 31555 .loc 12 441 0 31556 04ba 00EB0109 add r9, r0, r1 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yc_out; 31557 .loc 12 438 0 31558 04be 43F8184C str r4, [r3, #-24] 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 31559 .loc 12 448 0 31560 04c2 401A subs r0, r0, r1 31561 .LVL3489: 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31562 .loc 12 425 0 31563 04c4 5418 adds r4, r2, r1 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31564 .loc 12 435 0 31565 04c6 511A subs r1, r2, r1 31566 .LVL3490: 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 31567 .loc 12 448 0 31568 04c8 401B subs r0, r0, r5 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 31569 .loc 12 441 0 31570 04ca A9EB0509 sub r9, r9, r5 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31571 .loc 12 425 0 31572 04ce 6444 add r4, r4, ip 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31573 .loc 12 435 0 31574 04d0 6144 add r1, r1, ip 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yb_out = (ya - xb - yc + xd); 31575 .loc 12 441 0 31576 04d2 A9EB0805 sub r5, r9, r8 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** yd_out = (ya + xb - yc - xd); 31577 .loc 12 448 0 31578 04d6 4044 add r0, r0, r8 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31579 .loc 12 425 0 31580 04d8 4444 add r4, r4, r8 31581 .LVL3491: 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31582 .loc 12 435 0 31583 04da A1EB0801 sub r1, r1, r8 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31584 .loc 12 442 0 31585 04de A2EB0E08 sub r8, r2, lr 31586 .LVL3492: 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 982 31587 .loc 12 449 0 31588 04e2 7244 add r2, r2, lr 31589 .LVL3493: 31590 04e4 A2EB0C02 sub r2, r2, ip 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31591 .loc 12 442 0 31592 04e8 A8EB0C0E sub lr, r8, ip 31593 .LVL3494: 31594 04ec BE44 add lr, lr, r7 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31595 .loc 12 449 0 31596 04ee D21B subs r2, r2, r7 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31597 .loc 12 456 0 31598 04f0 013E subs r6, r6, #1 31599 .LVL3495: 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yb_out; 31600 .loc 12 445 0 31601 04f2 43F8105C str r5, [r3, #-16] 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** *ptr1++ = yd_out; 31602 .loc 12 452 0 31603 04f6 43F8080C str r0, [r3, #-8] 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31604 .loc 12 432 0 31605 04fa 43F81C4C str r4, [r3, #-28] 31606 .LVL3496: 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31607 .loc 12 439 0 31608 04fe 43F8141C str r1, [r3, #-20] 31609 .LVL3497: 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31610 .loc 12 446 0 31611 0502 43F80CEC str lr, [r3, #-12] 31612 .LVL3498: 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31613 .loc 12 453 0 31614 0506 43F8042C str r2, [r3, #-4] 31615 .LVL3499: 31616 050a 03F12003 add r3, r3, #32 31617 .LVL3500: 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c **** 31618 .loc 12 456 0 31619 050e C0D1 bne .L1694 31620 0510 C8E5 b .L1682 31621 .LBE3007: 31622 .LBE3009: 31623 .LBE3012: 31624 .LBE3015: 31625 .cfi_endproc 31626 .LFE234: 31628 0512 00BF .section .text.arm_dct4_q31,"ax",%progbits 31629 .align 1 31630 .p2align 2,,3 31631 .global arm_dct4_q31 31632 .syntax unified 31633 .thumb 31634 .thumb_func ARM GAS /tmp/ccfbYRip.s page 983 31635 .fpu fpv4-sp-d16 31637 arm_dct4_q31: 31638 .LFB200: 31639 .file 41 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Title: arm_dct4_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Description: Processing function of DCT4 & IDCT4 Q31 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @addtogroup DCT4_IDCT4 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @{ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @brief Processing function for the Q31 DCT4/IDCT4. 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @param[in] S points to an instance of the Q31 DCT4 structure. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @param[in] pState points to state buffer. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @param[in,out] pInlineBuffer points to the in-place input and output buffer. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @return none 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** @par Input an output formats 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** as the conversion from DCT2 to DCT4 involves one subtraction. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** Internally inputs are downscaled in the RFFT process function to avoid overflows 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** Number of bits downscaled, depends on the size of the transform. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** The input and output formats for different DCT sizes and number of bits to upsca 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** mentioned in the table below: 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** \image html dct4FormatsQ31Table.gif 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** */ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 984 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** void arm_dct4_q31( 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const arm_dct4_instance_q31 * S, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** q31_t * pState, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** q31_t * pInlineBuffer) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 31640 .loc 41 58 0 31641 .cfi_startproc 31642 @ args = 0, pretend = 0, frame = 8 31643 @ frame_needed = 0, uses_anonymous_args = 0 31644 .LVL3501: 31645 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 31646 .LCFI410: 31647 .cfi_def_cfa_offset 36 31648 .cfi_offset 4, -36 31649 .cfi_offset 5, -32 31650 .cfi_offset 6, -28 31651 .cfi_offset 7, -24 31652 .cfi_offset 8, -20 31653 .cfi_offset 9, -16 31654 .cfi_offset 10, -12 31655 .cfi_offset 11, -8 31656 .cfi_offset 14, -4 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** q31_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and p 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** q31_t in; /* Temporary variable */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** uint32_t i; /* Loop counter */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* DCT4 computation involves DCT2 (which is calculated using RFFT) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * along with some pre-processing and post-processing. 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Computational procedure is explained as follows: 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * (a) Pre-processing involves multiplying input with cos factor, 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * where, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * r(n) -- output of preprocessing 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * u(n) -- input to preprocessing(actual Source buffer) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * (b) Calculation of DCT2 using FFT is divided into three steps: 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step1: Re-ordering of even and odd elements of input. 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step2: Calculating FFT of the re-ordered input. 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step3: Taking the real part of the product of FFT output and weights. 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * where, 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Y4 -- DCT4 output, Y2 -- DCT2 output 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * (d) Multiplying the output with the normalizing factor sqrt(2/N). 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /*-------- Pre-processing ------------*/ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N); 31657 .loc 41 87 0 31658 0004 0388 ldrh r3, [r0] 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 31659 .loc 41 58 0 31660 0006 0746 mov r7, r0 31661 0008 0C46 mov r4, r1 ARM GAS /tmp/ccfbYRip.s page 985 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 31662 .loc 41 59 0 31663 000a D0E90201 ldrd r0, r1, [r0, #8] 31664 .LVL3502: 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 31665 .loc 41 58 0 31666 000e 85B0 sub sp, sp, #20 31667 .LCFI411: 31668 .cfi_def_cfa_offset 56 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 31669 .loc 41 58 0 31670 0010 1646 mov r6, r2 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ 31671 .loc 41 59 0 31672 0012 0390 str r0, [sp, #12] 31673 .LVL3503: 31674 .loc 41 87 0 31675 0014 1046 mov r0, r2 31676 .LVL3504: 31677 0016 FFF7FEFF bl arm_mult_q31 31678 .LVL3505: 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N); 31679 .loc 41 88 0 31680 001a 3B88 ldrh r3, [r7] 31681 001c 3246 mov r2, r6 31682 001e 0121 movs r1, #1 31683 0020 3046 mov r0, r6 31684 0022 FFF7FEFF bl arm_shift_q31 31685 .LVL3506: 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* ---------------------------------------------------------------- 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step1: Re-ordering of even and odd elements as 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * pState[i] = pInlineBuffer[2*i] and 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ---------------------------------------------------------------------*/ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS1 initialized to pState */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1 = pState; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS2 = pState + (S->N - 1U); 31686 .loc 41 100 0 31687 0026 3D88 ldrh r5, [r7] 31688 .LVL3507: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to input buffer */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->Nby2 >> 2U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do ARM GAS /tmp/ccfbYRip.s page 986 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Re-ordering of even and odd elements */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState[i] = pInlineBuffer[2*i] */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS1++ = *pbuff++; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS2-- = *pbuff++; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS1++ = *pbuff++; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS2-- = *pbuff++; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS1++ = *pbuff++; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS2-- = *pbuff++; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS1++ = *pbuff++; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS2-- = *pbuff++; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement loop counter */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to input buffer */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS1 initialized to pState */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1 = pState; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->N >> 2U; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Compute 4 outputs at a time */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Writing the re-ordered output back to inplace input buffer */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = *pS1++; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = *pS1++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = *pS1++; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = *pS1++; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement the loop counter */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* --------------------------------------------------------- 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step2: Calculate RFFT for N-point input 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * ---------------------------------------------------------- */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_rfft_q31 (S->pRfft, pInlineBuffer, pState); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /*---------------------------------------------------------------------- 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step3: Multiply the FFT output with the weights. 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *----------------------------------------------------------------------*/ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N); 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* The output of complex multiplication is in 3.29 format. 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting ARM GAS /tmp/ccfbYRip.s page 987 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_shift_q31 (pState, 2, pState, S->N * 2); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* ----------- Post-processing ---------- */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* DCT-IV can be obtained from DCT-II by the equation, 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Hence, Y4(0) = Y2(0)/2 */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Getting only real part from the output and Converting to DCT-IV */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = (S->N - 1U) >> 2U; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to input buffer. */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS1 initialized to pState */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1 = pState; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ >> 1U; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* points to the next real value */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement the loop counter */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ** No loop unrolling is used. */ 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = (S->N - 1U) % 0x4U; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** while (i > 0U) ARM GAS /tmp/ccfbYRip.s page 988 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* points to the next real value */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement loop counter */ 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter to N/4 instead of N for loop unrolling */ 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->N >> 2U; 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to the pInlineBuffer(now contains the output values) */ 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a t 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pbuff; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pbuff; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pbuff; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pbuff; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement loop counter */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** #else 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter to N/2 */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->Nby2; 31689 .loc 41 274 0 31690 0028 7A88 ldrh r2, [r7, #2] 31691 .LVL3508: 31692 002a A4F10409 sub r9, r4, #4 31693 002e 04EB850C add ip, r4, r5, lsl #2 31694 0032 4946 mov r1, r9 31695 0034 06F10803 add r3, r6, #8 31696 .LVL3509: 31697 .L1743: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** ARM GAS /tmp/ccfbYRip.s page 989 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Re-ordering of even and odd elements */ 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState[i] = pInlineBuffer[2*i] */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS1++ = *pbuff++; 31698 .loc 41 280 0 discriminator 1 31699 0038 53F8080C ldr r0, [r3, #-8] 31700 003c 41F8040F str r0, [r1, #4]! 31701 .LVL3510: 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState[N-i-1] = pInlineBuffer[2*i+1] */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pS2-- = *pbuff++; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement the loop counter */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 31702 .loc 41 286 0 discriminator 1 31703 0040 013A subs r2, r2, #1 31704 .LVL3511: 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 31705 .loc 41 282 0 discriminator 1 31706 0042 53F8040C ldr r0, [r3, #-4] 31707 0046 4CF8040D str r0, [ip, #-4]! 31708 .LVL3512: 31709 004a 03F10803 add r3, r3, #8 31710 .LVL3513: 31711 .loc 41 286 0 discriminator 1 31712 004e F3D1 bne .L1743 31713 0050 321F subs r2, r6, #4 31714 .LVL3514: 31715 .loc 41 286 0 is_stmt 0 31716 0052 2346 mov r3, r4 31717 .LVL3515: 31718 .L1744: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to input buffer */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS1 initialized to pState */ 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1 = pState; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->N; 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Writing the re-ordered output back to inplace input buffer */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = *pS1++; 31719 .loc 41 300 0 is_stmt 1 discriminator 1 31720 0054 53F8041B ldr r1, [r3], #4 31721 .LVL3516: 31722 0058 42F8041F str r1, [r2, #4]! 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement the loop counter */ 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 31723 .loc 41 304 0 discriminator 1 31724 005c 013D subs r5, r5, #1 ARM GAS /tmp/ccfbYRip.s page 990 31725 .LVL3517: 31726 005e F9D1 bne .L1744 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* --------------------------------------------------------- 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step2: Calculate RFFT for N-point input 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * ---------------------------------------------------------- */ 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_rfft_q31 (S->pRfft, pInlineBuffer, pState); 31727 .loc 41 311 0 31728 0060 D7F81080 ldr r8, [r7, #16] 31729 .LVL3518: 31730 .LBB3018: 31731 .LBB3019: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 31732 .loc 40 90 0 31733 0064 98F80420 ldrb r2, [r8, #4] @ zero_extendqisi2 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 31734 .loc 40 86 0 31735 0068 D8F80030 ldr r3, [r8] 31736 .LVL3519: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** #endif 31737 .loc 40 84 0 31738 006c D8F814B0 ldr fp, [r8, #20] 31739 .LVL3520: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 31740 .loc 40 90 0 31741 0070 012A cmp r2, #1 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** uint32_t i; 31742 .loc 40 86 0 31743 0072 4FEA530A lsr r10, r3, #1 31744 .LVL3521: 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 31745 .loc 40 90 0 31746 0076 43D0 beq .L1760 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 31747 .loc 40 108 0 31748 0078 5846 mov r0, fp 31749 007a 98F80530 ldrb r3, [r8, #5] @ zero_extendqisi2 31750 007e 3146 mov r1, r6 31751 0080 FFF7FEFF bl arm_cfft_q31 31752 .LVL3522: 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 31753 .loc 40 111 0 31754 0084 D8F80810 ldr r1, [r8, #8] 31755 0088 D8E90323 ldrd r2, r3, [r8, #12] 31756 008c 3046 mov r0, r6 31757 008e 0191 str r1, [sp, #4] 31758 0090 0094 str r4, [sp] 31759 0092 5146 mov r1, r10 31760 0094 FFF7FEFF bl arm_split_rfft_q31 31761 .LVL3523: 31762 .L1747: 31763 .LBE3019: 31764 .LBE3018: 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /*---------------------------------------------------------------------- ARM GAS /tmp/ccfbYRip.s page 991 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Step3: Multiply the FFT output with the weights. 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *----------------------------------------------------------------------*/ 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N); 31765 .loc 41 316 0 31766 0098 0399 ldr r1, [sp, #12] 31767 009a 3B88 ldrh r3, [r7] 31768 009c 2246 mov r2, r4 31769 009e 2046 mov r0, r4 31770 00a0 FFF7FEFF bl arm_cmplx_mult_cmplx_q31 31771 .LVL3524: 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* The output of complex multiplication is in 3.29 format. 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** arm_shift_q31(pState, 2, pState, S->N * 2); 31772 .loc 41 320 0 31773 00a4 3B88 ldrh r3, [r7] 31774 00a6 2246 mov r2, r4 31775 00a8 5B00 lsls r3, r3, #1 31776 00aa 0221 movs r1, #2 31777 00ac 2046 mov r0, r4 31778 00ae FFF7FEFF bl arm_shift_q31 31779 .LVL3525: 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* ----------- Post-processing ---------- */ 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* DCT-IV can be obtained from DCT-II by the equation, 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** * Hence, Y4(0) = Y2(0)/2 */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Getting only real part from the output and Converting to DCT-IV */ 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to input buffer. */ 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pS1 initialized to pState */ 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1 = pState; 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ >> 1U; 31780 .loc 41 335 0 31781 00b2 2268 ldr r2, [r4] 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState pointer is incremented twice as the real values are located alternatively in the array 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing the loop counter */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = (S->N - 1U); 31782 .loc 41 343 0 31783 00b4 3888 ldrh r0, [r7] 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* input buffer acts as inplace, so output values are stored in the input itself. */ 31784 .loc 41 335 0 31785 00b6 5210 asrs r2, r2, #1 31786 .LVL3526: 31787 .loc 41 343 0 31788 00b8 0138 subs r0, r0, #1 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 31789 .loc 41 337 0 ARM GAS /tmp/ccfbYRip.s page 992 31790 00ba 311D adds r1, r6, #4 31791 00bc 3260 str r2, [r6] 31792 .loc 41 343 0 31793 00be 0346 mov r3, r0 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 31794 .loc 41 337 0 31795 00c0 8C46 mov ip, r1 31796 .LVL3527: 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** while (i > 0U) 31797 .loc 41 345 0 31798 00c2 0028 cmp r0, #0 31799 00c4 3DD0 beq .L1749 31800 00c6 1034 adds r4, r4, #16 31801 .LVL3528: 31802 .L1750: 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pState pointer (pS1) is incremented twice as the real values are located alternatively in th 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pS1++ - in; 31803 .loc 41 349 0 31804 00c8 54F8085C ldr r5, [r4, #-8] 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 31805 .loc 41 345 0 31806 00cc 013B subs r3, r3, #1 31807 .LVL3529: 31808 .loc 41 349 0 31809 00ce A5EB0202 sub r2, r5, r2 31810 .LVL3530: 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = in; 31811 .loc 41 350 0 31812 00d2 4CF8042B str r2, [ip], #4 31813 .LVL3531: 31814 00d6 04F10804 add r4, r4, #8 31815 .LVL3532: 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 31816 .loc 41 345 0 31817 00da F5D1 bne .L1750 31818 00dc 01E0 b .L1751 31819 .LVL3533: 31820 .L1761: 31821 00de 0431 adds r1, r1, #4 31822 .LVL3534: 31823 00e0 0138 subs r0, r0, #1 31824 .LVL3535: 31825 .L1751: 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* points to the next real value */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pS1++; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement loop counter */ 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Initializing loop counter */ ARM GAS /tmp/ccfbYRip.s page 993 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i = S->N; 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* pbuff initialized to the pInlineBuffer (now contains the output values) */ 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** pbuff = pInlineBuffer; 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** do 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** { 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** in = *pbuff; 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); 31826 .loc 41 371 0 discriminator 1 31827 00e2 3268 ldr r2, [r6] 31828 00e4 7B68 ldr r3, [r7, #4] 31829 00e6 82FB0334 smull r3, r4, r2, r3 31830 00ea DA0F lsrs r2, r3, #31 31831 00ec 42EA4402 orr r2, r2, r4, lsl #1 31832 00f0 41F8042C str r2, [r1, #-4] 31833 .LVL3536: 31834 00f4 0E46 mov r6, r1 31835 .LVL3537: 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** /* Decrement loop counter */ 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** i--; 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } while (i > 0U); 31836 .loc 41 375 0 discriminator 1 31837 00f6 0028 cmp r0, #0 31838 00f8 F1D1 bne .L1761 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** } 31839 .loc 41 379 0 31840 00fa 05B0 add sp, sp, #20 31841 .LCFI412: 31842 .cfi_remember_state 31843 .cfi_def_cfa_offset 36 31844 @ sp needed 31845 00fc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 31846 .LVL3538: 31847 .L1760: 31848 .LCFI413: 31849 .cfi_restore_state 31850 .LBB3021: 31851 .LBB3020: 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 31852 .loc 40 93 0 31853 0100 D8F80810 ldr r1, [r8, #8] 31854 0104 D8E90323 ldrd r2, r3, [r8, #12] 31855 0108 3046 mov r0, r6 31856 010a 0191 str r1, [sp, #4] 31857 010c 0094 str r4, [sp] 31858 010e 5146 mov r1, r10 31859 0110 FFF7FEFF bl arm_split_rifft_q31 31860 .LVL3539: 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** 31861 .loc 40 96 0 31862 0114 98F80530 ldrb r3, [r8, #5] @ zero_extendqisi2 ARM GAS /tmp/ccfbYRip.s page 994 31863 0118 98F80420 ldrb r2, [r8, #4] @ zero_extendqisi2 31864 011c 5846 mov r0, fp 31865 011e 2146 mov r1, r4 31866 0120 FFF7FEFF bl arm_cfft_q31 31867 .LVL3540: 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 31868 .loc 40 98 0 31869 0124 D8F80030 ldr r3, [r8] 31870 0128 002B cmp r3, #0 31871 012a B5D0 beq .L1747 31872 .LVL3541: 31873 .L1746: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** } 31874 .loc 40 100 0 31875 012c 59F8043F ldr r3, [r9, #4]! 31876 0130 5B00 lsls r3, r3, #1 31877 0132 C9F80030 str r3, [r9] 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c **** { 31878 .loc 40 98 0 31879 0136 D8F80030 ldr r3, [r8] 31880 013a 0135 adds r5, r5, #1 31881 .LVL3542: 31882 013c 9D42 cmp r5, r3 31883 013e F5D3 bcc .L1746 31884 0140 AAE7 b .L1747 31885 .LVL3543: 31886 .L1749: 31887 .LBE3020: 31888 .LBE3021: 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c **** 31889 .loc 41 371 0 31890 0142 7B68 ldr r3, [r7, #4] 31891 0144 82FB0334 smull r3, r4, r2, r3 31892 0148 DA0F lsrs r2, r3, #31 31893 .LVL3544: 31894 014a 42EA4402 orr r2, r2, r4, lsl #1 31895 014e 3260 str r2, [r6] 31896 .LVL3545: 31897 .loc 41 379 0 31898 0150 05B0 add sp, sp, #20 31899 .LCFI414: 31900 .cfi_def_cfa_offset 36 31901 @ sp needed 31902 0152 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} 31903 .cfi_endproc 31904 .LFE200: 31906 0156 00BF .text 31907 .Letext0: 31908 .file 42 "/usr/include/newlib/machine/_default_types.h" 31909 .file 43 "/usr/include/newlib/sys/_stdint.h" 31910 .file 44 "/usr/include/newlib/sys/lock.h" 31911 .file 45 "/usr/include/newlib/sys/_types.h" 31912 .file 46 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" 31913 .file 47 "/usr/include/newlib/sys/reent.h" 31914 .file 48 "/usr/include/newlib/math.h" 31915 .file 49 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h" 31916 .file 50 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_const_structs.h" ARM GAS /tmp/ccfbYRip.s page 995 ARM GAS /tmp/ccfbYRip.s page 996 DEFINED SYMBOLS *ABS*:0000000000000000 TransformFunctions.c /tmp/ccfbYRip.s:16 .text.arm_rfft_32_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:23 .text.arm_rfft_32_fast_init_f32:0000000000000000 arm_rfft_32_fast_init_f32 /tmp/ccfbYRip.s:96 .text.arm_rfft_32_fast_init_f32:000000000000002c $d /tmp/ccfbYRip.s:102 .text.arm_rfft_64_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:109 .text.arm_rfft_64_fast_init_f32:0000000000000000 arm_rfft_64_fast_init_f32 /tmp/ccfbYRip.s:180 .text.arm_rfft_64_fast_init_f32:000000000000002c $d /tmp/ccfbYRip.s:186 .text.arm_rfft_128_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:193 .text.arm_rfft_128_fast_init_f32:0000000000000000 arm_rfft_128_fast_init_f32 /tmp/ccfbYRip.s:264 .text.arm_rfft_128_fast_init_f32:000000000000002c $d /tmp/ccfbYRip.s:270 .text.arm_rfft_256_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:277 .text.arm_rfft_256_fast_init_f32:0000000000000000 arm_rfft_256_fast_init_f32 /tmp/ccfbYRip.s:348 .text.arm_rfft_256_fast_init_f32:000000000000002c $d /tmp/ccfbYRip.s:354 .text.arm_rfft_512_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:361 .text.arm_rfft_512_fast_init_f32:0000000000000000 arm_rfft_512_fast_init_f32 /tmp/ccfbYRip.s:432 .text.arm_rfft_512_fast_init_f32:0000000000000030 $d /tmp/ccfbYRip.s:438 .text.arm_rfft_1024_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:445 .text.arm_rfft_1024_fast_init_f32:0000000000000000 arm_rfft_1024_fast_init_f32 /tmp/ccfbYRip.s:516 .text.arm_rfft_1024_fast_init_f32:0000000000000030 $d /tmp/ccfbYRip.s:522 .text.arm_rfft_2048_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:529 .text.arm_rfft_2048_fast_init_f32:0000000000000000 arm_rfft_2048_fast_init_f32 /tmp/ccfbYRip.s:600 .text.arm_rfft_2048_fast_init_f32:0000000000000030 $d /tmp/ccfbYRip.s:606 .text.arm_rfft_4096_fast_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:613 .text.arm_rfft_4096_fast_init_f32:0000000000000000 arm_rfft_4096_fast_init_f32 /tmp/ccfbYRip.s:684 .text.arm_rfft_4096_fast_init_f32:0000000000000030 $d /tmp/ccfbYRip.s:690 .text.arm_rfft_32_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:697 .text.arm_rfft_32_fast_init_f64:0000000000000000 arm_rfft_32_fast_init_f64 /tmp/ccfbYRip.s:758 .text.arm_rfft_32_fast_init_f64:0000000000000028 $d /tmp/ccfbYRip.s:765 .text.arm_rfft_64_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:772 .text.arm_rfft_64_fast_init_f64:0000000000000000 arm_rfft_64_fast_init_f64 /tmp/ccfbYRip.s:832 .text.arm_rfft_64_fast_init_f64:0000000000000028 $d /tmp/ccfbYRip.s:839 .text.arm_rfft_128_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:846 .text.arm_rfft_128_fast_init_f64:0000000000000000 arm_rfft_128_fast_init_f64 /tmp/ccfbYRip.s:906 .text.arm_rfft_128_fast_init_f64:0000000000000028 $d /tmp/ccfbYRip.s:913 .text.arm_rfft_256_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:920 .text.arm_rfft_256_fast_init_f64:0000000000000000 arm_rfft_256_fast_init_f64 /tmp/ccfbYRip.s:980 .text.arm_rfft_256_fast_init_f64:000000000000002c $d /tmp/ccfbYRip.s:987 .text.arm_rfft_512_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:994 .text.arm_rfft_512_fast_init_f64:0000000000000000 arm_rfft_512_fast_init_f64 /tmp/ccfbYRip.s:1054 .text.arm_rfft_512_fast_init_f64:000000000000002c $d /tmp/ccfbYRip.s:1061 .text.arm_rfft_1024_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:1068 .text.arm_rfft_1024_fast_init_f64:0000000000000000 arm_rfft_1024_fast_init_f64 /tmp/ccfbYRip.s:1128 .text.arm_rfft_1024_fast_init_f64:0000000000000030 $d /tmp/ccfbYRip.s:1135 .text.arm_rfft_2048_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:1142 .text.arm_rfft_2048_fast_init_f64:0000000000000000 arm_rfft_2048_fast_init_f64 /tmp/ccfbYRip.s:1202 .text.arm_rfft_2048_fast_init_f64:0000000000000030 $d /tmp/ccfbYRip.s:1209 .text.arm_rfft_4096_fast_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:1216 .text.arm_rfft_4096_fast_init_f64:0000000000000000 arm_rfft_4096_fast_init_f64 /tmp/ccfbYRip.s:1276 .text.arm_rfft_4096_fast_init_f64:0000000000000030 $d /tmp/ccfbYRip.s:1283 .text.arm_radix4_butterfly_inverse_q15.constprop.1:0000000000000000 $t /tmp/ccfbYRip.s:1290 .text.arm_radix4_butterfly_inverse_q15.constprop.1:0000000000000000 arm_radix4_butterfly_inverse_q15.constprop.1 /tmp/ccfbYRip.s:2351 .text.arm_radix4_butterfly_inverse_q15.constprop.1:0000000000000250 $d /tmp/ccfbYRip.s:2356 .text.arm_radix4_butterfly_q15.constprop.2:0000000000000000 $t /tmp/ccfbYRip.s:2363 .text.arm_radix4_butterfly_q15.constprop.2:0000000000000000 arm_radix4_butterfly_q15.constprop.2 /tmp/ccfbYRip.s:3421 .text.arm_radix4_butterfly_q15.constprop.2:0000000000000250 $d /tmp/ccfbYRip.s:3426 .text.arm_bitreversal_f32:0000000000000000 $t ARM GAS /tmp/ccfbYRip.s page 997 /tmp/ccfbYRip.s:3434 .text.arm_bitreversal_f32:0000000000000000 arm_bitreversal_f32 /tmp/ccfbYRip.s:3639 .text.arm_bitreversal_q31:0000000000000000 $t /tmp/ccfbYRip.s:3647 .text.arm_bitreversal_q31:0000000000000000 arm_bitreversal_q31 /tmp/ccfbYRip.s:3792 .text.arm_bitreversal_q15:0000000000000000 $t /tmp/ccfbYRip.s:3800 .text.arm_bitreversal_q15:0000000000000000 arm_bitreversal_q15 /tmp/ccfbYRip.s:3891 .text.arm_bitreversal_64:0000000000000000 $t /tmp/ccfbYRip.s:3899 .text.arm_bitreversal_64:0000000000000000 arm_bitreversal_64 /tmp/ccfbYRip.s:3985 .text.arm_bitreversal_32:0000000000000000 $t /tmp/ccfbYRip.s:3993 .text.arm_bitreversal_32:0000000000000000 arm_bitreversal_32 /tmp/ccfbYRip.s:4071 .text.arm_bitreversal_16:0000000000000000 $t /tmp/ccfbYRip.s:4079 .text.arm_bitreversal_16:0000000000000000 arm_bitreversal_16 /tmp/ccfbYRip.s:4164 .text.arm_radix4_butterfly_f64:0000000000000000 $t /tmp/ccfbYRip.s:4172 .text.arm_radix4_butterfly_f64:0000000000000000 arm_radix4_butterfly_f64 /tmp/ccfbYRip.s:4730 .text.arm_cfft_radix4by2_f64:0000000000000000 $t /tmp/ccfbYRip.s:4738 .text.arm_cfft_radix4by2_f64:0000000000000000 arm_cfft_radix4by2_f64 /tmp/ccfbYRip.s:4936 .text.arm_cfft_f64:0000000000000000 $t /tmp/ccfbYRip.s:4944 .text.arm_cfft_f64:0000000000000000 arm_cfft_f64 /tmp/ccfbYRip.s:5205 .text.arm_cfft_f64:0000000000000170 $d /tmp/ccfbYRip.s:5210 .text.arm_cfft_radix4by2_q15:0000000000000000 $t /tmp/ccfbYRip.s:5218 .text.arm_cfft_radix4by2_q15:0000000000000000 arm_cfft_radix4by2_q15 /tmp/ccfbYRip.s:5475 .text.arm_cfft_radix4by2_q15:00000000000000c4 $d /tmp/ccfbYRip.s:5480 .text.arm_cfft_radix4by2_inverse_q15:0000000000000000 $t /tmp/ccfbYRip.s:5488 .text.arm_cfft_radix4by2_inverse_q15:0000000000000000 arm_cfft_radix4by2_inverse_q15 /tmp/ccfbYRip.s:5744 .text.arm_cfft_radix4by2_inverse_q15:00000000000000c4 $d /tmp/ccfbYRip.s:5749 .text.arm_cfft_q15:0000000000000000 $t /tmp/ccfbYRip.s:5757 .text.arm_cfft_q15:0000000000000000 arm_cfft_q15 /tmp/ccfbYRip.s:8031 .text.arm_cfft_q15:0000000000000590 $d /tmp/ccfbYRip.s:8036 .text.arm_cfft_radix4by2_q31:0000000000000000 $t /tmp/ccfbYRip.s:8044 .text.arm_cfft_radix4by2_q31:0000000000000000 arm_cfft_radix4by2_q31 /tmp/ccfbYRip.s:9548 .text.arm_cfft_radix4by2_inverse_q31:0000000000000000 $t /tmp/ccfbYRip.s:9556 .text.arm_cfft_radix4by2_inverse_q31:0000000000000000 arm_cfft_radix4by2_inverse_q31 /tmp/ccfbYRip.s:11042 .text.arm_cfft_q31:0000000000000000 $t /tmp/ccfbYRip.s:11050 .text.arm_cfft_q31:0000000000000000 arm_cfft_q31 /tmp/ccfbYRip.s:12660 .text.arm_cfft_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:12668 .text.arm_cfft_init_f32:0000000000000000 arm_cfft_init_f32 /tmp/ccfbYRip.s:12780 .text.arm_cfft_init_f32:0000000000000080 $d /tmp/ccfbYRip.s:12793 .text.arm_cfft_init_f64:0000000000000000 $t /tmp/ccfbYRip.s:12801 .text.arm_cfft_init_f64:0000000000000000 arm_cfft_init_f64 /tmp/ccfbYRip.s:12914 .text.arm_cfft_init_f64:0000000000000080 $d /tmp/ccfbYRip.s:12927 .text.arm_cfft_init_q15:0000000000000000 $t /tmp/ccfbYRip.s:12935 .text.arm_cfft_init_q15:0000000000000000 arm_cfft_init_q15 /tmp/ccfbYRip.s:13048 .text.arm_cfft_init_q15:0000000000000080 $d /tmp/ccfbYRip.s:13061 .text.arm_cfft_init_q31:0000000000000000 $t /tmp/ccfbYRip.s:13069 .text.arm_cfft_init_q31:0000000000000000 arm_cfft_init_q31 /tmp/ccfbYRip.s:13182 .text.arm_cfft_init_q31:0000000000000080 $d /tmp/ccfbYRip.s:13195 .text.arm_radix2_butterfly_f32:0000000000000000 $t /tmp/ccfbYRip.s:13203 .text.arm_radix2_butterfly_f32:0000000000000000 arm_radix2_butterfly_f32 /tmp/ccfbYRip.s:13472 .text.arm_radix2_butterfly_inverse_f32:0000000000000000 $t /tmp/ccfbYRip.s:13480 .text.arm_radix2_butterfly_inverse_f32:0000000000000000 arm_radix2_butterfly_inverse_f32 /tmp/ccfbYRip.s:13765 .text.arm_cfft_radix2_f32:0000000000000000 $t /tmp/ccfbYRip.s:13773 .text.arm_cfft_radix2_f32:0000000000000000 arm_cfft_radix2_f32 /tmp/ccfbYRip.s:13845 .text.arm_cfft_radix2_init_f32:0000000000000000 $t /tmp/ccfbYRip.s:13853 .text.arm_cfft_radix2_init_f32:0000000000000000 arm_cfft_radix2_init_f32 /tmp/ccfbYRip.s:14157 .text.arm_cfft_radix2_init_f32:0000000000000124 $d /tmp/ccfbYRip.s:14171 .text.arm_cfft_radix2_init_q15:0000000000000000 $t /tmp/ccfbYRip.s:14179 .text.arm_cfft_radix2_init_q15:0000000000000000 arm_cfft_radix2_init_q15 /tmp/ccfbYRip.s:14447 .text.arm_cfft_radix2_init_q15:00000000000000ec $d ARM GAS /tmp/ccfbYRip.s page 998 /tmp/ccfbYRip.s:14461 .text.arm_cfft_radix2_init_q31:0000000000000000 $t /tmp/ccfbYRip.s:14469 .text.arm_cfft_radix2_init_q31:0000000000000000 arm_cfft_radix2_init_q31 /tmp/ccfbYRip.s:14737 .text.arm_cfft_radix2_init_q31:00000000000000ec $d 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.text.arm_dct4_q31:0000000000000000 arm_dct4_q31 UNDEFINED SYMBOLS arm_cfft_sR_f32_len16 twiddleCoef_rfft_32 arm_cfft_sR_f32_len32 twiddleCoef_rfft_64 arm_cfft_sR_f32_len64 twiddleCoef_rfft_128 arm_cfft_sR_f32_len128 twiddleCoef_rfft_256 arm_cfft_sR_f32_len256 twiddleCoef_rfft_512 arm_cfft_sR_f32_len512 twiddleCoef_rfft_1024 arm_cfft_sR_f32_len1024 twiddleCoef_rfft_2048 arm_cfft_sR_f32_len2048 twiddleCoef_rfft_4096 armBitRevIndexTableF64_16 twiddleCoefF64_16 twiddleCoefF64_rfft_32 armBitRevIndexTableF64_32 twiddleCoefF64_32 twiddleCoefF64_rfft_64 armBitRevIndexTableF64_64 twiddleCoefF64_64 twiddleCoefF64_rfft_128 armBitRevIndexTableF64_128 twiddleCoefF64_128 twiddleCoefF64_rfft_256 armBitRevIndexTableF64_256 twiddleCoefF64_256 twiddleCoefF64_rfft_512 armBitRevIndexTableF64_512 twiddleCoefF64_512 twiddleCoefF64_rfft_1024 armBitRevIndexTableF64_1024 twiddleCoefF64_1024 twiddleCoefF64_rfft_2048 armBitRevIndexTableF64_2048 twiddleCoefF64_2048 twiddleCoefF64_rfft_4096 __aeabi_dadd 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