ARM GAS /tmp/ccsErhU4.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "stm32g4xx_hal_adc.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.HAL_ADC_MspInit,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .weak HAL_ADC_MspInit 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 HAL_ADC_MspInit: 25 .LFB331: 26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c" 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @file stm32g4xx_hal_adc.c 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief This file provides firmware functions to manage the following 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * functionalities of the Analog to Digital Converter (ADC) 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ Initialization and Configuration of ADC 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * + Operation functions 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ Start, stop, get result of conversions of regular 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * group, using 3 possible modes: polling, interruption or DMA. 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * + Control functions 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ Channels configuration on regular group 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ Analog Watchdog configuration 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * + State functions 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ ADC state machine management 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ++ Interrupts and flags management 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Other functions (extended functions) are available in file 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * "stm32g4xx_hal_adc_ex.c". 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @verbatim 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================================================== 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### ADC peripheral features ##### 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================================================== 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Interrupt generation at the end of regular conversion and in case of 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** analog watchdog or overrun events. 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Single and continuous conversion modes. ARM GAS /tmp/ccsErhU4.s page 2 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Scan mode for conversion of several channels sequentially. 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Data alignment with in-built data coherency. 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Programmable sampling time (channel wise) 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) External trigger (timer or EXTI) with configurable polarity 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) DMA request generation for transfer of conversions data of regular group. 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Configurable delay between conversions in Dual interleaved mode. 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC channels selectable single/differential input. 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC offset shared on 4 offset instances. 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC gain compensation 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC calibration 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC conversion of regular group. 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC supply requirements: 1.62 V to 3.6 V. 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Vdda or to an external voltage reference). 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### How to use this driver ##### 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================================================== 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *** Configuration of top level parameters related to ADC *** 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================================ 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Enable the ADC interface 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) As prerequisite, ADC clock must be configured at RCC top level. 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Two clock settings are mandatory: 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) ADC clock (core clock, also possibly conversion clock). 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) ADC clock (conversions clock). 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Two possible clock sources: synchronous clock derived from AHB clock 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** or asynchronous clock derived from system clock or PLL (output divider P) 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** running up to 75MHz. 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Example: 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Into HAL_ADC_MspInit() (recommended code location) or with 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** other device clock parameters configuration: 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) __HAL_RCC_ADC_CLK_ENABLE(); (mandatory) 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** RCC_ADCCLKSOURCE_PLL enable: (optional: if asynchronous clock 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) RCC_PeriphClkInitTypeDef RCC_PeriphClkInit; 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLL; 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); ARM GAS /tmp/ccsErhU4.s page 3 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC clock source and clock prescaler are configured at ADC level with 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** parameter "ClockPrescaler" using function HAL_ADC_Init(). 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) ADC pins configuration 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Enable the clock for the ADC GPIOs 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_ENABLE() 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Configure these ADC pins in analog mode 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_GPIO_Init() 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Configure the NVIC for ADC 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** into the function of corresponding ADC interruption vector 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADCx_IRQHandler(). 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Configure the DMA (DMA channel, mode normal or circular, ...) 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_DMA_Init(). 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Configure the NVIC for DMA 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** into the function of corresponding DMA interruption vector 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** DMAx_Channelx_IRQHandler(). 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *** Configuration of ADC, group regular, channels parameters *** 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ================================================================ 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Configure the ADC parameters (resolution, data alignment, ...) 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** and regular group parameters (conversion trigger, sequencer, ...) 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Init(). 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Configure the channels for regular group parameters (channel number, 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** channel rank into sequencer, ..., into regular group) 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_ConfigChannel(). 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** monitored, thresholds, ...) 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_AnalogWDGConfig(). 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *** Execution of ADC conversions *** 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ==================================== 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, perform an automatic ADC calibration to improve the 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** conversion accuracy 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADCEx_Calibration_Start(). 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) ADC driver can be used among three modes: polling, interruption, 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** transfer by DMA. 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC conversion by polling: 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Start() 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Wait for ADC conversion completion ARM GAS /tmp/ccsErhU4.s page 4 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_PollForConversion() 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Retrieve conversion results 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_GetValue() 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Stop() 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC conversion by interruption: 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Start_IT() 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (this function must be implemented in user program) 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Retrieve conversion results 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_GetValue() 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Stop_IT() 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC conversion with transfer by DMA: 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Start_DMA() 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback() 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (these functions must be implemented in user program) 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Conversion results are automatically transferred by DMA into 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** destination variable address. 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_ADC_Stop_DMA() 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (@) Callback functions must be implemented in user program: 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+@) HAL_ADC_ErrorCallback() 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog) 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+@) HAL_ADC_ConvCpltCallback() 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+@) HAL_ADC_ConvHalfCpltCallback 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *** Deinitialization of ADC *** 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================================ 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Disable the ADC interface 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC clock can be hard reset and disabled at RCC top level. 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Hard reset of ADC peripherals 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET(). 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) ADC clock disable 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using the equivalent macro/functions as configuration step. 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) Example: 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Into HAL_ADC_MspDeInit() (recommended code location) or with 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** other device clock parameters configuration: 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) ADC pins configuration 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Disable the clock for the ADC GPIOs 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_DISABLE() 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 5 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Disable the NVIC for ADC 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Deinitialize the DMA 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_DMA_Init(). 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (++) Disable the NVIC for DMA 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *** Callback registration *** 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ============================================= 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1, 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** allows the user to configure dynamically the driver callbacks. 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Use Functions @ref HAL_ADC_RegisterCallback() 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** to register an interrupt callback. 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks: 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ErrorCallback : ADC error callback 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) InjectedConvCpltCallback : ADC group injected conversion complete callback 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) InjectedQueueOverflowCallback : ADC group injected context queue overflow callback 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindow2Callback : ADC analog watchdog 2 callback 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindow3Callback : ADC analog watchdog 3 callback 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) EndOfSamplingCallback : ADC end of sampling callback 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** and a pointer to the user callback function. 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** weak function. 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** and the Callback ID. 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** This function allows to reset following callbacks: 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) ErrorCallback : ADC error callback 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) InjectedConvCpltCallback : ADC group injected conversion complete callback 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) InjectedQueueOverflowCallback : ADC group injected context queue overflow callback 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindow2Callback : ADC analog watchdog 2 callback 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) LevelOutOfWindow3Callback : ADC analog watchdog 3 callback 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) EndOfSamplingCallback : ADC end of sampling callback 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] ARM GAS /tmp/ccsErhU4.s page 6 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** all callbacks are set to the corresponding weak functions: 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback(). 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Exception done for MspInit and MspDeInit functions that are 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** these callbacks are null (not registered beforehand). 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only. 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state, 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Then, the user first registers the MspInit/MspDeInit user callbacks 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit() 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** or @ref HAL_ADC_Init() function. 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** not defined, the callback registration feature is not available and all callbacks 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** are set to the corresponding weak functions. 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @endverbatim 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ****************************************************************************** 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @attention 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** *

© Copyright (c) 2019 STMicroelectronics. 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * All rights reserved.

295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This software component is licensed by ST under BSD 3-Clause license, 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the "License"; You may not use this file except in compliance with the 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * License. You may obtain a copy of the License at: 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * opensource.org/licenses/BSD-3-Clause 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ****************************************************************************** 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/ 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #include "stm32g4xx_hal.h" 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @addtogroup STM32G4xx_HAL_Driver 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC ADC 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief ADC HAL module driver 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #ifdef HAL_ADC_MODULE_ENABLED 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 7 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Private typedef -----------------------------------------------------------*/ 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Private define ------------------------------------------------------------*/ 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Private_Constants ADC Private Constants 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #define ADC_CFGR_FIELDS_1 ((ADC_CFGR_RES | ADC_CFGR_ALIGN |\ 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_CONT | ADC_CFGR_OVRMOD |\ 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM |\ 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of paramete 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Timeout values for ADC operations (enable settling time, */ 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* disable settling time, ...). */ 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Values defined to be higher than worst cases: low clock frequency, */ 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* maximum prescalers. */ 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #define ADC_ENABLE_TIMEOUT (2UL) /*!< ADC enable time-out value */ 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #define ADC_DISABLE_TIMEOUT (2UL) /*!< ADC disable time-out value */ 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Timeout to wait for current conversion on going to be completed. */ 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Timeout fixed to longest ADC conversion possible, for 1 channel: */ 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - maximum sampling time (640.5 adc_clk) */ 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - ADC resolution (Tsar 12 bits= 12.5 adc_clk) */ 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - System clock / ADC clock <= 4096 (hypothesis of maximum clock ratio) */ 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - ADC oversampling ratio 256 */ 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Calculation: 653 * 4096 * 256 CPU clock cycles max */ 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Unit: cycles of CPU clock. */ 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #define ADC_CONVERSION_TIME_MAX_CPU_CYCLES (653UL * 4096UL * 256UL) /*!< ADC conversion completion 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Private macro -------------------------------------------------------------*/ 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Private variables ---------------------------------------------------------*/ 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Private function prototypes -----------------------------------------------*/ 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Exported functions --------------------------------------------------------*/ 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions ADC Exported Functions 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief ADC Initialization and Configuration functions 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @verbatim 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### Initialization and de-initialization functions ##### 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] This section provides functions allowing to: 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Initialize and configure the ADC. 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) De-initialize the ADC. 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @endverbatim 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 8 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Initialize the ADC peripheral and regular group according to 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * parameters specified in structure "ADC_InitTypeDef". 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note As prerequisite, ADC clock must be configured at RCC top level 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (refer to description of RCC configuration for ADC 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * in header of this file). 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Possibility to update parameters on the fly: 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * coming from ADC state reset. Following calls to this function can 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * be used to reconfigure some parameters of ADC_InitTypeDef 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * structure on the fly, without modifying MSP configuration. If ADC 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * MSP has to be modified again, HAL_ADC_DeInit() must be called 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * before HAL_ADC_Init(). 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For parameters constraints, see comments of structure 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * "ADC_InitTypeDef". 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note This function configures the ADC within 2 scopes: scope of entire 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ADC and scope of regular group. For parameters details, see comments 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * of structure "ADC_InitTypeDef". 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Parameters related to common ADC registers (ADC clock mode) are set 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * only if all ADCs are disabled. 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * If this is not the case, these common parameters setting are 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behaviour in 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * case of update of a parameter of ADC_InitTypeDef on the fly, 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * without disabling the other ADCs. 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc) 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpCFGR; 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_reg_is_conversion_on_going; 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0UL; 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check ADC handle */ 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc == NULL) 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_GAIN_COMPENSATION(hadc->Init.GainCompensation)); 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc, hadc->Init.ExternalTrigConv)); 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_SAMPLINGMODE(hadc->Init.SamplingMode)); 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); ARM GAS /tmp/ccsErhU4.s page 9 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion)); 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* DISCEN and CONT bits cannot be set at the same time */ 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */ 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Initialization of ADC MSP */ 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->State == HAL_ADC_STATE_RESET) 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Init the ADC Callback settings */ 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback; /* Legacy weak 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedQueueOverflowCallback = HAL_ADCEx_InjectedQueueOverflowCallback; /* Legacy weak 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow2Callback = HAL_ADCEx_LevelOutOfWindow2Callback; /* Legacy weak 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow3Callback = HAL_ADCEx_LevelOutOfWindow3Callback; /* Legacy weak 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->EndOfSamplingCallback = HAL_ADCEx_EndOfSamplingCallback; /* Legacy weak 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->MspInitCallback == NULL) 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Init the low level hardware */ 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback(hadc); 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Init the low level hardware */ 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_MspInit(hadc); 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to none */ 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Initialize Lock */ 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED; 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Exit from deep-power-down mode and ADC voltage regulator enable */ 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsDeepPowerDownEnabled(hadc->Instance) != 0UL) 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC deep power down mode */ 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_DisableDeepPowerDown(hadc->Instance); ARM GAS /tmp/ccsErhU4.s page 10 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* System was in deep power down mode, calibration must 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** be relaunched or a previously saved calibration factor 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** re-applied once the ADC voltage regulator is enabled */ 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable ADC internal voltage regulator */ 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_EnableInternalRegulator(hadc->Instance); 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Variable divided by 2 to compensate partially */ 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* CPU processing cycles, scaling in us split to not */ 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* exceed 32 bits register capacity and handle low frequency. */ 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * ((SystemCoreClock / (100000UL 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** wait_loop_index--; 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verification that ADC voltage regulator is correctly enabled, whether */ 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* or not ADC is coming from state reset (if any potential problem of */ 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* clocking, voltage regulator would not be enabled). */ 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* correctly completed and if there is no conversion on going on regular */ 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* called to update a parameter on the fly). */ 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_reg_is_conversion_on_going == 0UL) 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL); 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of common ADC parameters */ 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - clock configuration */ 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 11 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset configuration of ADC common register CCR: */ 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* */ 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - ADC clock mode and ACC prescaler (CKMODE and PRESC bits)are set */ 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* according to adc->Init.ClockPrescaler. It selects the clock */ 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* source and sets the clock division factor. */ 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* */ 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */ 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */ 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */ 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */ 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* parameters): */ 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - when multimode feature is available, multimode-related */ 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* parameters: MDMA, DMACFG, DELAY, DUAL (set by API */ 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* HAL_ADCEx_MultiModeConfigChannel() ) */ 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */ 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() or */ 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* HAL_ADCEx_InjectedConfigChannel() ) */ 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(hadc->Instance), hadc->Init.ClockPrescaler); 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of ADC: */ 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - resolution Init.Resolution */ 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - data alignment Init.DataAlign */ 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - external trigger to start conversion Init.ExternalTrigConv */ 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - external trigger polarity Init.ExternalTrigConvEdge */ 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - continuous conversion mode Init.ContinuousConvMode */ 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - overrun Init.Overrun */ 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - discontinuous mode Init.DiscontinuousConvMode */ 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - discontinuous mode channel count Init.NbrOfDiscConversion */ 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Overrun | 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.DataAlign | 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Resolution | 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpCFGR |= ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion); 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */ 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* start. */ 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */ 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */ 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* software start. */ 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | hadc->Init.ExternalTrigConvEdge 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ); 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update Configuration Register CFGR */ 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); ARM GAS /tmp/ccsErhU4.s page 12 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of sampling mode */ 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG, hadc->Init.SamplingMode); 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* conversion on going on regular and injected groups: */ 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Gain Compensation Init.GainCompensation */ 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - DMA continuous request Init.DMAContinuousRequests */ 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - LowPowerAutoWait feature Init.LowPowerAutoWait */ 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Oversampling parameters Init.Oversampling */ 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpCFGR = (ADC_CFGR_DFSDM(hadc) | 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR); 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.GainCompensation != 0UL) 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR2, ADC_CFGR2_GCOMP); 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->GCOMP, ADC_GCOMP_GCOMPCOEFF, hadc->Init.GainCompensation); 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_GCOMP); 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->GCOMP, ADC_GCOMP_GCOMPCOEFF, 0UL); 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.OversamplingMode == ENABLE) 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversampling.Ratio)); 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift)); 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode)); 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset)); 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of Oversampler: */ 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Oversampling Ratio */ 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Right bit shift */ 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Triggered mode */ 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Oversampling mode (continued/resumed) */ 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2, 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSR | 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSS | 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_TROVS | 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_ROVSM, 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_ROVSE | 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Oversampling.Ratio | 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Oversampling.RightBitShift | 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Oversampling.TriggeredMode | 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Oversampling.OversamplingStopReset 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ); ARM GAS /tmp/ccsErhU4.s page 13 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC oversampling scope on ADC group regular */ 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of regular group sequencer: */ 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if scan mode is disabled, regular channels sequence length is set to */ 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 0x00: 1 channel converted (channel on regular rank 1) */ 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameter "NbrOfConversion" is discarded. */ 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Scan mode is not present by hardware on this device, but */ 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* emulated by software for alignment over all STM32 devices. */ 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if scan mode is enabled, regular channels sequence length is set to */ 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* parameter "NbrOfConversion". */ 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set number of ranks in regular group sequencer */ 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1)); 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Initialize the ADC state */ 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * values, with deinitialization of the ADC MSP. 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled. 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (function "HAL_ADC_MspDeInit()" is also called under the same conditions: 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * all ADC instances use the same core clock at RCC level, disabling 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the core clock reset all ADC instances). 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behavior in 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * common group is still running. 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note By default, HAL_ADC_DeInit() set ADC in mode deep power-down: ARM GAS /tmp/ccsErhU4.s page 14 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * this saves more power by reducing leakage currents 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * and is particularly interesting before entering MCU low-power modes. 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc) 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check ADC handle */ 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc == NULL) 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Stop potential conversion on going */ 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Flush register JSQR: reset the queue sequencer when injected */ 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* queue sequencer is enabled and ADC disabled. */ 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* The software and hardware triggers of the injected sequence are both */ 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* internally disabled just after the completion of the last valid */ 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* injected sequence. */ 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQM); 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable the ADC peripheral */ 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if ADC is effectively disabled */ 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Change ADC state */ 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY; 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: HAL ADC deInit is done independently of ADC conversion stop */ 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* and disable return status. In case of status fail, attempt to */ 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* perform deinitialization anyway and it is up user code in */ 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* in HAL_ADC_MspDeInit() to reset the ADC peripheral using */ 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* system RCC hard reset. */ 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Reset ADC registers ========== */ 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register IER */ 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD3 | ADC_IT_AWD2 | ADC_IT_AWD1 | 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_JQOVF | ADC_IT_OVR | 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_JEOS | ADC_IT_JEOC | ARM GAS /tmp/ccsErhU4.s page 15 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_EOSMP | ADC_IT_RDY)); 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register ISR */ 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD3 | ADC_FLAG_AWD2 | ADC_FLAG_AWD1 | 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_FLAG_JQOVF | ADC_FLAG_OVR | 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_FLAG_JEOS | ADC_FLAG_JEOC | 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_FLAG_EOSMP | ADC_FLAG_RDY)); 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register CR */ 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Bits ADC_CR_JADSTP, ADC_CR_ADSTP, ADC_CR_JADSTART, ADC_CR_ADSTART, 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CR_ADCAL, ADC_CR_ADDIS and ADC_CR_ADEN are in access mode "read-set": 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** no direct reset applicable. 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Update CR register to reset value where doable by software */ 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN | ADC_CR_ADCALDIF); 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register CFGR */ 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_FIELDS); 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register CFGR2 */ 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSM | ADC_CFGR2_TROVS | ADC_CFGR2_OVSS | 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSR | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE); 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SMPR1 */ 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SMPR1, ADC_SMPR1_FIELDS); 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SMPR2 */ 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SMPR2, ADC_SMPR2_SMP18 | ADC_SMPR2_SMP17 | ADC_SMPR2_SMP16 | 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 | ADC_SMPR2_SMP13 | 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SMPR2_SMP12 | ADC_SMPR2_SMP11 | ADC_SMPR2_SMP10); 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register TR1 */ 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register TR2 */ 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2); 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register TR3 */ 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3); 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SQR1 */ 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_SQ4 | ADC_SQR1_SQ3 | ADC_SQR1_SQ2 | 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR1_SQ1 | ADC_SQR1_L); 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SQR2 */ 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ9 | ADC_SQR2_SQ8 | ADC_SQR2_SQ7 | 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR2_SQ6 | ADC_SQR2_SQ5); 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SQR3 */ 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ14 | ADC_SQR3_SQ13 | ADC_SQR3_SQ12 | 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR3_SQ11 | ADC_SQR3_SQ10); 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register SQR4 */ 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->SQR4, ADC_SQR4_SQ16 | ADC_SQR4_SQ15); ARM GAS /tmp/ccsErhU4.s page 16 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Register JSQR was reset when the ADC was disabled */ 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register DR */ 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR1 */ 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1); 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR2 */ 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN | ADC_OFR2_OFFSET2_CH | ADC_OFR2_OFFSET2); 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR3 */ 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN | ADC_OFR3_OFFSET3_CH | ADC_OFR3_OFFSET3); 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR4 */ 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN | ADC_OFR4_OFFSET4_CH | ADC_OFR4_OFFSET4); 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset registers JDR1, JDR2, JDR3, JDR4 */ 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register AWD2CR */ 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register AWD3CR */ 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register DIFSEL */ 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_DIFSEL); 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register CALFACT */ 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S); 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Reset common ADC registers ========== */ 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Software is allowed to change common parameters only when all the other 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADCs are disabled. */ 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset configuration of ADC common register CCR: 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - clock mode: CKMODE, PRESCEN 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - multimode related parameters (when this feature is available): MDMA, 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** DMACFG, DELAY, DUAL (set by HAL_ADCEx_MultiModeConfigChannel() API) 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - internal measurement paths: Vbat, temperature sensor, Vref (set into 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConfigChannel() or HAL_ADCEx_InjectedConfigChannel() ) 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_COMMON_CONTROL_REGISTER(hadc); 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */ 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripherals instances */ 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* sharing the same common ADC instance: ADC state is forced to */ 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* a similar state as after device power-on. */ 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: A possible implementation is to add RCC bus reset of ADC */ 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (for example, using macro */ 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* __HAL_RCC_ADC..._FORCE_RESET()/..._RELEASE_RESET()/..._CLK_DISABLE()) */ 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* in function "void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc)": */ 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->MspDeInitCallback == NULL) 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 17 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* DeInit the low level hardware */ 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback(hadc); 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* DeInit the low level hardware */ 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc); 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to none */ 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset injected channel configuration parameters */ 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectionConfig.ContextQueue = 0; 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectionConfig.ChannelCount = 0; 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET; 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Initialize the ADC MSP. 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc) 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 27 .loc 1 922 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 @ link register save eliminated. 32 .LVL0: 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file. 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 33 .loc 1 929 0 34 0000 7047 bx lr 35 .cfi_endproc 36 .LFE331: 38 0002 00BF .section .text.HAL_ADC_Init,"ax",%progbits 39 .align 1 40 .p2align 2,,3 41 .global HAL_ADC_Init 42 .syntax unified ARM GAS /tmp/ccsErhU4.s page 18 43 .thumb 44 .thumb_func 45 .fpu fpv4-sp-d16 47 HAL_ADC_Init: 48 .LFB329: 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 49 .loc 1 404 0 50 .cfi_startproc 51 @ args = 0, pretend = 0, frame = 8 52 @ frame_needed = 0, uses_anonymous_args = 0 53 .LVL1: 54 0000 70B5 push {r4, r5, r6, lr} 55 .LCFI0: 56 .cfi_def_cfa_offset 16 57 .cfi_offset 4, -16 58 .cfi_offset 5, -12 59 .cfi_offset 6, -8 60 .cfi_offset 14, -4 61 0002 82B0 sub sp, sp, #8 62 .LCFI1: 63 .cfi_def_cfa_offset 24 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 64 .loc 1 408 0 65 0004 0023 movs r3, #0 66 0006 0193 str r3, [sp, #4] 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 67 .loc 1 413 0 68 0008 0028 cmp r0, #0 69 000a 00F0A380 beq .L24 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 70 .loc 1 451 0 71 000e C56D ldr r5, [r0, #92] 72 0010 0446 mov r4, r0 73 0012 002D cmp r5, #0 74 0014 00F09380 beq .L40 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 75 .loc 1 485 0 76 0018 2268 ldr r2, [r4] 77 .LVL2: 78 .LBB346: 79 .LBB347: 80 .file 2 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h" 1:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @file stm32g4xx_ll_adc.h 4:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Header file of ADC LL module. 6:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 7:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @attention 8:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 9:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** *

© Copyright (c) 2019 STMicroelectronics. 10:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All rights reserved.

11:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This software component is licensed by ST under BSD 3-Clause license, 13:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the "License"; You may not use this file except in compliance with the 14:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * License. You may obtain a copy of the License at: 15:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * opensource.org/licenses/BSD-3-Clause ARM GAS /tmp/ccsErhU4.s page 19 16:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 17:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 18:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 19:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 20:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 21:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifndef STM32G4xx_LL_ADC_H 22:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define STM32G4xx_LL_ADC_H 23:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 24:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifdef __cplusplus 25:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** extern "C" { 26:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 27:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 28:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/ 29:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #include "stm32g4xx.h" 30:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 31:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @addtogroup STM32G4xx_LL_Driver 32:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 33:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 34:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 35:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined (ADC1) || defined (ADC2) || defined (ADC3) || defined (ADC4) || defined (ADC5) 36:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 37:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL ADC 38:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 39:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 40:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 41:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/ 42:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/ 43:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 44:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/ 45:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants 46:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 47:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 48:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 49:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular sequencer: */ 50:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */ 51:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer register offset */ 52:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 53:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 54:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group regular sequencer configuration */ 55:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 56:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR1_REGOFFSET (0x00000000UL) 57:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR2_REGOFFSET (0x00000100UL) 58:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR3_REGOFFSET (0x00000200UL) 59:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR4_REGOFFSET (0x00000300UL) 60:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 61:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET | ADC_SQR2_REGOFFSET \ 62:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR3_REGOFFSET | ADC_SQR4_REGOFFSET) 63:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQRX_REGOFFSET_POS (8UL) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_ 64:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 65:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 66:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular sequencer bits information to be inserted */ 67:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group regular sequencer ranks literals definition. */ 68:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_1_SQRX_BITOFFSET_POS (ADC_SQR1_SQ1_Pos) 69:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (ADC_SQR1_SQ2_Pos) 70:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (ADC_SQR1_SQ3_Pos) 71:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (ADC_SQR1_SQ4_Pos) 72:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_5_SQRX_BITOFFSET_POS (ADC_SQR2_SQ5_Pos) ARM GAS /tmp/ccsErhU4.s page 20 73:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_6_SQRX_BITOFFSET_POS (ADC_SQR2_SQ6_Pos) 74:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (ADC_SQR2_SQ7_Pos) 75:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (ADC_SQR2_SQ8_Pos) 76:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (ADC_SQR2_SQ9_Pos) 77:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_10_SQRX_BITOFFSET_POS (ADC_SQR3_SQ10_Pos) 78:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_11_SQRX_BITOFFSET_POS (ADC_SQR3_SQ11_Pos) 79:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (ADC_SQR3_SQ12_Pos) 80:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (ADC_SQR3_SQ13_Pos) 81:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (ADC_SQR3_SQ14_Pos) 82:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_15_SQRX_BITOFFSET_POS (ADC_SQR4_SQ15_Pos) 83:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS (ADC_SQR4_SQ16_Pos) 84:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 85:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 86:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 87:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected sequencer: */ 88:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */ 89:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - data register offset */ 90:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 91:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 92:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group injected data register */ 93:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 94:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR1_REGOFFSET (0x00000000UL) 95:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR2_REGOFFSET (0x00000100UL) 96:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR3_REGOFFSET (0x00000200UL) 97:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR4_REGOFFSET (0x00000300UL) 98:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 99:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET | ADC_JDR2_REGOFFSET \ 100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_JDR3_REGOFFSET | ADC_JDR4_REGOFFSET) 101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDRX_REGOFFSET_POS (8UL) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_ 103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected sequencer bits information to be inserted */ 105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group injected sequencer ranks literals definition. */ 106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ1_Pos) 107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ2_Pos) 108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ3_Pos) 109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ4_Pos) 110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular trigger: */ 114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */ 115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger source */ 116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger edge */ 117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge ( 118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ ARM GAS /tmp/ccsErhU4.s page 21 130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information. */ 136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS (ADC_CFGR_EXTSEL_Pos) 137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (ADC_CFGR_EXTEN_Pos) 138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected trigger: */ 142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */ 143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger source */ 144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger edge */ 145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge ( 146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U 151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected trigger bits information. */ 164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS (ADC_JSQR_JEXTSEL_Pos) 165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS (ADC_JSQR_JEXTEN_Pos) 166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC channel: */ 173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */ 174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by number */ 175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by bitfield */ 176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel differentiation between external channels (connected to */ 177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* GPIO pins) and internal channels (connected to internal paths) */ 178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel sampling time defined by SMPRx register offset */ 179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and SMPx bits positions into SMPRx register */ 180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH) 181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH) 182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (ADC_CFGR_AWD1CH_Pos) 183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA 184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_ID_INTERNAL_CH_MASK) 185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */ 186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMB ARM GAS /tmp/ccsErhU4.s page 22 187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Channel differentiation between external and internal channels */ 189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000UL) /* Marker of internal channel */ 190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_2 (0x00080000UL) /* Marker of internal channel for other A 191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH | ADC_CHANNEL_ID_INTERNAL_CH 192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC channel sampling time configuration */ 194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR1_REGOFFSET (0x00000000UL) 196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR2_REGOFFSET (0x02000000UL) 197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET | ADC_SMPR2_REGOFFSET) 198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPRX_REGOFFSET_POS (25UL) /* Position of bits ADC_SMPRx_REGOFFSET in ADC_CH 199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000UL) 201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_POS (20UL) /* Value equivalent to bitfield "ADC_CH 202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into */ 204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER (0x00000000UL) 206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER (ADC_CFGR_AWD1CH_0) 207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER (ADC_CFGR_AWD1CH_1) 208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER (ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER (ADC_CFGR_AWD1CH_2) 210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_0) 211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1) 212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER (ADC_CFGR_AWD1CH_3) 214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_0) 215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1) 216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2) 218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | \ 221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4) 223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_0) 224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_1) 225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into */ 227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0) 229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1) 230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2) 231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3) 232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4) 233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5) 234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6) 235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7) 236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8) 237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9) 238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10) 239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11) 240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12) 241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13) 242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14) 243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15) ARM GAS /tmp/ccsErhU4.s page 23 244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16) 245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17) 246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18) 247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels sampling time information to be inserted into */ 249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF 260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC mode single or differential ended: */ 272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */ 273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* the relevant bits for: */ 274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */ 275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration: calibration start, calibration factor get or set */ 276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC channels: set each ADC channel ending mode */ 277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF) 278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S) 279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFS 280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* B 281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000UL) /* Selection o 282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16UL) /* Selection o 283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4UL) /* Shift of bi 284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC analog watchdog: */ 286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */ 287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs, */ 288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 families)). */ 289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number, */ 290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection of ADC group (ADC groups regular and-or injected). */ 291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */ 292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection on groups. */ 293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */ 295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) 296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR2_REGOFFSET (0x00100000UL) 297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) 298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */ 300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */ ARM GAS /tmp/ccsErhU4.s page 24 301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0) 302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024UL) 303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD 305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | 307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH) 308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR23_CHANNEL_MASK) 309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_POS (20UL) /* Position of bits ADC_AWD_CRx_REGOFFSET in ADC_ 311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */ 313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET) 314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET) 315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET) 316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET | ADC_AWD_TR2_REGOFFSET | ADC_AWD 317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC_ 318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000UL) /* Selection of 1 bit t 319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_POS (16UL) /* Selection of 1 bit t 320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4UL) /* Shift of bit ADC_AWD 321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC offset: */ 323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC offset number configuration */ 324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR1_REGOFFSET (0x00000000UL) 325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR2_REGOFFSET (0x00000001UL) 326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR3_REGOFFSET (0x00000002UL) 327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR4_REGOFFSET (0x00000003UL) 328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET | ADC_OFR2_REGOFFSET \ 329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_OFR3_REGOFFSET | ADC_OFR4_REGOFFSET) 330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits positions */ 333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS (ADC_CFGR_RES_Pos) 334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos) 335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1EN_BITOFFSET_POS (ADC_CFGR_AWD1EN_Pos) 336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_JAWD1EN_BITOFFSET_POS (ADC_CFGR_JAWD1EN_Pos) 337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_TR1_HT1_BITOFFSET_POS (ADC_TR1_HT1_Pos) 338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits groups */ 341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JA 342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC internal channels related definitions */ 345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal voltage reference VrefInt */ 346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage referen 347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_VREF (3000UL) /* Analog voltage reference 348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Temperature sensor */ 349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sen 350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sen 351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sen 352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP (110L) /* Internal temperature sen 353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference 354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 25 358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/ 361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros 362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Driver macro reserved for internal use: set a pointer to 367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a register from a register basis from which an offset 368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is applied. 369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register basis from which the offset is applied. 370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers). 371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Pointer to register address 372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ 374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL)))) 375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/ 382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER) 383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure 384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC common parameters 389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and multimode 390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (all ADC instances belonging to the same ADC common instance). 391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_CommonInit() 392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC instances state (all ADC instances 393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sharing the same ADC common instance): 394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances sharing the same ADC common instance must be 395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * disabled. 396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and 400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_COMMON 401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, if ADC group injected is u 402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** clock ratio constraints between ADC clock and AH 403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** must be respected. Refer to reference manual. 404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independ 409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfe 414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ ARM GAS /tmp/ccsErhU4.s page 26 415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases. 419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef; 425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC instance. 428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC instance. 429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Affects both group regular and group injected (availability 430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of ADC group injected depends on STM32 families). 431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Instance . 433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_Init() 434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Resolution; /*!< Set ADC resolution. 449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_RESOLU 450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DataAlignment; /*!< Set ADC conversion data alignment. 454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_DATA_A 455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t LowPowerMode; /*!< Set ADC low power mode. 459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LP_MOD 460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_InitTypeDef; 464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group regular. 467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group regular. 468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "REG"). 471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_REG_Init() ARM GAS /tmp/ccsErhU4.s page 27 472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: inter 487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_TR 488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group regular sequencer length. 495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: se 500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group regul 502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regula 507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_CO 508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: It is not possible to enable both ADC group regu 509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no tra 513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_DM 514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun: 518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data preserved or overwritten. 519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_OV 520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef; 524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group injected. 527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group injected. 528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into ARM GAS /tmp/ccsErhU4.s page 28 529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "INJ"). 531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_INJ_Init() 532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: inte 547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group injected sequencer length. 555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: s 560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group injec 562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent 567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: This parameter must be set to set to independent 569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_INJ_InitTypeDef; 573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */ 578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/ 580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants 581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags 585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Flags defines which can be used with LL_ADC_ReadReg function ARM GAS /tmp/ccsErhU4.s page 29 586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /*!< ADC flag ADC instance ready */ 589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC flag ADC group regular end o 590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC flag ADC group regular end o 591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC flag ADC group regular overr 592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC flag ADC group regular end o 593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC flag ADC group injected end 594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC flag ADC group injected end 595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC flag ADC group injected cont 596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC flag ADC analog watchdog 1 * 597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC flag ADC analog watchdog 2 * 598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC flag ADC analog watchdog 3 * 599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /*!< ADC flag ADC multimode master in 601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /*!< ADC flag ADC multimode slave ins 602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /*!< ADC flag ADC multimode master gr 603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /*!< ADC flag ADC multimode slave gro 604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /*!< ADC flag ADC multimode master gr 605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /*!< ADC flag ADC multimode slave gro 606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /*!< ADC flag ADC multimode master gr 607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /*!< ADC flag ADC multimode slave gro 608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /*!< ADC flag ADC multimode master gr 609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /*!< ADC flag ADC multimode slave gro 610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /*!< ADC flag ADC multimode master gr 611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /*!< ADC flag ADC multimode slave gro 612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /*!< ADC flag ADC multimode master gr 613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /*!< ADC flag ADC multimode slave gro 614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /*!< ADC flag ADC multimode master gr 615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /*!< ADC flag ADC multimode slave gro 616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /*!< ADC flag ADC multimode master an 617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /*!< ADC flag ADC multimode slave ana 618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /*!< ADC flag ADC multimode master an 619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /*!< ADC flag ADC multimode slave ana 620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /*!< ADC flag ADC multimode master an 621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /*!< ADC flag ADC multimode slave ana 622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable) 628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions 629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /*!< ADC interruption ADC instance re 632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOC ADC_IER_EOCIE /*!< ADC interruption ADC group regul 633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOS ADC_IER_EOSIE /*!< ADC interruption ADC group regul 634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_OVR ADC_IER_OVRIE /*!< ADC interruption ADC group regul 635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC interruption ADC group regul 636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOC ADC_IER_JEOCIE /*!< ADC interruption ADC group injec 637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOS ADC_IER_JEOSIE /*!< ADC interruption ADC group injec 638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /*!< ADC interruption ADC group injec 639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /*!< ADC interruption ADC analog watc 640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /*!< ADC interruption ADC analog watc 641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /*!< ADC interruption ADC analog watc 642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 30 643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose 647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with */ 650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* DMA transfer. */ 651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */ 652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000UL) /* ADC group regular conversion data re 653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001UL) /* ADC group regular conversion data re 655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source 661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /* 664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /* 665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0) /* 666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000UL) /* 667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /* 668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /* 669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /* 671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /* 672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 ) /* 673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /* 675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /* 676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /* 677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels 683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available */ 686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (connections to other peripherals). */ 687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If they are not listed below, they do not require any specific */ 688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* path enable. In this case, Access to measurement path is done */ 689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* only by selecting the corresponding ADC internal channel. */ 690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all di 691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to inte 692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_VSENSESEL) /*!< ADC measurement path to inte 693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATSEL) /*!< ADC measurement path to inte 694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution 699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ ARM GAS /tmp/ccsErhU4.s page 31 700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B (0x00000000UL) /*!< ADC resolution 702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /*!< ADC resolution 703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /*!< ADC resolution 704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!< ADC resolution 705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment 710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT (0x00000000UL) /*!< ADC conversion data alignmen 713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /*!< ADC conversion data alignmen 714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode 719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE (0x00000000UL) /*!< No ADC low powe 722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /*!< ADC low power m 723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number 728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /*!< ADC offset number 1: ADC channel 731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /*!< ADC offset number 2: ADC channel 732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /*!< ADC offset number 3: ADC channel 733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /*!< ADC offset number 4: ADC channel 734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state 739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_DISABLE (0x00000000UL) /*!< ADC offset disabled (among A 742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /*!< ADC offset enabled (among AD 743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGN ADC instance - Offset sign 748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_NEGATIVE (0x00000000UL) /*!< ADC offset is negative (among 751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_POSITIVE (ADC_OFR1_OFFSETPOS) /*!< ADC offset is positive (among 752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SATURATION ADC instance - Offset saturation mode ARM GAS /tmp/ccsErhU4.s page 32 757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset saturation is di 760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_ENABLE (ADC_OFR1_SATEN) /*!< ADC offset saturation is en 761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups 765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on all 768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_INJECTED (0x00000002UL) /*!< ADC group injected (not available on 769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003UL) /*!< ADC both groups regular and injected 770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number 775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER | ADC_CHANNEL_0_SMP | ADC_CHANNE 778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER | ADC_CHANNEL_1_SMP | ADC_CHANNE 779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER | ADC_CHANNEL_2_SMP | ADC_CHANNE 780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER | ADC_CHANNEL_3_SMP | ADC_CHANNE 781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER | ADC_CHANNEL_4_SMP | ADC_CHANNE 782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER | ADC_CHANNEL_5_SMP | ADC_CHANNE 783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER | ADC_CHANNEL_6_SMP | ADC_CHANNE 784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER | ADC_CHANNEL_7_SMP | ADC_CHANNE 785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER | ADC_CHANNEL_8_SMP | ADC_CHANNE 786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER | ADC_CHANNEL_9_SMP | ADC_CHANNE 787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_SMP | ADC_CHANNE 788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_SMP | ADC_CHANNE 789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_SMP | ADC_CHANNE 790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_SMP | ADC_CHANNE 791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_SMP | ADC_CHANNE 792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_SMP | ADC_CHANNE 793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_SMP | ADC_CHANNE 794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_SMP | ADC_CHANNE 795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_SMP | ADC_CHANNE 796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (LL_ADC_CHANNEL_4 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP1 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP2 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC2 (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC3 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP4 (LL_ADC_CHANNEL_5 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP5 (LL_ADC_CHANNEL_3 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP6 (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source 812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 33 814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE (0x00000000UL) 815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger internal: SW start. 816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH1 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH1 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM7_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_CH1 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO (ADC_CFGR_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al ARM GAS /tmp/ccsErhU4.s page 34 871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EX 899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge 926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 35 928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /*!< ADC group r 929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /*!< ADC group r 930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 | ADC_CFGR_EXTEN_0) /*!< ADC group r 931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SAMPLING_MODE ADC group regular - Sampling mode 936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_NORMAL (0x00000000UL) /*!< ADC conversions sam 939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_BULB (ADC_CFGR2_BULB) /*!< ADC conversions sam 940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: First convers 941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED (ADC_CFGR2_SMPTRIG) /*!< ADC conversions sam 942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger rising edg 943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger falling ed 944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode 949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE (0x00000000UL) /*!< ADC conversions are perform 952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /*!< ADC conversions are perform 953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data 958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000UL) /*!< ADC conversio 961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMAEN) /*!< ADC conversio 962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG | ADC_CFGR_DMAEN) /*!< ADC conversio 963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_SAMPLINGTIME_COMMON_CONFIG ADC instance - ADC sampling time common configur 969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_DEFAULT (0x00000000UL) /*!< ADC sampling time let to d 972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 (ADC_SMPR1_SMPPLUS) /*!< ADC additional sampling ti 973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d 979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000UL) /*!< ADC group regular behavior i 982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /*!< ADC group regular behavior i 983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} ARM GAS /tmp/ccsErhU4.s page 36 985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length 988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000UL) 991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L 992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L 994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L 996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L 1000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 1001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L 1002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 1003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L 1004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 1005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 1006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode 1011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) 1014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK ( 1015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISC 1016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 1017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 1019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISC 1020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 1021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks 1027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_1_SQRX_BITOFFSET_POS) 1030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_2_SQRX_BITOFFSET_POS) 1031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_3_SQRX_BITOFFSET_POS) 1032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_4_SQRX_BITOFFSET_POS) 1033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_5_SQRX_BITOFFSET_POS) 1034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_6_SQRX_BITOFFSET_POS) 1035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_7_SQRX_BITOFFSET_POS) 1036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_8_SQRX_BITOFFSET_POS) 1037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_9_SQRX_BITOFFSET_POS) 1038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_10_SQRX_BITOFFSET_POS 1039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_11_SQRX_BITOFFSET_POS 1040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_12_SQRX_BITOFFSET_POS 1041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_13_SQRX_BITOFFSET_POS ARM GAS /tmp/ccsErhU4.s page 37 1042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_14_SQRX_BITOFFSET_POS 1043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_15_SQRX_BITOFFSET_POS 1044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_16_SQRX_BITOFFSET_POS 1045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source 1050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000UL) 1053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger internal: SW start 1054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM7_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT ARM GAS /tmp/ccsErhU4.s page 38 1099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC3/4/5 instances. On this ST 1114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC1/2 instances. On this STM3 1117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_ 1139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 39 1156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge 1160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /*!< ADC group i 1163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /*!< ADC group i 1164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 | ADC_JSQR_JEXTEN_0) /*!< ADC group i 1165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode 1170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000UL) /*!< ADC group injected conversio 1173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /*!< ADC group injected conversio 1174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode 1179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000UL) /* Group injected sequence co 1182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence co 1183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence co 1184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length 1189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group injected 1192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /*!< ADC group injected 1193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /*!< ADC group injected 1194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected 1195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode 1200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group injected sequencer 1203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /*!< ADC group injected sequencer 1204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks 1209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET | ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) 1212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET | ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) ARM GAS /tmp/ccsErhU4.s page 40 1213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET | ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) 1214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET | ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) 1215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time 1220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000UL) 1223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_6CYCLES_5 ( ADC_SMPR2_SMP10 1224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_12CYCLES_5 ( ADC_SMPR2_SMP10_1 1225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_24CYCLES_5 ( ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2 1227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10 1228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 1229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending 1235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /*!< A 1238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF | ADC_CALFACT_CALFACT_D) /*!< A 1239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED | LL_ADC_DIFFERENTIAL_ENDED) /*!< A 1240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number 1245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!< 1248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR2_REGOFFSET) /*!< 1249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!< 1250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels 1255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE (0x00000000UL) 1258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK 1259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) 1262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) 1265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) 1268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA ARM GAS /tmp/ccsErhU4.s page 41 1270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) 1271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) 1274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) 1277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) 1280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) 1283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) 1286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) 1289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) 1292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) 1295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) 1298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) 1301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) 1304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) 1307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) 1310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) 1313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) 1316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) 1319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M ARM GAS /tmp/ccsErhU4.s page 42 1327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) 1328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) 1331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) 1334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) 1337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) 1340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | 1341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | 1342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) 1343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) 1346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) 1349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds 1356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1 ) /*!< ADC analog watchdog thr 1359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR1_LT1) /*!< ADC analog watchdog thr 1360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 | ADC_TR1_LT1) /*!< ADC analog watchdog bot 1361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_FILTERING_CONFIG Analog watchdog - filtering config 1366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_NONE (0x00000000UL) 1369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_2SAMPLES ( ADC_TR1_AWDFILT 1370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_3SAMPLES ( ADC_TR1_AWDFILT_1 1371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_4SAMPLES ( ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_5SAMPLES (ADC_TR1_AWDFILT_2 1373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_6SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT 1374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_7SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 1375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_8SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope 1381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE (0x00000000UL) /* ARM GAS /tmp/ccsErhU4.s page 43 1384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /* 1385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM | ADC_CFGR2_ROVSE) /* 1386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /* 1387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE) /* 1388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode 1393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT (0x00000000UL) /*!< ADC oversampling discontinuo 1396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /*!< ADC oversampling discontinuo 1397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio 1402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2 (0x00000000UL) 1405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) 1406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) 1407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) 1409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_0) 1410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 ) 1411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift 1417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE (0x00000000UL) 1420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1 ( 1421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 1422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 1423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 1424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 1425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 1428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 1433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode 1434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_INDEPENDENT (0x00000000UL) 1437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 1438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 | ADC_ 1439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 | ADC_ 1440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 | ADC_ ARM GAS /tmp/ccsErhU4.s page 44 1441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_ 1442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1 1443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 | ADC_ 1444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer 1449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000UL) /*! 1452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B ( ADC_CCR_MDMA_1 ) /*! 1453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ( ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! 1454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 ) /*! 1455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! 1456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases 1461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE (0x00000000UL) 1464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES ( A 1465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ( ADC_CCR_DELAY_1 1466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES ( ADC_CCR_DELAY_1 | A 1467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES ( ADC_CCR_DELAY_2 1468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES ( ADC_CCR_DELAY_2 | A 1469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 1470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | A 1471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 1472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 | A 1473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 1474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | A 1475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave 1480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /*!< In multimod 1483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /*!< In multimod 1484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV | ADC_CDR_RDATA_MST) /*!< In multimod 1485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 1490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays 1493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Only ADC peripheral HW delays are defined in ADC LL driver driver, 1494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not timeout values. 1495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For details on delays values, refer to descriptions in source code 1496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * above each literal definition. 1497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ ARM GAS /tmp/ccsErhU4.s page 45 1498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */ 1501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* not timeout values. */ 1502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Timeout values for ADC operations are dependent to device clock */ 1503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration (system clock versus ADC clock), */ 1504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and therefore must be defined in user application. */ 1505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Indications for estimation of ADC timeout delays, for this */ 1506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* STM32 series: */ 1507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration time: maximum delay is 112/fADC. */ 1508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tCAL") */ 1509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC enable time: maximum delay is 1 conversion cycle. */ 1510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tSTAB") */ 1511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC disable time: maximum delay should be a few ADC clock cycles */ 1512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC stop conversion time: maximum delay should be a few ADC clock */ 1513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* cycles */ 1514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC conversion time: duration depending on ADC clock and ADC */ 1515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration. */ 1516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device reference manual, section "Timing") */ 1517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time) */ 1519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 1520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tADCVREG_STUP"). */ 1521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 20UL) /*!< Delay for ADC stabilization time (ADC vol 1523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time. */ 1525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 1526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tstart_vrefint"). */ 1527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US ( 12UL) /*!< Delay for internal voltage reference s 1529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for temperature sensor stabilization time. */ 1531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet, */ 1532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tSTART"). */ 1533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US (120UL) /*!< Delay for temperature sensor stabiliza 1535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable. */ 1537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: On this STM32 series, a minimum number of ADC clock cycles */ 1538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* are required between ADC end of calibration and ADC enable. */ 1539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Wait time can be computed in user application by waiting for the */ 1540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* equivalent number of CPU cycles, by taking into account */ 1541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ratio of CPU clock versus ADC clock prescalers. */ 1542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: ADC clock cycles. */ 1543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4UL) /*!< Delay required between ADC end of cali 1544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/ ARM GAS /tmp/ccsErhU4.s page 46 1555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros 1556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros 1560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Write a value in ADC register 1565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be written 1567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VALUE__ Value to be written in the register 1568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 1569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 1571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Read a value in ADC register 1574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be read 1576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Register value 1577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 1579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro 1584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel number in decimal format 1589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from literals LL_ADC_CHANNEL_x. 1590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4) 1592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return decimal number "4". 1593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The input can be a value from functions where a channel 1594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number is returned, either defined with number 1595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or with bitfield (only one bit must be set). 1596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 ARM GAS /tmp/ccsErhU4.s page 47 1612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0 and Max_Data=18 1639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ 1641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0UL) ? \ 1642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \ 1644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 1646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (uint32_t)POSITION_VAL((__CHANNEL__)) \ 1648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x 1653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from number in decimal format. 1654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_DECIMAL_NB_TO_CHANNEL(4) 1656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return a data equivalent to "LL_ADC_CHANNEL_4". 1657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18 1658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 1659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 ARM GAS /tmp/ccsErhU4.s page 48 1669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 1701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 1702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 1703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) 1705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DECIMAL_NB__) <= 9UL) ? 1706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) | 1708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | 1709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR1_REGOFFSET | (((3UL * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) 1710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 1712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 1714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) 1715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR2_REGOFFSET | (((3UL * ((__DECIMAL_NB__) - 10UL))) << ADC_CHANNEL_SMPx_BITOFFSET_PO 1716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the selected channel 1721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to literal definitions of driver. 1722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The different literal definitions of ADC channels are: 1723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC internal channel: 1724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ... 1725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC external channel (channel connected to a GPIO pin): ARM GAS /tmp/ccsErhU4.s page 49 1726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ... 1727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from literal 1728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...), 1731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value from functions where a channel number is 1732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe 1779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the channel corresponds to a parameter definition of a ADC internal channe 1780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ 1782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0UL) ARM GAS /tmp/ccsErhU4.s page 50 1783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert a channel defined from parameter 1786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to its equivalent parameter definition of a ADC external channel 1789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...). 1790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter can be, additionally to a value 1791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined from parameter definition of a ADC internal channel 1792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...), 1793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a value defined from parameter definition of 1794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is returned 1796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC registers. 1797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: ARM GAS /tmp/ccsErhU4.s page 51 1840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 1842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 1843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 1844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 1845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 1846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \ 1861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK) 1862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the internal channel 1865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * selected is available on the ADC instance selected. 1866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from parameter 1867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value defined from parameter definition of 1870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is 1872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_INSTANCE__ ADC instance 1877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n ARM GAS /tmp/ccsErhU4.s page 52 1897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte 1899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the internal channel selected is available on the ADC instance selected. 1900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) 1902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC4) \ 1928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 1930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC5) \ 1935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP5) || \ 1937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC5) || \ 1938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP4) || \ 1939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G471xx) 1945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ ARM GAS /tmp/ccsErhU4.s page 53 1954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) 1971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G491xx) || defined(STM32G4A1xx) 1989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 2010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ ARM GAS /tmp/ccsErhU4.s page 54 2011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define ADC analog watchdog parameter: 2018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * define a single channel to monitor with analog watchdog 2019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from sequencer channel and groups definition. 2020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels(). 2021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDMonitChannels( 2023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, LL_ADC_AWD1, 2024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR)) 2025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, ARM GAS /tmp/ccsErhU4.s page 55 2068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 2069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 2070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __GROUP__ This parameter can be one of the following values: 2071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR 2072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_INJECTED 2073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR_INJECTED 2074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 2076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 2077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 2078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 2079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 2080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 2081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 2082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 2083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 2084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 2085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 2086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 2087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 2088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 2089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 2090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 2091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 2092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 2093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 2094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 2095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 2096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 2097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 2098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 2099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 2100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 2101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 2102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 2103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 2104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 2105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 2106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 2107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 2108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 2109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 2110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 2111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 2112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 2113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 2114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 2115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 2116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 2117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 2118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 2119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 2120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 2121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 2122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 2123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 2124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) ARM GAS /tmp/ccsErhU4.s page 56 2125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 2126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 2127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 2128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 2129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 2130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 2131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 2132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 2133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 2134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 2135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 2136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 2137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 2138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 2139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 2140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 2141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 2142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 2143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 2144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 2145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 2146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 2147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 2148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 2149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 2150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 2151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 2152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 2153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 2154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 2155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 2156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 2157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 2158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 2159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 2160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 2161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 2162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 2163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 2164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 2165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 2166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 2167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 2168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 2169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 2171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) 2181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__GROUP__) == LL_ADC_GROUP_REGULAR) ARM GAS /tmp/ccsErhU4.s page 57 2182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__GROUP__) == LL_ADC_GROUP_INJECTED) 2185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) 2186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the value of ADC analog watchdog threshold high 2192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds() 2195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or @ref LL_ADC_SetAnalogWDThresholds(). 2196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to set the value of 2197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDThresholds 2199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (< ADCx param >, 2200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, > (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the value of ADC analog watchdog threshold high 2215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 2218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to get the value of 2219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION 2221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_RESOLUTION_8B, 2222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_GetAnalogWDThresholds(, LL_ADC_AWD_THRESHOLD_HIGH) 2223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ); 2224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF 2230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \ 2233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC analog watchdog threshold high 2237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low from raw value containing both thresholds concatenated. 2238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). ARM GAS /tmp/ccsErhU4.s page 58 2239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to get analog watchdog threshold high from the register raw value: 2240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, > (((__AWD_THRESHOLD_TYPE__) & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_ 2249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the ADC calibration value with both single ended 2252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential modes calibration factors concatenated. 2253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetCalibrationFactor(). 2254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to set calibration factors single ended to 0x55 2255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential ended to 0x2A: 2256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetCalibrationFactor( 2257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, 2258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A)) 2259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F 2260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F 2261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 2262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIA 2264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) | (__CALIB_FACTOR_SINGLE_ENDED__) 2265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC multimode conversion data of ADC master 2269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or ADC slave from raw value with both ADC conversion data concatenated. 2270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used when multimode transfer by DMA 2271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer(). 2272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In this case the transferred data need to processed with this macro 2273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to separate the conversion data of ADC master and ADC slave. 2274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values: 2275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 2276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 2277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF 2278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) 2281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_MULTI_CONV_DATA__) >> ((ADC_CDR_RDATA_SLV_Pos) & ~(__ADC_MULTI_MASTER_SLAVE__))) & ADC_C 2282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select, from a ADC instance, to which ADC instance 2287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * it has a dependence in multimode (ADC master of the corresponding 2288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance). 2289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of device with multimode available and a mix of 2290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances compliant and not compliant with multimode feature, 2291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances not compliant with multimode feature are 2292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * considered as master instances (do not depend to 2293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * any other ADC instance). 2294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval __ADCx__ ADC instance master of the corresponding ADC common instance ARM GAS /tmp/ccsErhU4.s page 59 2296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC5) 2298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC4) \ 2304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC3) \ 2306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC5 */ 2319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select the ADC common instance 2323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to which is belonging the selected ADC instance. 2324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC common register instance can be used for: 2325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Set parameters common to several ADC instances 2326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Multimode (for devices with several ADC instances) 2327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC common register instance 2330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) \ 2333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADCx__) == ADC1) || ((__ADCx__) == ADC2)) \ 2334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC12_COMMON) \ 2336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC345_COMMON) \ 2340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) (ADC12_COMMON) 2344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC345_COMMON */ 2345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to check if all ADC instances sharing the same 2347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance are disabled. 2348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This check is required by functions with setting conditioned to 2349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On devices with only 1 ADC common instance, parameter of this macro ARM GAS /tmp/ccsErhU4.s page 60 2353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is useless and can be ignored (parameter kept for compatibility 2354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with devices featuring several ADC common instances). 2355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCXY_COMMON__ ADC common instance 2356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if all ADC instances sharing the same ADC common instance 2358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are disabled. 2359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if at least one ADC instance sharing the same ADC common instance 2360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 2361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC4) && defined(ADC5) 2364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 2368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3) | \ 2373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC4) | \ 2374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC5) ) \ 2375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 2382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3)) \ 2386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC4 && ADC5 */ 2388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | LL_ADC_IsEnabled(ADC2)) 2391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital 2395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * value corresponding to the selected ADC resolution. 2396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range 2397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref- 2398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to reference manual). 2399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion dat 2405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (0xFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) 2408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 61 2410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from 2411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a resolution to another resolution. 2412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted 2413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted 2414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion 2420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution 2426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\ 2428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\ 2429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \ 2430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DATA__) \ 2431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) \ 2432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)) \ 2433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt) 2437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value). 2438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (resolution 12 bits) 2443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value). 2444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt) 2450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\ 2452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_DATA__,\ 2453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \ 2455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate analog reference voltage (Vref+) 2460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: mVolt) from ADC conversion data of internal voltage 2461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * reference VrefInt. 2462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using VrefInt calibration value 2463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This voltage depends on user board environment: voltage level 2465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * connected to pin Vref+. 2466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On devices with small package, the pin Vref+ is not present ARM GAS /tmp/ccsErhU4.s page 62 2467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and internally bonded to pin Vdda. 2468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of internal voltage reference 2469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * VrefInt corresponds to a resolution of 12 bits, 2470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal voltage reference VrefInt. 2472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 2474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits) 2475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of internal voltage reference VrefInt (unit: digital value). 2476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Analog reference voltage (unit: mV) 2482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\ 2484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \ 2486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \ 2487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 2489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor calibration values 2495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = ((TS_ADC_DATA - TS_CAL1) 2498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * * (TS_CAL2_TEMP - TS_CAL1_TEMP)) 2499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP 2500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = (TS_CAL2 - TS_CAL1) 2502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2_TEMP - TS_CAL1_TEMP) 2503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL1 = equivalent TS_ADC_DATA at temperature 2504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL1 (calibrated in factory) 2505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL2 = equivalent TS_ADC_DATA at temperature 2506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL2 (calibrated in factory) 2507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve that calibration 2508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters are correct (address and data). 2509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To calculate temperature using temperature sensor 2510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values (generic values less, therefore 2511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * less accurate than calibrated values), 2512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). 2513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of temperature sensor 2519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to a resolution of 12 bits, 2520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor. 2522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. ARM GAS /tmp/ccsErhU4.s page 63 2524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal 2526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor (unit: digital value). 2527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature 2528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sensor voltage has been measured. 2529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\ 2537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \ 2540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 2542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (__VREFANALOG_VOLTAGE__)) \ 2543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / TEMPSENSOR_CAL_VREFANALOG) \ 2544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - (int32_t) *TEMPSENSOR_CAL1_ADDR) \ 2545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \ 2546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \ 2547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + TEMPSENSOR_CAL1_TEMP \ 2548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor typical values 2554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to device datasheet). 2555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV) 2557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / Avg_Slope + CALx_TEMP 2558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value) 2560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = temperature sensor slope 2561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: uV/Degree Celsius) 2562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_TYP_CALx_VOLT = temperature sensor digital value at 2563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature CALx_TEMP (unit: mV) 2564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve the temperature sensor 2565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of the current device has characteristics in line with 2566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values. 2567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If temperature sensor calibration values are available on 2568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()), 2569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature calculation will be more accurate using 2570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CALC_TEMPERATURE(). 2571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC measurement data must correspond to a resolution of 12 bits 2577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (full scale digital value 4095). If not the case, the data must be 2578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * preliminarily rescaled to an equivalent resolution of 12 bits. 2579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical v 2580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "Avg_Slop ARM GAS /tmp/ccsErhU4.s page 64 2581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical 2582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "V30" (co 2583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature s 2584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV) 2585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: 2586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor volta 2587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\ 2595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_TYP_CALX_V__,\ 2596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_CALX_TEMP__,\ 2597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __VREFANALOG_VOLTAGE__,\ 2598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((((int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \ 2601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \ 2602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 2603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - \ 2604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \ 2605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 2606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)(__TEMPSENSOR_TYP_AVGSLOPE__) \ 2608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + (int32_t)(__TEMPSENSOR_CALX_TEMP__) \ 2609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/ 2621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions 2622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management 2626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: LL ADC functions to set DMA transfer are located into sections of */ 2629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration of ADC instance, groups and multimode (if available): */ 2630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* @ref LL_ADC_REG_SetDMATransfer(), ... */ 2631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Function to help to configure DMA transfer from ADC: retrieve the 2634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC register address from ADC instance and a list of ADC registers 2635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * intended to be used (most commonly) with DMA transfer. 2636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These ADC registers are data registers: 2637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when ADC conversion data is available in ADC data registers, ARM GAS /tmp/ccsErhU4.s page 65 2638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC generates a DMA transfer request. 2639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used with LL DMA driver, refer to 2640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_DMA_ConfigAddresses()". 2641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_ConfigAddresses(DMA1, 2643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_CHANNEL_1, 2644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA), 2645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (uint32_t)&< array or variable >, 2646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_DIRECTION_PERIPH_TO_MEMORY); 2647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC: in multimode, some devices 2648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use a different data register outside of ADC instance scope 2649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (common data register). This macro manages this register difference, 2650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * only ADC instance has to be set as parameter. 2651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n 2652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n 2653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_DMA_GetRegAddr 2654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Register This parameter can be one of the following values: 2656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA 2657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1) 2658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Available on devices with several ADC instances. 2660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC register address 2661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t data_reg_addr; 2666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (Register == LL_ADC_DMA_REG_REGULAR_DATA) 2668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &(ADCx->DR); 2671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */ 2673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register CDR */ 2675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR); 2676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return data_reg_addr; 2679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 2684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(Register); 2685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) &(ADCx->DR); 2688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccsErhU4.s page 66 2695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to 2696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: Clock source and prescaler. 2701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, if ADC group injected is used, some 2702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * clock ratio constraints between ADC clock and AHB clock 2703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must be respected. 2704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 2705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 2709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 2710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 2711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n 2712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_SetCommonClock 2713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CommonClock This parameter can be one of the following values: 2716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 2717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 2723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) 2734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); 2736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: Clock source and prescaler. 2740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n 2741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_GetCommonClock 2742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 2746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 ARM GAS /tmp/ccsErhU4.s page 67 2752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON) 2762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC)); 2764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Configure all paths (overwrite current configuration). 2770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The values not selected are removed from configuration. 2774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n 2786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalCh\n 2787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalCh 2788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSEL, PathInternal) 2800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Add paths to the current configuration. 2806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) ARM GAS /tmp/ccsErhU4.s page 68 2809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n 2821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChAdd\n 2822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChAdd 2823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCxy_COMMON->CCR, PathInternal); 2835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Remove paths to the current configuration. 2841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n 2845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChRem\n 2846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChRem 2847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal); 2859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: measurement path to internal 2863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...). 2864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | ARM GAS /tmp/ccsErhU4.s page 69 2866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n 2868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_GetCommonPathInternalCh\n 2869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_GetCommonPathInternalCh 2870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be a combination of the following values: 2873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSE 2881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins 2888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC calibration factor in the mode single-ended 2893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is intended to set calibration parameters 2895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without having to perform a new calibration using 2896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_StartCalibration(). 2897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration factor must be specified for each of these 2901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 2902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 2903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of setting calibration factors of both modes single ended 2904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED): 2905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * both calibration factors must be concatenated. 2906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To perform this processing, use helper macro 2907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(). 2908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion 2911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on group regular. 2912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n 2913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_SetCalibrationFactor 2914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED 2919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F 2920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t C ARM GAS /tmp/ccsErhU4.s page 70 2923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT, 2925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK, 2926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLED 2927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration factor in the mode single-ended 2931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing 2933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration(). 2934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n 2938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_GetCalibrationFactor 2939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x7F 2944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff) 2946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve bits with position in register depending on parameter */ 2948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "SingleDiff". */ 2949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT, 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 2953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 2954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC resolution. 2958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 2963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 2964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_SetResolution 2965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Resolution This parameter can be one of the following values: 2967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution) 2974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution); 2976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC resolution. ARM GAS /tmp/ccsErhU4.s page 71 2980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_GetResolution 2983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx) 2991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)); 2993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC conversion data alignment. 2997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 2998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment 3004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DataAlignment This parameter can be one of the following values: 3006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment) 3011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment); 3013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC conversion data alignment. 3017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 3018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment 3020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx) 3026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN)); 3028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC low power mode. 3032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous ARM GAS /tmp/ccsErhU4.s page 72 3037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on 3059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): 3060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode 3075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param LowPowerMode This parameter can be one of the following values: 3077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 3079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode) 3082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode); 3084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC low power mode: 3088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) ARM GAS /tmp/ccsErhU4.s page 73 3094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on 3115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): 3116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode 3127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 3131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx) 3133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY)); 3135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC selected offset number 1, 2, 3 or 4. 3139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of offset configuration: 3140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC channel to which the offset programmed will be applied 3141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Offset level (offset to be subtracted from the raw 3144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the offset, by default. It can be forced 3149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to disable state using function LL_ADC_SetOffsetState(). 3150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If a channel is mapped on several offsets numbers, only the offset ARM GAS /tmp/ccsErhU4.s page 74 3151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with the lowest value is considered for the subtraction. 3152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n 3159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1 LL_ADC_SetOffset\n 3160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1_EN LL_ADC_SetOffset\n 3161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_SetOffset\n 3162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_SetOffset\n 3163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffset\n 3164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_SetOffset\n 3165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_SetOffset\n 3166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffset\n 3167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_SetOffset\n 3168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_SetOffset\n 3169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffset 3170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 3177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 3183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 3193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 3205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ARM GAS /tmp/ccsErhU4.s page 75 3208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF 3219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); 3228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channel to which the offset programmed will be applied 3233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 3236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 3237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 3238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 3239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 3240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 3242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 3243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 3244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 3245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n 3249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n 3250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n 3251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel 3252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) ARM GAS /tmp/ccsErhU4.s page 76 3265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 3275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 3287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 3301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 3302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(ADC_TypeDef *ADCx, uint32_t Offsety) 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH); 3309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Offset level (offset to be subtracted from the raw 3314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n 3319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n 3320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n 3321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_GetOffsetLevel ARM GAS /tmp/ccsErhU4.s page 77 3322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 3329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(ADC_TypeDef *ADCx, uint32_t Offsety) 3331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1); 3335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * force offset state disable or enable 3340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without modifying offset channel or offset value. 3341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function should be needed only in case of offset to be 3342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled-disabled dynamically, and should not be needed in other cases: 3343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function LL_ADC_SetOffset() automatically enables the offset. 3344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n 3349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n 3350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n 3351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffsetState 3352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetState This parameter can be one of the following values: 3359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetStat 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetState); 3370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset state disabled or enabled. 3375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n 3376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n 3377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n 3378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_GetOffsetState ARM GAS /tmp/ccsErhU4.s page 78 3379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety) 3390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN); 3394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset sign. 3399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_SetOffsetSign\n 3404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_SetOffsetSign\n 3405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_SetOffsetSign\n 3406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_SetOffsetSign 3407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSign This parameter can be one of the following values: 3414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSign) 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSign); 3425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset sign if positive or negative. 3430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_GetOffsetSign\n 3431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_GetOffsetSign\n 3432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_GetOffsetSign\n 3433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_GetOffsetSign 3434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: ARM GAS /tmp/ccsErhU4.s page 79 3436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety) 3445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSETPOS); 3449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset saturation mode. 3454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_SetOffsetSaturation\n 3459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_SetOffsetSaturation\n 3460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_SetOffsetSaturation\n 3461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_SetOffsetSaturation 3462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSaturation This parameter can be one of the following values: 3469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Offse 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSaturation); 3480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset saturation if enabled or disabled. 3485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_GetOffsetSaturation\n 3486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_GetOffsetSaturation\n 3487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_GetOffsetSaturation\n 3488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_GetOffsetSaturation 3489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 ARM GAS /tmp/ccsErhU4.s page 80 3493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety) 3500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SATEN); 3504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC gain compensation. 3508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the gain compensation coefficient 3509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * that is applied to raw converted data using the formula: 3510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DATA = DATA(raw) * (gain compensation coef) / 4096 3511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the gain compensation if given 3512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coefficient is above 0, otherwise it disables it. 3513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Gain compensation when enabled is applied to all channels. 3514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_SetGainCompensation\n 3519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_SetGainCompensation 3520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param GainCompensation This parameter can be: 3522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation will be disabled and value set to 0 3523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation will be enabled with specified value 3524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetGainCompensation(ADC_TypeDef *ADCx, uint32_t GainCompensation) 3527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->GCOMP, ADC_GCOMP_GCOMPCOEFF, GainCompensation); 3529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_GCOMP, ((GainCompensation == 0UL) ? 0UL : 1UL) << ADC_CFGR2_GCO 3530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC gain compensation value 3534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_GetGainCompensation\n 3535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_GetGainCompensation 3536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 3538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation is disabled 3539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation is enabled with returned value 3540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetGainCompensation(ADC_TypeDef *ADCx) 3542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR2, ADC_CFGR2_GCOMP) == ADC_CFGR2_GCOMP) ? READ_BIT(ADCx->GCOMP, ADC_G 3544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 3547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling time common configuration impacting 3549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. ARM GAS /tmp/ccsErhU4.s page 81 3550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_SetSamplingTimeCommonConfig 3555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTimeCommonConfig This parameter can be one of the following values: 3557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonConfig(ADC_TypeDef *ADCx, uint32_t SamplingTimeCom 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SMPR1, ADC_SMPR1_SMPPLUS, SamplingTimeCommonConfig); 3564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC sampling time common configuration impacting 3568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 3569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_GetSamplingTimeCommonConfig 3570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonConfig(ADC_TypeDef *ADCx) 3576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SMPR1, ADC_SMPR1_SMPPLUS)); 3578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_SMPR1_SMPPLUS */ 3580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr 3586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger source: 3591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 3592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 3593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 3594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 3595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 3596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 3597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 3598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_REG_SetTriggerEdge(). 3599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n 3606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_SetTriggerSource ARM GAS /tmp/ccsErhU4.s page 82 3607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 3609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 3619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 3629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 3639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 3649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 3656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); 3658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source: 3662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 3663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). ARM GAS /tmp/ccsErhU4.s page 83 3664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group regular trigger source is 3665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 3666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 3667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 3668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)") 3669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_IsTriggerSourceSWStart. 3670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n 3673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_GetTriggerSource 3674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 3686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 3696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 3706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 3716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 84 3721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx) 3722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); 3724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 3726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */ 3727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U 3728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */ 3730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 3731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource 3732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL) 3733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) 3734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 3735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source internal (SW start) 3739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or external. 3740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group regular trigger source set to external trigger, 3741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 3742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_GetTriggerSource(). 3743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1 3751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger polarity. 3755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge 3761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 3763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 3769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); 3771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger polarity. 3775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge 3777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccsErhU4.s page 85 3778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx) 3784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); 3786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling mode. 3790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the ADC conversion sampling mode 3791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode applies to regular group only. 3792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Set sampling mode is applied to all conversion of regular group. 3793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_SetSamplingMode\n 3798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_SetSamplingMode 3799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingMode This parameter can be one of the following values: 3801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 3804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode) 3807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG, SamplingMode); 3809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC sampling mode 3813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_GetSamplingMode\n 3814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_GetSamplingMode 3815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 3820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSamplingMode(ADC_TypeDef *ADCx) 3822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG)); 3824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer length and scan direction. 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 3833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. ARM GAS /tmp/ccsErhU4.s page 86 3835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 3855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength 3860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 3862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 3877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 3881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks); 3883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer length and scan direction. 3887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. ARM GAS /tmp/ccsErhU4.s page 87 3892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 3894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 3914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength 3915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 3932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx) 3935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L)); 3937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer discontinuous mode: 3941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 3944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 3945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC auto-injected mode 3946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC group regular sequencer discontinuous mode. 3947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccsErhU4.s page 88 3949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n 3952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont 3953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 3955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 3967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM, SeqDiscont); 3969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer discontinuous mode: 3973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n 3976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont 3977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx) 3990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM)); 3992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequence: channel on the selected 3996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 3997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 3998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Channels ordering into each rank of scan sequence: 3999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever channel can be placed into whatever rank. 4000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. ARM GAS /tmp/ccsErhU4.s page 89 4006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n 4015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n 4016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n 4017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n 4018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n 4019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n 4020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n 4021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n 4022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n 4023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n 4024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n 4025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n 4026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n 4027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n 4028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n 4029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_SetSequencerRanks 4030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 ARM GAS /tmp/ccsErhU4.s page 90 4063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Rank". */ 4096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> A 4099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 4102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequence: channel on the selected 4107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 4108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). ARM GAS /tmp/ccsErhU4.s page 91 4120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n 4126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n 4127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n 4128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n 4129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n 4130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n 4131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n 4132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n 4133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n 4134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n 4135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n 4136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n 4137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n 4138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n 4139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n 4140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_GetSequencerRanks 4141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 ARM GAS /tmp/ccsErhU4.s page 92 4177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK 4208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(*preg, 4210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MA 4211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC continuous conversion mode on ADC group regular. 4217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 4219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 4222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 4223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode 4228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Continuous This parameter can be one of the following values: 4230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 93 4234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous) 4235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous); 4237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC continuous conversion mode on ADC group regular. 4241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 4243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode 4246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx) 4252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT)); 4254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion data transfer: no transfer or 4258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 4273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_SetMultiDMATransfer(). 4276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n 4283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_SetDMATransfer 4284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DMATransfer This parameter can be one of the following values: 4286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 94 4291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer) 4292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG, DMATransfer); 4294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data transfer: no transfer or 4298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 4313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_GetMultiDMATransfer(). 4316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n 4319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_GetDMATransfer 4320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx) 4327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG)); 4329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular behavior in case of overrun: 4333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Compatibility with devices without feature overrun: 4335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other devices without this feature have a behavior 4336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * equivalent to data overwritten. 4337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The default setting of overrun is data preserved. 4338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, for compatibility with all devices, parameter 4339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * overrun should be set to data overwritten. 4340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun 4345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Overrun This parameter can be one of the following values: 4347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED ARM GAS /tmp/ccsErhU4.s page 95 4348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun) 4352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun); 4354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular behavior in case of overrun: 4358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun 4360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 4363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx) 4366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD)); 4368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 4372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: g 4375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 4376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger source: 4380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 4383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 4384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 4385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 4386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 4387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_INJ_SetTriggerEdge(). 4388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n 4395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_SetTriggerSource 4396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) ARM GAS /tmp/ccsErhU4.s page 96 4405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 4444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN, TriggerSource); 4446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source: 4450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group injected trigger source is 4453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 4454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 4455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 4456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)") 4457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_IsTriggerSourceSWStart. 4458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n 4461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_GetTriggerSource ARM GAS /tmp/ccsErhU4.s page 97 4462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(ADC_TypeDef *ADCx) 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN); 4511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 4513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */ 4514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS - 4515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */ 4517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 4518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource ARM GAS /tmp/ccsErhU4.s page 98 4519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL) 4520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN) 4521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source internal (SW start) 4526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or external 4527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group injected trigger source set to external trigger, 4528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 4529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_GetTriggerSource. 4530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart 4531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 4533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 4534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN)) ? 4538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger polarity. 4542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge 4548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 4550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 4556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge); 4558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger polarity. 4562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge 4564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx) 4571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN)); 4573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 99 4576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer length and scan direction. 4577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 4578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength 4588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 4590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 4597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks); 4599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer length and scan direction. 4603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function retrieves: 4604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength 4610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(ADC_TypeDef *ADCx) 4618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL)); 4620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer discontinuous mode: 4624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont 4629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 4631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK ARM GAS /tmp/ccsErhU4.s page 100 4633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 4636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont); 4638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer discontinuous mode: 4642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont 4645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 4649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx) 4651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN)); 4653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequence: channel on the selected 4657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n 4671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n 4672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n 4673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks 4674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 ARM GAS /tmp/ccsErhU4.s page 101 4690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on parameter "Rank". */ 4728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 4731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ 4732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequence: channel on the selected 4737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used ARM GAS /tmp/ccsErhU4.s page 102 4747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n 4752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n 4753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n 4754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks 4755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, ARM GAS /tmp/ccsErhU4.s page 103 4804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->JSQR, 4810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) < 4811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger: 4817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode can be used to extend number of data registers 4819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * updated after one ADC conversion trigger and with data 4820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * permanently kept (not erased by successive conversions of scan of 4821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC sequencer ranks), up to 5 data registers: 4822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 data register on ADC group regular, 4 data registers 4823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group injected. 4824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC group injected injected trigger source is set to an 4825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external trigger, this feature must be must be set to 4826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent trigger. 4827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC group injected automatic trigger is compliant only with 4828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group injected trigger source set to SW start, without any 4829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * further action on ADC group injected conversion start or stop: 4830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in this case, ADC group injected is controlled only 4831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC group regular. 4832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto 4839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TrigAuto This parameter can be one of the following values: 4841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto) 4846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto); 4848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger: 4852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto 4854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(ADC_TypeDef *ADCx) 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 104 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO)); 4862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected contexts queue mode. 4866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is disabled: 4871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - only 1 sequence can be configured 4872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and is active perpetually. 4873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is enabled: 4874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - up to 2 contexts can be queued 4875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and are checked in and out as a FIFO stack (first-in, first-out). 4876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If a new context is set when queues is full, error is triggered 4877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by interruption "Injected Queue Overflow". 4878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Two behaviors are possible when all contexts have been processed: 4879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the contexts queue can maintain the last context active perpetually 4880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or can be empty and injected group triggers are disabled. 4881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Triggers can be only external (not internal SW start) 4882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Caution: The sequence must be fully configured in one time 4883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (one write of register JSQR makes a check-in of a new context 4884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * into the queue). 4885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore functions to set separately injected trigger and 4886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer channels cannot be used, register JSQR must be set 4887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using function @ref LL_ADC_INJ_ConfigQueueContext(). 4888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This parameter can be modified only when no conversion is on going 4889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A modification of the context mode (bit JQDIS) causes the contexts 4891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * queue to be flushed and the register JSQR is cleared. 4892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n 4897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_SetQueueMode 4898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param QueueMode This parameter can be one of the following values: 4900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 4902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 4903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode) 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS, QueueMode); 4908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected context queue mode. 4912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n 4913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_GetQueueMode 4914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE ARM GAS /tmp/ccsErhU4.s page 105 4918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 4919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(ADC_TypeDef *ADCx) 4921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS)); 4923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set one context on ADC group injected that will be checked in 4927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * contexts queue. 4928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function is intended to be used when contexts queue is enabled, 4933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because the sequence must be fully configured in one time 4934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions to set separately injected trigger and sequencer channels 4935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * cannot be used): 4936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_INJ_SetQueueMode(). 4937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In the contexts queue, only the active context can be read. 4938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The parameters of this function can be read using functions: 4939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerSource() 4940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerEdge() 4941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetSequencerRanks() 4942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n 4953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n 4954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JL LL_ADC_INJ_ConfigQueueContext\n 4955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n 4956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n 4957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n 4958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext 4959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) ARM GAS /tmp/ccsErhU4.s page 106 4975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 5000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 5005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Note: This parameter is discarded in case of SW start: 5010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE". 5011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 5012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 5016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank1_Channel This parameter can be one of the following values: 5017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 ARM GAS /tmp/ccsErhU4.s page 107 5032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank2_Channel This parameter can be one of the following values: 5059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) ARM GAS /tmp/ccsErhU4.s page 108 5089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank3_Channel This parameter can be one of the following values: 5101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank4_Channel This parameter can be one of the following values: 5143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) ARM GAS /tmp/ccsErhU4.s page 109 5146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx, 5187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource, 5188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ExternalTriggerEdge, 5189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerNbRanks, 5190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank1_Channel, 5191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank2_Channel, 5192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank3_Channel, 5193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank4_Channel) 5194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Rankx_Channel" with bits position */ 5196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on literal "LL_ADC_INJ_RANK_x". */ 5197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ 5198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* because containing other bits reserved for other purpose. */ 5199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If parameter "TriggerSource" is set to SW start, then parameter */ 5200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "ExternalTriggerEdge" is discarded. */ 5201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t is_trigger_not_sw = (uint32_t)((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE) ? 1UL : 0UL); 5202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ARM GAS /tmp/ccsErhU4.s page 110 5203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL | 5204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTEN | 5205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ4 | 5206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ3 | 5207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ2 | 5208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ1 | 5209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JL, 5210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (TriggerSource & ADC_JSQR_JEXTSEL) | 5211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ExternalTriggerEdge * (is_trigger_not_sw)) | 5212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SequencerNbRanks 5217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels 5225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set sampling time of the selected ADC channel 5230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of internal channel (VrefInt, TempSensor, ...) to be 5234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted: 5235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sampling time constraints must be respected (sampling time can be 5236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * adjusted in function of ADC clock frequency and sampling time 5237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * setting). 5238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for timings values (parameters TS_vrefint, 5239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_temp, ...). 5240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 5245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC conversion of internal channel (VrefInt, 5247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor, ...), a sampling time minimum value 5248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required. 5249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 5250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n 5255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n 5256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n 5257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n 5258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n 5259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n ARM GAS /tmp/ccsErhU4.s page 111 5260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n 5261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n 5262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n 5263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n 5264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n 5265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n 5266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n 5267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n 5268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n 5269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n 5270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n 5271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n 5272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_SetChannelSamplingTime 5273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTime This parameter can be one of the following values: ARM GAS /tmp/ccsErhU4.s page 112 5317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sa 5332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "SamplingTime" with bits position */ 5334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Channel". */ 5335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter "Channel" is used with masks because containing */ 5336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_M 5338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get sampling time of the selected ADC channel 5346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 5354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n 5356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n 5357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n 5358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n 5359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n 5360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n 5361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n 5362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n 5363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n 5364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n 5365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n 5366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n 5367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n 5368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n 5369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n 5370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n 5371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n 5372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n 5373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_GetChannelSamplingTime ARM GAS /tmp/ccsErhU4.s page 113 5374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 114 5431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel) 5432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOF 5434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 5436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_ 5437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_P 5438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set mode single-ended or differential input of the selected 5443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Channel ending is on channel scope: independently of channel mapped 5445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group regular or injected. 5446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In differential mode: Differential measurement is carried out 5447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * between the selected channel 'i' (positive input) and 5448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel 'i+1' (negative input). Only channel 'i' has to be 5449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured, channel 'i+1' is configured automatically. 5450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 5451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 5453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For ADC channels configured in differential mode, both inputs 5466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * should be biased at (Vref+)/2 +/-200mV. 5467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (Vref+ is the analog voltage reference) 5468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 5471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 5472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff 5474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 ARM GAS /tmp/ccsErhU4.s page 115 5488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be a combination of the following values: 5492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 5493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 5494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sing 5497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Bits of channels in single or differential mode are set only for */ 5499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* differential mode (for single mode, mask of bits allowed to be set is */ 5500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* shifted out of range of bits of channels in single or differential mode. */ 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->DIFSEL, 5502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SING 5504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get mode single-ended or differential input of the selected 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, to ensure a channel is configured in single-ended mode, 5512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the configuration of channel itself and the channel 'i-1' must be 5513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * read back (to ensure that the selected channel channel has not been 5514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured in differential mode by the previous channel). 5515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 5516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 5518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. In this case, the value 5531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned is null if all channels are in single ended-mode. 5532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff 5534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be a combination of the following values: 5536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 ARM GAS /tmp/ccsErhU4.s page 116 5545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: channel in single-ended mode, else: channel in differential mode 5552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel) 5554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK))); 5556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an 5563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog monitored channels: 5568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a single channel, multiple channels or all channels, 5569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC groups regular and-or injected. 5570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Once monitored channels are selected, analog watchdog 5571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 5572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of need to define a single channel to monitor 5573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with analog watchdog from sequencer channel definition, 5574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP(). 5575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n 5601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n ARM GAS /tmp/ccsErhU4.s page 117 5602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n 5605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels 5606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDChannelGroup This parameter can be one of the following values: 5612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 5614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 5617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 5624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 5652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) ARM GAS /tmp/ccsErhU4.s page 118 5659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 5664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 5671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 5674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 5675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 5676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 5677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 5678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 5679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 5680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 5681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 5682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 5683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 5684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 5685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 5686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 5687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 5688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 5689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 5690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 5691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 5692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 5693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 5694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 5695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 5696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 5697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 5698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 5699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 5700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 5701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 5702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 5703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 5704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 5705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 5706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 5708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da ARM GAS /tmp/ccsErhU4.s page 119 5716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDChannelGroup" with bits position */ 5721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "AWDy". */ 5722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ 5723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> AD 5725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_C 5726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDChannelGroup & AWDy); 5730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog monitored channel. 5734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 5735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 5736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 5737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 5738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 5739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 5741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 5742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 5743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 5744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only when the analog watchdog is set to monitor 5746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * one channel. 5747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n ARM GAS /tmp/ccsErhU4.s page 120 5773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n 5774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n 5777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels 5778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 (1) 5782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 (1) 5783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On this AWD number, monitored channel can be retrieved 5785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * if only 1 channel is programmed (or none or all channels). 5786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function cannot retrieve monitored channel if 5787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * multiple channels are programmed simultaneously 5788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by bitfield. 5789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 5792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 5795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 5802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ ARM GAS /tmp/ccsErhU4.s page 121 5830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 5837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 5842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 5849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1. 5853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy) 5855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) 5857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC 5858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK); 5860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */ 5862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (parameter value LL_ADC_AWD_DISABLE). */ 5863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Else, the selected AWD is enabled and is monitoring a group of channels */ 5864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* or a single channel. */ 5865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AnalogWDMonitChannels != 0UL) 5866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AWDy == LL_ADC_AWD1) 5868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_CFGR_AWD1SGL) == 0UL) 5870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = ((AnalogWDMonitChannels 5873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD_CR23_CHANNEL_MASK) 5874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (~(ADC_CFGR_AWD1CH)) 5876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1C 5883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else ARM GAS /tmp/ccsErhU4.s page 122 5887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK) 5889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (ADC_AWD_CR23_CHANNEL_MASK 5892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN)) 5893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 5901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDMonitChannels) << ADC_CF 5902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return AnalogWDMonitChannels; 5908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog thresholds value of both thresholds 5912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high and low. 5913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If value of only one threshold high or low must be set, 5914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_SetAnalogWDThresholds(). 5915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 5940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 5941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 5942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 5943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n ARM GAS /tmp/ccsErhU4.s page 123 5944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n 5945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n 5946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n 5947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n 5948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_ConfigAnalogWDThresholds 5949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF 5955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF 5956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdLowValue) 5960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ 5962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameter */ 5963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDy". */ 5964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ 5965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 5966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC 5967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 5970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) | AWDThresholdLowValue); 5971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog threshold value of threshold 5975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high or low. 5976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If values of both thresholds high or low must be set, 5977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_ConfigAnalogWDThresholds(). 5978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 6000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits ARM GAS /tmp/ccsErhU4.s page 124 6001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 6003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 6004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 6005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 6006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is not conditioned to 6007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC can be disabled, enabled with or without conversion on going 6009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either ADC groups regular or injected. 6010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n 6011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_SetAnalogWDThresholds\n 6012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_SetAnalogWDThresholds\n 6013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_SetAnalogWDThresholds\n 6014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_SetAnalogWDThresholds\n 6015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_SetAnalogWDThresholds 6016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 6023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF 6025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThr 6028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdValue) 6029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */ 6031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameters */ 6032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */ 6033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ 6034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 6035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_RE 6037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 6039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdsHighLow, 6040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdValue << ((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TR 6041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog threshold value of threshold high, 6045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * threshold low or raw data with ADC thresholds high and low 6046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * concatenated. 6047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC thresholds high and low is retrieved, 6048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the data of each threshold high or low can be isolated 6049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro: 6050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(). 6051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 6052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 6053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(). 6054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n 6055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_GetAnalogWDThresholds\n 6056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_GetAnalogWDThresholds\n 6057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_GetAnalogWDThresholds\n ARM GAS /tmp/ccsErhU4.s page 125 6058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_GetAnalogWDThresholds\n 6059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_GetAnalogWDThresholds 6060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 6067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW 6069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 6070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AW 6072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_ 6075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 6077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdsHighLow | ADC_TR1_LT1)) 6078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH 6079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & ~(AWDThresholdsHighLow & ADC_TR1_LT1))); 6080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog filtering configuration 6084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 6089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_SetAWDFilteringConfiguration 6091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param FilteringConfig This parameter can be one of the following values: 6095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 6101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t 6106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); 6110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog filtering configuration 6114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first ARM GAS /tmp/ccsErhU4.s page 126 6115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_GetAWDFilteringConfiguration 6117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 6121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 6127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy) 6131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); 6135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over 6142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling scope: ADC groups regular and-or injected 6147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 6154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n 6159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n 6160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_SetOverSamplingScope 6161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OvsScope This parameter can be one of the following values: 6163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 6168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope) 6171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 127 6172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope); 6173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling scope: ADC groups regular and-or injected 6177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 6184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n 6185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n 6186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_GetOverSamplingScope 6187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 6194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx) 6196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM)); 6198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling discontinuous mode (triggered mode) 6202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 6212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, oversampling discontinuous mode 6213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (triggered mode) can be used only when oversampling is 6214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * set on group regular only and in resumed mode. 6215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont 6216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OverSamplingDiscont This parameter can be one of the following values: 6218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont) 6223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont); 6225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling discontinuous mode (triggered mode) ARM GAS /tmp/ccsErhU4.s page 128 6229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont 6236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx) 6242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS)); 6244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling 6248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of oversampling configuration: 6250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ratio 6251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - shift 6252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n 6257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift 6258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Ratio This parameter can be one of the following values: 6260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 6267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Shift This parameter can be one of the following values: 6269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_ 6281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); 6283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 129 6286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling ratio 6287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio 6289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Ratio This parameter can be one of the following values: 6291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 6298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx) 6301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); 6303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling shift 6307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift 6309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Shift This parameter can be one of the following values: 6311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx) 6322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); 6324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multim 6331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode configuration to operate in independent mode 6337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccsErhU4.s page 130 6343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro 6346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_SetMultimode 6348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Multimode This parameter can be one of the following values: 6351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 6355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode) 6362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode); 6364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode configuration to operate in independent mode 6368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_GetMultimode 6373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 6380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON) 6386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); 6388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode conversion data transfer: no transfer 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped ARM GAS /tmp/ccsErhU4.s page 131 6400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 6406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 6412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 6418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled 6423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or enabled without conversion on going on group regular. 6424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n 6425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_SetMultiDMATransfer 6426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiDMATransfer This parameter can be one of the following values: 6429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 6432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMA 6437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, MultiDMATransfer); 6439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data transfer: no transfer 6443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 6451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). ARM GAS /tmp/ccsErhU4.s page 132 6457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 6463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 6469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n 6472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_GetMultiDMATransfer 6473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 6479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON) 6483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG)); 6485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode delay between 2 sampling phases. 6489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The sampling delay range depends on ADC resolution: 6490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 12 bits can have maximum delay of 12 cycles. 6491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 10 bits can have maximum delay of 10 cycles. 6492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 8 bits can have maximum delay of 8 cycles. 6493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 6 bits can have maximum delay of 6 cycles. 6494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 6499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay 6501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiTwoSamplingDelay This parameter can be one of the following values: 6504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 6507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) ARM GAS /tmp/ccsErhU4.s page 133 6514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Mul 6523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay); 6525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode delay between 2 sampling phases. 6529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay 6530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 6536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 6543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON) 6551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY)); 6553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 6555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance 6560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Put ADC instance in deep power down state. 6565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccsErhU4.s page 134 6571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown 6573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx) 6577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_DEEPPWD); 6584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC deep power down mode. 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown 6596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) 6600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); 6605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance deep power down state. 6609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled 6610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: deep power down is disabled, 1: deep power down is enabled. 6612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx) 6614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); 81 .loc 2 6615 0 82 001a 9368 ldr r3, [r2, #8] 83 001c 9D00 lsls r5, r3, #2 84 001e 05D5 bpl .L6 85 .LVL3: 86 .L44: 87 .LBE347: 88 .LBE346: 89 .LBB350: 90 .LBB351: 6604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 91 .loc 2 6604 0 ARM GAS /tmp/ccsErhU4.s page 135 92 0020 9368 ldr r3, [r2, #8] 93 0022 23F02043 bic r3, r3, #-1610612736 94 0026 23F03F03 bic r3, r3, #63 95 002a 9360 str r3, [r2, #8] 96 .LVL4: 97 .L6: 98 .LBE351: 99 .LBE350: 100 .LBB352: 101 .LBB353: 6616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC instance internal voltage regulator. 6620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC internal voltage regulator enable, 6621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay for ADC internal voltage regulator stabilization 6622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required before performing a ADC calibration or ADC enable. 6623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tADCVREG_STUP. 6624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US. 6625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator 6629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) 6633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADVREGEN); 6640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC internal voltage regulator. 6644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator 6648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx) 6652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS)); 6654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance internal voltage regulator state. 6658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled 6659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. 6661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) ARM GAS /tmp/ccsErhU4.s page 136 6663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); 102 .loc 2 6664 0 103 002c 9368 ldr r3, [r2, #8] 104 002e D800 lsls r0, r3, #3 105 0030 19D4 bmi .L7 106 .LVL5: 107 .LBE353: 108 .LBE352: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 109 .loc 1 503 0 110 0032 764B ldr r3, .L46 111 0034 7648 ldr r0, .L46+4 112 0036 1B68 ldr r3, [r3] 113 .LBB354: 114 .LBB355: 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 115 .loc 2 6637 0 116 0038 9168 ldr r1, [r2, #8] 117 .LBE355: 118 .LBE354: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 119 .loc 1 503 0 120 003a 9B09 lsrs r3, r3, #6 121 003c A0FB0303 umull r0, r3, r0, r3 122 0040 9B09 lsrs r3, r3, #6 123 .LBB359: 124 .LBB356: 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 125 .loc 2 6637 0 126 0042 21F01041 bic r1, r1, #-1879048192 127 .LBE356: 128 .LBE359: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 129 .loc 1 503 0 130 0046 0133 adds r3, r3, #1 131 .LBB360: 132 .LBB357: 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 133 .loc 2 6637 0 134 0048 21F03F01 bic r1, r1, #63 135 .LBE357: 136 .LBE360: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 137 .loc 1 503 0 138 004c 5B00 lsls r3, r3, #1 139 .LBB361: 140 .LBB358: 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 141 .loc 2 6637 0 142 004e 41F08051 orr r1, r1, #268435456 143 0052 9160 str r1, [r2, #8] 144 .LVL6: 145 .LBE358: 146 .LBE361: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 147 .loc 1 503 0 ARM GAS /tmp/ccsErhU4.s page 137 148 0054 0193 str r3, [sp, #4] 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 149 .loc 1 504 0 150 0056 019B ldr r3, [sp, #4] 151 0058 2BB1 cbz r3, .L7 152 .L8: 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 153 .loc 1 506 0 154 005a 019B ldr r3, [sp, #4] 155 005c 013B subs r3, r3, #1 156 005e 0193 str r3, [sp, #4] 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 157 .loc 1 504 0 158 0060 019B ldr r3, [sp, #4] 159 0062 002B cmp r3, #0 160 0064 F9D1 bne .L8 161 .L7: 162 .LVL7: 163 .LBB362: 164 .LBB363: 165 .loc 2 6664 0 166 0066 9368 ldr r3, [r2, #8] 167 0068 D900 lsls r1, r3, #3 168 006a 5AD4 bmi .L25 169 .LVL8: 170 .LBE363: 171 .LBE362: 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 172 .loc 1 516 0 173 006c E36D ldr r3, [r4, #92] 174 006e 43F01003 orr r3, r3, #16 175 0072 E365 str r3, [r4, #92] 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 176 .loc 1 519 0 177 0074 236E ldr r3, [r4, #96] 178 0076 43F00103 orr r3, r3, #1 179 007a 2366 str r3, [r4, #96] 180 .LVL9: 181 .LBB364: 182 .LBB365: 6665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable the selected ADC instance. 6669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC enable, a delay for 6670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC internal analog stabilization is required before performing a 6671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 6672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tSTAB. 6673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled and ADC internal voltage regulator enabled. 6679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_Enable 6680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None ARM GAS /tmp/ccsErhU4.s page 138 6682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) 6684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADEN); 6691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable the selected ADC instance. 6695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be not disabled. Must be enabled without conversion on going 6698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_Disable 6700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) 6704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADDIS); 6711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance enable state. 6715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_IsEnabled 6719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: ADC is disabled, 1: ADC is enabled. 6721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) 6723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); 6725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance disable state. 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing 6730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no ADC disable command on going. 6732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) 6734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); 6736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 139 6739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC calibration in the mode single-ended 6740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 6741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, a minimum number of ADC clock cycles 6742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are required between ADC end of calibration and ADC enable. 6743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES. 6744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 6745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 6746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 6747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration run must be performed for each of these 6748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 6749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 6750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_StartCalibration\n 6754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CR ADCALDIF LL_ADC_StartCalibration 6755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 6757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 6758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 6759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff) 6762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCALDIF | ADC_CR_BITS_PROPERTY_RS, 6768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCAL | (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK)); 6769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration state. 6773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing 6774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: calibration complete, 1: calibration in progress. 6776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx) 6778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL); 6780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu 6787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group regular conversion. 6792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 6793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 6794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 6795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. ARM GAS /tmp/ccsErhU4.s page 140 6796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 6797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 6798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 6799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_StartConversion 6805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) 6809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTART); 6816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group regular conversion. 6820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group regular, 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_StopConversion 6825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) 6829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTP); 6836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion state. 6840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing 6841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group regular. 6843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) 6845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); 183 .loc 2 6846 0 184 007c 9368 ldr r3, [r2, #8] 185 007e 13F0040F tst r3, #4 186 .LBE365: 187 .LBE364: 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 141 188 .loc 1 521 0 189 0082 4FF00100 mov r0, #1 190 .LVL10: 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_reg_is_conversion_on_going == 0UL) 191 .loc 1 530 0 192 0086 E36D ldr r3, [r4, #92] 193 .LBB369: 194 .LBB366: 195 .loc 2 6846 0 196 0088 52D1 bne .L11 197 .L10: 198 .LVL11: 199 .LBE366: 200 .LBE369: 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_reg_is_conversion_on_going == 0UL) 201 .loc 1 530 0 202 008a DB06 lsls r3, r3, #27 203 008c 50D4 bmi .L11 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, 204 .loc 1 535 0 205 008e E36D ldr r3, [r4, #92] 206 0090 23F48173 bic r3, r3, #258 207 0094 43F00203 orr r3, r3, #2 208 0098 E365 str r3, [r4, #92] 209 .LVL12: 210 .LBB370: 211 .LBB371: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 212 .loc 2 6724 0 213 009a 9368 ldr r3, [r2, #8] 214 009c DE07 lsls r6, r3, #31 215 009e 09D4 bmi .L12 216 .LVL13: 217 .LBE371: 218 .LBE370: 219 .LBB372: 220 .LBB373: 221 00a0 4FF0A043 mov r3, #1342177280 222 .LBE373: 223 .LBE372: 224 .LBB376: 225 .LBB377: 226 00a4 5B49 ldr r1, .L46+8 227 .LBE377: 228 .LBE376: 229 .LBB380: 230 .LBB374: 231 00a6 9B68 ldr r3, [r3, #8] 232 .LBE374: 233 .LBE380: 234 .LBB381: 235 .LBB378: 236 00a8 8968 ldr r1, [r1, #8] 237 00aa CD07 lsls r5, r1, #31 238 .LBE378: 239 .LBE381: 240 .LBB382: ARM GAS /tmp/ccsErhU4.s page 142 241 .LBB375: 242 00ac 03F00103 and r3, r3, #1 243 .LVL14: 244 .LBE375: 245 .LBE382: 246 .LBB383: 247 .LBB379: 248 00b0 40F18380 bpl .L41 249 .LVL15: 250 .L12: 251 .LBE379: 252 .LBE383: 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Resolution | 253 .loc 1 580 0 254 00b4 D4E90215 ldrd r1, r5, [r4, #8] 255 00b8 E36B ldr r3, [r4, #60] 256 00ba 2B43 orrs r3, r3, r5 257 00bc 0B43 orrs r3, r3, r1 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Overrun | 258 .loc 1 578 0 259 00be 657F ldrb r5, [r4, #29] @ zero_extendqisi2 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 260 .loc 1 582 0 261 00c0 94F82410 ldrb r1, [r4, #36] @ zero_extendqisi2 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Resolution | 262 .loc 1 580 0 263 00c4 43EA4533 orr r3, r3, r5, lsl #13 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 264 .loc 1 584 0 265 00c8 0129 cmp r1, #1 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Overrun | 266 .loc 1 578 0 267 00ca 43EA0143 orr r3, r3, r1, lsl #16 268 .LVL16: 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 269 .loc 1 584 0 270 00ce 03D1 bne .L13 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 271 .loc 1 586 0 272 00d0 A16A ldr r1, [r4, #40] 273 00d2 0139 subs r1, r1, #1 274 00d4 43EA4143 orr r3, r3, r1, lsl #17 275 .LVL17: 276 .L13: 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 277 .loc 1 594 0 278 00d8 E16A ldr r1, [r4, #44] 279 00da 21B1 cbz r1, .L14 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ); 280 .loc 1 597 0 281 00dc 256B ldr r5, [r4, #48] 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | hadc->Init.ExternalTrigConvEdge 282 .loc 1 596 0 283 00de 01F47871 and r1, r1, #992 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ); 284 .loc 1 597 0 285 00e2 2943 orrs r1, r1, r5 ARM GAS /tmp/ccsErhU4.s page 143 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | hadc->Init.ExternalTrigConvEdge 286 .loc 1 596 0 287 00e4 0B43 orrs r3, r3, r1 288 .LVL18: 289 .L14: 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 290 .loc 1 602 0 291 00e6 D668 ldr r6, [r2, #12] 292 00e8 4B49 ldr r1, .L46+12 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 293 .loc 1 605 0 294 00ea 656B ldr r5, [r4, #52] 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 295 .loc 1 602 0 296 00ec 3140 ands r1, r1, r6 297 00ee 0B43 orrs r3, r3, r1 298 .LVL19: 299 00f0 D360 str r3, [r2, #12] 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 300 .loc 1 605 0 301 00f2 1369 ldr r3, [r2, #16] 302 00f4 23F04063 bic r3, r3, #201326592 303 00f8 2B43 orrs r3, r3, r5 304 00fa 1361 str r3, [r2, #16] 305 .LVL20: 306 .LBB384: 307 .LBB385: 308 .loc 2 6846 0 309 00fc 9368 ldr r3, [r2, #8] 310 00fe 5907 lsls r1, r3, #29 311 0100 2BD5 bpl .L42 312 .LVL21: 313 .LBE385: 314 .LBE384: 315 .LBB386: 316 .LBB387: 6847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular command of conversion stop state 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing 6852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group regular. 6854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx) 6856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP)) ? 1UL : 0UL); 6858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC sampling phase for sampling time trigger mode 6862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 6866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccsErhU4.s page 144 6868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StartSamplingPhase 6872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartSamplingPhase(ADC_TypeDef *ADCx) 6876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC sampling phase for sampling time trigger mode and start conversion 6882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 6886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_StartSamplingPhase has been called to start 6887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the sampling phase 6888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StopSamplingPhase 6894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopSamplingPhase(ADC_TypeDef *ADCx) 6898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and 6905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all oversampling increased data width (for devices 6906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with feature oversampling). 6907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32 6908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 6910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx) 6912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 12 bits. 6919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12 6923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF ARM GAS /tmp/ccsErhU4.s page 145 6925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx) 6927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 10 bits. 6934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10 6938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF 6940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx) 6942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 8 bits. 6949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8 6953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 6955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx) 6957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 6 bits. 6964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6 6968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3F 6970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx) 6972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data of ADC master, ADC slave 6979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or raw data with ADC master and slave concatenated. 6980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC master and slave concatenated is retrieved, 6981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a macro is available to get the conversion data of ARM GAS /tmp/ccsErhU4.s page 146 6982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (however this macro is mainly intended for multimode 6985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, because this function can do the same 6986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by getting multimode conversion data of ADC master or ADC slave 6987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * separately). 6988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n 6989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32 6990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ConversionData This parameter can be one of the following values: 6993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 6994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 6995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER_SLAVE 6996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 6997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(ADC_Common_TypeDef *ADCxy_COMMON, uin 6999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR, 7001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ConversionData) 7002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (POSITION_VAL(ConversionData) & 0x1FUL) 7003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 7006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group inj 7012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group injected conversion. 7017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 7018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 7019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 7020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 7021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 7022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 7023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 7024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group injected, 7027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group injected, 7028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_StartConversion 7030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx) 7034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ARM GAS /tmp/ccsErhU4.s page 147 7039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTART); 7041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group injected conversion. 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group injected, 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion 7050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) 7054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTP); 7061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion state. 7065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing 7066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group injected. 7068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx) 7070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); 317 .loc 2 7071 0 318 0102 9368 ldr r3, [r2, #8] 319 .LVL22: 320 .L20: 321 .LBE387: 322 .LBE386: 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 323 .loc 1 678 0 324 0104 6369 ldr r3, [r4, #20] 325 0106 012B cmp r3, #1 326 0108 4FD0 beq .L43 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 327 .loc 1 685 0 328 010a 136B ldr r3, [r2, #48] 329 010c 23F00F03 bic r3, r3, #15 330 0110 1363 str r3, [r2, #48] 331 .L22: 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 332 .loc 1 690 0 333 0112 E36D ldr r3, [r4, #92] 334 0114 23F00303 bic r3, r3, #3 335 0118 43F00103 orr r3, r3, #1 336 011c E365 str r3, [r4, #92] 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 148 337 .loc 1 702 0 338 011e 02B0 add sp, sp, #8 339 .LCFI2: 340 .cfi_remember_state 341 .cfi_def_cfa_offset 16 342 @ sp needed 343 0120 70BD pop {r4, r5, r6, pc} 344 .LVL23: 345 .L25: 346 .LCFI3: 347 .cfi_restore_state 348 .LBB389: 349 .LBB367: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 350 .loc 2 6846 0 351 0122 9368 ldr r3, [r2, #8] 352 0124 13F0040F tst r3, #4 353 .LBE367: 354 .LBE389: 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpCFGR; 355 .loc 1 405 0 356 0128 4FF00000 mov r0, #0 357 .LVL24: 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_reg_is_conversion_on_going == 0UL) 358 .loc 1 530 0 359 012c E36D ldr r3, [r4, #92] 360 .LBB390: 361 .LBB368: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 362 .loc 2 6846 0 363 012e ACD0 beq .L10 364 .LVL25: 365 .L11: 366 .LBE368: 367 .LBE390: 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 368 .loc 1 695 0 369 0130 E36D ldr r3, [r4, #92] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 370 .loc 1 697 0 371 0132 0120 movs r0, #1 372 .LVL26: 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 373 .loc 1 695 0 374 0134 43F01003 orr r3, r3, #16 375 0138 E365 str r3, [r4, #92] 376 .LVL27: 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 377 .loc 1 702 0 378 013a 02B0 add sp, sp, #8 379 .LCFI4: 380 .cfi_remember_state 381 .cfi_def_cfa_offset 16 382 @ sp needed 383 013c 70BD pop {r4, r5, r6, pc} 384 .LVL28: 385 .L40: ARM GAS /tmp/ccsErhU4.s page 149 386 .LCFI5: 387 .cfi_restore_state 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 388 .loc 1 474 0 389 013e FFF7FEFF bl HAL_ADC_MspInit 390 .LVL29: 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 391 .loc 1 485 0 392 0142 2268 ldr r2, [r4] 393 .LVL30: 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 394 .loc 1 478 0 395 0144 2566 str r5, [r4, #96] 396 .LBB391: 397 .LBB348: 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 398 .loc 2 6615 0 399 0146 9368 ldr r3, [r2, #8] 400 .LBE348: 401 .LBE391: 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 402 .loc 1 481 0 403 0148 84F85850 strb r5, [r4, #88] 404 .LBB392: 405 .LBB349: 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 406 .loc 2 6615 0 407 014c 9D00 lsls r5, r3, #2 408 014e 7FF56DAF bpl .L6 409 0152 65E7 b .L44 410 .LVL31: 411 .L24: 412 .LBE349: 413 .LBE392: 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 414 .loc 1 415 0 415 0154 0120 movs r0, #1 416 .LVL32: 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 417 .loc 1 702 0 418 0156 02B0 add sp, sp, #8 419 .LCFI6: 420 .cfi_remember_state 421 .cfi_def_cfa_offset 16 422 @ sp needed 423 0158 70BD pop {r4, r5, r6, pc} 424 .LVL33: 425 .L42: 426 .LCFI7: 427 .cfi_restore_state 428 .LBB393: 429 .LBB388: 430 .loc 2 7071 0 431 015a 9368 ldr r3, [r2, #8] 432 015c 1B07 lsls r3, r3, #28 433 015e D1D4 bmi .L20 434 .LVL34: ARM GAS /tmp/ccsErhU4.s page 150 435 .LBE388: 436 .LBE393: 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 437 .loc 1 624 0 438 0160 D168 ldr r1, [r2, #12] 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 439 .loc 1 622 0 440 0162 94F83830 ldrb r3, [r4, #56] @ zero_extendqisi2 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); 441 .loc 1 621 0 442 0166 267F ldrb r6, [r4, #28] @ zero_extendqisi2 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 443 .loc 1 626 0 444 0168 2569 ldr r5, [r4, #16] 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 445 .loc 1 624 0 446 016a 21F48041 bic r1, r1, #16384 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 447 .loc 1 622 0 448 016e 5B00 lsls r3, r3, #1 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 449 .loc 1 624 0 450 0170 21F00201 bic r1, r1, #2 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | 451 .loc 1 620 0 452 0174 43EA8633 orr r3, r3, r6, lsl #14 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 453 .loc 1 624 0 454 0178 0B43 orrs r3, r3, r1 455 017a D360 str r3, [r2, #12] 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->GCOMP, ADC_GCOMP_GCOMPCOEFF, hadc->Init.GainCompensation); 456 .loc 1 628 0 457 017c 1369 ldr r3, [r2, #16] 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 458 .loc 1 626 0 459 017e 3DB3 cbz r5, .L17 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->GCOMP, ADC_GCOMP_GCOMPCOEFF, hadc->Init.GainCompensation); 460 .loc 1 628 0 461 0180 43F48033 orr r3, r3, #65536 462 0184 1361 str r3, [r2, #16] 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 463 .loc 1 629 0 464 0186 D2F8C030 ldr r3, [r2, #192] 465 018a 23F47F53 bic r3, r3, #16320 466 018e 23F03F03 bic r3, r3, #63 467 0192 2B43 orrs r3, r3, r5 468 0194 C2F8C030 str r3, [r2, #192] 469 .L18: 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 470 .loc 1 637 0 471 0198 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 472 019c 012B cmp r3, #1 473 019e 23D0 beq .L45 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 474 .loc 1 664 0 475 01a0 1369 ldr r3, [r2, #16] 476 01a2 23F00103 bic r3, r3, #1 ARM GAS /tmp/ccsErhU4.s page 151 477 01a6 1361 str r3, [r2, #16] 478 01a8 ACE7 b .L20 479 .LVL35: 480 .L43: 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 481 .loc 1 681 0 482 01aa 116B ldr r1, [r2, #48] 483 01ac 236A ldr r3, [r4, #32] 484 01ae 21F00F01 bic r1, r1, #15 485 01b2 013B subs r3, r3, #1 486 01b4 0B43 orrs r3, r3, r1 487 01b6 1363 str r3, [r2, #48] 488 01b8 ABE7 b .L22 489 .LVL36: 490 .L41: 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 491 .loc 1 546 0 492 01ba 002B cmp r3, #0 493 01bc 7FF47AAF bne .L12 494 .LVL37: 495 .LBB394: 496 .LBB395: 2735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 497 .loc 2 2735 0 498 01c0 1649 ldr r1, .L46+16 499 01c2 6568 ldr r5, [r4, #4] 500 01c4 8B68 ldr r3, [r1, #8] 501 01c6 23F47C13 bic r3, r3, #4128768 502 01ca 2B43 orrs r3, r3, r5 503 01cc 8B60 str r3, [r1, #8] 504 .LVL38: 505 01ce 71E7 b .L12 506 .LVL39: 507 .L17: 508 .LBE395: 509 .LBE394: 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->GCOMP, ADC_GCOMP_GCOMPCOEFF, 0UL); 510 .loc 1 633 0 511 01d0 23F48033 bic r3, r3, #65536 512 01d4 1361 str r3, [r2, #16] 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 513 .loc 1 634 0 514 01d6 D2F8C030 ldr r3, [r2, #192] 515 01da 23F47F53 bic r3, r3, #16320 516 01de 23F03F03 bic r3, r3, #63 517 01e2 C2F8C030 str r3, [r2, #192] 518 01e6 D7E7 b .L18 519 .L45: 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSR | 520 .loc 1 649 0 521 01e8 D4E91131 ldrd r3, r1, [r4, #68] 522 01ec E66C ldr r6, [r4, #76] 523 01ee 256D ldr r5, [r4, #80] 524 01f0 0B43 orrs r3, r3, r1 525 01f2 1169 ldr r1, [r2, #16] 526 01f4 43F00103 orr r3, r3, #1 527 01f8 3343 orrs r3, r3, r6 ARM GAS /tmp/ccsErhU4.s page 152 528 01fa 21F4FF61 bic r1, r1, #2040 529 01fe 2B43 orrs r3, r3, r5 530 0200 21F00401 bic r1, r1, #4 531 0204 0B43 orrs r3, r3, r1 532 0206 1361 str r3, [r2, #16] 533 0208 7CE7 b .L20 534 .L47: 535 020a 00BF .align 2 536 .L46: 537 020c 00000000 .word SystemCoreClock 538 0210 632D3E05 .word 87960931 539 0214 00010050 .word 1342177536 540 0218 0740F0FF .word -1032185 541 021c 00030050 .word 1342178048 542 .cfi_endproc 543 .LFE329: 545 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 546 .align 1 547 .p2align 2,,3 548 .weak HAL_ADC_MspDeInit 549 .syntax unified 550 .thumb 551 .thumb_func 552 .fpu fpv4-sp-d16 554 HAL_ADC_MspDeInit: 555 .LFB360: 556 .cfi_startproc 557 @ args = 0, pretend = 0, frame = 0 558 @ frame_needed = 0, uses_anonymous_args = 0 559 @ link register save eliminated. 560 0000 7047 bx lr 561 .cfi_endproc 562 .LFE360: 564 0002 00BF .section .text.HAL_ADC_Start,"ax",%progbits 565 .align 1 566 .p2align 2,,3 567 .global HAL_ADC_Start 568 .syntax unified 569 .thumb 570 .thumb_func 571 .fpu fpv4-sp-d16 573 HAL_ADC_Start: 574 .LFB333: 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief DeInitialize the ADC MSP. 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note All ADC instances use the same core clock at RCC level, disabling 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the core clock reset all ADC instances). 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc) 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, ARM GAS /tmp/ccsErhU4.s page 153 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file. 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Register a User ADC Callback 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * To be used instead of the weak predefined callback 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the configuration information for the specified ADC. 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param CallbackID ID of the callback to be registered 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This parameter can be one of the following values: 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion DMA half-transfer call 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_QUEUE_OVEFLOW_CB_ID ADC group injected context queue over 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_2_CB_ID ADC analog watchdog 2 callback ID 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_3_CB_ID ADC analog watchdog 3 callback ID 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_END_OF_SAMPLING_CB_ID ADC end of sampling callback ID 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param pCallback pointer to the Callback function 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Callb 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** pADC_CallbackTypeDef pCallback) 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (pCallback == NULL) 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0UL) 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (CallbackID) 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvCpltCallback = pCallback; 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvHalfCpltCallback = pCallback; 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = pCallback; 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 154 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback = pCallback; 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID : 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedConvCpltCallback = pCallback; 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_INJ_QUEUE_OVEFLOW_CB_ID : 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedQueueOverflowCallback = pCallback; 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_2_CB_ID : 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow2Callback = pCallback; 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_3_CB_ID : 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow3Callback = pCallback; 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_END_OF_SAMPLING_CB_ID : 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->EndOfSamplingCallback = pCallback; 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback = pCallback; 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default : 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (CallbackID) 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback = pCallback; 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default : 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 155 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return status; 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Unregister a ADC Callback 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ADC callback is redirected to the weak predefined callback 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the configuration information for the specified ADC. 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param CallbackID ID of the callback to be unregistered 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This parameter can be one of the following values: 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion DMA half-transfer call 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_QUEUE_OVEFLOW_CB_ID ADC group injected context queue over 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_2_CB_ID ADC analog watchdog 2 callback ID 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_3_CB_ID ADC analog watchdog 3 callback ID 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_END_OF_SAMPLING_CB_ID ADC end of sampling callback ID 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Cal 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0UL) 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (CallbackID) 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; ARM GAS /tmp/ccsErhU4.s page 156 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID : 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback; 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_INJ_QUEUE_OVEFLOW_CB_ID : 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedQueueOverflowCallback = HAL_ADCEx_InjectedQueueOverflowCallback; 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_2_CB_ID : 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow2Callback = HAL_ADCEx_LevelOutOfWindow2Callback; 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_3_CB_ID : 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow3Callback = HAL_ADCEx_LevelOutOfWindow3Callback; 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_END_OF_SAMPLING_CB_ID : 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->EndOfSamplingCallback = HAL_ADCEx_EndOfSamplingCallback; 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default : 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (CallbackID) 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit 1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default : 1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ ARM GAS /tmp/ccsErhU4.s page 157 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update the error code */ 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return error status */ 1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** status = HAL_ERROR; 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return status; 1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions 1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief ADC IO operation functions 1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @verbatim 1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### IO operation functions ##### 1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] This section provides functions allowing to: 1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Start conversion of regular group. 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Stop conversion of regular group. 1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Poll for conversion complete on regular group. 1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Poll for conversion event. 1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Get result of regular channel conversion. 1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions. 1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions. 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Handle ADC interrupt request 1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer. 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer. 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @endverbatim 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group. 1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Interruptions enabled in this function: None. 1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Case of multimode enabled (when multimode feature is available): 1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * if ADC is Slave, ADC is enabled but conversion is not started, 1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * if ADC is master, ADC is enabled and multimode conversion is started. 1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc) ARM GAS /tmp/ccsErhU4.s page 158 1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 575 .loc 1 1229 0 576 .cfi_startproc 577 @ args = 0, pretend = 0, frame = 0 578 @ frame_needed = 0, uses_anonymous_args = 0 579 .LVL40: 580 .loc 1 1229 0 581 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 582 .LCFI8: 583 .cfi_def_cfa_offset 24 584 .cfi_offset 3, -24 585 .cfi_offset 4, -20 586 .cfi_offset 5, -16 587 .cfi_offset 6, -12 588 .cfi_offset 7, -8 589 .cfi_offset 14, -4 590 .LBB412: 591 .LBB413: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 592 .loc 2 6387 0 593 0002 4A4A ldr r2, .L78 594 .LBE413: 595 .LBE412: 1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** const ADC_TypeDef *tmpADC_Master; 1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 596 .loc 1 1240 0 597 0004 0368 ldr r3, [r0] 598 .LBB416: 599 .LBB414: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 600 .loc 2 6387 0 601 0006 9568 ldr r5, [r2, #8] 602 .LVL41: 603 .LBE414: 604 .LBE416: 605 .LBB417: 606 .LBB418: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 607 .loc 2 6846 0 608 0008 9A68 ldr r2, [r3, #8] 609 000a 5707 lsls r7, r2, #29 610 000c 1BD4 bmi .L68 611 .LVL42: 612 .LBE418: 613 .LBE417: 1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); ARM GAS /tmp/ccsErhU4.s page 159 614 .loc 1 1243 0 615 000e 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 616 0012 012A cmp r2, #1 617 0014 17D0 beq .L68 618 .LBB419: 619 .LBB420: 620 .LBB421: 621 .LBB422: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 622 .loc 2 6724 0 discriminator 2 623 0016 9A68 ldr r2, [r3, #8] 624 .LBE422: 625 .LBE421: 626 .LBE420: 627 .LBE419: 628 .loc 1 1243 0 discriminator 2 629 0018 0121 movs r1, #1 630 .LBB436: 631 .LBB433: 632 .LBB425: 633 .LBB423: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 634 .loc 2 6724 0 discriminator 2 635 001a D607 lsls r6, r2, #31 636 001c 0446 mov r4, r0 637 .LBE423: 638 .LBE425: 639 .LBE433: 640 .LBE436: 641 .loc 1 1243 0 discriminator 2 642 001e 80F85810 strb r1, [r0, #88] 643 .LVL43: 644 .LBB437: 645 .LBB434: 646 .LBB426: 647 .LBB424: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 648 .loc 2 6724 0 discriminator 2 649 0022 12D4 bmi .L51 650 .LVL44: 651 .LBE424: 652 .LBE426: 1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable the ADC peripheral */ 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); 1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); 1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) ARM GAS /tmp/ccsErhU4.s page 160 1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if ADC instance is master or if multimode feature is not available 1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code */ 1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if a conversion is on going on ADC group injected */ 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset ADC error code fields related to regular conversions only */ 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset all ADC error code fields */ 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC group regular conversion flag and overrun flag */ 1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ 1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable conversion of regular group. */ 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ 1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* trigger event. */ 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case of multimode enabled (when multimode feature is available): */ 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if ADC is slave and dual regular conversions are enabled, ADC is */ 1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* enabled only (conversion is not started), */ 1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if ADC is master, ADC is enabled and conversion is started. */ 1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) 1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC instance is not a multimode slave instance with multimode regular conversions enable 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start ADC group regular conversion */ 1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StartConversion(hadc->Instance); 1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 161 1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC instance is a multimode slave instance with multimode regular conversions enabled */ 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* if Master ADC JAUTO bit is set, update Slave State in setting 1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_INJ_BUSY bit and in resetting HAL_ADC_STATE_INJ_EOC bit */ 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != 0UL) 1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) 1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start ADC group regular conversion */ 1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StartConversion(hadc->Instance); 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; 1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected channels in 1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * case of auto_injection mode), disable ADC peripheral. 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note: ADC peripheral disable is forcing stop of potential 1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * conversion on injected group. If injected group is under use, it 1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc) 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 1366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 1372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 162 1373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 1. Stop potential conversion on going, on ADC groups regular and injected */ 1374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ 1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); 1381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if ADC is effectively disabled */ 1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 1387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY); 1389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed. 1401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of 1402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * conversion) are cleared by this function, with an exception: 1403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * not cleared to not interfere with this feature until data register 1405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * is read using function HAL_ADC_GetValue(). 1406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init 1408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). 1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be 1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * be performed on the complete sequence (ADC init 1412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). 1413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. 1415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 1416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_Flag_End; 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_cfgr; 1422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** const ADC_TypeDef *tmpADC_Master; 1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 1425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 163 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If end of conversion selected to end of sequence conversions */ 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) 1432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_Flag_End = ADC_FLAG_EOS; 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If end of conversion selected to end of unitary conversion */ 1436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */ 1437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */ 1439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* each conversion: */ 1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */ 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */ 1442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */ 1443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */ 1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check ADC DMA mode in independent mode on ADC group regular */ 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN) != 0UL) 1452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_Flag_End = (ADC_FLAG_EOC); 1459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check ADC DMA mode in multimode on ADC group regular */ 1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_GetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) != LL_ADC_MULTI_REG_ 1465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_Flag_End = (ADC_FLAG_EOC); 1472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check ADC DMA mode */ 1476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN) != 0UL) 1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 1480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_Flag_End = (ADC_FLAG_EOC); 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 164 1487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get tick count */ 1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tickstart = HAL_GetTick(); 1490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait until End of unitary conversion or sequence conversions flag is raised */ 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 1493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ 1495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (Timeout != HAL_MAX_DELAY) 1496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) 1498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to timeout */ 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_TIMEOUT; 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine */ 1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ 1518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ 1519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) 1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == DISABLE) 1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check whether end of sequence is reached */ 1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* in function of multimode state (for devices with multimode */ 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* available). */ 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) ARM GAS /tmp/ccsErhU4.s page 165 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve handle ADC CFGR register */ 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 1548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve Master ADC CFGR register */ 1552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 1554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 1556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve handle ADC CFGR register */ 1557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 1558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear polled flag */ 1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_Flag_End == ADC_FLAG_EOS) 1562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS); 1564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear end of conversion EOC flag of regular group if low power feature */ 1568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ 1569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */ 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) 1571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); 1573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Poll for ADC event. 1582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param EventType the ADC event type. 1584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This parameter can be one of the following values: 1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_EOSMP_EVENT ADC End of Sampling event 1586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_AWD1_EVENT ADC Analog watchdog 1 event (main analog watchdog, presen 1587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_AWD2_EVENT ADC Analog watchdog 2 event (additional analog watchdog, 1588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_AWD3_EVENT ADC Analog watchdog 3 event (additional analog watchdog, 1589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_OVR_EVENT ADC Overrun event 1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_JQOVF_EVENT ADC Injected context queue overflow event 1591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. 1592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR. 1593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Indeed, the latter is reset only if hadc->Init.Overrun field is set 1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, data register may be potentially overwritten 1595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * by a new converted data as soon as OVR is cleared. 1596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * To reset OVR flag once the preserved data is retrieved, the user can resort 1597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 1598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 1599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeou ARM GAS /tmp/ccsErhU4.s page 166 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); 1607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get tick count */ 1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tickstart = HAL_GetTick(); 1610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check selected event flag */ 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (__HAL_ADC_GET_FLAG(hadc, EventType) == 0UL) 1613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ 1615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (Timeout != HAL_MAX_DELAY) 1616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) 1618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(hadc, EventType) == 0UL) 1621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to timeout */ 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 1624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_TIMEOUT; 1629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (EventType) 1635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* End Of Sampling event */ 1637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_EOSMP_EVENT: 1638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); 1640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear the End Of Sampling flag */ 1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP); 1643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Analog watchdog (level out of window) event */ 1647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: In case of several analog watchdog enabled, if needed to know */ 1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* which one triggered and on which ADCx, test ADC state of analog watchdog */ 1649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* flags HAL_ADC_STATE_AWD1/2/3 using function "HAL_ADC_GetState()". */ 1650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* For example: */ 1651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_AWD1) != 0UL) " */ 1652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_AWD2) != 0UL) " */ 1653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_AWD3) != 0UL) " */ 1654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check analog watchdog 1 flag */ 1656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_AWD_EVENT: 1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ ARM GAS /tmp/ccsErhU4.s page 167 1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); 1659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check analog watchdog 2 flag */ 1666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_AWD2_EVENT: 1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); 1672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check analog watchdog 3 flag */ 1676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_AWD3_EVENT: 1677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); 1679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); 1682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Injected context queue overflow event */ 1686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_JQOVF_EVENT: 1687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); 1689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to Injected context queue overflow */ 1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 1692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC Injected context queue overflow flag */ 1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); 1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Overrun event */ 1699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */ 1700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */ 1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* considered as an error. */ 1702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ 1703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* overrun ") */ 1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) 1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); 1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to overrun */ 1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); 1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC Overrun flag only if Overrun is set to ADC_OVR_DATA_OVERWRITTEN ARM GAS /tmp/ccsErhU4.s page 168 1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** otherwise, data register is potentially overwritten by new converted data as soon 1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** as OVR is cleared. */ 1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group with interruption. 1728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Interruptions enabled in this function according to initialization 1729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * setting : EOC (end of conversion), EOS (end of sequence), 1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * OVR overrun. 1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. 1732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Case of multimode enabled (when multimode feature is available): 1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * HAL_ADC_Start_IT() must be called for ADC Slave first, then for 1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ADC Master. 1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For ADC Slave, ADC is enabled only (conversion is not started). 1736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For ADC Master, ADC is enabled and multimode conversion is started. 1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note To guarantee a proper reset of all interruptions once all the needed 1738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure 1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * a correct stop of the IT-based conversions. 1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note By default, HAL_ADC_Start_IT() does not enable the End Of Sampling 1741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * interruption. If required (e.g. in case of oversampling with trigger 1742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * mode), the user must: 1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EO 1744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP) 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * before calling HAL_ADC_Start_IT(). 1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 1748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc) 1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** const ADC_TypeDef *tmpADC_Master; 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable the ADC peripheral */ 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 169 1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ 1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 1777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); 1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 1781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if ADC instance is master or if multimode feature is not available 1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code */ 1792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if a conversion is on going on ADC group injected */ 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) != 0UL) 1794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset ADC error code fields related to regular conversions only */ 1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 1797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset all ADC error code fields */ 1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 1802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC group regular conversion flag and overrun flag */ 1805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 1807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ 1810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable all interruptions before enabling the desired ones */ 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */ 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (hadc->Init.EOCSelection) 1818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOS); 1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ 1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: 1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable ADC overrun interrupt */ ARM GAS /tmp/ccsErhU4.s page 170 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If hadc->Init.Overrun is set to ADC_OVR_DATA_PRESERVED, only then is 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_OVR enabled; otherwise data overwrite is considered as normal 1831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** behavior and no CPU time is lost for a non-processed interruption */ 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) 1833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 1835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable conversion of regular group. */ 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ 1839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* trigger event. */ 1841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case of multimode enabled (when multimode feature is available): */ 1842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if ADC is slave and dual regular conversions are enabled, ADC is */ 1843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* enabled only (conversion is not started), */ 1844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - if ADC is master, ADC is enabled and conversion is started. */ 1845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) 1850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC instance is not a multimode slave instance with multimode regular conversions enable 1853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) 1854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable as well injected interruptions in case 1858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_InjectedStart_IT() has not been called beforehand. This 1859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** allows to start regular and injected conversions when JAUTO is 1860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** set with a single call to HAL_ADC_Start_IT() */ 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (hadc->Init.EOCSelection) 1862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ 1868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: 1869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 1870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start ADC group regular conversion */ 1876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StartConversion(hadc->Instance); 1877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC instance is a multimode slave instance with multimode regular conversions enabled */ 1881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* if Master ADC JAUTO bit is set, Slave injected interruptions 1883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** are enabled nevertheless (for same reason as above) */ 1884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 1885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != 0UL) ARM GAS /tmp/ccsErhU4.s page 171 1886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* First, update Slave State in setting HAL_ADC_STATE_INJ_BUSY bit 1888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** and in resetting HAL_ADC_STATE_INJ_EOC bit */ 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Next, set Slave injected interruptions */ 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (hadc->Init.EOCSelection) 1892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ 1898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 1906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC instance is not a multimode slave instance with multimode regular conversions enabled 1907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) 1908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 1910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable as well injected interruptions in case 1912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_InjectedStart_IT() has not been called beforehand. This 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** allows to start regular and injected conversions when JAUTO is 1914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** set with a single call to HAL_ADC_Start_IT() */ 1915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (hadc->Init.EOCSelection) 1916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: 1918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ 1922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 1924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start ADC group regular conversion */ 1930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StartConversion(hadc->Instance); 1931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 1932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 1941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; ARM GAS /tmp/ccsErhU4.s page 172 1943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected group in 1951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * case of auto_injection mode), disable interrution of 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral. 1953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 1954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 1955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 1956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc) 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 1959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 1961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 1965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 1. Stop potential conversion on going, on ADC groups regular and injected */ 1967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 1968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */ 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC overrun interrupt */ 1974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ 1977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); 1978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if ADC is effectively disabled */ 1980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 1981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 1984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY); 1986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 1993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 1997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group and transfer result through DMA. 1998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Interruptions enabled in this function: 1999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * overrun (if applicable), DMA half transfer, DMA transfer complete. ARM GAS /tmp/ccsErhU4.s page 173 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Case of multimode enabled (when multimode feature is available): HAL_ADC_Start_DMA() 2002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * is designed for single-ADC mode only. For multimode, the dedicated 2003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * HAL_ADCEx_MultiModeStart_DMA() function must be used. 2004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param pData Destination Buffer address. 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param Length Number of data to be transferred from ADC peripheral to memory 2007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 2008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length) 2010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 2012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 2014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ 2020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 2021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Ensure that multimode regular conversions are not enabled. */ 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */ 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) 2031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable the ADC peripheral */ 2035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); 2036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ 2038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 2039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ 2042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 2044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL 2045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); 2046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 2049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if ADC instance is master or if multimode feature is not available 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 2056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 174 2057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if a conversion is on going on ADC group injected */ 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) != 0UL) 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset ADC error code fields related to regular conversions only */ 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset all ADC error code fields */ 2068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set the DMA transfer complete callback */ 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 2073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set the DMA half transfer complete callback */ 2075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 2076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set the DMA error callback */ 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 2079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, */ 2082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC start (in case of SW start): */ 2083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ 2085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ 2086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* operations) */ 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 2088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 2090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ 2091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 2093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* With DMA, overrun event is always considered as an error even if 2095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->Init.Overrun is set to ADC_OVR_DATA_OVERWRITTEN. Therefore, 2096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_OVR is enabled. */ 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 2098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable ADC DMA mode */ 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); 2101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start the DMA channel */ 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_ 2104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable conversion of regular group. */ 2106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ 2108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* trigger event. */ 2109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start ADC group regular conversion */ 2110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StartConversion(hadc->Instance); 2111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 175 2114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 2115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; 2123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 2124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 2125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; 2131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 2134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected group in 2139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * case of auto_injection mode), disable ADC DMA transfer, disable 2140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ADC peripheral. 2141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note: ADC peripheral disable is forcing stop of potential 2142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * conversion on ADC group injected. If ADC group injected is under use, it 2143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. 2144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Case of multimode enabled (when multimode feature is available): 2145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * HAL_ADC_Stop_DMA() function is dedicated to single-ADC mode only. 2146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For multimode, the dedicated HAL_ADCEx_MultiModeStop_DMA() API must be used. 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc) 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 2153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 2159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 1. Stop potential ADC group regular conversion on going */ 2161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 2162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 2164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 2165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration of continuous requests is kept) */ 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); 2168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 2170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* while DMA transfer is on going) */ ARM GAS /tmp/ccsErhU4.s page 176 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY) 2172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 2174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if DMA channel effectively disabled */ 2176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status != HAL_OK) 2177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 2180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC overrun interrupt */ 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 2185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ 2187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, */ 2188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to keep in memory a potential failing status. */ 2189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 2190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); 2192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (void)ADC_Disable(hadc); 2196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if ADC is effectively disabled */ 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) 2200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, 2203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 2204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY); 2205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 2211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 2213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Get ADC regular group conversion result. 2218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC 2219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (ADC group regular end of unitary conversion). 2220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note This function does not clear ADC flag EOS 2221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (ADC group regular end of sequence conversion). 2222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Occurrence of flag EOS rising: 2223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent 2224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * to flag EOC. 2225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan 2226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence 2227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * both flags EOC and EOS are raised. ARM GAS /tmp/ccsErhU4.s page 177 2228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * To clear this flag, either use function: 2229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming 2230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion() 2231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). 2232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval ADC group regular conversion data 2234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc) 2236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */ 2241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* cleared by hardware when reading register DR. */ 2242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return ADC converted value */ 2244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return hadc->Instance->DR; 2245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Start ADC conversion sampling phase of regular group 2249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note: This function should only be called to start sampling when 2250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - @ref ADC_SAMPLING_MODE_TRIGGER_CONTROLED sampling 2251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * mode has been selected 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - @ref ADC_SOFTWARE_START has been selected as trigger source 2253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 2255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_StartSampling(ADC_HandleTypeDef *hadc) 2257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start sampling */ 2262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR2, ADC_CFGR2_SWTRIG); 2263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 2265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 2266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Stop ADC conversion sampling phase of regular group and start conversion 2270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note: This function should only be called to stop sampling when 2271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - @ref ADC_SAMPLING_MODE_TRIGGER_CONTROLED sampling 2272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * mode has been selected 2273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - @ref ADC_SOFTWARE_START has been selected as trigger source 2274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - after sampling has been started using @ref HAL_ADC_StartSampling. 2275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 2277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_StopSampling(ADC_HandleTypeDef *hadc) 2279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Start sampling */ 2284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_SWTRIG); ARM GAS /tmp/ccsErhU4.s page 178 2285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 2287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 2288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Handle ADC interrupt request. 2292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 2294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc) 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t overrun_error = 0UL; /* flag set if overrun occurrence has to be considered as an error 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; 2299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; 2300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start; 2301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_reg_is_trigger_source_sw_start; 2302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_cfgr; 2303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** const ADC_TypeDef *tmpADC_Master; 2305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 2306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); 2311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check End of Sampling flag for ADC group regular ========== */ 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_EOSMP) == ADC_FLAG_EOSMP) && ((tmp_ier & ADC_IT_EOSMP) == ADC_IT_EOSMP)) 2314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state machine on end of sampling status if not in error state */ 2316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) 2317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); 2320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* End Of Sampling callback */ 2323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->EndOfSamplingCallback(hadc); 2325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_EndOfSamplingCallback(hadc); 2327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear regular group conversion flag */ 2330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP); 2331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ====== Check ADC group regular end of unitary conversion sequence conversions ===== */ 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) || 2335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS))) 2336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ 2338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) 2339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); ARM GAS /tmp/ccsErhU4.s page 179 2342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ 2345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going */ 2346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to disable interruption. */ 2347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) 2348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 2350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* in function of multimode state (for devices with multimode */ 2351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* available). */ 2352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) 2357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* check CONT bit directly in handle ADC CFGR register */ 2360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 2361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* else need to check Master ADC CONT bit */ 2365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 2366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 2367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 2370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Carry on if continuous mode is disabled */ 2373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) != ADC_CFGR_CONT) 2374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ 2376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) 2377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ 2379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ 2380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 2381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC end of sequence conversion interrupt */ 2383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ 2384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ 2385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by overrun IRQ process below. */ 2386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); 2387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) 2392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 2394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Change ADC state to error state */ ARM GAS /tmp/ccsErhU4.s page 180 2399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 2400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 2402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 2403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Conversion complete callback */ 2409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Into callback function "HAL_ADC_ConvCpltCallback()", */ 2410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to determine if conversion has been triggered from EOC or EOS, */ 2411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* possibility to use: */ 2412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* " if ( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ 2413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); 2415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); 2417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear regular group conversion flag */ 2420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ 2421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/ 2422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */ 2423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ 2424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); 2425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ====== Check ADC group injected end of unitary conversion sequence conversions ===== */ 2428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((((tmp_isr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) && ((tmp_ier & ADC_IT_JEOC) == ADC_IT_JEOC)) || 2429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS))) 2430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ 2432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) 2433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 2436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC configuration */ 2439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance); 2440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance); 2441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 2442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* in function of multimode state (for devices with multimode */ 2443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* available). */ 2444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 2446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 2448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 2449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 2452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); ARM GAS /tmp/ccsErhU4.s page 181 2456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 2457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 2460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable interruption if no further conversion upcoming by injected */ 2463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* external trigger or by automatic injected conversion with regular */ 2464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* group having no further conversion upcoming (same conditions as */ 2465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* regular group interruption disabling above), */ 2466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* and if injected scan sequence is completed. */ 2467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_adc_inj_is_trigger_source_sw_start != 0UL) 2468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) || 2470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 2471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))) 2472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ 2474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) 2475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Particular case if injected contexts queue is enabled: */ 2477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* when the last context has been fully processed, JSQR is reset */ 2478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by the hardware. Even if no injected conversion is planned to come */ 2479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (queue empty, triggers are ignored), it can start again */ 2480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* immediately after setting a new context (JADSTART is still set). */ 2481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Therefore, state of HAL ADC injected group is kept to busy. */ 2482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL) 2483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */ 2485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* JADSTART==0 (no conversion on going) */ 2486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable ADC end of sequence conversion interrupt */ 2489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC | ADC_IT_JEOS); 2490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL) 2495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 2497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 2502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 2503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 2505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 2506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Injected Conversion complete callback */ ARM GAS /tmp/ccsErhU4.s page 182 2513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: HAL_ADCEx_InjectedConvCpltCallback can resort to 2514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) or 2515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOC)) to determine whether 2516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** interruption has been triggered by end of conversion or end of 2517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sequence. */ 2518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedConvCpltCallback(hadc); 2520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_InjectedConvCpltCallback(hadc); 2522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear injected group conversion flag */ 2525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC | ADC_FLAG_JEOS); 2526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check Analog watchdog 1 flag ========== */ 2529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_AWD1) == ADC_FLAG_AWD1) && ((tmp_ier & ADC_IT_AWD1) == ADC_IT_AWD1)) 2530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); 2533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Level out of window 1 callback */ 2535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindowCallback(hadc); 2537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc); 2539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 2542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); 2543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check analog watchdog 2 flag ========== */ 2546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_AWD2) == ADC_FLAG_AWD2) && ((tmp_ier & ADC_IT_AWD2) == ADC_IT_AWD2)) 2547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); 2550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Level out of window 2 callback */ 2552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow2Callback(hadc); 2554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_LevelOutOfWindow2Callback(hadc); 2556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 2559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); 2560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check analog watchdog 3 flag ========== */ 2563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_AWD3) == ADC_FLAG_AWD3) && ((tmp_ier & ADC_IT_AWD3) == ADC_IT_AWD3)) 2564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 2566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); 2567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Level out of window 3 callback */ 2569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) ARM GAS /tmp/ccsErhU4.s page 183 2570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->LevelOutOfWindow3Callback(hadc); 2571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_LevelOutOfWindow3Callback(hadc); 2573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ 2576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); 2577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check Overrun flag ========== */ 2580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR)) 2581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */ 2583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* overrun event is not considered as an error. */ 2584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ 2585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* overrun ") */ 2586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */ 2587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* error. */ 2588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) 2589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** overrun_error = 1UL; 2591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check DMA configuration */ 2595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (tmp_multimode_config != LL_ADC_MULTI_INDEPENDENT) 2597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Multimode (when feature is available) is enabled, 2599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Common Control Register MDMA bits must be checked. */ 2600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_GetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) != LL_ADC_MULTI_RE 2601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** overrun_error = 1UL; 2603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif 2607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Multimode not set or feature not available or ADC independent */ 2609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->CFGR & ADC_CFGR_DMAEN) != 0UL) 2610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** overrun_error = 1UL; 2612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (overrun_error == 1UL) 2617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Change ADC state to error state */ 2619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); 2620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to overrun */ 2622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); 2623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Error callback */ 2625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: In case of overrun, ADC conversion data is preserved until */ 2626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* flag OVR is reset. */ ARM GAS /tmp/ccsErhU4.s page 184 2627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Therefore, old ADC conversion data can be retrieved in */ 2628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* function "HAL_ADC_ErrorCallback()". */ 2629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback(hadc); 2631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); 2633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear ADC overrun flag */ 2637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 2638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ========== Check Injected context queue overflow flag ========== */ 2641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((tmp_isr & ADC_FLAG_JQOVF) == ADC_FLAG_JQOVF) && ((tmp_ier & ADC_IT_JQOVF) == ADC_IT_JQOVF)) 2642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Change ADC state to overrun state */ 2644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); 2645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to Injected context queue overflow */ 2647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 2648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear the Injected context queue overflow flag */ 2650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); 2651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Injected context queue overflow callback */ 2653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 2654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->InjectedQueueOverflowCallback(hadc); 2655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 2656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADCEx_InjectedQueueOverflowCallback(hadc); 2657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 2658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Conversion complete callback in non-blocking mode. 2664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 2666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) 2668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 2670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 2671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, 2673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file. 2674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non-blocking mode. 2679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 2681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc) 2683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 185 2684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 2685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 2686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, 2688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. 2689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Analog watchdog 1 callback in non-blocking mode. 2694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 2696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc) 2698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 2700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 2701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, 2703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. 2704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief ADC error callback in non-blocking mode 2709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA). 2710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note In case of error due to overrun when using ADC with DMA transfer 2711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (HAL ADC handle parameter "ErrorCode" to state "HAL_ADC_ERROR_OVR"): 2712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()". 2713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * - If needed, restart a new ADC conversion using function 2714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * "HAL_ADC_Start_DMA()" 2715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * (this function is also clearing overrun flag) 2716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 2718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) 2720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ 2722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** UNUSED(hadc); 2723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, 2725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file. 2726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 2731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions 2734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Peripheral Control functions 2735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 2736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @verbatim 2737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 2738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### Peripheral Control functions ##### 2739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 2740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] This section provides functions allowing to: ARM GAS /tmp/ccsErhU4.s page 186 2741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Configure channels on regular group 2742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Configure the analog watchdog 2743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @endverbatim 2745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 2746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Configure a channel to be assigned to ADC group regular. 2750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note In case of usage of internal measurement channels: 2751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Vbat/VrefInt/TempSensor. 2752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * These internal paths can be disabled using function 2753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * HAL_ADC_DeInit(). 2754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Possibility to update parameters on the fly: 2755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This function initializes channel into ADC group regular, 2756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * following calls to this function can be used to reconfigure 2757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * some parameters of structure "ADC_ChannelConfTypeDef" on the fly, 2758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * without resetting the ADC. 2759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state: 2760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Refer to comments of structure "ADC_ChannelConfTypeDef". 2761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param sConfig Structure of ADC channel assigned to ADC group regular. 2763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 2764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig) 2766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 2768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpOffsetShifted; 2769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_config_internal_channel; 2770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0UL; 2771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 2772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 2773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); 2777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); 2778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfig->SingleDiff)); 2779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_OFFSET_NUMBER(sConfig->OffsetNumber)); 2780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfig->Offset)); 2781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is 2783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ignored (considered as reset) */ 2784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENAB 2785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verification of channel number */ 2787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) 2788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(hadc, sConfig->Channel)); 2790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfig->Channel)); 2794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); ARM GAS /tmp/ccsErhU4.s page 187 2798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 2800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 2801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* conversion on going on regular group: */ 2802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Channel number */ 2803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Channel rank */ 2804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 2805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC group regular sequence: channel on the selected scan sequence rank */ 2807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_SetSequencerRanks(hadc->Instance, sConfig->Rank, sConfig->Channel); 2808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 2810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 2811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* conversion on going on regular group: */ 2812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Channel sampling time */ 2813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Channel offset */ 2814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 2815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 2816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 2817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 2818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */ 2821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (sConfig->SamplingTime == ADC_SAMPLETIME_3CYCLES_5) 2822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set sampling time of the selected ADC channel */ 2824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, LL_ADC_SAMPLINGTIME_2CYCLES 2825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC sampling time common configuration */ 2827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5) 2828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set sampling time of the selected ADC channel */ 2832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, sConfig->SamplingTime); 2833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC sampling time common configuration */ 2835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT); 2836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configure the offset: offset enable/disable, channel, offset value */ 2839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Shift the offset with respect to the selected ADC resolution. */ 2841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ 2842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset); 2843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (sConfig->OffsetNumber != ADC_OFFSET_NONE) 2845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC selected offset number */ 2847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffset(hadc->Instance, sConfig->OffsetNumber, sConfig->Channel, tmpOffsetShifted) 2848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_OFFSET_SIGN(sConfig->OffsetSign)); 2850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetSaturation)); 2851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC selected offset sign & saturation */ 2852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetSign(hadc->Instance, sConfig->OffsetNumber, sConfig->OffsetSign); 2853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSaturatio 2854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 188 2855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Scan each offset register to check if the selected channel is targeted. */ 2858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If this is the case, the corresponding offset number is disabled. */ 2859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1) 2860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 2861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE); 2863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2) 2865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 2866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE); 2868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3) 2870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 2871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE); 2873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4) 2875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 2876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE); 2878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 2883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ 2884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Single or differential mode */ 2885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 2886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set mode single-ended or differential input of the selected ADC channel */ 2888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfig->Channel, sConfig->SingleDiff); 2889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of differential mode */ 2891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (sConfig->SingleDiff == ADC_DIFFERENTIAL_ENDED) 2892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set sampling time of the selected ADC channel */ 2894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits r 2895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, 2896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_T 2897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sConfig->SamplingTime); 2898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Management of internal measurement channels: Vbat/VrefInt/TempSensor. */ 2903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If internal channel selected, enable dedicated internal buffers and */ 2904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* paths. */ 2905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: these internal measurement paths can be disabled using */ 2906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* HAL_ADC_DeInit(). */ 2907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) 2909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->I 2911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 189 2912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If the requested internal measurement path has already been enabled, */ 2913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* bypass the configuration processing. */ 2914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR_ADC1) || (sConfig->Channel == ADC_CHANNEL_TE 2915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 2916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) 2918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_chan 2921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */ 2923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait loop initialization and execution */ 2924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Variable divided by 2 to compensate partially */ 2925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* CPU processing cycles, scaling in us split to not */ 2926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* exceed 32 bits register capacity and handle low frequency. */ 2927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000 2928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 2929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** wait_loop_index--; 2931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PAT 2935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) 2937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 2940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) 2943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 2944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (ADC_VREFINT_INSTANCE(hadc)) 2946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel 2949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* nothing to do */ 2954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If a conversion is on going on regular group, no update on regular */ 2959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* channel could be done on neither of the channel configuration structure */ 2960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* parameters. */ 2961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 2962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 2964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 2965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; 2967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 190 2969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 2970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 2971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 2973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 2974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 2977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Configure the analog watchdog. 2978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Possibility to update parameters on the fly: 2979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This function initializes the selected analog watchdog, successive 2980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters 2981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting 2982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the ADC. 2983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. 2984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For parameters constraints, see comments of structure 2985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef". 2986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note On this STM32 series, analog watchdog thresholds can be modified 2987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * while ADC conversion is on going. 2988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * In this case, some constraints must be taken into account: 2989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * the programmed threshold values are effective from the next 2990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * ADC EOC (end of unitary conversion). 2991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * Considering that registers write delay may happen due to 2992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * bus activity, this might cause an uncertainty on the 2993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * effective timing of the new programmed threshold values. 2994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 2995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param AnalogWDGConfig Structure of ADC analog watchdog configuration 2996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status 2997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 2998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *Analog 2999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted; 3002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; 3003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 3005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 3007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_NUMBER(AnalogWDGConfig->WatchdogNumber)); 3009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); 3010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_FILTERING_MODE(AnalogWDGConfig->FilteringConfig)); 3011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); 3012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) || 3014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || 3015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)) 3016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(hadc, AnalogWDGConfig->Channel)); 3018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verify thresholds range */ 3021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (hadc->Init.OversamplingMode == ENABLE) 3022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case of oversampling enabled: depending on ratio and shift configuration, 3024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** analog watchdog thresholds can be higher than ADC resolution. 3025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Verify if thresholds are within maximum thresholds range. */ ARM GAS /tmp/ccsErhU4.s page 191 3026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, AnalogWDGConfig->HighThreshold)); 3027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, AnalogWDGConfig->LowThreshold)); 3028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verify if thresholds are within the selected ADC resolution */ 3032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); 3033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); 3034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process locked */ 3037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_LOCK(hadc); 3038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ 3040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 3041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* conversion on going on ADC groups regular and injected: */ 3042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Analog watchdog channels */ 3043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 3044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 3045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 3046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 3047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 3048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Analog watchdog configuration */ 3050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1) 3051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configuration of analog watchdog: */ 3053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* - Set the analog watchdog enable mode: one or overall group of */ 3054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* channels, on groups regular and-or injected. */ 3055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (AnalogWDGConfig->WatchdogMode) 3056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_REG: 3058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, __LL_ADC_ANALOGWD_CHANNEL_GR 3059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_GROUP_REGULAR)); 3060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_INJEC: 3063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, __LL_ADC_ANALOGWD_CHANNEL_GR 3064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_GROUP_INJECTED)); 3065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_REGINJEC: 3068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, __LL_ADC_ANALOGWD_CHANNEL_GR 3069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_GROUP_REGULAR_INJECTED)); 3070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_REG: 3073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, LL_ADC_AWD_ALL_CHANNELS_REG) 3074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_INJEC: 3077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, LL_ADC_AWD_ALL_CHANNELS_INJ) 3078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_REGINJEC: 3081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, LL_ADC_AWD_ALL_CHANNELS_REG_ 3082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; ARM GAS /tmp/ccsErhU4.s page 192 3083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: /* ADC_ANALOGWATCHDOG_NONE */ 3085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, LL_ADC_AWD1, LL_ADC_AWD_DISABLE); 3086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set the filtering configuration */ 3090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** MODIFY_REG(hadc->Instance->TR1, 3091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_TR1_AWDFILT, 3092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** AnalogWDGConfig->FilteringConfig); 3093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state, clear previous result related to AWD1 */ 3095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD1); 3096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear flag ADC analog watchdog */ 3098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Flag cleared Clear the ADC Analog watchdog flag to be ready */ 3099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to use for HAL_ADC_IRQHandler() or HAL_ADC_PollForEvent() */ 3100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (in case left enabled by previous ADC operations). */ 3101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_ClearFlag_AWD1(hadc->Instance); 3102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configure ADC analog watchdog interrupt */ 3104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->ITMode == ENABLE) 3105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_EnableIT_AWD1(hadc->Instance); 3107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_DisableIT_AWD1(hadc->Instance); 3111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case of ADC_ANALOGWATCHDOG_2 or ADC_ANALOGWATCHDOG_3 */ 3114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (AnalogWDGConfig->WatchdogMode) 3117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_REG: 3119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_INJEC: 3120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_SINGLE_REGINJEC: 3121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update AWD by bitfield to keep the possibility to monitor */ 3122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* several channels by successive calls of this function. */ 3123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2) 3124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->AWD2CR, (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDGConfig 3126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->AWD3CR, (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDGConfig 3130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_REG: 3134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_INJEC: 3135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_ANALOGWATCHDOG_ALL_REGINJEC: 3136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, AnalogWDGConfig->WatchdogNumber, LL_ADC_A 3137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: /* ADC_ANALOGWATCHDOG_NONE */ ARM GAS /tmp/ccsErhU4.s page 193 3140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_SetAnalogWDMonitChannels(hadc->Instance, AnalogWDGConfig->WatchdogNumber, LL_ADC_A 3141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2) 3145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state, clear previous result related to AWD2 */ 3147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD2); 3148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear flag ADC analog watchdog */ 3150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Flag cleared Clear the ADC Analog watchdog flag to be ready */ 3151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to use for HAL_ADC_IRQHandler() or HAL_ADC_PollForEvent() */ 3152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (in case left enabled by previous ADC operations). */ 3153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_ClearFlag_AWD2(hadc->Instance); 3154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configure ADC analog watchdog interrupt */ 3156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->ITMode == ENABLE) 3157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_EnableIT_AWD2(hadc->Instance); 3159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_DisableIT_AWD2(hadc->Instance); 3163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_3) */ 3166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state, clear previous result related to AWD3 */ 3169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD3); 3170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear flag ADC analog watchdog */ 3172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Flag cleared Clear the ADC Analog watchdog flag to be ready */ 3173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to use for HAL_ADC_IRQHandler() or HAL_ADC_PollForEvent() */ 3174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (in case left enabled by previous ADC operations). */ 3175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_ClearFlag_AWD3(hadc->Instance); 3176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Configure ADC analog watchdog interrupt */ 3178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->ITMode == ENABLE) 3179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_EnableIT_AWD3(hadc->Instance); 3181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_DisableIT_AWD3(hadc->Instance); 3185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Analog watchdog thresholds configuration */ 3192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1) 3193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Shift the offset with respect to the selected ADC resolution: */ 3195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Thresholds have to be left-aligned on bit 11, the LSB (right bits) */ 3196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* are set to 0. */ ARM GAS /tmp/ccsErhU4.s page 194 3197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre 3198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres 3199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */ 3201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Shift the offset with respect to the selected ADC resolution: */ 3204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Thresholds have to be left-aligned on bit 7, the LSB (right bits) */ 3205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* are set to 0. */ 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThr 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 3208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC analog watchdog thresholds value of both thresholds high and low */ 3211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_ConfigAnalogWDThresholds(hadc->Instance, AnalogWDGConfig->WatchdogNumber, tmpAWDHighThresh 3212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted); 3213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Process unlocked */ 3215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_UNLOCK(hadc); 3216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return function status */ 3218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return tmp_hal_status; 3219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 3224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions 3227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief ADC Peripheral State functions 3228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * 3229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @verbatim 3230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 3231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ##### Peripheral state and errors functions ##### 3232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** =============================================================================== 3233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** [..] 3234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the 3235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** peripheral. 3236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Check the ADC state 3237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (+) Check the ADC error code 3238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** @endverbatim 3240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 3241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Return the ADC handle state. 3245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be 3246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * compared with states bits. 3247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * For example: 3248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_REG_BUSY) != 0UL) " 3249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_AWD1) != 0UL) " 3250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 3251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval ADC handle state (bitfield on 32 bits) 3252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef *hadc) ARM GAS /tmp/ccsErhU4.s page 195 3254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 3256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return ADC handle state */ 3259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return hadc->State; 3260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Return the ADC error code. 3264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 3265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval ADC error code (bitfield on 32 bits) 3266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) 3268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 3270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return hadc->ErrorCode; 3273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 3277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @} 3281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions 3284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @{ 3285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Stop ADC conversion. 3289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 3290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param ConversionGroup ADC group regular and/or injected. 3291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * This parameter can be one of the following values: 3292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_REGULAR_GROUP ADC regular conversion type. 3293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_INJECTED_GROUP ADC injected conversion type. 3294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @arg @ref ADC_REGULAR_INJECTED_GROUP ADC regular and injected conversion type. 3295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 3296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc, uint32_t ConversionGroup) 3298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 3300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t Conversion_Timeout_CPU_cycles = 0UL; 3301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t conversion_group_reassigned = ConversionGroup; 3302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_ADC_CR_ADSTART_JADSTART; 3303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 3305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 3307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); 3309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verification if ADC is not already stopped (on regular and injected */ ARM GAS /tmp/ccsErhU4.s page 196 3311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* groups) to bypass this function if not needed. */ 3312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 3313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 3314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((tmp_adc_is_conversion_on_going_regular != 0UL) 3315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_adc_is_conversion_on_going_injected != 0UL) 3316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 3317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Particular case of continuous auto-injection mode combined with */ 3319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* auto-delay mode. */ 3320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */ 3321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* injected group stop ADC_CR_JADSTP). */ 3322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */ 3323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* (see reference manual). */ 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (((hadc->Instance->CFGR & ADC_CFGR_JAUTO) != 0UL) 3325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 3326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.LowPowerAutoWait == ENABLE) 3327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 3328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Use stop of regular group */ 3330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** conversion_group_reassigned = ADC_REGULAR_GROUP; 3331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */ 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == 0UL) 3334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES * 4UL)) 3336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 3339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 3342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 3344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Conversion_Timeout_CPU_cycles ++; 3346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Clear JEOS */ 3349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS); 3350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Stop potential conversion on going on ADC group regular */ 3353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (conversion_group_reassigned != ADC_INJECTED_GROUP) 3354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ 3356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) 3357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) 3359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Stop ADC group regular conversion */ 3361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_REG_StopConversion(hadc->Instance); 3362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Stop potential conversion on going on ADC group injected */ 3367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (conversion_group_reassigned != ADC_REGULAR_GROUP) ARM GAS /tmp/ccsErhU4.s page 197 3368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */ 3370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 3371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) 3373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Stop ADC group injected conversion */ 3375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_INJ_StopConversion(hadc->Instance); 3376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Selection of start and stop bits with respect to the regular or injected group */ 3381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** switch (conversion_group_reassigned) 3382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_REGULAR_INJECTED_GROUP: 3384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART | ADC_CR_JADSTART); 3385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** case ADC_INJECTED_GROUP: 3387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART; 3388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Case ADC_REGULAR_GROUP only*/ 3390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** default: 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART; 3392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 3393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait for conversion effectively stopped */ 3396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tickstart = HAL_GetTick(); 3397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) 3399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 3401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) 3404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 3407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 3410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 3412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return HAL status */ 3419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 3420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Enable the selected ADC. 3424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled ARM GAS /tmp/ccsErhU4.s page 198 3425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()). 3426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 3427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 3428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc) 3430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 3432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ 3434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */ 3435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ 3436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* causes: ADC clock not running, ...). */ 3437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 3438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */ 3440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->CR & (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JADSTART | ADC_ 653 .loc 1 3440 0 654 0024 9968 ldr r1, [r3, #8] 655 0026 424A ldr r2, .L78+4 656 0028 1142 tst r1, r2 657 002a 41D0 beq .L52 658 .LVL45: 659 .L76: 3441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) 3442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 3445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 3448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 3450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Enable the ADC peripheral */ 3453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_Enable(hadc->Instance); 3454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait for ADC effectively enabled */ 3456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tickstart = HAL_GetTick(); 3457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) 3459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* If ADEN bit is set less than 4 ADC clock cycles after the ADCAL bit 3461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** has been cleared (after a calibration), ADEN bit is reset by the 3462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** calibration logic. 3463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** The workaround is to continue setting ADEN until ADRDY is becomes 1. 3464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this 3465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4 ADC clock cycle duration */ 3466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: Test of ADC enabled required due to hardware constraint to */ 3467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* not enable ADC if already enabled. */ 3468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 3469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_Enable(hadc->Instance); 3471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 3474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 199 3475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) 3477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 660 .loc 1 3479 0 661 002c E36D ldr r3, [r4, #92] 662 002e 43F01003 orr r3, r3, #16 663 0032 E365 str r3, [r4, #92] 3480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 664 .loc 1 3482 0 665 0034 236E ldr r3, [r4, #96] 666 0036 43F00103 orr r3, r3, #1 667 003a 2366 str r3, [r4, #96] 668 .LVL46: 669 .LBE434: 670 .LBE437: 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 671 .loc 1 1342 0 672 003c 0023 movs r3, #0 673 003e 84F85830 strb r3, [r4, #88] 674 0042 0120 movs r0, #1 675 .L74: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 676 .loc 1 1352 0 677 0044 F8BD pop {r3, r4, r5, r6, r7, pc} 678 .LVL47: 679 .L68: 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 680 .loc 1 1347 0 681 0046 0220 movs r0, #2 682 .LVL48: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 683 .loc 1 1352 0 684 0048 F8BD pop {r3, r4, r5, r6, r7, pc} 685 .LVL49: 686 .L51: 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 687 .loc 1 1254 0 688 004a E26D ldr r2, [r4, #92] 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 689 .loc 1 1262 0 690 004c 3949 ldr r1, .L78+8 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 691 .loc 1 1254 0 692 004e 22F47062 bic r2, r2, #3840 693 0052 22F00102 bic r2, r2, #1 694 0056 42F48072 orr r2, r2, #256 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 695 .loc 1 1262 0 696 005a 8B42 cmp r3, r1 697 .LBB438: 698 .LBB415: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 699 .loc 2 6387 0 ARM GAS /tmp/ccsErhU4.s page 200 700 005c 05F01F05 and r5, r5, #31 701 .LBE415: 702 .LBE438: 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 703 .loc 1 1254 0 704 0060 E265 str r2, [r4, #92] 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 705 .loc 1 1262 0 706 0062 44D0 beq .L59 707 0064 1946 mov r1, r3 708 .L65: 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 709 .loc 1 1266 0 710 0066 E26D ldr r2, [r4, #92] 711 0068 22F48012 bic r2, r2, #1048576 712 006c E265 str r2, [r4, #92] 713 .L66: 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 714 .loc 1 1272 0 715 006e E26D ldr r2, [r4, #92] 716 0070 12F48052 ands r2, r2, #4096 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 717 .loc 1 1275 0 718 0074 1CBF itt ne 719 0076 226E ldrne r2, [r4, #96] 720 0078 22F00602 bicne r2, r2, #6 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 721 .loc 1 1280 0 722 007c 2266 str r2, [r4, #96] 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 723 .loc 1 1285 0 724 007e 1C20 movs r0, #28 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 725 .loc 1 1290 0 726 0080 0022 movs r2, #0 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 727 .loc 1 1301 0 728 0082 8B42 cmp r3, r1 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 729 .loc 1 1285 0 730 0084 1860 str r0, [r3] 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 731 .loc 1 1290 0 732 0086 84F85820 strb r2, [r4, #88] 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 733 .loc 1 1301 0 734 008a 3BD0 beq .L62 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 735 .loc 1 1302 0 736 008c 092D cmp r5, #9 737 008e 33D9 bls .L77 738 .L63: 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* if Master ADC JAUTO bit is set, update Slave State in setting 739 .loc 1 1319 0 740 0090 E36D ldr r3, [r4, #92] 741 0092 43F48013 orr r3, r3, #1048576 742 0096 E365 str r3, [r4, #92] ARM GAS /tmp/ccsErhU4.s page 201 743 .LVL50: 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 744 .loc 1 1323 0 745 0098 C868 ldr r0, [r1, #12] 746 009a 10F00070 ands r0, r0, #33554432 747 009e D1D0 beq .L74 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 748 .loc 1 1325 0 749 00a0 E36D ldr r3, [r4, #92] 750 00a2 23F44053 bic r3, r3, #12288 751 00a6 43F48053 orr r3, r3, #4096 752 00aa E365 str r3, [r4, #92] 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 753 .loc 1 1246 0 754 00ac 0020 movs r0, #0 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 755 .loc 1 1352 0 756 00ae F8BD pop {r3, r4, r5, r6, r7, pc} 757 .LVL51: 758 .L52: 759 .LBB439: 760 .LBB435: 761 .LBB427: 762 .LBB428: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 763 .loc 2 6688 0 764 00b0 9A68 ldr r2, [r3, #8] 765 00b2 214F ldr r7, .L78+12 766 00b4 3A40 ands r2, r2, r7 767 00b6 42F00102 orr r2, r2, #1 768 00ba 9A60 str r2, [r3, #8] 769 .LVL52: 770 .LBE428: 771 .LBE427: 3456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 772 .loc 1 3456 0 773 00bc FFF7FEFF bl HAL_GetTick 774 .LVL53: 775 00c0 2368 ldr r3, [r4] 776 00c2 0646 mov r6, r0 777 .LVL54: 778 .L54: 3458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 779 .loc 1 3458 0 780 00c4 1A68 ldr r2, [r3] 781 00c6 D207 lsls r2, r2, #31 782 00c8 BFD4 bmi .L51 783 .LBB429: 784 .LBB430: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 785 .loc 2 6724 0 786 00ca 9A68 ldr r2, [r3, #8] 787 00cc D007 lsls r0, r2, #31 788 00ce 04D4 bmi .L55 789 .LBE430: 790 .LBE429: 791 .LBB431: ARM GAS /tmp/ccsErhU4.s page 202 792 .LBB432: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 793 .loc 2 6688 0 794 00d0 9A68 ldr r2, [r3, #8] 795 00d2 3A40 ands r2, r2, r7 796 00d4 42F00102 orr r2, r2, #1 797 00d8 9A60 str r2, [r3, #8] 798 .L55: 799 .LBE432: 800 .LBE431: 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 801 .loc 1 3473 0 802 00da FFF7FEFF bl HAL_GetTick 803 .LVL55: 804 00de 801B subs r0, r0, r6 805 00e0 0228 cmp r0, #2 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 806 .loc 1 3476 0 807 00e2 2368 ldr r3, [r4] 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 808 .loc 1 3473 0 809 00e4 EED9 bls .L54 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 810 .loc 1 3476 0 811 00e6 1A68 ldr r2, [r3] 812 00e8 D107 lsls r1, r2, #31 813 00ea EBD4 bmi .L54 814 00ec 9EE7 b .L76 815 .LVL56: 816 .L59: 817 .LBE435: 818 .LBE439: 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 819 .loc 1 1262 0 820 00ee 4FF0A041 mov r1, #1342177280 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 821 .loc 1 1263 0 822 00f2 002D cmp r5, #0 823 00f4 B7D0 beq .L65 824 00f6 BAE7 b .L66 825 .L77: 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 826 .loc 1 1302 0 827 00f8 40F22122 movw r2, #545 828 00fc 22FA05F5 lsr r5, r2, r5 829 0100 E807 lsls r0, r5, #31 830 0102 C5D5 bpl .L63 831 .L62: 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 832 .loc 1 1308 0 833 0104 DA68 ldr r2, [r3, #12] 834 0106 9201 lsls r2, r2, #6 835 0108 05D5 bpl .L64 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 836 .loc 1 1310 0 837 010a E26D ldr r2, [r4, #92] 838 010c 22F44052 bic r2, r2, #12288 ARM GAS /tmp/ccsErhU4.s page 203 839 0110 42F48052 orr r2, r2, #4096 840 0114 E265 str r2, [r4, #92] 841 .L64: 842 .LVL57: 843 .LBB440: 844 .LBB441: 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 845 .loc 2 6813 0 846 0116 9A68 ldr r2, [r3, #8] 847 0118 22F00042 bic r2, r2, #-2147483648 848 011c 22F03F02 bic r2, r2, #63 849 0120 42F00402 orr r2, r2, #4 850 0124 9A60 str r2, [r3, #8] 851 .LBE441: 852 .LBE440: 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 853 .loc 1 1246 0 854 0126 0020 movs r0, #0 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 855 .loc 1 1352 0 856 0128 F8BD pop {r3, r4, r5, r6, r7, pc} 857 .LVL58: 858 .L79: 859 012a 00BF .align 2 860 .L78: 861 012c 00030050 .word 1342178048 862 0130 3F000080 .word -2147483585 863 0134 00010050 .word 1342177536 864 0138 C0FFFF7F .word 2147483584 865 .cfi_endproc 866 .LFE333: 868 .section .text.HAL_ADC_Stop,"ax",%progbits 869 .align 1 870 .p2align 2,,3 871 .global HAL_ADC_Stop 872 .syntax unified 873 .thumb 874 .thumb_func 875 .fpu fpv4-sp-d16 877 HAL_ADC_Stop: 878 .LFB334: 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 879 .loc 1 1364 0 880 .cfi_startproc 881 @ args = 0, pretend = 0, frame = 0 882 @ frame_needed = 0, uses_anonymous_args = 0 883 .LVL59: 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 884 .loc 1 1371 0 885 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 886 0004 012B cmp r3, #1 887 0006 4DD0 beq .L113 888 .LBB468: 889 .LBB469: 3312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 890 .loc 1 3312 0 discriminator 2 891 0008 0368 ldr r3, [r0] ARM GAS /tmp/ccsErhU4.s page 204 892 .LBB470: 893 .LBB471: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 894 .loc 2 6846 0 discriminator 2 895 000a 9A68 ldr r2, [r3, #8] 896 .LBE471: 897 .LBE470: 898 .LBE469: 899 .LBE468: 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 900 .loc 1 1364 0 discriminator 2 901 000c 70B5 push {r4, r5, r6, lr} 902 .LCFI9: 903 .cfi_def_cfa_offset 16 904 .cfi_offset 4, -16 905 .cfi_offset 5, -12 906 .cfi_offset 6, -8 907 .cfi_offset 14, -4 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 908 .loc 1 1371 0 discriminator 2 909 000e 0121 movs r1, #1 910 .LBB509: 911 .LBB504: 912 .LBB474: 913 .LBB472: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 914 .loc 2 6846 0 discriminator 2 915 0010 5607 lsls r6, r2, #29 916 0012 0446 mov r4, r0 917 .LBE472: 918 .LBE474: 919 .LBE504: 920 .LBE509: 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 921 .loc 1 1371 0 discriminator 2 922 0014 80F85810 strb r1, [r0, #88] 923 .LVL60: 924 .LBB510: 925 .LBB505: 926 .LBB475: 927 .LBB473: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 928 .loc 2 6846 0 discriminator 2 929 0018 30D5 bpl .L138 930 .LVL61: 931 .LBE473: 932 .LBE475: 933 .LBB476: 934 .LBB477: 935 .loc 2 7071 0 936 001a 9A68 ldr r2, [r3, #8] 937 .LVL62: 938 .L106: 939 .LBE477: 940 .LBE476: 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 941 .loc 1 3324 0 ARM GAS /tmp/ccsErhU4.s page 205 942 001c DA68 ldr r2, [r3, #12] 943 001e 9501 lsls r5, r2, #6 944 0020 04D5 bpl .L84 3326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 945 .loc 1 3326 0 946 0022 A18B ldrh r1, [r4, #28] 947 0024 40F20112 movw r2, #257 948 0028 9142 cmp r1, r2 949 002a 76D0 beq .L139 950 .L84: 951 .LVL63: 952 .LBB479: 953 .LBB480: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 954 .loc 2 6846 0 955 002c 9A68 ldr r2, [r3, #8] 956 002e 12F0040F tst r2, #4 957 .LBE480: 958 .LBE479: 959 .LBB483: 960 .LBB484: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 961 .loc 2 6735 0 962 0032 9A68 ldr r2, [r3, #8] 963 .LBE484: 964 .LBE483: 965 .LBB487: 966 .LBB481: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 967 .loc 2 6846 0 968 0034 02D0 beq .L137 969 .LVL64: 970 .LBE481: 971 .LBE487: 972 .LBB488: 973 .LBB485: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 974 .loc 2 6735 0 975 0036 9107 lsls r1, r2, #30 976 0038 42D5 bpl .L140 977 .LVL65: 978 .LBE485: 979 .LBE488: 980 .LBB489: 981 .LBB490: 982 .loc 2 7071 0 983 003a 9A68 ldr r2, [r3, #8] 984 .LVL66: 985 .L137: 986 003c 1607 lsls r6, r2, #28 987 003e 33D4 bmi .L141 988 .L92: 989 .LBE490: 990 .LBE489: 3384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 991 .loc 1 3384 0 992 0040 0C25 movs r5, #12 ARM GAS /tmp/ccsErhU4.s page 206 993 .LVL67: 994 .L90: 3396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 995 .loc 1 3396 0 996 0042 FFF7FEFF bl HAL_GetTick 997 .LVL68: 998 0046 2368 ldr r3, [r4] 999 0048 0646 mov r6, r0 1000 .LVL69: 1001 .L93: 3398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1002 .loc 1 3398 0 1003 004a 9A68 ldr r2, [r3, #8] 1004 004c 1542 tst r5, r2 1005 004e 18D0 beq .L107 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1006 .loc 1 3400 0 1007 0050 FFF7FEFF bl HAL_GetTick 1008 .LVL70: 1009 0054 801B subs r0, r0, r6 1010 0056 0528 cmp r0, #5 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1011 .loc 1 3403 0 1012 0058 2368 ldr r3, [r4] 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1013 .loc 1 3400 0 1014 005a F6D9 bls .L93 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1015 .loc 1 3403 0 1016 005c 9A68 ldr r2, [r3, #8] 1017 005e 2A42 tst r2, r5 1018 0060 F3D0 beq .L93 1019 .LVL71: 1020 .L136: 1021 .LBE505: 1022 .LBE510: 1023 .LBB511: 1024 .LBB512: 3483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 3485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return HAL status */ 3491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 3492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief Disable the selected ADC. 3496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be 3497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * stopped. 3498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hadc ADC handle 3499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval HAL status. 3500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc) ARM GAS /tmp/ccsErhU4.s page 207 3502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 3504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** const uint32_t tmp_adc_is_disable_on_going = LL_ADC_IsDisableOngoing(hadc->Instance); 3505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Verification if ADC is not already disabled: */ 3507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ 3508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* disabled. */ 3509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) 3510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (tmp_adc_is_disable_on_going == 0UL) 3511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 3512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */ 3514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->CR & (ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN) 3515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Disable the ADC peripheral */ 3517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** LL_ADC_Disable(hadc->Instance); 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); 3519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 3524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 3527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 3529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Wait for ADC effectively disabled */ 3532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Get tick count */ 3533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tickstart = HAL_GetTick(); 3534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) 3536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 3538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) 3541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update ADC state machine to error */ 3543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1025 .loc 1 3543 0 1026 0062 E36D ldr r3, [r4, #92] 1027 0064 43F01003 orr r3, r3, #16 1028 0068 E365 str r3, [r4, #92] 3544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to ADC peripheral internal error */ 3546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 1029 .loc 1 3546 0 1030 006a 236E ldr r3, [r4, #96] 1031 006c 43F00103 orr r3, r3, #1 1032 0070 2366 str r3, [r4, #96] 1033 .LBE512: 1034 .LBE511: 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1035 .loc 1 1393 0 ARM GAS /tmp/ccsErhU4.s page 208 1036 0072 0023 movs r3, #0 1037 .LBB526: 1038 .LBB523: 3547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 1039 .loc 1 3548 0 1040 0074 0120 movs r0, #1 1041 .LVL72: 1042 .LBE523: 1043 .LBE526: 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1044 .loc 1 1393 0 1045 0076 84F85830 strb r3, [r4, #88] 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1046 .loc 1 1397 0 1047 007a 70BD pop {r4, r5, r6, pc} 1048 .LVL73: 1049 .L138: 1050 .LBB527: 1051 .LBB506: 1052 .LBB492: 1053 .LBB478: 1054 .loc 2 7071 0 1055 007c 9A68 ldr r2, [r3, #8] 1056 007e 1007 lsls r0, r2, #28 1057 .LVL74: 1058 0080 CCD4 bmi .L106 1059 .LVL75: 1060 .L107: 1061 .LBE478: 1062 .LBE492: 1063 .LBE506: 1064 .LBE527: 1065 .LBB528: 1066 .LBB524: 1067 .LBB513: 1068 .LBB514: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1069 .loc 2 6735 0 1070 0082 9A68 ldr r2, [r3, #8] 1071 0084 9007 lsls r0, r2, #30 1072 0086 25D5 bpl .L142 1073 .LVL76: 1074 .LBE514: 1075 .LBE513: 1076 .LBB515: 1077 .LBB516: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1078 .loc 2 6724 0 1079 0088 9B68 ldr r3, [r3, #8] 1080 .LVL77: 1081 .L99: 1082 .LBE516: 1083 .LBE515: 1084 .LBE524: 1085 .LBE528: 1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, ARM GAS /tmp/ccsErhU4.s page 209 1086 .loc 1 1386 0 1087 008a E36D ldr r3, [r4, #92] 1088 008c 23F48853 bic r3, r3, #4352 1089 0090 23F00103 bic r3, r3, #1 1090 0094 43F00103 orr r3, r3, #1 1091 0098 E365 str r3, [r4, #92] 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1092 .loc 1 1393 0 1093 009a 0023 movs r3, #0 1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1094 .loc 1 1380 0 1095 009c 0020 movs r0, #0 1096 .LVL78: 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1097 .loc 1 1393 0 1098 009e 84F85830 strb r3, [r4, #88] 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1099 .loc 1 1397 0 1100 00a2 70BD pop {r4, r5, r6, pc} 1101 .LVL79: 1102 .L113: 1103 .LCFI10: 1104 .cfi_def_cfa_offset 0 1105 .cfi_restore 4 1106 .cfi_restore 5 1107 .cfi_restore 6 1108 .cfi_restore 14 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1109 .loc 1 1371 0 1110 00a4 0220 movs r0, #2 1111 .LVL80: 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1112 .loc 1 1397 0 1113 00a6 7047 bx lr 1114 .LVL81: 1115 .L141: 1116 .LCFI11: 1117 .cfi_def_cfa_offset 16 1118 .cfi_offset 4, -16 1119 .cfi_offset 5, -12 1120 .cfi_offset 6, -8 1121 .cfi_offset 14, -4 1122 .LBB529: 1123 .LBB507: 1124 .LBB493: 1125 .LBB494: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1126 .loc 2 6735 0 1127 00a8 9A68 ldr r2, [r3, #8] 1128 00aa 9507 lsls r5, r2, #30 1129 00ac C8D4 bmi .L92 1130 .LVL82: 1131 .LBE494: 1132 .LBE493: 1133 .LBB495: 1134 .LBB496: 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, ARM GAS /tmp/ccsErhU4.s page 210 1135 .loc 2 7058 0 1136 00ae 9A68 ldr r2, [r3, #8] 1137 00b0 22F00042 bic r2, r2, #-2147483648 1138 00b4 22F03F02 bic r2, r2, #63 1139 00b8 42F02002 orr r2, r2, #32 1140 00bc 9A60 str r2, [r3, #8] 1141 00be BFE7 b .L92 1142 .LVL83: 1143 .L140: 1144 .LBE496: 1145 .LBE495: 1146 .LBB497: 1147 .LBB498: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1148 .loc 2 6833 0 1149 00c0 9A68 ldr r2, [r3, #8] 1150 00c2 22F00042 bic r2, r2, #-2147483648 1151 00c6 22F03F02 bic r2, r2, #63 1152 00ca 42F01002 orr r2, r2, #16 1153 00ce 9A60 str r2, [r3, #8] 1154 .LVL84: 1155 .LBE498: 1156 .LBE497: 1157 .LBB500: 1158 .LBB491: 1159 .loc 2 7071 0 1160 00d0 9A68 ldr r2, [r3, #8] 1161 00d2 B3E7 b .L137 1162 .LVL85: 1163 .L142: 1164 .LBE491: 1165 .LBE500: 1166 .LBE507: 1167 .LBE529: 1168 .LBB530: 1169 .LBB525: 1170 .LBB518: 1171 .LBB517: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1172 .loc 2 6724 0 1173 00d4 9A68 ldr r2, [r3, #8] 1174 00d6 D107 lsls r1, r2, #31 1175 00d8 D7D5 bpl .L99 1176 .LVL86: 1177 .LBE517: 1178 .LBE518: 3514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1179 .loc 1 3514 0 1180 00da 9A68 ldr r2, [r3, #8] 1181 00dc 02F00D02 and r2, r2, #13 1182 00e0 012A cmp r2, #1 1183 00e2 BED1 bne .L136 1184 .LVL87: 1185 .LBB519: 1186 .LBB520: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1187 .loc 2 6708 0 ARM GAS /tmp/ccsErhU4.s page 211 1188 00e4 9A68 ldr r2, [r3, #8] 1189 00e6 22F00042 bic r2, r2, #-2147483648 1190 00ea 22F03F02 bic r2, r2, #63 1191 00ee 42F00202 orr r2, r2, #2 1192 .LBE520: 1193 .LBE519: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1194 .loc 1 3518 0 1195 00f2 0321 movs r1, #3 1196 .LBB522: 1197 .LBB521: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1198 .loc 2 6708 0 1199 00f4 9A60 str r2, [r3, #8] 1200 .LVL88: 1201 .LBE521: 1202 .LBE522: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1203 .loc 1 3518 0 1204 00f6 1960 str r1, [r3] 3533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1205 .loc 1 3533 0 1206 00f8 FFF7FEFF bl HAL_GetTick 1207 .LVL89: 1208 00fc 2368 ldr r3, [r4] 1209 00fe 0546 mov r5, r0 1210 .LVL90: 1211 .L101: 3535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1212 .loc 1 3535 0 1213 0100 9B68 ldr r3, [r3, #8] 1214 0102 DE07 lsls r6, r3, #31 1215 0104 C1D5 bpl .L99 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1216 .loc 1 3537 0 1217 0106 FFF7FEFF bl HAL_GetTick 1218 .LVL91: 1219 010a 401B subs r0, r0, r5 1220 010c 0228 cmp r0, #2 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1221 .loc 1 3540 0 1222 010e 2368 ldr r3, [r4] 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1223 .loc 1 3537 0 1224 0110 F6D9 bls .L101 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1225 .loc 1 3540 0 1226 0112 9A68 ldr r2, [r3, #8] 1227 0114 D207 lsls r2, r2, #31 1228 0116 F3D5 bpl .L101 1229 0118 A3E7 b .L136 1230 .LVL92: 1231 .L139: 1232 .LBE525: 1233 .LBE530: 1234 .LBB531: 1235 .LBB508: ARM GAS /tmp/ccsErhU4.s page 212 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1236 .loc 1 3333 0 1237 011a 1A68 ldr r2, [r3] 1238 011c 5006 lsls r0, r2, #25 1239 011e 06D4 bmi .L86 1240 0120 0C4A ldr r2, .L143 1241 0122 01E0 b .L85 1242 .LVL93: 1243 .L88: 3335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1244 .loc 1 3335 0 1245 0124 013A subs r2, r2, #1 1246 0126 9CD0 beq .L136 1247 .L85: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1248 .loc 1 3333 0 1249 0128 1968 ldr r1, [r3] 1250 012a 4906 lsls r1, r1, #25 1251 012c FAD5 bpl .L88 1252 .L86: 3349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1253 .loc 1 3349 0 1254 012e 4022 movs r2, #64 1255 0130 1A60 str r2, [r3] 1256 .LVL94: 1257 .LBB501: 1258 .LBB482: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1259 .loc 2 6846 0 1260 0132 9A68 ldr r2, [r3, #8] 1261 0134 5207 lsls r2, r2, #29 1262 0136 01D4 bmi .L89 1263 .LVL95: 1264 .L91: 1265 .LBE482: 1266 .LBE501: 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1267 .loc 1 3391 0 1268 0138 0425 movs r5, #4 1269 013a 82E7 b .L90 1270 .LVL96: 1271 .L89: 1272 .LBB502: 1273 .LBB486: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1274 .loc 2 6735 0 1275 013c 9A68 ldr r2, [r3, #8] 1276 013e 9207 lsls r2, r2, #30 1277 0140 FAD4 bmi .L91 1278 .LVL97: 1279 .LBE486: 1280 .LBE502: 1281 .LBB503: 1282 .LBB499: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1283 .loc 2 6833 0 1284 0142 9A68 ldr r2, [r3, #8] ARM GAS /tmp/ccsErhU4.s page 213 1285 0144 22F00042 bic r2, r2, #-2147483648 1286 0148 22F03F02 bic r2, r2, #63 1287 014c 42F01002 orr r2, r2, #16 1288 0150 9A60 str r2, [r3, #8] 1289 0152 F1E7 b .L91 1290 .L144: 1291 .align 2 1292 .L143: 1293 0154 000040A3 .word -1556086784 1294 .LBE499: 1295 .LBE503: 1296 .LBE508: 1297 .LBE531: 1298 .cfi_endproc 1299 .LFE334: 1301 .section .text.HAL_ADC_PollForConversion,"ax",%progbits 1302 .align 1 1303 .p2align 2,,3 1304 .global HAL_ADC_PollForConversion 1305 .syntax unified 1306 .thumb 1307 .thumb_func 1308 .fpu fpv4-sp-d16 1310 HAL_ADC_PollForConversion: 1311 .LFB335: 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1312 .loc 1 1418 0 1313 .cfi_startproc 1314 @ args = 0, pretend = 0, frame = 0 1315 @ frame_needed = 0, uses_anonymous_args = 0 1316 .LVL98: 1317 .LBB532: 1318 .LBB533: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1319 .loc 2 6387 0 1320 0000 3E4B ldr r3, .L180 1321 .LBE533: 1322 .LBE532: 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1323 .loc 1 1418 0 1324 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} 1325 .LCFI12: 1326 .cfi_def_cfa_offset 24 1327 .cfi_offset 4, -24 1328 .cfi_offset 5, -20 1329 .cfi_offset 6, -16 1330 .cfi_offset 7, -12 1331 .cfi_offset 8, -8 1332 .cfi_offset 14, -4 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1333 .loc 1 1431 0 1334 0006 8469 ldr r4, [r0, #24] 1335 .LBB536: 1336 .LBB534: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1337 .loc 2 6387 0 1338 0008 9F68 ldr r7, [r3, #8] ARM GAS /tmp/ccsErhU4.s page 214 1339 .LBE534: 1340 .LBE536: 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1341 .loc 1 1431 0 1342 000a 082C cmp r4, #8 1343 .LBB537: 1344 .LBB535: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1345 .loc 2 6387 0 1346 000c 07F01F07 and r7, r7, #31 1347 .LVL99: 1348 .LBE535: 1349 .LBE537: 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1350 .loc 1 1431 0 1351 0010 0BD0 beq .L146 1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1352 .loc 1 1445 0 1353 0012 092F cmp r7, #9 1354 0014 4FD8 bhi .L147 1355 0016 40F22123 movw r3, #545 1356 001a FB40 lsrs r3, r3, r7 1357 001c DC07 lsls r4, r3, #31 1358 001e 4AD5 bpl .L147 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1359 .loc 1 1451 0 1360 0020 0368 ldr r3, [r0] 1361 0022 DB68 ldr r3, [r3, #12] 1362 0024 DA07 lsls r2, r3, #31 1363 0026 4BD4 bmi .L176 1364 .L167: 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1365 .loc 1 1458 0 1366 0028 0424 movs r4, #4 1367 .L146: 1368 002a 0646 mov r6, r0 1369 .LVL100: 1370 002c 0D46 mov r5, r1 1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1371 .loc 1 1489 0 1372 002e FFF7FEFF bl HAL_GetTick 1373 .LVL101: 1374 0032 3268 ldr r2, [r6] 1375 0034 8046 mov r8, r0 1376 .LVL102: 1377 .L149: 1378 0036 6B1C adds r3, r5, #1 1379 0038 28D1 bne .L153 1380 .L154: 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1381 .loc 1 1492 0 1382 003a 1368 ldr r3, [r2] 1383 003c 1C42 tst r4, r3 1384 003e FCD0 beq .L154 1385 .L155: 1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1386 .loc 1 1515 0 ARM GAS /tmp/ccsErhU4.s page 215 1387 0040 F36D ldr r3, [r6, #92] 1388 0042 43F40073 orr r3, r3, #512 1389 0046 F365 str r3, [r6, #92] 1390 .LVL103: 1391 .LBB538: 1392 .LBB539: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1393 .loc 2 3750 0 1394 0048 D368 ldr r3, [r2, #12] 1395 004a 13F4406F tst r3, #3072 1396 004e 0FD1 bne .L158 1397 .LBE539: 1398 .LBE538: 1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 1399 .loc 1 1520 0 1400 0050 737F ldrb r3, [r6, #29] @ zero_extendqisi2 1401 0052 6BB9 cbnz r3, .L158 1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1402 .loc 1 1524 0 1403 0054 1368 ldr r3, [r2] 1404 0056 1807 lsls r0, r3, #28 1405 0058 0AD5 bpl .L158 1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1406 .loc 1 1527 0 1407 005a F36D ldr r3, [r6, #92] 1408 005c 23F48073 bic r3, r3, #256 1409 0060 F365 str r3, [r6, #92] 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1410 .loc 1 1529 0 1411 0062 F36D ldr r3, [r6, #92] 1412 0064 D904 lsls r1, r3, #19 1413 0066 03D4 bmi .L158 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1414 .loc 1 1531 0 1415 0068 F36D ldr r3, [r6, #92] 1416 006a 43F00103 orr r3, r3, #1 1417 006e F365 str r3, [r6, #92] 1418 .L158: 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1419 .loc 1 1540 0 1420 0070 234B ldr r3, .L180+4 1421 0072 9A42 cmp r2, r3 1422 0074 31D0 beq .L160 1423 .L164: 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1424 .loc 1 1547 0 1425 0076 D068 ldr r0, [r2, #12] 1426 .LVL104: 1427 .L161: 1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1428 .loc 1 1561 0 1429 0078 082C cmp r4, #8 1430 007a 3BD0 beq .L177 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1431 .loc 1 1570 0 1432 007c 10F48040 ands r0, r0, #16384 1433 .LVL105: ARM GAS /tmp/ccsErhU4.s page 216 1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1434 .loc 1 1572 0 1435 0080 06BF itte eq 1436 0082 0C23 moveq r3, #12 1437 0084 1360 streq r3, [r2] 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1438 .loc 1 1577 0 1439 0086 0020 movne r0, #0 1440 .L174: 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1441 .loc 1 1578 0 1442 0088 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 1443 .LVL106: 1444 .L153: 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1445 .loc 1 1492 0 1446 008c 1368 ldr r3, [r2] 1447 008e 2342 tst r3, r4 1448 0090 D6D1 bne .L155 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1449 .loc 1 1497 0 1450 0092 FFF7FEFF bl HAL_GetTick 1451 .LVL107: 1452 0096 A0EB0800 sub r0, r0, r8 1453 009a A842 cmp r0, r5 1454 009c 3268 ldr r2, [r6] 1455 009e 16D9 bls .L150 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1456 .loc 1 1500 0 1457 00a0 1368 ldr r3, [r2] 1458 00a2 2340 ands r3, r3, r4 1459 00a4 C7D1 bne .L149 1460 .L178: 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1461 .loc 1 1503 0 1462 00a6 F26D ldr r2, [r6, #92] 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1463 .loc 1 1506 0 1464 00a8 86F85830 strb r3, [r6, #88] 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1465 .loc 1 1503 0 1466 00ac 42F00402 orr r2, r2, #4 1467 00b0 F265 str r2, [r6, #92] 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1468 .loc 1 1508 0 1469 00b2 0320 movs r0, #3 1470 00b4 E8E7 b .L174 1471 .LVL108: 1472 .L147: 1473 .LBB540: 1474 .LBB541: 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1475 .loc 2 6484 0 1476 00b6 114B ldr r3, .L180 1477 00b8 9B68 ldr r3, [r3, #8] 1478 .LVL109: 1479 .LBE541: ARM GAS /tmp/ccsErhU4.s page 217 1480 .LBE540: 1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1481 .loc 1 1464 0 1482 00ba 13F4604F tst r3, #57344 1483 00be B3D0 beq .L167 1484 .L176: 1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_ERROR; 1485 .loc 1 1466 0 1486 00c0 C36D ldr r3, [r0, #92] 1487 00c2 43F02003 orr r3, r3, #32 1488 00c6 C365 str r3, [r0, #92] 1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1489 .loc 1 1467 0 1490 00c8 0120 movs r0, #1 1491 .LVL110: 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1492 .loc 1 1578 0 1493 00ca BDE8F081 pop {r4, r5, r6, r7, r8, pc} 1494 .LVL111: 1495 .L150: 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1496 .loc 1 1497 0 discriminator 1 1497 00ce 002D cmp r5, #0 1498 00d0 B1D1 bne .L149 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1499 .loc 1 1500 0 1500 00d2 1368 ldr r3, [r2] 1501 00d4 2340 ands r3, r3, r4 1502 00d6 AED1 bne .L149 1503 00d8 E5E7 b .L178 1504 .L160: 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1505 .loc 1 1541 0 1506 00da 092F cmp r7, #9 1507 00dc 03D9 bls .L179 1508 .L163: 1509 .LVL112: 1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1510 .loc 1 1553 0 discriminator 4 1511 00de 4FF0A043 mov r3, #1342177280 1512 00e2 D868 ldr r0, [r3, #12] 1513 .LVL113: 1514 00e4 C8E7 b .L161 1515 .LVL114: 1516 .L179: 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1517 .loc 1 1541 0 1518 00e6 40F22123 movw r3, #545 1519 00ea 23FA07F7 lsr r7, r3, r7 1520 00ee FB07 lsls r3, r7, #31 1521 00f0 C1D4 bmi .L164 1522 00f2 F4E7 b .L163 1523 .LVL115: 1524 .L177: 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1525 .loc 1 1563 0 1526 00f4 1460 str r4, [r2] ARM GAS /tmp/ccsErhU4.s page 218 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1527 .loc 1 1577 0 1528 00f6 0020 movs r0, #0 1529 .LVL116: 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1530 .loc 1 1578 0 1531 00f8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 1532 .LVL117: 1533 .L181: 1534 .align 2 1535 .L180: 1536 00fc 00030050 .word 1342178048 1537 0100 00010050 .word 1342177536 1538 .cfi_endproc 1539 .LFE335: 1541 .section .text.HAL_ADC_PollForEvent,"ax",%progbits 1542 .align 1 1543 .p2align 2,,3 1544 .global HAL_ADC_PollForEvent 1545 .syntax unified 1546 .thumb 1547 .thumb_func 1548 .fpu fpv4-sp-d16 1550 HAL_ADC_PollForEvent: 1551 .LFB336: 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1552 .loc 1 1601 0 1553 .cfi_startproc 1554 @ args = 0, pretend = 0, frame = 0 1555 @ frame_needed = 0, uses_anonymous_args = 0 1556 .LVL118: 1557 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 1558 .LCFI13: 1559 .cfi_def_cfa_offset 24 1560 .cfi_offset 3, -24 1561 .cfi_offset 4, -20 1562 .cfi_offset 5, -16 1563 .cfi_offset 6, -12 1564 .cfi_offset 7, -8 1565 .cfi_offset 14, -4 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 1566 .loc 1 1601 0 1567 0002 0546 mov r5, r0 1568 0004 0C46 mov r4, r1 1569 0006 1646 mov r6, r2 1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1570 .loc 1 1609 0 1571 0008 FFF7FEFF bl HAL_GetTick 1572 .LVL119: 1573 000c 2968 ldr r1, [r5] 1574 000e 0746 mov r7, r0 1575 .LVL120: 1576 .L183: 1577 0010 731C adds r3, r6, #1 1578 0012 12D1 bne .L188 1579 .L189: 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 219 1580 .loc 1 1612 0 1581 0014 0B68 ldr r3, [r1] 1582 0016 34EA0303 bics r3, r4, r3 1583 001a FBD1 bne .L189 1584 .L190: 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1585 .loc 1 1634 0 1586 001c B4F5807F cmp r4, #256 1587 0020 4ED0 beq .L193 1588 0022 28D8 bhi .L194 1589 0024 022C cmp r4, #2 1590 0026 3DD0 beq .L195 1591 0028 802C cmp r4, #128 1592 002a 35D1 bne .L192 1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1593 .loc 1 1658 0 1594 002c EB6D ldr r3, [r5, #92] 1595 002e 43F48033 orr r3, r3, #65536 1596 0032 EB65 str r3, [r5, #92] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1597 .loc 1 1723 0 1598 0034 0020 movs r0, #0 1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1599 .loc 1 1661 0 1600 0036 0C60 str r4, [r1] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1601 .loc 1 1724 0 1602 0038 F8BD pop {r3, r4, r5, r6, r7, pc} 1603 .LVL121: 1604 .L188: 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1605 .loc 1 1612 0 1606 003a 0B68 ldr r3, [r1] 1607 003c 34EA0303 bics r3, r4, r3 1608 0040 ECD0 beq .L190 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1609 .loc 1 1617 0 1610 0042 FFF7FEFF bl HAL_GetTick 1611 .LVL122: 1612 0046 C01B subs r0, r0, r7 1613 0048 B042 cmp r0, r6 1614 004a 2968 ldr r1, [r5] 1615 004c 0CD9 bls .L184 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1616 .loc 1 1620 0 1617 004e 0B68 ldr r3, [r1] 1618 0050 34EA0303 bics r3, r4, r3 1619 0054 DCD0 beq .L183 1620 .L202: 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1621 .loc 1 1623 0 1622 0056 EB6D ldr r3, [r5, #92] 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1623 .loc 1 1626 0 1624 0058 0022 movs r2, #0 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1625 .loc 1 1623 0 ARM GAS /tmp/ccsErhU4.s page 220 1626 005a 43F00403 orr r3, r3, #4 1627 005e EB65 str r3, [r5, #92] 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1628 .loc 1 1626 0 1629 0060 85F85820 strb r2, [r5, #88] 1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1630 .loc 1 1628 0 1631 0064 0320 movs r0, #3 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1632 .loc 1 1724 0 1633 0066 F8BD pop {r3, r4, r5, r6, r7, pc} 1634 .LVL123: 1635 .L184: 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1636 .loc 1 1617 0 discriminator 1 1637 0068 002E cmp r6, #0 1638 006a D1D1 bne .L183 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1639 .loc 1 1620 0 1640 006c 0B68 ldr r3, [r1] 1641 006e 34EA0303 bics r3, r4, r3 1642 0072 CDD0 beq .L183 1643 0074 EFE7 b .L202 1644 .L194: 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1645 .loc 1 1634 0 1646 0076 B4F5007F cmp r4, #512 1647 007a 1AD0 beq .L197 1648 007c B4F5806F cmp r4, #1024 1649 0080 0AD1 bne .L192 1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1650 .loc 1 1688 0 1651 0082 EB6D ldr r3, [r5, #92] 1652 0084 43F48043 orr r3, r3, #16384 1653 0088 EB65 str r3, [r5, #92] 1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1654 .loc 1 1691 0 1655 008a 2B6E ldr r3, [r5, #96] 1656 008c 43F00803 orr r3, r3, #8 1657 0090 2B66 str r3, [r5, #96] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1658 .loc 1 1723 0 1659 0092 0020 movs r0, #0 1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1660 .loc 1 1694 0 1661 0094 0C60 str r4, [r1] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1662 .loc 1 1724 0 1663 0096 F8BD pop {r3, r4, r5, r6, r7, pc} 1664 .LVL124: 1665 .L192: 1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1666 .loc 1 1704 0 1667 0098 E86B ldr r0, [r5, #60] 1668 009a C0B1 cbz r0, .L203 1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1669 .loc 1 1717 0 ARM GAS /tmp/ccsErhU4.s page 221 1670 009c 1023 movs r3, #16 1671 009e 0B60 str r3, [r1] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1672 .loc 1 1723 0 1673 00a0 0020 movs r0, #0 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1674 .loc 1 1724 0 1675 00a2 F8BD pop {r3, r4, r5, r6, r7, pc} 1676 .LVL125: 1677 .L195: 1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1678 .loc 1 1639 0 1679 00a4 EB6D ldr r3, [r5, #92] 1680 00a6 43F40063 orr r3, r3, #2048 1681 00aa EB65 str r3, [r5, #92] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1682 .loc 1 1723 0 1683 00ac 0020 movs r0, #0 1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1684 .loc 1 1642 0 1685 00ae 0C60 str r4, [r1] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1686 .loc 1 1724 0 1687 00b0 F8BD pop {r3, r4, r5, r6, r7, pc} 1688 .LVL126: 1689 .L197: 1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1690 .loc 1 1678 0 1691 00b2 EB6D ldr r3, [r5, #92] 1692 00b4 43F48023 orr r3, r3, #262144 1693 00b8 EB65 str r3, [r5, #92] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1694 .loc 1 1723 0 1695 00ba 0020 movs r0, #0 1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1696 .loc 1 1681 0 1697 00bc 0C60 str r4, [r1] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1698 .loc 1 1724 0 1699 00be F8BD pop {r3, r4, r5, r6, r7, pc} 1700 .LVL127: 1701 .L193: 1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1702 .loc 1 1668 0 1703 00c0 EB6D ldr r3, [r5, #92] 1704 00c2 43F40033 orr r3, r3, #131072 1705 00c6 EB65 str r3, [r5, #92] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1706 .loc 1 1723 0 1707 00c8 0020 movs r0, #0 1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1708 .loc 1 1671 0 1709 00ca 0C60 str r4, [r1] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1710 .loc 1 1724 0 1711 00cc F8BD pop {r3, r4, r5, r6, r7, pc} 1712 .LVL128: ARM GAS /tmp/ccsErhU4.s page 222 1713 .L203: 1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1714 .loc 1 1707 0 1715 00ce EB6D ldr r3, [r5, #92] 1716 00d0 43F48063 orr r3, r3, #1024 1717 00d4 EB65 str r3, [r5, #92] 1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1718 .loc 1 1710 0 1719 00d6 2B6E ldr r3, [r5, #96] 1720 00d8 43F00203 orr r3, r3, #2 1721 00dc 2B66 str r3, [r5, #96] 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1722 .loc 1 1724 0 1723 00de F8BD pop {r3, r4, r5, r6, r7, pc} 1724 .cfi_endproc 1725 .LFE336: 1727 .section .text.HAL_ADC_Start_IT,"ax",%progbits 1728 .align 1 1729 .p2align 2,,3 1730 .global HAL_ADC_Start_IT 1731 .syntax unified 1732 .thumb 1733 .thumb_func 1734 .fpu fpv4-sp-d16 1736 HAL_ADC_Start_IT: 1737 .LFB337: 1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 1738 .loc 1 1750 0 1739 .cfi_startproc 1740 @ args = 0, pretend = 0, frame = 0 1741 @ frame_needed = 0, uses_anonymous_args = 0 1742 .LVL129: 1743 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 1744 .LCFI14: 1745 .cfi_def_cfa_offset 24 1746 .cfi_offset 3, -24 1747 .cfi_offset 4, -20 1748 .cfi_offset 5, -16 1749 .cfi_offset 6, -12 1750 .cfi_offset 7, -8 1751 .cfi_offset 14, -4 1752 .LBB558: 1753 .LBB559: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1754 .loc 2 6387 0 1755 0002 664A ldr r2, .L244 1756 .LBE559: 1757 .LBE558: 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1758 .loc 1 1761 0 1759 0004 0368 ldr r3, [r0] 1760 .LBB562: 1761 .LBB560: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1762 .loc 2 6387 0 1763 0006 9568 ldr r5, [r2, #8] 1764 .LVL130: ARM GAS /tmp/ccsErhU4.s page 223 1765 .LBE560: 1766 .LBE562: 1767 .LBB563: 1768 .LBB564: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1769 .loc 2 6846 0 1770 0008 9A68 ldr r2, [r3, #8] 1771 000a 5707 lsls r7, r2, #29 1772 000c 1BD4 bmi .L231 1773 .LVL131: 1774 .LBE564: 1775 .LBE563: 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1776 .loc 1 1764 0 1777 000e 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 1778 0012 012A cmp r2, #1 1779 0014 17D0 beq .L231 1780 .LBB565: 1781 .LBB566: 1782 .LBB567: 1783 .LBB568: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1784 .loc 2 6724 0 discriminator 2 1785 0016 9A68 ldr r2, [r3, #8] 1786 .LBE568: 1787 .LBE567: 1788 .LBE566: 1789 .LBE565: 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1790 .loc 1 1764 0 discriminator 2 1791 0018 0121 movs r1, #1 1792 .LBB582: 1793 .LBB579: 1794 .LBB571: 1795 .LBB569: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1796 .loc 2 6724 0 discriminator 2 1797 001a D607 lsls r6, r2, #31 1798 001c 0446 mov r4, r0 1799 .LBE569: 1800 .LBE571: 1801 .LBE579: 1802 .LBE582: 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1803 .loc 1 1764 0 discriminator 2 1804 001e 80F85810 strb r1, [r0, #88] 1805 .LVL132: 1806 .LBB583: 1807 .LBB580: 1808 .LBB572: 1809 .LBB570: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1810 .loc 2 6724 0 discriminator 2 1811 0022 12D4 bmi .L206 1812 .LVL133: 1813 .LBE570: 1814 .LBE572: ARM GAS /tmp/ccsErhU4.s page 224 3440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) 1815 .loc 1 3440 0 1816 0024 9968 ldr r1, [r3, #8] 1817 0026 5E4A ldr r2, .L244+4 1818 0028 1142 tst r1, r2 1819 002a 5ED0 beq .L207 1820 .LVL134: 1821 .L242: 3479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1822 .loc 1 3479 0 1823 002c E36D ldr r3, [r4, #92] 1824 002e 43F01003 orr r3, r3, #16 1825 0032 E365 str r3, [r4, #92] 3482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1826 .loc 1 3482 0 1827 0034 236E ldr r3, [r4, #96] 1828 0036 43F00103 orr r3, r3, #1 1829 003a 2366 str r3, [r4, #96] 1830 .LVL135: 1831 .LBE580: 1832 .LBE583: 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1833 .loc 1 1936 0 1834 003c 0023 movs r3, #0 1835 003e 84F85830 strb r3, [r4, #88] 1836 0042 0120 movs r0, #1 1837 .L239: 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1838 .loc 1 1947 0 1839 0044 F8BD pop {r3, r4, r5, r6, r7, pc} 1840 .LVL136: 1841 .L231: 1942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1842 .loc 1 1942 0 1843 0046 0220 movs r0, #2 1844 .LVL137: 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1845 .loc 1 1947 0 1846 0048 F8BD pop {r3, r4, r5, r6, r7, pc} 1847 .LVL138: 1848 .L206: 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 1849 .loc 1 1775 0 1850 004a E26D ldr r2, [r4, #92] 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1851 .loc 1 1783 0 1852 004c 5549 ldr r1, .L244+8 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 1853 .loc 1 1775 0 1854 004e 22F47062 bic r2, r2, #3840 1855 0052 22F00102 bic r2, r2, #1 1856 0056 42F48072 orr r2, r2, #256 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1857 .loc 1 1783 0 1858 005a 8B42 cmp r3, r1 1859 .LBB584: 1860 .LBB561: ARM GAS /tmp/ccsErhU4.s page 225 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1861 .loc 2 6387 0 1862 005c 05F01F05 and r5, r5, #31 1863 .LBE561: 1864 .LBE584: 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A 1865 .loc 1 1775 0 1866 0060 E265 str r2, [r4, #92] 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1867 .loc 1 1783 0 1868 0062 61D0 beq .L214 1869 0064 1946 mov r1, r3 1870 .L228: 1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1871 .loc 1 1787 0 1872 0066 E26D ldr r2, [r4, #92] 1873 0068 22F48012 bic r2, r2, #1048576 1874 006c E265 str r2, [r4, #92] 1875 .L229: 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1876 .loc 1 1793 0 1877 006e E26D ldr r2, [r4, #92] 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1878 .loc 1 1817 0 1879 0070 A669 ldr r6, [r4, #24] 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1880 .loc 1 1793 0 1881 0072 12F48052 ands r2, r2, #4096 1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1882 .loc 1 1796 0 1883 0076 1CBF itt ne 1884 0078 226E ldrne r2, [r4, #96] 1885 007a 22F00602 bicne r2, r2, #6 1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1886 .loc 1 1801 0 1887 007e 2266 str r2, [r4, #96] 1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1888 .loc 1 1806 0 1889 0080 1C22 movs r2, #28 1890 0082 1A60 str r2, [r3] 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1891 .loc 1 1814 0 1892 0084 5A68 ldr r2, [r3, #4] 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1893 .loc 1 1811 0 1894 0086 0020 movs r0, #0 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1895 .loc 1 1814 0 1896 0088 22F01C02 bic r2, r2, #28 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1897 .loc 1 1811 0 1898 008c 84F85800 strb r0, [r4, #88] 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1899 .loc 1 1814 0 1900 0090 5A60 str r2, [r3, #4] 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1901 .loc 1 1820 0 ARM GAS /tmp/ccsErhU4.s page 226 1902 0092 5A68 ldr r2, [r3, #4] 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1903 .loc 1 1817 0 1904 0094 082E cmp r6, #8 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1905 .loc 1 1820 0 1906 0096 0CBF ite eq 1907 0098 42F00802 orreq r2, r2, #8 1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1908 .loc 1 1824 0 1909 009c 42F00402 orrne r2, r2, #4 1910 00a0 5A60 str r2, [r3, #4] 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1911 .loc 1 1832 0 1912 00a2 E26B ldr r2, [r4, #60] 1913 00a4 1AB9 cbnz r2, .L220 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 1914 .loc 1 1834 0 1915 00a6 5A68 ldr r2, [r3, #4] 1916 00a8 42F01002 orr r2, r2, #16 1917 00ac 5A60 str r2, [r3, #4] 1918 .L220: 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1919 .loc 1 1846 0 1920 00ae 8B42 cmp r3, r1 1921 00b0 45D0 beq .L221 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 1922 .loc 1 1847 0 1923 00b2 092D cmp r5, #9 1924 00b4 3DD9 bls .L243 1925 .L222: 1881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* if Master ADC JAUTO bit is set, Slave injected interruptions 1926 .loc 1 1881 0 1927 00b6 E26D ldr r2, [r4, #92] 1928 00b8 42F48012 orr r2, r2, #1048576 1929 00bc E265 str r2, [r4, #92] 1930 .LVL139: 1885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1931 .loc 1 1885 0 1932 00be C868 ldr r0, [r1, #12] 1933 00c0 10F00070 ands r0, r0, #33554432 1934 00c4 BED0 beq .L239 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Next, set Slave injected interruptions */ 1935 .loc 1 1889 0 1936 00c6 E26D ldr r2, [r4, #92] 1937 00c8 22F44052 bic r2, r2, #12288 1938 00cc 42F48052 orr r2, r2, #4096 1939 00d0 E265 str r2, [r4, #92] 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1940 .loc 1 1891 0 1941 00d2 082E cmp r6, #8 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1942 .loc 1 1894 0 1943 00d4 5A68 ldr r2, [r3, #4] 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1944 .loc 1 1891 0 1945 00d6 57D1 bne .L240 ARM GAS /tmp/ccsErhU4.s page 227 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1946 .loc 1 1894 0 1947 00d8 22F02002 bic r2, r2, #32 1948 00dc 5A60 str r2, [r3, #4] 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 1949 .loc 1 1895 0 1950 00de 5A68 ldr r2, [r3, #4] 1951 00e0 42F04002 orr r2, r2, #64 1952 00e4 5A60 str r2, [r3, #4] 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1953 .loc 1 1767 0 1954 00e6 0020 movs r0, #0 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1955 .loc 1 1947 0 1956 00e8 F8BD pop {r3, r4, r5, r6, r7, pc} 1957 .LVL140: 1958 .L207: 1959 .LBB585: 1960 .LBB581: 1961 .LBB573: 1962 .LBB574: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1963 .loc 2 6688 0 1964 00ea 9A68 ldr r2, [r3, #8] 1965 00ec 2E4F ldr r7, .L244+12 1966 00ee 3A40 ands r2, r2, r7 1967 00f0 42F00102 orr r2, r2, #1 1968 00f4 9A60 str r2, [r3, #8] 1969 .LVL141: 1970 .LBE574: 1971 .LBE573: 3456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 1972 .loc 1 3456 0 1973 00f6 FFF7FEFF bl HAL_GetTick 1974 .LVL142: 1975 00fa 2368 ldr r3, [r4] 1976 00fc 0646 mov r6, r0 1977 .LVL143: 1978 .L209: 3458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 1979 .loc 1 3458 0 1980 00fe 1A68 ldr r2, [r3] 1981 0100 D207 lsls r2, r2, #31 1982 0102 A2D4 bmi .L206 1983 .LBB575: 1984 .LBB576: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1985 .loc 2 6724 0 1986 0104 9A68 ldr r2, [r3, #8] 1987 0106 D007 lsls r0, r2, #31 1988 0108 04D4 bmi .L210 1989 .LBE576: 1990 .LBE575: 1991 .LBB577: 1992 .LBB578: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1993 .loc 2 6688 0 ARM GAS /tmp/ccsErhU4.s page 228 1994 010a 9A68 ldr r2, [r3, #8] 1995 010c 3A40 ands r2, r2, r7 1996 010e 42F00102 orr r2, r2, #1 1997 0112 9A60 str r2, [r3, #8] 1998 .L210: 1999 .LBE578: 2000 .LBE577: 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2001 .loc 1 3473 0 2002 0114 FFF7FEFF bl HAL_GetTick 2003 .LVL144: 2004 0118 801B subs r0, r0, r6 2005 011a 0228 cmp r0, #2 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2006 .loc 1 3476 0 2007 011c 2368 ldr r3, [r4] 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2008 .loc 1 3473 0 2009 011e EED9 bls .L209 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2010 .loc 1 3476 0 2011 0120 1A68 ldr r2, [r3] 2012 0122 D107 lsls r1, r2, #31 2013 0124 EBD4 bmi .L209 2014 0126 81E7 b .L242 2015 .LVL145: 2016 .L214: 2017 .LBE581: 2018 .LBE585: 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2019 .loc 1 1783 0 2020 0128 4FF0A041 mov r1, #1342177280 1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2021 .loc 1 1784 0 2022 012c 002D cmp r5, #0 2023 012e 9AD0 beq .L228 2024 0130 9DE7 b .L229 2025 .L243: 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2026 .loc 1 1847 0 2027 0132 40F22122 movw r2, #545 2028 0136 22FA05F5 lsr r5, r2, r5 2029 013a E807 lsls r0, r5, #31 2030 013c BBD5 bpl .L222 2031 .L221: 1853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2032 .loc 1 1853 0 2033 013e DA68 ldr r2, [r3, #12] 2034 0140 9201 lsls r2, r2, #6 2035 0142 0FD5 bpl .L223 1855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2036 .loc 1 1855 0 2037 0144 E26D ldr r2, [r4, #92] 2038 0146 22F44052 bic r2, r2, #12288 2039 014a 42F48052 orr r2, r2, #4096 2040 014e E265 str r2, [r4, #92] 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 229 2041 .loc 1 1861 0 2042 0150 082E cmp r6, #8 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 2043 .loc 1 1864 0 2044 0152 5A68 ldr r2, [r3, #4] 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2045 .loc 1 1861 0 2046 0154 10D1 bne .L238 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 2047 .loc 1 1864 0 2048 0156 22F02002 bic r2, r2, #32 2049 015a 5A60 str r2, [r3, #4] 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 2050 .loc 1 1865 0 2051 015c 5A68 ldr r2, [r3, #4] 2052 015e 42F04002 orr r2, r2, #64 2053 0162 5A60 str r2, [r3, #4] 2054 .L223: 2055 .LVL146: 2056 .LBB586: 2057 .LBB587: 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2058 .loc 2 6813 0 2059 0164 9A68 ldr r2, [r3, #8] 2060 0166 22F00042 bic r2, r2, #-2147483648 2061 016a 22F03F02 bic r2, r2, #63 2062 016e 42F00402 orr r2, r2, #4 2063 0172 9A60 str r2, [r3, #8] 2064 .LBE587: 2065 .LBE586: 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2066 .loc 1 1767 0 2067 0174 0020 movs r0, #0 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2068 .loc 1 1947 0 2069 0176 F8BD pop {r3, r4, r5, r6, r7, pc} 2070 .LVL147: 2071 .L238: 1869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 2072 .loc 1 1869 0 2073 0178 22F04002 bic r2, r2, #64 2074 017c 5A60 str r2, [r3, #4] 1870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 2075 .loc 1 1870 0 2076 017e 5A68 ldr r2, [r3, #4] 2077 0180 42F02002 orr r2, r2, #32 2078 0184 5A60 str r2, [r3, #4] 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2079 .loc 1 1871 0 2080 0186 EDE7 b .L223 2081 .LVL148: 2082 .L240: 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 2083 .loc 1 1899 0 2084 0188 22F04002 bic r2, r2, #64 2085 018c 5A60 str r2, [r3, #4] 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; ARM GAS /tmp/ccsErhU4.s page 230 2086 .loc 1 1900 0 2087 018e 5A68 ldr r2, [r3, #4] 2088 0190 42F02002 orr r2, r2, #32 2089 0194 5A60 str r2, [r3, #4] 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2090 .loc 1 1767 0 2091 0196 0020 movs r0, #0 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2092 .loc 1 1947 0 2093 0198 F8BD pop {r3, r4, r5, r6, r7, pc} 2094 .LVL149: 2095 .L245: 2096 019a 00BF .align 2 2097 .L244: 2098 019c 00030050 .word 1342178048 2099 01a0 3F000080 .word -2147483585 2100 01a4 00010050 .word 1342177536 2101 01a8 C0FFFF7F .word 2147483584 2102 .cfi_endproc 2103 .LFE337: 2105 .section .text.HAL_ADC_Stop_IT,"ax",%progbits 2106 .align 1 2107 .p2align 2,,3 2108 .global HAL_ADC_Stop_IT 2109 .syntax unified 2110 .thumb 2111 .thumb_func 2112 .fpu fpv4-sp-d16 2114 HAL_ADC_Stop_IT: 2115 .LFB338: 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 2116 .loc 1 1957 0 2117 .cfi_startproc 2118 @ args = 0, pretend = 0, frame = 0 2119 @ frame_needed = 0, uses_anonymous_args = 0 2120 .LVL150: 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2121 .loc 1 1964 0 2122 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2123 0004 012B cmp r3, #1 2124 0006 51D0 beq .L279 2125 .LBB614: 2126 .LBB615: 3312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 2127 .loc 1 3312 0 discriminator 2 2128 0008 0368 ldr r3, [r0] 2129 .LBB616: 2130 .LBB617: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2131 .loc 2 6846 0 discriminator 2 2132 000a 9A68 ldr r2, [r3, #8] 2133 .LBE617: 2134 .LBE616: 2135 .LBE615: 2136 .LBE614: 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 2137 .loc 1 1957 0 discriminator 2 ARM GAS /tmp/ccsErhU4.s page 231 2138 000c 70B5 push {r4, r5, r6, lr} 2139 .LCFI15: 2140 .cfi_def_cfa_offset 16 2141 .cfi_offset 4, -16 2142 .cfi_offset 5, -12 2143 .cfi_offset 6, -8 2144 .cfi_offset 14, -4 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2145 .loc 1 1964 0 discriminator 2 2146 000e 0121 movs r1, #1 2147 .LBB655: 2148 .LBB650: 2149 .LBB620: 2150 .LBB618: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2151 .loc 2 6846 0 discriminator 2 2152 0010 5607 lsls r6, r2, #29 2153 0012 0446 mov r4, r0 2154 .LBE618: 2155 .LBE620: 2156 .LBE650: 2157 .LBE655: 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2158 .loc 1 1964 0 discriminator 2 2159 0014 80F85810 strb r1, [r0, #88] 2160 .LVL151: 2161 .LBB656: 2162 .LBB651: 2163 .LBB621: 2164 .LBB619: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2165 .loc 2 6846 0 discriminator 2 2166 0018 30D5 bpl .L304 2167 .LVL152: 2168 .LBE619: 2169 .LBE621: 2170 .LBB622: 2171 .LBB623: 2172 .loc 2 7071 0 2173 001a 9A68 ldr r2, [r3, #8] 2174 .LVL153: 2175 .L272: 2176 .LBE623: 2177 .LBE622: 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 2178 .loc 1 3324 0 2179 001c DA68 ldr r2, [r3, #12] 2180 001e 9501 lsls r5, r2, #6 2181 0020 04D5 bpl .L250 3326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2182 .loc 1 3326 0 2183 0022 A18B ldrh r1, [r4, #28] 2184 0024 40F20112 movw r2, #257 2185 0028 9142 cmp r1, r2 2186 002a 7AD0 beq .L305 2187 .L250: 2188 .LVL154: ARM GAS /tmp/ccsErhU4.s page 232 2189 .LBB625: 2190 .LBB626: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2191 .loc 2 6846 0 2192 002c 9A68 ldr r2, [r3, #8] 2193 002e 12F0040F tst r2, #4 2194 .LBE626: 2195 .LBE625: 2196 .LBB629: 2197 .LBB630: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2198 .loc 2 6735 0 2199 0032 9A68 ldr r2, [r3, #8] 2200 .LBE630: 2201 .LBE629: 2202 .LBB633: 2203 .LBB627: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2204 .loc 2 6846 0 2205 0034 02D0 beq .L303 2206 .LVL155: 2207 .LBE627: 2208 .LBE633: 2209 .LBB634: 2210 .LBB631: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2211 .loc 2 6735 0 2212 0036 9107 lsls r1, r2, #30 2213 0038 46D5 bpl .L306 2214 .LVL156: 2215 .LBE631: 2216 .LBE634: 2217 .LBB635: 2218 .LBB636: 2219 .loc 2 7071 0 2220 003a 9A68 ldr r2, [r3, #8] 2221 .LVL157: 2222 .L303: 2223 003c 1607 lsls r6, r2, #28 2224 003e 37D4 bmi .L307 2225 .L258: 2226 .LBE636: 2227 .LBE635: 3384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 2228 .loc 1 3384 0 2229 0040 0C25 movs r5, #12 2230 .LVL158: 2231 .L256: 3396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2232 .loc 1 3396 0 2233 0042 FFF7FEFF bl HAL_GetTick 2234 .LVL159: 2235 0046 2368 ldr r3, [r4] 2236 0048 0646 mov r6, r0 2237 .LVL160: 2238 .L259: 3398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 233 2239 .loc 1 3398 0 2240 004a 9A68 ldr r2, [r3, #8] 2241 004c 1542 tst r5, r2 2242 004e 18D0 beq .L273 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2243 .loc 1 3400 0 2244 0050 FFF7FEFF bl HAL_GetTick 2245 .LVL161: 2246 0054 801B subs r0, r0, r6 2247 0056 0528 cmp r0, #5 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2248 .loc 1 3403 0 2249 0058 2368 ldr r3, [r4] 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2250 .loc 1 3400 0 2251 005a F6D9 bls .L259 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2252 .loc 1 3403 0 2253 005c 9A68 ldr r2, [r3, #8] 2254 005e 2A42 tst r2, r5 2255 0060 F3D0 beq .L259 2256 .LVL162: 2257 .L302: 2258 .LBE651: 2259 .LBE656: 2260 .LBB657: 2261 .LBB658: 3543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2262 .loc 1 3543 0 2263 0062 E36D ldr r3, [r4, #92] 2264 0064 43F01003 orr r3, r3, #16 2265 0068 E365 str r3, [r4, #92] 3546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2266 .loc 1 3546 0 2267 006a 236E ldr r3, [r4, #96] 2268 006c 43F00103 orr r3, r3, #1 2269 0070 2366 str r3, [r4, #96] 2270 .LBE658: 2271 .LBE657: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2272 .loc 1 1990 0 2273 0072 0023 movs r3, #0 2274 .LBB672: 2275 .LBB669: 2276 .loc 1 3548 0 2277 0074 0120 movs r0, #1 2278 .LVL163: 2279 .LBE669: 2280 .LBE672: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2281 .loc 1 1990 0 2282 0076 84F85830 strb r3, [r4, #88] 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2283 .loc 1 1994 0 2284 007a 70BD pop {r4, r5, r6, pc} 2285 .LVL164: 2286 .L304: ARM GAS /tmp/ccsErhU4.s page 234 2287 .LBB673: 2288 .LBB652: 2289 .LBB638: 2290 .LBB624: 2291 .loc 2 7071 0 2292 007c 9A68 ldr r2, [r3, #8] 2293 007e 1007 lsls r0, r2, #28 2294 .LVL165: 2295 0080 CCD4 bmi .L272 2296 .LVL166: 2297 .L273: 2298 .LBE624: 2299 .LBE638: 2300 .LBE652: 2301 .LBE673: 1974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2302 .loc 1 1974 0 2303 0082 5A68 ldr r2, [r3, #4] 2304 0084 22F01C02 bic r2, r2, #28 2305 0088 5A60 str r2, [r3, #4] 2306 .LVL167: 2307 .LBB674: 2308 .LBB670: 2309 .LBB659: 2310 .LBB660: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2311 .loc 2 6735 0 2312 008a 9A68 ldr r2, [r3, #8] 2313 008c 9007 lsls r0, r2, #30 2314 008e 25D5 bpl .L308 2315 .LVL168: 2316 .LBE660: 2317 .LBE659: 2318 .LBB661: 2319 .LBB662: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2320 .loc 2 6724 0 2321 0090 9B68 ldr r3, [r3, #8] 2322 .LVL169: 2323 .L265: 2324 .LBE662: 2325 .LBE661: 2326 .LBE670: 2327 .LBE674: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 2328 .loc 1 1983 0 2329 0092 E36D ldr r3, [r4, #92] 2330 0094 23F48853 bic r3, r3, #4352 2331 0098 23F00103 bic r3, r3, #1 2332 009c 43F00103 orr r3, r3, #1 2333 00a0 E365 str r3, [r4, #92] 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2334 .loc 1 1990 0 2335 00a2 0023 movs r3, #0 1977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2336 .loc 1 1977 0 2337 00a4 0020 movs r0, #0 ARM GAS /tmp/ccsErhU4.s page 235 2338 .LVL170: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2339 .loc 1 1990 0 2340 00a6 84F85830 strb r3, [r4, #88] 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2341 .loc 1 1994 0 2342 00aa 70BD pop {r4, r5, r6, pc} 2343 .LVL171: 2344 .L279: 2345 .LCFI16: 2346 .cfi_def_cfa_offset 0 2347 .cfi_restore 4 2348 .cfi_restore 5 2349 .cfi_restore 6 2350 .cfi_restore 14 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2351 .loc 1 1964 0 2352 00ac 0220 movs r0, #2 2353 .LVL172: 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2354 .loc 1 1994 0 2355 00ae 7047 bx lr 2356 .LVL173: 2357 .L307: 2358 .LCFI17: 2359 .cfi_def_cfa_offset 16 2360 .cfi_offset 4, -16 2361 .cfi_offset 5, -12 2362 .cfi_offset 6, -8 2363 .cfi_offset 14, -4 2364 .LBB675: 2365 .LBB653: 2366 .LBB639: 2367 .LBB640: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2368 .loc 2 6735 0 2369 00b0 9A68 ldr r2, [r3, #8] 2370 00b2 9507 lsls r5, r2, #30 2371 00b4 C4D4 bmi .L258 2372 .LVL174: 2373 .LBE640: 2374 .LBE639: 2375 .LBB641: 2376 .LBB642: 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2377 .loc 2 7058 0 2378 00b6 9A68 ldr r2, [r3, #8] 2379 00b8 22F00042 bic r2, r2, #-2147483648 2380 00bc 22F03F02 bic r2, r2, #63 2381 00c0 42F02002 orr r2, r2, #32 2382 00c4 9A60 str r2, [r3, #8] 2383 00c6 BBE7 b .L258 2384 .LVL175: 2385 .L306: 2386 .LBE642: 2387 .LBE641: 2388 .LBB643: ARM GAS /tmp/ccsErhU4.s page 236 2389 .LBB644: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2390 .loc 2 6833 0 2391 00c8 9A68 ldr r2, [r3, #8] 2392 00ca 22F00042 bic r2, r2, #-2147483648 2393 00ce 22F03F02 bic r2, r2, #63 2394 00d2 42F01002 orr r2, r2, #16 2395 00d6 9A60 str r2, [r3, #8] 2396 .LVL176: 2397 .LBE644: 2398 .LBE643: 2399 .LBB646: 2400 .LBB637: 2401 .loc 2 7071 0 2402 00d8 9A68 ldr r2, [r3, #8] 2403 00da AFE7 b .L303 2404 .LVL177: 2405 .L308: 2406 .LBE637: 2407 .LBE646: 2408 .LBE653: 2409 .LBE675: 2410 .LBB676: 2411 .LBB671: 2412 .LBB664: 2413 .LBB663: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2414 .loc 2 6724 0 2415 00dc 9A68 ldr r2, [r3, #8] 2416 00de D107 lsls r1, r2, #31 2417 00e0 D7D5 bpl .L265 2418 .LVL178: 2419 .LBE663: 2420 .LBE664: 3514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2421 .loc 1 3514 0 2422 00e2 9A68 ldr r2, [r3, #8] 2423 00e4 02F00D02 and r2, r2, #13 2424 00e8 012A cmp r2, #1 2425 00ea BAD1 bne .L302 2426 .LVL179: 2427 .LBB665: 2428 .LBB666: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2429 .loc 2 6708 0 2430 00ec 9A68 ldr r2, [r3, #8] 2431 00ee 22F00042 bic r2, r2, #-2147483648 2432 00f2 22F03F02 bic r2, r2, #63 2433 00f6 42F00202 orr r2, r2, #2 2434 .LBE666: 2435 .LBE665: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2436 .loc 1 3518 0 2437 00fa 0321 movs r1, #3 2438 .LBB668: 2439 .LBB667: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, ARM GAS /tmp/ccsErhU4.s page 237 2440 .loc 2 6708 0 2441 00fc 9A60 str r2, [r3, #8] 2442 .LVL180: 2443 .LBE667: 2444 .LBE668: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2445 .loc 1 3518 0 2446 00fe 1960 str r1, [r3] 3533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2447 .loc 1 3533 0 2448 0100 FFF7FEFF bl HAL_GetTick 2449 .LVL181: 2450 0104 2368 ldr r3, [r4] 2451 0106 0546 mov r5, r0 2452 .LVL182: 2453 .L267: 3535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2454 .loc 1 3535 0 2455 0108 9B68 ldr r3, [r3, #8] 2456 010a DE07 lsls r6, r3, #31 2457 010c C1D5 bpl .L265 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2458 .loc 1 3537 0 2459 010e FFF7FEFF bl HAL_GetTick 2460 .LVL183: 2461 0112 401B subs r0, r0, r5 2462 0114 0228 cmp r0, #2 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2463 .loc 1 3540 0 2464 0116 2368 ldr r3, [r4] 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2465 .loc 1 3537 0 2466 0118 F6D9 bls .L267 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2467 .loc 1 3540 0 2468 011a 9A68 ldr r2, [r3, #8] 2469 011c D207 lsls r2, r2, #31 2470 011e F3D5 bpl .L267 2471 0120 9FE7 b .L302 2472 .LVL184: 2473 .L305: 2474 .LBE671: 2475 .LBE676: 2476 .LBB677: 2477 .LBB654: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2478 .loc 1 3333 0 2479 0122 1A68 ldr r2, [r3] 2480 0124 5006 lsls r0, r2, #25 2481 0126 06D4 bmi .L252 2482 0128 0C4A ldr r2, .L309 2483 012a 01E0 b .L251 2484 .LVL185: 2485 .L254: 3335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2486 .loc 1 3335 0 2487 012c 013A subs r2, r2, #1 ARM GAS /tmp/ccsErhU4.s page 238 2488 012e 98D0 beq .L302 2489 .L251: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2490 .loc 1 3333 0 2491 0130 1968 ldr r1, [r3] 2492 0132 4906 lsls r1, r1, #25 2493 0134 FAD5 bpl .L254 2494 .L252: 3349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2495 .loc 1 3349 0 2496 0136 4022 movs r2, #64 2497 0138 1A60 str r2, [r3] 2498 .LVL186: 2499 .LBB647: 2500 .LBB628: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2501 .loc 2 6846 0 2502 013a 9A68 ldr r2, [r3, #8] 2503 013c 5207 lsls r2, r2, #29 2504 013e 01D4 bmi .L255 2505 .LVL187: 2506 .L257: 2507 .LBE628: 2508 .LBE647: 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 2509 .loc 1 3391 0 2510 0140 0425 movs r5, #4 2511 0142 7EE7 b .L256 2512 .LVL188: 2513 .L255: 2514 .LBB648: 2515 .LBB632: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2516 .loc 2 6735 0 2517 0144 9A68 ldr r2, [r3, #8] 2518 0146 9207 lsls r2, r2, #30 2519 0148 FAD4 bmi .L257 2520 .LVL189: 2521 .LBE632: 2522 .LBE648: 2523 .LBB649: 2524 .LBB645: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2525 .loc 2 6833 0 2526 014a 9A68 ldr r2, [r3, #8] 2527 014c 22F00042 bic r2, r2, #-2147483648 2528 0150 22F03F02 bic r2, r2, #63 2529 0154 42F01002 orr r2, r2, #16 2530 0158 9A60 str r2, [r3, #8] 2531 015a F1E7 b .L257 2532 .L310: 2533 .align 2 2534 .L309: 2535 015c 000040A3 .word -1556086784 2536 .LBE645: 2537 .LBE649: 2538 .LBE654: ARM GAS /tmp/ccsErhU4.s page 239 2539 .LBE677: 2540 .cfi_endproc 2541 .LFE338: 2543 .section .text.HAL_ADC_Start_DMA,"ax",%progbits 2544 .align 1 2545 .p2align 2,,3 2546 .global HAL_ADC_Start_DMA 2547 .syntax unified 2548 .thumb 2549 .thumb_func 2550 .fpu fpv4-sp-d16 2552 HAL_ADC_Start_DMA: 2553 .LFB339: 2010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 2554 .loc 1 2010 0 2555 .cfi_startproc 2556 @ args = 0, pretend = 0, frame = 0 2557 @ frame_needed = 0, uses_anonymous_args = 0 2558 .LVL190: 2559 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 2560 .LCFI18: 2561 .cfi_def_cfa_offset 32 2562 .cfi_offset 4, -32 2563 .cfi_offset 5, -28 2564 .cfi_offset 6, -24 2565 .cfi_offset 7, -20 2566 .cfi_offset 8, -16 2567 .cfi_offset 9, -12 2568 .cfi_offset 10, -8 2569 .cfi_offset 14, -4 2570 .LBB694: 2571 .LBB695: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2572 .loc 2 6387 0 2573 0004 494B ldr r3, .L335 2574 .LBE695: 2575 .LBE694: 2020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2576 .loc 1 2020 0 2577 0006 0668 ldr r6, [r0] 2578 .LBB698: 2579 .LBB696: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2580 .loc 2 6387 0 2581 0008 9D68 ldr r5, [r3, #8] 2582 .LVL191: 2583 .LBE696: 2584 .LBE698: 2585 .LBB699: 2586 .LBB700: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2587 .loc 2 6846 0 2588 000a B368 ldr r3, [r6, #8] 2589 000c 5C07 lsls r4, r3, #29 2590 000e 28D4 bmi .L327 2591 .LVL192: 2592 .LBE700: ARM GAS /tmp/ccsErhU4.s page 240 2593 .LBE699: 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2594 .loc 1 2023 0 2595 0010 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2596 0014 012B cmp r3, #1 2597 0016 24D0 beq .L327 2598 .LBB701: 2599 .LBB697: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2600 .loc 2 6387 0 discriminator 2 2601 0018 05F01F05 and r5, r5, #31 2602 .LBE697: 2603 .LBE701: 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2604 .loc 1 2023 0 discriminator 2 2605 001c 0123 movs r3, #1 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2606 .loc 1 2028 0 discriminator 2 2607 001e 092D cmp r5, #9 2608 0020 9046 mov r8, r2 2609 0022 0F46 mov r7, r1 2610 0024 0446 mov r4, r0 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2611 .loc 1 2023 0 discriminator 2 2612 0026 80F85830 strb r3, [r0, #88] 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2613 .loc 1 2028 0 discriminator 2 2614 002a 05D9 bls .L334 2615 .LVL193: 2616 .L313: 2115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2617 .loc 1 2115 0 2618 002c 0023 movs r3, #0 2619 002e 84F85830 strb r3, [r4, #88] 2620 0032 0120 movs r0, #1 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2621 .loc 1 2135 0 2622 0034 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 2623 .LVL194: 2624 .L334: 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 2625 .loc 1 2028 0 discriminator 2 2626 0038 40F22123 movw r3, #545 2627 003c EB40 lsrs r3, r3, r5 2628 003e DB07 lsls r3, r3, #31 2629 0040 F4D5 bpl .L313 2630 .LVL195: 2631 .LBB702: 2632 .LBB703: 2633 .LBB704: 2634 .LBB705: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2635 .loc 2 6724 0 2636 0042 B368 ldr r3, [r6, #8] 2637 0044 D807 lsls r0, r3, #31 2638 .LVL196: 2639 0046 0FD4 bmi .L314 ARM GAS /tmp/ccsErhU4.s page 241 2640 .LVL197: 2641 .LBE705: 2642 .LBE704: 3440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) 2643 .loc 1 3440 0 2644 0048 B268 ldr r2, [r6, #8] 2645 .LVL198: 2646 004a 394B ldr r3, .L335+4 2647 004c 1A42 tst r2, r3 2648 004e 47D0 beq .L315 2649 .LVL199: 2650 .L333: 3479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2651 .loc 1 3479 0 2652 0050 E36D ldr r3, [r4, #92] 2653 0052 43F01003 orr r3, r3, #16 2654 0056 E365 str r3, [r4, #92] 3482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2655 .loc 1 3482 0 2656 0058 236E ldr r3, [r4, #96] 2657 005a 43F00103 orr r3, r3, #1 2658 005e 2366 str r3, [r4, #96] 2659 .LVL200: 2660 0060 E4E7 b .L313 2661 .LVL201: 2662 .L327: 2663 .LBE703: 2664 .LBE702: 2130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2665 .loc 1 2130 0 2666 0062 0220 movs r0, #2 2667 .LVL202: 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2668 .loc 1 2135 0 2669 0064 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 2670 .LVL203: 2671 .L314: 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL 2672 .loc 1 2043 0 2673 0068 E36D ldr r3, [r4, #92] 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2674 .loc 1 2051 0 2675 006a 324A ldr r2, .L335+8 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL 2676 .loc 1 2043 0 2677 006c 23F47063 bic r3, r3, #3840 2678 0070 23F00103 bic r3, r3, #1 2679 0074 43F48073 orr r3, r3, #256 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2680 .loc 1 2051 0 2681 0078 9642 cmp r6, r2 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL 2682 .loc 1 2043 0 2683 007a E365 str r3, [r4, #92] 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 2684 .loc 1 2051 0 2685 007c 52D0 beq .L321 ARM GAS /tmp/ccsErhU4.s page 242 2686 .L324: 2055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2687 .loc 1 2055 0 2688 007e E36D ldr r3, [r4, #92] 2689 0080 23F48013 bic r3, r3, #1048576 2690 0084 E365 str r3, [r4, #92] 2691 .L325: 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2692 .loc 1 2060 0 2693 0086 E36D ldr r3, [r4, #92] 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2694 .loc 1 2072 0 2695 0088 606D ldr r0, [r4, #84] 2075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2696 .loc 1 2075 0 2697 008a 2B49 ldr r1, .L335+12 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2698 .loc 1 2078 0 2699 008c 2B4A ldr r2, .L335+16 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2700 .loc 1 2060 0 2701 008e 13F48053 ands r3, r3, #4096 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2702 .loc 1 2063 0 2703 0092 1CBF itt ne 2704 0094 236E ldrne r3, [r4, #96] 2705 0096 23F00603 bicne r3, r3, #6 2068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2706 .loc 1 2068 0 2707 009a 2366 str r3, [r4, #96] 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2708 .loc 1 2072 0 2709 009c 284B ldr r3, .L335+20 2710 009e C362 str r3, [r0, #44] 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2711 .loc 1 2087 0 2712 00a0 1C23 movs r3, #28 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2713 .loc 1 2078 0 2714 00a2 C0E90C12 strd r1, r2, [r0, #48] 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2715 .loc 1 2087 0 2716 00a6 3360 str r3, [r6] 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2717 .loc 1 2097 0 2718 00a8 7368 ldr r3, [r6, #4] 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2719 .loc 1 2092 0 2720 00aa 0022 movs r2, #0 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2721 .loc 1 2097 0 2722 00ac 43F01003 orr r3, r3, #16 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2723 .loc 1 2092 0 2724 00b0 84F85820 strb r2, [r4, #88] 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2725 .loc 1 2097 0 ARM GAS /tmp/ccsErhU4.s page 243 2726 00b4 7360 str r3, [r6, #4] 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2727 .loc 1 2100 0 2728 00b6 F168 ldr r1, [r6, #12] 2729 00b8 41F00101 orr r1, r1, #1 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2730 .loc 1 2103 0 2731 00bc 4346 mov r3, r8 2732 00be 3A46 mov r2, r7 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2733 .loc 1 2100 0 2734 00c0 F160 str r1, [r6, #12] 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2735 .loc 1 2103 0 2736 00c2 06F14001 add r1, r6, #64 2737 00c6 FFF7FEFF bl HAL_DMA_Start_IT 2738 .LVL204: 2110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2739 .loc 1 2110 0 2740 00ca 2268 ldr r2, [r4] 2741 .LVL205: 2742 .LBB715: 2743 .LBB716: 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2744 .loc 2 6813 0 2745 00cc 9368 ldr r3, [r2, #8] 2746 00ce 23F00043 bic r3, r3, #-2147483648 2747 00d2 23F03F03 bic r3, r3, #63 2748 00d6 43F00403 orr r3, r3, #4 2749 00da 9360 str r3, [r2, #8] 2750 .LBE716: 2751 .LBE715: 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2752 .loc 1 2135 0 2753 00dc BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 2754 .LVL206: 2755 .L315: 2756 .LBB717: 2757 .LBB714: 2758 .LBB706: 2759 .LBB707: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2760 .loc 2 6688 0 2761 00e0 B368 ldr r3, [r6, #8] 2762 00e2 184A ldr r2, .L335+24 2763 00e4 1340 ands r3, r3, r2 2764 00e6 43F00103 orr r3, r3, #1 2765 00ea B360 str r3, [r6, #8] 2766 .LVL207: 2767 .LBE707: 2768 .LBE706: 2769 .LBB708: 2770 .LBB709: 2771 00ec 9246 mov r10, r2 2772 .LBE709: 2773 .LBE708: 3456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 244 2774 .loc 1 3456 0 2775 00ee FFF7FEFF bl HAL_GetTick 2776 .LVL208: 2777 00f2 2668 ldr r6, [r4] 2778 00f4 8146 mov r9, r0 2779 .LVL209: 2780 .L316: 3458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2781 .loc 1 3458 0 2782 00f6 3368 ldr r3, [r6] 2783 00f8 DB07 lsls r3, r3, #31 2784 00fa B5D4 bmi .L314 2785 .LBB711: 2786 .LBB712: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2787 .loc 2 6724 0 2788 00fc B368 ldr r3, [r6, #8] 2789 00fe D907 lsls r1, r3, #31 2790 0100 05D4 bmi .L317 2791 .LBE712: 2792 .LBE711: 2793 .LBB713: 2794 .LBB710: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 2795 .loc 2 6688 0 2796 0102 B368 ldr r3, [r6, #8] 2797 0104 03EA0A03 and r3, r3, r10 2798 0108 43F00103 orr r3, r3, #1 2799 010c B360 str r3, [r6, #8] 2800 .L317: 2801 .LBE710: 2802 .LBE713: 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2803 .loc 1 3473 0 2804 010e FFF7FEFF bl HAL_GetTick 2805 .LVL210: 2806 0112 A0EB0900 sub r0, r0, r9 2807 0116 0228 cmp r0, #2 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2808 .loc 1 3476 0 2809 0118 2668 ldr r6, [r4] 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2810 .loc 1 3473 0 2811 011a ECD9 bls .L316 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2812 .loc 1 3476 0 2813 011c 3368 ldr r3, [r6] 2814 011e DA07 lsls r2, r3, #31 2815 0120 E9D4 bmi .L316 2816 0122 95E7 b .L333 2817 .LVL211: 2818 .L321: 2819 .LBE714: 2820 .LBE717: 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 2821 .loc 1 2052 0 2822 0124 002D cmp r5, #0 ARM GAS /tmp/ccsErhU4.s page 245 2823 0126 AAD0 beq .L324 2824 0128 ADE7 b .L325 2825 .L336: 2826 012a 00BF .align 2 2827 .L335: 2828 012c 00030050 .word 1342178048 2829 0130 3F000080 .word -2147483585 2830 0134 00010050 .word 1342177536 2831 0138 00000000 .word ADC_DMAHalfConvCplt 2832 013c 00000000 .word ADC_DMAError 2833 0140 00000000 .word ADC_DMAConvCplt 2834 0144 C0FFFF7F .word 2147483584 2835 .cfi_endproc 2836 .LFE339: 2838 .section .text.HAL_ADC_GetValue,"ax",%progbits 2839 .align 1 2840 .p2align 2,,3 2841 .global HAL_ADC_GetValue 2842 .syntax unified 2843 .thumb 2844 .thumb_func 2845 .fpu fpv4-sp-d16 2847 HAL_ADC_GetValue: 2848 .LFB341: 2236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2849 .loc 1 2236 0 2850 .cfi_startproc 2851 @ args = 0, pretend = 0, frame = 0 2852 @ frame_needed = 0, uses_anonymous_args = 0 2853 @ link register save eliminated. 2854 .LVL212: 2244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2855 .loc 1 2244 0 2856 0000 0368 ldr r3, [r0] 2857 0002 186C ldr r0, [r3, #64] 2858 .LVL213: 2245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2859 .loc 1 2245 0 2860 0004 7047 bx lr 2861 .cfi_endproc 2862 .LFE341: 2864 0006 00BF .section .text.HAL_ADC_StartSampling,"ax",%progbits 2865 .align 1 2866 .p2align 2,,3 2867 .global HAL_ADC_StartSampling 2868 .syntax unified 2869 .thumb 2870 .thumb_func 2871 .fpu fpv4-sp-d16 2873 HAL_ADC_StartSampling: 2874 .LFB342: 2257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2875 .loc 1 2257 0 2876 .cfi_startproc 2877 @ args = 0, pretend = 0, frame = 0 2878 @ frame_needed = 0, uses_anonymous_args = 0 2879 @ link register save eliminated. ARM GAS /tmp/ccsErhU4.s page 246 2880 .LVL214: 2262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2881 .loc 1 2262 0 2882 0000 0268 ldr r2, [r0] 2883 0002 1369 ldr r3, [r2, #16] 2884 0004 43F00073 orr r3, r3, #33554432 2885 0008 1361 str r3, [r2, #16] 2266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2886 .loc 1 2266 0 2887 000a 0020 movs r0, #0 2888 .LVL215: 2889 000c 7047 bx lr 2890 .cfi_endproc 2891 .LFE342: 2893 000e 00BF .section .text.HAL_ADC_StopSampling,"ax",%progbits 2894 .align 1 2895 .p2align 2,,3 2896 .global HAL_ADC_StopSampling 2897 .syntax unified 2898 .thumb 2899 .thumb_func 2900 .fpu fpv4-sp-d16 2902 HAL_ADC_StopSampling: 2903 .LFB343: 2279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 2904 .loc 1 2279 0 2905 .cfi_startproc 2906 @ args = 0, pretend = 0, frame = 0 2907 @ frame_needed = 0, uses_anonymous_args = 0 2908 @ link register save eliminated. 2909 .LVL216: 2284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2910 .loc 1 2284 0 2911 0000 0268 ldr r2, [r0] 2912 0002 1369 ldr r3, [r2, #16] 2913 0004 23F00073 bic r3, r3, #33554432 2914 0008 1361 str r3, [r2, #16] 2288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 2915 .loc 1 2288 0 2916 000a 0020 movs r0, #0 2917 .LVL217: 2918 000c 7047 bx lr 2919 .cfi_endproc 2920 .LFE343: 2922 000e 00BF .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits 2923 .align 1 2924 .p2align 2,,3 2925 .weak HAL_ADC_ConvCpltCallback 2926 .syntax unified 2927 .thumb 2928 .thumb_func 2929 .fpu fpv4-sp-d16 2931 HAL_ADC_ConvCpltCallback: 2932 .LFB362: 2933 .cfi_startproc 2934 @ args = 0, pretend = 0, frame = 0 2935 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/ccsErhU4.s page 247 2936 @ link register save eliminated. 2937 0000 7047 bx lr 2938 .cfi_endproc 2939 .LFE362: 2941 0002 00BF .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits 2942 .align 1 2943 .p2align 2,,3 2944 .weak HAL_ADC_ConvHalfCpltCallback 2945 .syntax unified 2946 .thumb 2947 .thumb_func 2948 .fpu fpv4-sp-d16 2950 HAL_ADC_ConvHalfCpltCallback: 2951 .LFB364: 2952 .cfi_startproc 2953 @ args = 0, pretend = 0, frame = 0 2954 @ frame_needed = 0, uses_anonymous_args = 0 2955 @ link register save eliminated. 2956 0000 7047 bx lr 2957 .cfi_endproc 2958 .LFE364: 2960 0002 00BF .section .text.ADC_DMAHalfConvCplt,"ax",%progbits 2961 .align 1 2962 .p2align 2,,3 2963 .global ADC_DMAHalfConvCplt 2964 .syntax unified 2965 .thumb 2966 .thumb_func 2967 .fpu fpv4-sp-d16 2969 ADC_DMAHalfConvCplt: 2970 .LFB357: 3549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Return HAL status */ 3555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** return HAL_OK; 3556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief DMA transfer complete callback. 3560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hdma pointer to DMA handle. 3561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 3562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) 3564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 3567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ 3569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & (HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) == 0UL) 3570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 3572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 3573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ ARM GAS /tmp/ccsErhU4.s page 248 3575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going */ 3576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* to disable interruption. */ 3577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Is it the end of the regular sequence ? */ 3578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->Instance->ISR & ADC_FLAG_EOS) != 0UL) 3579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Are conversions software-triggered ? */ 3581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) 3582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Is CONT bit set ? */ 3584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_CONT) == 0UL) 3585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* CONT bit is not set, no more conversions expected */ 3587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 3588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) 3589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 3591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* DMA End of Transfer interrupt was triggered but conversions sequence 3598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** is not over. If DMACFG is set to 0, conversions are stopped. */ 3599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMACFG) == 0UL) 3600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* DMACFG bit is not set, conversions are stopped. */ 3602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 3603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) 3604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 3606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Conversion complete callback */ 3611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 3612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); 3613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 3614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); 3615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else /* DMA and-or internal error occurred */ 3618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) != 0UL) 3620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Call HAL ADC Error Callback function */ 3622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 3623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback(hadc); 3624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 3625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); 3626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** else 3629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Call ADC DMA error callback */ 3631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma); ARM GAS /tmp/ccsErhU4.s page 249 3632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** 3637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief DMA half transfer complete callback. 3638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hdma pointer to DMA handle. 3639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 3640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) 3642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 2971 .loc 1 3642 0 2972 .cfi_startproc 2973 @ args = 0, pretend = 0, frame = 0 2974 @ frame_needed = 0, uses_anonymous_args = 0 2975 .LVL218: 2976 .loc 1 3642 0 2977 0000 08B5 push {r3, lr} 2978 .LCFI19: 2979 .cfi_def_cfa_offset 8 2980 .cfi_offset 3, -8 2981 .cfi_offset 14, -4 3643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 3645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Half conversion callback */ 3647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 3648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ConvHalfCpltCallback(hadc); 3649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 3650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc); 2982 .loc 1 3650 0 2983 0002 806A ldr r0, [r0, #40] 2984 .LVL219: 2985 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback 2986 .LVL220: 3651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 2987 .loc 1 3652 0 2988 0008 08BD pop {r3, pc} 2989 .cfi_endproc 2990 .LFE357: 2992 000a 00BF .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits 2993 .align 1 2994 .p2align 2,,3 2995 .weak HAL_ADC_LevelOutOfWindowCallback 2996 .syntax unified 2997 .thumb 2998 .thumb_func 2999 .fpu fpv4-sp-d16 3001 HAL_ADC_LevelOutOfWindowCallback: 3002 .LFB366: 3003 .cfi_startproc 3004 @ args = 0, pretend = 0, frame = 0 3005 @ frame_needed = 0, uses_anonymous_args = 0 3006 @ link register save eliminated. 3007 0000 7047 bx lr 3008 .cfi_endproc ARM GAS /tmp/ccsErhU4.s page 250 3009 .LFE366: 3011 0002 00BF .section .text.HAL_ADC_ErrorCallback,"ax",%progbits 3012 .align 1 3013 .p2align 2,,3 3014 .weak HAL_ADC_ErrorCallback 3015 .syntax unified 3016 .thumb 3017 .thumb_func 3018 .fpu fpv4-sp-d16 3020 HAL_ADC_ErrorCallback: 3021 .LFB368: 3022 .cfi_startproc 3023 @ args = 0, pretend = 0, frame = 0 3024 @ frame_needed = 0, uses_anonymous_args = 0 3025 @ link register save eliminated. 3026 0000 7047 bx lr 3027 .cfi_endproc 3028 .LFE368: 3030 0002 00BF .section .text.HAL_ADC_IRQHandler,"ax",%progbits 3031 .align 1 3032 .p2align 2,,3 3033 .global HAL_ADC_IRQHandler 3034 .syntax unified 3035 .thumb 3036 .thumb_func 3037 .fpu fpv4-sp-d16 3039 HAL_ADC_IRQHandler: 3040 .LFB344: 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t overrun_error = 0UL; /* flag set if overrun occurrence has to be considered as an error 3041 .loc 1 2296 0 3042 .cfi_startproc 3043 @ args = 0, pretend = 0, frame = 0 3044 @ frame_needed = 0, uses_anonymous_args = 0 3045 .LVL221: 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t overrun_error = 0UL; /* flag set if overrun occurrence has to be considered as an error 3046 .loc 1 2296 0 3047 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 3048 .LCFI20: 3049 .cfi_def_cfa_offset 24 3050 .cfi_offset 3, -24 3051 .cfi_offset 4, -20 3052 .cfi_offset 5, -16 3053 .cfi_offset 6, -12 3054 .cfi_offset 7, -8 3055 .cfi_offset 14, -4 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; 3056 .loc 1 2298 0 3057 0002 0368 ldr r3, [r0] 3058 .LBB718: 3059 .LBB719: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3060 .loc 2 6387 0 3061 0004 904A ldr r2, .L471 3062 .LBE719: 3063 .LBE718: 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; 3064 .loc 1 2298 0 ARM GAS /tmp/ccsErhU4.s page 251 3065 0006 1D68 ldr r5, [r3] 3066 .LVL222: 2299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start; 3067 .loc 1 2299 0 3068 0008 5E68 ldr r6, [r3, #4] 3069 .LVL223: 3070 .LBB722: 3071 .LBB720: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3072 .loc 2 6387 0 3073 000a 9768 ldr r7, [r2, #8] 3074 .LBE720: 3075 .LBE722: 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3076 .loc 1 2313 0 3077 000c A907 lsls r1, r5, #30 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t overrun_error = 0UL; /* flag set if overrun occurrence has to be considered as an error 3078 .loc 1 2296 0 3079 000e 0446 mov r4, r0 3080 .LBB723: 3081 .LBB721: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3082 .loc 2 6387 0 3083 0010 07F01F07 and r7, r7, #31 3084 .LVL224: 3085 .LBE721: 3086 .LBE723: 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3087 .loc 1 2313 0 3088 0014 02D5 bpl .L347 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3089 .loc 1 2313 0 is_stmt 0 discriminator 1 3090 0016 B207 lsls r2, r6, #30 3091 0018 00F1A180 bmi .L461 3092 .LVL225: 3093 .L347: 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS))) 3094 .loc 1 2334 0 is_stmt 1 3095 001c 6907 lsls r1, r5, #29 3096 001e 7BD5 bpl .L349 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS))) 3097 .loc 1 2334 0 is_stmt 0 discriminator 1 3098 0020 7207 lsls r2, r6, #29 3099 0022 79D5 bpl .L349 3100 .L350: 2338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3101 .loc 1 2338 0 is_stmt 1 3102 0024 E26D ldr r2, [r4, #92] 3103 0026 D206 lsls r2, r2, #27 3104 0028 03D4 bmi .L352 2341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3105 .loc 1 2341 0 3106 002a E26D ldr r2, [r4, #92] 3107 002c 42F40072 orr r2, r2, #512 3108 0030 E265 str r2, [r4, #92] 3109 .L352: 3110 .LVL226: ARM GAS /tmp/ccsErhU4.s page 252 3111 .LBB724: 3112 .LBB725: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3113 .loc 2 3750 0 3114 0032 DA68 ldr r2, [r3, #12] 3115 0034 12F4406F tst r2, #3072 3116 0038 1CD1 bne .L354 3117 .LVL227: 3118 .LBE725: 3119 .LBE724: 2353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 3120 .loc 1 2353 0 3121 003a 844A ldr r2, .L471+4 3122 003c 9342 cmp r3, r2 3123 003e 00F0DF80 beq .L355 3124 .L383: 2360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3125 .loc 1 2360 0 3126 0042 DA68 ldr r2, [r3, #12] 3127 .LVL228: 3128 .L356: 2373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3129 .loc 1 2373 0 3130 0044 9004 lsls r0, r2, #18 3131 0046 15D4 bmi .L354 2376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3132 .loc 1 2376 0 3133 0048 1A68 ldr r2, [r3] 3134 .LVL229: 3135 004a 1107 lsls r1, r2, #28 3136 004c 12D5 bpl .L354 3137 .LVL230: 3138 .LBB726: 3139 .LBB727: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3140 .loc 2 6846 0 3141 004e 9A68 ldr r2, [r3, #8] 3142 0050 5207 lsls r2, r2, #29 3143 0052 00F1E680 bmi .L358 3144 .LVL231: 3145 .LBE727: 3146 .LBE726: 2386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3147 .loc 1 2386 0 3148 0056 5A68 ldr r2, [r3, #4] 3149 0058 22F00C02 bic r2, r2, #12 3150 005c 5A60 str r2, [r3, #4] 2389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3151 .loc 1 2389 0 3152 005e E36D ldr r3, [r4, #92] 3153 0060 23F48073 bic r3, r3, #256 3154 0064 E365 str r3, [r4, #92] 2391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3155 .loc 1 2391 0 3156 0066 E36D ldr r3, [r4, #92] 3157 0068 DB04 lsls r3, r3, #19 3158 006a 03D4 bmi .L354 ARM GAS /tmp/ccsErhU4.s page 253 2393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3159 .loc 1 2393 0 3160 006c E36D ldr r3, [r4, #92] 3161 006e 43F00103 orr r3, r3, #1 3162 0072 E365 str r3, [r4, #92] 3163 .L354: 2416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3164 .loc 1 2416 0 3165 0074 2046 mov r0, r4 3166 0076 FFF7FEFF bl HAL_ADC_ConvCpltCallback 3167 .LVL232: 2424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3168 .loc 1 2424 0 3169 007a 2368 ldr r3, [r4] 3170 007c 0C22 movs r2, #12 3171 007e 1A60 str r2, [r3] 3172 .L351: 2428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS))) 3173 .loc 1 2428 0 3174 0080 A806 lsls r0, r5, #26 3175 0082 4FD5 bpl .L360 3176 .L469: 2428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS))) 3177 .loc 1 2428 0 is_stmt 0 discriminator 1 3178 0084 B106 lsls r1, r6, #26 3179 0086 4DD5 bpl .L360 3180 .L361: 2432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3181 .loc 1 2432 0 is_stmt 1 3182 0088 E26D ldr r2, [r4, #92] 3183 008a D106 lsls r1, r2, #27 3184 008c 03D4 bmi .L363 2435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3185 .loc 1 2435 0 3186 008e E26D ldr r2, [r4, #92] 3187 0090 42F40052 orr r2, r2, #8192 3188 0094 E265 str r2, [r4, #92] 3189 .L363: 3190 .LVL233: 2445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 3191 .loc 1 2445 0 3192 0096 6D48 ldr r0, .L471+4 3193 .LBB728: 3194 .LBB729: 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3195 .loc 2 4537 0 3196 0098 DA6C ldr r2, [r3, #76] 3197 .LBE729: 3198 .LBE728: 3199 .LBB731: 3200 .LBB732: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3201 .loc 2 3750 0 3202 009a D968 ldr r1, [r3, #12] 3203 .LBE732: 3204 .LBE731: 2445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) ARM GAS /tmp/ccsErhU4.s page 254 3205 .loc 1 2445 0 3206 009c 8342 cmp r3, r0 3207 .LBB734: 3208 .LBB730: 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3209 .loc 2 4537 0 3210 009e 02F4C072 and r2, r2, #384 3211 .LVL234: 3212 .LBE730: 3213 .LBE734: 3214 .LBB735: 3215 .LBB733: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3216 .loc 2 3750 0 3217 00a2 01F44061 and r1, r1, #3072 3218 .LVL235: 3219 .LBE733: 3220 .LBE735: 2445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 3221 .loc 1 2445 0 3222 00a6 68D0 beq .L462 3223 .L364: 2451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3224 .loc 1 2451 0 3225 00a8 D868 ldr r0, [r3, #12] 3226 .LVL236: 3227 .L367: 2467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3228 .loc 1 2467 0 3229 00aa D2B9 cbnz r2, .L369 2469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 3230 .loc 1 2469 0 3231 00ac 8201 lsls r2, r0, #6 3232 00ae 00F1A080 bmi .L463 3233 .L370: 2474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3234 .loc 1 2474 0 3235 00b2 1A68 ldr r2, [r3] 3236 00b4 5206 lsls r2, r2, #25 3237 00b6 14D5 bpl .L369 2482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3238 .loc 1 2482 0 3239 00b8 8102 lsls r1, r0, #10 3240 00ba 12D4 bmi .L369 3241 .LVL237: 3242 .LBB736: 3243 .LBB737: 3244 .loc 2 7071 0 3245 00bc 9A68 ldr r2, [r3, #8] 3246 00be 1207 lsls r2, r2, #28 3247 00c0 00F1B880 bmi .L372 3248 .LVL238: 3249 .LBE737: 3250 .LBE736: 2489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3251 .loc 1 2489 0 3252 00c4 5A68 ldr r2, [r3, #4] ARM GAS /tmp/ccsErhU4.s page 255 3253 00c6 22F06002 bic r2, r2, #96 3254 00ca 5A60 str r2, [r3, #4] 2492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3255 .loc 1 2492 0 3256 00cc E36D ldr r3, [r4, #92] 3257 00ce 23F48053 bic r3, r3, #4096 3258 00d2 E365 str r3, [r4, #92] 2494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3259 .loc 1 2494 0 3260 00d4 E36D ldr r3, [r4, #92] 3261 00d6 D805 lsls r0, r3, #23 3262 .LVL239: 3263 00d8 03D4 bmi .L369 2496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3264 .loc 1 2496 0 3265 00da E36D ldr r3, [r4, #92] 3266 00dc 43F00103 orr r3, r3, #1 3267 00e0 E365 str r3, [r4, #92] 3268 .L369: 2521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3269 .loc 1 2521 0 3270 00e2 2046 mov r0, r4 3271 00e4 FFF7FEFF bl HAL_ADCEx_InjectedConvCpltCallback 3272 .LVL240: 2525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3273 .loc 1 2525 0 3274 00e8 2368 ldr r3, [r4] 3275 00ea 6022 movs r2, #96 3276 00ec 1A60 str r2, [r3] 3277 .L362: 2529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3278 .loc 1 2529 0 3279 00ee 2906 lsls r1, r5, #24 3280 00f0 01D5 bpl .L374 2529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3281 .loc 1 2529 0 is_stmt 0 discriminator 1 3282 00f2 3206 lsls r2, r6, #24 3283 00f4 66D4 bmi .L464 3284 .L374: 2546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3285 .loc 1 2546 0 is_stmt 1 3286 00f6 E805 lsls r0, r5, #23 3287 00f8 01D5 bpl .L375 2546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3288 .loc 1 2546 0 is_stmt 0 discriminator 1 3289 00fa F105 lsls r1, r6, #23 3290 00fc 6DD4 bmi .L465 3291 .L375: 2563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3292 .loc 1 2563 0 is_stmt 1 3293 00fe AA05 lsls r2, r5, #22 3294 0100 01D5 bpl .L376 2563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3295 .loc 1 2563 0 is_stmt 0 discriminator 1 3296 0102 B005 lsls r0, r6, #22 3297 0104 52D4 bmi .L466 3298 .L376: ARM GAS /tmp/ccsErhU4.s page 256 2580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3299 .loc 1 2580 0 is_stmt 1 3300 0106 E906 lsls r1, r5, #27 3301 0108 01D5 bpl .L377 2580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3302 .loc 1 2580 0 is_stmt 0 discriminator 1 3303 010a F206 lsls r2, r6, #27 3304 010c 0FD4 bmi .L467 3305 .L377: 2641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3306 .loc 1 2641 0 is_stmt 1 3307 010e 6805 lsls r0, r5, #21 3308 0110 01D5 bpl .L346 2641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3309 .loc 1 2641 0 is_stmt 0 discriminator 1 3310 0112 7105 lsls r1, r6, #21 3311 0114 3AD4 bmi .L468 3312 .L346: 2660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3313 .loc 1 2660 0 is_stmt 1 3314 0116 F8BD pop {r3, r4, r5, r6, r7, pc} 3315 .LVL241: 3316 .L349: 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS))) 3317 .loc 1 2334 0 discriminator 3 3318 0118 2807 lsls r0, r5, #28 3319 011a B1D5 bpl .L351 2335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3320 .loc 1 2335 0 3321 011c 3107 lsls r1, r6, #28 3322 011e 81D4 bmi .L350 2428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS))) 3323 .loc 1 2428 0 3324 0120 A806 lsls r0, r5, #26 3325 0122 AFD4 bmi .L469 3326 .L360: 2428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS))) 3327 .loc 1 2428 0 is_stmt 0 discriminator 3 3328 0124 6A06 lsls r2, r5, #25 3329 0126 E2D5 bpl .L362 2429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3330 .loc 1 2429 0 is_stmt 1 3331 0128 7006 lsls r0, r6, #25 3332 012a E0D5 bpl .L362 3333 012c ACE7 b .L361 3334 .L467: 2588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3335 .loc 1 2588 0 3336 012e E26B ldr r2, [r4, #60] 3337 0130 32B1 cbz r2, .L378 2596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3338 .loc 1 2596 0 3339 0132 002F cmp r7, #0 3340 0134 71D0 beq .L379 3341 .LVL242: 3342 .LBB738: 3343 .LBB739: ARM GAS /tmp/ccsErhU4.s page 257 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3344 .loc 2 6484 0 3345 0136 444A ldr r2, .L471 3346 0138 9268 ldr r2, [r2, #8] 3347 .LVL243: 3348 .LBE739: 3349 .LBE738: 2600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3350 .loc 1 2600 0 3351 013a 12F4604F tst r2, #57344 3352 013e 0BD0 beq .L380 3353 .L378: 2619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3354 .loc 1 2619 0 3355 0140 E36D ldr r3, [r4, #92] 3356 0142 43F48063 orr r3, r3, #1024 3357 0146 E365 str r3, [r4, #92] 2622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3358 .loc 1 2622 0 3359 0148 236E ldr r3, [r4, #96] 3360 014a 43F00203 orr r3, r3, #2 3361 014e 2366 str r3, [r4, #96] 2632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3362 .loc 1 2632 0 3363 0150 2046 mov r0, r4 3364 0152 FFF7FEFF bl HAL_ADC_ErrorCallback 3365 .LVL244: 3366 0156 2368 ldr r3, [r4] 3367 .L380: 2637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3368 .loc 1 2637 0 3369 0158 1022 movs r2, #16 3370 015a 1A60 str r2, [r3] 3371 015c D7E7 b .L377 3372 .LVL245: 3373 .L461: 2316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3374 .loc 1 2316 0 3375 015e C36D ldr r3, [r0, #92] 3376 0160 D806 lsls r0, r3, #27 3377 .LVL246: 3378 0162 03D4 bmi .L348 2319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3379 .loc 1 2319 0 3380 0164 E36D ldr r3, [r4, #92] 3381 0166 43F40063 orr r3, r3, #2048 3382 016a E365 str r3, [r4, #92] 3383 .L348: 2326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3384 .loc 1 2326 0 3385 016c 2046 mov r0, r4 3386 016e FFF7FEFF bl HAL_ADCEx_EndOfSamplingCallback 3387 .LVL247: 2330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3388 .loc 1 2330 0 3389 0172 2368 ldr r3, [r4] 3390 0174 0222 movs r2, #2 ARM GAS /tmp/ccsErhU4.s page 258 3391 0176 1A60 str r2, [r3] 3392 0178 50E7 b .L347 3393 .L462: 2446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 3394 .loc 1 2446 0 3395 017a 002F cmp r7, #0 3396 017c 94D0 beq .L364 2447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 3397 .loc 1 2447 0 3398 017e B81F subs r0, r7, #6 3399 0180 0128 cmp r0, #1 3400 0182 91D9 bls .L364 3401 .LVL248: 2456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3402 .loc 1 2456 0 discriminator 4 3403 0184 4FF0A040 mov r0, #1342177280 3404 0188 C068 ldr r0, [r0, #12] 3405 .LVL249: 3406 018a 8EE7 b .L367 3407 .LVL250: 3408 .L468: 2644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3409 .loc 1 2644 0 3410 018c E26D ldr r2, [r4, #92] 3411 018e 42F48042 orr r2, r2, #16384 3412 0192 E265 str r2, [r4, #92] 2647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3413 .loc 1 2647 0 3414 0194 226E ldr r2, [r4, #96] 2650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3415 .loc 1 2650 0 3416 0196 4FF48061 mov r1, #1024 2647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3417 .loc 1 2647 0 3418 019a 42F00802 orr r2, r2, #8 3419 019e 2266 str r2, [r4, #96] 2656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3420 .loc 1 2656 0 3421 01a0 2046 mov r0, r4 2650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3422 .loc 1 2650 0 3423 01a2 1960 str r1, [r3] 2660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3424 .loc 1 2660 0 3425 01a4 BDE8F840 pop {r3, r4, r5, r6, r7, lr} 3426 .LCFI21: 3427 .cfi_remember_state 3428 .cfi_restore 14 3429 .cfi_restore 7 3430 .cfi_restore 6 3431 .cfi_restore 5 3432 .cfi_restore 4 3433 .cfi_restore 3 3434 .cfi_def_cfa_offset 0 3435 .LVL251: 2656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3436 .loc 1 2656 0 ARM GAS /tmp/ccsErhU4.s page 259 3437 01a8 FFF7FEBF b HAL_ADCEx_InjectedQueueOverflowCallback 3438 .LVL252: 3439 .L466: 3440 .LCFI22: 3441 .cfi_restore_state 2566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3442 .loc 1 2566 0 3443 01ac E36D ldr r3, [r4, #92] 3444 01ae 43F48023 orr r3, r3, #262144 3445 01b2 E365 str r3, [r4, #92] 2572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3446 .loc 1 2572 0 3447 01b4 2046 mov r0, r4 3448 01b6 FFF7FEFF bl HAL_ADCEx_LevelOutOfWindow3Callback 3449 .LVL253: 2576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3450 .loc 1 2576 0 3451 01ba 2368 ldr r3, [r4] 3452 01bc 4FF40072 mov r2, #512 3453 01c0 1A60 str r2, [r3] 3454 01c2 A0E7 b .L376 3455 .L464: 2532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3456 .loc 1 2532 0 3457 01c4 E36D ldr r3, [r4, #92] 3458 01c6 43F48033 orr r3, r3, #65536 3459 01ca E365 str r3, [r4, #92] 2538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3460 .loc 1 2538 0 3461 01cc 2046 mov r0, r4 3462 01ce FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback 3463 .LVL254: 2542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3464 .loc 1 2542 0 3465 01d2 2368 ldr r3, [r4] 3466 01d4 8022 movs r2, #128 3467 01d6 1A60 str r2, [r3] 3468 01d8 8DE7 b .L374 3469 .L465: 2549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3470 .loc 1 2549 0 3471 01da E36D ldr r3, [r4, #92] 3472 01dc 43F40033 orr r3, r3, #131072 3473 01e0 E365 str r3, [r4, #92] 2555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3474 .loc 1 2555 0 3475 01e2 2046 mov r0, r4 3476 01e4 FFF7FEFF bl HAL_ADCEx_LevelOutOfWindow2Callback 3477 .LVL255: 2559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3478 .loc 1 2559 0 3479 01e8 2368 ldr r3, [r4] 3480 01ea 4FF48072 mov r2, #256 3481 01ee 1A60 str r2, [r3] 3482 01f0 85E7 b .L375 3483 .LVL256: 3484 .L463: ARM GAS /tmp/ccsErhU4.s page 260 2469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 3485 .loc 1 2469 0 discriminator 1 3486 01f2 0029 cmp r1, #0 3487 01f4 7FF475AF bne .L369 2470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))) 3488 .loc 1 2470 0 3489 01f8 8104 lsls r1, r0, #18 3490 01fa 3FF572AF bmi .L369 3491 01fe 58E7 b .L370 3492 .LVL257: 3493 .L355: 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 3494 .loc 1 2354 0 3495 0200 092F cmp r7, #9 3496 0202 03D9 bls .L470 3497 .L382: 3498 .LVL258: 2366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3499 .loc 1 2366 0 discriminator 4 3500 0204 4FF0A042 mov r2, #1342177280 3501 0208 D268 ldr r2, [r2, #12] 3502 .LVL259: 3503 020a 1BE7 b .L356 3504 .LVL260: 3505 .L470: 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) 3506 .loc 1 2354 0 3507 020c 40F22122 movw r2, #545 3508 0210 FA40 lsrs r2, r2, r7 3509 0212 D207 lsls r2, r2, #31 3510 0214 3FF515AF bmi .L383 3511 0218 F4E7 b .L382 3512 .L379: 2609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3513 .loc 1 2609 0 3514 021a DA68 ldr r2, [r3, #12] 3515 021c D707 lsls r7, r2, #31 3516 021e 9BD5 bpl .L380 3517 0220 8EE7 b .L378 3518 .LVL261: 3519 .L358: 2399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3520 .loc 1 2399 0 3521 0222 E36D ldr r3, [r4, #92] 3522 0224 43F01003 orr r3, r3, #16 3523 0228 E365 str r3, [r4, #92] 2402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3524 .loc 1 2402 0 3525 022a 236E ldr r3, [r4, #96] 3526 022c 43F00103 orr r3, r3, #1 3527 0230 2366 str r3, [r4, #96] 3528 0232 1FE7 b .L354 3529 .LVL262: 3530 .L372: 2502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3531 .loc 1 2502 0 3532 0234 E36D ldr r3, [r4, #92] ARM GAS /tmp/ccsErhU4.s page 261 3533 0236 43F01003 orr r3, r3, #16 3534 023a E365 str r3, [r4, #92] 2505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3535 .loc 1 2505 0 3536 023c 236E ldr r3, [r4, #96] 3537 023e 43F00103 orr r3, r3, #1 3538 0242 2366 str r3, [r4, #96] 3539 0244 4DE7 b .L369 3540 .L472: 3541 0246 00BF .align 2 3542 .L471: 3543 0248 00030050 .word 1342178048 3544 024c 00010050 .word 1342177536 3545 .cfi_endproc 3546 .LFE344: 3548 .section .text.ADC_DMAConvCplt,"ax",%progbits 3549 .align 1 3550 .p2align 2,,3 3551 .global ADC_DMAConvCplt 3552 .syntax unified 3553 .thumb 3554 .thumb_func 3555 .fpu fpv4-sp-d16 3557 ADC_DMAConvCplt: 3558 .LFB356: 3564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3559 .loc 1 3564 0 3560 .cfi_startproc 3561 @ args = 0, pretend = 0, frame = 0 3562 @ frame_needed = 0, uses_anonymous_args = 0 3563 .LVL263: 3566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3564 .loc 1 3566 0 3565 0000 836A ldr r3, [r0, #40] 3566 .LVL264: 3569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3567 .loc 1 3569 0 3568 0002 DA6D ldr r2, [r3, #92] 3569 0004 12F0500F tst r2, #80 3564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3570 .loc 1 3564 0 3571 0008 10B5 push {r4, lr} 3572 .LCFI23: 3573 .cfi_def_cfa_offset 8 3574 .cfi_offset 4, -8 3575 .cfi_offset 14, -4 3572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3576 .loc 1 3572 0 3577 000a DA6D ldr r2, [r3, #92] 3569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3578 .loc 1 3569 0 3579 000c 1DD1 bne .L474 3578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3580 .loc 1 3578 0 3581 000e 1968 ldr r1, [r3] 3572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3582 .loc 1 3572 0 ARM GAS /tmp/ccsErhU4.s page 262 3583 0010 42F40072 orr r2, r2, #512 3584 0014 DA65 str r2, [r3, #92] 3578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3585 .loc 1 3578 0 3586 0016 0A68 ldr r2, [r1] 3587 0018 12F0080F tst r2, #8 3588 .LBB740: 3589 .LBB741: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3590 .loc 2 3750 0 3591 001c CA68 ldr r2, [r1, #12] 3592 .LBE741: 3593 .LBE740: 3578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3594 .loc 1 3578 0 3595 001e 1BD0 beq .L475 3596 .LVL265: 3597 .LBB743: 3598 .LBB742: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3599 .loc 2 3750 0 3600 0020 12F4406F tst r2, #3072 3601 0024 0DD1 bne .L477 3602 .LVL266: 3603 .LBE742: 3604 .LBE743: 3584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3605 .loc 1 3584 0 3606 0026 CA68 ldr r2, [r1, #12] 3607 0028 9404 lsls r4, r2, #18 3608 002a 0AD4 bmi .L477 3609 .LVL267: 3610 .L484: 3602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) 3611 .loc 1 3602 0 3612 002c DA6D ldr r2, [r3, #92] 3613 002e 22F48072 bic r2, r2, #256 3614 0032 DA65 str r2, [r3, #92] 3603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3615 .loc 1 3603 0 3616 0034 DA6D ldr r2, [r3, #92] 3617 0036 D104 lsls r1, r2, #19 3618 0038 03D4 bmi .L477 3605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3619 .loc 1 3605 0 3620 003a DA6D ldr r2, [r3, #92] 3621 003c 42F00102 orr r2, r2, #1 3622 0040 DA65 str r2, [r3, #92] 3623 .L477: 3614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3624 .loc 1 3614 0 3625 0042 1846 mov r0, r3 3626 0044 FFF7FEFF bl HAL_ADC_ConvCpltCallback 3627 .LVL268: 3634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3628 .loc 1 3634 0 3629 0048 10BD pop {r4, pc} ARM GAS /tmp/ccsErhU4.s page 263 3630 .LVL269: 3631 .L474: 3619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3632 .loc 1 3619 0 3633 004a D206 lsls r2, r2, #27 3634 004c 07D4 bmi .L485 3631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3635 .loc 1 3631 0 3636 004e 5B6D ldr r3, [r3, #84] 3637 .LVL270: 3634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3638 .loc 1 3634 0 3639 0050 BDE81040 pop {r4, lr} 3640 .LCFI24: 3641 .cfi_remember_state 3642 .cfi_restore 14 3643 .cfi_restore 4 3644 .cfi_def_cfa_offset 0 3631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3645 .loc 1 3631 0 3646 0054 5B6B ldr r3, [r3, #52] 3647 0056 1847 bx r3 @ indirect register sibling call 3648 .LVL271: 3649 .L475: 3650 .LCFI25: 3651 .cfi_restore_state 3599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3652 .loc 1 3599 0 3653 0058 9007 lsls r0, r2, #30 3654 .LVL272: 3655 005a F2D4 bmi .L477 3656 005c E6E7 b .L484 3657 .LVL273: 3658 .L485: 3625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3659 .loc 1 3625 0 3660 005e 1846 mov r0, r3 3661 .LVL274: 3662 0060 FFF7FEFF bl HAL_ADC_ErrorCallback 3663 .LVL275: 3634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3664 .loc 1 3634 0 3665 0064 10BD pop {r4, pc} 3666 .cfi_endproc 3667 .LFE356: 3669 0066 00BF .section .text.ADC_DMAError,"ax",%progbits 3670 .align 1 3671 .p2align 2,,3 3672 .global ADC_DMAError 3673 .syntax unified 3674 .thumb 3675 .thumb_func 3676 .fpu fpv4-sp-d16 3678 ADC_DMAError: 3679 .LFB358: 3653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /** ARM GAS /tmp/ccsErhU4.s page 264 3655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @brief DMA error callback. 3656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @param hdma pointer to DMA handle. 3657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** * @retval None 3658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** */ 3659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** void ADC_DMAError(DMA_HandleTypeDef *hdma) 3660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3680 .loc 1 3660 0 3681 .cfi_startproc 3682 @ args = 0, pretend = 0, frame = 0 3683 @ frame_needed = 0, uses_anonymous_args = 0 3684 .LVL276: 3661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 3685 .loc 1 3662 0 3686 0000 806A ldr r0, [r0, #40] 3687 .LVL277: 3660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ 3688 .loc 1 3660 0 3689 0002 08B5 push {r3, lr} 3690 .LCFI26: 3691 .cfi_def_cfa_offset 8 3692 .cfi_offset 3, -8 3693 .cfi_offset 14, -4 3663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC state */ 3665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 3694 .loc 1 3665 0 3695 0004 C36D ldr r3, [r0, #92] 3696 0006 43F04003 orr r3, r3, #64 3697 000a C365 str r3, [r0, #92] 3666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Set ADC error code to DMA error */ 3668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 3698 .loc 1 3668 0 3699 000c 036E ldr r3, [r0, #96] 3700 000e 43F00403 orr r3, r3, #4 3701 0012 0366 str r3, [r0, #96] 3669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Error callback */ 3671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) 3672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** hadc->ErrorCallback(hadc); 3673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #else 3674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); 3702 .loc 1 3674 0 3703 0014 FFF7FEFF bl HAL_ADC_ErrorCallback 3704 .LVL278: 3675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 3676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 3705 .loc 1 3676 0 3706 0018 08BD pop {r3, pc} 3707 .cfi_endproc 3708 .LFE358: 3710 001a 00BF .section .text.HAL_ADC_ConfigChannel,"ax",%progbits 3711 .align 1 3712 .p2align 2,,3 3713 .global HAL_ADC_ConfigChannel 3714 .syntax unified ARM GAS /tmp/ccsErhU4.s page 265 3715 .thumb 3716 .thumb_func 3717 .fpu fpv4-sp-d16 3719 HAL_ADC_ConfigChannel: 3720 .LFB349: 2766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3721 .loc 1 2766 0 3722 .cfi_startproc 3723 @ args = 0, pretend = 0, frame = 8 3724 @ frame_needed = 0, uses_anonymous_args = 0 3725 .LVL279: 3726 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 3727 .LCFI27: 3728 .cfi_def_cfa_offset 24 3729 .cfi_offset 4, -24 3730 .cfi_offset 5, -20 3731 .cfi_offset 6, -16 3732 .cfi_offset 7, -12 3733 .cfi_offset 8, -8 3734 .cfi_offset 14, -4 3735 0004 0346 mov r3, r0 3736 0006 82B0 sub sp, sp, #8 3737 .LCFI28: 3738 .cfi_def_cfa_offset 32 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3739 .loc 1 2797 0 3740 0008 93F85820 ldrb r2, [r3, #88] @ zero_extendqisi2 2770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3741 .loc 1 2770 0 3742 000c 0020 movs r0, #0 3743 .LVL280: 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3744 .loc 1 2797 0 3745 000e 012A cmp r2, #1 2770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3746 .loc 1 2770 0 3747 0010 0190 str r0, [sp, #4] 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3748 .loc 1 2797 0 3749 0012 00F01181 beq .L540 2804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3750 .loc 1 2804 0 discriminator 2 3751 0016 1A68 ldr r2, [r3] 3752 .LVL281: 3753 .LBB744: 3754 .LBB745: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3755 .loc 2 6846 0 discriminator 2 3756 0018 9468 ldr r4, [r2, #8] 3757 .LBE745: 3758 .LBE744: 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3759 .loc 1 2797 0 discriminator 2 3760 001a 0120 movs r0, #1 3761 .LBB748: 3762 .LBB746: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccsErhU4.s page 266 3763 .loc 2 6846 0 discriminator 2 3764 001c 6507 lsls r5, r4, #29 3765 .LBE746: 3766 .LBE748: 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3767 .loc 1 2797 0 discriminator 2 3768 001e 83F85800 strb r0, [r3, #88] 3769 .LBB749: 3770 .LBB747: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3771 .loc 2 6846 0 discriminator 2 3772 0022 4FD4 bmi .L574 3773 .LVL282: 3774 .LBE747: 3775 .LBE749: 3776 .LBB750: 3777 .LBB751: 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 3778 .loc 2 4100 0 3779 0024 D1E90004 ldrd r0, r4, [r1] 4098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3780 .loc 2 4098 0 3781 0028 A609 lsrs r6, r4, #6 3782 002a 06F00C06 and r6, r6, #12 3783 002e 02F13005 add r5, r2, #48 3784 .LVL283: 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 3785 .loc 2 4100 0 3786 0032 04F01F04 and r4, r4, #31 3787 0036 7759 ldr r7, [r6, r5] 3788 0038 4FF01F0C mov ip, #31 3789 003c 0CFA04FC lsl ip, ip, r4 3790 0040 C0F38460 ubfx r0, r0, #26, #5 3791 0044 A040 lsls r0, r0, r4 3792 0046 27EA0C07 bic r7, r7, ip 3793 004a 3843 orrs r0, r0, r7 3794 004c 7051 str r0, [r6, r5] 3795 .LVL284: 3796 .LBE751: 3797 .LBE750: 3798 .LBB752: 3799 .LBB753: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3800 .loc 2 6846 0 3801 004e 9068 ldr r0, [r2, #8] 3802 0050 4407 lsls r4, r0, #29 3803 0052 49D5 bpl .L575 3804 .LVL285: 3805 .LBE753: 3806 .LBE752: 3807 .LBB754: 3808 .LBB755: 3809 .loc 2 7071 0 3810 0054 9068 ldr r0, [r2, #8] 3811 0056 0C68 ldr r4, [r1] 3812 .LVL286: 3813 .L498: ARM GAS /tmp/ccsErhU4.s page 267 3814 .LBE755: 3815 .LBE754: 3816 .LBB757: 3817 .LBB758: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3818 .loc 2 6724 0 3819 0058 9068 ldr r0, [r2, #8] 3820 005a C007 lsls r0, r0, #31 3821 005c 13D4 bmi .L515 3822 .LVL287: 3823 .LBE758: 3824 .LBE757: 2888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3825 .loc 1 2888 0 3826 005e CE68 ldr r6, [r1, #12] 3827 .LVL288: 3828 .LBB759: 3829 .LBB760: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 3830 .loc 2 5501 0 3831 0060 C748 ldr r0, .L582 3832 0062 D2F8B050 ldr r5, [r2, #176] 3833 .LBE760: 3834 .LBE759: 2891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3835 .loc 1 2891 0 3836 0066 DFF840C3 ldr ip, .L582+40 3837 .LBB763: 3838 .LBB761: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 3839 .loc 2 5501 0 3840 006a 06F01807 and r7, r6, #24 3841 006e F840 lsrs r0, r0, r7 3842 0070 C4F31207 ubfx r7, r4, #0, #19 3843 0074 2040 ands r0, r0, r4 3844 0076 25EA0705 bic r5, r5, r7 3845 007a 2843 orrs r0, r0, r5 3846 .LBE761: 3847 .LBE763: 2891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3848 .loc 1 2891 0 3849 007c 6645 cmp r6, ip 3850 .LBB764: 3851 .LBB762: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 3852 .loc 2 5501 0 3853 007e C2F8B000 str r0, [r2, #176] 3854 .LVL289: 3855 .LBE762: 3856 .LBE764: 2891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3857 .loc 1 2891 0 3858 0082 00F08B80 beq .L576 3859 .L515: 2908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3860 .loc 1 2908 0 3861 0086 BF49 ldr r1, .L582+4 ARM GAS /tmp/ccsErhU4.s page 268 3862 .LVL290: 3863 0088 0C42 tst r4, r1 3864 008a 2BD0 beq .L533 3865 .LVL291: 3866 .LBB765: 3867 .LBB766: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3868 .loc 2 2880 0 3869 008c BE4D ldr r5, .L582+8 3870 .LBE766: 3871 .LBE765: 2914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 3872 .loc 1 2914 0 3873 008e BF49 ldr r1, .L582+12 3874 .LBB769: 3875 .LBB767: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3876 .loc 2 2880 0 3877 0090 A868 ldr r0, [r5, #8] 3878 .LBE767: 3879 .LBE769: 2914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 3880 .loc 1 2914 0 3881 0092 8C42 cmp r4, r1 3882 .LBB770: 3883 .LBB768: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3884 .loc 2 2880 0 3885 0094 00F0E076 and r6, r0, #29360128 3886 .LVL292: 3887 .LBE768: 3888 .LBE770: 2914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 3889 .loc 1 2914 0 3890 0098 1ED0 beq .L531 2914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 3891 .loc 1 2914 0 is_stmt 0 discriminator 1 3892 009a BD49 ldr r1, .L582+16 3893 009c 8C42 cmp r4, r1 3894 009e 1BD0 beq .L531 2934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3895 .loc 1 2934 0 is_stmt 1 3896 00a0 BC49 ldr r1, .L582+20 3897 00a2 8C42 cmp r4, r1 3898 00a4 40F0CC80 bne .L535 2934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3899 .loc 1 2934 0 is_stmt 0 discriminator 1 3900 00a8 10F08070 ands r0, r0, #16777216 3901 00ac 1AD1 bne .L533 2936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3902 .loc 1 2936 0 is_stmt 1 3903 00ae BA49 ldr r1, .L582+24 3904 00b0 8A42 cmp r2, r1 3905 00b2 17D0 beq .L533 3906 .LVL293: 3907 .LBB771: 3908 .LBB772: ARM GAS /tmp/ccsErhU4.s page 269 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3909 .loc 2 2799 0 3910 00b4 AA68 ldr r2, [r5, #8] 3911 00b6 22F0E072 bic r2, r2, #29360128 3912 00ba 1643 orrs r6, r6, r2 3913 .LVL294: 3914 00bc 46F08076 orr r6, r6, #16777216 3915 00c0 AE60 str r6, [r5, #8] 3916 00c2 03E0 b .L491 3917 .LVL295: 3918 .L574: 3919 .LBE772: 3920 .LBE771: 2964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3921 .loc 1 2964 0 3922 00c4 DA6D ldr r2, [r3, #92] 3923 00c6 42F02002 orr r2, r2, #32 3924 00ca DA65 str r2, [r3, #92] 3925 .LVL296: 3926 .L491: 2970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3927 .loc 1 2970 0 3928 00cc 0022 movs r2, #0 3929 00ce 83F85820 strb r2, [r3, #88] 2974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3930 .loc 1 2974 0 3931 00d2 02B0 add sp, sp, #8 3932 .LCFI29: 3933 .cfi_remember_state 3934 .cfi_def_cfa_offset 24 3935 @ sp needed 3936 00d4 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 3937 .LVL297: 3938 .L531: 3939 .LCFI30: 3940 .cfi_restore_state 2915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3941 .loc 1 2915 0 3942 00d8 0102 lsls r1, r0, #8 3943 00da 03D4 bmi .L533 2917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3944 .loc 1 2917 0 3945 00dc B2F1A04F cmp r2, #1342177280 3946 00e0 00F0D380 beq .L577 3947 .L533: 2767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tmpOffsetShifted; 3948 .loc 1 2767 0 3949 00e4 0020 movs r0, #0 3950 00e6 F1E7 b .L491 3951 .LVL298: 3952 .L575: 3953 .LBB773: 3954 .LBB756: 3955 .loc 2 7071 0 3956 00e8 9568 ldr r5, [r2, #8] 3957 00ea 0C68 ldr r4, [r1] 3958 00ec 15F00805 ands r5, r5, #8 ARM GAS /tmp/ccsErhU4.s page 270 3959 00f0 B2D1 bne .L498 3960 .LVL299: 3961 .LBE756: 3962 .LBE773: 2821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3963 .loc 1 2821 0 3964 00f2 8E68 ldr r6, [r1, #8] 3965 00f4 C4F3045E ubfx lr, r4, #20, #5 3966 00f8 0720 movs r0, #7 3967 00fa E40D lsrs r4, r4, #23 3968 00fc 00FA0EF0 lsl r0, r0, lr 3969 0100 B6F1004F cmp r6, #-2147483648 3970 0104 04F00404 and r4, r4, #4 3971 0108 6FEA0000 mvn r0, r0 3972 010c 02F1140C add ip, r2, #20 3973 0110 00F0DA80 beq .L578 3974 .LVL300: 3975 .LBB774: 3976 .LBB775: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 3977 .loc 2 5339 0 3978 0114 54F80C70 ldr r7, [r4, ip] 3979 0118 06FA0EF6 lsl r6, r6, lr 3980 .LVL301: 3981 011c 3840 ands r0, r0, r7 3982 011e 0643 orrs r6, r6, r0 3983 0120 44F80C60 str r6, [r4, ip] 3984 .LVL302: 3985 .LBE775: 3986 .LBE774: 3987 .LBB776: 3988 .LBB777: 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3989 .loc 2 3563 0 3990 0124 5069 ldr r0, [r2, #20] 3991 0126 20F00040 bic r0, r0, #-2147483648 3992 012a 5061 str r0, [r2, #20] 3993 .LVL303: 3994 .L495: 3995 .LBE777: 3996 .LBE776: 2844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 3997 .loc 1 2844 0 3998 012c D1F810C0 ldr ip, [r1, #16] 2842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 3999 .loc 1 2842 0 4000 0130 D768 ldr r7, [r2, #12] 4001 .LVL304: 4002 0132 0C68 ldr r4, [r1] 2844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4003 .loc 1 2844 0 4004 0134 BCF1040F cmp ip, #4 4005 0138 02F16000 add r0, r2, #96 4006 013c 00F0CE80 beq .L496 4007 .LVL305: 2842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4008 .loc 1 2842 0 ARM GAS /tmp/ccsErhU4.s page 271 4009 0140 4E69 ldr r6, [r1, #20] 4010 .LBB778: 4011 .LBB779: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 4012 .loc 2 3225 0 4013 0142 50F82C80 ldr r8, [r0, ip, lsl #2] 4014 0146 DFF864E2 ldr lr, .L582+44 4015 .LBE779: 4016 .LBE778: 2842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4017 .loc 1 2842 0 4018 014a C7F3C107 ubfx r7, r7, #3, #2 4019 .LVL306: 4020 014e 7F00 lsls r7, r7, #1 4021 .LBB782: 4022 .LBB780: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 4023 .loc 2 3225 0 4024 0150 04F0F844 and r4, r4, #2080374784 4025 .LVL307: 4026 0154 44F00044 orr r4, r4, #-2147483648 4027 .LBE780: 4028 .LBE782: 2842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4029 .loc 1 2842 0 4030 0158 BE40 lsls r6, r6, r7 4031 .LBB783: 4032 .LBB781: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 4033 .loc 2 3225 0 4034 015a 2643 orrs r6, r6, r4 4035 015c 08EA0E0E and lr, r8, lr 4036 0160 46EA0E06 orr r6, r6, lr 4037 0164 40F82C60 str r6, [r0, ip, lsl #2] 4038 .LVL308: 4039 .LBE781: 4040 .LBE783: 4041 .LBB784: 4042 .LBB785: 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4043 .loc 2 3420 0 4044 0168 0F69 ldr r7, [r1, #16] 4045 .LVL309: 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 4046 .loc 2 3422 0 4047 016a 8E69 ldr r6, [r1, #24] 4048 016c 50F82740 ldr r4, [r0, r7, lsl #2] 4049 .LBE785: 4050 .LBE784: 2853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4051 .loc 1 2853 0 4052 0170 91F81CC0 ldrb ip, [r1, #28] @ zero_extendqisi2 4053 .LBB787: 4054 .LBB786: 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 4055 .loc 2 3422 0 4056 0174 24F08074 bic r4, r4, #16777216 ARM GAS /tmp/ccsErhU4.s page 272 4057 0178 3443 orrs r4, r4, r6 4058 017a 40F82740 str r4, [r0, r7, lsl #2] 4059 .LVL310: 4060 .LBE786: 4061 .LBE787: 2853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4062 .loc 1 2853 0 4063 017e 0E69 ldr r6, [r1, #16] 4064 .LBB788: 4065 .LBB789: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 4066 .loc 2 3477 0 4067 0180 50F82640 ldr r4, [r0, r6, lsl #2] 4068 .LBE789: 4069 .LBE788: 2853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4070 .loc 1 2853 0 4071 0184 BCF1010F cmp ip, #1 4072 .LBB792: 4073 .LBB790: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 4074 .loc 2 3477 0 4075 0188 24F00074 bic r4, r4, #33554432 4076 .LBE790: 4077 .LBE792: 2853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4078 .loc 1 2853 0 4079 018c 08BF it eq 4080 018e 4FF00075 moveq r5, #33554432 4081 .LVL311: 4082 .LBB793: 4083 .LBB791: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 4084 .loc 2 3477 0 4085 0192 2543 orrs r5, r5, r4 4086 .LVL312: 4087 0194 40F82650 str r5, [r0, r6, lsl #2] 4088 0198 0C68 ldr r4, [r1] 4089 019a 5DE7 b .L498 4090 .LVL313: 4091 .L576: 4092 .LBE791: 4093 .LBE793: 2896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sConfig->SamplingTime); 4094 .loc 1 2896 0 4095 019c 002F cmp r7, #0 4096 019e 63D0 beq .L579 4097 .LVL314: 4098 .LBB794: 4099 .LBB795: 4100 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ ARM GAS /tmp/ccsErhU4.s page 273 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccsErhU4.s page 274 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ ARM GAS /tmp/ccsErhU4.s page 275 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE ARM GAS /tmp/ccsErhU4.s page 276 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccsErhU4.s page 277 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/ccsErhU4.s page 278 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccsErhU4.s page 279 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccsErhU4.s page 280 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value ARM GAS /tmp/ccsErhU4.s page 281 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); ARM GAS /tmp/ccsErhU4.s page 282 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccsErhU4.s page 283 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. ARM GAS /tmp/ccsErhU4.s page 284 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccsErhU4.s page 285 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccsErhU4.s page 286 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) ARM GAS /tmp/ccsErhU4.s page 287 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ ARM GAS /tmp/ccsErhU4.s page 288 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccsErhU4.s page 289 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; ARM GAS /tmp/ccsErhU4.s page 290 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccsErhU4.s page 291 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 4101 .loc 3 1055 0 discriminator 2 4102 .syntax unified 4103 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4104 01a0 94FAA4F0 rbit r0, r4 4105 @ 0 "" 2 4106 .LVL315: 4107 .thumb 4108 .syntax unified 4109 .LBE795: 4110 .LBE794: 4111 .LBB796: 4112 .LBB797: 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccsErhU4.s page 292 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 4113 .loc 3 1089 0 discriminator 2 4114 01a4 0028 cmp r0, #0 4115 01a6 00F02381 beq .L519 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 4116 .loc 3 1093 0 4117 01aa B0FA80F0 clz r0, r0 4118 .LBE797: 4119 .LBE796: 2895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_T 4120 .loc 1 2895 0 4121 01ae 0130 adds r0, r0, #1 4122 01b0 00F01F00 and r0, r0, #31 4123 01b4 0928 cmp r0, #9 4124 01b6 40F21B81 bls .L519 4125 .LVL316: 4126 .LBB798: 4127 .LBB799: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4128 .loc 3 1055 0 discriminator 14 4129 .syntax unified 4130 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4131 01ba 94FAA4F0 rbit r0, r4 4132 @ 0 "" 2 4133 .LVL317: 4134 .thumb 4135 .syntax unified 4136 .LBE799: 4137 .LBE798: 4138 .LBB800: 4139 .LBB801: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4140 .loc 3 1089 0 discriminator 14 4141 01be 0028 cmp r0, #0 4142 01c0 00F04181 beq .L544 4143 .loc 3 1093 0 4144 01c4 B0FA80F0 clz r0, r0 4145 01c8 0130 adds r0, r0, #1 4146 01ca 8006 lsls r0, r0, #26 4147 01cc 00F0F840 and r0, r0, #2080374784 4148 .L527: 4149 .LVL318: 4150 .LBE801: ARM GAS /tmp/ccsErhU4.s page 293 4151 .LBE800: 4152 .LBB803: 4153 .LBB804: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4154 .loc 3 1055 0 4155 .syntax unified 4156 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4157 01d0 94FAA4F5 rbit r5, r4 4158 @ 0 "" 2 4159 .LVL319: 4160 .thumb 4161 .syntax unified 4162 .LBE804: 4163 .LBE803: 4164 .LBB805: 4165 .LBB806: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4166 .loc 3 1089 0 4167 01d4 002D cmp r5, #0 4168 01d6 00F03B81 beq .L545 4169 .loc 3 1093 0 4170 01da B5FA85F5 clz r5, r5 4171 01de 0135 adds r5, r5, #1 4172 01e0 05F01F05 and r5, r5, #31 4173 01e4 0126 movs r6, #1 4174 01e6 06FA05F5 lsl r5, r6, r5 4175 .L528: 4176 .LBE806: 4177 .LBE805: 2896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sConfig->SamplingTime); 4178 .loc 1 2896 0 4179 01ea 2843 orrs r0, r0, r5 4180 .LVL320: 4181 .LBB808: 4182 .LBB809: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4183 .loc 3 1055 0 4184 .syntax unified 4185 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4186 01ec 94FAA4F4 rbit r4, r4 4187 @ 0 "" 2 4188 .LVL321: 4189 .thumb 4190 .syntax unified 4191 .LBE809: 4192 .LBE808: 4193 .LBB810: 4194 .LBB811: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4195 .loc 3 1089 0 4196 01f0 002C cmp r4, #0 4197 01f2 00F02B81 beq .L546 4198 .loc 3 1093 0 4199 01f6 B4FA84F4 clz r4, r4 4200 01fa 0134 adds r4, r4, #1 4201 01fc 04F01F04 and r4, r4, #31 4202 0200 04EB4404 add r4, r4, r4, lsl #1 ARM GAS /tmp/ccsErhU4.s page 294 4203 .L573: 4204 0204 1E3C subs r4, r4, #30 4205 0206 2405 lsls r4, r4, #20 4206 0208 44F00074 orr r4, r4, #33554432 4207 .L526: 4208 .LVL322: 4209 .LBE811: 4210 .LBE810: 2895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_T 4211 .loc 1 2895 0 discriminator 2 4212 020c 2043 orrs r0, r0, r4 4213 .LVL323: 4214 .LBB813: 4215 .LBB814: 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4216 .loc 2 5337 0 discriminator 2 4217 020e C70D lsrs r7, r0, #23 4218 0210 07F00407 and r7, r7, #4 4219 0214 02F11405 add r5, r2, #20 4220 .LVL324: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 4221 .loc 2 5339 0 discriminator 2 4222 0218 C0F30450 ubfx r0, r0, #20, #5 4223 .LVL325: 4224 021c 7C59 ldr r4, [r7, r5] 4225 021e 8E68 ldr r6, [r1, #8] 4226 0220 4FF0070C mov ip, #7 4227 0224 0CFA00FC lsl ip, ip, r0 4228 0228 24EA0C04 bic r4, r4, ip 4229 022c 06FA00F0 lsl r0, r6, r0 4230 0230 2043 orrs r0, r0, r4 4231 0232 7851 str r0, [r7, r5] 4232 .LVL326: 4233 0234 0C68 ldr r4, [r1] 4234 0236 26E7 b .L515 4235 .LVL327: 4236 .L540: 4237 .LBE814: 4238 .LBE813: 2797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4239 .loc 1 2797 0 4240 0238 0220 movs r0, #2 2974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4241 .loc 1 2974 0 4242 023a 02B0 add sp, sp, #8 4243 .LCFI31: 4244 .cfi_remember_state 4245 .cfi_def_cfa_offset 24 4246 @ sp needed 4247 023c BDE8F081 pop {r4, r5, r6, r7, r8, pc} 4248 .LVL328: 4249 .L535: 4250 .LCFI32: 4251 .cfi_restore_state 2942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 4252 .loc 1 2942 0 4253 0240 5649 ldr r1, .L582+28 ARM GAS /tmp/ccsErhU4.s page 295 4254 0242 8C42 cmp r4, r1 4255 0244 7FF44EAF bne .L533 2943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4256 .loc 1 2943 0 4257 0248 10F48000 ands r0, r0, #4194304 4258 024c 7FF44AAF bne .L533 2945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4259 .loc 1 2945 0 4260 0250 5149 ldr r1, .L582+24 4261 0252 8A42 cmp r2, r1 4262 0254 3FF446AF beq .L533 4263 .LVL329: 4264 .LBB815: 4265 .LBB816: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4266 .loc 2 2799 0 4267 0258 AA68 ldr r2, [r5, #8] 4268 025a 22F0E072 bic r2, r2, #29360128 4269 025e 3243 orrs r2, r2, r6 4270 0260 42F48002 orr r2, r2, #4194304 4271 0264 AA60 str r2, [r5, #8] 4272 0266 31E7 b .L491 4273 .LVL330: 4274 .L579: 4275 .LBE816: 4276 .LBE815: 2896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sConfig->SamplingTime); 4277 .loc 1 2896 0 discriminator 1 4278 0268 A40E lsrs r4, r4, #26 4279 026a 0134 adds r4, r4, #1 4280 026c 04F01F05 and r5, r4, #31 4281 0270 A006 lsls r0, r4, #26 4282 0272 0124 movs r4, #1 4283 0274 AC40 lsls r4, r4, r5 4284 0276 00F0F840 and r0, r0, #2080374784 2895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_T 4285 .loc 1 2895 0 discriminator 1 4286 027a 092D cmp r5, #9 4287 027c 40EA0400 orr r0, r0, r4 4288 0280 05EB4504 add r4, r5, r5, lsl #1 4289 0284 BED8 bhi .L573 4290 .L572: 4291 0286 2405 lsls r4, r4, #20 4292 0288 C0E7 b .L526 4293 .LVL331: 4294 .L577: 4295 .LBB817: 4296 .LBB818: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4297 .loc 2 2799 0 4298 028a 3F48 ldr r0, .L582+8 4299 .LBE818: 4300 .LBE817: 2927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 4301 .loc 1 2927 0 4302 028c 444A ldr r2, .L582+32 4303 .LBB821: ARM GAS /tmp/ccsErhU4.s page 296 4304 .LBB819: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4305 .loc 2 2799 0 4306 028e 8168 ldr r1, [r0, #8] 4307 .LBE819: 4308 .LBE821: 2927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 4309 .loc 1 2927 0 4310 0290 444C ldr r4, .L582+36 4311 .LBB822: 4312 .LBB820: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4313 .loc 2 2799 0 4314 0292 21F0E071 bic r1, r1, #29360128 4315 0296 0E43 orrs r6, r6, r1 4316 .LVL332: 4317 0298 46F40006 orr r6, r6, #8388608 4318 029c 8660 str r6, [r0, #8] 4319 .LVL333: 4320 .LBE820: 4321 .LBE822: 2927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** while (wait_loop_index != 0UL) 4322 .loc 1 2927 0 4323 029e 1268 ldr r2, [r2] 4324 02a0 9209 lsrs r2, r2, #6 4325 02a2 A4FB0212 umull r1, r2, r4, r2 4326 02a6 9209 lsrs r2, r2, #6 4327 02a8 0132 adds r2, r2, #1 4328 02aa 02EB4202 add r2, r2, r2, lsl #1 4329 02ae 9200 lsls r2, r2, #2 4330 02b0 0192 str r2, [sp, #4] 2928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4331 .loc 1 2928 0 4332 02b2 019A ldr r2, [sp, #4] 4333 02b4 002A cmp r2, #0 4334 02b6 3FF415AF beq .L533 4335 .L534: 2930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4336 .loc 1 2930 0 4337 02ba 019A ldr r2, [sp, #4] 4338 02bc 013A subs r2, r2, #1 4339 02be 0192 str r2, [sp, #4] 2928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4340 .loc 1 2928 0 4341 02c0 019A ldr r2, [sp, #4] 4342 02c2 002A cmp r2, #0 4343 02c4 F9D1 bne .L534 4344 02c6 0DE7 b .L533 4345 .LVL334: 4346 .L578: 4347 .LBB823: 4348 .LBB824: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 4349 .loc 2 5339 0 4350 02c8 54F80C60 ldr r6, [r4, ip] 4351 02cc 3040 ands r0, r0, r6 4352 02ce 44F80C00 str r0, [r4, ip] ARM GAS /tmp/ccsErhU4.s page 297 4353 .LVL335: 4354 .LBE824: 4355 .LBE823: 4356 .LBB825: 4357 .LBB826: 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4358 .loc 2 3563 0 4359 02d2 5069 ldr r0, [r2, #20] 4360 02d4 40F00040 orr r0, r0, #-2147483648 4361 02d8 5061 str r0, [r2, #20] 4362 02da 27E7 b .L495 4363 .LVL336: 4364 .L496: 4365 .LBE826: 4366 .LBE825: 4367 .LBB827: 4368 .LBB828: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4369 .loc 2 3308 0 4370 02dc 156E ldr r5, [r2, #96] 4371 .LVL337: 4372 .LBE828: 4373 .LBE827: 4374 .LBB829: 4375 .LBB830: 4376 02de 156E ldr r5, [r2, #96] 4377 .LVL338: 4378 .LBE830: 4379 .LBE829: 2860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4380 .loc 1 2860 0 4381 02e0 C4F31207 ubfx r7, r4, #0, #19 4382 .LVL339: 2859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4383 .loc 1 2859 0 4384 02e4 C5F38465 ubfx r5, r5, #26, #5 2860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4385 .loc 1 2860 0 4386 02e8 002F cmp r7, #0 4387 02ea 41D1 bne .L499 2860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4388 .loc 1 2860 0 is_stmt 0 discriminator 1 4389 02ec C4F38466 ubfx r6, r4, #26, #5 4390 .L500: 2859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4391 .loc 1 2859 0 is_stmt 1 4392 02f0 B542 cmp r5, r6 4393 02f2 06D1 bne .L501 4394 .LVL340: 4395 .LBB831: 4396 .LBB832: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 4397 .loc 2 3367 0 4398 02f4 146E ldr r4, [r2, #96] 4399 02f6 24F00044 bic r4, r4, #-2147483648 4400 02fa 1466 str r4, [r2, #96] 4401 02fc 0C68 ldr r4, [r1] ARM GAS /tmp/ccsErhU4.s page 298 4402 02fe C4F31207 ubfx r7, r4, #0, #19 4403 .LVL341: 4404 .L501: 4405 .LBE832: 4406 .LBE831: 4407 .LBB833: 4408 .LBB834: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4409 .loc 2 3308 0 4410 0302 4568 ldr r5, [r0, #4] 4411 .LVL342: 4412 .LBE834: 4413 .LBE833: 4414 .LBB835: 4415 .LBB836: 4416 0304 4668 ldr r6, [r0, #4] 4417 .LVL343: 4418 .LBE836: 4419 .LBE835: 2864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4420 .loc 1 2864 0 4421 0306 C6F38466 ubfx r6, r6, #26, #5 2865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4422 .loc 1 2865 0 4423 030a 002F cmp r7, #0 4424 030c 50D1 bne .L502 2865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4425 .loc 1 2865 0 is_stmt 0 discriminator 1 4426 030e C4F38465 ubfx r5, r4, #26, #5 2864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4427 .loc 1 2864 0 is_stmt 1 discriminator 1 4428 0312 AE42 cmp r6, r5 4429 0314 40F09E80 bne .L580 4430 .L503: 4431 .LVL344: 4432 .LBB837: 4433 .LBB838: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 4434 .loc 2 3367 0 4435 0318 4468 ldr r4, [r0, #4] 4436 031a 24F00044 bic r4, r4, #-2147483648 4437 031e 4460 str r4, [r0, #4] 4438 .LVL345: 4439 .LBE838: 4440 .LBE837: 2870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4441 .loc 1 2870 0 4442 0320 0C68 ldr r4, [r1] 4443 .LBB839: 4444 .LBB840: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4445 .loc 2 3308 0 4446 0322 8568 ldr r5, [r0, #8] 4447 .LVL346: 4448 .LBE840: 4449 .LBE839: 4450 .LBB843: ARM GAS /tmp/ccsErhU4.s page 299 4451 .LBB844: 4452 0324 8668 ldr r6, [r0, #8] 4453 .LVL347: 4454 .LBE844: 4455 .LBE843: 2870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4456 .loc 1 2870 0 4457 0326 C4F31205 ubfx r5, r4, #0, #19 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4458 .loc 1 2869 0 4459 032a C6F38466 ubfx r6, r6, #26, #5 2870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4460 .loc 1 2870 0 4461 032e 002D cmp r5, #0 4462 0330 49D1 bne .L506 4463 0332 C4F38465 ubfx r5, r4, #26, #5 4464 .LVL348: 4465 .L537: 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4466 .loc 1 2869 0 discriminator 1 4467 0336 AE42 cmp r6, r5 4468 0338 00F10C07 add r7, r0, #12 4469 033c 40F08F80 bne .L581 4470 .L507: 4471 .LVL349: 4472 .LBB847: 4473 .LBB848: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 4474 .loc 2 3367 0 4475 0340 8468 ldr r4, [r0, #8] 4476 0342 24F00044 bic r4, r4, #-2147483648 4477 0346 8460 str r4, [r0, #8] 4478 .LVL350: 4479 .LBE848: 4480 .LBE847: 2875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4481 .loc 1 2875 0 4482 0348 0C68 ldr r4, [r1] 4483 .LBB849: 4484 .LBB850: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4485 .loc 2 3308 0 4486 034a 3868 ldr r0, [r7] 4487 .LVL351: 4488 .LBE850: 4489 .LBE849: 4490 .LBB853: 4491 .LBB854: 4492 034c 3868 ldr r0, [r7] 4493 .LVL352: 4494 .LBE854: 4495 .LBE853: 2875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4496 .loc 1 2875 0 4497 034e C4F31205 ubfx r5, r4, #0, #19 2874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4498 .loc 1 2874 0 ARM GAS /tmp/ccsErhU4.s page 300 4499 0352 C0F38460 ubfx r0, r0, #26, #5 2875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4500 .loc 1 2875 0 4501 0356 002D cmp r5, #0 4502 0358 42D1 bne .L511 4503 035a C4F38465 ubfx r5, r4, #26, #5 4504 .LVL353: 4505 .L512: 2874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4506 .loc 1 2874 0 4507 035e 8542 cmp r5, r0 4508 0360 7FF47AAE bne .L498 4509 .LVL354: 4510 .LBB857: 4511 .LBB858: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 4512 .loc 2 3367 0 4513 0364 3868 ldr r0, [r7] 4514 0366 20F00040 bic r0, r0, #-2147483648 4515 036a 3860 str r0, [r7] 4516 036c 0C68 ldr r4, [r1] 4517 036e 73E6 b .L498 4518 .LVL355: 4519 .L499: 4520 .LBE858: 4521 .LBE857: 4522 .LBB859: 4523 .LBB860: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4524 .loc 3 1055 0 discriminator 2 4525 .syntax unified 4526 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4527 0370 94FAA4F6 rbit r6, r4 4528 @ 0 "" 2 4529 .LVL356: 4530 .thumb 4531 .syntax unified 4532 .LBE860: 4533 .LBE859: 4534 .LBB861: 4535 .LBB862: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4536 .loc 3 1089 0 discriminator 2 4537 0374 002E cmp r6, #0 4538 0376 C4D0 beq .L501 4539 .loc 3 1093 0 4540 0378 B6FA86F6 clz r6, r6 4541 037c B8E7 b .L500 4542 .L583: 4543 037e 00BF .align 2 4544 .L582: 4545 0380 FFFF0700 .word 524287 4546 0384 00000880 .word -2146959360 4547 0388 00030050 .word 1342178048 4548 038c 000021C3 .word -1021247488 4549 0390 1000C090 .word -1866465264 4550 0394 000052C7 .word -950927360 ARM GAS /tmp/ccsErhU4.s page 301 4551 0398 00010050 .word 1342177536 4552 039c 000084CB .word -880541696 4553 03a0 00000000 .word SystemCoreClock 4554 03a4 632D3E05 .word 87960931 4555 03a8 00007F40 .word 1082064896 4556 03ac 00F0FF03 .word 67104768 4557 .L502: 4558 .LVL357: 4559 .LBE862: 4560 .LBE861: 4561 .LBB863: 4562 .LBB864: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4563 .loc 3 1055 0 discriminator 2 4564 .syntax unified 4565 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4566 03b0 94FAA4F5 rbit r5, r4 4567 @ 0 "" 2 4568 .LVL358: 4569 .thumb 4570 .syntax unified 4571 .LBE864: 4572 .LBE863: 4573 .LBB865: 4574 .LBB866: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4575 .loc 3 1089 0 discriminator 2 4576 03b4 1DB1 cbz r5, .L505 4577 .loc 3 1093 0 4578 03b6 B5FA85F5 clz r5, r5 4579 .LBE866: 4580 .LBE865: 2864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4581 .loc 1 2864 0 4582 03ba AE42 cmp r6, r5 4583 03bc ACD0 beq .L503 4584 .L505: 4585 .LVL359: 4586 .LBB867: 4587 .LBB841: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4588 .loc 2 3308 0 4589 03be 8568 ldr r5, [r0, #8] 4590 .LVL360: 4591 .LBE841: 4592 .LBE867: 4593 .LBB868: 4594 .LBB845: 4595 03c0 8668 ldr r6, [r0, #8] 4596 .LVL361: 4597 .LBE845: 4598 .LBE868: 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4599 .loc 1 2869 0 4600 03c2 C6F38466 ubfx r6, r6, #26, #5 4601 .L506: 4602 .LVL362: ARM GAS /tmp/ccsErhU4.s page 302 4603 .LBB869: 4604 .LBB870: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4605 .loc 3 1055 0 discriminator 2 4606 .syntax unified 4607 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4608 03c6 94FAA4F5 rbit r5, r4 4609 @ 0 "" 2 4610 .LVL363: 4611 .thumb 4612 .syntax unified 4613 .LBE870: 4614 .LBE869: 4615 .LBB871: 4616 .LBB872: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4617 .loc 3 1089 0 discriminator 2 4618 03ca 8DB3 cbz r5, .L509 4619 .loc 3 1093 0 4620 03cc B5FA85F5 clz r5, r5 4621 .LBE872: 4622 .LBE871: 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4623 .loc 1 2869 0 4624 03d0 AE42 cmp r6, r5 4625 03d2 00F10C07 add r7, r0, #12 4626 03d6 B3D0 beq .L507 4627 .L510: 4628 .LVL364: 4629 .LBB873: 4630 .LBB851: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4631 .loc 2 3308 0 4632 03d8 3868 ldr r0, [r7] 4633 .LVL365: 4634 .LBE851: 4635 .LBE873: 4636 .LBB874: 4637 .LBB855: 4638 03da 3868 ldr r0, [r7] 4639 .LVL366: 4640 .LBE855: 4641 .LBE874: 2874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4642 .loc 1 2874 0 4643 03dc C0F38460 ubfx r0, r0, #26, #5 4644 .L511: 4645 .LVL367: 4646 .LBB875: 4647 .LBB876: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4648 .loc 3 1055 0 discriminator 2 4649 .syntax unified 4650 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4651 03e0 94FAA4F5 rbit r5, r4 4652 @ 0 "" 2 4653 .LVL368: ARM GAS /tmp/ccsErhU4.s page 303 4654 .thumb 4655 .syntax unified 4656 .LBE876: 4657 .LBE875: 4658 .LBB877: 4659 .LBB878: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4660 .loc 3 1089 0 discriminator 2 4661 03e4 002D cmp r5, #0 4662 03e6 3FF437AE beq .L498 4663 .loc 3 1093 0 4664 03ea B5FA85F5 clz r5, r5 4665 03ee B6E7 b .L512 4666 .L519: 4667 .LVL369: 4668 .LBE878: 4669 .LBE877: 4670 .LBB879: 4671 .LBB880: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4672 .loc 3 1055 0 discriminator 4 4673 .syntax unified 4674 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4675 03f0 94FAA4F0 rbit r0, r4 4676 @ 0 "" 2 4677 .LVL370: 4678 .thumb 4679 .syntax unified 4680 .LBE880: 4681 .LBE879: 4682 .LBB881: 4683 .LBB882: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4684 .loc 3 1089 0 discriminator 4 4685 03f4 20B3 cbz r0, .L541 4686 .loc 3 1093 0 4687 03f6 B0FA80F0 clz r0, r0 4688 03fa 0130 adds r0, r0, #1 4689 03fc 8006 lsls r0, r0, #26 4690 03fe 00F0F840 and r0, r0, #2080374784 4691 .L522: 4692 .LVL371: 4693 .LBE882: 4694 .LBE881: 4695 .LBB884: 4696 .LBB885: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4697 .loc 3 1055 0 4698 .syntax unified 4699 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4700 0402 94FAA4F5 rbit r5, r4 4701 @ 0 "" 2 4702 .LVL372: 4703 .thumb 4704 .syntax unified 4705 .LBE885: 4706 .LBE884: ARM GAS /tmp/ccsErhU4.s page 304 4707 .LBB886: 4708 .LBB887: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4709 .loc 3 1089 0 4710 0406 CDB1 cbz r5, .L542 4711 .loc 3 1093 0 4712 0408 B5FA85F5 clz r5, r5 4713 040c 0135 adds r5, r5, #1 4714 040e 05F01F05 and r5, r5, #31 4715 0412 0126 movs r6, #1 4716 0414 06FA05F5 lsl r5, r6, r5 4717 .L523: 4718 .LBE887: 4719 .LBE886: 2896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** sConfig->SamplingTime); 4720 .loc 1 2896 0 4721 0418 2843 orrs r0, r0, r5 4722 .LVL373: 4723 .LBB889: 4724 .LBB890: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4725 .loc 3 1055 0 4726 .syntax unified 4727 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4728 041a 94FAA4F4 rbit r4, r4 4729 @ 0 "" 2 4730 .LVL374: 4731 .thumb 4732 .syntax unified 4733 .LBE890: 4734 .LBE889: 4735 .LBB891: 4736 .LBB892: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4737 .loc 3 1089 0 4738 041e 54B1 cbz r4, .L543 4739 .loc 3 1093 0 4740 0420 B4FA84F4 clz r4, r4 4741 0424 0134 adds r4, r4, #1 4742 0426 04F01F04 and r4, r4, #31 4743 042a 04EB4404 add r4, r4, r4, lsl #1 4744 042e 2AE7 b .L572 4745 .L509: 4746 0430 00F10C07 add r7, r0, #12 4747 0434 D0E7 b .L510 4748 .L543: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4749 .loc 3 1089 0 4750 0436 4FF44014 mov r4, #3145728 4751 043a E7E6 b .L526 4752 .L542: 4753 .LBE892: 4754 .LBE891: 4755 .LBB893: 4756 .LBB888: 4757 043c 0225 movs r5, #2 4758 043e EBE7 b .L523 ARM GAS /tmp/ccsErhU4.s page 305 4759 .L541: 4760 .LBE888: 4761 .LBE893: 4762 .LBB894: 4763 .LBB883: 4764 0440 4FF08060 mov r0, #67108864 4765 0444 DDE7 b .L522 4766 .L544: 4767 .LBE883: 4768 .LBE894: 4769 .LBB895: 4770 .LBB802: 4771 0446 4FF08060 mov r0, #67108864 4772 044a C1E6 b .L527 4773 .L546: 4774 .LBE802: 4775 .LBE895: 4776 .LBB896: 4777 .LBB812: 4778 044c 064C ldr r4, .L584 4779 044e DDE6 b .L526 4780 .L545: 4781 .LBE812: 4782 .LBE896: 4783 .LBB897: 4784 .LBB807: 4785 0450 0225 movs r5, #2 4786 0452 CAE6 b .L528 4787 .L580: 4788 .LVL375: 4789 .LBE807: 4790 .LBE897: 4791 .LBB898: 4792 .LBB842: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4793 .loc 2 3308 0 4794 0454 8668 ldr r6, [r0, #8] 4795 .LVL376: 4796 .LBE842: 4797 .LBE898: 4798 .LBB899: 4799 .LBB846: 4800 0456 8668 ldr r6, [r0, #8] 4801 .LVL377: 4802 .LBE846: 4803 .LBE899: 2869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4804 .loc 1 2869 0 4805 0458 C6F38466 ubfx r6, r6, #26, #5 4806 045c 6BE7 b .L537 4807 .L581: 4808 .LVL378: 4809 .LBB900: 4810 .LBB852: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4811 .loc 2 3308 0 4812 045e C668 ldr r6, [r0, #12] ARM GAS /tmp/ccsErhU4.s page 306 4813 .LVL379: 4814 .LBE852: 4815 .LBE900: 4816 .LBB901: 4817 .LBB856: 4818 0460 C068 ldr r0, [r0, #12] 4819 .LVL380: 4820 .LBE856: 4821 .LBE901: 2874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfig->Channel)) 4822 .loc 1 2874 0 4823 0462 C0F38460 ubfx r0, r0, #26, #5 4824 0466 7AE7 b .L512 4825 .L585: 4826 .align 2 4827 .L584: 4828 0468 000050FE .word -28311552 4829 .cfi_endproc 4830 .LFE349: 4832 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits 4833 .align 1 4834 .p2align 2,,3 4835 .global HAL_ADC_AnalogWDGConfig 4836 .syntax unified 4837 .thumb 4838 .thumb_func 4839 .fpu fpv4-sp-d16 4841 HAL_ADC_AnalogWDGConfig: 4842 .LFB350: 2999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4843 .loc 1 2999 0 4844 .cfi_startproc 4845 @ args = 0, pretend = 0, frame = 0 4846 @ frame_needed = 0, uses_anonymous_args = 0 4847 @ link register save eliminated. 4848 .LVL381: 3037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4849 .loc 1 3037 0 4850 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 4851 0004 012B cmp r3, #1 4852 0006 00F0A680 beq .L625 2999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4853 .loc 1 2999 0 discriminator 2 4854 000a F0B4 push {r4, r5, r6, r7} 4855 .LCFI33: 4856 .cfi_def_cfa_offset 16 4857 .cfi_offset 4, -16 4858 .cfi_offset 5, -12 4859 .cfi_offset 6, -8 4860 .cfi_offset 7, -4 3043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 4861 .loc 1 3043 0 discriminator 2 4862 000c 0468 ldr r4, [r0] 4863 .LVL382: 4864 000e 0B68 ldr r3, [r1] 4865 .LBB902: 4866 .LBB903: ARM GAS /tmp/ccsErhU4.s page 307 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4867 .loc 2 6846 0 discriminator 2 4868 0010 A268 ldr r2, [r4, #8] 4869 .LBE903: 4870 .LBE902: 3013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || 4871 .loc 1 3013 0 discriminator 2 4872 0012 4F68 ldr r7, [r1, #4] 3037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4873 .loc 1 3037 0 discriminator 2 4874 0014 0126 movs r6, #1 4875 0016 80F85860 strb r6, [r0, #88] 4876 .LBB905: 4877 .LBB904: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4878 .loc 2 6846 0 discriminator 2 4879 001a 5607 lsls r6, r2, #29 4880 001c 1D46 mov r5, r3 4881 001e 37D5 bpl .L653 4882 .LVL383: 4883 .LBE904: 4884 .LBE905: 4885 .LBB906: 4886 .LBB907: 4887 .loc 2 7071 0 4888 0020 A368 ldr r3, [r4, #8] 4889 .LVL384: 4890 .L601: 4891 .LBE907: 4892 .LBE906: 3192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4893 .loc 1 3192 0 4894 0022 B74A ldr r2, .L661 4895 0024 9542 cmp r5, r2 4896 0026 D1E90463 ldrd r6, r3, [r1, #16] 4897 002a 5AD0 beq .L654 4898 .L619: 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 4899 .loc 1 3206 0 4900 002c E268 ldr r2, [r4, #12] 4901 002e 02F01802 and r2, r2, #24 4902 0032 182A cmp r2, #24 4903 0034 00F09280 beq .L621 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 4904 .loc 1 3206 0 is_stmt 0 discriminator 1 4905 0038 E268 ldr r2, [r4, #12] 4906 003a C2F3C102 ubfx r2, r2, #3, #2 4907 003e C2EBC271 rsb r1, r2, r2, lsl #31 4908 .LVL385: 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4909 .loc 1 3207 0 is_stmt 1 discriminator 1 4910 0042 E268 ldr r2, [r4, #12] 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 4911 .loc 1 3206 0 discriminator 1 4912 0044 4900 lsls r1, r1, #1 4913 0046 0431 adds r1, r1, #4 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 308 4914 .loc 1 3207 0 discriminator 1 4915 0048 02F01802 and r2, r2, #24 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 4916 .loc 1 3206 0 discriminator 1 4917 004c 01F01F01 and r1, r1, #31 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4918 .loc 1 3207 0 discriminator 1 4919 0050 182A cmp r2, #24 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 4920 .loc 1 3206 0 discriminator 1 4921 0052 26FA01F1 lsr r1, r6, r1 4922 .LVL386: 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 4923 .loc 1 3207 0 discriminator 1 4924 0056 00F08980 beq .L623 4925 .L660: 4926 005a E268 ldr r2, [r4, #12] 4927 005c C2F3C102 ubfx r2, r2, #3, #2 4928 0060 C2EBC272 rsb r2, r2, r2, lsl #31 4929 0064 5200 lsls r2, r2, #1 4930 0066 0432 adds r2, r2, #4 4931 0068 02F01F02 and r2, r2, #31 4932 006c D340 lsrs r3, r3, r2 4933 .L620: 4934 .LVL387: 4935 .LBB909: 4936 .LBB910: 5966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4937 .loc 2 5966 0 4938 006e AD0C lsrs r5, r5, #18 4939 .LVL388: 4940 0070 05F00C05 and r5, r5, #12 4941 0074 2034 adds r4, r4, #32 4942 .LVL389: 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 4943 .loc 2 5968 0 4944 0076 43EA0143 orr r3, r3, r1, lsl #16 4945 .LVL390: 4946 007a 2A59 ldr r2, [r5, r4] 4947 007c 02F0F022 and r2, r2, #-268374016 4948 0080 1343 orrs r3, r3, r2 4949 .LBE910: 4950 .LBE909: 3215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4951 .loc 1 3215 0 4952 0082 0022 movs r2, #0 4953 .LBB912: 4954 .LBB911: 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 4955 .loc 2 5968 0 4956 0084 2B51 str r3, [r5, r4] 4957 .LVL391: 4958 .LBE911: 4959 .LBE912: 3215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4960 .loc 1 3215 0 4961 0086 80F85820 strb r2, [r0, #88] ARM GAS /tmp/ccsErhU4.s page 309 3219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 4962 .loc 1 3219 0 4963 008a F0BC pop {r4, r5, r6, r7} 4964 .LCFI34: 4965 .cfi_remember_state 4966 .cfi_restore 7 4967 .cfi_restore 6 4968 .cfi_restore 5 4969 .cfi_restore 4 4970 .cfi_def_cfa_offset 0 4971 008c 1046 mov r0, r2 4972 .LVL392: 4973 008e 7047 bx lr 4974 .LVL393: 4975 .L653: 4976 .LCFI35: 4977 .cfi_restore_state 4978 .LBB913: 4979 .LBB908: 4980 .loc 2 7071 0 4981 0090 A268 ldr r2, [r4, #8] 4982 0092 1207 lsls r2, r2, #28 4983 0094 C5D4 bmi .L601 4984 .LVL394: 4985 .LBE908: 4986 .LBE913: 3050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4987 .loc 1 3050 0 4988 0096 9A4A ldr r2, .L661 4989 0098 9342 cmp r3, r2 4990 009a 2ED0 beq .L655 3116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 4991 .loc 1 3116 0 4992 009c B7F1807F cmp r7, #16777216 4993 00a0 00F0A980 beq .L603 4994 00a4 64D9 bls .L656 4995 00a6 B7F1C07F cmp r7, #25165824 4996 00aa 00F0A480 beq .L603 4997 00ae B7F1E07F cmp r7, #29360128 4998 00b2 02D0 beq .L605 4999 00b4 B7F1A07F cmp r7, #20971520 5000 00b8 60D1 bne .L602 5001 .L605: 3123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5002 .loc 1 3123 0 5003 00ba 924E ldr r6, .L661+4 5004 00bc 8A68 ldr r2, [r1, #8] 5005 00be B342 cmp r3, r6 5006 00c0 C2F31205 ubfx r5, r2, #0, #19 5007 00c4 00F0B180 beq .L657 3129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5008 .loc 1 3129 0 5009 00c8 002D cmp r5, #0 5010 00ca 40F0CD80 bne .L611 3129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5011 .loc 1 3129 0 is_stmt 0 discriminator 1 5012 00ce C2F38462 ubfx r2, r2, #26, #5 ARM GAS /tmp/ccsErhU4.s page 310 5013 00d2 0125 movs r5, #1 5014 00d4 9540 lsls r5, r5, r2 5015 .L612: 3129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5016 .loc 1 3129 0 discriminator 4 5017 00d6 D4F8A420 ldr r2, [r4, #164] 5018 00da 2A43 orrs r2, r2, r5 5019 00dc C4F8A420 str r2, [r4, #164] 5020 00e0 64E0 b .L614 5021 .L654: 3197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres 5022 .loc 1 3197 0 is_stmt 1 5023 00e2 E168 ldr r1, [r4, #12] 5024 .LVL395: 3198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5025 .loc 1 3198 0 5026 00e4 E268 ldr r2, [r4, #12] 3197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres 5027 .loc 1 3197 0 5028 00e6 C1F3C101 ubfx r1, r1, #3, #2 3198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5029 .loc 1 3198 0 5030 00ea C2F3C102 ubfx r2, r2, #3, #2 3197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres 5031 .loc 1 3197 0 5032 00ee 4900 lsls r1, r1, #1 3198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5033 .loc 1 3198 0 5034 00f0 5200 lsls r2, r2, #1 3197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres 5035 .loc 1 3197 0 5036 00f2 06FA01F1 lsl r1, r6, r1 5037 .LVL396: 3198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5038 .loc 1 3198 0 5039 00f6 9340 lsls r3, r3, r2 5040 .LVL397: 5041 00f8 B9E7 b .L620 5042 .LVL398: 5043 .L655: 3055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5044 .loc 1 3055 0 5045 00fa B7F1807F cmp r7, #16777216 5046 00fe 00F0BC80 beq .L592 5047 0102 65D9 bls .L658 5048 0104 B7F1C07F cmp r7, #25165824 5049 0108 00F0CD80 beq .L596 5050 010c B7F1E07F cmp r7, #29360128 5051 0110 00F0BC80 beq .L597 5052 0114 B7F1A07F cmp r7, #20971520 5053 0118 00F0CE80 beq .L659 5054 .L591: 5055 .LVL399: 5056 .LBB914: 5057 .LBB915: 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5058 .loc 2 5727 0 ARM GAS /tmp/ccsErhU4.s page 311 5059 011c E368 ldr r3, [r4, #12] 5060 011e 23F0FB43 bic r3, r3, #2105540608 5061 0122 23F48003 bic r3, r3, #4194304 5062 0126 E360 str r3, [r4, #12] 5063 .LVL400: 5064 .L599: 5065 .LBE915: 5066 .LBE914: 3090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_TR1_AWDFILT, 5067 .loc 1 3090 0 5068 0128 236A ldr r3, [r4, #32] 5069 012a 8D69 ldr r5, [r1, #24] 3104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5070 .loc 1 3104 0 5071 012c 0A7B ldrb r2, [r1, #12] @ zero_extendqisi2 3090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_TR1_AWDFILT, 5072 .loc 1 3090 0 5073 012e 23F4E043 bic r3, r3, #28672 5074 0132 2B43 orrs r3, r3, r5 5075 0134 2362 str r3, [r4, #32] 3095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5076 .loc 1 3095 0 5077 0136 C36D ldr r3, [r0, #92] 5078 .LBB916: 5079 .LBB917: 7072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected command of conversion stop state 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_IsStopConversionOngoing 7077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group injected. 7079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsStopConversionOngoing(ADC_TypeDef *ADCx) 7081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTP) == (ADC_CR_JADSTP)) ? 1UL : 0UL); 7083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion data, range fit for 7087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and 7088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all oversampling increased data width (for devices 7089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with feature oversampling). 7090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData32\n 7091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR2 JDATA LL_ADC_INJ_ReadConversionData32\n 7092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR3 JDATA LL_ADC_INJ_ReadConversionData32\n 7093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR4 JDATA LL_ADC_INJ_ReadConversionData32 7094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 7096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 7097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 7098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 7099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 7100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 7101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_ReadConversionData32(ADC_TypeDef *ADCx, uint32_t Rank) 7103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 312 7104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK 7105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 7107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JDR1_JDATA) 7108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion data, range fit for 7113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 12 bits. 7114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_INJ_ReadConversionData32. 7117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData12\n 7118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR2 JDATA LL_ADC_INJ_ReadConversionData12\n 7119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR3 JDATA LL_ADC_INJ_ReadConversionData12\n 7120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR4 JDATA LL_ADC_INJ_ReadConversionData12 7121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 7123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 7124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 7125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 7126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 7127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 7128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData12(ADC_TypeDef *ADCx, uint32_t Rank) 7130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK 7132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(*preg, 7134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JDR1_JDATA) 7135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion data, range fit for 7140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 10 bits. 7141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_INJ_ReadConversionData32. 7144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData10\n 7145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR2 JDATA LL_ADC_INJ_ReadConversionData10\n 7146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR3 JDATA LL_ADC_INJ_ReadConversionData10\n 7147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR4 JDATA LL_ADC_INJ_ReadConversionData10 7148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 7150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 7151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 7152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 7153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 7154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF 7155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData10(ADC_TypeDef *ADCx, uint32_t Rank) 7157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK 7159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(*preg, ARM GAS /tmp/ccsErhU4.s page 313 7161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JDR1_JDATA) 7162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion data, range fit for 7167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 8 bits. 7168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_INJ_ReadConversionData32. 7171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData8\n 7172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR2 JDATA LL_ADC_INJ_ReadConversionData8\n 7173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR3 JDATA LL_ADC_INJ_ReadConversionData8\n 7174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR4 JDATA LL_ADC_INJ_ReadConversionData8 7175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 7177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 7178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 7179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 7180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 7181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 7182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData8(ADC_TypeDef *ADCx, uint32_t Rank) 7184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK 7186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(*preg, 7188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JDR1_JDATA) 7189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion data, range fit for 7194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 6 bits. 7195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_INJ_ReadConversionData32. 7198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData6\n 7199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR2 JDATA LL_ADC_INJ_ReadConversionData6\n 7200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR3 JDATA LL_ADC_INJ_ReadConversionData6\n 7201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JDR4 JDATA LL_ADC_INJ_ReadConversionData6 7202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 7204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 7205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 7206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 7207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 7208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3F 7209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData6(ADC_TypeDef *ADCx, uint32_t Rank) 7211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK 7213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(*preg, 7215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JDR1_JDATA) 7216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccsErhU4.s page 314 7218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_FLAG_Management ADC flag management 7224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC ready. 7229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 7230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 7231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 7232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY 7233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx) 7237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY)) ? 1UL : 0UL); 7239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group regular end of unitary conversion. 7243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC 7244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx) 7248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC)) ? 1UL : 0UL); 7250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group regular end of sequence conversions. 7254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOS LL_ADC_IsActiveFlag_EOS 7255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx) 7259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS)) ? 1UL : 0UL); 7261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group regular overrun. 7265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR 7266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx) 7270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR)) ? 1UL : 0UL); 7272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 315 7275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group regular end of sampling phase. 7276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP 7277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx) 7281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP)) ? 1UL : 0UL); 7283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group injected end of unitary conversion. 7287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JEOC LL_ADC_IsActiveFlag_JEOC 7288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOC(ADC_TypeDef *ADCx) 7292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOC) == (LL_ADC_FLAG_JEOC)) ? 1UL : 0UL); 7294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group injected end of sequence conversions. 7298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JEOS LL_ADC_IsActiveFlag_JEOS 7299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOS(ADC_TypeDef *ADCx) 7303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOS) == (LL_ADC_FLAG_JEOS)) ? 1UL : 0UL); 7305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC group injected contexts queue overflow. 7309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JQOVF LL_ADC_IsActiveFlag_JQOVF 7310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JQOVF(ADC_TypeDef *ADCx) 7314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_JQOVF) == (LL_ADC_FLAG_JQOVF)) ? 1UL : 0UL); 7316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC analog watchdog 1 flag 7320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD1 LL_ADC_IsActiveFlag_AWD1 7321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx) 7325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1)) ? 1UL : 0UL); 7327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC analog watchdog 2. 7331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD2 LL_ADC_IsActiveFlag_AWD2 ARM GAS /tmp/ccsErhU4.s page 316 7332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD2(ADC_TypeDef *ADCx) 7336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD2) == (LL_ADC_FLAG_AWD2)) ? 1UL : 0UL); 7338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag ADC analog watchdog 3. 7342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD3 LL_ADC_IsActiveFlag_AWD3 7343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD3(ADC_TypeDef *ADCx) 7347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD3) == (LL_ADC_FLAG_AWD3)) ? 1UL : 0UL); 7349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC ready. 7353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 7354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 7355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 7356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY 7357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx) 7361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY); 7363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group regular end of unitary conversion. 7367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOC LL_ADC_ClearFlag_EOC 7368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx) 7372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC); 7374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group regular end of sequence conversions. 7378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOS LL_ADC_ClearFlag_EOS 7379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx) 7383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS); 7385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group regular overrun. ARM GAS /tmp/ccsErhU4.s page 317 7389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR OVR LL_ADC_ClearFlag_OVR 7390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx) 7394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR); 7396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group regular end of sampling phase. 7400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP 7401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx) 7405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP); 7407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group injected end of unitary conversion. 7411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JEOC LL_ADC_ClearFlag_JEOC 7412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_JEOC(ADC_TypeDef *ADCx) 7416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOC); 7418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group injected end of sequence conversions. 7422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JEOS LL_ADC_ClearFlag_JEOS 7423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_JEOS(ADC_TypeDef *ADCx) 7427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOS); 7429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC group injected contexts queue overflow. 7433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR JQOVF LL_ADC_ClearFlag_JQOVF 7434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_JQOVF(ADC_TypeDef *ADCx) 7438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JQOVF); 7440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC analog watchdog 1. 7444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD1 LL_ADC_ClearFlag_AWD1 7445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccsErhU4.s page 318 7446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx) 7449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1); 5080 .loc 2 7450 0 5081 0138 8025 movs r5, #128 5082 .LBE917: 5083 .LBE916: 3095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5084 .loc 1 3095 0 5085 013a 23F48033 bic r3, r3, #65536 5086 013e C365 str r3, [r0, #92] 5087 .LVL401: 5088 .LBB919: 5089 .LBB918: 5090 .loc 2 7450 0 5091 0140 2560 str r5, [r4] 5092 .LVL402: 5093 .LBE918: 5094 .LBE919: 5095 .LBB920: 5096 .LBB921: 7451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC analog watchdog 2. 7455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD2 LL_ADC_ClearFlag_AWD2 7456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_AWD2(ADC_TypeDef *ADCx) 7460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD2); 7462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Clear flag ADC analog watchdog 3. 7466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll ISR AWD3 LL_ADC_ClearFlag_AWD3 7467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ClearFlag_AWD3(ADC_TypeDef *ADCx) 7471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD3); 7473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 7476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC ready of the ADC master. 7478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR ADRDY_MST LL_ADC_IsActiveFlag_MST_ADRDY 7479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON) 7484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 319 7485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_MST) == (LL_ADC_FLAG_ADRDY_MST)) ? 1UL : 0 7486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC ready of the ADC slave. 7490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR ADRDY_SLV LL_ADC_IsActiveFlag_SLV_ADRDY 7491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON) 7496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_SLV) == (LL_ADC_FLAG_ADRDY_SLV)) ? 1UL : 0 7498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of unitary conversion of the ADC master. 7502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOC_MST LL_ADC_IsActiveFlag_MST_EOC 7503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOC(ADC_Common_TypeDef *ADCxy_COMMON) 7508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV)) ? 1UL : 0UL); 7510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of unitary conversion of the ADC slave. 7514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOC_SLV LL_ADC_IsActiveFlag_SLV_EOC 7515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOC(ADC_Common_TypeDef *ADCxy_COMMON) 7520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV)) ? 1UL : 0UL); 7522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of sequence conversions of the ADC master. 7526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOS_MST LL_ADC_IsActiveFlag_MST_EOS 7527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOS(ADC_Common_TypeDef *ADCxy_COMMON) 7532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_MST) == (LL_ADC_FLAG_EOS_MST)) ? 1UL : 0UL); 7534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of sequence conversions of the ADC slave. 7538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOS_SLV LL_ADC_IsActiveFlag_SLV_EOS 7539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). ARM GAS /tmp/ccsErhU4.s page 320 7542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOS(ADC_Common_TypeDef *ADCxy_COMMON) 7544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_SLV) == (LL_ADC_FLAG_EOS_SLV)) ? 1UL : 0UL); 7546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular overrun of the ADC master. 7550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR OVR_MST LL_ADC_IsActiveFlag_MST_OVR 7551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_OVR(ADC_Common_TypeDef *ADCxy_COMMON) 7556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_MST) == (LL_ADC_FLAG_OVR_MST)) ? 1UL : 0UL); 7558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular overrun of the ADC slave. 7562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR OVR_SLV LL_ADC_IsActiveFlag_SLV_OVR 7563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_OVR(ADC_Common_TypeDef *ADCxy_COMMON) 7568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_SLV) == (LL_ADC_FLAG_OVR_SLV)) ? 1UL : 0UL); 7570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of sampling of the ADC master. 7574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOSMP_MST LL_ADC_IsActiveFlag_MST_EOSMP 7575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON) 7580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_MST) == (LL_ADC_FLAG_EOSMP_MST)) ? 1UL : 0 7582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group regular end of sampling of the ADC slave. 7586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR EOSMP_SLV LL_ADC_IsActiveFlag_SLV_EOSMP 7587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON) 7592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_SLV) == (LL_ADC_FLAG_EOSMP_SLV)) ? 1UL : 0 7594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected end of unitary conversion of the ADC master. 7598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JEOC_MST LL_ADC_IsActiveFlag_MST_JEOC ARM GAS /tmp/ccsErhU4.s page 321 7599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOC(ADC_Common_TypeDef *ADCxy_COMMON) 7604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_MST) == (LL_ADC_FLAG_JEOC_MST)) ? 1UL : 0UL 7606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected end of unitary conversion of the ADC slave. 7610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JEOC_SLV LL_ADC_IsActiveFlag_SLV_JEOC 7611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOC(ADC_Common_TypeDef *ADCxy_COMMON) 7616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_SLV) == (LL_ADC_FLAG_JEOC_SLV)) ? 1UL : 0UL 7618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected end of sequence conversions of the ADC master. 7622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JEOS_MST LL_ADC_IsActiveFlag_MST_JEOS 7623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOS(ADC_Common_TypeDef *ADCxy_COMMON) 7628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_MST) == (LL_ADC_FLAG_JEOS_MST)) ? 1UL : 0UL 7630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected end of sequence conversions of the ADC slave. 7634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JEOS_SLV LL_ADC_IsActiveFlag_SLV_JEOS 7635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOS(ADC_Common_TypeDef *ADCxy_COMMON) 7640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_SLV) == (LL_ADC_FLAG_JEOS_SLV)) ? 1UL : 0UL 7642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected context queue overflow of the ADC master. 7646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JQOVF_MST LL_ADC_IsActiveFlag_MST_JQOVF 7647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON) 7652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_MST) == (LL_ADC_FLAG_JQOVF_MST)) ? 1UL : 0 7654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccsErhU4.s page 322 7656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC group injected context queue overflow of the ADC slave. 7658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR JQOVF_SLV LL_ADC_IsActiveFlag_SLV_JQOVF 7659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON) 7664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_SLV) == (LL_ADC_FLAG_JQOVF_SLV)) ? 1UL : 0 7666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC analog watchdog 1 of the ADC master. 7670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD1_MST LL_ADC_IsActiveFlag_MST_AWD1 7671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD1(ADC_Common_TypeDef *ADCxy_COMMON) 7676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_MST) == (LL_ADC_FLAG_AWD1_MST)) ? 1UL : 0UL 7678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode analog watchdog 1 of the ADC slave. 7682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD1_SLV LL_ADC_IsActiveFlag_SLV_AWD1 7683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD1(ADC_Common_TypeDef *ADCxy_COMMON) 7688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_SLV) == (LL_ADC_FLAG_AWD1_SLV)) ? 1UL : 0UL 7690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC analog watchdog 2 of the ADC master. 7694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD2_MST LL_ADC_IsActiveFlag_MST_AWD2 7695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD2(ADC_Common_TypeDef *ADCxy_COMMON) 7700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_MST) == (LL_ADC_FLAG_AWD2_MST)) ? 1UL : 0UL 7702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC analog watchdog 2 of the ADC slave. 7706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD2_SLV LL_ADC_IsActiveFlag_SLV_AWD2 7707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD2(ADC_Common_TypeDef *ADCxy_COMMON) 7712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 323 7713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_SLV) == (LL_ADC_FLAG_AWD2_SLV)) ? 1UL : 0UL 7714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC analog watchdog 3 of the ADC master. 7718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD3_MST LL_ADC_IsActiveFlag_MST_AWD3 7719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD3(ADC_Common_TypeDef *ADCxy_COMMON) 7724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_MST) == (LL_ADC_FLAG_AWD3_MST)) ? 1UL : 0UL 7726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get flag multimode ADC analog watchdog 3 of the ADC slave. 7730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CSR AWD3_SLV LL_ADC_IsActiveFlag_SLV_AWD3 7731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval State of bit (1 or 0). 7734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD3(ADC_Common_TypeDef *ADCxy_COMMON) 7736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_SLV) == (LL_ADC_FLAG_AWD3_SLV)) ? 1UL : 0UL 7738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 7740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_IT_Management ADC IT management 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC ready. 7751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY 7752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx) 7756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY); 7758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group regular end of unitary conversion. 7762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOCIE LL_ADC_EnableIT_EOC 7763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx) 7767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_EOC); 7769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccsErhU4.s page 324 7770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group regular end of sequence conversions. 7773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOSIE LL_ADC_EnableIT_EOS 7774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx) 7778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_EOS); 7780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC group regular interruption overrun. 7784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER OVRIE LL_ADC_EnableIT_OVR 7785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx) 7789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_OVR); 7791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group regular end of sampling. 7795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP 7796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx) 7800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP); 7802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group injected end of unitary conversion. 7806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JEOCIE LL_ADC_EnableIT_JEOC 7807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_JEOC(ADC_TypeDef *ADCx) 7811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_JEOC); 7813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group injected end of sequence conversions. 7817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JEOSIE LL_ADC_EnableIT_JEOS 7818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_JEOS(ADC_TypeDef *ADCx) 7822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_JEOS); 7824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccsErhU4.s page 325 7827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC group injected context queue overflow. 7828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JQOVFIE LL_ADC_EnableIT_JQOVF 7829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_JQOVF(ADC_TypeDef *ADCx) 7833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_JQOVF); 7835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC analog watchdog 1. 7839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD1IE LL_ADC_EnableIT_AWD1 7840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx) 7844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_AWD1); 5097 .loc 2 7845 0 5098 0142 6368 ldr r3, [r4, #4] 5099 0144 0D68 ldr r5, [r1] 5100 .LBE921: 5101 .LBE920: 3104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5102 .loc 1 3104 0 5103 0146 012A cmp r2, #1 5104 .LVL403: 5105 .LBB923: 5106 .LBB922: 5107 .loc 2 7845 0 5108 0148 0CBF ite eq 5109 014a 43F08003 orreq r3, r3, #128 5110 .LVL404: 5111 .LBE922: 5112 .LBE923: 5113 .LBB924: 5114 .LBB925: 7846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC analog watchdog 2. 7850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD2IE LL_ADC_EnableIT_AWD2 7851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_AWD2(ADC_TypeDef *ADCx) 7855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_AWD2); 7857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable interruption ADC analog watchdog 3. 7861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD3IE LL_ADC_EnableIT_AWD3 7862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccsErhU4.s page 326 7865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableIT_AWD3(ADC_TypeDef *ADCx) 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->IER, LL_ADC_IT_AWD3); 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC ready. 7872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY 7873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx) 7877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY); 7879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group regular end of unitary conversion. 7883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOCIE LL_ADC_DisableIT_EOC 7884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx) 7888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC); 7890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group regular end of sequence conversions. 7894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOSIE LL_ADC_DisableIT_EOS 7895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx) 7899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS); 7901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group regular overrun. 7905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER OVRIE LL_ADC_DisableIT_OVR 7906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx) 7910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR); 7912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group regular end of sampling. 7916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP 7917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx) 7921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccsErhU4.s page 327 7922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP); 7923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group regular end of unitary conversion. 7927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JEOCIE LL_ADC_DisableIT_JEOC 7928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_JEOC(ADC_TypeDef *ADCx) 7932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOC); 7934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group injected end of sequence conversions. 7938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JEOSIE LL_ADC_DisableIT_JEOS 7939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_JEOS(ADC_TypeDef *ADCx) 7943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOS); 7945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC group injected context queue overflow. 7949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER JQOVFIE LL_ADC_DisableIT_JQOVF 7950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_JQOVF(ADC_TypeDef *ADCx) 7954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_JQOVF); 7956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC analog watchdog 1. 7960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD1IE LL_ADC_DisableIT_AWD1 7961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx) 7965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1); 5115 .loc 2 7966 0 5116 014e 23F08003 bicne r3, r3, #128 5117 0152 6360 str r3, [r4, #4] 5118 0154 65E7 b .L601 5119 .LVL405: 5120 .L625: 5121 .LCFI36: 5122 .cfi_def_cfa_offset 0 5123 .cfi_restore 4 5124 .cfi_restore 5 5125 .cfi_restore 6 5126 .cfi_restore 7 ARM GAS /tmp/ccsErhU4.s page 328 5127 .LBE925: 5128 .LBE924: 3037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5129 .loc 1 3037 0 5130 0156 0223 movs r3, #2 3219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5131 .loc 1 3219 0 5132 0158 1846 mov r0, r3 5133 .LVL406: 5134 015a 7047 bx lr 5135 .LVL407: 5136 .L621: 5137 .LCFI37: 5138 .cfi_def_cfa_offset 16 5139 .cfi_offset 4, -16 5140 .cfi_offset 5, -12 5141 .cfi_offset 6, -8 5142 .cfi_offset 7, -4 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5143 .loc 1 3207 0 discriminator 2 5144 015c E268 ldr r2, [r4, #12] 5145 015e 02F01802 and r2, r2, #24 5146 0162 182A cmp r2, #24 3206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThre 5147 .loc 1 3206 0 discriminator 2 5148 0164 4FEA8601 lsl r1, r6, #2 5149 .LVL408: 3207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5150 .loc 1 3207 0 discriminator 2 5151 0168 7FF477AF bne .L660 5152 .L623: 5153 016c 9B00 lsls r3, r3, #2 5154 016e 7EE7 b .L620 5155 .LVL409: 5156 .L656: 3116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5157 .loc 1 3116 0 5158 0170 B7F5000F cmp r7, #8388608 5159 0174 3FD0 beq .L603 5160 0176 B7F5400F cmp r7, #12582912 5161 017a 9ED0 beq .L605 5162 .L602: 5163 .LVL410: 5164 .LBB926: 5165 .LBB927: 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_C 5166 .loc 2 5724 0 5167 017c 03F00102 and r2, r3, #1 5168 0180 D500 lsls r5, r2, #3 5169 0182 2A44 add r2, r2, r5 5170 0184 C3F30155 ubfx r5, r3, #20, #2 5171 0188 05EB8205 add r5, r5, r2, lsl #2 5172 018c 04F10C02 add r2, r4, #12 5173 .LVL411: 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5174 .loc 2 5727 0 5175 0190 23F00246 bic r6, r3, #-2113929216 ARM GAS /tmp/ccsErhU4.s page 329 5176 0194 52F82530 ldr r3, [r2, r5, lsl #2] 5177 0198 26F46016 bic r6, r6, #3670016 5178 019c 23EA0603 bic r3, r3, r6 5179 01a0 42F82530 str r3, [r2, r5, lsl #2] 5180 .LVL412: 5181 .L615: 5182 .LBE927: 5183 .LBE926: 3144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5184 .loc 1 3144 0 5185 01a4 574A ldr r2, .L661+4 5186 01a6 0B68 ldr r3, [r1] 5187 01a8 9342 cmp r3, r2 5188 01aa 4AD0 beq .L610 5189 .L614: 3169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5190 .loc 1 3169 0 5191 01ac C26D ldr r2, [r0, #92] 3178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5192 .loc 1 3178 0 5193 01ae 0D7B ldrb r5, [r1, #12] @ zero_extendqisi2 3169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5194 .loc 1 3169 0 5195 01b0 22F48022 bic r2, r2, #262144 5196 01b4 C265 str r2, [r0, #92] 5197 .LVL413: 5198 .LBB928: 5199 .LBB929: 7472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5200 .loc 2 7472 0 5201 01b6 4FF40072 mov r2, #512 5202 01ba 2260 str r2, [r4] 5203 .LVL414: 5204 .LBE929: 5205 .LBE928: 5206 .LBB930: 5207 .LBB931: 7867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5208 .loc 2 7867 0 5209 01bc 6268 ldr r2, [r4, #4] 5210 .LBE931: 5211 .LBE930: 3178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5212 .loc 1 3178 0 5213 01be 012D cmp r5, #1 5214 .LVL415: 5215 .LBB933: 5216 .LBB932: 7867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5217 .loc 2 7867 0 5218 01c0 0CBF ite eq 5219 01c2 42F40072 orreq r2, r2, #512 5220 .LVL416: 5221 .LBE932: 5222 .LBE933: 5223 .LBB934: 5224 .LBB935: ARM GAS /tmp/ccsErhU4.s page 330 7967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC analog watchdog 2. 7971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD2IE LL_ADC_DisableIT_AWD2 7972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_AWD2(ADC_TypeDef *ADCx) 7976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD2); 7978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable interruption ADC analog watchdog 3. 7982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll IER AWD3IE LL_ADC_DisableIT_AWD3 7983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableIT_AWD3(ADC_TypeDef *ADCx) 7987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD3); 5225 .loc 2 7988 0 5226 01c6 22F40072 bicne r2, r2, #512 5227 01ca 1D46 mov r5, r3 5228 01cc 6260 str r2, [r4, #4] 5229 01ce 28E7 b .L601 5230 .LVL417: 5231 .L658: 5232 .LBE935: 5233 .LBE934: 3055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5234 .loc 1 3055 0 5235 01d0 B7F5000F cmp r7, #8388608 5236 01d4 7DD0 beq .L594 5237 01d6 B7F5400F cmp r7, #12582912 5238 01da 9FD1 bne .L591 5239 .LVL418: 5240 .LBB936: 5241 .LBB937: 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5242 .loc 2 5727 0 5243 01dc E268 ldr r2, [r4, #12] 5244 01de 8B68 ldr r3, [r1, #8] 5245 01e0 22F0FB42 bic r2, r2, #2105540608 5246 01e4 22F48002 bic r2, r2, #4194304 5247 01e8 03F0F843 and r3, r3, #2080374784 5248 01ec 1343 orrs r3, r3, r2 5249 01ee 43F44003 orr r3, r3, #12582912 5250 01f2 E360 str r3, [r4, #12] 5251 .LVL419: 5252 01f4 98E7 b .L599 5253 .LVL420: 5254 .L603: 5255 .LBE937: 5256 .LBE936: 5257 .LBB938: ARM GAS /tmp/ccsErhU4.s page 331 5258 .LBB939: 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_C 5259 .loc 2 5724 0 5260 01f6 03F00102 and r2, r3, #1 5261 01fa D600 lsls r6, r2, #3 5262 01fc 3244 add r2, r2, r6 5263 01fe C3F30156 ubfx r6, r3, #20, #2 5264 0202 06EB8206 add r6, r6, r2, lsl #2 5265 0206 04F10C05 add r5, r4, #12 5266 .LVL421: 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5267 .loc 2 5727 0 5268 020a 23F0024C bic ip, r3, #-2113929216 5269 020e 55F82620 ldr r2, [r5, r6, lsl #2] 5270 0212 23F07E47 bic r7, r3, #-33554432 5271 0216 2CF4601C bic ip, ip, #3670016 5272 021a 22EA0C03 bic r3, r2, ip 5273 021e 27F4F007 bic r7, r7, #7864320 5274 0222 3B43 orrs r3, r3, r7 5275 0224 45F82630 str r3, [r5, r6, lsl #2] 5276 .LVL422: 5277 0228 BCE7 b .L615 5278 .LVL423: 5279 .L657: 5280 .LBE939: 5281 .LBE938: 3125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5282 .loc 1 3125 0 5283 022a 002D cmp r5, #0 5284 022c 5AD1 bne .L607 3125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5285 .loc 1 3125 0 is_stmt 0 discriminator 1 5286 022e C2F38462 ubfx r2, r2, #26, #5 5287 0232 0123 movs r3, #1 5288 0234 03FA02F2 lsl r2, r3, r2 5289 .L608: 3125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5290 .loc 1 3125 0 discriminator 4 5291 0238 D4F8A030 ldr r3, [r4, #160] 5292 023c 1343 orrs r3, r3, r2 5293 023e C4F8A030 str r3, [r4, #160] 5294 .L610: 3147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5295 .loc 1 3147 0 is_stmt 1 5296 0242 C36D ldr r3, [r0, #92] 3156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5297 .loc 1 3156 0 5298 0244 0A7B ldrb r2, [r1, #12] @ zero_extendqisi2 5299 .LBB940: 5300 .LBB941: 7461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5301 .loc 2 7461 0 5302 0246 4FF48075 mov r5, #256 5303 .LBE941: 5304 .LBE940: 3147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5305 .loc 1 3147 0 ARM GAS /tmp/ccsErhU4.s page 332 5306 024a 23F40033 bic r3, r3, #131072 5307 024e C365 str r3, [r0, #92] 5308 .LVL424: 5309 .LBB943: 5310 .LBB942: 7461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5311 .loc 2 7461 0 5312 0250 2560 str r5, [r4] 5313 .LVL425: 5314 .LBE942: 5315 .LBE943: 5316 .LBB944: 5317 .LBB945: 7856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5318 .loc 2 7856 0 5319 0252 6368 ldr r3, [r4, #4] 5320 .LBE945: 5321 .LBE944: 3156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5322 .loc 1 3156 0 5323 0254 012A cmp r2, #1 5324 .LVL426: 5325 .LBB947: 5326 .LBB946: 7856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5327 .loc 2 7856 0 5328 0256 0CBF ite eq 5329 0258 2B43 orreq r3, r3, r5 5330 .LVL427: 5331 .LBE946: 5332 .LBE947: 5333 .LBB948: 5334 .LBB949: 7977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5335 .loc 2 7977 0 5336 025a 23F48073 bicne r3, r3, #256 5337 025e 6360 str r3, [r4, #4] 5338 0260 D1E90463 ldrd r6, r3, [r1, #16] 5339 .LBE949: 5340 .LBE948: 3192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5341 .loc 1 3192 0 5342 0264 274D ldr r5, .L661+4 5343 0266 E1E6 b .L619 5344 .LVL428: 5345 .L611: 5346 .LBB950: 5347 .LBB951: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 5348 .loc 3 1055 0 discriminator 2 5349 .syntax unified 5350 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5351 0268 92FAA2F2 rbit r2, r2 5352 @ 0 "" 2 5353 .LVL429: 5354 .thumb 5355 .syntax unified ARM GAS /tmp/ccsErhU4.s page 333 5356 .LBE951: 5357 .LBE950: 5358 .LBB952: 5359 .LBB953: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 5360 .loc 3 1089 0 discriminator 2 5361 026c 002A cmp r2, #0 5362 026e 42D0 beq .L627 5363 .loc 3 1093 0 5364 0270 B2FA82F2 clz r2, r2 5365 0274 0125 movs r5, #1 5366 0276 9540 lsls r5, r5, r2 5367 0278 2DE7 b .L612 5368 .L592: 5369 .LVL430: 5370 .LBE953: 5371 .LBE952: 5372 .LBB955: 5373 .LBB956: 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5374 .loc 2 5727 0 5375 027a E368 ldr r3, [r4, #12] 5376 027c 23F0FB43 bic r3, r3, #2105540608 5377 0280 23F48003 bic r3, r3, #4194304 5378 0284 43F08073 orr r3, r3, #16777216 5379 0288 E360 str r3, [r4, #12] 5380 028a 4DE7 b .L599 5381 .LVL431: 5382 .L597: 5383 .LBE956: 5384 .LBE955: 5385 .LBB957: 5386 .LBB958: 5387 028c E268 ldr r2, [r4, #12] 5388 028e 8B68 ldr r3, [r1, #8] 5389 0290 22F0FB42 bic r2, r2, #2105540608 5390 0294 22F48002 bic r2, r2, #4194304 5391 0298 03F0F843 and r3, r3, #2080374784 5392 029c 1343 orrs r3, r3, r2 5393 029e 43F0E073 orr r3, r3, #29360128 5394 02a2 E360 str r3, [r4, #12] 5395 .LVL432: 5396 02a4 40E7 b .L599 5397 .LVL433: 5398 .L596: 5399 .LBE958: 5400 .LBE957: 5401 .LBB959: 5402 .LBB960: 5403 02a6 E368 ldr r3, [r4, #12] 5404 02a8 23F0FB43 bic r3, r3, #2105540608 5405 02ac 23F48003 bic r3, r3, #4194304 5406 02b0 43F0C073 orr r3, r3, #25165824 5407 02b4 E360 str r3, [r4, #12] 5408 02b6 37E7 b .L599 5409 .LVL434: 5410 .L659: ARM GAS /tmp/ccsErhU4.s page 334 5411 .LBE960: 5412 .LBE959: 5413 .LBB961: 5414 .LBB962: 5415 02b8 E268 ldr r2, [r4, #12] 5416 02ba 8B68 ldr r3, [r1, #8] 5417 02bc 22F0FB42 bic r2, r2, #2105540608 5418 02c0 22F48002 bic r2, r2, #4194304 5419 02c4 03F0F843 and r3, r3, #2080374784 5420 02c8 1343 orrs r3, r3, r2 5421 02ca 43F0A073 orr r3, r3, #20971520 5422 02ce E360 str r3, [r4, #12] 5423 .LVL435: 5424 02d0 2AE7 b .L599 5425 .LVL436: 5426 .L594: 5427 .LBE962: 5428 .LBE961: 5429 .LBB963: 5430 .LBB964: 5431 02d2 E368 ldr r3, [r4, #12] 5432 02d4 23F0FB43 bic r3, r3, #2105540608 5433 02d8 23F48003 bic r3, r3, #4194304 5434 02dc 43F40003 orr r3, r3, #8388608 5435 02e0 E360 str r3, [r4, #12] 5436 02e2 21E7 b .L599 5437 .LVL437: 5438 .L607: 5439 .LBE964: 5440 .LBE963: 5441 .LBB965: 5442 .LBB966: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 5443 .loc 3 1055 0 discriminator 2 5444 .syntax unified 5445 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5446 02e4 92FAA2F2 rbit r2, r2 5447 @ 0 "" 2 5448 .LVL438: 5449 .thumb 5450 .syntax unified 5451 .LBE966: 5452 .LBE965: 5453 .LBB967: 5454 .LBB968: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 5455 .loc 3 1089 0 discriminator 2 5456 02e8 3AB1 cbz r2, .L626 5457 .loc 3 1093 0 5458 02ea B2FA82F2 clz r2, r2 5459 02ee 0123 movs r3, #1 5460 02f0 03FA02F2 lsl r2, r3, r2 5461 02f4 A0E7 b .L608 5462 .L627: 5463 .LBE968: 5464 .LBE967: 5465 .LBB970: ARM GAS /tmp/ccsErhU4.s page 335 5466 .LBB954: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 5467 .loc 3 1089 0 5468 02f6 0125 movs r5, #1 5469 02f8 EDE6 b .L612 5470 .L626: 5471 .LBE954: 5472 .LBE970: 5473 .LBB971: 5474 .LBB969: 5475 02fa 0122 movs r2, #1 5476 02fc 9CE7 b .L608 5477 .L662: 5478 02fe 00BF .align 2 5479 .L661: 5480 0300 0000C07D .word 2109734912 5481 0304 FFFF1700 .word 1572863 5482 .LBE969: 5483 .LBE971: 5484 .cfi_endproc 5485 .LFE350: 5487 .section .text.HAL_ADC_GetState,"ax",%progbits 5488 .align 1 5489 .p2align 2,,3 5490 .global HAL_ADC_GetState 5491 .syntax unified 5492 .thumb 5493 .thumb_func 5494 .fpu fpv4-sp-d16 5496 HAL_ADC_GetState: 5497 .LFB351: 3254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 5498 .loc 1 3254 0 5499 .cfi_startproc 5500 @ args = 0, pretend = 0, frame = 0 5501 @ frame_needed = 0, uses_anonymous_args = 0 5502 @ link register save eliminated. 5503 .LVL439: 3259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5504 .loc 1 3259 0 5505 0000 C06D ldr r0, [r0, #92] 5506 .LVL440: 3260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5507 .loc 1 3260 0 5508 0002 7047 bx lr 5509 .cfi_endproc 5510 .LFE351: 5512 .section .text.HAL_ADC_GetError,"ax",%progbits 5513 .align 1 5514 .p2align 2,,3 5515 .global HAL_ADC_GetError 5516 .syntax unified 5517 .thumb 5518 .thumb_func 5519 .fpu fpv4-sp-d16 5521 HAL_ADC_GetError: 5522 .LFB352: ARM GAS /tmp/ccsErhU4.s page 336 3268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Check the parameters */ 5523 .loc 1 3268 0 5524 .cfi_startproc 5525 @ args = 0, pretend = 0, frame = 0 5526 @ frame_needed = 0, uses_anonymous_args = 0 5527 @ link register save eliminated. 5528 .LVL441: 3272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5529 .loc 1 3272 0 5530 0000 006E ldr r0, [r0, #96] 5531 .LVL442: 3273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5532 .loc 1 3273 0 5533 0002 7047 bx lr 5534 .cfi_endproc 5535 .LFE352: 5537 .section .text.ADC_ConversionStop,"ax",%progbits 5538 .align 1 5539 .p2align 2,,3 5540 .global ADC_ConversionStop 5541 .syntax unified 5542 .thumb 5543 .thumb_func 5544 .fpu fpv4-sp-d16 5546 ADC_ConversionStop: 5547 .LFB353: 3298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 5548 .loc 1 3298 0 5549 .cfi_startproc 5550 @ args = 0, pretend = 0, frame = 0 5551 @ frame_needed = 0, uses_anonymous_args = 0 5552 .LVL443: 3312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 5553 .loc 1 3312 0 5554 0000 0368 ldr r3, [r0] 5555 .LVL444: 5556 .LBB988: 5557 .LBB989: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5558 .loc 2 6846 0 5559 0002 9A68 ldr r2, [r3, #8] 5560 0004 5207 lsls r2, r2, #29 5561 0006 28D5 bpl .L717 5562 .LVL445: 5563 .LBE989: 5564 .LBE988: 5565 .LBB990: 5566 .LBB991: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5567 .loc 2 7071 0 5568 0008 9A68 ldr r2, [r3, #8] 5569 .L685: 5570 .LBE991: 5571 .LBE990: 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 5572 .loc 1 3324 0 5573 000a DA68 ldr r2, [r3, #12] ARM GAS /tmp/ccsErhU4.s page 337 3298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 5574 .loc 1 3298 0 5575 000c 70B5 push {r4, r5, r6, lr} 5576 .LCFI38: 5577 .cfi_def_cfa_offset 16 5578 .cfi_offset 4, -16 5579 .cfi_offset 5, -12 5580 .cfi_offset 6, -8 5581 .cfi_offset 14, -4 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 5582 .loc 1 3324 0 5583 000e 9401 lsls r4, r2, #6 5584 0010 04D5 bpl .L668 3326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 5585 .loc 1 3326 0 5586 0012 848B ldrh r4, [r0, #28] 5587 0014 40F20112 movw r2, #257 5588 0018 9442 cmp r4, r2 5589 001a 43D0 beq .L718 5590 .L668: 3353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5591 .loc 1 3353 0 5592 001c 0229 cmp r1, #2 5593 .LBB993: 5594 .LBB994: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5595 .loc 2 6846 0 5596 001e 9A68 ldr r2, [r3, #8] 5597 .LBE994: 5598 .LBE993: 3353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5599 .loc 1 3353 0 5600 0020 20D0 beq .L675 5601 .LVL446: 5602 .LBB997: 5603 .LBB995: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5604 .loc 2 6846 0 5605 0022 5407 lsls r4, r2, #29 5606 0024 02D5 bpl .L676 5607 .LVL447: 5608 .LBE995: 5609 .LBE997: 5610 .LBB998: 5611 .LBB999: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5612 .loc 2 6735 0 5613 0026 9A68 ldr r2, [r3, #8] 5614 0028 9207 lsls r2, r2, #30 5615 002a 5BD5 bpl .L719 5616 .LVL448: 5617 .L676: 5618 .LBE999: 5619 .LBE998: 3367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5620 .loc 1 3367 0 5621 002c 0129 cmp r1, #1 ARM GAS /tmp/ccsErhU4.s page 338 5622 002e 53D0 beq .L677 5623 .LVL449: 5624 .LBB1001: 5625 .LBB1002: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5626 .loc 2 7071 0 5627 0030 9A68 ldr r2, [r3, #8] 5628 0032 1607 lsls r6, r2, #28 5629 0034 0AD5 bpl .L678 5630 .LVL450: 5631 .LBE1002: 5632 .LBE1001: 5633 .LBB1004: 5634 .LBB1005: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5635 .loc 2 6735 0 5636 0036 9A68 ldr r2, [r3, #8] 5637 0038 9407 lsls r4, r2, #30 5638 003a 07D4 bmi .L678 5639 .L687: 5640 .LVL451: 5641 .LBE1005: 5642 .LBE1004: 5643 .LBB1007: 5644 .LBB1008: 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5645 .loc 2 7058 0 5646 003c 9A68 ldr r2, [r3, #8] 5647 003e 22F00042 bic r2, r2, #-2147483648 5648 0042 22F03F02 bic r2, r2, #63 5649 0046 42F02002 orr r2, r2, #32 5650 004a 9A60 str r2, [r3, #8] 5651 .LVL452: 5652 .L678: 5653 .LBE1008: 5654 .LBE1007: 3381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5655 .loc 1 3381 0 5656 004c 0229 cmp r1, #2 5657 004e 0BD0 beq .L679 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 5658 .loc 1 3391 0 5659 0050 0329 cmp r1, #3 5660 0052 0CBF ite eq 5661 0054 0C25 moveq r5, #12 5662 0056 0425 movne r5, #4 5663 0058 07E0 b .L674 5664 .LVL453: 5665 .L717: 5666 .LCFI39: 5667 .cfi_def_cfa_offset 0 5668 .cfi_restore 4 5669 .cfi_restore 5 5670 .cfi_restore 6 5671 .cfi_restore 14 5672 .LBB1009: 5673 .LBB992: ARM GAS /tmp/ccsErhU4.s page 339 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5674 .loc 2 7071 0 5675 005a 9A68 ldr r2, [r3, #8] 5676 005c 1207 lsls r2, r2, #28 5677 005e D4D4 bmi .L685 5678 .LBE992: 5679 .LBE1009: 3419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5680 .loc 1 3419 0 5681 0060 0020 movs r0, #0 5682 .LVL454: 3420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5683 .loc 1 3420 0 5684 0062 7047 bx lr 5685 .LVL455: 5686 .L675: 5687 .LCFI40: 5688 .cfi_def_cfa_offset 16 5689 .cfi_offset 4, -16 5690 .cfi_offset 5, -12 5691 .cfi_offset 6, -8 5692 .cfi_offset 14, -4 5693 .LBB1010: 5694 .LBB1003: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5695 .loc 2 7071 0 5696 0064 1407 lsls r4, r2, #28 5697 0066 39D4 bmi .L720 5698 .LVL456: 5699 .L679: 5700 .LBE1003: 5701 .LBE1010: 3387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 5702 .loc 1 3387 0 5703 0068 0825 movs r5, #8 5704 .LVL457: 5705 .L674: 5706 006a 0446 mov r4, r0 5707 .LVL458: 3396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5708 .loc 1 3396 0 5709 006c FFF7FEFF bl HAL_GetTick 5710 .LVL459: 5711 0070 2368 ldr r3, [r4] 5712 0072 0646 mov r6, r0 5713 .LVL460: 5714 .L681: 3398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5715 .loc 1 3398 0 5716 0074 9B68 ldr r3, [r3, #8] 5717 0076 2B42 tst r3, r5 5718 0078 12D0 beq .L721 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5719 .loc 1 3400 0 5720 007a FFF7FEFF bl HAL_GetTick 5721 .LVL461: 5722 007e 801B subs r0, r0, r6 ARM GAS /tmp/ccsErhU4.s page 340 5723 0080 0528 cmp r0, #5 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5724 .loc 1 3403 0 5725 0082 2368 ldr r3, [r4] 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5726 .loc 1 3400 0 5727 0084 F6D9 bls .L681 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5728 .loc 1 3403 0 5729 0086 9A68 ldr r2, [r3, #8] 5730 0088 2A42 tst r2, r5 5731 008a F3D0 beq .L681 3406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5732 .loc 1 3406 0 5733 008c E36D ldr r3, [r4, #92] 5734 008e 43F01003 orr r3, r3, #16 5735 0092 E365 str r3, [r4, #92] 3409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5736 .loc 1 3409 0 5737 0094 236E ldr r3, [r4, #96] 5738 0096 43F00103 orr r3, r3, #1 5739 009a 2366 str r3, [r4, #96] 3411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5740 .loc 1 3411 0 5741 009c 0120 movs r0, #1 3420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5742 .loc 1 3420 0 5743 009e 70BD pop {r4, r5, r6, pc} 5744 .LVL462: 5745 .L721: 3419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5746 .loc 1 3419 0 5747 00a0 0020 movs r0, #0 3420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5748 .loc 1 3420 0 5749 00a2 70BD pop {r4, r5, r6, pc} 5750 .LVL463: 5751 .L718: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5752 .loc 1 3333 0 5753 00a4 1A68 ldr r2, [r3] 5754 00a6 5206 lsls r2, r2, #25 5755 00a8 06D4 bmi .L670 5756 00aa 184A ldr r2, .L723 5757 00ac 01E0 b .L669 5758 .LVL464: 5759 .L672: 3335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5760 .loc 1 3335 0 5761 00ae 013A subs r2, r2, #1 5762 00b0 21D0 beq .L722 5763 .L669: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5764 .loc 1 3333 0 5765 00b2 1968 ldr r1, [r3] 5766 00b4 4E06 lsls r6, r1, #25 5767 00b6 FAD5 bpl .L672 ARM GAS /tmp/ccsErhU4.s page 341 5768 .L670: 3349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5769 .loc 1 3349 0 5770 00b8 4022 movs r2, #64 5771 00ba 1A60 str r2, [r3] 5772 .LVL465: 5773 .LBB1011: 5774 .LBB996: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5775 .loc 2 6846 0 5776 00bc 9A68 ldr r2, [r3, #8] 5777 00be 5507 lsls r5, r2, #29 5778 00c0 0AD5 bpl .L677 5779 .LVL466: 5780 .LBE996: 5781 .LBE1011: 5782 .LBB1012: 5783 .LBB1000: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5784 .loc 2 6735 0 5785 00c2 9A68 ldr r2, [r3, #8] 5786 00c4 9507 lsls r5, r2, #30 5787 00c6 07D4 bmi .L677 5788 .LVL467: 5789 .LBE1000: 5790 .LBE1012: 5791 .LBB1013: 5792 .LBB1014: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5793 .loc 2 6833 0 5794 00c8 9A68 ldr r2, [r3, #8] 5795 00ca 22F00042 bic r2, r2, #-2147483648 5796 00ce 22F03F02 bic r2, r2, #63 5797 00d2 42F01002 orr r2, r2, #16 5798 00d6 9A60 str r2, [r3, #8] 5799 .LVL468: 5800 .L677: 5801 .LBE1014: 5802 .LBE1013: 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 5803 .loc 1 3391 0 5804 00d8 0425 movs r5, #4 5805 00da C6E7 b .L674 5806 .LVL469: 5807 .L720: 5808 .LBB1016: 5809 .LBB1006: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5810 .loc 2 6735 0 5811 00dc 9A68 ldr r2, [r3, #8] 5812 00de 9207 lsls r2, r2, #30 5813 00e0 C2D4 bmi .L679 5814 00e2 ABE7 b .L687 5815 .LVL470: 5816 .L719: 5817 .LBE1006: 5818 .LBE1016: ARM GAS /tmp/ccsErhU4.s page 342 5819 .LBB1017: 5820 .LBB1015: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5821 .loc 2 6833 0 5822 00e4 9A68 ldr r2, [r3, #8] 5823 00e6 22F00042 bic r2, r2, #-2147483648 5824 00ea 22F03F02 bic r2, r2, #63 5825 00ee 42F01002 orr r2, r2, #16 5826 00f2 9A60 str r2, [r3, #8] 5827 00f4 9AE7 b .L676 5828 .LVL471: 5829 .L722: 5830 .LBE1015: 5831 .LBE1017: 3338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5832 .loc 1 3338 0 5833 00f6 C36D ldr r3, [r0, #92] 5834 .LVL472: 5835 00f8 43F01003 orr r3, r3, #16 5836 00fc C365 str r3, [r0, #92] 3341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5837 .loc 1 3341 0 5838 00fe 036E ldr r3, [r0, #96] 5839 0100 43F00103 orr r3, r3, #1 5840 0104 0366 str r3, [r0, #96] 3343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5841 .loc 1 3343 0 5842 0106 0120 movs r0, #1 5843 .LVL473: 3420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5844 .loc 1 3420 0 5845 0108 70BD pop {r4, r5, r6, pc} 5846 .L724: 5847 010a 00BF .align 2 5848 .L723: 5849 010c 000040A3 .word -1556086784 5850 .cfi_endproc 5851 .LFE353: 5853 .section .text.ADC_Enable,"ax",%progbits 5854 .align 1 5855 .p2align 2,,3 5856 .global ADC_Enable 5857 .syntax unified 5858 .thumb 5859 .thumb_func 5860 .fpu fpv4-sp-d16 5862 ADC_Enable: 5863 .LFB354: 3430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 5864 .loc 1 3430 0 5865 .cfi_startproc 5866 @ args = 0, pretend = 0, frame = 0 5867 @ frame_needed = 0, uses_anonymous_args = 0 5868 .LVL474: 3437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5869 .loc 1 3437 0 5870 0000 0368 ldr r3, [r0] ARM GAS /tmp/ccsErhU4.s page 343 5871 .LVL475: 5872 .LBB1018: 5873 .LBB1019: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5874 .loc 2 6724 0 5875 0002 9A68 ldr r2, [r3, #8] 5876 0004 D207 lsls r2, r2, #31 5877 0006 0DD4 bmi .L739 5878 .LVL476: 5879 .LBE1019: 5880 .LBE1018: 3440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) 5881 .loc 1 3440 0 5882 0008 9968 ldr r1, [r3, #8] 5883 000a 1D4A ldr r2, .L741 5884 000c 1142 tst r1, r2 5885 000e 0BD0 beq .L728 3444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5886 .loc 1 3444 0 5887 0010 C36D ldr r3, [r0, #92] 5888 0012 43F01003 orr r3, r3, #16 5889 0016 C365 str r3, [r0, #92] 3447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5890 .loc 1 3447 0 5891 0018 036E ldr r3, [r0, #96] 5892 001a 43F00103 orr r3, r3, #1 5893 001e 0366 str r3, [r0, #96] 3449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5894 .loc 1 3449 0 5895 0020 0120 movs r0, #1 5896 .LVL477: 5897 0022 7047 bx lr 5898 .LVL478: 5899 .L739: 3491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5900 .loc 1 3491 0 5901 0024 0020 movs r0, #0 5902 .LVL479: 3492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5903 .loc 1 3492 0 5904 0026 7047 bx lr 5905 .LVL480: 5906 .L728: 3430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 5907 .loc 1 3430 0 5908 0028 70B5 push {r4, r5, r6, lr} 5909 .LCFI41: 5910 .cfi_def_cfa_offset 16 5911 .cfi_offset 4, -16 5912 .cfi_offset 5, -12 5913 .cfi_offset 6, -8 5914 .cfi_offset 14, -4 5915 .LBB1020: 5916 .LBB1021: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5917 .loc 2 6688 0 5918 002a 9A68 ldr r2, [r3, #8] ARM GAS /tmp/ccsErhU4.s page 344 5919 002c 154E ldr r6, .L741+4 5920 002e 3240 ands r2, r2, r6 5921 0030 42F00102 orr r2, r2, #1 5922 0034 9A60 str r2, [r3, #8] 5923 0036 0446 mov r4, r0 5924 .LVL481: 5925 .LBE1021: 5926 .LBE1020: 3456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5927 .loc 1 3456 0 5928 0038 FFF7FEFF bl HAL_GetTick 5929 .LVL482: 5930 003c 2368 ldr r3, [r4] 5931 003e 0546 mov r5, r0 5932 .LVL483: 5933 .L729: 3458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5934 .loc 1 3458 0 5935 0040 1A68 ldr r2, [r3] 5936 0042 D207 lsls r2, r2, #31 5937 0044 1AD4 bmi .L740 5938 .LBB1022: 5939 .LBB1023: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5940 .loc 2 6724 0 5941 0046 9A68 ldr r2, [r3, #8] 5942 0048 D007 lsls r0, r2, #31 5943 004a 04D4 bmi .L730 5944 .LBE1023: 5945 .LBE1022: 5946 .LBB1024: 5947 .LBB1025: 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5948 .loc 2 6688 0 5949 004c 9A68 ldr r2, [r3, #8] 5950 004e 3240 ands r2, r2, r6 5951 0050 42F00102 orr r2, r2, #1 5952 0054 9A60 str r2, [r3, #8] 5953 .L730: 5954 .LBE1025: 5955 .LBE1024: 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5956 .loc 1 3473 0 5957 0056 FFF7FEFF bl HAL_GetTick 5958 .LVL484: 5959 005a 401B subs r0, r0, r5 5960 005c 0228 cmp r0, #2 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5961 .loc 1 3476 0 5962 005e 2368 ldr r3, [r4] 3473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5963 .loc 1 3473 0 5964 0060 EED9 bls .L729 3476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 5965 .loc 1 3476 0 5966 0062 1A68 ldr r2, [r3] 5967 0064 D107 lsls r1, r2, #31 ARM GAS /tmp/ccsErhU4.s page 345 5968 0066 EBD4 bmi .L729 3479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5969 .loc 1 3479 0 5970 0068 E36D ldr r3, [r4, #92] 5971 006a 43F01003 orr r3, r3, #16 5972 006e E365 str r3, [r4, #92] 3482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5973 .loc 1 3482 0 5974 0070 236E ldr r3, [r4, #96] 5975 0072 43F00103 orr r3, r3, #1 5976 0076 2366 str r3, [r4, #96] 3484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5977 .loc 1 3484 0 5978 0078 0120 movs r0, #1 3492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5979 .loc 1 3492 0 5980 007a 70BD pop {r4, r5, r6, pc} 5981 .LVL485: 5982 .L740: 3491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 5983 .loc 1 3491 0 5984 007c 0020 movs r0, #0 3492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 5985 .loc 1 3492 0 5986 007e 70BD pop {r4, r5, r6, pc} 5987 .LVL486: 5988 .L742: 5989 .align 2 5990 .L741: 5991 0080 3F000080 .word -2147483585 5992 0084 C0FFFF7F .word 2147483584 5993 .cfi_endproc 5994 .LFE354: 5996 .section .text.ADC_Disable,"ax",%progbits 5997 .align 1 5998 .p2align 2,,3 5999 .global ADC_Disable 6000 .syntax unified 6001 .thumb 6002 .thumb_func 6003 .fpu fpv4-sp-d16 6005 ADC_Disable: 6006 .LFB355: 3502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** uint32_t tickstart; 6007 .loc 1 3502 0 6008 .cfi_startproc 6009 @ args = 0, pretend = 0, frame = 0 6010 @ frame_needed = 0, uses_anonymous_args = 0 6011 .LVL487: 6012 0000 38B5 push {r3, r4, r5, lr} 6013 .LCFI42: 6014 .cfi_def_cfa_offset 16 6015 .cfi_offset 3, -16 6016 .cfi_offset 4, -12 6017 .cfi_offset 5, -8 6018 .cfi_offset 14, -4 3504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 346 6019 .loc 1 3504 0 6020 0002 0368 ldr r3, [r0] 6021 .LVL488: 6022 .LBB1026: 6023 .LBB1027: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6024 .loc 2 6735 0 6025 0004 9A68 ldr r2, [r3, #8] 6026 0006 9407 lsls r4, r2, #30 6027 0008 02D5 bpl .L744 6028 .LVL489: 6029 .LBE1027: 6030 .LBE1026: 6031 .LBB1028: 6032 .LBB1029: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6033 .loc 2 6724 0 6034 000a 9B68 ldr r3, [r3, #8] 6035 .LVL490: 6036 .LBE1029: 6037 .LBE1028: 3555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6038 .loc 1 3555 0 6039 000c 0020 movs r0, #0 6040 .LVL491: 3556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6041 .loc 1 3556 0 6042 000e 38BD pop {r3, r4, r5, pc} 6043 .LVL492: 6044 .L744: 6045 .LBB1031: 6046 .LBB1030: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6047 .loc 2 6724 0 6048 0010 9A68 ldr r2, [r3, #8] 6049 0012 D107 lsls r1, r2, #31 6050 0014 0ED5 bpl .L752 6051 .LVL493: 6052 .LBE1030: 6053 .LBE1031: 3514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6054 .loc 1 3514 0 6055 0016 9A68 ldr r2, [r3, #8] 6056 0018 02F00D02 and r2, r2, #13 6057 001c 012A cmp r2, #1 6058 001e 0BD0 beq .L757 3523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6059 .loc 1 3523 0 6060 0020 C36D ldr r3, [r0, #92] 6061 0022 43F01003 orr r3, r3, #16 6062 0026 C365 str r3, [r0, #92] 3526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6063 .loc 1 3526 0 6064 0028 036E ldr r3, [r0, #96] 6065 002a 43F00103 orr r3, r3, #1 6066 002e 0366 str r3, [r0, #96] 3528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } ARM GAS /tmp/ccsErhU4.s page 347 6067 .loc 1 3528 0 6068 0030 0120 movs r0, #1 6069 .LVL494: 3556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6070 .loc 1 3556 0 6071 0032 38BD pop {r3, r4, r5, pc} 6072 .L752: 3555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6073 .loc 1 3555 0 6074 0034 0020 movs r0, #0 3556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6075 .loc 1 3556 0 6076 0036 38BD pop {r3, r4, r5, pc} 6077 .LVL495: 6078 .L757: 6079 .LBB1032: 6080 .LBB1033: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6081 .loc 2 6708 0 6082 0038 9A68 ldr r2, [r3, #8] 6083 003a 22F00042 bic r2, r2, #-2147483648 6084 003e 22F03F02 bic r2, r2, #63 6085 0042 42F00202 orr r2, r2, #2 6086 .LBE1033: 6087 .LBE1032: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6088 .loc 1 3518 0 6089 0046 0321 movs r1, #3 6090 .LBB1035: 6091 .LBB1034: 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6092 .loc 2 6708 0 6093 0048 9A60 str r2, [r3, #8] 6094 .LVL496: 6095 .LBE1034: 6096 .LBE1035: 3518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6097 .loc 1 3518 0 6098 004a 1960 str r1, [r3] 6099 004c 0446 mov r4, r0 3533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6100 .loc 1 3533 0 6101 004e FFF7FEFF bl HAL_GetTick 6102 .LVL497: 6103 0052 2368 ldr r3, [r4] 6104 0054 0546 mov r5, r0 6105 .LVL498: 6106 .L748: 3535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6107 .loc 1 3535 0 6108 0056 9B68 ldr r3, [r3, #8] 6109 0058 DB07 lsls r3, r3, #31 6110 005a EBD5 bpl .L752 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6111 .loc 1 3537 0 6112 005c FFF7FEFF bl HAL_GetTick 6113 .LVL499: ARM GAS /tmp/ccsErhU4.s page 348 6114 0060 401B subs r0, r0, r5 6115 0062 0228 cmp r0, #2 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6116 .loc 1 3540 0 6117 0064 2368 ldr r3, [r4] 3537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6118 .loc 1 3537 0 6119 0066 F6D9 bls .L748 3540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6120 .loc 1 3540 0 6121 0068 9A68 ldr r2, [r3, #8] 6122 006a D207 lsls r2, r2, #31 6123 006c F3D5 bpl .L748 3543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6124 .loc 1 3543 0 6125 006e E36D ldr r3, [r4, #92] 6126 0070 43F01003 orr r3, r3, #16 6127 0074 E365 str r3, [r4, #92] 3546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6128 .loc 1 3546 0 6129 0076 236E ldr r3, [r4, #96] 6130 0078 43F00103 orr r3, r3, #1 6131 007c 2366 str r3, [r4, #96] 3548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6132 .loc 1 3548 0 6133 007e 0120 movs r0, #1 3556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6134 .loc 1 3556 0 6135 0080 38BD pop {r3, r4, r5, pc} 6136 .cfi_endproc 6137 .LFE355: 6139 0082 00BF .section .text.HAL_ADC_DeInit,"ax",%progbits 6140 .align 1 6141 .p2align 2,,3 6142 .global HAL_ADC_DeInit 6143 .syntax unified 6144 .thumb 6145 .thumb_func 6146 .fpu fpv4-sp-d16 6148 HAL_ADC_DeInit: 6149 .LFB330: 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 6150 .loc 1 723 0 6151 .cfi_startproc 6152 @ args = 0, pretend = 0, frame = 0 6153 @ frame_needed = 0, uses_anonymous_args = 0 6154 .LVL500: 6155 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 6156 .LCFI43: 6157 .cfi_def_cfa_offset 24 6158 .cfi_offset 3, -24 6159 .cfi_offset 4, -20 6160 .cfi_offset 5, -16 6161 .cfi_offset 6, -12 6162 .cfi_offset 7, -8 6163 .cfi_offset 14, -4 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { ARM GAS /tmp/ccsErhU4.s page 349 6164 .loc 1 727 0 6165 0002 0028 cmp r0, #0 6166 0004 00F09280 beq .L765 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6167 .loc 1 736 0 6168 0008 C36D ldr r3, [r0, #92] 6169 000a 0446 mov r4, r0 6170 000c 43F00203 orr r3, r3, #2 6171 0010 C365 str r3, [r0, #92] 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6172 .loc 1 739 0 6173 0012 0321 movs r1, #3 6174 0014 FFF7FEFF bl ADC_ConversionStop 6175 .LVL501: 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6176 .loc 1 747 0 6177 0018 2368 ldr r3, [r4] 6178 001a DA68 ldr r2, [r3, #12] 6179 001c 42F40012 orr r2, r2, #2097152 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6180 .loc 1 750 0 6181 0020 0546 mov r5, r0 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6182 .loc 1 747 0 6183 0022 DA60 str r2, [r3, #12] 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6184 .loc 1 750 0 6185 0024 0028 cmp r0, #0 6186 0026 00F08480 beq .L768 6187 .L760: 6188 .LVL502: 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_JQOVF | ADC_IT_OVR | 6189 .loc 1 771 0 6190 002a 5A68 ldr r2, [r3, #4] 6191 002c DFF838C1 ldr ip, .L770+32 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 6192 .loc 1 793 0 6193 0030 454F ldr r7, .L770 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR1_SQ1 | ADC_SQR1_L); 6194 .loc 1 818 0 6195 0032 4648 ldr r0, .L770+4 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_IT_JQOVF | ADC_IT_OVR | 6196 .loc 1 771 0 6197 0034 02EA0C02 and r2, r2, ip 6198 0038 5A60 str r2, [r3, #4] 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_FLAG_JQOVF | ADC_FLAG_OVR | 6199 .loc 1 778 0 6200 003a 40F2FF72 movw r2, #2047 6201 003e 1A60 str r2, [r3] 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); 6202 .loc 1 789 0 6203 0040 9E68 ldr r6, [r3, #8] 6204 0042 26F0A046 bic r6, r6, #1342177280 6205 0046 9E60 str r6, [r3, #8] 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6206 .loc 1 790 0 6207 0048 9E68 ldr r6, [r3, #8] ARM GAS /tmp/ccsErhU4.s page 350 6208 004a 46F00056 orr r6, r6, #536870912 6209 004e 9E60 str r6, [r3, #8] 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 6210 .loc 1 793 0 6211 0050 D968 ldr r1, [r3, #12] 6212 0052 3940 ands r1, r1, r7 6213 0054 D960 str r1, [r3, #12] 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6214 .loc 1 794 0 6215 0056 D968 ldr r1, [r3, #12] 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR2_SQ6 | ADC_SQR2_SQ5); 6216 .loc 1 822 0 6217 0058 3D4F ldr r7, .L770+8 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6218 .loc 1 794 0 6219 005a 41F00041 orr r1, r1, #-2147483648 6220 005e D960 str r1, [r3, #12] 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSR | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE); 6221 .loc 1 797 0 6222 0060 1A69 ldr r2, [r3, #16] 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR2 */ 6223 .loc 1 838 0 6224 0062 3C49 ldr r1, .L770+12 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_CFGR2_OVSR | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE); 6225 .loc 1 797 0 6226 0064 02EA0C02 and r2, r2, ip 6227 0068 1A61 str r2, [r3, #16] 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6228 .loc 1 801 0 6229 006a 5A69 ldr r2, [r3, #20] 6230 006c 02F08042 and r2, r2, #1073741824 6231 0070 5A61 str r2, [r3, #20] 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 | ADC_SMPR2_SMP13 | 6232 .loc 1 804 0 6233 0072 9A69 ldr r2, [r3, #24] 6234 0074 02F07842 and r2, r2, #-134217728 6235 0078 9A61 str r2, [r3, #24] 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6236 .loc 1 809 0 6237 007a 1A6A ldr r2, [r3, #32] 6238 007c 02F0F022 and r2, r2, #-268374016 6239 0080 1A62 str r2, [r3, #32] 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6240 .loc 1 812 0 6241 0082 5E6A ldr r6, [r3, #36] 6242 0084 06F0FF26 and r6, r6, #-16711936 6243 0088 5E62 str r6, [r3, #36] 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6244 .loc 1 815 0 6245 008a 9E6A ldr r6, [r3, #40] 6246 008c 06F0FF26 and r6, r6, #-16711936 6247 0090 9E62 str r6, [r3, #40] 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR1_SQ1 | ADC_SQR1_L); 6248 .loc 1 818 0 6249 0092 1A6B ldr r2, [r3, #48] 6250 0094 1040 ands r0, r0, r2 6251 0096 1863 str r0, [r3, #48] ARM GAS /tmp/ccsErhU4.s page 351 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR2_SQ6 | ADC_SQR2_SQ5); 6252 .loc 1 822 0 6253 0098 5E6B ldr r6, [r3, #52] 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6254 .loc 1 850 0 6255 009a 2F48 ldr r0, .L770+16 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR2_SQ6 | ADC_SQR2_SQ5); 6256 .loc 1 822 0 6257 009c 3E40 ands r6, r6, r7 6258 009e 5E63 str r6, [r3, #52] 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ADC_SQR3_SQ11 | ADC_SQR3_SQ10); 6259 .loc 1 826 0 6260 00a0 9A6B ldr r2, [r3, #56] 6261 00a2 3A40 ands r2, r2, r7 6262 00a4 9A63 str r2, [r3, #56] 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6263 .loc 1 830 0 6264 00a6 DA6B ldr r2, [r3, #60] 6265 00a8 22F4FB62 bic r2, r2, #2008 6266 00ac 22F00702 bic r2, r2, #7 6267 00b0 DA63 str r2, [r3, #60] 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR2 */ 6268 .loc 1 838 0 6269 00b2 1A6E ldr r2, [r3, #96] 6270 00b4 0A40 ands r2, r2, r1 6271 00b6 1A66 str r2, [r3, #96] 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR3 */ 6272 .loc 1 840 0 6273 00b8 5A6E ldr r2, [r3, #100] 6274 00ba 0A40 ands r2, r2, r1 6275 00bc 5A66 str r2, [r3, #100] 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** /* Reset register OFR4 */ 6276 .loc 1 842 0 6277 00be 9A6E ldr r2, [r3, #104] 6278 00c0 0A40 ands r2, r2, r1 6279 00c2 9A66 str r2, [r3, #104] 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6280 .loc 1 844 0 6281 00c4 DA6E ldr r2, [r3, #108] 6282 00c6 1140 ands r1, r1, r2 6283 00c8 D966 str r1, [r3, #108] 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6284 .loc 1 850 0 6285 00ca D3F8A020 ldr r2, [r3, #160] 6286 00ce 0240 ands r2, r2, r0 6287 00d0 C3F8A020 str r2, [r3, #160] 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6288 .loc 1 853 0 6289 00d4 D3F8A420 ldr r2, [r3, #164] 6290 00d8 0240 ands r2, r2, r0 6291 00da C3F8A420 str r2, [r3, #164] 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6292 .loc 1 856 0 6293 00de D3F8B020 ldr r2, [r3, #176] 6294 00e2 0240 ands r2, r2, r0 6295 00e4 C3F8B020 str r2, [r3, #176] 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ARM GAS /tmp/ccsErhU4.s page 352 6296 .loc 1 859 0 6297 00e8 D3F8B420 ldr r2, [r3, #180] 6298 .LBB1036: 6299 .LBB1037: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6300 .loc 2 6724 0 6301 00ec 4FF0A041 mov r1, #1342177280 6302 .LBE1037: 6303 .LBE1036: 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6304 .loc 1 859 0 6305 00f0 22F07F12 bic r2, r2, #8323199 6306 00f4 C3F8B420 str r2, [r3, #180] 6307 .LVL503: 6308 .LBB1040: 6309 .LBB1038: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6310 .loc 2 6724 0 6311 00f8 8B68 ldr r3, [r1, #8] 6312 00fa 13F0010F tst r3, #1 6313 .LBE1038: 6314 .LBE1040: 6315 .LBB1041: 6316 .LBB1042: 6317 00fe 174B ldr r3, .L770+20 6318 0100 9B68 ldr r3, [r3, #8] 6319 .LBE1042: 6320 .LBE1041: 6321 .LBB1044: 6322 .LBB1039: 6323 0102 08D0 beq .L769 6324 .LVL504: 6325 .L764: 6326 .LBE1039: 6327 .LBE1044: 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6328 .loc 1 900 0 6329 0104 0023 movs r3, #0 6330 0106 2366 str r3, [r4, #96] 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6331 .loc 1 904 0 6332 0108 C4E91933 strd r3, r3, [r4, #100] 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6333 .loc 1 907 0 6334 010c E365 str r3, [r4, #92] 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6335 .loc 1 910 0 6336 010e 84F85830 strb r3, [r4, #88] 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6337 .loc 1 914 0 6338 0112 2846 mov r0, r5 6339 0114 F8BD pop {r3, r4, r5, r6, r7, pc} 6340 .LVL505: 6341 .L769: 6342 .LBB1045: 6343 .LBB1043: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccsErhU4.s page 353 6344 .loc 2 6724 0 6345 0116 DB07 lsls r3, r3, #31 6346 0118 F4D4 bmi .L764 6347 .LVL506: 6348 .LBE1043: 6349 .LBE1045: 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6350 .loc 1 875 0 6351 011a 114A ldr r2, .L770+24 6352 011c 1149 ldr r1, .L770+28 6353 011e 9368 ldr r3, [r2, #8] 6354 0120 0B40 ands r3, r3, r1 6355 0122 9360 str r3, [r2, #8] 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ 6356 .loc 1 895 0 6357 0124 2046 mov r0, r4 6358 0126 FFF7FEFF bl HAL_ADC_MspDeInit 6359 .LVL507: 6360 012a EBE7 b .L764 6361 .LVL508: 6362 .L765: 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6363 .loc 1 729 0 6364 012c 0125 movs r5, #1 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6365 .loc 1 914 0 6366 012e 2846 mov r0, r5 6367 .LVL509: 6368 0130 F8BD pop {r3, r4, r5, r6, r7, pc} 6369 .LVL510: 6370 .L768: 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6371 .loc 1 753 0 6372 0132 2046 mov r0, r4 6373 .LVL511: 6374 0134 FFF7FEFF bl ADC_Disable 6375 .LVL512: 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6376 .loc 1 756 0 6377 0138 0546 mov r5, r0 6378 013a 08B1 cbz r0, .L761 6379 013c 2368 ldr r3, [r4] 6380 013e 74E7 b .L760 6381 .L761: 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6382 .loc 1 759 0 6383 0140 0122 movs r2, #1 6384 0142 2368 ldr r3, [r4] 6385 0144 E265 str r2, [r4, #92] 6386 0146 70E7 b .L760 6387 .L771: 6388 .align 2 6389 .L770: 6390 0148 04000080 .word -2147483644 6391 014c 300882E0 .word -528349136 6392 0150 200882E0 .word -528349152 6393 0154 00F0FF03 .word 67104768 ARM GAS /tmp/ccsErhU4.s page 354 6394 0158 0000F8FF .word -524288 6395 015c 00010050 .word 1342177536 6396 0160 00030050 .word 1342178048 6397 0164 E01000FE .word -33550112 6398 0168 00F8FFFF .word -2048 6399 .cfi_endproc 6400 .LFE330: 6402 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits 6403 .align 1 6404 .p2align 2,,3 6405 .global HAL_ADC_Stop_DMA 6406 .syntax unified 6407 .thumb 6408 .thumb_func 6409 .fpu fpv4-sp-d16 6411 HAL_ADC_Stop_DMA: 6412 .LFB340: 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 6413 .loc 1 2151 0 6414 .cfi_startproc 6415 @ args = 0, pretend = 0, frame = 0 6416 @ frame_needed = 0, uses_anonymous_args = 0 6417 .LVL513: 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6418 .loc 1 2158 0 6419 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 6420 0004 012B cmp r3, #1 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status; 6421 .loc 1 2151 0 6422 0006 70B5 push {r4, r5, r6, lr} 6423 .LCFI44: 6424 .cfi_def_cfa_offset 16 6425 .cfi_offset 4, -16 6426 .cfi_offset 5, -12 6427 .cfi_offset 6, -8 6428 .cfi_offset 14, -4 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6429 .loc 1 2158 0 6430 0008 57D0 beq .L800 6431 .LBB1064: 6432 .LBB1065: 3312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 6433 .loc 1 3312 0 discriminator 2 6434 000a 0368 ldr r3, [r0] 6435 .LBB1066: 6436 .LBB1067: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6437 .loc 2 6846 0 discriminator 2 6438 000c 9A68 ldr r2, [r3, #8] 6439 .LBE1067: 6440 .LBE1066: 6441 .LBE1065: 6442 .LBE1064: 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6443 .loc 1 2158 0 discriminator 2 6444 000e 0121 movs r1, #1 6445 .LBB1101: ARM GAS /tmp/ccsErhU4.s page 355 6446 .LBB1096: 6447 .LBB1070: 6448 .LBB1068: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6449 .loc 2 6846 0 discriminator 2 6450 0010 5207 lsls r2, r2, #29 6451 0012 0446 mov r4, r0 6452 .LBE1068: 6453 .LBE1070: 6454 .LBE1096: 6455 .LBE1101: 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6456 .loc 1 2158 0 discriminator 2 6457 0014 80F85810 strb r1, [r0, #88] 6458 .LVL514: 6459 .LBB1102: 6460 .LBB1097: 6461 .LBB1071: 6462 .LBB1069: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6463 .loc 2 6846 0 discriminator 2 6464 0018 30D5 bpl .L819 6465 .LVL515: 6466 .LBE1069: 6467 .LBE1071: 6468 .LBB1072: 6469 .LBB1073: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6470 .loc 2 7071 0 6471 001a 9A68 ldr r2, [r3, #8] 6472 .L792: 6473 .LBE1073: 6474 .LBE1072: 3324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** && (hadc->Init.ContinuousConvMode == ENABLE) 6475 .loc 1 3324 0 6476 001c DA68 ldr r2, [r3, #12] 6477 001e 9601 lsls r6, r2, #6 6478 0020 04D5 bpl .L776 3326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** ) 6479 .loc 1 3326 0 6480 0022 A18B ldrh r1, [r4, #28] 6481 0024 40F20112 movw r2, #257 6482 0028 9142 cmp r1, r2 6483 002a 61D0 beq .L820 6484 .L776: 6485 .LVL516: 6486 .LBB1075: 6487 .LBB1076: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6488 .loc 2 6846 0 6489 002c 9A68 ldr r2, [r3, #8] 6490 002e 5007 lsls r0, r2, #29 6491 .LVL517: 6492 0030 02D5 bpl .L796 6493 .LVL518: 6494 .LBE1076: 6495 .LBE1075: ARM GAS /tmp/ccsErhU4.s page 356 6496 .LBB1078: 6497 .LBB1079: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6498 .loc 2 6735 0 6499 0032 9A68 ldr r2, [r3, #8] 6500 0034 9107 lsls r1, r2, #30 6501 0036 4FD5 bpl .L821 6502 .LVL519: 6503 .L796: 6504 .LBE1079: 6505 .LBE1078: 6506 .LBB1081: 6507 .LBB1082: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6508 .loc 2 7071 0 6509 0038 9A68 ldr r2, [r3, #8] 6510 003a 1207 lsls r2, r2, #28 6511 003c 40D4 bmi .L822 6512 .LVL520: 6513 .L784: 6514 .LBE1082: 6515 .LBE1081: 3384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 6516 .loc 1 3384 0 6517 003e 0C25 movs r5, #12 6518 .LVL521: 6519 .L782: 3396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6520 .loc 1 3396 0 6521 0040 FFF7FEFF bl HAL_GetTick 6522 .LVL522: 6523 0044 2368 ldr r3, [r4] 6524 0046 0646 mov r6, r0 6525 .LVL523: 6526 .L785: 3398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6527 .loc 1 3398 0 6528 0048 9A68 ldr r2, [r3, #8] 6529 004a 1542 tst r5, r2 6530 004c 19D0 beq .L793 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6531 .loc 1 3400 0 6532 004e FFF7FEFF bl HAL_GetTick 6533 .LVL524: 6534 0052 801B subs r0, r0, r6 6535 0054 0528 cmp r0, #5 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6536 .loc 1 3403 0 6537 0056 2368 ldr r3, [r4] 3400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6538 .loc 1 3400 0 6539 0058 F6D9 bls .L785 3403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6540 .loc 1 3403 0 6541 005a 9A68 ldr r2, [r3, #8] 6542 005c 2A42 tst r2, r5 6543 005e F3D0 beq .L785 ARM GAS /tmp/ccsErhU4.s page 357 6544 .LVL525: 6545 .L818: 3406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6546 .loc 1 3406 0 6547 0060 E36D ldr r3, [r4, #92] 6548 0062 43F01003 orr r3, r3, #16 6549 0066 E365 str r3, [r4, #92] 3409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6550 .loc 1 3409 0 6551 0068 236E ldr r3, [r4, #96] 6552 006a 43F00103 orr r3, r3, #1 6553 006e 2366 str r3, [r4, #96] 6554 .LVL526: 3411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6555 .loc 1 3411 0 6556 0070 0125 movs r5, #1 6557 .L779: 6558 .LVL527: 6559 .LBE1097: 6560 .LBE1102: 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6561 .loc 1 2210 0 6562 0072 0023 movs r3, #0 6563 0074 84F85830 strb r3, [r4, #88] 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6564 .loc 1 2214 0 6565 0078 2846 mov r0, r5 6566 007a 70BD pop {r4, r5, r6, pc} 6567 .LVL528: 6568 .L819: 6569 .LBB1103: 6570 .LBB1098: 6571 .LBB1084: 6572 .LBB1074: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6573 .loc 2 7071 0 6574 007c 9A68 ldr r2, [r3, #8] 6575 007e 1507 lsls r5, r2, #28 6576 0080 CCD4 bmi .L792 6577 .LVL529: 6578 .L793: 6579 .LBE1074: 6580 .LBE1084: 6581 .LBE1098: 6582 .LBE1103: 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6583 .loc 1 2167 0 6584 0082 DA68 ldr r2, [r3, #12] 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6585 .loc 1 2171 0 6586 0084 606D ldr r0, [r4, #84] 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6587 .loc 1 2167 0 6588 0086 22F00102 bic r2, r2, #1 6589 008a DA60 str r2, [r3, #12] 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6590 .loc 1 2171 0 ARM GAS /tmp/ccsErhU4.s page 358 6591 008c 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2 6592 0090 022A cmp r2, #2 6593 0092 3ED0 beq .L789 6594 .LVL530: 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6595 .loc 1 2184 0 6596 0094 5A68 ldr r2, [r3, #4] 6597 0096 22F01002 bic r2, r2, #16 6598 009a 5A60 str r2, [r3, #4] 6599 .L790: 2191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6600 .loc 1 2191 0 6601 009c 2046 mov r0, r4 6602 009e FFF7FEFF bl ADC_Disable 6603 .LVL531: 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6604 .loc 1 2199 0 6605 00a2 0546 mov r5, r0 6606 00a4 0028 cmp r0, #0 6607 00a6 E4D1 bne .L779 2202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 6608 .loc 1 2202 0 6609 00a8 E36D ldr r3, [r4, #92] 6610 00aa 23F48853 bic r3, r3, #4352 6611 00ae 23F00103 bic r3, r3, #1 6612 00b2 43F00103 orr r3, r3, #1 6613 00b6 E365 str r3, [r4, #92] 6614 00b8 DBE7 b .L779 6615 .LVL532: 6616 .L800: 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6617 .loc 1 2158 0 6618 00ba 0225 movs r5, #2 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6619 .loc 1 2214 0 6620 00bc 2846 mov r0, r5 6621 .LVL533: 6622 00be 70BD pop {r4, r5, r6, pc} 6623 .LVL534: 6624 .L822: 6625 .LBB1104: 6626 .LBB1099: 6627 .LBB1085: 6628 .LBB1086: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6629 .loc 2 6735 0 6630 00c0 9A68 ldr r2, [r3, #8] 6631 00c2 9607 lsls r6, r2, #30 6632 00c4 BBD4 bmi .L784 6633 .LVL535: 6634 .LBE1086: 6635 .LBE1085: 6636 .LBB1087: 6637 .LBB1088: 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6638 .loc 2 7058 0 6639 00c6 9A68 ldr r2, [r3, #8] ARM GAS /tmp/ccsErhU4.s page 359 6640 00c8 22F00042 bic r2, r2, #-2147483648 6641 00cc 22F03F02 bic r2, r2, #63 6642 00d0 42F02002 orr r2, r2, #32 6643 00d4 9A60 str r2, [r3, #8] 6644 00d6 B2E7 b .L784 6645 .LVL536: 6646 .L821: 6647 .LBE1088: 6648 .LBE1087: 6649 .LBB1089: 6650 .LBB1090: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6651 .loc 2 6833 0 6652 00d8 9A68 ldr r2, [r3, #8] 6653 00da 22F00042 bic r2, r2, #-2147483648 6654 00de 22F03F02 bic r2, r2, #63 6655 00e2 42F01002 orr r2, r2, #16 6656 00e6 9A60 str r2, [r3, #8] 6657 .LVL537: 6658 .LBE1090: 6659 .LBE1089: 6660 .LBB1092: 6661 .LBB1083: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6662 .loc 2 7071 0 6663 00e8 9A68 ldr r2, [r3, #8] 6664 00ea 1207 lsls r2, r2, #28 6665 00ec A7D5 bpl .L784 6666 00ee E7E7 b .L822 6667 .LVL538: 6668 .L820: 6669 .LBE1083: 6670 .LBE1092: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6671 .loc 1 3333 0 6672 00f0 1A68 ldr r2, [r3] 6673 00f2 5506 lsls r5, r2, #25 6674 00f4 06D4 bmi .L778 6675 00f6 184A ldr r2, .L823 6676 00f8 01E0 b .L777 6677 .LVL539: 6678 .L780: 3335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6679 .loc 1 3335 0 6680 00fa 013A subs r2, r2, #1 6681 00fc B0D0 beq .L818 6682 .L777: 3333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6683 .loc 1 3333 0 6684 00fe 1968 ldr r1, [r3] 6685 0100 4806 lsls r0, r1, #25 6686 0102 FAD5 bpl .L780 6687 .L778: 3349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6688 .loc 1 3349 0 6689 0104 4022 movs r2, #64 6690 0106 1A60 str r2, [r3] ARM GAS /tmp/ccsErhU4.s page 360 6691 .LVL540: 6692 .LBB1093: 6693 .LBB1077: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6694 .loc 2 6846 0 6695 0108 9A68 ldr r2, [r3, #8] 6696 010a 5107 lsls r1, r2, #29 6697 010c 18D4 bmi .L781 6698 .LVL541: 6699 .L783: 6700 .LBE1077: 6701 .LBE1093: 3391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** break; 6702 .loc 1 3391 0 6703 010e 0425 movs r5, #4 6704 0110 96E7 b .L782 6705 .LVL542: 6706 .L789: 6707 .LBE1099: 6708 .LBE1104: 2173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6709 .loc 1 2173 0 6710 0112 FFF7FEFF bl HAL_DMA_Abort 6711 .LVL543: 2176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** { 6712 .loc 1 2176 0 6713 0116 0546 mov r5, r0 6714 0118 60B1 cbz r0, .L791 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6715 .loc 1 2179 0 6716 011a E36D ldr r3, [r4, #92] 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6717 .loc 1 2184 0 6718 011c 2268 ldr r2, [r4] 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6719 .loc 1 2179 0 6720 011e 43F04003 orr r3, r3, #64 6721 0122 E365 str r3, [r4, #92] 6722 .LVL544: 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6723 .loc 1 2184 0 6724 0124 5368 ldr r3, [r2, #4] 6725 0126 23F01003 bic r3, r3, #16 6726 012a 5360 str r3, [r2, #4] 2195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** } 6727 .loc 1 2195 0 6728 012c 2046 mov r0, r4 6729 012e FFF7FEFF bl ADC_Disable 6730 .LVL545: 6731 0132 9EE7 b .L779 6732 .LVL546: 6733 .L791: 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c **** 6734 .loc 1 2184 0 6735 0134 2268 ldr r2, [r4] 6736 0136 5368 ldr r3, [r2, #4] 6737 0138 23F01003 bic r3, r3, #16 ARM GAS /tmp/ccsErhU4.s page 361 6738 013c 5360 str r3, [r2, #4] 6739 013e ADE7 b .L790 6740 .LVL547: 6741 .L781: 6742 .LBB1105: 6743 .LBB1100: 6744 .LBB1094: 6745 .LBB1080: 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6746 .loc 2 6735 0 6747 0140 9A68 ldr r2, [r3, #8] 6748 0142 9207 lsls r2, r2, #30 6749 0144 E3D4 bmi .L783 6750 .LVL548: 6751 .LBE1080: 6752 .LBE1094: 6753 .LBB1095: 6754 .LBB1091: 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6755 .loc 2 6833 0 6756 0146 9A68 ldr r2, [r3, #8] 6757 0148 22F00042 bic r2, r2, #-2147483648 6758 014c 22F03F02 bic r2, r2, #63 6759 0150 42F01002 orr r2, r2, #16 6760 0154 9A60 str r2, [r3, #8] 6761 0156 DAE7 b .L783 6762 .L824: 6763 .align 2 6764 .L823: 6765 0158 000040A3 .word -1556086784 6766 .LBE1091: 6767 .LBE1095: 6768 .LBE1100: 6769 .LBE1105: 6770 .cfi_endproc 6771 .LFE340: 6773 .text 6774 .Letext0: 6775 .file 4 "/usr/include/newlib/machine/_default_types.h" 6776 .file 5 "/usr/include/newlib/sys/_stdint.h" 6777 .file 6 "Drivers/CMSIS/Include/core_cm4.h" 6778 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" 6779 .file 8 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 6780 .file 9 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 6781 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 6782 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h" 6783 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h" 6784 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h" 6785 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h" 6786 .file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h" 6787 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h" ARM GAS /tmp/ccsErhU4.s page 362 DEFINED SYMBOLS *ABS*:0000000000000000 stm32g4xx_hal_adc.c /tmp/ccsErhU4.s:16 .text.HAL_ADC_MspInit:0000000000000000 $t /tmp/ccsErhU4.s:24 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit /tmp/ccsErhU4.s:39 .text.HAL_ADC_Init:0000000000000000 $t /tmp/ccsErhU4.s:47 .text.HAL_ADC_Init:0000000000000000 HAL_ADC_Init /tmp/ccsErhU4.s:537 .text.HAL_ADC_Init:000000000000020c $d /tmp/ccsErhU4.s:546 .text.HAL_ADC_MspDeInit:0000000000000000 $t /tmp/ccsErhU4.s:554 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit /tmp/ccsErhU4.s:565 .text.HAL_ADC_Start:0000000000000000 $t /tmp/ccsErhU4.s:573 .text.HAL_ADC_Start:0000000000000000 HAL_ADC_Start /tmp/ccsErhU4.s:861 .text.HAL_ADC_Start:000000000000012c $d /tmp/ccsErhU4.s:869 .text.HAL_ADC_Stop:0000000000000000 $t /tmp/ccsErhU4.s:877 .text.HAL_ADC_Stop:0000000000000000 HAL_ADC_Stop /tmp/ccsErhU4.s:1293 .text.HAL_ADC_Stop:0000000000000154 $d /tmp/ccsErhU4.s:1302 .text.HAL_ADC_PollForConversion:0000000000000000 $t /tmp/ccsErhU4.s:1310 .text.HAL_ADC_PollForConversion:0000000000000000 HAL_ADC_PollForConversion /tmp/ccsErhU4.s:1536 .text.HAL_ADC_PollForConversion:00000000000000fc $d /tmp/ccsErhU4.s:1542 .text.HAL_ADC_PollForEvent:0000000000000000 $t /tmp/ccsErhU4.s:1550 .text.HAL_ADC_PollForEvent:0000000000000000 HAL_ADC_PollForEvent /tmp/ccsErhU4.s:1728 .text.HAL_ADC_Start_IT:0000000000000000 $t /tmp/ccsErhU4.s:1736 .text.HAL_ADC_Start_IT:0000000000000000 HAL_ADC_Start_IT /tmp/ccsErhU4.s:2098 .text.HAL_ADC_Start_IT:000000000000019c $d /tmp/ccsErhU4.s:2106 .text.HAL_ADC_Stop_IT:0000000000000000 $t /tmp/ccsErhU4.s:2114 .text.HAL_ADC_Stop_IT:0000000000000000 HAL_ADC_Stop_IT /tmp/ccsErhU4.s:2535 .text.HAL_ADC_Stop_IT:000000000000015c $d /tmp/ccsErhU4.s:2544 .text.HAL_ADC_Start_DMA:0000000000000000 $t /tmp/ccsErhU4.s:2552 .text.HAL_ADC_Start_DMA:0000000000000000 HAL_ADC_Start_DMA /tmp/ccsErhU4.s:2828 .text.HAL_ADC_Start_DMA:000000000000012c $d /tmp/ccsErhU4.s:2969 .text.ADC_DMAHalfConvCplt:0000000000000000 ADC_DMAHalfConvCplt /tmp/ccsErhU4.s:3678 .text.ADC_DMAError:0000000000000000 ADC_DMAError /tmp/ccsErhU4.s:3557 .text.ADC_DMAConvCplt:0000000000000000 ADC_DMAConvCplt /tmp/ccsErhU4.s:2839 .text.HAL_ADC_GetValue:0000000000000000 $t /tmp/ccsErhU4.s:2847 .text.HAL_ADC_GetValue:0000000000000000 HAL_ADC_GetValue /tmp/ccsErhU4.s:2865 .text.HAL_ADC_StartSampling:0000000000000000 $t /tmp/ccsErhU4.s:2873 .text.HAL_ADC_StartSampling:0000000000000000 HAL_ADC_StartSampling /tmp/ccsErhU4.s:2894 .text.HAL_ADC_StopSampling:0000000000000000 $t /tmp/ccsErhU4.s:2902 .text.HAL_ADC_StopSampling:0000000000000000 HAL_ADC_StopSampling /tmp/ccsErhU4.s:2923 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t /tmp/ccsErhU4.s:2931 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback /tmp/ccsErhU4.s:2942 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 $t /tmp/ccsErhU4.s:2950 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 HAL_ADC_ConvHalfCpltCallback /tmp/ccsErhU4.s:2961 .text.ADC_DMAHalfConvCplt:0000000000000000 $t /tmp/ccsErhU4.s:2993 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t /tmp/ccsErhU4.s:3001 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback /tmp/ccsErhU4.s:3012 .text.HAL_ADC_ErrorCallback:0000000000000000 $t /tmp/ccsErhU4.s:3020 .text.HAL_ADC_ErrorCallback:0000000000000000 HAL_ADC_ErrorCallback /tmp/ccsErhU4.s:3031 .text.HAL_ADC_IRQHandler:0000000000000000 $t /tmp/ccsErhU4.s:3039 .text.HAL_ADC_IRQHandler:0000000000000000 HAL_ADC_IRQHandler /tmp/ccsErhU4.s:3543 .text.HAL_ADC_IRQHandler:0000000000000248 $d /tmp/ccsErhU4.s:3549 .text.ADC_DMAConvCplt:0000000000000000 $t /tmp/ccsErhU4.s:3670 .text.ADC_DMAError:0000000000000000 $t /tmp/ccsErhU4.s:3711 .text.HAL_ADC_ConfigChannel:0000000000000000 $t /tmp/ccsErhU4.s:3719 .text.HAL_ADC_ConfigChannel:0000000000000000 HAL_ADC_ConfigChannel /tmp/ccsErhU4.s:4545 .text.HAL_ADC_ConfigChannel:0000000000000380 $d /tmp/ccsErhU4.s:4566 .text.HAL_ADC_ConfigChannel:00000000000003b0 $t /tmp/ccsErhU4.s:4828 .text.HAL_ADC_ConfigChannel:0000000000000468 $d ARM GAS /tmp/ccsErhU4.s page 363 /tmp/ccsErhU4.s:4833 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 $t /tmp/ccsErhU4.s:4841 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 HAL_ADC_AnalogWDGConfig /tmp/ccsErhU4.s:5480 .text.HAL_ADC_AnalogWDGConfig:0000000000000300 $d /tmp/ccsErhU4.s:5488 .text.HAL_ADC_GetState:0000000000000000 $t /tmp/ccsErhU4.s:5496 .text.HAL_ADC_GetState:0000000000000000 HAL_ADC_GetState /tmp/ccsErhU4.s:5513 .text.HAL_ADC_GetError:0000000000000000 $t /tmp/ccsErhU4.s:5521 .text.HAL_ADC_GetError:0000000000000000 HAL_ADC_GetError /tmp/ccsErhU4.s:5538 .text.ADC_ConversionStop:0000000000000000 $t /tmp/ccsErhU4.s:5546 .text.ADC_ConversionStop:0000000000000000 ADC_ConversionStop /tmp/ccsErhU4.s:5849 .text.ADC_ConversionStop:000000000000010c $d /tmp/ccsErhU4.s:5854 .text.ADC_Enable:0000000000000000 $t /tmp/ccsErhU4.s:5862 .text.ADC_Enable:0000000000000000 ADC_Enable /tmp/ccsErhU4.s:5991 .text.ADC_Enable:0000000000000080 $d /tmp/ccsErhU4.s:5997 .text.ADC_Disable:0000000000000000 $t /tmp/ccsErhU4.s:6005 .text.ADC_Disable:0000000000000000 ADC_Disable /tmp/ccsErhU4.s:6140 .text.HAL_ADC_DeInit:0000000000000000 $t /tmp/ccsErhU4.s:6148 .text.HAL_ADC_DeInit:0000000000000000 HAL_ADC_DeInit /tmp/ccsErhU4.s:6390 .text.HAL_ADC_DeInit:0000000000000148 $d /tmp/ccsErhU4.s:6403 .text.HAL_ADC_Stop_DMA:0000000000000000 $t /tmp/ccsErhU4.s:6411 .text.HAL_ADC_Stop_DMA:0000000000000000 HAL_ADC_Stop_DMA /tmp/ccsErhU4.s:6765 .text.HAL_ADC_Stop_DMA:0000000000000158 $d UNDEFINED SYMBOLS SystemCoreClock HAL_GetTick HAL_DMA_Start_IT HAL_ADCEx_InjectedConvCpltCallback HAL_ADCEx_EndOfSamplingCallback HAL_ADCEx_InjectedQueueOverflowCallback HAL_ADCEx_LevelOutOfWindow3Callback HAL_ADCEx_LevelOutOfWindow2Callback HAL_DMA_Abort