ARM GAS /tmp/ccZL5Rsh.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "stm32g4xx_hal_adc_ex.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global HAL_ADCEx_Calibration_Start 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 HAL_ADCEx_Calibration_Start: 25 .LFB329: 26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c" 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @file stm32g4xx_hal_adc_ex.c 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Converter (ADC) 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * + Operation functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ++ Start, stop, get result of conversions of ADC group injected, 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * using 2 possible modes: polling, interruption. 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ++ Calibration 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * +++ ADC automatic self-calibration 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * +++ Calibration factors get or set 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ++ Multimode feature when available 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * + Control functions 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ++ Channels configuration on ADC group injected 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * + State functions 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ++ ADC group injected contexts queue management 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "stm32g4xx_hal_adc.c". 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** available in file of generic functions "stm32g4xx_hal_adc.c". 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @attention 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** *

© Copyright (c) 2019 STMicroelectronics. 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * All rights reserved.

ARM GAS /tmp/ccZL5Rsh.s page 2 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * the "License"; You may not use this file except in compliance with the 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * License. You may obtain a copy of the License at: 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * opensource.org/licenses/BSD-3-Clause 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #include "stm32g4xx_hal.h" 44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended HAL module driver 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\ 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\ 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters tha 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Fixed timeout value for ADC calibration. */ 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* maximum prescalers. */ 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ex of profile low frequency : f_ADC at f_CPU/3968 (minimum value */ 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* considering both possible ADC clocking scheme: */ 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from synchronous clock with AHB prescaler 512, */ 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC prescaler 4. */ 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = 512 *4 = 2048 */ 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from asynchronous clock (PLLP) with prescaler 256. */ 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Highest CPU clock PLL (PLLR). */ 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = PLLRmax /PPLPmin * 256 = (VCO/2) / (VCO/31) * 256 */ 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 3968 ) */ 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration_time MAX = 81 / f_ADC */ 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 81 / (f_CPU/3938) = 318978 CPU cycles */ 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT (318978UL) /*!< ADC calibration time-out value (unit: CPU 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/ 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ ARM GAS /tmp/ccZL5Rsh.s page 3 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/ 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Extended IO operation functions 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### IO operation functions ##### 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Perform the ADC self-calibration for single or differential ending. 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get calibration factors for single or differential ending. 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Set calibration factors for single or differential ending. 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected. 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected. 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Poll for conversion complete on ADC group injected. 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of ADC group injected channel conversion. 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected and enable interruptions. 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected and disable interruptions. 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) When multimode feature is available, start multimode and enable DMA transfer. 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop multimode and disable ADC DMA transfer. 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of multimode conversion. 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff Selection of single-ended or differential input 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 27 .loc 1 136 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 8 30 @ frame_needed = 0, uses_anonymous_args = 0 31 .LVL0: 32 0000 30B5 push {r4, r5, lr} 33 .LCFI0: 34 .cfi_def_cfa_offset 12 35 .cfi_offset 4, -12 36 .cfi_offset 5, -8 ARM GAS /tmp/ccZL5Rsh.s page 4 37 .cfi_offset 14, -4 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0UL; 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 38 .loc 1 145 0 39 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 40 .loc 1 136 0 41 0006 83B0 sub sp, sp, #12 42 .LCFI1: 43 .cfi_def_cfa_offset 24 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 44 .loc 1 138 0 45 0008 0022 movs r2, #0 46 .loc 1 145 0 47 000a 012B cmp r3, #1 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 48 .loc 1 138 0 49 000c 0192 str r2, [sp, #4] 50 .loc 1 145 0 51 000e 35D0 beq .L8 52 .loc 1 145 0 is_stmt 0 discriminator 2 53 0010 0123 movs r3, #1 54 0012 80F85830 strb r3, [r0, #88] 55 0016 0446 mov r4, r0 56 0018 0D46 mov r5, r1 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the ADC (if not already disabled) */ 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 57 .loc 1 150 0 is_stmt 1 discriminator 2 58 001a FFF7FEFF bl ADC_Disable 59 .LVL1: 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 60 .loc 1 156 0 discriminator 2 61 001e E36D ldr r3, [r4, #92] 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 62 .loc 1 153 0 discriminator 2 63 0020 20BB cbnz r0, .L3 64 .loc 1 156 0 65 0022 23F48853 bic r3, r3, #4352 66 0026 23F00203 bic r3, r3, #2 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccZL5Rsh.s page 5 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC calibration in mode single-ended or differential */ 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_StartCalibration(hadc->Instance, SingleDiff); 67 .loc 1 161 0 68 002a 2268 ldr r2, [r4] 69 .LVL2: 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait for calibration completion */ 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL) 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index++; 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 70 .loc 1 167 0 71 002c 1B49 ldr r1, .L13 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 72 .loc 1 156 0 73 002e 43F00203 orr r3, r3, #2 74 0032 E365 str r3, [r4, #92] 75 .LBB292: 76 .LBB293: 77 .file 2 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h" 1:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @file stm32g4xx_ll_adc.h 4:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Header file of ADC LL module. 6:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 7:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @attention 8:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 9:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** *

© Copyright (c) 2019 STMicroelectronics. 10:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All rights reserved.

11:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This software component is licensed by ST under BSD 3-Clause license, 13:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the "License"; You may not use this file except in compliance with the 14:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * License. You may obtain a copy of the License at: 15:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * opensource.org/licenses/BSD-3-Clause 16:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 17:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 18:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 19:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 20:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 21:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifndef STM32G4xx_LL_ADC_H 22:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define STM32G4xx_LL_ADC_H 23:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 24:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifdef __cplusplus 25:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** extern "C" { 26:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 27:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 28:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/ 29:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #include "stm32g4xx.h" 30:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 31:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @addtogroup STM32G4xx_LL_Driver 32:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 33:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 34:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 35:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined (ADC1) || defined (ADC2) || defined (ADC3) || defined (ADC4) || defined (ADC5) 36:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 37:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL ADC ARM GAS /tmp/ccZL5Rsh.s page 6 38:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 39:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 40:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 41:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/ 42:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/ 43:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 44:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/ 45:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants 46:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 47:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 48:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 49:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular sequencer: */ 50:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */ 51:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer register offset */ 52:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 53:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 54:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group regular sequencer configuration */ 55:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 56:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR1_REGOFFSET (0x00000000UL) 57:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR2_REGOFFSET (0x00000100UL) 58:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR3_REGOFFSET (0x00000200UL) 59:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR4_REGOFFSET (0x00000300UL) 60:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 61:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET | ADC_SQR2_REGOFFSET \ 62:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR3_REGOFFSET | ADC_SQR4_REGOFFSET) 63:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQRX_REGOFFSET_POS (8UL) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_ 64:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 65:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 66:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular sequencer bits information to be inserted */ 67:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group regular sequencer ranks literals definition. */ 68:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_1_SQRX_BITOFFSET_POS (ADC_SQR1_SQ1_Pos) 69:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (ADC_SQR1_SQ2_Pos) 70:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (ADC_SQR1_SQ3_Pos) 71:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (ADC_SQR1_SQ4_Pos) 72:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_5_SQRX_BITOFFSET_POS (ADC_SQR2_SQ5_Pos) 73:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_6_SQRX_BITOFFSET_POS (ADC_SQR2_SQ6_Pos) 74:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (ADC_SQR2_SQ7_Pos) 75:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (ADC_SQR2_SQ8_Pos) 76:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (ADC_SQR2_SQ9_Pos) 77:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_10_SQRX_BITOFFSET_POS (ADC_SQR3_SQ10_Pos) 78:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_11_SQRX_BITOFFSET_POS (ADC_SQR3_SQ11_Pos) 79:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (ADC_SQR3_SQ12_Pos) 80:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (ADC_SQR3_SQ13_Pos) 81:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (ADC_SQR3_SQ14_Pos) 82:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_15_SQRX_BITOFFSET_POS (ADC_SQR4_SQ15_Pos) 83:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS (ADC_SQR4_SQ16_Pos) 84:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 85:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 86:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 87:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected sequencer: */ 88:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */ 89:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - data register offset */ 90:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 91:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 92:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group injected data register */ 93:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 94:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR1_REGOFFSET (0x00000000UL) ARM GAS /tmp/ccZL5Rsh.s page 7 95:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR2_REGOFFSET (0x00000100UL) 96:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR3_REGOFFSET (0x00000200UL) 97:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR4_REGOFFSET (0x00000300UL) 98:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 99:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET | ADC_JDR2_REGOFFSET \ 100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_JDR3_REGOFFSET | ADC_JDR4_REGOFFSET) 101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDRX_REGOFFSET_POS (8UL) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_ 103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected sequencer bits information to be inserted */ 105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group injected sequencer ranks literals definition. */ 106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ1_Pos) 107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ2_Pos) 108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ3_Pos) 109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ4_Pos) 110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular trigger: */ 114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */ 115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger source */ 116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger edge */ 117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge ( 118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information. */ 136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS (ADC_CFGR_EXTSEL_Pos) 137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (ADC_CFGR_EXTEN_Pos) 138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected trigger: */ 142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */ 143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger source */ 144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger edge */ 145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge ( 146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U 151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U ARM GAS /tmp/ccZL5Rsh.s page 8 152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected trigger bits information. */ 164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS (ADC_JSQR_JEXTSEL_Pos) 165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS (ADC_JSQR_JEXTEN_Pos) 166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC channel: */ 173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */ 174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by number */ 175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by bitfield */ 176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel differentiation between external channels (connected to */ 177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* GPIO pins) and internal channels (connected to internal paths) */ 178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel sampling time defined by SMPRx register offset */ 179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and SMPx bits positions into SMPRx register */ 180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH) 181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH) 182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (ADC_CFGR_AWD1CH_Pos) 183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA 184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_ID_INTERNAL_CH_MASK) 185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */ 186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMB 187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Channel differentiation between external and internal channels */ 189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000UL) /* Marker of internal channel */ 190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_2 (0x00080000UL) /* Marker of internal channel for other A 191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH | ADC_CHANNEL_ID_INTERNAL_CH 192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC channel sampling time configuration */ 194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR1_REGOFFSET (0x00000000UL) 196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR2_REGOFFSET (0x02000000UL) 197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET | ADC_SMPR2_REGOFFSET) 198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPRX_REGOFFSET_POS (25UL) /* Position of bits ADC_SMPRx_REGOFFSET in ADC_CH 199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000UL) 201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_POS (20UL) /* Value equivalent to bitfield "ADC_CH 202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into */ 204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER (0x00000000UL) 206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER (ADC_CFGR_AWD1CH_0) 207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER (ADC_CFGR_AWD1CH_1) 208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER (ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) ARM GAS /tmp/ccZL5Rsh.s page 9 209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER (ADC_CFGR_AWD1CH_2) 210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_0) 211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1) 212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER (ADC_CFGR_AWD1CH_3) 214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_0) 215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1) 216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2) 218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | \ 221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4) 223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_0) 224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_1) 225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into */ 227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0) 229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1) 230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2) 231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3) 232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4) 233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5) 234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6) 235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7) 236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8) 237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9) 238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10) 239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11) 240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12) 241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13) 242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14) 243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15) 244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16) 245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17) 246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18) 247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels sampling time information to be inserted into */ 249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF 260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF ARM GAS /tmp/ccZL5Rsh.s page 10 266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC mode single or differential ended: */ 272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */ 273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* the relevant bits for: */ 274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */ 275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration: calibration start, calibration factor get or set */ 276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC channels: set each ADC channel ending mode */ 277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF) 278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S) 279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFS 280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* B 281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000UL) /* Selection o 282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16UL) /* Selection o 283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4UL) /* Shift of bi 284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC analog watchdog: */ 286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */ 287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs, */ 288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 families)). */ 289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number, */ 290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection of ADC group (ADC groups regular and-or injected). */ 291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */ 292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection on groups. */ 293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */ 295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) 296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR2_REGOFFSET (0x00100000UL) 297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) 298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */ 300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */ 301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0) 302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024UL) 303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD 305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | 307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH) 308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR23_CHANNEL_MASK) 309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_POS (20UL) /* Position of bits ADC_AWD_CRx_REGOFFSET in ADC_ 311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */ 313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET) 314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET) 315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET) 316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET | ADC_AWD_TR2_REGOFFSET | ADC_AWD 317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC_ 318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000UL) /* Selection of 1 bit t 319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_POS (16UL) /* Selection of 1 bit t 320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4UL) /* Shift of bit ADC_AWD 321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC offset: */ ARM GAS /tmp/ccZL5Rsh.s page 11 323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC offset number configuration */ 324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR1_REGOFFSET (0x00000000UL) 325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR2_REGOFFSET (0x00000001UL) 326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR3_REGOFFSET (0x00000002UL) 327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR4_REGOFFSET (0x00000003UL) 328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET | ADC_OFR2_REGOFFSET \ 329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_OFR3_REGOFFSET | ADC_OFR4_REGOFFSET) 330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits positions */ 333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS (ADC_CFGR_RES_Pos) 334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos) 335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1EN_BITOFFSET_POS (ADC_CFGR_AWD1EN_Pos) 336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_JAWD1EN_BITOFFSET_POS (ADC_CFGR_JAWD1EN_Pos) 337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_TR1_HT1_BITOFFSET_POS (ADC_TR1_HT1_Pos) 338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits groups */ 341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JA 342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC internal channels related definitions */ 345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal voltage reference VrefInt */ 346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage referen 347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_VREF (3000UL) /* Analog voltage reference 348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Temperature sensor */ 349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sen 350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sen 351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sen 352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP (110L) /* Internal temperature sen 353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference 354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/ 361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros 362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Driver macro reserved for internal use: set a pointer to 367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a register from a register basis from which an offset 368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is applied. 369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register basis from which the offset is applied. 370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers). 371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Pointer to register address 372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ 374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL)))) 375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 12 380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/ 382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER) 383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure 384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC common parameters 389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and multimode 390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (all ADC instances belonging to the same ADC common instance). 391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_CommonInit() 392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC instances state (all ADC instances 393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sharing the same ADC common instance): 394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances sharing the same ADC common instance must be 395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * disabled. 396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and 400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_COMMON 401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, if ADC group injected is u 402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** clock ratio constraints between ADC clock and AH 403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** must be respected. Refer to reference manual. 404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independ 409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfe 414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases. 419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef; 425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC instance. 428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC instance. 429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Affects both group regular and group injected (availability 430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of ADC group injected depends on STM32 families). 431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Instance . 433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_Init() 434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency ARM GAS /tmp/ccZL5Rsh.s page 13 437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Resolution; /*!< Set ADC resolution. 449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_RESOLU 450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DataAlignment; /*!< Set ADC conversion data alignment. 454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_DATA_A 455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t LowPowerMode; /*!< Set ADC low power mode. 459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LP_MOD 460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_InitTypeDef; 464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group regular. 467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group regular. 468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "REG"). 471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_REG_Init() 472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: inter 487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_TR 488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 14 494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group regular sequencer length. 495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: se 500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group regul 502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regula 507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_CO 508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: It is not possible to enable both ADC group regu 509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no tra 513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_DM 514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun: 518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data preserved or overwritten. 519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_OV 520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef; 524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group injected. 527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group injected. 528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "INJ"). 531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_INJ_Init() 532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: inte 547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func ARM GAS /tmp/ccZL5Rsh.s page 15 551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group injected sequencer length. 555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: s 560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group injec 562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent 567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: This parameter must be set to set to independent 569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_INJ_InitTypeDef; 573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */ 578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/ 580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants 581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags 585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Flags defines which can be used with LL_ADC_ReadReg function 586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /*!< ADC flag ADC instance ready */ 589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC flag ADC group regular end o 590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC flag ADC group regular end o 591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC flag ADC group regular overr 592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC flag ADC group regular end o 593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC flag ADC group injected end 594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC flag ADC group injected end 595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC flag ADC group injected cont 596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC flag ADC analog watchdog 1 * 597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC flag ADC analog watchdog 2 * 598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC flag ADC analog watchdog 3 * 599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /*!< ADC flag ADC multimode master in 601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /*!< ADC flag ADC multimode slave ins 602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /*!< ADC flag ADC multimode master gr 603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /*!< ADC flag ADC multimode slave gro 604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /*!< ADC flag ADC multimode master gr 605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /*!< ADC flag ADC multimode slave gro 606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /*!< ADC flag ADC multimode master gr 607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /*!< ADC flag ADC multimode slave gro ARM GAS /tmp/ccZL5Rsh.s page 16 608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /*!< ADC flag ADC multimode master gr 609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /*!< ADC flag ADC multimode slave gro 610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /*!< ADC flag ADC multimode master gr 611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /*!< ADC flag ADC multimode slave gro 612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /*!< ADC flag ADC multimode master gr 613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /*!< ADC flag ADC multimode slave gro 614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /*!< ADC flag ADC multimode master gr 615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /*!< ADC flag ADC multimode slave gro 616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /*!< ADC flag ADC multimode master an 617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /*!< ADC flag ADC multimode slave ana 618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /*!< ADC flag ADC multimode master an 619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /*!< ADC flag ADC multimode slave ana 620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /*!< ADC flag ADC multimode master an 621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /*!< ADC flag ADC multimode slave ana 622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable) 628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions 629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /*!< ADC interruption ADC instance re 632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOC ADC_IER_EOCIE /*!< ADC interruption ADC group regul 633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOS ADC_IER_EOSIE /*!< ADC interruption ADC group regul 634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_OVR ADC_IER_OVRIE /*!< ADC interruption ADC group regul 635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC interruption ADC group regul 636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOC ADC_IER_JEOCIE /*!< ADC interruption ADC group injec 637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOS ADC_IER_JEOSIE /*!< ADC interruption ADC group injec 638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /*!< ADC interruption ADC group injec 639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /*!< ADC interruption ADC analog watc 640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /*!< ADC interruption ADC analog watc 641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /*!< ADC interruption ADC analog watc 642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose 647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with */ 650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* DMA transfer. */ 651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */ 652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000UL) /* ADC group regular conversion data re 653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001UL) /* ADC group regular conversion data re 655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source 661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /* 664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /* ARM GAS /tmp/ccZL5Rsh.s page 17 665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0) /* 666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000UL) /* 667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /* 668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /* 669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /* 671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /* 672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 ) /* 673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /* 675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /* 676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /* 677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels 683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available */ 686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (connections to other peripherals). */ 687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If they are not listed below, they do not require any specific */ 688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* path enable. In this case, Access to measurement path is done */ 689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* only by selecting the corresponding ADC internal channel. */ 690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all di 691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to inte 692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_VSENSESEL) /*!< ADC measurement path to inte 693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATSEL) /*!< ADC measurement path to inte 694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution 699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B (0x00000000UL) /*!< ADC resolution 702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /*!< ADC resolution 703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /*!< ADC resolution 704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!< ADC resolution 705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment 710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT (0x00000000UL) /*!< ADC conversion data alignmen 713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /*!< ADC conversion data alignmen 714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode 719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE (0x00000000UL) /*!< No ADC low powe ARM GAS /tmp/ccZL5Rsh.s page 18 722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /*!< ADC low power m 723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number 728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /*!< ADC offset number 1: ADC channel 731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /*!< ADC offset number 2: ADC channel 732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /*!< ADC offset number 3: ADC channel 733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /*!< ADC offset number 4: ADC channel 734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state 739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_DISABLE (0x00000000UL) /*!< ADC offset disabled (among A 742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /*!< ADC offset enabled (among AD 743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGN ADC instance - Offset sign 748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_NEGATIVE (0x00000000UL) /*!< ADC offset is negative (among 751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_POSITIVE (ADC_OFR1_OFFSETPOS) /*!< ADC offset is positive (among 752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SATURATION ADC instance - Offset saturation mode 757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset saturation is di 760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_ENABLE (ADC_OFR1_SATEN) /*!< ADC offset saturation is en 761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups 765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on all 768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_INJECTED (0x00000002UL) /*!< ADC group injected (not available on 769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003UL) /*!< ADC both groups regular and injected 770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number 775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER | ADC_CHANNEL_0_SMP | ADC_CHANNE 778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER | ADC_CHANNEL_1_SMP | ADC_CHANNE ARM GAS /tmp/ccZL5Rsh.s page 19 779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER | ADC_CHANNEL_2_SMP | ADC_CHANNE 780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER | ADC_CHANNEL_3_SMP | ADC_CHANNE 781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER | ADC_CHANNEL_4_SMP | ADC_CHANNE 782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER | ADC_CHANNEL_5_SMP | ADC_CHANNE 783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER | ADC_CHANNEL_6_SMP | ADC_CHANNE 784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER | ADC_CHANNEL_7_SMP | ADC_CHANNE 785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER | ADC_CHANNEL_8_SMP | ADC_CHANNE 786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER | ADC_CHANNEL_9_SMP | ADC_CHANNE 787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_SMP | ADC_CHANNE 788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_SMP | ADC_CHANNE 789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_SMP | ADC_CHANNE 790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_SMP | ADC_CHANNE 791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_SMP | ADC_CHANNE 792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_SMP | ADC_CHANNE 793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_SMP | ADC_CHANNE 794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_SMP | ADC_CHANNE 795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_SMP | ADC_CHANNE 796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (LL_ADC_CHANNEL_4 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP1 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP2 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC2 (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC3 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP4 (LL_ADC_CHANNEL_5 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP5 (LL_ADC_CHANNEL_3 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP6 (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source 812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE (0x00000000UL) 815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger internal: SW start. 816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH1 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on ARM GAS /tmp/ccZL5Rsh.s page 20 836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH1 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM7_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_CH1 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO (ADC_CFGR_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX ARM GAS /tmp/ccZL5Rsh.s page 21 893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EX 899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge 926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /*!< ADC group r 929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /*!< ADC group r 930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 | ADC_CFGR_EXTEN_0) /*!< ADC group r 931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SAMPLING_MODE ADC group regular - Sampling mode 936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_NORMAL (0x00000000UL) /*!< ADC conversions sam 939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_BULB (ADC_CFGR2_BULB) /*!< ADC conversions sam 940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: First convers 941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED (ADC_CFGR2_SMPTRIG) /*!< ADC conversions sam 942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger rising edg 943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger falling ed 944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode 949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ ARM GAS /tmp/ccZL5Rsh.s page 22 950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE (0x00000000UL) /*!< ADC conversions are perform 952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /*!< ADC conversions are perform 953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data 958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000UL) /*!< ADC conversio 961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMAEN) /*!< ADC conversio 962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG | ADC_CFGR_DMAEN) /*!< ADC conversio 963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_SAMPLINGTIME_COMMON_CONFIG ADC instance - ADC sampling time common configur 969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_DEFAULT (0x00000000UL) /*!< ADC sampling time let to d 972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 (ADC_SMPR1_SMPPLUS) /*!< ADC additional sampling ti 973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d 979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000UL) /*!< ADC group regular behavior i 982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /*!< ADC group regular behavior i 983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length 988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000UL) 991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L 992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L 994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L 996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L 1000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 1001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L 1002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 1003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L 1004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 1005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 1006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccZL5Rsh.s page 23 1007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode 1011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) 1014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK ( 1015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISC 1016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 1017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 1019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISC 1020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 1021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks 1027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_1_SQRX_BITOFFSET_POS) 1030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_2_SQRX_BITOFFSET_POS) 1031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_3_SQRX_BITOFFSET_POS) 1032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_4_SQRX_BITOFFSET_POS) 1033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_5_SQRX_BITOFFSET_POS) 1034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_6_SQRX_BITOFFSET_POS) 1035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_7_SQRX_BITOFFSET_POS) 1036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_8_SQRX_BITOFFSET_POS) 1037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_9_SQRX_BITOFFSET_POS) 1038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_10_SQRX_BITOFFSET_POS 1039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_11_SQRX_BITOFFSET_POS 1040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_12_SQRX_BITOFFSET_POS 1041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_13_SQRX_BITOFFSET_POS 1042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_14_SQRX_BITOFFSET_POS 1043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_15_SQRX_BITOFFSET_POS 1044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_16_SQRX_BITOFFSET_POS 1045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source 1050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000UL) 1053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger internal: SW start 1054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) ARM GAS /tmp/ccZL5Rsh.s page 24 1064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM7_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC3/4/5 instances. On this ST 1114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC1/2 instances. On this STM3 1117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT ARM GAS /tmp/ccZL5Rsh.s page 25 1121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_ 1139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge 1160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /*!< ADC group i 1163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /*!< ADC group i 1164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 | ADC_JSQR_JEXTEN_0) /*!< ADC group i 1165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode 1170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000UL) /*!< ADC group injected conversio 1173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /*!< ADC group injected conversio 1174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 26 1178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode 1179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000UL) /* Group injected sequence co 1182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence co 1183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence co 1184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length 1189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group injected 1192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /*!< ADC group injected 1193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /*!< ADC group injected 1194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected 1195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode 1200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group injected sequencer 1203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /*!< ADC group injected sequencer 1204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks 1209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET | ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) 1212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET | ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) 1213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET | ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) 1214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET | ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) 1215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time 1220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000UL) 1223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_6CYCLES_5 ( ADC_SMPR2_SMP10 1224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_12CYCLES_5 ( ADC_SMPR2_SMP10_1 1225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_24CYCLES_5 ( ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2 1227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10 1228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 1229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending ARM GAS /tmp/ccZL5Rsh.s page 27 1235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /*!< A 1238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF | ADC_CALFACT_CALFACT_D) /*!< A 1239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED | LL_ADC_DIFFERENTIAL_ENDED) /*!< A 1240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number 1245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!< 1248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR2_REGOFFSET) /*!< 1249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!< 1250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels 1255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE (0x00000000UL) 1258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK 1259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) 1262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) 1265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) 1268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) 1271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) 1274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) 1277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) 1280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) 1283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) 1286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) 1289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) ARM GAS /tmp/ccZL5Rsh.s page 28 1292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) 1295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) 1298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) 1301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) 1304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) 1307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) 1310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) 1313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) 1316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) 1319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) 1328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) 1331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) 1334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) 1337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) 1340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | 1341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | 1342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) 1343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) 1346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) ARM GAS /tmp/ccZL5Rsh.s page 29 1349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds 1356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1 ) /*!< ADC analog watchdog thr 1359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR1_LT1) /*!< ADC analog watchdog thr 1360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 | ADC_TR1_LT1) /*!< ADC analog watchdog bot 1361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_FILTERING_CONFIG Analog watchdog - filtering config 1366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_NONE (0x00000000UL) 1369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_2SAMPLES ( ADC_TR1_AWDFILT 1370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_3SAMPLES ( ADC_TR1_AWDFILT_1 1371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_4SAMPLES ( ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_5SAMPLES (ADC_TR1_AWDFILT_2 1373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_6SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT 1374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_7SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 1375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_8SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope 1381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE (0x00000000UL) /* 1384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /* 1385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM | ADC_CFGR2_ROVSE) /* 1386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /* 1387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE) /* 1388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode 1393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT (0x00000000UL) /*!< ADC oversampling discontinuo 1396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /*!< ADC oversampling discontinuo 1397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio 1402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2 (0x00000000UL) 1405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) ARM GAS /tmp/ccZL5Rsh.s page 30 1406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) 1407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) 1409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_0) 1410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 ) 1411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift 1417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE (0x00000000UL) 1420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1 ( 1421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 1422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 1423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 1424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 1425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 1428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 1433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode 1434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_INDEPENDENT (0x00000000UL) 1437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 1438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 | ADC_ 1439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 | ADC_ 1440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 | ADC_ 1441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_ 1442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1 1443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 | ADC_ 1444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer 1449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000UL) /*! 1452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B ( ADC_CCR_MDMA_1 ) /*! 1453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ( ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! 1454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 ) /*! 1455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! 1456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases 1461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccZL5Rsh.s page 31 1463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE (0x00000000UL) 1464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES ( A 1465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ( ADC_CCR_DELAY_1 1466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES ( ADC_CCR_DELAY_1 | A 1467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES ( ADC_CCR_DELAY_2 1468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES ( ADC_CCR_DELAY_2 | A 1469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 1470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | A 1471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 1472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 | A 1473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 1474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | A 1475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave 1480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /*!< In multimod 1483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /*!< In multimod 1484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV | ADC_CDR_RDATA_MST) /*!< In multimod 1485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 1490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays 1493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Only ADC peripheral HW delays are defined in ADC LL driver driver, 1494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not timeout values. 1495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For details on delays values, refer to descriptions in source code 1496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * above each literal definition. 1497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */ 1501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* not timeout values. */ 1502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Timeout values for ADC operations are dependent to device clock */ 1503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration (system clock versus ADC clock), */ 1504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and therefore must be defined in user application. */ 1505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Indications for estimation of ADC timeout delays, for this */ 1506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* STM32 series: */ 1507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration time: maximum delay is 112/fADC. */ 1508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tCAL") */ 1509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC enable time: maximum delay is 1 conversion cycle. */ 1510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tSTAB") */ 1511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC disable time: maximum delay should be a few ADC clock cycles */ 1512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC stop conversion time: maximum delay should be a few ADC clock */ 1513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* cycles */ 1514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC conversion time: duration depending on ADC clock and ADC */ 1515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration. */ 1516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device reference manual, section "Timing") */ 1517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time) */ 1519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ ARM GAS /tmp/ccZL5Rsh.s page 32 1520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tADCVREG_STUP"). */ 1521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 20UL) /*!< Delay for ADC stabilization time (ADC vol 1523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time. */ 1525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 1526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tstart_vrefint"). */ 1527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US ( 12UL) /*!< Delay for internal voltage reference s 1529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for temperature sensor stabilization time. */ 1531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet, */ 1532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tSTART"). */ 1533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US (120UL) /*!< Delay for temperature sensor stabiliza 1535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable. */ 1537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: On this STM32 series, a minimum number of ADC clock cycles */ 1538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* are required between ADC end of calibration and ADC enable. */ 1539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Wait time can be computed in user application by waiting for the */ 1540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* equivalent number of CPU cycles, by taking into account */ 1541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ratio of CPU clock versus ADC clock prescalers. */ 1542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: ADC clock cycles. */ 1543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4UL) /*!< Delay required between ADC end of cali 1544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/ 1555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros 1556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros 1560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Write a value in ADC register 1565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be written 1567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VALUE__ Value to be written in the register 1568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 1569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 1571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Read a value in ADC register 1574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be read 1576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Register value ARM GAS /tmp/ccZL5Rsh.s page 33 1577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 1579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro 1584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel number in decimal format 1589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from literals LL_ADC_CHANNEL_x. 1590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4) 1592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return decimal number "4". 1593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The input can be a value from functions where a channel 1594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number is returned, either defined with number 1595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or with bitfield (only one bit must be set). 1596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n ARM GAS /tmp/ccZL5Rsh.s page 34 1634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0 and Max_Data=18 1639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ 1641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0UL) ? \ 1642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \ 1644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 1646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (uint32_t)POSITION_VAL((__CHANNEL__)) \ 1648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x 1653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from number in decimal format. 1654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_DECIMAL_NB_TO_CHANNEL(4) 1656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return a data equivalent to "LL_ADC_CHANNEL_4". 1657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18 1658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 1659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n ARM GAS /tmp/ccZL5Rsh.s page 35 1691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 1701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 1702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 1703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) 1705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DECIMAL_NB__) <= 9UL) ? 1706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) | 1708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | 1709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR1_REGOFFSET | (((3UL * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) 1710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 1712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 1714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) 1715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR2_REGOFFSET | (((3UL * ((__DECIMAL_NB__) - 10UL))) << ADC_CHANNEL_SMPx_BITOFFSET_PO 1716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the selected channel 1721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to literal definitions of driver. 1722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The different literal definitions of ADC channels are: 1723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC internal channel: 1724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ... 1725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC external channel (channel connected to a GPIO pin): 1726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ... 1727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from literal 1728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...), 1731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value from functions where a channel number is 1732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 ARM GAS /tmp/ccZL5Rsh.s page 36 1748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe 1779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the channel corresponds to a parameter definition of a ADC internal channe 1780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ 1782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0UL) 1783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert a channel defined from parameter 1786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to its equivalent parameter definition of a ADC external channel 1789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...). 1790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter can be, additionally to a value 1791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined from parameter definition of a ADC internal channel 1792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...), 1793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a value defined from parameter definition of 1794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is returned 1796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC registers. 1797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 ARM GAS /tmp/ccZL5Rsh.s page 37 1805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 1840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 1842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 1843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 1844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 1845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 1846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \ 1861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK) ARM GAS /tmp/ccZL5Rsh.s page 38 1862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the internal channel 1865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * selected is available on the ADC instance selected. 1866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from parameter 1867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value defined from parameter definition of 1870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is 1872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_INSTANCE__ ADC instance 1877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte 1899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the internal channel selected is available on the ADC instance selected. 1900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) 1902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ ARM GAS /tmp/ccZL5Rsh.s page 39 1919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC4) \ 1928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 1930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC5) \ 1935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP5) || \ 1937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC5) || \ 1938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP4) || \ 1939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G471xx) 1945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) 1971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ ARM GAS /tmp/ccZL5Rsh.s page 40 1976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G491xx) || defined(STM32G4A1xx) 1989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 2010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define ADC analog watchdog parameter: 2018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * define a single channel to monitor with analog watchdog 2019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from sequencer channel and groups definition. 2020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels(). 2021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDMonitChannels( 2023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, LL_ADC_AWD1, 2024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR)) 2025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 ARM GAS /tmp/ccZL5Rsh.s page 41 2033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 2068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 2069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 2070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __GROUP__ This parameter can be one of the following values: 2071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR 2072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_INJECTED 2073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR_INJECTED 2074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 2076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 2077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 2078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 2079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 2080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 2081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 2082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 2083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 2084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 2085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 2086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 2087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 2088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 2089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) ARM GAS /tmp/ccZL5Rsh.s page 42 2090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 2091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 2092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 2093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 2094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 2095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 2096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 2097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 2098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 2099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 2100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 2101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 2102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 2103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 2104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 2105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 2106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 2107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 2108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 2109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 2110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 2111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 2112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 2113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 2114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 2115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 2116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 2117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 2118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 2119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 2120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 2121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 2122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 2123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 2124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 2125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 2126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 2127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 2128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 2129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 2130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 2131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 2132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 2133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 2134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 2135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 2136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 2137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 2138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 2139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 2140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 2141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 2142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 2143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 2144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 2145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 2146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) ARM GAS /tmp/ccZL5Rsh.s page 43 2147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 2148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 2149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 2150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 2151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 2152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 2153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 2154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 2155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 2156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 2157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 2158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 2159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 2160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 2161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 2162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 2163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 2164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 2165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 2166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 2167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 2168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 2169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 2171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) 2181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__GROUP__) == LL_ADC_GROUP_REGULAR) 2182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__GROUP__) == LL_ADC_GROUP_INJECTED) 2185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) 2186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the value of ADC analog watchdog threshold high 2192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds() 2195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or @ref LL_ADC_SetAnalogWDThresholds(). 2196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to set the value of 2197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDThresholds 2199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (< ADCx param >, 2200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, > (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the value of ADC analog watchdog threshold high 2215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 2218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to get the value of 2219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION 2221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_RESOLUTION_8B, 2222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_GetAnalogWDThresholds(, LL_ADC_AWD_THRESHOLD_HIGH) 2223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ); 2224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF 2230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \ 2233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC analog watchdog threshold high 2237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low from raw value containing both thresholds concatenated. 2238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 2239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to get analog watchdog threshold high from the register raw value: 2240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, > (((__AWD_THRESHOLD_TYPE__) & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_ 2249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the ADC calibration value with both single ended 2252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential modes calibration factors concatenated. 2253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetCalibrationFactor(). 2254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to set calibration factors single ended to 0x55 2255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential ended to 0x2A: 2256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetCalibrationFactor( 2257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, 2258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A)) 2259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F 2260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F ARM GAS /tmp/ccZL5Rsh.s page 45 2261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 2262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIA 2264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) | (__CALIB_FACTOR_SINGLE_ENDED__) 2265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC multimode conversion data of ADC master 2269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or ADC slave from raw value with both ADC conversion data concatenated. 2270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used when multimode transfer by DMA 2271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer(). 2272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In this case the transferred data need to processed with this macro 2273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to separate the conversion data of ADC master and ADC slave. 2274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values: 2275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 2276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 2277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF 2278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) 2281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_MULTI_CONV_DATA__) >> ((ADC_CDR_RDATA_SLV_Pos) & ~(__ADC_MULTI_MASTER_SLAVE__))) & ADC_C 2282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select, from a ADC instance, to which ADC instance 2287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * it has a dependence in multimode (ADC master of the corresponding 2288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance). 2289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of device with multimode available and a mix of 2290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances compliant and not compliant with multimode feature, 2291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances not compliant with multimode feature are 2292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * considered as master instances (do not depend to 2293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * any other ADC instance). 2294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval __ADCx__ ADC instance master of the corresponding ADC common instance 2296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC5) 2298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC4) \ 2304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC3) \ 2306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) ARM GAS /tmp/ccZL5Rsh.s page 46 2318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC5 */ 2319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select the ADC common instance 2323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to which is belonging the selected ADC instance. 2324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC common register instance can be used for: 2325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Set parameters common to several ADC instances 2326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Multimode (for devices with several ADC instances) 2327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC common register instance 2330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) \ 2333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADCx__) == ADC1) || ((__ADCx__) == ADC2)) \ 2334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC12_COMMON) \ 2336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC345_COMMON) \ 2340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) (ADC12_COMMON) 2344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC345_COMMON */ 2345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to check if all ADC instances sharing the same 2347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance are disabled. 2348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This check is required by functions with setting conditioned to 2349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On devices with only 1 ADC common instance, parameter of this macro 2353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is useless and can be ignored (parameter kept for compatibility 2354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with devices featuring several ADC common instances). 2355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCXY_COMMON__ ADC common instance 2356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if all ADC instances sharing the same ADC common instance 2358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are disabled. 2359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if at least one ADC instance sharing the same ADC common instance 2360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 2361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC4) && defined(ADC5) 2364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 2368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3) | \ 2373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC4) | \ 2374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC5) ) \ ARM GAS /tmp/ccZL5Rsh.s page 47 2375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 2382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3)) \ 2386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC4 && ADC5 */ 2388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | LL_ADC_IsEnabled(ADC2)) 2391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital 2395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * value corresponding to the selected ADC resolution. 2396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range 2397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref- 2398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to reference manual). 2399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion dat 2405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (0xFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) 2408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from 2411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a resolution to another resolution. 2412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted 2413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted 2414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion 2420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution 2426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\ 2428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\ 2429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \ 2430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DATA__) \ 2431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) \ ARM GAS /tmp/ccZL5Rsh.s page 48 2432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)) \ 2433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt) 2437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value). 2438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (resolution 12 bits) 2443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value). 2444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt) 2450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\ 2452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_DATA__,\ 2453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \ 2455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate analog reference voltage (Vref+) 2460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: mVolt) from ADC conversion data of internal voltage 2461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * reference VrefInt. 2462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using VrefInt calibration value 2463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This voltage depends on user board environment: voltage level 2465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * connected to pin Vref+. 2466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On devices with small package, the pin Vref+ is not present 2467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and internally bonded to pin Vdda. 2468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of internal voltage reference 2469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * VrefInt corresponds to a resolution of 12 bits, 2470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal voltage reference VrefInt. 2472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 2474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits) 2475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of internal voltage reference VrefInt (unit: digital value). 2476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Analog reference voltage (unit: mV) 2482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\ 2484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \ 2486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \ 2487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ ARM GAS /tmp/ccZL5Rsh.s page 49 2489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor calibration values 2495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = ((TS_ADC_DATA - TS_CAL1) 2498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * * (TS_CAL2_TEMP - TS_CAL1_TEMP)) 2499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP 2500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = (TS_CAL2 - TS_CAL1) 2502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2_TEMP - TS_CAL1_TEMP) 2503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL1 = equivalent TS_ADC_DATA at temperature 2504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL1 (calibrated in factory) 2505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL2 = equivalent TS_ADC_DATA at temperature 2506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL2 (calibrated in factory) 2507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve that calibration 2508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters are correct (address and data). 2509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To calculate temperature using temperature sensor 2510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values (generic values less, therefore 2511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * less accurate than calibrated values), 2512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). 2513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of temperature sensor 2519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to a resolution of 12 bits, 2520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor. 2522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 2524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal 2526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor (unit: digital value). 2527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature 2528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sensor voltage has been measured. 2529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\ 2537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \ 2540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 2542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (__VREFANALOG_VOLTAGE__)) \ 2543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / TEMPSENSOR_CAL_VREFANALOG) \ 2544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - (int32_t) *TEMPSENSOR_CAL1_ADDR) \ 2545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \ ARM GAS /tmp/ccZL5Rsh.s page 50 2546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \ 2547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + TEMPSENSOR_CAL1_TEMP \ 2548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor typical values 2554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to device datasheet). 2555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV) 2557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / Avg_Slope + CALx_TEMP 2558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value) 2560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = temperature sensor slope 2561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: uV/Degree Celsius) 2562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_TYP_CALx_VOLT = temperature sensor digital value at 2563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature CALx_TEMP (unit: mV) 2564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve the temperature sensor 2565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of the current device has characteristics in line with 2566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values. 2567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If temperature sensor calibration values are available on 2568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()), 2569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature calculation will be more accurate using 2570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CALC_TEMPERATURE(). 2571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC measurement data must correspond to a resolution of 12 bits 2577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (full scale digital value 4095). If not the case, the data must be 2578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * preliminarily rescaled to an equivalent resolution of 12 bits. 2579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical v 2580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "Avg_Slop 2581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical 2582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "V30" (co 2583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature s 2584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV) 2585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: 2586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor volta 2587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\ 2595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_TYP_CALX_V__,\ 2596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_CALX_TEMP__,\ 2597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __VREFANALOG_VOLTAGE__,\ 2598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((((int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \ 2601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \ 2602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ ARM GAS /tmp/ccZL5Rsh.s page 51 2603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - \ 2604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \ 2605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 2606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)(__TEMPSENSOR_TYP_AVGSLOPE__) \ 2608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + (int32_t)(__TEMPSENSOR_CALX_TEMP__) \ 2609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/ 2621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions 2622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management 2626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: LL ADC functions to set DMA transfer are located into sections of */ 2629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration of ADC instance, groups and multimode (if available): */ 2630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* @ref LL_ADC_REG_SetDMATransfer(), ... */ 2631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Function to help to configure DMA transfer from ADC: retrieve the 2634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC register address from ADC instance and a list of ADC registers 2635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * intended to be used (most commonly) with DMA transfer. 2636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These ADC registers are data registers: 2637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when ADC conversion data is available in ADC data registers, 2638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC generates a DMA transfer request. 2639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used with LL DMA driver, refer to 2640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_DMA_ConfigAddresses()". 2641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_ConfigAddresses(DMA1, 2643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_CHANNEL_1, 2644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA), 2645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (uint32_t)&< array or variable >, 2646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_DIRECTION_PERIPH_TO_MEMORY); 2647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC: in multimode, some devices 2648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use a different data register outside of ADC instance scope 2649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (common data register). This macro manages this register difference, 2650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * only ADC instance has to be set as parameter. 2651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n 2652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n 2653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_DMA_GetRegAddr 2654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Register This parameter can be one of the following values: 2656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA 2657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1) 2658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Available on devices with several ADC instances. ARM GAS /tmp/ccZL5Rsh.s page 52 2660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC register address 2661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t data_reg_addr; 2666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (Register == LL_ADC_DMA_REG_REGULAR_DATA) 2668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &(ADCx->DR); 2671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */ 2673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register CDR */ 2675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR); 2676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return data_reg_addr; 2679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 2684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(Register); 2685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) &(ADCx->DR); 2688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to 2696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: Clock source and prescaler. 2701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, if ADC group injected is used, some 2702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * clock ratio constraints between ADC clock and AHB clock 2703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must be respected. 2704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 2705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 2709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 2710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 2711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n 2712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_SetCommonClock 2713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CommonClock This parameter can be one of the following values: 2716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 ARM GAS /tmp/ccZL5Rsh.s page 53 2717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 2723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) 2734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); 2736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: Clock source and prescaler. 2740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n 2741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_GetCommonClock 2742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 2746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 2752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON) 2762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC)); 2764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Configure all paths (overwrite current configuration). 2770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The values not selected are removed from configuration. ARM GAS /tmp/ccZL5Rsh.s page 54 2774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n 2786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalCh\n 2787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalCh 2788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSEL, PathInternal) 2800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Add paths to the current configuration. 2806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n 2821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChAdd\n 2822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChAdd 2823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None ARM GAS /tmp/ccZL5Rsh.s page 55 2831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCxy_COMMON->CCR, PathInternal); 2835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Remove paths to the current configuration. 2841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n 2845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChRem\n 2846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChRem 2847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal); 2859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: measurement path to internal 2863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...). 2864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n 2868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_GetCommonPathInternalCh\n 2869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_GetCommonPathInternalCh 2870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be a combination of the following values: 2873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSE 2881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins ARM GAS /tmp/ccZL5Rsh.s page 56 2888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC calibration factor in the mode single-ended 2893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is intended to set calibration parameters 2895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without having to perform a new calibration using 2896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_StartCalibration(). 2897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration factor must be specified for each of these 2901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 2902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 2903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of setting calibration factors of both modes single ended 2904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED): 2905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * both calibration factors must be concatenated. 2906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To perform this processing, use helper macro 2907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(). 2908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion 2911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on group regular. 2912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n 2913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_SetCalibrationFactor 2914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED 2919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F 2920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t C 2923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT, 2925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK, 2926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLED 2927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration factor in the mode single-ended 2931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing 2933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration(). 2934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n 2938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_GetCalibrationFactor 2939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x7F 2944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccZL5Rsh.s page 57 2945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff) 2946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve bits with position in register depending on parameter */ 2948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "SingleDiff". */ 2949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT, 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 2953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 2954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC resolution. 2958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 2963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 2964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_SetResolution 2965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Resolution This parameter can be one of the following values: 2967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution) 2974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution); 2976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC resolution. 2980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_GetResolution 2983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx) 2991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)); 2993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC conversion data alignment. 2997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 2998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going ARM GAS /tmp/ccZL5Rsh.s page 58 3002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment 3004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DataAlignment This parameter can be one of the following values: 3006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment) 3011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment); 3013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC conversion data alignment. 3017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 3018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment 3020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx) 3026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN)); 3028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC low power mode. 3032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on ARM GAS /tmp/ccZL5Rsh.s page 59 3059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): 3060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode 3075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param LowPowerMode This parameter can be one of the following values: 3077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 3079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode) 3082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode); 3084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC low power mode: 3088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on 3115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): ARM GAS /tmp/ccZL5Rsh.s page 60 3116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode 3127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 3131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx) 3133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY)); 3135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC selected offset number 1, 2, 3 or 4. 3139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of offset configuration: 3140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC channel to which the offset programmed will be applied 3141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Offset level (offset to be subtracted from the raw 3144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the offset, by default. It can be forced 3149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to disable state using function LL_ADC_SetOffsetState(). 3150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If a channel is mapped on several offsets numbers, only the offset 3151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with the lowest value is considered for the subtraction. 3152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n 3159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1 LL_ADC_SetOffset\n 3160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1_EN LL_ADC_SetOffset\n 3161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_SetOffset\n 3162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_SetOffset\n 3163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffset\n 3164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_SetOffset\n 3165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_SetOffset\n 3166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffset\n 3167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_SetOffset\n 3168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_SetOffset\n 3169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffset 3170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 ARM GAS /tmp/ccZL5Rsh.s page 61 3173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 3177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 3183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 3193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 3205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF 3219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); 3228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 62 3230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channel to which the offset programmed will be applied 3233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 3236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 3237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 3238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 3239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 3240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 3242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 3243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 3244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 3245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n 3249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n 3250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n 3251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel 3252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 3265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 3275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) ARM GAS /tmp/ccZL5Rsh.s page 63 3287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 3301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 3302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(ADC_TypeDef *ADCx, uint32_t Offsety) 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH); 3309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Offset level (offset to be subtracted from the raw 3314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n 3319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n 3320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n 3321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_GetOffsetLevel 3322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 3329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(ADC_TypeDef *ADCx, uint32_t Offsety) 3331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1); 3335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * force offset state disable or enable 3340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without modifying offset channel or offset value. 3341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function should be needed only in case of offset to be 3342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled-disabled dynamically, and should not be needed in other cases: 3343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function LL_ADC_SetOffset() automatically enables the offset. ARM GAS /tmp/ccZL5Rsh.s page 64 3344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n 3349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n 3350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n 3351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffsetState 3352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetState This parameter can be one of the following values: 3359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetStat 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetState); 3370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset state disabled or enabled. 3375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n 3376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n 3377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n 3378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_GetOffsetState 3379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety) 3390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN); 3394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset sign. 3399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccZL5Rsh.s page 65 3401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_SetOffsetSign\n 3404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_SetOffsetSign\n 3405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_SetOffsetSign\n 3406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_SetOffsetSign 3407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSign This parameter can be one of the following values: 3414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSign) 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSign); 3425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset sign if positive or negative. 3430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_GetOffsetSign\n 3431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_GetOffsetSign\n 3432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_GetOffsetSign\n 3433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_GetOffsetSign 3434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety) 3445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSETPOS); 3449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset saturation mode. 3454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. ARM GAS /tmp/ccZL5Rsh.s page 66 3458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_SetOffsetSaturation\n 3459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_SetOffsetSaturation\n 3460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_SetOffsetSaturation\n 3461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_SetOffsetSaturation 3462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSaturation This parameter can be one of the following values: 3469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Offse 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSaturation); 3480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset saturation if enabled or disabled. 3485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_GetOffsetSaturation\n 3486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_GetOffsetSaturation\n 3487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_GetOffsetSaturation\n 3488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_GetOffsetSaturation 3489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety) 3500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SATEN); 3504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC gain compensation. 3508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the gain compensation coefficient 3509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * that is applied to raw converted data using the formula: 3510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DATA = DATA(raw) * (gain compensation coef) / 4096 3511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the gain compensation if given 3512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coefficient is above 0, otherwise it disables it. 3513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Gain compensation when enabled is applied to all channels. 3514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to ARM GAS /tmp/ccZL5Rsh.s page 67 3515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_SetGainCompensation\n 3519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_SetGainCompensation 3520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param GainCompensation This parameter can be: 3522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation will be disabled and value set to 0 3523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation will be enabled with specified value 3524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetGainCompensation(ADC_TypeDef *ADCx, uint32_t GainCompensation) 3527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->GCOMP, ADC_GCOMP_GCOMPCOEFF, GainCompensation); 3529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_GCOMP, ((GainCompensation == 0UL) ? 0UL : 1UL) << ADC_CFGR2_GCO 3530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC gain compensation value 3534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_GetGainCompensation\n 3535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_GetGainCompensation 3536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 3538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation is disabled 3539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation is enabled with returned value 3540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetGainCompensation(ADC_TypeDef *ADCx) 3542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR2, ADC_CFGR2_GCOMP) == ADC_CFGR2_GCOMP) ? READ_BIT(ADCx->GCOMP, ADC_G 3544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 3547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling time common configuration impacting 3549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 3550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_SetSamplingTimeCommonConfig 3555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTimeCommonConfig This parameter can be one of the following values: 3557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonConfig(ADC_TypeDef *ADCx, uint32_t SamplingTimeCom 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SMPR1, ADC_SMPR1_SMPPLUS, SamplingTimeCommonConfig); 3564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC sampling time common configuration impacting 3568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 3569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_GetSamplingTimeCommonConfig 3570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: ARM GAS /tmp/ccZL5Rsh.s page 68 3572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonConfig(ADC_TypeDef *ADCx) 3576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SMPR1, ADC_SMPR1_SMPPLUS)); 3578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_SMPR1_SMPPLUS */ 3580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr 3586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger source: 3591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 3592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 3593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 3594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 3595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 3596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 3597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 3598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_REG_SetTriggerEdge(). 3599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n 3606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_SetTriggerSource 3607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 3609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 3619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 ARM GAS /tmp/ccZL5Rsh.s page 69 3629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 3639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 3649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 3656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); 3658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source: 3662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 3663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 3664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group regular trigger source is 3665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 3666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 3667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 3668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)") 3669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_IsTriggerSourceSWStart. 3670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n 3673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_GetTriggerSource 3674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) ARM GAS /tmp/ccZL5Rsh.s page 70 3686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 3696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 3706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 3716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx) 3722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); 3724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 3726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */ 3727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U 3728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */ 3730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 3731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource 3732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL) 3733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) 3734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 3735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source internal (SW start) 3739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or external. 3740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group regular trigger source set to external trigger, 3741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 3742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_GetTriggerSource(). ARM GAS /tmp/ccZL5Rsh.s page 71 3743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1 3751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger polarity. 3755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge 3761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 3763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 3769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); 3771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger polarity. 3775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge 3777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx) 3784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); 3786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling mode. 3790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the ADC conversion sampling mode 3791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode applies to regular group only. 3792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Set sampling mode is applied to all conversion of regular group. 3793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_SetSamplingMode\n 3798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_SetSamplingMode 3799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccZL5Rsh.s page 72 3800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingMode This parameter can be one of the following values: 3801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 3804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode) 3807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG, SamplingMode); 3809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC sampling mode 3813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_GetSamplingMode\n 3814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_GetSamplingMode 3815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 3820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSamplingMode(ADC_TypeDef *ADCx) 3822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG)); 3824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer length and scan direction. 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 3833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 3835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 3855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccZL5Rsh.s page 73 3857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength 3860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 3862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 3877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 3881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks); 3883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer length and scan direction. 3887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 3892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 3894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. ARM GAS /tmp/ccZL5Rsh.s page 74 3914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength 3915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 3932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx) 3935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L)); 3937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer discontinuous mode: 3941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 3944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 3945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC auto-injected mode 3946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC group regular sequencer discontinuous mode. 3947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n 3952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont 3953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 3955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 3967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM, SeqDiscont); 3969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 75 3971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer discontinuous mode: 3973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n 3976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont 3977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx) 3990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM)); 3992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequence: channel on the selected 3996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 3997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 3998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Channels ordering into each rank of scan sequence: 3999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever channel can be placed into whatever rank. 4000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n 4015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n 4016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n 4017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n 4018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n 4019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n 4020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n 4021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n 4022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n 4023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n 4024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n 4025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n 4026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n 4027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n ARM GAS /tmp/ccZL5Rsh.s page 76 4028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n 4029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_SetSequencerRanks 4030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n ARM GAS /tmp/ccZL5Rsh.s page 77 4085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Rank". */ 4096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> A 4099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 4102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequence: channel on the selected 4107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 4108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n 4126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n 4127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n 4128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n 4129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n 4130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n 4131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n 4132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n 4133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n 4134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n 4135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n 4136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n 4137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n 4138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n 4139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n 4140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_GetSequencerRanks 4141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccZL5Rsh.s page 78 4142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da ARM GAS /tmp/ccZL5Rsh.s page 79 4199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK 4208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(*preg, 4210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MA 4211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC continuous conversion mode on ADC group regular. 4217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 4219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 4222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 4223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode 4228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Continuous This parameter can be one of the following values: 4230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous) 4235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous); 4237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC continuous conversion mode on ADC group regular. 4241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 4243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode 4246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx) 4252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT)); 4254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 80 4256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion data transfer: no transfer or 4258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 4273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_SetMultiDMATransfer(). 4276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n 4283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_SetDMATransfer 4284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DMATransfer This parameter can be one of the following values: 4286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer) 4292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG, DMATransfer); 4294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data transfer: no transfer or 4298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error ARM GAS /tmp/ccZL5Rsh.s page 81 4313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_GetMultiDMATransfer(). 4316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n 4319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_GetDMATransfer 4320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx) 4327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG)); 4329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular behavior in case of overrun: 4333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Compatibility with devices without feature overrun: 4335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other devices without this feature have a behavior 4336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * equivalent to data overwritten. 4337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The default setting of overrun is data preserved. 4338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, for compatibility with all devices, parameter 4339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * overrun should be set to data overwritten. 4340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun 4345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Overrun This parameter can be one of the following values: 4347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 4348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun) 4352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun); 4354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular behavior in case of overrun: 4358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun 4360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 4363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx) 4366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD)); 4368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 82 4370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 4372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: g 4375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 4376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger source: 4380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 4383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 4384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 4385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 4386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 4387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_INJ_SetTriggerEdge(). 4388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n 4395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_SetTriggerSource 4396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) ARM GAS /tmp/ccZL5Rsh.s page 83 4427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 4444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN, TriggerSource); 4446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source: 4450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group injected trigger source is 4453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 4454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 4455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 4456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)") 4457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_IsTriggerSourceSWStart. 4458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n 4461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_GetTriggerSource 4462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 ARM GAS /tmp/ccZL5Rsh.s page 84 4484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(ADC_TypeDef *ADCx) 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN); 4511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 4513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */ 4514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS - 4515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */ 4517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 4518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource 4519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL) 4520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN) 4521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source internal (SW start) 4526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or external 4527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group injected trigger source set to external trigger, 4528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 4529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_GetTriggerSource. 4530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart 4531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 4533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 4534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN)) ? 4538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccZL5Rsh.s page 85 4541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger polarity. 4542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge 4548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 4550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 4556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge); 4558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger polarity. 4562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge 4564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx) 4571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN)); 4573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer length and scan direction. 4577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 4578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength 4588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 4590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 4597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccZL5Rsh.s page 86 4598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks); 4599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer length and scan direction. 4603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function retrieves: 4604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength 4610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(ADC_TypeDef *ADCx) 4618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL)); 4620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer discontinuous mode: 4624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont 4629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 4631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 4633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 4636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont); 4638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer discontinuous mode: 4642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont 4645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 4649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx) 4651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN)); 4653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 87 4655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequence: channel on the selected 4657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n 4671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n 4672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n 4673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks 4674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ARM GAS /tmp/ccZL5Rsh.s page 88 4712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on parameter "Rank". */ 4728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 4731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ 4732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequence: channel on the selected 4737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n 4752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n 4753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n 4754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks 4755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 ARM GAS /tmp/ccZL5Rsh.s page 89 4769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->JSQR, 4810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) < 4811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger: 4817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode can be used to extend number of data registers 4819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * updated after one ADC conversion trigger and with data 4820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * permanently kept (not erased by successive conversions of scan of 4821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC sequencer ranks), up to 5 data registers: 4822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 data register on ADC group regular, 4 data registers 4823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group injected. 4824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC group injected injected trigger source is set to an 4825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external trigger, this feature must be must be set to ARM GAS /tmp/ccZL5Rsh.s page 90 4826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent trigger. 4827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC group injected automatic trigger is compliant only with 4828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group injected trigger source set to SW start, without any 4829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * further action on ADC group injected conversion start or stop: 4830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in this case, ADC group injected is controlled only 4831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC group regular. 4832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto 4839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TrigAuto This parameter can be one of the following values: 4841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto) 4846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto); 4848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger: 4852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto 4854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(ADC_TypeDef *ADCx) 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO)); 4862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected contexts queue mode. 4866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is disabled: 4871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - only 1 sequence can be configured 4872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and is active perpetually. 4873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is enabled: 4874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - up to 2 contexts can be queued 4875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and are checked in and out as a FIFO stack (first-in, first-out). 4876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If a new context is set when queues is full, error is triggered 4877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by interruption "Injected Queue Overflow". 4878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Two behaviors are possible when all contexts have been processed: 4879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the contexts queue can maintain the last context active perpetually 4880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or can be empty and injected group triggers are disabled. 4881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Triggers can be only external (not internal SW start) 4882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Caution: The sequence must be fully configured in one time ARM GAS /tmp/ccZL5Rsh.s page 91 4883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (one write of register JSQR makes a check-in of a new context 4884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * into the queue). 4885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore functions to set separately injected trigger and 4886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer channels cannot be used, register JSQR must be set 4887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using function @ref LL_ADC_INJ_ConfigQueueContext(). 4888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This parameter can be modified only when no conversion is on going 4889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A modification of the context mode (bit JQDIS) causes the contexts 4891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * queue to be flushed and the register JSQR is cleared. 4892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n 4897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_SetQueueMode 4898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param QueueMode This parameter can be one of the following values: 4900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 4902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 4903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode) 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS, QueueMode); 4908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected context queue mode. 4912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n 4913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_GetQueueMode 4914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 4918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 4919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(ADC_TypeDef *ADCx) 4921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS)); 4923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set one context on ADC group injected that will be checked in 4927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * contexts queue. 4928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function is intended to be used when contexts queue is enabled, 4933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because the sequence must be fully configured in one time 4934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions to set separately injected trigger and sequencer channels 4935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * cannot be used): 4936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_INJ_SetQueueMode(). 4937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In the contexts queue, only the active context can be read. 4938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The parameters of this function can be read using functions: 4939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerSource() ARM GAS /tmp/ccZL5Rsh.s page 92 4940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerEdge() 4941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetSequencerRanks() 4942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n 4953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n 4954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JL LL_ADC_INJ_ConfigQueueContext\n 4955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n 4956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n 4957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n 4958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext 4959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 ARM GAS /tmp/ccZL5Rsh.s page 93 4997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 5000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 5005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Note: This parameter is discarded in case of SW start: 5010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE". 5011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 5012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 5016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank1_Channel This parameter can be one of the following values: 5017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n ARM GAS /tmp/ccZL5Rsh.s page 94 5054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank2_Channel This parameter can be one of the following values: 5059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank3_Channel This parameter can be one of the following values: 5101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 ARM GAS /tmp/ccZL5Rsh.s page 95 5111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank4_Channel This parameter can be one of the following values: 5143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) ARM GAS /tmp/ccZL5Rsh.s page 96 5168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx, 5187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource, 5188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ExternalTriggerEdge, 5189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerNbRanks, 5190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank1_Channel, 5191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank2_Channel, 5192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank3_Channel, 5193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank4_Channel) 5194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Rankx_Channel" with bits position */ 5196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on literal "LL_ADC_INJ_RANK_x". */ 5197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ 5198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* because containing other bits reserved for other purpose. */ 5199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If parameter "TriggerSource" is set to SW start, then parameter */ 5200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "ExternalTriggerEdge" is discarded. */ 5201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t is_trigger_not_sw = (uint32_t)((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE) ? 1UL : 0UL); 5202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 5203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL | 5204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTEN | 5205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ4 | 5206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ3 | 5207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ2 | 5208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ1 | 5209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JL, 5210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (TriggerSource & ADC_JSQR_JEXTSEL) | 5211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ExternalTriggerEdge * (is_trigger_not_sw)) | 5212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SequencerNbRanks 5217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels ARM GAS /tmp/ccZL5Rsh.s page 97 5225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set sampling time of the selected ADC channel 5230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of internal channel (VrefInt, TempSensor, ...) to be 5234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted: 5235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sampling time constraints must be respected (sampling time can be 5236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * adjusted in function of ADC clock frequency and sampling time 5237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * setting). 5238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for timings values (parameters TS_vrefint, 5239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_temp, ...). 5240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 5245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC conversion of internal channel (VrefInt, 5247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor, ...), a sampling time minimum value 5248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required. 5249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 5250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n 5255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n 5256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n 5257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n 5258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n 5259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n 5260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n 5261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n 5262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n 5263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n 5264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n 5265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n 5266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n 5267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n 5268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n 5269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n 5270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n 5271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n 5272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_SetChannelSamplingTime 5273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 ARM GAS /tmp/ccZL5Rsh.s page 98 5282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTime This parameter can be one of the following values: 5317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sa 5332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "SamplingTime" with bits position */ 5334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Channel". */ 5335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter "Channel" is used with masks because containing */ 5336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_M 5338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 99 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get sampling time of the selected ADC channel 5346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 5354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n 5356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n 5357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n 5358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n 5359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n 5360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n 5361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n 5362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n 5363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n 5364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n 5365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n 5366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n 5367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n 5368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n 5369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n 5370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n 5371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n 5372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n 5373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_GetChannelSamplingTime 5374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) ARM GAS /tmp/ccZL5Rsh.s page 100 5396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel) 5432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOF 5434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 5436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_ 5437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_P 5438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set mode single-ended or differential input of the selected 5443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Channel ending is on channel scope: independently of channel mapped 5445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group regular or injected. 5446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In differential mode: Differential measurement is carried out 5447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * between the selected channel 'i' (positive input) and 5448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel 'i+1' (negative input). Only channel 'i' has to be 5449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured, channel 'i+1' is configured automatically. 5450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 5451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are ARM GAS /tmp/ccZL5Rsh.s page 101 5453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For ADC channels configured in differential mode, both inputs 5466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * should be biased at (Vref+)/2 +/-200mV. 5467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (Vref+ is the analog voltage reference) 5468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 5471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 5472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff 5474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be a combination of the following values: 5492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 5493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 5494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sing 5497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Bits of channels in single or differential mode are set only for */ 5499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* differential mode (for single mode, mask of bits allowed to be set is */ 5500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* shifted out of range of bits of channels in single or differential mode. */ 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->DIFSEL, 5502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SING 5504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get mode single-ended or differential input of the selected 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, ARM GAS /tmp/ccZL5Rsh.s page 102 5510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, to ensure a channel is configured in single-ended mode, 5512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the configuration of channel itself and the channel 'i-1' must be 5513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * read back (to ensure that the selected channel channel has not been 5514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured in differential mode by the previous channel). 5515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 5516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 5518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. In this case, the value 5531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned is null if all channels are in single ended-mode. 5532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff 5534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be a combination of the following values: 5536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: channel in single-ended mode, else: channel in differential mode 5552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel) 5554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK))); 5556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an 5563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccZL5Rsh.s page 103 5567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog monitored channels: 5568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a single channel, multiple channels or all channels, 5569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC groups regular and-or injected. 5570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Once monitored channels are selected, analog watchdog 5571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 5572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of need to define a single channel to monitor 5573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with analog watchdog from sequencer channel definition, 5574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP(). 5575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n 5601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n 5602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n 5605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels 5606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDChannelGroup This parameter can be one of the following values: 5612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 5614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 5617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) ARM GAS /tmp/ccZL5Rsh.s page 104 5624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 5652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 5659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 5664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 5671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 5674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 5675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 5676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 5677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 5678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 5679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 5680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) ARM GAS /tmp/ccZL5Rsh.s page 105 5681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 5682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 5683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 5684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 5685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 5686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 5687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 5688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 5689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 5690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 5691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 5692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 5693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 5694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 5695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 5696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 5697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 5698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 5699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 5700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 5701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 5702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 5703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 5704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 5705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 5706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 5708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDChannelGroup" with bits position */ 5721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "AWDy". */ 5722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ 5723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> AD 5725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_C 5726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDChannelGroup & AWDy); 5730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog monitored channel. 5734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 5735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 5736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 5737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared ARM GAS /tmp/ccZL5Rsh.s page 106 5738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 5739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 5741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 5742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 5743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 5744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only when the analog watchdog is set to monitor 5746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * one channel. 5747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n 5773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n 5774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n 5777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels 5778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 (1) 5782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 (1) 5783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On this AWD number, monitored channel can be retrieved 5785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * if only 1 channel is programmed (or none or all channels). 5786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function cannot retrieve monitored channel if 5787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * multiple channels are programmed simultaneously 5788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by bitfield. 5789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 5792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) ARM GAS /tmp/ccZL5Rsh.s page 107 5795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 5802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 5830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 5837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 5842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 5849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ARM GAS /tmp/ccZL5Rsh.s page 108 5852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1. 5853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy) 5855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) 5857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC 5858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK); 5860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */ 5862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (parameter value LL_ADC_AWD_DISABLE). */ 5863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Else, the selected AWD is enabled and is monitoring a group of channels */ 5864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* or a single channel. */ 5865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AnalogWDMonitChannels != 0UL) 5866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AWDy == LL_ADC_AWD1) 5868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_CFGR_AWD1SGL) == 0UL) 5870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = ((AnalogWDMonitChannels 5873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD_CR23_CHANNEL_MASK) 5874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (~(ADC_CFGR_AWD1CH)) 5876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1C 5883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK) 5889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (ADC_AWD_CR23_CHANNEL_MASK 5892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN)) 5893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 5901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDMonitChannels) << ADC_CF 5902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return AnalogWDMonitChannels; 5908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccZL5Rsh.s page 109 5909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog thresholds value of both thresholds 5912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high and low. 5913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If value of only one threshold high or low must be set, 5914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_SetAnalogWDThresholds(). 5915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 5940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 5941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 5942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 5943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n 5944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n 5945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n 5946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n 5947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n 5948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_ConfigAnalogWDThresholds 5949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF 5955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF 5956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdLowValue) 5960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ 5962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameter */ 5963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDy". */ 5964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ 5965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ ARM GAS /tmp/ccZL5Rsh.s page 110 5966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC 5967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 5970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) | AWDThresholdLowValue); 5971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog threshold value of threshold 5975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high or low. 5976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If values of both thresholds high or low must be set, 5977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_ConfigAnalogWDThresholds(). 5978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 6000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 6001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 6003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 6004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 6005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 6006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is not conditioned to 6007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC can be disabled, enabled with or without conversion on going 6009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either ADC groups regular or injected. 6010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n 6011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_SetAnalogWDThresholds\n 6012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_SetAnalogWDThresholds\n 6013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_SetAnalogWDThresholds\n 6014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_SetAnalogWDThresholds\n 6015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_SetAnalogWDThresholds 6016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH ARM GAS /tmp/ccZL5Rsh.s page 111 6023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF 6025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThr 6028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdValue) 6029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */ 6031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameters */ 6032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */ 6033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ 6034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 6035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_RE 6037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 6039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdsHighLow, 6040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdValue << ((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TR 6041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog threshold value of threshold high, 6045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * threshold low or raw data with ADC thresholds high and low 6046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * concatenated. 6047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC thresholds high and low is retrieved, 6048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the data of each threshold high or low can be isolated 6049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro: 6050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(). 6051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 6052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 6053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(). 6054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n 6055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_GetAnalogWDThresholds\n 6056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_GetAnalogWDThresholds\n 6057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_GetAnalogWDThresholds\n 6058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_GetAnalogWDThresholds\n 6059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_GetAnalogWDThresholds 6060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 6067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW 6069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 6070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AW 6072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_ 6075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 6077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdsHighLow | ADC_TR1_LT1)) 6078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH 6079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & ~(AWDThresholdsHighLow & ADC_TR1_LT1))); ARM GAS /tmp/ccZL5Rsh.s page 112 6080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog filtering configuration 6084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 6089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_SetAWDFilteringConfiguration 6091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param FilteringConfig This parameter can be one of the following values: 6095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 6101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t 6106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); 6110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog filtering configuration 6114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 6115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_GetAWDFilteringConfiguration 6117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 6121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 6127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy) 6131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); 6135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 113 6137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over 6142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling scope: ADC groups regular and-or injected 6147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 6154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n 6159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n 6160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_SetOverSamplingScope 6161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OvsScope This parameter can be one of the following values: 6163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 6168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope) 6171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope); 6173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling scope: ADC groups regular and-or injected 6177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 6184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n 6185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n 6186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_GetOverSamplingScope 6187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED ARM GAS /tmp/ccZL5Rsh.s page 114 6194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx) 6196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM)); 6198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling discontinuous mode (triggered mode) 6202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 6212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, oversampling discontinuous mode 6213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (triggered mode) can be used only when oversampling is 6214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * set on group regular only and in resumed mode. 6215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont 6216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OverSamplingDiscont This parameter can be one of the following values: 6218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont) 6223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont); 6225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling discontinuous mode (triggered mode) 6229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont 6236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx) 6242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS)); 6244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling 6248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of oversampling configuration: 6250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ratio ARM GAS /tmp/ccZL5Rsh.s page 115 6251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - shift 6252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n 6257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift 6258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Ratio This parameter can be one of the following values: 6260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 6267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Shift This parameter can be one of the following values: 6269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_ 6281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); 6283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling ratio 6287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio 6289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Ratio This parameter can be one of the following values: 6291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 6298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx) 6301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); 6303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling shift 6307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) ARM GAS /tmp/ccZL5Rsh.s page 116 6308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift 6309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Shift This parameter can be one of the following values: 6311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx) 6322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); 6324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multim 6331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode configuration to operate in independent mode 6337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro 6346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_SetMultimode 6348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Multimode This parameter can be one of the following values: 6351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 6355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode) 6362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode); 6364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccZL5Rsh.s page 117 6365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode configuration to operate in independent mode 6368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_GetMultimode 6373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 6380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON) 6386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); 6388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode conversion data transfer: no transfer 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 6400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 6406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 6412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 6418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccZL5Rsh.s page 118 6422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled 6423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or enabled without conversion on going on group regular. 6424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n 6425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_SetMultiDMATransfer 6426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiDMATransfer This parameter can be one of the following values: 6429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 6432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMA 6437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, MultiDMATransfer); 6439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data transfer: no transfer 6443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 6451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 6457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 6463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 6469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n 6472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_GetMultiDMATransfer 6473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ARM GAS /tmp/ccZL5Rsh.s page 119 6479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON) 6483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG)); 6485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode delay between 2 sampling phases. 6489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The sampling delay range depends on ADC resolution: 6490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 12 bits can have maximum delay of 12 cycles. 6491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 10 bits can have maximum delay of 10 cycles. 6492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 8 bits can have maximum delay of 8 cycles. 6493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 6 bits can have maximum delay of 6 cycles. 6494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 6499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay 6501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiTwoSamplingDelay This parameter can be one of the following values: 6504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 6507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 6514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Mul 6523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay); 6525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode delay between 2 sampling phases. 6529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay 6530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ARM GAS /tmp/ccZL5Rsh.s page 120 6536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 6543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON) 6551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY)); 6553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 6555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance 6560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Put ADC instance in deep power down state. 6565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown 6573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx) 6577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_DEEPPWD); 6584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC deep power down mode. 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to ARM GAS /tmp/ccZL5Rsh.s page 121 6593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown 6596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) 6600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); 6605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance deep power down state. 6609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled 6610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: deep power down is disabled, 1: deep power down is enabled. 6612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx) 6614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); 6616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC instance internal voltage regulator. 6620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC internal voltage regulator enable, 6621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay for ADC internal voltage regulator stabilization 6622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required before performing a ADC calibration or ADC enable. 6623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tADCVREG_STUP. 6624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US. 6625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator 6629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) 6633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADVREGEN); 6640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC internal voltage regulator. 6644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator 6648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None ARM GAS /tmp/ccZL5Rsh.s page 122 6650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx) 6652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS)); 6654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance internal voltage regulator state. 6658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled 6659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. 6661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) 6663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); 6665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable the selected ADC instance. 6669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC enable, a delay for 6670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC internal analog stabilization is required before performing a 6671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 6672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tSTAB. 6673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled and ADC internal voltage regulator enabled. 6679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_Enable 6680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) 6684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADEN); 6691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable the selected ADC instance. 6695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be not disabled. Must be enabled without conversion on going 6698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_Disable 6700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) 6704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ ARM GAS /tmp/ccZL5Rsh.s page 123 6707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADDIS); 6711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance enable state. 6715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_IsEnabled 6719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: ADC is disabled, 1: ADC is enabled. 6721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) 6723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); 6725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance disable state. 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing 6730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no ADC disable command on going. 6732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) 6734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); 6736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC calibration in the mode single-ended 6740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 6741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, a minimum number of ADC clock cycles 6742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are required between ADC end of calibration and ADC enable. 6743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES. 6744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 6745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 6746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 6747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration run must be performed for each of these 6748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 6749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 6750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_StartCalibration\n 6754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CR ADCALDIF LL_ADC_StartCalibration 6755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 6757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 6758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 6759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff) 6762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ ARM GAS /tmp/ccZL5Rsh.s page 124 6764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 78 .loc 2 6766 0 79 0034 9368 ldr r3, [r2, #8] 80 0036 05F08045 and r5, r5, #1073741824 81 .LVL3: 82 003a 23F04043 bic r3, r3, #-1073741824 83 003e 45F00045 orr r5, r5, #-2147483648 84 0042 23F03F03 bic r3, r3, #63 85 0046 1D43 orrs r5, r5, r3 86 0048 9560 str r5, [r2, #8] 87 004a 05E0 b .L4 88 .L12: 89 .LBE293: 90 .LBE292: 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 91 .loc 1 166 0 92 004c 019B ldr r3, [sp, #4] 93 004e 0133 adds r3, r3, #1 94 0050 0193 str r3, [sp, #4] 95 .loc 1 167 0 96 0052 019B ldr r3, [sp, #4] 97 0054 8B42 cmp r3, r1 98 0056 14D8 bhi .L11 99 .L4: 100 .LBB294: 101 .LBB295: 6767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCALDIF | ADC_CR_BITS_PROPERTY_RS, 6768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCAL | (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK)); 6769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration state. 6773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing 6774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: calibration complete, 1: calibration in progress. 6776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx) 6778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL); 102 .loc 2 6779 0 103 0058 9368 ldr r3, [r2, #8] 104 005a 002B cmp r3, #0 105 005c F6DB blt .L12 106 .LBE295: 107 .LBE294: 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; ARM GAS /tmp/ccZL5Rsh.s page 125 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 108 .loc 1 182 0 109 005e E36D ldr r3, [r4, #92] 110 0060 23F00303 bic r3, r3, #3 111 0064 43F00103 orr r3, r3, #1 112 0068 E365 str r3, [r4, #92] 113 006a 02E0 b .L7 114 .LVL4: 115 .L3: 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 116 .loc 1 188 0 117 006c 43F01003 orr r3, r3, #16 118 0070 E365 str r3, [r4, #92] 119 .LVL5: 120 .L7: 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: No need to update variable "tmp_hal_status" here: already set */ 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to state "HAL_ERROR" by function disabling the ADC. */ 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 121 .loc 1 195 0 122 0072 0023 movs r3, #0 123 0074 84F85830 strb r3, [r4, #88] 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 124 .loc 1 199 0 125 0078 03B0 add sp, sp, #12 126 .LCFI2: 127 .cfi_remember_state 128 .cfi_def_cfa_offset 12 129 @ sp needed 130 007a 30BD pop {r4, r5, pc} 131 .LVL6: 132 .L8: 133 .LCFI3: 134 .cfi_restore_state 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 135 .loc 1 145 0 136 007c 0220 movs r0, #2 137 .LVL7: 138 .loc 1 199 0 139 007e 03B0 add sp, sp, #12 140 .LCFI4: 141 .cfi_remember_state ARM GAS /tmp/ccZL5Rsh.s page 126 142 .cfi_def_cfa_offset 12 143 @ sp needed 144 0080 30BD pop {r4, r5, pc} 145 .LVL8: 146 .L11: 147 .LCFI5: 148 .cfi_restore_state 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 149 .loc 1 170 0 150 0082 E36D ldr r3, [r4, #92] 151 0084 23F01203 bic r3, r3, #18 152 0088 43F01003 orr r3, r3, #16 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 153 .loc 1 175 0 154 008c 0022 movs r2, #0 155 .LVL9: 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 156 .loc 1 177 0 157 008e 0120 movs r0, #1 158 .LVL10: 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 159 .loc 1 170 0 160 0090 E365 str r3, [r4, #92] 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 161 .loc 1 175 0 162 0092 84F85820 strb r2, [r4, #88] 163 .loc 1 199 0 164 0096 03B0 add sp, sp, #12 165 .LCFI6: 166 .cfi_def_cfa_offset 12 167 @ sp needed 168 0098 30BD pop {r4, r5, pc} 169 .LVL11: 170 .L14: 171 009a 00BF .align 2 172 .L13: 173 009c 01DE0400 .word 318977 174 .cfi_endproc 175 .LFE329: 177 .section .text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits 178 .align 1 179 .p2align 2,,3 180 .global HAL_ADCEx_Calibration_GetValue 181 .syntax unified 182 .thumb 183 .thumb_func 184 .fpu fpv4-sp-d16 186 HAL_ADCEx_Calibration_GetValue: 187 .LFB330: 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get the calibration factor. 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval Calibration value. ARM GAS /tmp/ccZL5Rsh.s page 127 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 188 .loc 1 210 0 189 .cfi_startproc 190 @ args = 0, pretend = 0, frame = 0 191 @ frame_needed = 0, uses_anonymous_args = 0 192 @ link register save eliminated. 193 .LVL12: 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the selected ADC calibration value */ 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff); 194 .loc 1 216 0 195 0000 0368 ldr r3, [r0] 196 .LVL13: 197 .LBB296: 198 .LBB297: 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 199 .loc 2 2951 0 200 0002 D3F8B430 ldr r3, [r3, #180] 201 .LVL14: 202 0006 01F07F10 and r0, r1, #8323199 203 .LVL15: 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 204 .loc 2 2952 0 205 000a 090B lsrs r1, r1, #12 206 .LVL16: 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 207 .loc 2 2951 0 208 000c 1840 ands r0, r0, r3 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 209 .loc 2 2952 0 210 000e 01F01001 and r1, r1, #16 211 .LBE297: 212 .LBE296: 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 213 .loc 1 217 0 214 0012 C840 lsrs r0, r0, r1 215 0014 7047 bx lr 216 .cfi_endproc 217 .LFE330: 219 0016 00BF .section .text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits 220 .align 1 221 .p2align 2,,3 222 .global HAL_ADCEx_Calibration_SetValue 223 .syntax unified 224 .thumb 225 .thumb_func 226 .fpu fpv4-sp-d16 228 HAL_ADCEx_Calibration_SetValue: 229 .LFB331: 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Set the calibration factor to overwrite automatic conversion result. ARM GAS /tmp/ccZL5Rsh.s page 128 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC must be enabled and no conversion is ongoing. 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param CalibrationFactor Calibration factor (coded on 7 bits maximum) 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL state 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t CalibrationFactor) 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 230 .loc 1 231 0 231 .cfi_startproc 232 @ args = 0, pretend = 0, frame = 0 233 @ frame_needed = 0, uses_anonymous_args = 0 234 @ link register save eliminated. 235 .LVL17: 236 0000 0346 mov r3, r0 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor)); 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 237 .loc 1 242 0 238 0002 90F85800 ldrb r0, [r0, #88] @ zero_extendqisi2 239 .LVL18: 240 0006 0128 cmp r0, #1 241 0008 34D0 beq .L21 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 242 .loc 1 231 0 discriminator 2 243 000a F0B4 push {r4, r5, r6, r7} 244 .LCFI7: 245 .cfi_def_cfa_offset 16 246 .cfi_offset 4, -16 247 .cfi_offset 5, -12 248 .cfi_offset 6, -8 249 .cfi_offset 7, -4 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of hardware constraints before modifying the calibration */ 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* factors register: ADC must be enabled, no conversion on going. */ 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 250 .loc 1 246 0 discriminator 2 251 000c 1E68 ldr r6, [r3] 252 .LVL19: 253 .LBB298: 254 .LBB299: 6780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccZL5Rsh.s page 129 6785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu 6787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group regular conversion. 6792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 6793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 6794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 6795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 6796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 6797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 6798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 6799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_StartConversion 6805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) 6809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTART); 6816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group regular conversion. 6820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group regular, 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_StopConversion 6825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) 6829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTP); 6836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion state. 6840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing 6841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccZL5Rsh.s page 130 6842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group regular. 6843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) 6845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); 255 .loc 2 6846 0 discriminator 2 256 000e B068 ldr r0, [r6, #8] 257 .LBE299: 258 .LBE298: 259 .LBB301: 260 .LBB302: 6847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular command of conversion stop state 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing 6852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group regular. 6854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx) 6856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP)) ? 1UL : 0UL); 6858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC sampling phase for sampling time trigger mode 6862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 6866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StartSamplingPhase 6872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartSamplingPhase(ADC_TypeDef *ADCx) 6876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC sampling phase for sampling time trigger mode and start conversion 6882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 6886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_StartSamplingPhase has been called to start 6887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the sampling phase 6888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. ARM GAS /tmp/ccZL5Rsh.s page 131 6893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StopSamplingPhase 6894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopSamplingPhase(ADC_TypeDef *ADCx) 6898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and 6905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all oversampling increased data width (for devices 6906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with feature oversampling). 6907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32 6908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 6910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx) 6912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 12 bits. 6919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12 6923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 6925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx) 6927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 10 bits. 6934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10 6938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF 6940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx) 6942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 8 bits. 6949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling ARM GAS /tmp/ccZL5Rsh.s page 132 6950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8 6953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 6955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx) 6957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 6 bits. 6964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6 6968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3F 6970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx) 6972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data of ADC master, ADC slave 6979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or raw data with ADC master and slave concatenated. 6980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC master and slave concatenated is retrieved, 6981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a macro is available to get the conversion data of 6982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (however this macro is mainly intended for multimode 6985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, because this function can do the same 6986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by getting multimode conversion data of ADC master or ADC slave 6987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * separately). 6988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n 6989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32 6990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ConversionData This parameter can be one of the following values: 6993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 6994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 6995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER_SLAVE 6996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 6997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(ADC_Common_TypeDef *ADCxy_COMMON, uin 6999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR, 7001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ConversionData) 7002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (POSITION_VAL(ConversionData) & 0x1FUL) 7003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 7006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccZL5Rsh.s page 133 7007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group inj 7012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group injected conversion. 7017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 7018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 7019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 7020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 7021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 7022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 7023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 7024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group injected, 7027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group injected, 7028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_StartConversion 7030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx) 7034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTART); 7041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group injected conversion. 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group injected, 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion 7050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) 7054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTP); 7061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccZL5Rsh.s page 134 7064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion state. 7065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing 7066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group injected. 7068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx) 7070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); 261 .loc 2 7071 0 discriminator 2 262 0010 B468 ldr r4, [r6, #8] 263 .LBE302: 264 .LBE301: 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 265 .loc 1 242 0 discriminator 2 266 0012 0125 movs r5, #1 267 0014 83F85850 strb r5, [r3, #88] 268 .LBB305: 269 .LBB303: 270 .loc 2 7071 0 discriminator 2 271 0018 2507 lsls r5, r4, #28 272 .LBE303: 273 .LBE305: 274 .LBB306: 275 .LBB300: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 276 .loc 2 6846 0 discriminator 2 277 001a 00F00400 and r0, r0, #4 278 .LVL20: 279 .LBE300: 280 .LBE306: 281 .LBB307: 282 .LBB304: 283 .loc 2 7071 0 discriminator 2 284 001e 0ED5 bpl .L18 285 .LVL21: 286 .LBE304: 287 .LBE307: 288 .LBB308: 289 .LBB309: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 290 .loc 2 6724 0 291 0020 B268 ldr r2, [r6, #8] 292 .LVL22: 293 .L19: 294 .LBE309: 295 .LBE308: 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_regular == 0UL) 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the selected ADC calibration value */ 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor); 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else ARM GAS /tmp/ccZL5Rsh.s page 135 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 296 .loc 1 260 0 297 0022 DA6D ldr r2, [r3, #92] 298 0024 42F02002 orr r2, r2, #32 299 0028 DA65 str r2, [r3, #92] 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC error code */ 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 300 .loc 1 262 0 301 002a 1A6E ldr r2, [r3, #96] 302 002c 42F00102 orr r2, r2, #1 303 0030 1A66 str r2, [r3, #96] 304 .LVL23: 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 305 .loc 1 269 0 306 0032 0022 movs r2, #0 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 307 .loc 1 265 0 308 0034 0120 movs r0, #1 309 .LVL24: 310 .loc 1 269 0 311 0036 83F85820 strb r2, [r3, #88] 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 312 .loc 1 273 0 313 003a F0BC pop {r4, r5, r6, r7} 314 .LCFI8: 315 .cfi_remember_state 316 .cfi_restore 7 317 .cfi_restore 6 318 .cfi_restore 5 319 .cfi_restore 4 320 .cfi_def_cfa_offset 0 321 003c 7047 bx lr 322 .LVL25: 323 .L18: 324 .LCFI9: 325 .cfi_restore_state 326 .LBB311: 327 .LBB310: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 328 .loc 2 6724 0 329 003e B468 ldr r4, [r6, #8] 330 0040 E407 lsls r4, r4, #31 331 0042 EED5 bpl .L19 332 .LVL26: 333 .LBE310: 334 .LBE311: ARM GAS /tmp/ccZL5Rsh.s page 136 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 335 .loc 1 250 0 336 0044 0028 cmp r0, #0 337 0046 ECD1 bne .L19 338 .LVL27: 339 .LBB312: 340 .LBB313: 2924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK, 341 .loc 2 2924 0 342 0048 0C0B lsrs r4, r1, #12 343 004a D6F8B450 ldr r5, [r6, #180] 344 004e 01F07F07 and r7, r1, #127 345 0052 04F01004 and r4, r4, #16 346 0056 24EA0704 bic r4, r4, r7 347 005a 01F07F11 and r1, r1, #8323199 348 .LVL28: 349 005e A240 lsls r2, r2, r4 350 .LVL29: 351 0060 25EA0101 bic r1, r5, r1 352 0064 0A43 orrs r2, r2, r1 353 0066 C6F8B420 str r2, [r6, #180] 354 .LVL30: 355 .LBE313: 356 .LBE312: 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 357 .loc 1 269 0 358 006a 0022 movs r2, #0 359 006c 83F85820 strb r2, [r3, #88] 360 .loc 1 273 0 361 0070 F0BC pop {r4, r5, r6, r7} 362 .LCFI10: 363 .cfi_restore 7 364 .cfi_restore 6 365 .cfi_restore 5 366 .cfi_restore 4 367 .cfi_def_cfa_offset 0 368 .LVL31: 369 0072 7047 bx lr 370 .LVL32: 371 .L21: 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 372 .loc 1 242 0 373 0074 0220 movs r0, #2 374 .loc 1 273 0 375 0076 7047 bx lr 376 .cfi_endproc 377 .LFE331: 379 .section .text.HAL_ADCEx_InjectedStart,"ax",%progbits 380 .align 1 381 .p2align 2,,3 382 .global HAL_ADCEx_InjectedStart 383 .syntax unified 384 .thumb 385 .thumb_func 386 .fpu fpv4-sp-d16 388 HAL_ADCEx_InjectedStart: 389 .LFB332: ARM GAS /tmp/ccZL5Rsh.s page 137 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group. 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function: None. 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled when multimode feature is available: 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart() API must be called for ADC slave first, 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc) 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 390 .loc 1 287 0 391 .cfi_startproc 392 @ args = 0, pretend = 0, frame = 0 393 @ frame_needed = 0, uses_anonymous_args = 0 394 .LVL33: 395 0000 38B5 push {r3, r4, r5, lr} 396 .LCFI11: 397 .cfi_def_cfa_offset 16 398 .cfi_offset 3, -16 399 .cfi_offset 4, -12 400 .cfi_offset 5, -8 401 .cfi_offset 14, -4 402 .LBB314: 403 .LBB315: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 404 .loc 2 6387 0 405 0002 334A ldr r2, .L48 406 .LBE315: 407 .LBE314: 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 408 .loc 1 297 0 409 0004 0368 ldr r3, [r0] 410 .LBB317: 411 .LBB316: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 412 .loc 2 6387 0 413 0006 9568 ldr r5, [r2, #8] 414 .LVL34: 415 .LBE316: 416 .LBE317: 417 .LBB318: 418 .LBB319: 419 .loc 2 7071 0 420 0008 9A68 ldr r2, [r3, #8] ARM GAS /tmp/ccZL5Rsh.s page 138 421 000a 1107 lsls r1, r2, #28 422 000c 40D4 bmi .L42 423 .LVL35: 424 .LBE319: 425 .LBE318: 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 426 .loc 1 310 0 427 000e DA68 ldr r2, [r3, #12] 428 .LVL36: 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 429 .loc 1 312 0 430 0010 DB6C ldr r3, [r3, #76] 431 0012 13F4C07F tst r3, #384 432 0016 07D1 bne .L31 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) 433 .loc 1 313 0 434 0018 002A cmp r2, #0 435 001a 05DB blt .L31 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 436 .loc 1 316 0 437 001c C36D ldr r3, [r0, #92] 438 001e 43F02003 orr r3, r3, #32 439 0022 C365 str r3, [r0, #92] 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 440 .loc 1 317 0 441 0024 0120 movs r0, #1 442 .LVL37: 443 .L43: 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 139 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl ARM GAS /tmp/ccZL5Rsh.s page 140 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 444 .loc 1 417 0 445 0026 38BD pop {r3, r4, r5, pc} 446 .LVL38: 447 .L31: 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 448 .loc 1 321 0 449 0028 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 450 002c 012B cmp r3, #1 451 002e 2FD0 beq .L42 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 452 .loc 1 321 0 is_stmt 0 discriminator 2 453 0030 0123 movs r3, #1 454 0032 80F85830 strb r3, [r0, #88] 455 0036 0446 mov r4, r0 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 456 .loc 1 324 0 is_stmt 1 discriminator 2 457 0038 FFF7FEFF bl ADC_Enable 458 .LVL39: 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 459 .loc 1 327 0 discriminator 2 460 003c 50BB cbnz r0, .L32 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 461 .loc 1 330 0 462 003e E36D ldr r3, [r4, #92] 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 463 .loc 1 352 0 464 0040 2449 ldr r1, .L48+4 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 141 465 .loc 1 330 0 466 0042 DA05 lsls r2, r3, #23 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 467 .loc 1 333 0 468 0044 49BF itett mi 469 0046 236E ldrmi r3, [r4, #96] 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 470 .loc 1 338 0 471 0048 2066 strpl r0, [r4, #96] 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 472 .loc 1 333 0 473 004a 23F00803 bicmi r3, r3, #8 474 004e 2366 strmi r3, [r4, #96] 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 475 .loc 1 344 0 476 0050 E36D ldr r3, [r4, #92] 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 477 .loc 1 352 0 478 0052 2268 ldr r2, [r4] 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 479 .loc 1 344 0 480 0054 23F44053 bic r3, r3, #12288 481 0058 23F00103 bic r3, r3, #1 482 005c 43F48053 orr r3, r3, #4096 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 483 .loc 1 352 0 484 0060 8A42 cmp r2, r1 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 485 .loc 1 344 0 486 0062 E365 str r3, [r4, #92] 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 487 .loc 1 352 0 488 0064 1AD0 beq .L47 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 489 .loc 1 356 0 490 0066 E36D ldr r3, [r4, #92] 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 491 .loc 1 362 0 492 0068 6025 movs r5, #96 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 493 .loc 1 356 0 494 006a 23F48013 bic r3, r3, #1048576 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 495 .loc 1 367 0 496 006e 0021 movs r1, #0 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 497 .loc 1 356 0 498 0070 E365 str r3, [r4, #92] 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 499 .loc 1 362 0 500 0072 1560 str r5, [r2] 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 501 .loc 1 367 0 502 0074 84F85810 strb r1, [r4, #88] 503 .L40: 504 .LVL40: 505 .LBB320: ARM GAS /tmp/ccZL5Rsh.s page 142 506 .LBB321: 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 507 .loc 2 4861 0 508 0078 D368 ldr r3, [r2, #12] 509 .LVL41: 510 .LBE321: 511 .LBE320: 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 512 .loc 1 389 0 513 007a 9B01 lsls r3, r3, #6 514 007c D3D4 bmi .L43 515 .LVL42: 516 .LBB322: 517 .LBB323: 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 518 .loc 2 7038 0 519 007e 9368 ldr r3, [r2, #8] 520 0080 23F00043 bic r3, r3, #-2147483648 521 0084 23F03F03 bic r3, r3, #63 522 0088 43F00803 orr r3, r3, #8 523 008c 9360 str r3, [r2, #8] 524 .LBE323: 525 .LBE322: 526 .loc 1 417 0 527 008e 38BD pop {r3, r4, r5, pc} 528 .LVL43: 529 .L42: 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 530 .loc 1 299 0 531 0090 0220 movs r0, #2 532 .LVL44: 533 .loc 1 417 0 534 0092 38BD pop {r3, r4, r5, pc} 535 .LVL45: 536 .L32: 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 537 .loc 1 411 0 538 0094 0023 movs r3, #0 539 0096 84F85830 strb r3, [r4, #88] 540 .loc 1 417 0 541 009a 38BD pop {r3, r4, r5, pc} 542 .LVL46: 543 .L47: 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 544 .loc 1 353 0 545 009c 15F01F05 ands r5, r5, #31 546 00a0 0CD0 beq .L37 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 547 .loc 1 384 0 548 00a2 063D subs r5, r5, #6 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 549 .loc 1 362 0 550 00a4 6021 movs r1, #96 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 551 .loc 1 367 0 552 00a6 0023 movs r3, #0 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) ARM GAS /tmp/ccZL5Rsh.s page 143 553 .loc 1 384 0 554 00a8 012D cmp r5, #1 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 555 .loc 1 362 0 556 00aa 1160 str r1, [r2] 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 557 .loc 1 367 0 558 00ac 84F85830 strb r3, [r4, #88] 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 559 .loc 1 384 0 560 00b0 E2D9 bls .L40 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 561 .loc 1 397 0 562 00b2 E36D ldr r3, [r4, #92] 563 00b4 43F48013 orr r3, r3, #1048576 564 00b8 E365 str r3, [r4, #92] 565 .loc 1 417 0 566 00ba 38BD pop {r3, r4, r5, pc} 567 .LVL47: 568 .L37: 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 569 .loc 1 356 0 570 00bc E36D ldr r3, [r4, #92] 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 571 .loc 1 362 0 572 00be 6021 movs r1, #96 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 573 .loc 1 356 0 574 00c0 23F48013 bic r3, r3, #1048576 575 00c4 E365 str r3, [r4, #92] 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 576 .loc 1 362 0 577 00c6 1160 str r1, [r2] 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 578 .loc 1 367 0 579 00c8 84F85850 strb r5, [r4, #88] 580 00cc D4E7 b .L40 581 .L49: 582 00ce 00BF .align 2 583 .L48: 584 00d0 00030050 .word 1342178048 585 00d4 00010050 .word 1342177536 586 .cfi_endproc 587 .LFE332: 589 .section .text.HAL_ADCEx_InjectedStop,"ax",%progbits 590 .align 1 591 .p2align 2,,3 592 .global HAL_ADCEx_InjectedStop 593 .syntax unified 594 .thumb 595 .thumb_func 596 .fpu fpv4-sp-d16 598 HAL_ADCEx_InjectedStop: 599 .LFB333: 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels. Disable ADC peripheral if ARM GAS /tmp/ccZL5Rsh.s page 144 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * no regular conversion is on going. 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of multimode enabled (when multimode feature is available), 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave. 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc) 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 600 .loc 1 436 0 601 .cfi_startproc 602 @ args = 0, pretend = 0, frame = 0 603 @ frame_needed = 0, uses_anonymous_args = 0 604 .LVL48: 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 605 .loc 1 443 0 606 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 607 0004 012B cmp r3, #1 608 0006 14D0 beq .L54 609 .loc 1 443 0 is_stmt 0 discriminator 2 610 0008 0123 movs r3, #1 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 611 .loc 1 436 0 is_stmt 1 discriminator 2 612 000a 10B5 push {r4, lr} 613 .LCFI12: 614 .cfi_def_cfa_offset 8 615 .cfi_offset 4, -8 616 .cfi_offset 14, -4 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 617 .loc 1 446 0 discriminator 2 618 000c 0221 movs r1, #2 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 619 .loc 1 443 0 discriminator 2 620 000e 80F85830 strb r3, [r0, #88] 621 0012 0446 mov r4, r0 622 .loc 1 446 0 discriminator 2 623 0014 FFF7FEFF bl ADC_ConversionStop 624 .LVL49: 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on regular group is on-going */ 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) ARM GAS /tmp/ccZL5Rsh.s page 145 625 .loc 1 450 0 discriminator 2 626 0018 38B9 cbnz r0, .L52 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 627 .loc 1 452 0 628 001a 2368 ldr r3, [r4] 629 .LVL50: 630 .LBB324: 631 .LBB325: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 632 .loc 2 6846 0 633 001c 9B68 ldr r3, [r3, #8] 634 .LVL51: 635 001e 5B07 lsls r3, r3, #29 636 0020 09D5 bpl .L53 637 .LVL52: 638 .LBE325: 639 .LBE324: 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 640 .loc 1 471 0 641 0022 E36D ldr r3, [r4, #92] 642 0024 23F48053 bic r3, r3, #4096 643 0028 E365 str r3, [r4, #92] 644 .L52: 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 645 .loc 1 476 0 646 002a 0023 movs r3, #0 647 002c 84F85830 strb r3, [r4, #88] 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 648 .loc 1 480 0 649 0030 10BD pop {r4, pc} 650 .LVL53: ARM GAS /tmp/ccZL5Rsh.s page 146 651 .L54: 652 .LCFI13: 653 .cfi_def_cfa_offset 0 654 .cfi_restore 4 655 .cfi_restore 14 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 656 .loc 1 443 0 657 0032 0220 movs r0, #2 658 .LVL54: 659 .loc 1 480 0 660 0034 7047 bx lr 661 .LVL55: 662 .L53: 663 .LCFI14: 664 .cfi_def_cfa_offset 8 665 .cfi_offset 4, -8 666 .cfi_offset 14, -4 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 667 .loc 1 455 0 668 0036 2046 mov r0, r4 669 .LVL56: 670 0038 FFF7FEFF bl ADC_Disable 671 .LVL57: 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 672 .loc 1 458 0 673 003c 0028 cmp r0, #0 674 003e F4D1 bne .L52 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 675 .loc 1 461 0 676 0040 E36D ldr r3, [r4, #92] 677 0042 23F48853 bic r3, r3, #4352 678 0046 23F00103 bic r3, r3, #1 679 004a 43F00103 orr r3, r3, #1 680 004e E365 str r3, [r4, #92] 681 0050 EBE7 b .L52 682 .cfi_endproc 683 .LFE333: 685 0052 00BF .section .text.HAL_ADCEx_InjectedPollForConversion,"ax",%progbits 686 .align 1 687 .p2align 2,,3 688 .global HAL_ADCEx_InjectedPollForConversion 689 .syntax unified 690 .thumb 691 .thumb_func 692 .fpu fpv4-sp-d16 694 HAL_ADCEx_InjectedPollForConversion: 695 .LFB334: 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Wait for injected group conversion to be completed. 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Timeout Timeout value in millisecond. 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * checked and cleared depending on AUTDLY bit status. 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) ARM GAS /tmp/ccZL5Rsh.s page 147 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 696 .loc 1 491 0 697 .cfi_startproc 698 @ args = 0, pretend = 0, frame = 0 699 @ frame_needed = 0, uses_anonymous_args = 0 700 .LVL58: 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_Flag_End; 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start; 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_reg_is_trigger_source_sw_start; 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_cfgr; 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_TypeDef *tmpADC_Master; 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If end of sequence selected */ 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) 701 .loc 1 506 0 702 0000 8369 ldr r3, [r0, #24] 703 .LBB326: 704 .LBB327: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 705 .loc 2 6387 0 706 0002 374A ldr r2, .L101 707 .LBE327: 708 .LBE326: 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 709 .loc 1 491 0 710 0004 2DE9F041 push {r4, r5, r6, r7, r8, lr} 711 .LCFI15: 712 .cfi_def_cfa_offset 24 713 .cfi_offset 4, -24 714 .cfi_offset 5, -20 715 .cfi_offset 6, -16 716 .cfi_offset 7, -12 717 .cfi_offset 8, -8 718 .cfi_offset 14, -4 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOS; 719 .loc 1 508 0 720 0008 082B cmp r3, #8 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 721 .loc 1 491 0 722 000a 0546 mov r5, r0 723 .LBB329: 724 .LBB328: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 725 .loc 2 6387 0 726 000c 9768 ldr r7, [r2, #8] 727 .LVL59: 728 .LBE328: 729 .LBE329: 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; ARM GAS /tmp/ccZL5Rsh.s page 148 730 .loc 1 491 0 731 000e 0E46 mov r6, r1 732 .loc 1 508 0 733 0010 14BF ite ne 734 0012 2024 movne r4, #32 735 0014 4024 moveq r4, #64 736 .LVL60: 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* end of conversion selected */ 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOC; 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get timeout */ 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 737 .loc 1 516 0 738 0016 FFF7FEFF bl HAL_GetTick 739 .LVL61: 740 001a 2A68 ldr r2, [r5] 741 001c 8046 mov r8, r0 742 .LVL62: 743 .L61: 744 001e 701C adds r0, r6, #1 745 0020 2ED1 bne .L66 746 .L67: 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait until End of Conversion or Sequence flag is raised */ 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 747 .loc 1 519 0 748 0022 1368 ldr r3, [r2] 749 0024 1C42 tst r4, r3 750 0026 FCD0 beq .L67 751 .L68: 752 .LVL63: 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if timeout is disabled (set to infinite wait) */ 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (Timeout != HAL_MAX_DELAY) 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to timeout */ 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_TIMEOUT; 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Retrieve ADC configuration */ 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance); ARM GAS /tmp/ccZL5Rsh.s page 149 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance); 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* in function of multimode state (for devices with multimode */ 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* available). */ 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 753 .loc 1 548 0 754 0028 2E48 ldr r0, .L101+4 755 .LBB330: 756 .LBB331: 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 757 .loc 2 4537 0 758 002a D16C ldr r1, [r2, #76] 759 .LBE331: 760 .LBE330: 761 .LBB333: 762 .LBB334: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 763 .loc 2 3750 0 764 002c D668 ldr r6, [r2, #12] 765 .LVL64: 766 .LBE334: 767 .LBE333: 768 .loc 1 548 0 769 002e 8242 cmp r2, r0 770 .LBB336: 771 .LBB332: 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 772 .loc 2 4537 0 773 0030 01F4C071 and r1, r1, #384 774 .LVL65: 775 .LBE332: 776 .LBE336: 777 .LBB337: 778 .LBB335: 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 779 .loc 2 3750 0 780 0034 06F44066 and r6, r6, #3072 781 .LBE335: 782 .LBE337: 783 .loc 1 548 0 784 0038 37D0 beq .L97 785 .L70: 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 786 .loc 1 554 0 787 003a D368 ldr r3, [r2, #12] 788 .LVL66: 789 .L73: 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); ARM GAS /tmp/ccZL5Rsh.s page 150 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 790 .loc 1 566 0 791 003c E86D ldr r0, [r5, #92] 792 003e 40F40050 orr r0, r0, #8192 793 0042 E865 str r0, [r5, #92] 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Determine whether any further conversion upcoming on group injected */ 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by external trigger or by automatic injected conversion */ 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from group regular. */ 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) || 794 .loc 1 571 0 795 0044 59B1 cbz r1, .L74 796 .loc 1 571 0 is_stmt 0 discriminator 1 797 0046 9901 lsls r1, r3, #6 798 0048 00D4 bmi .L76 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) && 799 .loc 1 572 0 is_stmt 1 800 004a 36B1 cbz r6, .L98 801 .L76: 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL)))) 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check whether end of sequence is reached */ 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Particular case if injected contexts queue is enabled: */ 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* when the last context has been fully processed, JSQR is reset */ 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by the hardware. Even if no injected conversion is planned to come */ 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (queue empty, triggers are ignored), it can start again */ 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* immediately after setting a new context (JADSTART is still set). */ 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Therefore, state of HAL ADC injected group is kept to busy. */ 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL) 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL) 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear polled flag */ 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_Flag_End == ADC_FLAG_JEOS) 802 .loc 1 599 0 803 004c 402C cmp r4, #64 804 004e 3CD0 beq .L99 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 151 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear end of sequence JEOS flag of injected group if low power feature */ 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */ 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For injected groups, no new conversion will start before JEOS is */ 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* cleared. */ 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 805 .loc 1 612 0 806 0050 2023 movs r3, #32 807 .LVL67: 808 0052 1360 str r3, [r2] 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return API HAL status */ 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_OK; 809 .loc 1 616 0 810 0054 0020 movs r0, #0 811 .L93: 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 812 .loc 1 617 0 813 0056 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 814 .LVL68: 815 .L98: 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL)))) 816 .loc 1 573 0 817 005a 9F04 lsls r7, r3, #18 818 005c F6D4 bmi .L76 819 .L74: 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 820 .loc 1 577 0 821 005e 1168 ldr r1, [r2] 822 0060 4E06 lsls r6, r1, #25 823 0062 F3D5 bpl .L76 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 824 .loc 1 585 0 825 0064 9802 lsls r0, r3, #10 826 0066 F1D4 bmi .L76 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 827 .loc 1 588 0 828 0068 E96D ldr r1, [r5, #92] 829 006a 21F48051 bic r1, r1, #4096 830 006e E965 str r1, [r5, #92] 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 831 .loc 1 590 0 832 0070 E96D ldr r1, [r5, #92] 833 0072 C905 lsls r1, r1, #23 834 0074 EAD4 bmi .L76 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 835 .loc 1 592 0 836 0076 E96D ldr r1, [r5, #92] 837 0078 41F00101 orr r1, r1, #1 838 007c E965 str r1, [r5, #92] ARM GAS /tmp/ccZL5Rsh.s page 152 839 007e E5E7 b .L76 840 .LVL69: 841 .L66: 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 842 .loc 1 519 0 843 0080 1368 ldr r3, [r2] 844 0082 2342 tst r3, r4 845 0084 D0D1 bne .L68 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 846 .loc 1 524 0 847 0086 FFF7FEFF bl HAL_GetTick 848 .LVL70: 849 008a A0EB0800 sub r0, r0, r8 850 008e B042 cmp r0, r6 851 0090 2A68 ldr r2, [r5] 852 0092 14D9 bls .L62 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 853 .loc 1 527 0 854 0094 1368 ldr r3, [r2] 855 0096 2340 ands r3, r3, r4 856 0098 C1D1 bne .L61 857 .L100: 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 858 .loc 1 530 0 859 009a EA6D ldr r2, [r5, #92] 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 860 .loc 1 533 0 861 009c 85F85830 strb r3, [r5, #88] 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 862 .loc 1 530 0 863 00a0 42F00402 orr r2, r2, #4 864 00a4 EA65 str r2, [r5, #92] 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 865 .loc 1 535 0 866 00a6 0320 movs r0, #3 867 00a8 D5E7 b .L93 868 .LVL71: 869 .L97: 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 870 .loc 1 549 0 871 00aa 17F01F07 ands r7, r7, #31 872 00ae C4D0 beq .L70 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 873 .loc 1 550 0 874 00b0 063F subs r7, r7, #6 875 00b2 012F cmp r7, #1 876 00b4 C1D9 bls .L70 877 .LVL72: 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 878 .loc 1 559 0 discriminator 4 879 00b6 4FF0A043 mov r3, #1342177280 880 00ba DB68 ldr r3, [r3, #12] 881 .LVL73: 882 00bc BEE7 b .L73 883 .LVL74: 884 .L62: 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 153 885 .loc 1 524 0 discriminator 1 886 00be 002E cmp r6, #0 887 00c0 ADD1 bne .L61 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 888 .loc 1 527 0 889 00c2 1368 ldr r3, [r2] 890 00c4 2340 ands r3, r3, r4 891 00c6 AAD1 bne .L61 892 00c8 E7E7 b .L100 893 .LVL75: 894 .L99: 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 895 .loc 1 605 0 896 00ca 13F48040 ands r0, r3, #16384 897 00ce 03D1 bne .L81 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 898 .loc 1 607 0 899 00d0 6023 movs r3, #96 900 .LVL76: 901 00d2 1360 str r3, [r2] 902 .loc 1 617 0 903 00d4 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 904 .LVL77: 905 .L81: 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 906 .loc 1 616 0 907 00d8 0020 movs r0, #0 908 .loc 1 617 0 909 00da BDE8F081 pop {r4, r5, r6, r7, r8, pc} 910 .LVL78: 911 .L102: 912 00de 00BF .align 2 913 .L101: 914 00e0 00030050 .word 1342178048 915 00e4 00010050 .word 1342177536 916 .cfi_endproc 917 .LFE334: 919 .section .text.HAL_ADCEx_InjectedStart_IT,"ax",%progbits 920 .align 1 921 .p2align 2,,3 922 .global HAL_ADCEx_InjectedStart_IT 923 .syntax unified 924 .thumb 925 .thumb_func 926 .fpu fpv4-sp-d16 928 HAL_ADCEx_InjectedStart_IT: 929 .LFB335: 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group with interruption. 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function according to initialization 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * setting : JEOC (end of conversion) or JEOS (end of sequence) 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is enabled): 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first, 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. ARM GAS /tmp/ccZL5Rsh.s page 154 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc) 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 930 .loc 1 632 0 931 .cfi_startproc 932 @ args = 0, pretend = 0, frame = 0 933 @ frame_needed = 0, uses_anonymous_args = 0 934 .LVL79: 935 0000 38B5 push {r3, r4, r5, lr} 936 .LCFI16: 937 .cfi_def_cfa_offset 16 938 .cfi_offset 3, -16 939 .cfi_offset 4, -12 940 .cfi_offset 5, -8 941 .cfi_offset 14, -4 942 .LBB338: 943 .LBB339: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 944 .loc 2 6387 0 945 0002 3D4A ldr r2, .L137 946 .LBE339: 947 .LBE338: 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 948 .loc 1 642 0 949 0004 0368 ldr r3, [r0] 950 .LBB342: 951 .LBB340: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 952 .loc 2 6387 0 953 0006 9568 ldr r5, [r2, #8] 954 .LVL80: 955 .LBE340: 956 .LBE342: 957 .LBB343: 958 .LBB344: 959 .loc 2 7071 0 960 0008 9A68 ldr r2, [r3, #8] 961 000a 1207 lsls r2, r2, #28 962 000c 58D4 bmi .L121 963 .LVL81: 964 .LBE344: 965 .LBE343: 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else ARM GAS /tmp/ccZL5Rsh.s page 155 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 966 .loc 1 655 0 967 000e DA68 ldr r2, [r3, #12] 968 .LVL82: 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 969 .loc 1 657 0 970 0010 DB6C ldr r3, [r3, #76] 971 0012 13F4C07F tst r3, #384 972 0016 07D1 bne .L105 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) 973 .loc 1 658 0 974 0018 002A cmp r2, #0 975 001a 05DB blt .L105 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 976 .loc 1 661 0 977 001c C36D ldr r3, [r0, #92] 978 001e 43F02003 orr r3, r3, #32 979 0022 C365 str r3, [r0, #92] 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 980 .loc 1 662 0 981 0024 0120 movs r0, #1 982 .LVL83: 983 .L122: 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccZL5Rsh.s page 156 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC Injected context queue overflow interrupt if this feature */ 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is enabled. */ 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL) 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF); 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC end of conversion interrupt */ 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (hadc->Init.EOCSelection) 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_EOC_SEQ_CONV: 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */ 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ ARM GAS /tmp/ccZL5Rsh.s page 157 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 984 .loc 1 783 0 985 0026 38BD pop {r3, r4, r5, pc} 986 .LVL84: 987 .L105: 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 988 .loc 1 666 0 989 0028 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 990 002c 012B cmp r3, #1 991 002e 47D0 beq .L121 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 992 .loc 1 666 0 is_stmt 0 discriminator 2 993 0030 0123 movs r3, #1 994 0032 80F85830 strb r3, [r0, #88] 995 0036 0446 mov r4, r0 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 996 .loc 1 669 0 is_stmt 1 discriminator 2 ARM GAS /tmp/ccZL5Rsh.s page 158 997 0038 FFF7FEFF bl ADC_Enable 998 .LVL85: 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 999 .loc 1 672 0 discriminator 2 1000 003c 0028 cmp r0, #0 1001 003e 41D1 bne .L106 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1002 .loc 1 675 0 1003 0040 E36D ldr r3, [r4, #92] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1004 .loc 1 697 0 1005 0042 2E49 ldr r1, .L137+4 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1006 .loc 1 675 0 1007 0044 DB05 lsls r3, r3, #23 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1008 .loc 1 678 0 1009 0046 49BF itett mi 1010 0048 236E ldrmi r3, [r4, #96] 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1011 .loc 1 683 0 1012 004a 2066 strpl r0, [r4, #96] 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1013 .loc 1 678 0 1014 004c 23F00803 bicmi r3, r3, #8 1015 0050 2366 strmi r3, [r4, #96] 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 1016 .loc 1 689 0 1017 0052 E26D ldr r2, [r4, #92] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1018 .loc 1 697 0 1019 0054 2368 ldr r3, [r4] 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 1020 .loc 1 689 0 1021 0056 22F44052 bic r2, r2, #12288 1022 005a 22F00102 bic r2, r2, #1 1023 005e 42F48052 orr r2, r2, #4096 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1024 .loc 1 697 0 1025 0062 8B42 cmp r3, r1 1026 .LBB345: 1027 .LBB341: 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1028 .loc 2 6387 0 1029 0064 05F01F05 and r5, r5, #31 1030 .LBE341: 1031 .LBE345: 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 1032 .loc 1 689 0 1033 0068 E265 str r2, [r4, #92] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1034 .loc 1 697 0 1035 006a 2FD0 beq .L109 1036 .L117: 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1037 .loc 1 701 0 1038 006c E26D ldr r2, [r4, #92] ARM GAS /tmp/ccZL5Rsh.s page 159 1039 006e 22F48012 bic r2, r2, #1048576 1040 0072 E265 str r2, [r4, #92] 1041 .L118: 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1042 .loc 1 707 0 1043 0074 6022 movs r2, #96 1044 0076 1A60 str r2, [r3] 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1045 .loc 1 716 0 1046 0078 DA68 ldr r2, [r3, #12] 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1047 .loc 1 712 0 1048 007a 0021 movs r1, #0 1049 007c 84F85810 strb r1, [r4, #88] 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1050 .loc 1 716 0 1051 0080 9102 lsls r1, r2, #10 1052 0082 03D5 bpl .L110 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1053 .loc 1 718 0 1054 0084 5A68 ldr r2, [r3, #4] 1055 0086 42F48062 orr r2, r2, #1024 1056 008a 5A60 str r2, [r3, #4] 1057 .L110: 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1058 .loc 1 722 0 1059 008c A269 ldr r2, [r4, #24] 1060 008e 082A cmp r2, #8 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1061 .loc 1 725 0 1062 0090 5A68 ldr r2, [r3, #4] 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1063 .loc 1 722 0 1064 0092 28D1 bne .L132 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1065 .loc 1 725 0 1066 0094 22F02002 bic r2, r2, #32 1067 0098 5A60 str r2, [r3, #4] 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1068 .loc 1 726 0 1069 009a 5A68 ldr r2, [r3, #4] 1070 009c 42F04002 orr r2, r2, #64 1071 00a0 5A60 str r2, [r3, #4] 1072 .L113: 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1073 .loc 1 748 0 1074 00a2 164A ldr r2, .L137+4 1075 00a4 9342 cmp r3, r2 1076 00a6 14D0 beq .L136 1077 .L114: 1078 .LVL86: 1079 .LBB346: 1080 .LBB347: 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1081 .loc 2 4861 0 1082 00a8 DA68 ldr r2, [r3, #12] 1083 .LVL87: ARM GAS /tmp/ccZL5Rsh.s page 160 1084 .LBE347: 1085 .LBE346: 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1086 .loc 1 755 0 1087 00aa 9201 lsls r2, r2, #6 1088 00ac BBD4 bmi .L122 1089 .LVL88: 1090 .LBB348: 1091 .LBB349: 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1092 .loc 2 7038 0 1093 00ae 9A68 ldr r2, [r3, #8] 1094 00b0 22F00042 bic r2, r2, #-2147483648 1095 00b4 22F03F02 bic r2, r2, #63 1096 00b8 42F00802 orr r2, r2, #8 1097 00bc 9A60 str r2, [r3, #8] 1098 .LBE349: 1099 .LBE348: 1100 .loc 1 783 0 1101 00be 38BD pop {r3, r4, r5, pc} 1102 .LVL89: 1103 .L121: 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1104 .loc 1 644 0 1105 00c0 0220 movs r0, #2 1106 .LVL90: 1107 .loc 1 783 0 1108 00c2 38BD pop {r3, r4, r5, pc} 1109 .LVL91: 1110 .L106: 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1111 .loc 1 777 0 1112 00c4 0023 movs r3, #0 1113 00c6 84F85830 strb r3, [r4, #88] 1114 .loc 1 783 0 1115 00ca 38BD pop {r3, r4, r5, pc} 1116 .LVL92: 1117 .L109: 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1118 .loc 1 698 0 1119 00cc 002D cmp r5, #0 1120 00ce CDD0 beq .L117 1121 00d0 D0E7 b .L118 1122 .L136: 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 1123 .loc 1 749 0 1124 00d2 002D cmp r5, #0 1125 00d4 E8D0 beq .L114 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 1126 .loc 1 750 0 1127 00d6 063D subs r5, r5, #6 1128 00d8 012D cmp r5, #1 1129 00da E5D9 bls .L114 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1130 .loc 1 763 0 1131 00dc E36D ldr r3, [r4, #92] 1132 00de 43F48013 orr r3, r3, #1048576 ARM GAS /tmp/ccZL5Rsh.s page 161 1133 00e2 E365 str r3, [r4, #92] 1134 .loc 1 783 0 1135 00e4 38BD pop {r3, r4, r5, pc} 1136 .LVL93: 1137 .L132: 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1138 .loc 1 730 0 1139 00e6 22F04002 bic r2, r2, #64 1140 00ea 5A60 str r2, [r3, #4] 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1141 .loc 1 731 0 1142 00ec 5A68 ldr r2, [r3, #4] 1143 00ee 42F02002 orr r2, r2, #32 1144 00f2 5A60 str r2, [r3, #4] 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1145 .loc 1 732 0 1146 00f4 D5E7 b .L113 1147 .L138: 1148 00f6 00BF .align 2 1149 .L137: 1150 00f8 00030050 .word 1342178048 1151 00fc 00010050 .word 1342177536 1152 .cfi_endproc 1153 .LFE335: 1155 .section .text.HAL_ADCEx_InjectedStop_IT,"ax",%progbits 1156 .align 1 1157 .p2align 2,,3 1158 .global HAL_ADCEx_InjectedStop_IT 1159 .syntax unified 1160 .thumb 1161 .thumb_func 1162 .fpu fpv4-sp-d16 1164 HAL_ADCEx_InjectedStop_IT: 1165 .LFB336: 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels, disable interruption of 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * end-of-conversion. Disable ADC peripheral if no regular conversion 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * is on going. 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is available): 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first, 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC slave. 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of auto-injection mode, HAL_ADC_Stop() must be used. 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc) 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1166 .loc 1 805 0 ARM GAS /tmp/ccZL5Rsh.s page 162 1167 .cfi_startproc 1168 @ args = 0, pretend = 0, frame = 0 1169 @ frame_needed = 0, uses_anonymous_args = 0 1170 .LVL94: 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1171 .loc 1 812 0 1172 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1173 0004 012B cmp r3, #1 1174 0006 18D0 beq .L143 1175 .loc 1 812 0 is_stmt 0 discriminator 2 1176 0008 0123 movs r3, #1 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1177 .loc 1 805 0 is_stmt 1 discriminator 2 1178 000a 10B5 push {r4, lr} 1179 .LCFI17: 1180 .cfi_def_cfa_offset 8 1181 .cfi_offset 4, -8 1182 .cfi_offset 14, -4 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 1183 .loc 1 815 0 discriminator 2 1184 000c 0221 movs r1, #2 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1185 .loc 1 812 0 discriminator 2 1186 000e 80F85830 strb r3, [r0, #88] 1187 0012 0446 mov r4, r0 1188 .loc 1 815 0 discriminator 2 1189 0014 FFF7FEFF bl ADC_ConversionStop 1190 .LVL95: 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on the other group (regular group) is intended to */ 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* continue. */ 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1191 .loc 1 820 0 discriminator 2 1192 0018 58B9 cbnz r0, .L141 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC end of conversion interrupt for injected channels */ 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF)); 1193 .loc 1 823 0 1194 001a 2368 ldr r3, [r4] 1195 001c 5A68 ldr r2, [r3, #4] 1196 001e 22F48C62 bic r2, r2, #1120 1197 0022 5A60 str r2, [r3, #4] 1198 .LVL96: 1199 .LBB350: 1200 .LBB351: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1201 .loc 2 6846 0 1202 0024 9B68 ldr r3, [r3, #8] ARM GAS /tmp/ccZL5Rsh.s page 163 1203 .LVL97: 1204 0026 5B07 lsls r3, r3, #29 1205 0028 09D5 bpl .L142 1206 .LVL98: 1207 .LBE351: 1208 .LBE350: 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1209 .loc 1 844 0 1210 002a E36D ldr r3, [r4, #92] 1211 002c 23F48053 bic r3, r3, #4096 1212 0030 E365 str r3, [r4, #92] 1213 .L141: 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1214 .loc 1 849 0 1215 0032 0023 movs r3, #0 1216 0034 84F85830 strb r3, [r4, #88] 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1217 .loc 1 853 0 1218 0038 10BD pop {r4, pc} 1219 .LVL99: 1220 .L143: 1221 .LCFI18: 1222 .cfi_def_cfa_offset 0 1223 .cfi_restore 4 1224 .cfi_restore 14 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1225 .loc 1 812 0 1226 003a 0220 movs r0, #2 1227 .LVL100: 1228 .loc 1 853 0 ARM GAS /tmp/ccZL5Rsh.s page 164 1229 003c 7047 bx lr 1230 .LVL101: 1231 .L142: 1232 .LCFI19: 1233 .cfi_def_cfa_offset 8 1234 .cfi_offset 4, -8 1235 .cfi_offset 14, -4 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1236 .loc 1 828 0 1237 003e 2046 mov r0, r4 1238 .LVL102: 1239 0040 FFF7FEFF bl ADC_Disable 1240 .LVL103: 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1241 .loc 1 831 0 1242 0044 0028 cmp r0, #0 1243 0046 F4D1 bne .L141 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1244 .loc 1 834 0 1245 0048 E36D ldr r3, [r4, #92] 1246 004a 23F48853 bic r3, r3, #4352 1247 004e 23F00103 bic r3, r3, #1 1248 0052 43F00103 orr r3, r3, #1 1249 0056 E365 str r3, [r4, #92] 1250 0058 EBE7 b .L141 1251 .cfi_endproc 1252 .LFE336: 1254 005a 00BF .section .text.HAL_ADCEx_MultiModeStart_DMA,"ax",%progbits 1255 .align 1 1256 .p2align 2,,3 1257 .global HAL_ADCEx_MultiModeStart_DMA 1258 .syntax unified 1259 .thumb 1260 .thumb_func 1261 .fpu fpv4-sp-d16 1263 HAL_ADCEx_MultiModeStart_DMA: 1264 .LFB337: 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA. 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode must have been previously configured using 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_MultiModeConfigChannel() function. 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Interruptions enabled in this function: 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * overrun, DMA half transfer, DMA transfer complete. 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Each of these interruptions has its dedicated callback function. 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note State field of Slave ADC handle is not updated in this configuration: 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * user should not rely on it for information related to Slave regular 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversions. 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param pData Destination Buffer address. 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes). 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t L 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1265 .loc 1 872 0 ARM GAS /tmp/ccZL5Rsh.s page 165 1266 .cfi_startproc 1267 @ args = 0, pretend = 0, frame = 112 1268 @ frame_needed = 0, uses_anonymous_args = 0 1269 .LVL104: 1270 0000 F0B5 push {r4, r5, r6, r7, lr} 1271 .LCFI20: 1272 .cfi_def_cfa_offset 20 1273 .cfi_offset 4, -20 1274 .cfi_offset 5, -16 1275 .cfi_offset 6, -12 1276 .cfi_offset 7, -8 1277 .cfi_offset 14, -4 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) 1278 .loc 1 883 0 1279 0002 0668 ldr r6, [r0] 1280 .LVL105: 1281 .LBB352: 1282 .LBB353: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1283 .loc 2 6846 0 1284 0004 B568 ldr r5, [r6, #8] 1285 0006 15F00405 ands r5, r5, #4 1286 .LBE353: 1287 .LBE352: 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1288 .loc 1 872 0 1289 000a 9DB0 sub sp, sp, #116 1290 .LCFI21: 1291 .cfi_def_cfa_offset 136 1292 .LBB355: 1293 .LBB354: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1294 .loc 2 6846 0 1295 000c 21D1 bne .L154 1296 .LBE354: 1297 .LBE355: 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1298 .loc 1 890 0 1299 000e 90F85870 ldrb r7, [r0, #88] @ zero_extendqisi2 1300 0012 012F cmp r7, #1 1301 0014 0446 mov r4, r0 ARM GAS /tmp/ccZL5Rsh.s page 166 1302 .LVL106: 1303 0016 1CD0 beq .L154 1304 .loc 1 890 0 is_stmt 0 discriminator 2 1305 0018 0127 movs r7, #1 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 1306 .loc 1 897 0 is_stmt 1 discriminator 2 1307 001a B6F1A04F cmp r6, #1342177280 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1308 .loc 1 893 0 discriminator 2 1309 001e 1895 str r5, [sp, #96] 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1310 .loc 1 890 0 discriminator 2 1311 0020 80F85870 strb r7, [r0, #88] 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1312 .loc 1 894 0 discriminator 2 1313 0024 1995 str r5, [sp, #100] 1314 .loc 1 897 0 discriminator 2 1315 0026 08D0 beq .L150 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1316 .loc 1 902 0 1317 0028 C36D ldr r3, [r0, #92] 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1318 .loc 1 905 0 1319 002a 80F85850 strb r5, [r0, #88] 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1320 .loc 1 902 0 1321 002e 43F02003 orr r3, r3, #32 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1322 .loc 1 907 0 1323 0032 3846 mov r0, r7 1324 .LVL107: 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1325 .loc 1 902 0 1326 0034 E365 str r3, [r4, #92] 1327 .LVL108: 1328 .L155: 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripherals: master and slave (in case if not already */ 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enabled previously) */ 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(&tmphadcSlave); ARM GAS /tmp/ccZL5Rsh.s page 167 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start multimode conversion of ADCs pair */ 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY); 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA transfer complete callback */ 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA half transfer complete callback */ 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA error callback */ 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* start (in case of SW start): */ 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear regular group conversion flag and overrun flag */ 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC overrun interrupt */ 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start the DMA channel */ 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t) 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of regular group. */ 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group regular conversion */ 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance); 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ ARM GAS /tmp/ccZL5Rsh.s page 168 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1329 .loc 1 975 0 1330 0036 1DB0 add sp, sp, #116 1331 .LCFI22: 1332 .cfi_remember_state 1333 .cfi_def_cfa_offset 20 1334 @ sp needed 1335 0038 F0BD pop {r4, r5, r6, r7, pc} 1336 .LVL109: 1337 .L150: 1338 .LCFI23: 1339 .cfi_restore_state 1340 003a 1F4B ldr r3, .L158 1341 003c 0193 str r3, [sp, #4] 1342 003e 1646 mov r6, r2 1343 0040 0D46 mov r5, r1 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1344 .loc 1 912 0 1345 0042 FFF7FEFF bl ADC_Enable 1346 .LVL110: 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1347 .loc 1 913 0 1348 0046 38B1 cbz r0, .L157 1349 .L151: 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1350 .loc 1 969 0 1351 0048 0023 movs r3, #0 1352 004a 84F85830 strb r3, [r4, #88] 1353 .loc 1 975 0 1354 004e 1DB0 add sp, sp, #116 1355 .LCFI24: 1356 .cfi_remember_state 1357 .cfi_def_cfa_offset 20 1358 @ sp needed 1359 0050 F0BD pop {r4, r5, r6, r7, pc} 1360 .LVL111: 1361 .L154: 1362 .LCFI25: 1363 .cfi_restore_state 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1364 .loc 1 885 0 1365 0052 0220 movs r0, #2 1366 .LVL112: 1367 .loc 1 975 0 1368 0054 1DB0 add sp, sp, #116 1369 .LCFI26: 1370 .cfi_remember_state 1371 .cfi_def_cfa_offset 20 1372 @ sp needed 1373 0056 F0BD pop {r4, r5, r6, r7, pc} 1374 .LVL113: 1375 .L157: 1376 .LCFI27: 1377 .cfi_restore_state 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccZL5Rsh.s page 169 1378 .loc 1 915 0 1379 0058 01A8 add r0, sp, #4 1380 .LVL114: 1381 005a FFF7FEFF bl ADC_Enable 1382 .LVL115: 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1383 .loc 1 919 0 1384 005e 0028 cmp r0, #0 1385 0060 F2D1 bne .L151 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 1386 .loc 1 922 0 1387 0062 E36D ldr r3, [r4, #92] 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1388 .loc 1 930 0 1389 0064 616D ldr r1, [r4, #84] 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1390 .loc 1 946 0 1391 0066 2768 ldr r7, [r4] 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1392 .loc 1 930 0 1393 0068 144A ldr r2, .L158+4 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 1394 .loc 1 922 0 1395 006a 23F47063 bic r3, r3, #3840 1396 006e 23F00103 bic r3, r3, #1 1397 0072 43F48073 orr r3, r3, #256 1398 0076 E365 str r3, [r4, #92] 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1399 .loc 1 933 0 1400 0078 114B ldr r3, .L158+8 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1401 .loc 1 927 0 1402 007a 2066 str r0, [r4, #96] 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1403 .loc 1 930 0 1404 007c CA62 str r2, [r1, #44] 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1405 .loc 1 933 0 1406 007e 0B63 str r3, [r1, #48] 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1407 .loc 1 936 0 1408 0080 104A ldr r2, .L158+12 1409 0082 4A63 str r2, [r1, #52] 1410 .LVL116: 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1411 .loc 1 946 0 1412 0084 1C23 movs r3, #28 1413 0086 3B60 str r3, [r7] 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1414 .loc 1 954 0 1415 0088 7B68 ldr r3, [r7, #4] 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1416 .loc 1 951 0 1417 008a 84F85800 strb r0, [r4, #88] 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1418 .loc 1 954 0 1419 008e 43F0100C orr ip, r3, #16 ARM GAS /tmp/ccZL5Rsh.s page 170 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1420 .loc 1 957 0 1421 0092 2A46 mov r2, r5 1422 0094 3346 mov r3, r6 1423 0096 0846 mov r0, r1 1424 .LVL117: 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1425 .loc 1 954 0 1426 0098 C7F804C0 str ip, [r7, #4] 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1427 .loc 1 957 0 1428 009c 0A49 ldr r1, .L158+16 1429 009e FFF7FEFF bl HAL_DMA_Start_IT 1430 .LVL118: 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1431 .loc 1 964 0 1432 00a2 2268 ldr r2, [r4] 1433 .LVL119: 1434 .LBB356: 1435 .LBB357: 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1436 .loc 2 6813 0 1437 00a4 9368 ldr r3, [r2, #8] 1438 00a6 23F00043 bic r3, r3, #-2147483648 1439 00aa 23F03F03 bic r3, r3, #63 1440 00ae 43F00403 orr r3, r3, #4 1441 00b2 9360 str r3, [r2, #8] 1442 00b4 BFE7 b .L155 1443 .L159: 1444 00b6 00BF .align 2 1445 .L158: 1446 00b8 00010050 .word 1342177536 1447 00bc 00000000 .word ADC_DMAConvCplt 1448 00c0 00000000 .word ADC_DMAHalfConvCplt 1449 00c4 00000000 .word ADC_DMAError 1450 00c8 0C030050 .word 1342178060 1451 .LBE357: 1452 .LBE356: 1453 .cfi_endproc 1454 .LFE337: 1456 .section .text.HAL_ADCEx_MultiModeStop_DMA,"ax",%progbits 1457 .align 1 1458 .p2align 2,,3 1459 .global HAL_ADCEx_MultiModeStop_DMA 1460 .syntax unified 1461 .thumb 1462 .thumb_func 1463 .fpu fpv4-sp-d16 1465 HAL_ADCEx_MultiModeStop_DMA: 1466 .LFB338: 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral. 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. MultiMode DMA bits 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can ARM GAS /tmp/ccZL5Rsh.s page 171 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_Stop_DMA() must be called after this function with handle of 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc) 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1467 .loc 1 991 0 1468 .cfi_startproc 1469 @ args = 0, pretend = 0, frame = 112 1470 @ frame_needed = 0, uses_anonymous_args = 0 1471 .LVL120: 1472 0000 70B5 push {r4, r5, r6, lr} 1473 .LCFI28: 1474 .cfi_def_cfa_offset 16 1475 .cfi_offset 4, -16 1476 .cfi_offset 5, -12 1477 .cfi_offset 6, -8 1478 .cfi_offset 14, -4 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmphadcSlave_disable_status; 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1479 .loc 1 1002 0 1480 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1481 0006 012B cmp r3, #1 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1482 .loc 1 991 0 1483 0008 9CB0 sub sp, sp, #112 1484 .LCFI29: 1485 .cfi_def_cfa_offset 128 1486 .loc 1 1002 0 1487 000a 5AD0 beq .L176 1488 .loc 1 1002 0 is_stmt 0 discriminator 2 1489 000c 0126 movs r6, #1 1490 000e 80F85860 strb r6, [r0, #88] 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular and injected groups */ 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 1491 .loc 1 1006 0 is_stmt 1 discriminator 2 1492 0012 0321 movs r1, #3 1493 0014 0446 mov r4, r0 1494 0016 FFF7FEFF bl ADC_ConversionStop 1495 .LVL121: 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) ARM GAS /tmp/ccZL5Rsh.s page 172 1496 .loc 1 1009 0 discriminator 2 1497 001a 0546 mov r5, r0 1498 001c 0028 cmp r0, #0 1499 001e 4AD1 bne .L162 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 1500 .loc 1 1016 0 1501 0020 2368 ldr r3, [r4] 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1502 .loc 1 1012 0 1503 0022 1890 str r0, [sp, #96] 1504 .loc 1 1016 0 1505 0024 B3F1A04F cmp r3, #1342177280 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1506 .loc 1 1013 0 1507 0028 1990 str r0, [sp, #100] 1508 .loc 1 1016 0 1509 002a 09D0 beq .L163 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1510 .loc 1 1021 0 1511 002c E36D ldr r3, [r4, #92] 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1512 .loc 1 1024 0 1513 002e 84F85800 strb r0, [r4, #88] 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1514 .loc 1 1026 0 1515 0032 3546 mov r5, r6 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1516 .loc 1 1021 0 1517 0034 43F02003 orr r3, r3, #32 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 173 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADC_Stop_DMA() API. */ 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_ERROR) 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave */ 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave); 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((ADC_Disable(hadc) == HAL_OK) && 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (tmphadcSlave_disable_status == HAL_OK)) 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of error, attempt to disable ADC master and slave without status assert */ 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(hadc); 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave); 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state (ADC master) */ 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, ARM GAS /tmp/ccZL5Rsh.s page 174 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1518 .loc 1 1107 0 1519 0038 2846 mov r0, r5 1520 .LVL122: 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1521 .loc 1 1021 0 1522 003a E365 str r3, [r4, #92] 1523 .loc 1 1107 0 1524 003c 1CB0 add sp, sp, #112 1525 .LCFI30: 1526 .cfi_remember_state 1527 .cfi_def_cfa_offset 16 1528 @ sp needed 1529 003e 70BD pop {r4, r5, r6, pc} 1530 .LVL123: 1531 .L163: 1532 .LCFI31: 1533 .cfi_restore_state 1534 0040 304B ldr r3, .L186 1535 0042 0193 str r3, [sp, #4] 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1536 .loc 1 1033 0 1537 0044 FFF7FEFF bl HAL_GetTick 1538 .LVL124: 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1539 .loc 1 1035 0 1540 0048 019B ldr r3, [sp, #4] 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1541 .loc 1 1036 0 1542 004a 2268 ldr r2, [r4] 1543 .LBB358: 1544 .LBB359: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1545 .loc 2 6846 0 1546 004c 9B68 ldr r3, [r3, #8] 1547 .LBE359: 1548 .LBE358: 1549 .LBB361: 1550 .LBB362: 1551 004e 9268 ldr r2, [r2, #8] 1552 0050 5207 lsls r2, r2, #29 1553 .LBE362: 1554 .LBE361: 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1555 .loc 1 1033 0 1556 0052 0546 mov r5, r0 1557 .LVL125: 1558 .LBB366: 1559 .LBB360: ARM GAS /tmp/ccZL5Rsh.s page 175 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1560 .loc 2 6846 0 1561 0054 03F00403 and r3, r3, #4 1562 .LVL126: 1563 .LBE360: 1564 .LBE366: 1565 .LBB367: 1566 .LBB363: 1567 0058 00D4 bmi .L179 1568 .LBE363: 1569 .LBE367: 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1570 .loc 1 1037 0 1571 005a 93B1 cbz r3, .L170 1572 .LVL127: 1573 .L179: 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1574 .loc 1 1040 0 1575 005c FFF7FEFF bl HAL_GetTick 1576 .LVL128: 1577 0060 401B subs r0, r0, r5 1578 0062 0528 cmp r0, #5 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1579 .loc 1 1043 0 1580 0064 019A ldr r2, [sp, #4] 1581 .LVL129: 1582 0066 2368 ldr r3, [r4] 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1583 .loc 1 1040 0 1584 0068 05D9 bls .L167 1585 .LBB368: 1586 .LBB369: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1587 .loc 2 6846 0 1588 006a 9168 ldr r1, [r2, #8] 1589 006c 4907 lsls r1, r1, #29 1590 006e 2CD4 bmi .L184 1591 .LBE369: 1592 .LBE368: 1593 .LBB370: 1594 .LBB371: 1595 0070 9968 ldr r1, [r3, #8] 1596 0072 4E07 lsls r6, r1, #29 1597 0074 2AD4 bmi .L166 1598 .L167: 1599 .LBE371: 1600 .LBE370: 1601 .LBB373: 1602 .LBB374: 1603 0076 9268 ldr r2, [r2, #8] 1604 .LBE374: 1605 .LBE373: 1606 .LBB376: 1607 .LBB364: 1608 0078 9B68 ldr r3, [r3, #8] 1609 .LBE364: 1610 .LBE376: ARM GAS /tmp/ccZL5Rsh.s page 176 1611 .LBB377: 1612 .LBB375: 1613 007a 5007 lsls r0, r2, #29 1614 007c EED4 bmi .L179 1615 .LBE375: 1616 .LBE377: 1617 .LBB378: 1618 .LBB365: 1619 007e 5907 lsls r1, r3, #29 1620 0080 ECD4 bmi .L179 1621 .LVL130: 1622 .L170: 1623 .LBE365: 1624 .LBE378: 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1625 .loc 1 1065 0 1626 0082 606D ldr r0, [r4, #84] 1627 0084 FFF7FEFF bl HAL_DMA_Abort 1628 .LVL131: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1629 .loc 1 1068 0 1630 0088 0128 cmp r0, #1 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1631 .loc 1 1065 0 1632 008a 0546 mov r5, r0 1633 .LVL132: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1634 .loc 1 1068 0 1635 008c 29D0 beq .L185 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1636 .loc 1 1075 0 1637 008e 2268 ldr r2, [r4] 1638 0090 5368 ldr r3, [r2, #4] 1639 0092 23F01003 bic r3, r3, #16 1640 0096 5360 str r3, [r2, #4] 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1641 .loc 1 1080 0 1642 0098 60BB cbnz r0, .L173 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((ADC_Disable(hadc) == HAL_OK) && 1643 .loc 1 1082 0 1644 009a 01A8 add r0, sp, #4 1645 .LVL133: 1646 009c FFF7FEFF bl ADC_Disable 1647 .LVL134: 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (tmphadcSlave_disable_status == HAL_OK)) 1648 .loc 1 1083 0 1649 00a0 2046 mov r0, r4 1650 00a2 FFF7FEFF bl ADC_Disable 1651 .LVL135: 1652 .L174: 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1653 .loc 1 1097 0 1654 00a6 E36D ldr r3, [r4, #92] 1655 00a8 23F48853 bic r3, r3, #4352 1656 00ac 23F00103 bic r3, r3, #1 1657 00b0 43F00103 orr r3, r3, #1 1658 00b4 E365 str r3, [r4, #92] ARM GAS /tmp/ccZL5Rsh.s page 177 1659 .LVL136: 1660 .L162: 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1661 .loc 1 1103 0 1662 00b6 0023 movs r3, #0 1663 .loc 1 1107 0 1664 00b8 2846 mov r0, r5 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1665 .loc 1 1103 0 1666 00ba 84F85830 strb r3, [r4, #88] 1667 .loc 1 1107 0 1668 00be 1CB0 add sp, sp, #112 1669 .LCFI32: 1670 .cfi_remember_state 1671 .cfi_def_cfa_offset 16 1672 @ sp needed 1673 00c0 70BD pop {r4, r5, r6, pc} 1674 .LVL137: 1675 .L176: 1676 .LCFI33: 1677 .cfi_restore_state 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1678 .loc 1 1002 0 1679 00c2 0225 movs r5, #2 1680 .loc 1 1107 0 1681 00c4 2846 mov r0, r5 1682 .LVL138: 1683 00c6 1CB0 add sp, sp, #112 1684 .LCFI34: 1685 .cfi_remember_state 1686 .cfi_def_cfa_offset 16 1687 @ sp needed 1688 00c8 70BD pop {r4, r5, r6, pc} 1689 .LVL139: 1690 .L184: 1691 .LCFI35: 1692 .cfi_restore_state 1693 .LBB379: 1694 .LBB372: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1695 .loc 2 6846 0 1696 00ca 9B68 ldr r3, [r3, #8] 1697 .LVL140: 1698 .L166: 1699 .LBE372: 1700 .LBE379: 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1701 .loc 1 1049 0 1702 00cc E36D ldr r3, [r4, #92] 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1703 .loc 1 1054 0 1704 00ce 0125 movs r5, #1 1705 .LVL141: 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1706 .loc 1 1052 0 1707 00d0 0022 movs r2, #0 1708 .LVL142: ARM GAS /tmp/ccZL5Rsh.s page 178 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1709 .loc 1 1049 0 1710 00d2 43F01003 orr r3, r3, #16 1711 .loc 1 1107 0 1712 00d6 2846 mov r0, r5 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1713 .loc 1 1049 0 1714 00d8 E365 str r3, [r4, #92] 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1715 .loc 1 1052 0 1716 00da 84F85820 strb r2, [r4, #88] 1717 .loc 1 1107 0 1718 00de 1CB0 add sp, sp, #112 1719 .LCFI36: 1720 .cfi_remember_state 1721 .cfi_def_cfa_offset 16 1722 @ sp needed 1723 00e0 70BD pop {r4, r5, r6, pc} 1724 .LVL143: 1725 .L185: 1726 .LCFI37: 1727 .cfi_restore_state 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1728 .loc 1 1071 0 1729 00e2 E36D ldr r3, [r4, #92] 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1730 .loc 1 1075 0 1731 00e4 2268 ldr r2, [r4] 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1732 .loc 1 1071 0 1733 00e6 43F04003 orr r3, r3, #64 1734 00ea E365 str r3, [r4, #92] 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1735 .loc 1 1075 0 1736 00ec 5368 ldr r3, [r2, #4] 1737 00ee 23F01003 bic r3, r3, #16 1738 00f2 5360 str r3, [r2, #4] 1739 .L173: 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave); 1740 .loc 1 1092 0 1741 00f4 2046 mov r0, r4 1742 .LVL144: 1743 00f6 FFF7FEFF bl ADC_Disable 1744 .LVL145: 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1745 .loc 1 1093 0 1746 00fa 01A8 add r0, sp, #4 1747 00fc FFF7FEFF bl ADC_Disable 1748 .LVL146: 1749 0100 D1E7 b .L174 1750 .L187: 1751 0102 00BF .align 2 1752 .L186: 1753 0104 00010050 .word 1342177536 1754 .cfi_endproc 1755 .LFE338: 1757 .section .text.HAL_ADCEx_MultiModeGetValue,"ax",%progbits ARM GAS /tmp/ccZL5Rsh.s page 179 1758 .align 1 1759 .p2align 2,,3 1760 .global HAL_ADCEx_MultiModeGetValue 1761 .syntax unified 1762 .thumb 1763 .thumb_func 1764 .fpu fpv4-sp-d16 1766 HAL_ADCEx_MultiModeGetValue: 1767 .LFB339: 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Return the last ADC Master and Slave regular conversions results when in multimode conf 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used) 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval The converted data values. 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc) 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1768 .loc 1 1115 0 1769 .cfi_startproc 1770 @ args = 0, pretend = 0, frame = 0 1771 @ frame_needed = 0, uses_anonymous_args = 0 1772 @ link register save eliminated. 1773 .LVL147: 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_Common_TypeDef *tmpADC_Common; 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning if no assert_param check */ 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */ 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the multi mode conversion value */ 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmpADC_Common->CDR; 1774 .loc 1 1129 0 1775 0000 014B ldr r3, .L189 1776 0002 D868 ldr r0, [r3, #12] 1777 .LVL148: 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1778 .loc 1 1130 0 1779 0004 7047 bx lr 1780 .L190: 1781 0006 00BF .align 2 1782 .L189: 1783 0008 00030050 .word 1342178048 1784 .cfi_endproc 1785 .LFE339: 1787 .section .text.HAL_ADCEx_InjectedGetValue,"ax",%progbits 1788 .align 1 1789 .p2align 2,,3 1790 .global HAL_ADCEx_InjectedGetValue 1791 .syntax unified 1792 .thumb 1793 .thumb_func ARM GAS /tmp/ccZL5Rsh.s page 180 1794 .fpu fpv4-sp-d16 1796 HAL_ADCEx_InjectedGetValue: 1797 .LFB340: 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get ADC injected group conversion result. 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Reading register JDRx automatically clears ADC flag JEOC 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of unitary conversion). 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function does not clear ADC flag JEOS 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of sequence conversion) 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Occurrence of flag JEOS rising: 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of 1 rank, flag JEOS is equivalent 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * to flag JEOC. 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of several ranks, during the scan 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * sequence flag JEOC only is raised, at the end of the scan sequence 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * both flags JEOC and EOS are raised. 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Flag JEOS must not be cleared by this function because 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would not be compliant with low power features 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (feature low power auto-wait, not available on all STM32 families). 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * To clear this flag, either use function: 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * model polling: @ref HAL_ADCEx_InjectedPollForConversion() 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS). 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param InjectedRank the converted ADC injected rank. 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval ADC group injected conversion data 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank) 1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1798 .loc 1 1162 0 1799 .cfi_startproc 1800 @ args = 0, pretend = 0, frame = 0 1801 @ frame_needed = 0, uses_anonymous_args = 0 1802 @ link register save eliminated. 1803 .LVL149: 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_jdr; 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); 1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get ADC converted value */ 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (InjectedRank) 1804 .loc 1 1170 0 1805 0000 40F21522 movw r2, #533 1806 0004 9142 cmp r1, r2 1807 0006 0368 ldr r3, [r0] 1808 0008 10D0 beq .L193 1809 000a 40F21B32 movw r2, #795 1810 000e 9142 cmp r1, r2 1811 0010 09D0 beq .L194 ARM GAS /tmp/ccZL5Rsh.s page 181 1812 0012 40F20F12 movw r2, #271 1813 0016 9142 cmp r1, r2 1814 0018 02D0 beq .L198 1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_4: 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR4; 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR3; 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR2; 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR1; 1815 .loc 1 1183 0 1816 001a D3F88000 ldr r0, [r3, #128] 1817 .LVL150: 1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return ADC converted value */ 1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_jdr; 1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1818 .loc 1 1189 0 1819 001e 7047 bx lr 1820 .LVL151: 1821 .L198: 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1822 .loc 1 1179 0 1823 0020 D3F88400 ldr r0, [r3, #132] 1824 .LVL152: 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 1825 .loc 1 1180 0 1826 0024 7047 bx lr 1827 .LVL153: 1828 .L194: 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1829 .loc 1 1173 0 1830 0026 D3F88C00 ldr r0, [r3, #140] 1831 .LVL154: 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: 1832 .loc 1 1174 0 1833 002a 7047 bx lr 1834 .LVL155: 1835 .L193: 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1836 .loc 1 1176 0 1837 002c D3F88800 ldr r0, [r3, #136] 1838 .LVL156: 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 1839 .loc 1 1177 0 1840 0030 7047 bx lr 1841 .cfi_endproc 1842 .LFE340: 1844 0032 00BF .section .text.HAL_ADCEx_InjectedConvCpltCallback,"ax",%progbits ARM GAS /tmp/ccZL5Rsh.s page 182 1845 .align 1 1846 .p2align 2,,3 1847 .weak HAL_ADCEx_InjectedConvCpltCallback 1848 .syntax unified 1849 .thumb 1850 .thumb_func 1851 .fpu fpv4-sp-d16 1853 HAL_ADCEx_InjectedConvCpltCallback: 1854 .LFB341: 1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected conversion complete callback in non-blocking mode. 1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc) 1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1855 .loc 1 1197 0 1856 .cfi_startproc 1857 @ args = 0, pretend = 0, frame = 0 1858 @ frame_needed = 0, uses_anonymous_args = 0 1859 @ link register save eliminated. 1860 .LVL157: 1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file. 1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1861 .loc 1 1204 0 1862 0000 7047 bx lr 1863 .cfi_endproc 1864 .LFE341: 1866 0002 00BF .section .text.HAL_ADCEx_InjectedQueueOverflowCallback,"ax",%progbits 1867 .align 1 1868 .p2align 2,,3 1869 .weak HAL_ADCEx_InjectedQueueOverflowCallback 1870 .syntax unified 1871 .thumb 1872 .thumb_func 1873 .fpu fpv4-sp-d16 1875 HAL_ADCEx_InjectedQueueOverflowCallback: 1876 .LFB357: 1877 .cfi_startproc 1878 @ args = 0, pretend = 0, frame = 0 1879 @ frame_needed = 0, uses_anonymous_args = 0 1880 @ link register save eliminated. 1881 0000 7047 bx lr 1882 .cfi_endproc 1883 .LFE357: 1885 0002 00BF .section .text.HAL_ADCEx_LevelOutOfWindow2Callback,"ax",%progbits 1886 .align 1 1887 .p2align 2,,3 1888 .weak HAL_ADCEx_LevelOutOfWindow2Callback 1889 .syntax unified 1890 .thumb ARM GAS /tmp/ccZL5Rsh.s page 183 1891 .thumb_func 1892 .fpu fpv4-sp-d16 1894 HAL_ADCEx_LevelOutOfWindow2Callback: 1895 .LFB359: 1896 .cfi_startproc 1897 @ args = 0, pretend = 0, frame = 0 1898 @ frame_needed = 0, uses_anonymous_args = 0 1899 @ link register save eliminated. 1900 0000 7047 bx lr 1901 .cfi_endproc 1902 .LFE359: 1904 0002 00BF .section .text.HAL_ADCEx_LevelOutOfWindow3Callback,"ax",%progbits 1905 .align 1 1906 .p2align 2,,3 1907 .weak HAL_ADCEx_LevelOutOfWindow3Callback 1908 .syntax unified 1909 .thumb 1910 .thumb_func 1911 .fpu fpv4-sp-d16 1913 HAL_ADCEx_LevelOutOfWindow3Callback: 1914 .LFB361: 1915 .cfi_startproc 1916 @ args = 0, pretend = 0, frame = 0 1917 @ frame_needed = 0, uses_anonymous_args = 0 1918 @ link register save eliminated. 1919 0000 7047 bx lr 1920 .cfi_endproc 1921 .LFE361: 1923 0002 00BF .section .text.HAL_ADCEx_EndOfSamplingCallback,"ax",%progbits 1924 .align 1 1925 .p2align 2,,3 1926 .weak HAL_ADCEx_EndOfSamplingCallback 1927 .syntax unified 1928 .thumb 1929 .thumb_func 1930 .fpu fpv4-sp-d16 1932 HAL_ADCEx_EndOfSamplingCallback: 1933 .LFB363: 1934 .cfi_startproc 1935 @ args = 0, pretend = 0, frame = 0 1936 @ frame_needed = 0, uses_anonymous_args = 0 1937 @ link register save eliminated. 1938 0000 7047 bx lr 1939 .cfi_endproc 1940 .LFE363: 1942 0002 00BF .section .text.HAL_ADCEx_RegularStop,"ax",%progbits 1943 .align 1 1944 .p2align 2,,3 1945 .global HAL_ADCEx_RegularStop 1946 .syntax unified 1947 .thumb 1948 .thumb_func 1949 .fpu fpv4-sp-d16 1951 HAL_ADCEx_RegularStop: 1952 .LFB346: 1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** ARM GAS /tmp/ccZL5Rsh.s page 184 1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected context queue overflow callback. 1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This callback is called if injected context queue is enabled 1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (parameter "QueueInjectedContext" in injected channel configuration) 1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if a new injected context is set when queue is full (maximum 2 1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** contexts). 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc) 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file. 1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 2 callback in non-blocking mode. 1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc) 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file. 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 3 callback in non-blocking mode. 1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc) 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file. 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief End Of Sampling callback in non-blocking mode. 1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc) 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ ARM GAS /tmp/ccZL5Rsh.s page 185 1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file. 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected channels in 1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC peripheral if no 1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is on going on injected group. 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc) 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1953 .loc 1 1279 0 1954 .cfi_startproc 1955 @ args = 0, pretend = 0, frame = 0 1956 @ frame_needed = 0, uses_anonymous_args = 0 1957 .LVL158: 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1958 .loc 1 1286 0 1959 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1960 0004 012B cmp r3, #1 1961 0006 17D0 beq .L208 1962 .loc 1 1286 0 is_stmt 0 discriminator 2 1963 0008 0121 movs r1, #1 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1964 .loc 1 1279 0 is_stmt 1 discriminator 2 1965 000a 10B5 push {r4, lr} 1966 .LCFI38: 1967 .cfi_def_cfa_offset 8 1968 .cfi_offset 4, -8 1969 .cfi_offset 14, -4 1970 .loc 1 1286 0 discriminator 2 1971 000c 80F85810 strb r1, [r0, #88] 1972 0010 0446 mov r4, r0 1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 1973 .loc 1 1289 0 discriminator 2 1974 0012 FFF7FEFF bl ADC_ConversionStop 1975 .LVL159: 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if regular conversions are effectively stopped 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversions are on-going */ 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1976 .loc 1 1293 0 discriminator 2 1977 0016 58B9 cbnz r0, .L206 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 186 1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 1978 .loc 1 1296 0 1979 0018 E36D ldr r3, [r4, #92] 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1980 .loc 1 1298 0 1981 001a 2268 ldr r2, [r4] 1982 .LVL160: 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1983 .loc 1 1296 0 1984 001c 23F48073 bic r3, r3, #256 1985 0020 E365 str r3, [r4, #92] 1986 .LBB380: 1987 .LBB381: 1988 .loc 2 7071 0 1989 0022 9368 ldr r3, [r2, #8] 1990 0024 1B07 lsls r3, r3, #28 1991 0026 09D5 bpl .L207 1992 .LVL161: 1993 .LBE381: 1994 .LBE380: 1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1995 .loc 1 1316 0 1996 0028 E36D ldr r3, [r4, #92] 1997 002a 43F48053 orr r3, r3, #4096 1998 002e E365 str r3, [r4, #92] 1999 .L206: 1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2000 .loc 1 1321 0 2001 0030 0023 movs r3, #0 2002 0032 84F85830 strb r3, [r4, #88] 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccZL5Rsh.s page 187 2003 .loc 1 1325 0 2004 0036 10BD pop {r4, pc} 2005 .LVL162: 2006 .L208: 2007 .LCFI39: 2008 .cfi_def_cfa_offset 0 2009 .cfi_restore 4 2010 .cfi_restore 14 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2011 .loc 1 1286 0 2012 0038 0220 movs r0, #2 2013 .LVL163: 2014 .loc 1 1325 0 2015 003a 7047 bx lr 2016 .LVL164: 2017 .L207: 2018 .LCFI40: 2019 .cfi_def_cfa_offset 8 2020 .cfi_offset 4, -8 2021 .cfi_offset 14, -4 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2022 .loc 1 1301 0 2023 003c 2046 mov r0, r4 2024 .LVL165: 2025 003e FFF7FEFF bl ADC_Disable 2026 .LVL166: 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2027 .loc 1 1304 0 2028 0042 0028 cmp r0, #0 2029 0044 F4D1 bne .L206 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2030 .loc 1 1307 0 2031 0046 E36D ldr r3, [r4, #92] 2032 0048 23F48053 bic r3, r3, #4096 2033 004c 23F00103 bic r3, r3, #1 2034 0050 43F00103 orr r3, r3, #1 2035 0054 E365 str r3, [r4, #92] 2036 0056 EBE7 b .L206 2037 .cfi_endproc 2038 .LFE346: 2040 .section .text.HAL_ADCEx_RegularStop_IT,"ax",%progbits 2041 .align 1 2042 .p2align 2,,3 2043 .global HAL_ADCEx_RegularStop_IT 2044 .syntax unified 2045 .thumb 2046 .thumb_func 2047 .fpu fpv4-sp-d16 2049 HAL_ADCEx_RegularStop_IT: 2050 .LFB347: 1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of ADC groups regular and injected, 1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable interrution of end-of-conversion, 1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable ADC peripheral if no conversion is on going 1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. ARM GAS /tmp/ccZL5Rsh.s page 188 1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc) 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2051 .loc 1 1337 0 2052 .cfi_startproc 2053 @ args = 0, pretend = 0, frame = 0 2054 @ frame_needed = 0, uses_anonymous_args = 0 2055 .LVL167: 1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2056 .loc 1 1344 0 2057 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2058 0004 012B cmp r3, #1 2059 0006 1BD0 beq .L217 2060 .loc 1 1344 0 is_stmt 0 discriminator 2 2061 0008 0121 movs r1, #1 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2062 .loc 1 1337 0 is_stmt 1 discriminator 2 2063 000a 10B5 push {r4, lr} 2064 .LCFI41: 2065 .cfi_def_cfa_offset 8 2066 .cfi_offset 4, -8 2067 .cfi_offset 14, -4 2068 .loc 1 1344 0 discriminator 2 2069 000c 80F85810 strb r1, [r0, #88] 2070 0010 0446 mov r4, r0 1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2071 .loc 1 1347 0 discriminator 2 2072 0012 FFF7FEFF bl ADC_ConversionStop 2073 .LVL168: 1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2074 .loc 1 1351 0 discriminator 2 2075 0016 78B9 cbnz r0, .L215 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2076 .loc 1 1354 0 2077 0018 E26D ldr r2, [r4, #92] 1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable all regular-related interrupts */ 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); 2078 .loc 1 1357 0 2079 001a 2368 ldr r3, [r4] 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2080 .loc 1 1354 0 ARM GAS /tmp/ccZL5Rsh.s page 189 2081 001c 22F48072 bic r2, r2, #256 2082 0020 E265 str r2, [r4, #92] 2083 .loc 1 1357 0 2084 0022 5A68 ldr r2, [r3, #4] 2085 0024 22F01C02 bic r2, r2, #28 2086 0028 5A60 str r2, [r3, #4] 2087 .LVL169: 2088 .LBB382: 2089 .LBB383: 2090 .loc 2 7071 0 2091 002a 9B68 ldr r3, [r3, #8] 2092 .LVL170: 2093 002c 1B07 lsls r3, r3, #28 2094 002e 09D5 bpl .L216 2095 .LVL171: 2096 .LBE383: 2097 .LBE382: 1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable ADC peripheral if no injected conversions are on-going */ 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2098 .loc 1 1374 0 2099 0030 E36D ldr r3, [r4, #92] 2100 0032 43F48053 orr r3, r3, #4096 2101 0036 E365 str r3, [r4, #92] 2102 .L215: 1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2103 .loc 1 1379 0 2104 0038 0023 movs r3, #0 2105 003a 84F85830 strb r3, [r4, #88] 1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2106 .loc 1 1383 0 2107 003e 10BD pop {r4, pc} 2108 .LVL172: 2109 .L217: 2110 .LCFI42: 2111 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccZL5Rsh.s page 190 2112 .cfi_restore 4 2113 .cfi_restore 14 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2114 .loc 1 1344 0 2115 0040 0220 movs r0, #2 2116 .LVL173: 2117 .loc 1 1383 0 2118 0042 7047 bx lr 2119 .LVL174: 2120 .L216: 2121 .LCFI43: 2122 .cfi_def_cfa_offset 8 2123 .cfi_offset 4, -8 2124 .cfi_offset 14, -4 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2125 .loc 1 1362 0 2126 0044 2046 mov r0, r4 2127 .LVL175: 2128 0046 FFF7FEFF bl ADC_Disable 2129 .LVL176: 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2130 .loc 1 1364 0 2131 004a 0028 cmp r0, #0 2132 004c F4D1 bne .L215 1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2133 .loc 1 1367 0 2134 004e E36D ldr r3, [r4, #92] 2135 0050 23F48053 bic r3, r3, #4096 2136 0054 23F00103 bic r3, r3, #1 2137 0058 43F00103 orr r3, r3, #1 2138 005c E365 str r3, [r4, #92] 2139 005e EBE7 b .L215 2140 .cfi_endproc 2141 .LFE347: 2143 .section .text.HAL_ADCEx_RegularStop_DMA,"ax",%progbits 2144 .align 1 2145 .p2align 2,,3 2146 .global HAL_ADCEx_RegularStop_DMA 2147 .syntax unified 2148 .thumb 2149 .thumb_func 2150 .fpu fpv4-sp-d16 2152 HAL_ADCEx_RegularStop_DMA: 2153 .LFB348: 1384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected group in 1387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC DMA transfer, disable 1388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC peripheral if no conversion is on going 1389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. 1390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only. 1391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For multimode (when multimode feature is available), 1392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used. 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc) ARM GAS /tmp/ccZL5Rsh.s page 191 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2154 .loc 1 1397 0 2155 .cfi_startproc 2156 @ args = 0, pretend = 0, frame = 0 2157 @ frame_needed = 0, uses_anonymous_args = 0 2158 .LVL177: 2159 0000 38B5 push {r3, r4, r5, lr} 2160 .LCFI44: 2161 .cfi_def_cfa_offset 16 2162 .cfi_offset 3, -16 2163 .cfi_offset 4, -12 2164 .cfi_offset 5, -8 2165 .cfi_offset 14, -4 1398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2166 .loc 1 1404 0 2167 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2168 0006 012B cmp r3, #1 2169 0008 31D0 beq .L230 2170 .loc 1 1404 0 is_stmt 0 discriminator 2 2171 000a 0121 movs r1, #1 2172 000c 80F85810 strb r1, [r0, #88] 2173 0010 0446 mov r4, r0 1405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2174 .loc 1 1407 0 is_stmt 1 discriminator 2 2175 0012 FFF7FEFF bl ADC_ConversionStop 2176 .LVL178: 1408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2177 .loc 1 1411 0 discriminator 2 2178 0016 0546 mov r5, r0 2179 0018 20B1 cbz r0, .L234 2180 .LVL179: 2181 .L224: 1412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 1415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ 1420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 1422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 1425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 192 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 1432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, */ 1435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to keep in memory a potential failing status. */ 1436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void)ADC_Disable(hadc); 1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2182 .loc 1 1463 0 2183 001a 0023 movs r3, #0 2184 001c 84F85830 strb r3, [r4, #88] 1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2185 .loc 1 1467 0 2186 0020 2846 mov r0, r5 2187 0022 38BD pop {r3, r4, r5, pc} 2188 .LVL180: 2189 .L234: 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2190 .loc 1 1414 0 2191 0024 E36D ldr r3, [r4, #92] 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2192 .loc 1 1417 0 2193 0026 2268 ldr r2, [r4] 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccZL5Rsh.s page 193 2194 .loc 1 1421 0 2195 0028 606D ldr r0, [r4, #84] 2196 .LVL181: 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2197 .loc 1 1414 0 2198 002a 23F48073 bic r3, r3, #256 2199 002e E365 str r3, [r4, #92] 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2200 .loc 1 1417 0 2201 0030 D368 ldr r3, [r2, #12] 2202 0032 23F00103 bic r3, r3, #1 2203 0036 D360 str r3, [r2, #12] 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2204 .loc 1 1421 0 2205 0038 FFF7FEFF bl HAL_DMA_Abort 2206 .LVL182: 1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2207 .loc 1 1424 0 2208 003c 0546 mov r5, r0 2209 003e C8B9 cbnz r0, .L235 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2210 .loc 1 1431 0 2211 0040 2368 ldr r3, [r4] 2212 0042 5A68 ldr r2, [r3, #4] 2213 0044 22F01002 bic r2, r2, #16 2214 0048 5A60 str r2, [r3, #4] 2215 .LVL183: 2216 .LBB384: 2217 .LBB385: 2218 .loc 2 7071 0 2219 004a 9B68 ldr r3, [r3, #8] 2220 .LVL184: 2221 004c 1B07 lsls r3, r3, #28 2222 004e 21D4 bmi .L228 2223 .LVL185: 2224 .LBE385: 2225 .LBE384: 1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2226 .loc 1 1440 0 2227 0050 2046 mov r0, r4 2228 .LVL186: 2229 0052 FFF7FEFF bl ADC_Disable 2230 .LVL187: 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2231 .loc 1 1448 0 2232 0056 0546 mov r5, r0 2233 0058 0028 cmp r0, #0 2234 005a DED1 bne .L224 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2235 .loc 1 1451 0 2236 005c E36D ldr r3, [r4, #92] 2237 005e 23F48053 bic r3, r3, #4096 2238 0062 23F00103 bic r3, r3, #1 2239 0066 43F00103 orr r3, r3, #1 2240 006a E365 str r3, [r4, #92] 2241 006c D5E7 b .L224 2242 .LVL188: ARM GAS /tmp/ccZL5Rsh.s page 194 2243 .L230: 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2244 .loc 1 1404 0 2245 006e 0225 movs r5, #2 2246 .loc 1 1467 0 2247 0070 2846 mov r0, r5 2248 .LVL189: 2249 0072 38BD pop {r3, r4, r5, pc} 2250 .LVL190: 2251 .L235: 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2252 .loc 1 1427 0 2253 0074 E26D ldr r2, [r4, #92] 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2254 .loc 1 1431 0 2255 0076 2368 ldr r3, [r4] 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2256 .loc 1 1427 0 2257 0078 42F04002 orr r2, r2, #64 2258 007c E265 str r2, [r4, #92] 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2259 .loc 1 1431 0 2260 007e 5A68 ldr r2, [r3, #4] 2261 0080 22F01002 bic r2, r2, #16 2262 0084 5A60 str r2, [r3, #4] 2263 .LVL191: 2264 .LBB387: 2265 .LBB386: 2266 .loc 2 7071 0 2267 0086 9B68 ldr r3, [r3, #8] 2268 .LVL192: 2269 0088 1A07 lsls r2, r3, #28 2270 008a 03D4 bmi .L228 2271 .LVL193: 2272 .LBE386: 2273 .LBE387: 1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2274 .loc 1 1444 0 2275 008c 2046 mov r0, r4 2276 .LVL194: 2277 008e FFF7FEFF bl ADC_Disable 2278 .LVL195: 2279 0092 C2E7 b .L224 2280 .LVL196: 2281 .L228: 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2282 .loc 1 1458 0 2283 0094 E36D ldr r3, [r4, #92] 2284 0096 43F48053 orr r3, r3, #4096 2285 009a E365 str r3, [r4, #92] 2286 009c BDE7 b .L224 2287 .cfi_endproc 2288 .LFE348: 2290 009e 00BF .section .text.HAL_ADCEx_RegularMultiModeStop_DMA,"ax",%progbits 2291 .align 1 2292 .p2align 2,,3 2293 .global HAL_ADCEx_RegularMultiModeStop_DMA ARM GAS /tmp/ccZL5Rsh.s page 195 2294 .syntax unified 2295 .thumb 2296 .thumb_func 2297 .fpu fpv4-sp-d16 2299 HAL_ADCEx_RegularMultiModeStop_DMA: 2300 .LFB349: 1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripher 1472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. Multimode DMA bits 1473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can 1476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 1478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of 1479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 1480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc) 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2301 .loc 1 1484 0 2302 .cfi_startproc 2303 @ args = 0, pretend = 0, frame = 112 2304 @ frame_needed = 0, uses_anonymous_args = 0 2305 .LVL197: 2306 0000 70B5 push {r4, r5, r6, lr} 2307 .LCFI45: 2308 .cfi_def_cfa_offset 16 2309 .cfi_offset 4, -16 2310 .cfi_offset 5, -12 2311 .cfi_offset 6, -8 2312 .cfi_offset 14, -4 1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 1487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 1488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2313 .loc 1 1494 0 2314 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2315 0006 012B cmp r3, #1 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2316 .loc 1 1484 0 2317 0008 9CB0 sub sp, sp, #112 2318 .LCFI46: 2319 .cfi_def_cfa_offset 128 2320 .loc 1 1494 0 2321 000a 52D0 beq .L253 2322 .loc 1 1494 0 is_stmt 0 discriminator 2 2323 000c 0126 movs r6, #1 ARM GAS /tmp/ccZL5Rsh.s page 196 2324 000e 80F85860 strb r6, [r0, #88] 1495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular groups */ 1498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2325 .loc 1 1498 0 is_stmt 1 discriminator 2 2326 0012 3146 mov r1, r6 2327 0014 0446 mov r4, r0 2328 0016 FFF7FEFF bl ADC_ConversionStop 2329 .LVL198: 1499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2330 .loc 1 1501 0 discriminator 2 2331 001a 0546 mov r5, r0 2332 001c 0028 cmp r0, #0 2333 001e 42D1 bne .L238 1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2334 .loc 1 1504 0 2335 0020 E36D ldr r3, [r4, #92] 1505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 2336 .loc 1 1511 0 2337 0022 2268 ldr r2, [r4] 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2338 .loc 1 1504 0 2339 0024 23F48073 bic r3, r3, #256 2340 .loc 1 1511 0 2341 0028 B2F1A04F cmp r2, #1342177280 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2342 .loc 1 1504 0 2343 002c E365 str r3, [r4, #92] 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 2344 .loc 1 1507 0 2345 002e 1890 str r0, [sp, #96] 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2346 .loc 1 1508 0 2347 0030 1990 str r0, [sp, #100] 2348 .loc 1 1511 0 2349 0032 09D0 beq .L239 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 1514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 2350 .loc 1 1516 0 2351 0034 E36D ldr r3, [r4, #92] 1517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); ARM GAS /tmp/ccZL5Rsh.s page 197 2352 .loc 1 1519 0 2353 0036 84F85800 strb r0, [r4, #88] 1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 2354 .loc 1 1521 0 2355 003a 3546 mov r5, r6 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2356 .loc 1 1516 0 2357 003c 43F02003 orr r3, r3, #32 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 1536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADCEx_RegularStop_DMA() API. */ 1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 1564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ ARM GAS /tmp/ccZL5Rsh.s page 198 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 1571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave if no injected */ 1573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion is on-going. */ 1574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL) 1584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(&tmphadcSlave); 1586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Both Master and Slave ADC's could be disabled. Update Master State */ 1593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ 1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); 1595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected (Master or Slave) conversions are still on-going, 1599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** no Master State change */ 1600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2358 .loc 1 1609 0 2359 0040 2846 mov r0, r5 2360 .LVL199: 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2361 .loc 1 1516 0 2362 0042 E365 str r3, [r4, #92] 2363 .loc 1 1609 0 2364 0044 1CB0 add sp, sp, #112 2365 .LCFI47: 2366 .cfi_remember_state 2367 .cfi_def_cfa_offset 16 2368 @ sp needed 2369 0046 70BD pop {r4, r5, r6, pc} 2370 .LVL200: 2371 .L239: 2372 .LCFI48: 2373 .cfi_restore_state ARM GAS /tmp/ccZL5Rsh.s page 199 2374 0048 324B ldr r3, .L268 2375 004a 0193 str r3, [sp, #4] 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2376 .loc 1 1528 0 2377 004c FFF7FEFF bl HAL_GetTick 2378 .LVL201: 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2379 .loc 1 1530 0 2380 0050 019B ldr r3, [sp, #4] 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 2381 .loc 1 1531 0 2382 0052 2268 ldr r2, [r4] 2383 .LBB388: 2384 .LBB389: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2385 .loc 2 6846 0 2386 0054 9B68 ldr r3, [r3, #8] 2387 .LBE389: 2388 .LBE388: 2389 .LBB391: 2390 .LBB392: 2391 0056 9268 ldr r2, [r2, #8] 2392 0058 5207 lsls r2, r2, #29 2393 .LBE392: 2394 .LBE391: 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2395 .loc 1 1528 0 2396 005a 0546 mov r5, r0 2397 .LVL202: 2398 .LBB396: 2399 .LBB390: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2400 .loc 2 6846 0 2401 005c 03F00403 and r3, r3, #4 2402 .LVL203: 2403 .LBE390: 2404 .LBE396: 2405 .LBB397: 2406 .LBB393: 2407 0060 00D4 bmi .L259 2408 .LBE393: 2409 .LBE397: 1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2410 .loc 1 1532 0 2411 0062 93B1 cbz r3, .L246 2412 .LVL204: 2413 .L259: 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2414 .loc 1 1535 0 2415 0064 FFF7FEFF bl HAL_GetTick 2416 .LVL205: 2417 0068 401B subs r0, r0, r5 2418 006a 0528 cmp r0, #5 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2419 .loc 1 1538 0 2420 006c 019A ldr r2, [sp, #4] 2421 .LVL206: ARM GAS /tmp/ccZL5Rsh.s page 200 2422 006e 2368 ldr r3, [r4] 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2423 .loc 1 1535 0 2424 0070 05D9 bls .L243 2425 .LBB398: 2426 .LBB399: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2427 .loc 2 6846 0 2428 0072 9168 ldr r1, [r2, #8] 2429 0074 4807 lsls r0, r1, #29 2430 0076 20D4 bmi .L266 2431 .LBE399: 2432 .LBE398: 2433 .LBB400: 2434 .LBB401: 2435 0078 9968 ldr r1, [r3, #8] 2436 007a 4907 lsls r1, r1, #29 2437 007c 1ED4 bmi .L242 2438 .L243: 2439 .LBE401: 2440 .LBE400: 2441 .LBB403: 2442 .LBB404: 2443 007e 9268 ldr r2, [r2, #8] 2444 .LBE404: 2445 .LBE403: 2446 .LBB406: 2447 .LBB394: 2448 0080 9B68 ldr r3, [r3, #8] 2449 .LBE394: 2450 .LBE406: 2451 .LBB407: 2452 .LBB405: 2453 0082 5207 lsls r2, r2, #29 2454 0084 EED4 bmi .L259 2455 .LBE405: 2456 .LBE407: 2457 .LBB408: 2458 .LBB395: 2459 0086 5E07 lsls r6, r3, #29 2460 0088 ECD4 bmi .L259 2461 .LVL207: 2462 .L246: 2463 .LBE395: 2464 .LBE408: 1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2465 .loc 1 1560 0 2466 008a 606D ldr r0, [r4, #84] 2467 008c FFF7FEFF bl HAL_DMA_Abort 2468 .LVL208: 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2469 .loc 1 1563 0 2470 0090 0546 mov r5, r0 2471 .LVL209: 2472 0092 F0B1 cbz r0, .L248 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2473 .loc 1 1566 0 ARM GAS /tmp/ccZL5Rsh.s page 201 2474 0094 E36D ldr r3, [r4, #92] 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2475 .loc 1 1570 0 2476 0096 2268 ldr r2, [r4] 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2477 .loc 1 1566 0 2478 0098 43F04003 orr r3, r3, #64 2479 009c E365 str r3, [r4, #92] 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2480 .loc 1 1570 0 2481 009e 5368 ldr r3, [r2, #4] 2482 00a0 23F01003 bic r3, r3, #16 2483 00a4 5360 str r3, [r2, #4] 2484 .LVL210: 2485 .L238: 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2486 .loc 1 1605 0 2487 00a6 0023 movs r3, #0 2488 .loc 1 1609 0 2489 00a8 2846 mov r0, r5 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2490 .loc 1 1605 0 2491 00aa 84F85830 strb r3, [r4, #88] 2492 .loc 1 1609 0 2493 00ae 1CB0 add sp, sp, #112 2494 .LCFI49: 2495 .cfi_remember_state 2496 .cfi_def_cfa_offset 16 2497 @ sp needed 2498 00b0 70BD pop {r4, r5, r6, pc} 2499 .LVL211: 2500 .L253: 2501 .LCFI50: 2502 .cfi_restore_state 1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2503 .loc 1 1494 0 2504 00b2 0225 movs r5, #2 2505 .loc 1 1609 0 2506 00b4 2846 mov r0, r5 2507 .LVL212: 2508 00b6 1CB0 add sp, sp, #112 2509 .LCFI51: 2510 .cfi_remember_state 2511 .cfi_def_cfa_offset 16 2512 @ sp needed 2513 00b8 70BD pop {r4, r5, r6, pc} 2514 .LVL213: 2515 .L266: 2516 .LCFI52: 2517 .cfi_restore_state 2518 .LBB409: 2519 .LBB402: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2520 .loc 2 6846 0 2521 00ba 9B68 ldr r3, [r3, #8] 2522 .LVL214: 2523 .L242: ARM GAS /tmp/ccZL5Rsh.s page 202 2524 .LBE402: 2525 .LBE409: 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2526 .loc 1 1544 0 2527 00bc E36D ldr r3, [r4, #92] 1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2528 .loc 1 1549 0 2529 00be 0125 movs r5, #1 2530 .LVL215: 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2531 .loc 1 1547 0 2532 00c0 0022 movs r2, #0 2533 .LVL216: 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2534 .loc 1 1544 0 2535 00c2 43F01003 orr r3, r3, #16 2536 .loc 1 1609 0 2537 00c6 2846 mov r0, r5 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2538 .loc 1 1544 0 2539 00c8 E365 str r3, [r4, #92] 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2540 .loc 1 1547 0 2541 00ca 84F85820 strb r2, [r4, #88] 2542 .loc 1 1609 0 2543 00ce 1CB0 add sp, sp, #112 2544 .LCFI53: 2545 .cfi_remember_state 2546 .cfi_def_cfa_offset 16 2547 @ sp needed 2548 00d0 70BD pop {r4, r5, r6, pc} 2549 .LVL217: 2550 .L248: 2551 .LCFI54: 2552 .cfi_restore_state 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2553 .loc 1 1570 0 2554 00d2 2368 ldr r3, [r4] 2555 00d4 5A68 ldr r2, [r3, #4] 2556 00d6 22F01002 bic r2, r2, #16 2557 00da 5A60 str r2, [r3, #4] 2558 .LVL218: 2559 .LBB410: 2560 .LBB411: 2561 .loc 2 7071 0 2562 00dc 9B68 ldr r3, [r3, #8] 2563 .LVL219: 2564 00de 1907 lsls r1, r3, #28 2565 00e0 08D5 bpl .L267 2566 .LVL220: 2567 .L250: 2568 .LBE411: 2569 .LBE410: 1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2570 .loc 1 1594 0 2571 00e2 E36D ldr r3, [r4, #92] 2572 00e4 23F48053 bic r3, r3, #4096 ARM GAS /tmp/ccZL5Rsh.s page 203 2573 00e8 23F00103 bic r3, r3, #1 2574 00ec 43F00103 orr r3, r3, #1 2575 00f0 E365 str r3, [r4, #92] 2576 00f2 D8E7 b .L238 2577 .LVL221: 2578 .L267: 1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2579 .loc 1 1580 0 2580 00f4 2046 mov r0, r4 2581 .LVL222: 2582 00f6 FFF7FEFF bl ADC_Disable 2583 .LVL223: 1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2584 .loc 1 1581 0 2585 00fa 40B9 cbnz r0, .L254 1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2586 .loc 1 1583 0 2587 00fc 019B ldr r3, [sp, #4] 2588 .LVL224: 2589 .LBB412: 2590 .LBB413: 2591 .loc 2 7071 0 2592 00fe 9B68 ldr r3, [r3, #8] 2593 .LVL225: 2594 0100 1807 lsls r0, r3, #28 2595 .LVL226: 2596 0102 EED4 bmi .L250 2597 .LVL227: 2598 .LBE413: 2599 .LBE412: 1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2600 .loc 1 1585 0 2601 0104 01A8 add r0, sp, #4 2602 0106 FFF7FEFF bl ADC_Disable 2603 .LVL228: 1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2604 .loc 1 1590 0 2605 010a 0028 cmp r0, #0 2606 010c E9D0 beq .L250 2607 .L254: 2608 010e 0546 mov r5, r0 2609 0110 C9E7 b .L238 2610 .L269: 2611 0112 00BF .align 2 2612 .L268: 2613 0114 00010050 .word 1342177536 2614 .cfi_endproc 2615 .LFE349: 2617 .section .text.HAL_ADCEx_InjectedConfigChannel,"ax",%progbits 2618 .align 1 2619 .p2align 2,,3 2620 .global HAL_ADCEx_InjectedConfigChannel 2621 .syntax unified 2622 .thumb 2623 .thumb_func 2624 .fpu fpv4-sp-d16 2626 HAL_ADCEx_InjectedConfigChannel: ARM GAS /tmp/ccZL5Rsh.s page 204 2627 .LFB350: 1610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 1614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended Peripheral Control functions 1618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 1619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### Peripheral Control functions ##### 1622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 1624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure channels on injected group 1625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure multimode when multimode feature is available 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enable or Disable Injected Queue 1627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Disable ADC voltage regulator 1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enter ADC deep-power-down mode 1629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 1631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 1632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Configure a channel to be assigned to ADC group injected. 1636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 1637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes injected group, following calls to this 1638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function can be used to reconfigure some parameters of structure 1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC. 1640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state: 1641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Refer to comments of structure "ADC_InjectionConfTypeDef". 1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of usage of internal measurement channels: 1643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Vbat/VrefInt/TempSensor. 1644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * These internal paths can be disabled using function 1645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_DeInit(). 1646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Caution: For Injected Context Queue use, a context must be fully 1647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * defined before start of injected conversion. All channels are configured 1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * consecutively for the same ADC instance. Therefore, the number of calls to 1649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter 1650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * InjectedNbrOfConversion for each context. 1651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 1: If 1 context is intended to be used (or if there is no use of the 1652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue Context feature) and if the context contains 3 injected ranks 1653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be 1654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * called once for each channel (i.e. 3 times) before starting a conversion. 1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function must not be called to configure a 4th injected channel: 1656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would start a new context into context queue. 1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 2: If 2 contexts are intended to be used and each of them contains 1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 3 injected ranks (InjectedNbrOfConversion = 3), 1659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * for each context (3 channels x 2 contexts = 6 calls). Conversion can 1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * start once the 1st context is set, that is after the first three 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly. 1663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param sConfigInjected Structure of ADC injected group and ADC channel for 1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected group. ARM GAS /tmp/ccZL5Rsh.s page 205 1666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2628 .loc 1 1669 0 2629 .cfi_startproc 2630 @ args = 0, pretend = 0, frame = 8 2631 @ frame_needed = 0, uses_anonymous_args = 0 2632 .LVL229: 2633 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} 2634 .LCFI55: 2635 .cfi_def_cfa_offset 28 2636 .cfi_offset 4, -28 2637 .cfi_offset 5, -24 2638 .cfi_offset 6, -20 2639 .cfi_offset 7, -16 2640 .cfi_offset 8, -12 2641 .cfi_offset 9, -8 2642 .cfi_offset 14, -4 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 1672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_internal_channel; 1673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 1674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0; 1676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U; 1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); 1682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff)); 1683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); 1684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext)); 1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); 1686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv)); 1687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber)); 1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset)); 1689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_SIGN(sConfigInjected->InjectedOffsetSign)); 1690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedOffsetSaturation)); 1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode)); 1692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); 1696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion)); 1697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); 1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is 1702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ignored (considered as reset) */ 1703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->In 1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JDISCEN and JAUTO bits can't be set at the same time */ 1706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->Au 1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccZL5Rsh.s page 206 1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* DISCEN and JAUTO bits can't be set at the same time */ 1709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv 1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of channel number */ 1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED) 1713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel)); 1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel)); 1719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2643 .loc 1 1722 0 2644 0004 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 2645 .loc 1 1669 0 2646 0008 83B0 sub sp, sp, #12 2647 .LCFI56: 2648 .cfi_def_cfa_offset 40 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2649 .loc 1 1675 0 2650 000a 0022 movs r2, #0 2651 .loc 1 1722 0 2652 000c 012B cmp r3, #1 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2653 .loc 1 1675 0 2654 000e 0192 str r2, [sp, #4] 2655 .LVL230: 2656 .loc 1 1722 0 2657 0010 00F05F81 beq .L337 1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2658 .loc 1 1693 0 discriminator 2 2659 0014 4369 ldr r3, [r0, #20] 2660 .loc 1 1722 0 discriminator 2 2661 0016 0122 movs r2, #1 2662 0018 0446 mov r4, r0 2663 001a 80F85820 strb r2, [r0, #88] 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of injected group sequencer: */ 1725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Hardware constraint: Must fully define injected context register JSQR */ 1726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* before make it entering into injected sequencer queue. */ 1727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is disabled: */ 1729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to 0x00: 1 channel */ 1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* converted (channel on injected rank 1) */ 1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter "InjectedNbrOfConversion" is discarded. */ 1732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting is simple: register is fully */ 1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* defined on one call of this function (for injected rank 1) and can */ 1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* be entered into queue directly. */ 1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is enabled: */ 1736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to parameter */ 1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "InjectedNbrOfConversion". */ 1738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting more complex: register is */ 1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* fully defined over successive calls of this function, for each */ ARM GAS /tmp/ccZL5Rsh.s page 207 1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected channel rank. It is entered into queue only when all */ 1741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected ranks have been set. */ 1742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Scan mode is not present by hardware on this device, but used */ 1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by software for alignment over all STM32 devices. */ 1744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) || 2664 .loc 1 1745 0 discriminator 2 2665 001e 002B cmp r3, #0 2666 0020 72D0 beq .L272 1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U)) 2667 .loc 1 1746 0 discriminator 1 2668 0022 0B6A ldr r3, [r1, #32] 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U)) 2669 .loc 1 1745 0 discriminator 1 2670 0024 9342 cmp r3, r2 2671 0026 6FD0 beq .L272 1747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer: fixed to 1st rank */ 1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (scan mode disabled, only rank 1 used) */ 1751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */ 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1) 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 1763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT 1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt); 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt; 1777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of scan mode enabled, several channels to set into injected group */ 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* sequencer. */ 1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to define injected context register JSQR over successive */ 1786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* calls of this function, for each injected channel rank: */ 1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Start new context and set parameters related to all injected */ ARM GAS /tmp/ccZL5Rsh.s page 208 1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* channels: injected sequence length and trigger. */ 1789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */ 1791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* call of the context under setting */ 1792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) 2672 .loc 1 1792 0 2673 0028 806E ldr r0, [r0, #104] 2674 .LVL231: 2675 002a 0028 cmp r0, #0 2676 002c 40F02A81 bne .L382 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Initialize number of channels that will be configured on the context */ 1795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* being built */ 1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion; 1797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel() 1798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, this context will be written in JSQR register at the last call. 1799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** At this point, the context is merely reset */ 1800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = 0x00000000U; 1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer */ 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 2677 .loc 1 1812 0 2678 0030 886A ldr r0, [r1, #40] 2679 0032 013B subs r3, r3, #1 2680 0034 0028 cmp r0, #0 2681 0036 00F04082 beq .L338 1813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U) 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 2682 .loc 1 1815 0 2683 003a 00F07C00 and r0, r0, #124 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 2684 .loc 1 1814 0 2685 003e CA6A ldr r2, [r1, #44] 2686 .loc 1 1815 0 2687 0040 1843 orrs r0, r0, r3 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 2688 .loc 1 1814 0 2689 0042 1043 orrs r0, r0, r2 2690 .LVL232: 2691 .L278: 1816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)); 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccZL5Rsh.s page 209 1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Continue setting of context under definition with parameter */ 1827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* related to each channel: channel rank sequence */ 1828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear the old JSQx bits for the selected rank */ 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank); 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the JSQx bits for the selected rank */ 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjecte 2692 .loc 1 1832 0 2693 0044 D1E90025 ldrd r2, r5, [r1] 1833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Decrease channel count */ 1835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount--; 2694 .loc 1 1835 0 2695 0048 A366 str r3, [r4, #104] 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2696 .loc 1 1832 0 2697 004a 05F01F05 and r5, r5, #31 2698 004e C2F38463 ubfx r3, r2, #26, #5 2699 0052 AB40 lsls r3, r3, r5 2700 .LVL233: 1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel() 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, aggregate the setting to those already built during the previous 1839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */ 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt; 2701 .loc 1 1840 0 2702 0054 1843 orrs r0, r0, r3 2703 .LVL234: 2704 0056 2368 ldr r3, [r4] 2705 0058 6066 str r0, [r4, #100] 2706 .LVL235: 2707 .L274: 2708 .LBB414: 2709 .LBB415: 2710 .loc 2 7071 0 2711 005a 9868 ldr r0, [r3, #8] 2712 005c 0007 lsls r0, r0, #28 2713 005e 10D4 bmi .L279 2714 .LVL236: 2715 .L385: 2716 0060 91F82600 ldrb r0, [r1, #38] @ zero_extendqisi2 2717 .LBE415: 2718 .LBE414: 1841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 4. End of context setting: if this is the last channel set, then write context 1843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** into register JSQR and make it enter into queue */ 1844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) 1845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue); 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ ARM GAS /tmp/ccZL5Rsh.s page 210 1852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on injected group: */ 1853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected context queue: Queue disable (active context is kept) or */ 1854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable (context decremented, up to 2 contexts queued) */ 1855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected discontinuous mode: can be enabled only if auto-injected */ 1856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* mode is disabled. */ 1857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is disabled: no constraint */ 1860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == DISABLE) 2719 .loc 1 1860 0 2720 0064 91F82550 ldrb r5, [r1, #37] @ zero_extendqisi2 2721 0068 4005 lsls r0, r0, #21 2722 006a 002D cmp r5, #0 2723 006c 40F0FF80 bne .L280 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 2724 .loc 1 1862 0 2725 0070 DD68 ldr r5, [r3, #12] 2726 0072 91F82460 ldrb r6, [r1, #36] @ zero_extendqisi2 2727 0076 25F44015 bic r5, r5, #3145728 2728 007a 40EA0650 orr r0, r0, r6, lsl #20 2729 007e 2843 orrs r0, r0, r5 2730 0080 D860 str r0, [r3, #12] 2731 .L279: 2732 .LVL237: 2733 .LBB419: 2734 .LBB420: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2735 .loc 2 6846 0 2736 0082 9868 ldr r0, [r3, #8] 2737 0084 10F00400 ands r0, r0, #4 2738 0088 57D0 beq .L383 2739 .L281: 2740 .LVL238: 2741 .LBE420: 2742 .LBE419: 2743 .LBB422: 2744 .LBB423: 2745 .loc 2 7071 0 2746 008a 9868 ldr r0, [r3, #8] 2747 .LBE423: 2748 .LBE422: 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 2749 .loc 1 1670 0 2750 008c 0020 movs r0, #0 2751 .LVL239: 2752 .L294: 2753 .LBB425: 2754 .LBB426: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2755 .loc 2 6724 0 2756 008e 9D68 ldr r5, [r3, #8] 2757 0090 EF07 lsls r7, r5, #31 2758 0092 14D4 bmi .L311 2759 .LVL240: 2760 .LBE426: 2761 .LBE425: ARM GAS /tmp/ccZL5Rsh.s page 211 1863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousCon 1866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is enabled: Injected discontinuous setting is */ 1868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* discarded. */ 1869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 1872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext)); 1874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 1880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular and injected groups: */ 1881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Automatic injected conversion: can be enabled if injected group */ 1882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* external triggers are disabled. */ 1883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel sampling time */ 1884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel offset */ 1885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 1886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 1887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 1890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If injected group external triggers are disabled (set to injected */ 1893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start): no constraint */ 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START) 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) 1896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE) 1898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If Automatic injected conversion was intended to be set and could not */ 1907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* due to injected group external triggers enabled, error is reported. */ 1908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE) 1911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 1916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); ARM GAS /tmp/ccZL5Rsh.s page 212 1920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjecOversamplingMode == ENABLE) 1924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio)); 1926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift)); 1927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JOVSE must be reset in case of triggered regular mode */ 1929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFG 1930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of Injected Oversampler: */ 1932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Oversampling Ratio */ 1933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Right bit shift */ 1934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable OverSampling mode */ 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2, 1937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSR | 1939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSS, 1940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.Ratio | 1942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.RightBitShift 1943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable Regular OverSampling */ 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE); 1949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */ 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5) 1953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLI 1956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5); 1959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInject 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT); 1967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configure the offset: offset enable/disable, channel, offset value */ 1970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Shift the offset with respect to the selected ADC resolution. */ 1972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset); 1974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) 1976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccZL5Rsh.s page 213 1977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset number */ 1978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->Inje 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpOffsetShifted); 1980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset sign & saturation */ 1982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSign(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected-> 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, 1984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 1985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Scan each offset register to check if the selected channel is targeted. */ 1989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If this is the case, the corresponding offset number is disabled. */ 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 1992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE); 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 1997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE); 1999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 2002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE); 2004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 2007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE); 2009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Single or differential mode */ 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set mode single-ended or differential input of the selected ADC channel */ 2020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected-> 2762 .loc 1 2020 0 2763 0094 CF68 ldr r7, [r1, #12] 2764 .LVL241: 2765 .LBB427: 2766 .LBB428: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 2767 .loc 2 5501 0 2768 0096 C84D ldr r5, .L394 2769 0098 D3F8B060 ldr r6, [r3, #176] 2770 .LBE428: 2771 .LBE427: 2021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of differential mode */ ARM GAS /tmp/ccZL5Rsh.s page 214 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED) 2772 .loc 1 2024 0 2773 009c DFF844E3 ldr lr, .L394+44 2774 .LBB431: 2775 .LBB429: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 2776 .loc 2 5501 0 2777 00a0 07F0180C and ip, r7, #24 2778 00a4 25FA0CF5 lsr r5, r5, ip 2779 00a8 C2F3120C ubfx ip, r2, #0, #19 2780 00ac 1540 ands r5, r5, r2 2781 00ae 26EA0C06 bic r6, r6, ip 2782 00b2 3543 orrs r5, r5, r6 2783 .LBE429: 2784 .LBE431: 2785 .loc 1 2024 0 2786 00b4 7745 cmp r7, lr 2787 .LBB432: 2788 .LBB430: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 2789 .loc 2 5501 0 2790 00b6 C3F8B050 str r5, [r3, #176] 2791 .LVL242: 2792 .LBE430: 2793 .LBE432: 2794 .loc 1 2024 0 2795 00ba 00F00E81 beq .L384 2796 .L311: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 2029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 2030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ 2035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* internal measurement paths enable: If internal channel selected, */ 2036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable dedicated internal buffers and path. */ 2037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: these internal measurement paths can be disabled using */ 2038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* HAL_ADC_DeInit(). */ 2039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel)) 2797 .loc 1 2040 0 2798 00be BF49 ldr r1, .L394+4 2799 .LVL243: 2800 00c0 0A42 tst r2, r1 2801 00c2 1BD0 beq .L327 2802 .LVL244: 2803 .LBB433: 2804 .LBB434: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2805 .loc 2 2880 0 2806 00c4 BE4D ldr r5, .L394+8 2807 .LBE434: ARM GAS /tmp/ccZL5Rsh.s page 215 2808 .LBE433: 2041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Ins 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If the requested internal measurement path has already been enabled, */ 2045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* bypass the configuration processing. */ 2046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC1) 2809 .loc 1 2046 0 2810 00c6 BF4E ldr r6, .L394+12 2811 .LBB437: 2812 .LBB435: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2813 .loc 2 2880 0 2814 00c8 A968 ldr r1, [r5, #8] 2815 .LBE435: 2816 .LBE437: 2817 .loc 1 2046 0 2818 00ca B242 cmp r2, r6 2819 .LBB438: 2820 .LBB436: 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2821 .loc 2 2880 0 2822 00cc 01F0E077 and r7, r1, #29360128 2823 .LVL245: 2824 .LBE436: 2825 .LBE438: 2826 .loc 1 2046 0 2827 00d0 00F0A780 beq .L328 2047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC5)) 2828 .loc 1 2047 0 2829 00d4 BC4E ldr r6, .L394+16 2830 00d6 B242 cmp r2, r6 2831 00d8 00F0A380 beq .L328 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 2049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channe 2054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Delay for temperature sensor stabilization time */ 2056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait loop initialization and execution */ 2057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Variable divided by 2 to compensate partially */ 2058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* CPU processing cycles, scaling in us split to not */ 2059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* exceed 32 bits register capacity and handle low frequency. */ 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (((SystemCoreClock / (100000U 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index--; 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) 2832 .loc 1 2067 0 2833 00dc BB4E ldr r6, .L394+20 2834 00de B242 cmp r2, r6 2835 00e0 40F05681 bne .L332 ARM GAS /tmp/ccZL5Rsh.s page 216 2068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) 2836 .loc 1 2068 0 2837 00e4 CE01 lsls r6, r1, #7 2838 00e6 09D4 bmi .L327 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) 2839 .loc 1 2070 0 2840 00e8 B94A ldr r2, .L394+24 2841 00ea 9342 cmp r3, r2 2842 00ec 06D0 beq .L327 2843 .LVL246: 2844 .LBB439: 2845 .LBB440: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2846 .loc 2 2799 0 2847 00ee AB68 ldr r3, [r5, #8] 2848 00f0 23F0E073 bic r3, r3, #29360128 2849 00f4 1F43 orrs r7, r7, r3 2850 .LVL247: 2851 00f6 47F08077 orr r7, r7, #16777216 2852 00fa AF60 str r7, [r5, #8] 2853 .LVL248: 2854 .L327: 2855 .LBE440: 2856 .LBE439: 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 2074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) 2077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_VREFINT_INSTANCE(hadc)) 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); 2083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* nothing to do */ 2088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2857 .loc 1 2092 0 2858 00fc 0023 movs r3, #0 2859 00fe 84F85830 strb r3, [r4, #88] 2093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2860 .loc 1 2096 0 2861 0102 03B0 add sp, sp, #12 2862 .LCFI57: ARM GAS /tmp/ccZL5Rsh.s page 217 2863 .cfi_remember_state 2864 .cfi_def_cfa_offset 28 2865 @ sp needed 2866 0104 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 2867 .LVL249: 2868 .L272: 2869 .LCFI58: 2870 .cfi_restore_state 2871 0108 D1E90020 ldrd r2, r0, [r1] 2872 .LVL250: 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2873 .loc 1 1755 0 2874 010c 0928 cmp r0, #9 2875 010e 2368 ldr r3, [r4] 2876 0110 A3D1 bne .L274 1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2877 .loc 1 1762 0 2878 0112 886A ldr r0, [r1, #40] 2879 0114 550C lsrs r5, r2, #17 2880 0116 05F47855 and r5, r5, #15872 2881 011a 20B1 cbz r0, .L275 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 2882 .loc 1 1764 0 2883 011c CE6A ldr r6, [r1, #44] 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 2884 .loc 1 1765 0 2885 011e 00F07C00 and r0, r0, #124 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 2886 .loc 1 1764 0 2887 0122 3043 orrs r0, r0, r6 2888 0124 0543 orrs r5, r5, r0 2889 .LVL251: 2890 .L275: 1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 2891 .loc 1 1774 0 2892 0126 D86C ldr r0, [r3, #76] 2893 0128 AA4E ldr r6, .L394+28 2894 012a 3040 ands r0, r0, r6 2895 012c 2843 orrs r0, r0, r5 2896 012e D864 str r0, [r3, #76] 2897 .LBB441: 2898 .LBB416: 2899 .loc 2 7071 0 2900 0130 9868 ldr r0, [r3, #8] 2901 .LBE416: 2902 .LBE441: 1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2903 .loc 1 1776 0 2904 0132 6566 str r5, [r4, #100] 2905 .LVL252: 2906 .LBB442: 2907 .LBB417: 2908 .loc 2 7071 0 2909 0134 0007 lsls r0, r0, #28 2910 0136 A4D4 bmi .L279 2911 0138 92E7 b .L385 2912 .LVL253: ARM GAS /tmp/ccZL5Rsh.s page 218 2913 .L383: 2914 .LBE417: 2915 .LBE442: 2916 .LBB443: 2917 .LBB424: 2918 013a 9D68 ldr r5, [r3, #8] 2919 013c 15F00805 ands r5, r5, #8 2920 0140 A5D1 bne .L294 2921 .LBE424: 2922 .LBE443: 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) 2923 .loc 1 1894 0 2924 0142 8E6A ldr r6, [r1, #40] 2925 0144 91F82500 ldrb r0, [r1, #37] @ zero_extendqisi2 2926 0148 002E cmp r6, #0 2927 014a 40F0B580 bne .L386 2928 .L283: 1897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2929 .loc 1 1897 0 2930 014e 0128 cmp r0, #1 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2931 .loc 1 1899 0 2932 0150 D868 ldr r0, [r3, #12] 2933 0152 0CBF ite eq 2934 0154 40F00070 orreq r0, r0, #33554432 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2935 .loc 1 1903 0 2936 0158 20F00070 bicne r0, r0, #33554432 2937 015c D860 str r0, [r3, #12] 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 2938 .loc 1 1670 0 2939 015e 0020 movs r0, #0 2940 .LVL254: 2941 .L286: 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2942 .loc 1 1923 0 2943 0160 91F83060 ldrb r6, [r1, #48] @ zero_extendqisi2 2944 0164 012E cmp r6, #1 2945 0166 00F04981 beq .L387 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2946 .loc 1 1948 0 2947 016a 1E69 ldr r6, [r3, #16] 2948 016c 26F00206 bic r6, r6, #2 2949 0170 1E61 str r6, [r3, #16] 2950 .L289: 2951 0172 C2F30458 ubfx r8, r2, #20, #5 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2952 .loc 1 1952 0 2953 0176 8F68 ldr r7, [r1, #8] 2954 0178 D20D lsrs r2, r2, #23 2955 017a 0726 movs r6, #7 2956 017c 02F0040E and lr, r2, #4 2957 0180 03F1140C add ip, r3, #20 2958 0184 06FA08F6 lsl r6, r6, r8 2959 0188 B7F1004F cmp r7, #-2147483648 2960 018c 6FEA0606 mvn r6, r6 2961 .LBB444: ARM GAS /tmp/ccZL5Rsh.s page 219 2962 .LBB445: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 2963 .loc 2 5339 0 2964 0190 5EF80C20 ldr r2, [lr, ip] 2965 .LBE445: 2966 .LBE444: 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2967 .loc 1 1952 0 2968 0194 00F02A81 beq .L388 2969 .LVL255: 2970 .LBB447: 2971 .LBB448: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 2972 .loc 2 5339 0 2973 0198 1640 ands r6, r6, r2 2974 019a 07FA08F7 lsl r7, r7, r8 2975 .LVL256: 2976 019e 3743 orrs r7, r7, r6 2977 01a0 4EF80C70 str r7, [lr, ip] 2978 .LVL257: 2979 .LBE448: 2980 .LBE447: 2981 .LBB449: 2982 .LBB450: 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2983 .loc 2 3563 0 2984 01a4 5A69 ldr r2, [r3, #20] 2985 01a6 22F00042 bic r2, r2, #-2147483648 2986 01aa 5A61 str r2, [r3, #20] 2987 .LVL258: 2988 .L291: 2989 .LBE450: 2990 .LBE449: 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2991 .loc 1 1975 0 2992 01ac D1F810E0 ldr lr, [r1, #16] 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2993 .loc 1 1973 0 2994 01b0 DF68 ldr r7, [r3, #12] 2995 .LVL259: 2996 01b2 0A68 ldr r2, [r1] 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2997 .loc 1 1975 0 2998 01b4 BEF1040F cmp lr, #4 2999 01b8 03F16006 add r6, r3, #96 3000 01bc 00F02A81 beq .L292 3001 .LVL260: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3002 .loc 1 1973 0 3003 01c0 C7F3C10C ubfx ip, r7, #3, #2 3004 01c4 4F69 ldr r7, [r1, #20] 3005 .LVL261: 3006 .LBB451: 3007 .LBB452: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3008 .loc 2 3225 0 3009 01c6 56F82E90 ldr r9, [r6, lr, lsl #2] ARM GAS /tmp/ccZL5Rsh.s page 220 3010 01ca DFF81C82 ldr r8, .L394+48 3011 .LBE452: 3012 .LBE451: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3013 .loc 1 1973 0 3014 01ce 4FEA4C0C lsl ip, ip, #1 3015 .LBB455: 3016 .LBB453: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3017 .loc 2 3225 0 3018 01d2 02F0F842 and r2, r2, #2080374784 3019 .LVL262: 3020 01d6 42F00042 orr r2, r2, #-2147483648 3021 .LBE453: 3022 .LBE455: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3023 .loc 1 1973 0 3024 01da 07FA0CF7 lsl r7, r7, ip 3025 .LBB456: 3026 .LBB454: 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3027 .loc 2 3225 0 3028 01de 1743 orrs r7, r7, r2 3029 01e0 09EA0808 and r8, r9, r8 3030 01e4 47EA0807 orr r7, r7, r8 3031 01e8 46F82E70 str r7, [r6, lr, lsl #2] 3032 .LVL263: 3033 .LBE454: 3034 .LBE456: 3035 .LBB457: 3036 .LBB458: 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3037 .loc 2 3420 0 3038 01ec D1F810C0 ldr ip, [r1, #16] 3039 .LVL264: 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3040 .loc 2 3422 0 3041 01f0 8F69 ldr r7, [r1, #24] 3042 01f2 56F82C20 ldr r2, [r6, ip, lsl #2] 3043 .LBE458: 3044 .LBE457: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3045 .loc 1 1983 0 3046 01f6 91F81CE0 ldrb lr, [r1, #28] @ zero_extendqisi2 3047 .LBB460: 3048 .LBB459: 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3049 .loc 2 3422 0 3050 01fa 22F08072 bic r2, r2, #16777216 3051 01fe 3A43 orrs r2, r2, r7 3052 0200 46F82C20 str r2, [r6, ip, lsl #2] 3053 .LVL265: 3054 .LBE459: 3055 .LBE460: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3056 .loc 1 1983 0 3057 0204 0F69 ldr r7, [r1, #16] ARM GAS /tmp/ccZL5Rsh.s page 221 3058 .LBB461: 3059 .LBB462: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3060 .loc 2 3477 0 3061 0206 56F82720 ldr r2, [r6, r7, lsl #2] 3062 .LBE462: 3063 .LBE461: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3064 .loc 1 1983 0 3065 020a BEF1010F cmp lr, #1 3066 .LBB465: 3067 .LBB463: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3068 .loc 2 3477 0 3069 020e 22F00072 bic r2, r2, #33554432 3070 .LBE463: 3071 .LBE465: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3072 .loc 1 1983 0 3073 0212 08BF it eq 3074 0214 4FF00075 moveq r5, #33554432 3075 .LVL266: 3076 .LBB466: 3077 .LBB464: 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3078 .loc 2 3477 0 3079 0218 1543 orrs r5, r5, r2 3080 .LVL267: 3081 021a 46F82750 str r5, [r6, r7, lsl #2] 3082 021e 0A68 ldr r2, [r1] 3083 0220 35E7 b .L294 3084 .LVL268: 3085 .L328: 3086 .LBE464: 3087 .LBE466: 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3088 .loc 1 2048 0 3089 0222 0A02 lsls r2, r1, #8 3090 0224 3FF56AAF bmi .L327 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3091 .loc 1 2050 0 3092 0228 B3F1A04F cmp r3, #1342177280 3093 022c 7FF466AF bne .L327 3094 .LVL269: 3095 .LBB467: 3096 .LBB468: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3097 .loc 2 2799 0 3098 0230 634A ldr r2, .L394+8 3099 .LBE468: 3100 .LBE467: 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 3101 .loc 1 2060 0 3102 0232 6949 ldr r1, .L394+32 3103 .LBB470: 3104 .LBB469: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccZL5Rsh.s page 222 3105 .loc 2 2799 0 3106 0234 9368 ldr r3, [r2, #8] 3107 0236 23F0E073 bic r3, r3, #29360128 3108 023a 1F43 orrs r7, r7, r3 3109 .LVL270: 3110 023c 47F40007 orr r7, r7, #8388608 3111 0240 9760 str r7, [r2, #8] 3112 .LVL271: 3113 .LBE469: 3114 .LBE470: 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 3115 .loc 1 2060 0 3116 0242 0B68 ldr r3, [r1] 3117 0244 654A ldr r2, .L394+36 3118 0246 9B09 lsrs r3, r3, #6 3119 0248 A2FB0323 umull r2, r3, r2, r3 3120 024c 9B09 lsrs r3, r3, #6 3121 024e 03EB4303 add r3, r3, r3, lsl #1 3122 0252 9B00 lsls r3, r3, #2 3123 0254 1833 adds r3, r3, #24 3124 0256 0193 str r3, [sp, #4] 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3125 .loc 1 2061 0 3126 0258 019B ldr r3, [sp, #4] 3127 025a 002B cmp r3, #0 3128 025c 3FF44EAF beq .L327 3129 .L331: 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3130 .loc 1 2063 0 3131 0260 019B ldr r3, [sp, #4] 3132 0262 013B subs r3, r3, #1 3133 0264 0193 str r3, [sp, #4] 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3134 .loc 1 2061 0 3135 0266 019B ldr r3, [sp, #4] 3136 0268 002B cmp r3, #0 3137 026a F9D1 bne .L331 3138 026c 46E7 b .L327 3139 .LVL272: 3140 .L280: 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 3141 .loc 1 1871 0 3142 026e DD68 ldr r5, [r3, #12] 3143 0270 25F44015 bic r5, r5, #3145728 3144 0274 2843 orrs r0, r0, r5 3145 0276 D860 str r0, [r3, #12] 3146 .LBB471: 3147 .LBB421: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3148 .loc 2 6846 0 3149 0278 9868 ldr r0, [r3, #8] 3150 027a 10F00400 ands r0, r0, #4 3151 027e 7FF404AF bne .L281 3152 0282 5AE7 b .L383 3153 .LVL273: 3154 .L382: 3155 .LBE421: ARM GAS /tmp/ccZL5Rsh.s page 223 3156 .LBE471: 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3157 .loc 1 1832 0 3158 0284 D1E90026 ldrd r2, r6, [r1] 3159 0288 636E ldr r3, [r4, #100] 3160 028a C2F38465 ubfx r5, r2, #26, #5 3161 028e 06F01F06 and r6, r6, #31 3162 0292 B540 lsls r5, r5, r6 3163 .LVL274: 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3164 .loc 1 1840 0 3165 0294 1D43 orrs r5, r5, r3 3166 .LVL275: 3167 0296 0138 subs r0, r0, #1 3168 0298 C4E91950 strd r5, r0, [r4, #100] 3169 029c 2368 ldr r3, [r4] 1844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3170 .loc 1 1844 0 3171 029e 0028 cmp r0, #0 3172 02a0 7FF4DBAE bne .L274 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3173 .loc 1 1846 0 3174 02a4 D86C ldr r0, [r3, #76] 3175 02a6 4B4E ldr r6, .L394+28 3176 .LVL276: 3177 02a8 3040 ands r0, r0, r6 3178 02aa 0543 orrs r5, r5, r0 3179 02ac DD64 str r5, [r3, #76] 3180 .LVL277: 3181 .LBB472: 3182 .LBB418: 3183 .loc 2 7071 0 3184 02ae 9868 ldr r0, [r3, #8] 3185 02b0 0007 lsls r0, r0, #28 3186 02b2 3FF5E6AE bmi .L279 3187 02b6 D3E6 b .L385 3188 .LVL278: 3189 .L386: 3190 .LBE418: 3191 .LBE472: 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3192 .loc 1 1895 0 3193 02b8 CE6A ldr r6, [r1, #44] 3194 02ba 002E cmp r6, #0 3195 02bc 3FF447AF beq .L283 1910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3196 .loc 1 1910 0 3197 02c0 0128 cmp r0, #1 3198 02c2 00F02981 beq .L389 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3199 .loc 1 1919 0 3200 02c6 D868 ldr r0, [r3, #12] 3201 02c8 20F00070 bic r0, r0, #33554432 3202 02cc D860 str r0, [r3, #12] 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 3203 .loc 1 1670 0 3204 02ce 2846 mov r0, r5 ARM GAS /tmp/ccZL5Rsh.s page 224 3205 02d0 46E7 b .L286 3206 .LVL279: 3207 .L337: 1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3208 .loc 1 1722 0 3209 02d2 0220 movs r0, #2 3210 .LVL280: 3211 .loc 1 2096 0 3212 02d4 03B0 add sp, sp, #12 3213 .LCFI59: 3214 .cfi_remember_state 3215 .cfi_def_cfa_offset 28 3216 @ sp needed 3217 02d6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 3218 .LVL281: 3219 .L384: 3220 .LCFI60: 3221 .cfi_restore_state 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 3222 .loc 1 2028 0 3223 02da BCF1000F cmp ip, #0 3224 02de 2BD1 bne .L312 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 3225 .loc 1 2028 0 is_stmt 0 discriminator 1 3226 02e0 920E lsrs r2, r2, #26 3227 02e2 0132 adds r2, r2, #1 3228 02e4 02F01F06 and r6, r2, #31 3229 02e8 0125 movs r5, #1 3230 02ea 9206 lsls r2, r2, #26 3231 02ec 02F0F842 and r2, r2, #2080374784 3232 02f0 B540 lsls r5, r5, r6 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 3233 .loc 1 2027 0 is_stmt 1 discriminator 1 3234 02f2 092E cmp r6, #9 3235 02f4 45EA0205 orr r5, r5, r2 3236 02f8 06EB4602 add r2, r6, r6, lsl #1 3237 02fc 46D9 bls .L380 3238 .L381: 3239 02fe 1E3A subs r2, r2, #30 3240 0300 1205 lsls r2, r2, #20 3241 0302 42F00072 orr r2, r2, #33554432 3242 .L322: 3243 .LVL282: 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 3244 .loc 1 2027 0 is_stmt 0 discriminator 2 3245 0306 2A43 orrs r2, r2, r5 3246 .LVL283: 3247 .LBB473: 3248 .LBB474: 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3249 .loc 2 5337 0 is_stmt 1 discriminator 2 3250 0308 4FEAD25C lsr ip, r2, #23 3251 030c 0CF0040C and ip, ip, #4 3252 0310 03F11407 add r7, r3, #20 3253 .LVL284: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 3254 .loc 2 5339 0 discriminator 2 ARM GAS /tmp/ccZL5Rsh.s page 225 3255 0314 C2F30452 ubfx r2, r2, #20, #5 3256 .LVL285: 3257 0318 5CF80750 ldr r5, [ip, r7] 3258 031c 8E68 ldr r6, [r1, #8] 3259 031e 4FF0070E mov lr, #7 3260 0322 0EFA02FE lsl lr, lr, r2 3261 0326 25EA0E05 bic r5, r5, lr 3262 032a 06FA02F2 lsl r2, r6, r2 3263 032e 2A43 orrs r2, r2, r5 3264 0330 4CF80720 str r2, [ip, r7] 3265 .LVL286: 3266 0334 0A68 ldr r2, [r1] 3267 0336 C2E6 b .L311 3268 .LVL287: 3269 .L312: 3270 .LBE474: 3271 .LBE473: 3272 .LBB475: 3273 .LBB476: 3274 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccZL5Rsh.s page 226 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE ARM GAS /tmp/ccZL5Rsh.s page 227 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable ARM GAS /tmp/ccZL5Rsh.s page 228 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccZL5Rsh.s page 229 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccZL5Rsh.s page 230 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccZL5Rsh.s page 231 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) ARM GAS /tmp/ccZL5Rsh.s page 232 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccZL5Rsh.s page 233 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); ARM GAS /tmp/ccZL5Rsh.s page 234 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccZL5Rsh.s page 235 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value ARM GAS /tmp/ccZL5Rsh.s page 236 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; ARM GAS /tmp/ccZL5Rsh.s page 237 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccZL5Rsh.s page 238 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccZL5Rsh.s page 239 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ ARM GAS /tmp/ccZL5Rsh.s page 240 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) ARM GAS /tmp/ccZL5Rsh.s page 241 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccZL5Rsh.s page 242 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; ARM GAS /tmp/ccZL5Rsh.s page 243 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 3275 .loc 3 1055 0 discriminator 2 3276 .syntax unified 3277 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3278 0338 92FAA2F5 rbit r5, r2 3279 @ 0 "" 2 3280 .LVL288: 3281 .thumb 3282 .syntax unified ARM GAS /tmp/ccZL5Rsh.s page 244 3283 .LBE476: 3284 .LBE475: 3285 .LBB477: 3286 .LBB478: 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 3287 .loc 3 1089 0 discriminator 2 3288 033c 002D cmp r5, #0 3289 033e 40F0BE80 bne .L390 3290 .L315: 3291 .LVL289: 3292 .LBE478: 3293 .LBE477: 3294 .LBB480: 3295 .LBB481: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3296 .loc 3 1055 0 discriminator 4 3297 .syntax unified 3298 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3299 0342 92FAA2F5 rbit r5, r2 3300 @ 0 "" 2 3301 .LVL290: 3302 .thumb 3303 .syntax unified 3304 .LBE481: ARM GAS /tmp/ccZL5Rsh.s page 245 3305 .LBE480: 3306 .LBB482: 3307 .LBB483: 3308 .loc 3 1089 0 discriminator 4 3309 0346 002D cmp r5, #0 3310 0348 00F01481 beq .L339 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 3311 .loc 3 1093 0 3312 034c B5FA85F5 clz r5, r5 3313 0350 0135 adds r5, r5, #1 3314 0352 AD06 lsls r5, r5, #26 3315 0354 05F0F845 and r5, r5, #2080374784 3316 .L318: 3317 .LVL291: 3318 .LBE483: 3319 .LBE482: 3320 .LBB485: 3321 .LBB486: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3322 .loc 3 1055 0 3323 .syntax unified 3324 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3325 0358 92FAA2F6 rbit r6, r2 3326 @ 0 "" 2 3327 .LVL292: 3328 .thumb 3329 .syntax unified 3330 .LBE486: 3331 .LBE485: 3332 .LBB487: 3333 .LBB488: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3334 .loc 3 1089 0 3335 035c 002E cmp r6, #0 3336 035e 00F00781 beq .L340 3337 .loc 3 1093 0 3338 0362 B6FA86F6 clz r6, r6 3339 0366 0136 adds r6, r6, #1 3340 0368 06F01F06 and r6, r6, #31 3341 036c 0127 movs r7, #1 3342 036e 07FA06F6 lsl r6, r7, r6 3343 .L319: 3344 .LBE488: 3345 .LBE487: 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 3346 .loc 1 2028 0 3347 0372 3543 orrs r5, r5, r6 3348 .LVL293: 3349 .LBB490: 3350 .LBB491: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3351 .loc 3 1055 0 3352 .syntax unified 3353 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 ARM GAS /tmp/ccZL5Rsh.s page 246 3354 0374 92FAA2F2 rbit r2, r2 3355 @ 0 "" 2 3356 .LVL294: 3357 .thumb 3358 .syntax unified 3359 .LBE491: 3360 .LBE490: 3361 .LBB492: 3362 .LBB493: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3363 .loc 3 1089 0 3364 0378 002A cmp r2, #0 3365 037a 00F0F680 beq .L341 3366 .loc 3 1093 0 3367 037e B2FA82F2 clz r2, r2 3368 0382 0132 adds r2, r2, #1 3369 0384 02F01F02 and r2, r2, #31 3370 0388 02EB4202 add r2, r2, r2, lsl #1 3371 .L380: 3372 038c 1205 lsls r2, r2, #20 3373 038e BAE7 b .L322 3374 .LVL295: 3375 .L332: 3376 .LBE493: 3377 .LBE492: 2076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 3378 .loc 1 2076 0 3379 0390 134E ldr r6, .L394+40 3380 0392 B242 cmp r2, r6 3381 0394 7FF4B2AE bne .L327 2077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3382 .loc 1 2077 0 3383 0398 4902 lsls r1, r1, #9 3384 039a 3FF5AFAE bmi .L327 2079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3385 .loc 1 2079 0 3386 039e 0C4A ldr r2, .L394+24 3387 03a0 9342 cmp r3, r2 3388 03a2 3FF4ABAE beq .L327 3389 .LVL296: 3390 .LBB495: 3391 .LBB496: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3392 .loc 2 2799 0 3393 03a6 AB68 ldr r3, [r5, #8] 3394 03a8 23F0E073 bic r3, r3, #29360128 3395 03ac 1F43 orrs r7, r7, r3 3396 .LVL297: 3397 03ae 47F48007 orr r7, r7, #4194304 3398 03b2 AF60 str r7, [r5, #8] 3399 03b4 A2E6 b .L327 3400 .L395: 3401 03b6 00BF .align 2 3402 .L394: 3403 03b8 FFFF0700 .word 524287 3404 03bc 00000880 .word -2146959360 3405 03c0 00030050 .word 1342178048 ARM GAS /tmp/ccZL5Rsh.s page 247 3406 03c4 000021C3 .word -1021247488 3407 03c8 1000C090 .word -1866465264 3408 03cc 000052C7 .word -950927360 3409 03d0 00010050 .word 1342177536 3410 03d4 00401004 .word 68173824 3411 03d8 00000000 .word SystemCoreClock 3412 03dc 632D3E05 .word 87960931 3413 03e0 000084CB .word -880541696 3414 03e4 00007F40 .word 1082064896 3415 03e8 00F0FF03 .word 67104768 3416 .LVL298: 3417 .L388: 3418 .LBE496: 3419 .LBE495: 3420 .LBB497: 3421 .LBB446: 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 3422 .loc 2 5339 0 3423 03ec 1640 ands r6, r6, r2 3424 03ee 4EF80C60 str r6, [lr, ip] 3425 .LVL299: 3426 .LBE446: 3427 .LBE497: 3428 .LBB498: 3429 .LBB499: 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3430 .loc 2 3563 0 3431 03f2 5A69 ldr r2, [r3, #20] 3432 03f4 42F00042 orr r2, r2, #-2147483648 3433 03f8 5A61 str r2, [r3, #20] 3434 03fa D7E6 b .L291 3435 .LVL300: 3436 .L387: 3437 .LBE499: 3438 .LBE498: 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 3439 .loc 1 1936 0 3440 03fc 8F6B ldr r7, [r1, #56] 3441 03fe 4E6B ldr r6, [r1, #52] 3442 0400 D3F810C0 ldr ip, [r3, #16] 3443 0404 3E43 orrs r6, r6, r7 3444 0406 46F00206 orr r6, r6, #2 3445 040a 2CF4FF77 bic r7, ip, #510 3446 040e 3E43 orrs r6, r6, r7 3447 0410 1E61 str r6, [r3, #16] 3448 0412 AEE6 b .L289 3449 .LVL301: 3450 .L292: 3451 .LBB500: 3452 .LBB501: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3453 .loc 2 3308 0 3454 0414 1D6E ldr r5, [r3, #96] 3455 .LVL302: 3456 .LBE501: 3457 .LBE500: 3458 .LBB502: ARM GAS /tmp/ccZL5Rsh.s page 248 3459 .LBB503: 3460 0416 1D6E ldr r5, [r3, #96] 3461 .LVL303: 3462 .LBE503: 3463 .LBE502: 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3464 .loc 1 1991 0 3465 0418 C2F3120C ubfx ip, r2, #0, #19 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3466 .loc 1 1990 0 3467 041c C5F38465 ubfx r5, r5, #26, #5 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3468 .loc 1 1991 0 3469 0420 BCF1000F cmp ip, #0 3470 0424 75D0 beq .L391 3471 .LVL304: 3472 .LBB504: 3473 .LBB505: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3474 .loc 3 1055 0 discriminator 2 3475 .syntax unified 3476 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3477 0426 92FAA2F7 rbit r7, r2 3478 @ 0 "" 2 3479 .LVL305: 3480 .thumb 3481 .syntax unified 3482 .LBE505: 3483 .LBE504: 3484 .LBB506: 3485 .LBB507: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3486 .loc 3 1089 0 discriminator 2 3487 042a 57B1 cbz r7, .L297 3488 .loc 3 1093 0 3489 042c B7FA87F7 clz r7, r7 3490 .L296: 3491 .LBE507: 3492 .LBE506: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3493 .loc 1 1990 0 3494 0430 BD42 cmp r5, r7 3495 0432 06D1 bne .L297 3496 .LVL306: 3497 .LBB508: 3498 .LBB509: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3499 .loc 2 3367 0 3500 0434 1A6E ldr r2, [r3, #96] 3501 0436 22F00042 bic r2, r2, #-2147483648 3502 043a 1A66 str r2, [r3, #96] 3503 043c 0A68 ldr r2, [r1] 3504 043e C2F3120C ubfx ip, r2, #0, #19 3505 .LVL307: 3506 .L297: 3507 .LBE509: 3508 .LBE508: ARM GAS /tmp/ccZL5Rsh.s page 249 3509 .LBB510: 3510 .LBB511: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3511 .loc 2 3308 0 3512 0442 7568 ldr r5, [r6, #4] 3513 .LVL308: 3514 .LBE511: 3515 .LBE510: 3516 .LBB512: 3517 .LBB513: 3518 0444 7768 ldr r7, [r6, #4] 3519 .LVL309: 3520 .LBE513: 3521 .LBE512: 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3522 .loc 1 1995 0 3523 0446 C7F38467 ubfx r7, r7, #26, #5 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3524 .loc 1 1996 0 3525 044a BCF1000F cmp ip, #0 3526 044e 68D1 bne .L298 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3527 .loc 1 1996 0 is_stmt 0 discriminator 1 3528 0450 C2F38465 ubfx r5, r2, #26, #5 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3529 .loc 1 1995 0 is_stmt 1 discriminator 1 3530 0454 AF42 cmp r7, r5 3531 0456 40F09D80 bne .L392 3532 .L299: 3533 .LVL310: 3534 .LBB514: 3535 .LBB515: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3536 .loc 2 3367 0 3537 045a 7268 ldr r2, [r6, #4] 3538 045c 22F00042 bic r2, r2, #-2147483648 3539 0460 7260 str r2, [r6, #4] 3540 .LVL311: 3541 .LBE515: 3542 .LBE514: 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3543 .loc 1 2001 0 3544 0462 0A68 ldr r2, [r1] 3545 .LBB516: 3546 .LBB517: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3547 .loc 2 3308 0 3548 0464 B568 ldr r5, [r6, #8] 3549 .LVL312: 3550 .LBE517: 3551 .LBE516: 3552 .LBB520: 3553 .LBB521: 3554 0466 B768 ldr r7, [r6, #8] 3555 .LVL313: 3556 .LBE521: 3557 .LBE520: ARM GAS /tmp/ccZL5Rsh.s page 250 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3558 .loc 1 2001 0 3559 0468 C2F31205 ubfx r5, r2, #0, #19 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3560 .loc 1 2000 0 3561 046c C7F38467 ubfx r7, r7, #26, #5 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3562 .loc 1 2001 0 3563 0470 002D cmp r5, #0 3564 0472 61D1 bne .L302 3565 0474 C2F38465 ubfx r5, r2, #26, #5 3566 .LVL314: 3567 .L334: 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3568 .loc 1 2000 0 discriminator 1 3569 0478 AF42 cmp r7, r5 3570 047a 06F10C0C add ip, r6, #12 3571 047e 40F08480 bne .L393 3572 .L303: 3573 .LVL315: 3574 .LBB524: 3575 .LBB525: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3576 .loc 2 3367 0 3577 0482 B268 ldr r2, [r6, #8] 3578 0484 22F00042 bic r2, r2, #-2147483648 3579 0488 B260 str r2, [r6, #8] 3580 .LVL316: 3581 .LBE525: 3582 .LBE524: 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3583 .loc 1 2006 0 3584 048a 0A68 ldr r2, [r1] 3585 .LBB526: 3586 .LBB527: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3587 .loc 2 3308 0 3588 048c DCF80050 ldr r5, [ip] 3589 .LVL317: 3590 .LBE527: 3591 .LBE526: 3592 .LBB530: 3593 .LBB531: 3594 0490 DCF80060 ldr r6, [ip] 3595 .LVL318: 3596 .LBE531: 3597 .LBE530: 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3598 .loc 1 2006 0 3599 0494 C2F31205 ubfx r5, r2, #0, #19 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3600 .loc 1 2005 0 3601 0498 C6F38466 ubfx r6, r6, #26, #5 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3602 .loc 1 2006 0 3603 049c 002D cmp r5, #0 3604 049e 5AD1 bne .L307 ARM GAS /tmp/ccZL5Rsh.s page 251 3605 04a0 C2F38465 ubfx r5, r2, #26, #5 3606 .LVL319: 3607 .L308: 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3608 .loc 1 2005 0 3609 04a4 B542 cmp r5, r6 3610 04a6 7FF4F2AD bne .L294 3611 .LVL320: 3612 .LBB534: 3613 .LBB535: 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3614 .loc 2 3367 0 3615 04aa DCF80020 ldr r2, [ip] 3616 04ae 22F00042 bic r2, r2, #-2147483648 3617 04b2 CCF80020 str r2, [ip] 3618 04b6 0A68 ldr r2, [r1] 3619 04b8 E9E5 b .L294 3620 .LVL321: 3621 .L338: 3622 .LBE535: 3623 .LBE534: 1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3624 .loc 1 1821 0 3625 04ba 1846 mov r0, r3 3626 04bc C2E5 b .L278 3627 .LVL322: 3628 .L390: 3629 .LBB536: 3630 .LBB479: 3631 .loc 3 1093 0 3632 04be B5FA85F5 clz r5, r5 3633 .LBE479: 3634 .LBE536: 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 3635 .loc 1 2027 0 3636 04c2 0135 adds r5, r5, #1 3637 04c4 05F01F05 and r5, r5, #31 3638 04c8 092D cmp r5, #9 3639 04ca 7FF63AAF bls .L315 3640 .LVL323: 3641 .LBB537: 3642 .LBB538: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3643 .loc 3 1055 0 discriminator 14 3644 .syntax unified 3645 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3646 04ce 92FAA2F5 rbit r5, r2 3647 @ 0 "" 2 3648 .LVL324: 3649 .thumb 3650 .syntax unified 3651 .LBE538: 3652 .LBE537: 3653 .LBB539: 3654 .LBB540: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3655 .loc 3 1089 0 discriminator 14 ARM GAS /tmp/ccZL5Rsh.s page 252 3656 04d2 002D cmp r5, #0 3657 04d4 53D0 beq .L342 3658 .loc 3 1093 0 3659 04d6 B5FA85F5 clz r5, r5 3660 04da 0135 adds r5, r5, #1 3661 04dc AD06 lsls r5, r5, #26 3662 04de 05F0F845 and r5, r5, #2080374784 3663 .L323: 3664 .LVL325: 3665 .LBE540: 3666 .LBE539: 3667 .LBB542: 3668 .LBB543: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3669 .loc 3 1055 0 3670 .syntax unified 3671 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3672 04e2 92FAA2F6 rbit r6, r2 3673 @ 0 "" 2 3674 .LVL326: 3675 .thumb 3676 .syntax unified 3677 .LBE543: 3678 .LBE542: 3679 .LBB544: 3680 .LBB545: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3681 .loc 3 1089 0 3682 04e6 002E cmp r6, #0 3683 04e8 47D0 beq .L343 3684 .loc 3 1093 0 3685 04ea B6FA86F6 clz r6, r6 3686 04ee 0136 adds r6, r6, #1 3687 04f0 06F01F06 and r6, r6, #31 3688 04f4 0127 movs r7, #1 3689 04f6 07FA06F6 lsl r6, r7, r6 3690 .L324: 3691 .LBE545: 3692 .LBE544: 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 3693 .loc 1 2028 0 3694 04fa 3543 orrs r5, r5, r6 3695 .LVL327: 3696 .LBB547: 3697 .LBB548: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3698 .loc 3 1055 0 3699 .syntax unified 3700 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3701 04fc 92FAA2F2 rbit r2, r2 3702 @ 0 "" 2 3703 .LVL328: 3704 .thumb 3705 .syntax unified 3706 .LBE548: 3707 .LBE547: 3708 .LBB549: ARM GAS /tmp/ccZL5Rsh.s page 253 3709 .LBB550: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3710 .loc 3 1089 0 3711 0500 8AB3 cbz r2, .L344 3712 .loc 3 1093 0 3713 0502 B2FA82F2 clz r2, r2 3714 0506 0132 adds r2, r2, #1 3715 0508 02F01F02 and r2, r2, #31 3716 050c 02EB4202 add r2, r2, r2, lsl #1 3717 0510 F5E6 b .L381 3718 .LVL329: 3719 .L391: 3720 .LBE550: 3721 .LBE549: 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3722 .loc 1 1991 0 discriminator 1 3723 0512 C2F38467 ubfx r7, r2, #26, #5 3724 .LVL330: 3725 0516 8BE7 b .L296 3726 .LVL331: 3727 .L389: 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3728 .loc 1 1913 0 3729 0518 E66D ldr r6, [r4, #92] 3730 051a 46F02006 orr r6, r6, #32 3731 051e E665 str r6, [r4, #92] 3732 .LVL332: 3733 0520 1EE6 b .L286 3734 .LVL333: 3735 .L298: 3736 .LBB552: 3737 .LBB553: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3738 .loc 3 1055 0 discriminator 2 3739 .syntax unified 3740 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3741 0522 92FAA2F5 rbit r5, r2 3742 @ 0 "" 2 3743 .LVL334: 3744 .thumb 3745 .syntax unified 3746 .LBE553: 3747 .LBE552: 3748 .LBB554: 3749 .LBB555: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3750 .loc 3 1089 0 discriminator 2 3751 0526 1DB1 cbz r5, .L301 3752 .loc 3 1093 0 3753 0528 B5FA85F5 clz r5, r5 3754 .LBE555: 3755 .LBE554: 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3756 .loc 1 1995 0 3757 052c AF42 cmp r7, r5 3758 052e 94D0 beq .L299 3759 .L301: ARM GAS /tmp/ccZL5Rsh.s page 254 3760 .LVL335: 3761 .LBB556: 3762 .LBB518: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3763 .loc 2 3308 0 3764 0530 B568 ldr r5, [r6, #8] 3765 .LVL336: 3766 .LBE518: 3767 .LBE556: 3768 .LBB557: 3769 .LBB522: 3770 0532 B768 ldr r7, [r6, #8] 3771 .LVL337: 3772 .LBE522: 3773 .LBE557: 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3774 .loc 1 2000 0 3775 0534 C7F38467 ubfx r7, r7, #26, #5 3776 .L302: 3777 .LVL338: 3778 .LBB558: 3779 .LBB559: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3780 .loc 3 1055 0 discriminator 2 3781 .syntax unified 3782 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3783 0538 92FAA2F5 rbit r5, r2 3784 @ 0 "" 2 3785 .LVL339: 3786 .thumb 3787 .syntax unified 3788 .LBE559: 3789 .LBE558: 3790 .LBB560: 3791 .LBB561: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3792 .loc 3 1089 0 discriminator 2 3793 053c 15B3 cbz r5, .L305 3794 .loc 3 1093 0 3795 053e B5FA85F5 clz r5, r5 3796 .LBE561: 3797 .LBE560: 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3798 .loc 1 2000 0 3799 0542 AF42 cmp r7, r5 3800 0544 06F10C0C add ip, r6, #12 3801 0548 9BD0 beq .L303 3802 .L306: 3803 .LVL340: 3804 .LBB562: 3805 .LBB528: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3806 .loc 2 3308 0 3807 054a DCF80050 ldr r5, [ip] 3808 .LVL341: 3809 .LBE528: 3810 .LBE562: ARM GAS /tmp/ccZL5Rsh.s page 255 3811 .LBB563: 3812 .LBB532: 3813 054e DCF80060 ldr r6, [ip] 3814 .LVL342: 3815 .LBE532: 3816 .LBE563: 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3817 .loc 1 2005 0 3818 0552 C6F38466 ubfx r6, r6, #26, #5 3819 .L307: 3820 .LVL343: 3821 .LBB564: 3822 .LBB565: 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3823 .loc 3 1055 0 discriminator 2 3824 .syntax unified 3825 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3826 0556 92FAA2F5 rbit r5, r2 3827 @ 0 "" 2 3828 .LVL344: 3829 .thumb 3830 .syntax unified 3831 .LBE565: 3832 .LBE564: 3833 .LBB566: 3834 .LBB567: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3835 .loc 3 1089 0 discriminator 2 3836 055a 002D cmp r5, #0 3837 055c 3FF497AD beq .L294 3838 .loc 3 1093 0 3839 0560 B5FA85F5 clz r5, r5 3840 0564 9EE7 b .L308 3841 .L344: 3842 .LBE567: 3843 .LBE566: 3844 .LBB568: 3845 .LBB551: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3846 .loc 3 1089 0 3847 0566 0E4A ldr r2, .L396 3848 0568 CDE6 b .L322 3849 .L341: 3850 .LBE551: 3851 .LBE568: 3852 .LBB569: 3853 .LBB494: 3854 056a 4FF44012 mov r2, #3145728 3855 056e CAE6 b .L322 3856 .L340: 3857 .LBE494: 3858 .LBE569: 3859 .LBB570: 3860 .LBB489: 3861 0570 0226 movs r6, #2 3862 0572 FEE6 b .L319 3863 .L339: ARM GAS /tmp/ccZL5Rsh.s page 256 3864 .LBE489: 3865 .LBE570: 3866 .LBB571: 3867 .LBB484: 3868 0574 4FF08065 mov r5, #67108864 3869 0578 EEE6 b .L318 3870 .L343: 3871 .LBE484: 3872 .LBE571: 3873 .LBB572: 3874 .LBB546: 3875 057a 0226 movs r6, #2 3876 057c BDE7 b .L324 3877 .L342: 3878 .LBE546: 3879 .LBE572: 3880 .LBB573: 3881 .LBB541: 3882 057e 4FF08065 mov r5, #67108864 3883 0582 AEE7 b .L323 3884 .L305: 3885 0584 06F10C0C add ip, r6, #12 3886 0588 DFE7 b .L306 3887 .L393: 3888 .LVL345: 3889 .LBE541: 3890 .LBE573: 3891 .LBB574: 3892 .LBB529: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3893 .loc 2 3308 0 3894 058a F768 ldr r7, [r6, #12] 3895 .LVL346: 3896 .LBE529: 3897 .LBE574: 3898 .LBB575: 3899 .LBB533: 3900 058c F668 ldr r6, [r6, #12] 3901 .LVL347: 3902 .LBE533: 3903 .LBE575: 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3904 .loc 1 2005 0 3905 058e C6F38466 ubfx r6, r6, #26, #5 3906 0592 87E7 b .L308 3907 .L392: 3908 .LVL348: 3909 .LBB576: 3910 .LBB519: 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3911 .loc 2 3308 0 3912 0594 B768 ldr r7, [r6, #8] 3913 .LVL349: 3914 .LBE519: 3915 .LBE576: 3916 .LBB577: 3917 .LBB523: ARM GAS /tmp/ccZL5Rsh.s page 257 3918 0596 B768 ldr r7, [r6, #8] 3919 .LVL350: 3920 .LBE523: 3921 .LBE577: 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3922 .loc 1 2000 0 3923 0598 C7F38467 ubfx r7, r7, #26, #5 3924 059c 6CE7 b .L334 3925 .L397: 3926 059e 00BF .align 2 3927 .L396: 3928 05a0 000050FE .word -28311552 3929 .cfi_endproc 3930 .LFE350: 3932 .section .text.HAL_ADCEx_MultiModeConfigChannel,"ax",%progbits 3933 .align 1 3934 .p2align 2,,3 3935 .global HAL_ADCEx_MultiModeConfigChannel 3936 .syntax unified 3937 .thumb 3938 .thumb_func 3939 .fpu fpv4-sp-d16 3941 HAL_ADCEx_MultiModeConfigChannel: 3942 .LFB351: 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC multimode and configure multimode parameters 2101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 2102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes multimode parameters, following 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calls to this function can be used to reconfigure some parameters 2104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * of structure "ADC_MultiModeTypeDef" on the fly, without resetting 2105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * the ADCs. 2106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state. 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For parameters constraints, see comments of structure 2108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_MultiModeTypeDef". 2109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To move back configuration from multimode to single mode, ADC must 2110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be reset (using function HAL_ADC_Init() ). 2111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc Master ADC handle 2112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param multimode Structure of ADC multimode configuration 2113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *m 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3943 .loc 1 2116 0 3944 .cfi_startproc 3945 @ args = 0, pretend = 0, frame = 112 3946 @ frame_needed = 0, uses_anonymous_args = 0 3947 .LVL351: 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 2119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 2120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 2121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 2124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE(multimode->Mode)); ARM GAS /tmp/ccZL5Rsh.s page 258 2125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT) 2126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode)); 2128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); 2129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 3948 .loc 1 2132 0 3949 0000 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 3950 0004 012A cmp r2, #1 3951 0006 4BD0 beq .L409 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3952 .loc 1 2116 0 discriminator 2 3953 0008 F0B5 push {r4, r5, r6, r7, lr} 3954 .LCFI61: 3955 .cfi_def_cfa_offset 20 3956 .cfi_offset 4, -20 3957 .cfi_offset 5, -16 3958 .cfi_offset 6, -12 3959 .cfi_offset 7, -8 3960 .cfi_offset 14, -4 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 2137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 3961 .loc 1 2138 0 discriminator 2 3962 000a 0468 ldr r4, [r0] 2125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3963 .loc 1 2125 0 discriminator 2 3964 000c 0E68 ldr r6, [r1] 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3965 .loc 1 2116 0 discriminator 2 3966 000e 9DB0 sub sp, sp, #116 3967 .LCFI62: 3968 .cfi_def_cfa_offset 136 3969 0010 0346 mov r3, r0 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 3970 .loc 1 2135 0 discriminator 2 3971 0012 0022 movs r2, #0 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3972 .loc 1 2132 0 discriminator 2 3973 0014 0120 movs r0, #1 3974 .LVL352: 3975 .loc 1 2138 0 discriminator 2 3976 0016 B4F1A04F cmp r4, #1342177280 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 3977 .loc 1 2135 0 discriminator 2 3978 001a 1892 str r2, [sp, #96] 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3979 .loc 1 2132 0 discriminator 2 3980 001c 83F85800 strb r0, [r3, #88] 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3981 .loc 1 2136 0 discriminator 2 3982 0020 1992 str r2, [sp, #100] ARM GAS /tmp/ccZL5Rsh.s page 259 3983 .loc 1 2138 0 discriminator 2 3984 0022 07D0 beq .L400 2139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 2141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 2143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 3985 .loc 1 2143 0 3986 0024 D96D ldr r1, [r3, #92] 3987 .LVL353: 2144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 3988 .loc 1 2146 0 3989 0026 83F85820 strb r2, [r3, #88] 2143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3990 .loc 1 2143 0 3991 002a 41F02001 orr r1, r1, #32 3992 002e D965 str r1, [r3, #92] 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 2153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular group: */ 2154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA configuration */ 2155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA mode */ 2156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 2157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmphadcSlave_conversion_on_going == 0UL)) 2159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 2161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 2162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If multimode is selected, configure all multimode parameters. */ 2164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Otherwise, reset multimode parameters (can be used in case of */ 2165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* transition from multimode to independent mode). */ 2166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT) 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, 2169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->DMAAccessMode | 2170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Delay range depends on selected resolution: */ 2176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 12 clock cycles for 12 bits */ 2177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 10 clock cycles for 10 bits, */ 2178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 8 clock cycles for 8 bits */ 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 6 clock cycles for 6 bits */ 2180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If a higher delay is selected, it will be clipped to maximum delay */ 2181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* range */ 2182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 2183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, ARM GAS /tmp/ccZL5Rsh.s page 260 2185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DUAL | 2186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DELAY, 2187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->Mode | 2188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->TwoSamplingDelay 2189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 2190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* ADC_MODE_INDEPENDENT */ 2193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG); 2195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 2200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY); 2202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If one of the ADC sharing the same common group is enabled, no update */ 2206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* could be done on neither of the multimode structure parameters. */ 2207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 2211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 2213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3993 .loc 1 2220 0 3994 0030 1DB0 add sp, sp, #116 3995 .LCFI63: 3996 .cfi_remember_state 3997 .cfi_def_cfa_offset 20 3998 @ sp needed 3999 0032 F0BD pop {r4, r5, r6, r7, pc} 4000 .LVL354: 4001 .L400: 4002 .LCFI64: 4003 .cfi_restore_state 4004 .LBB578: 4005 .LBB579: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4006 .loc 2 6846 0 4007 0034 274D ldr r5, .L417 4008 0036 AA68 ldr r2, [r5, #8] 4009 0038 5207 lsls r2, r2, #29 4010 003a 0AD5 bpl .L416 4011 .LVL355: 4012 .LBE579: ARM GAS /tmp/ccZL5Rsh.s page 261 4013 .LBE578: 4014 .LBB580: 4015 .LBB581: 4016 003c A268 ldr r2, [r4, #8] 4017 .L401: 4018 .LBE581: 4019 .LBE580: 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4020 .loc 1 2210 0 4021 003e DA6D ldr r2, [r3, #92] 4022 0040 42F02002 orr r2, r2, #32 4023 0044 DA65 str r2, [r3, #92] 4024 .LVL356: 2212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4025 .loc 1 2212 0 4026 0046 0120 movs r0, #1 4027 .LVL357: 4028 .L405: 2216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4029 .loc 1 2216 0 4030 0048 0022 movs r2, #0 4031 004a 83F85820 strb r2, [r3, #88] 4032 .loc 1 2220 0 4033 004e 1DB0 add sp, sp, #116 4034 .LCFI65: 4035 .cfi_remember_state 4036 .cfi_def_cfa_offset 20 4037 @ sp needed 4038 0050 F0BD pop {r4, r5, r6, r7, pc} 4039 .LVL358: 4040 .L416: 4041 .LCFI66: 4042 .cfi_restore_state 4043 .LBB583: 4044 .LBB582: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4045 .loc 2 6846 0 4046 0052 A068 ldr r0, [r4, #8] 4047 0054 10F00400 ands r0, r0, #4 4048 0058 F1D1 bne .L401 4049 .LVL359: 4050 .LBE582: 4051 .LBE583: 2166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4052 .loc 1 2166 0 4053 005a 1EB3 cbz r6, .L402 2168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->DMAAccessMode | 4054 .loc 1 2168 0 4055 005c DFF878E0 ldr lr, .L417+4 4056 0060 4F68 ldr r7, [r1, #4] 4057 0062 DEF80820 ldr r2, [lr, #8] 4058 0066 93F838C0 ldrb ip, [r3, #56] @ zero_extendqisi2 4059 006a 22F46042 bic r2, r2, #57344 4060 006e 3A43 orrs r2, r2, r7 4061 0070 42EA4C32 orr r2, r2, ip, lsl #13 4062 0074 CEF80820 str r2, [lr, #8] 4063 .LVL360: ARM GAS /tmp/ccZL5Rsh.s page 262 4064 .LBB584: 4065 .LBB585: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4066 .loc 2 6724 0 4067 0078 A268 ldr r2, [r4, #8] 4068 007a D407 lsls r4, r2, #31 4069 007c 27D4 bmi .L403 4070 .LVL361: 4071 .LBE585: 4072 .LBE584: 4073 .LBB586: 4074 .LBB587: 4075 007e A868 ldr r0, [r5, #8] 4076 0080 10F00100 ands r0, r0, #1 4077 0084 21D1 bne .L406 4078 .LVL362: 4079 .LBE587: 4080 .LBE586: 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DUAL | 4081 .loc 1 2184 0 4082 0086 DEF80820 ldr r2, [lr, #8] 4083 008a 8C68 ldr r4, [r1, #8] 4084 008c 22F47161 bic r1, r2, #3856 4085 .LVL363: 4086 0090 21F00F01 bic r1, r1, #15 4087 0094 46EA0402 orr r2, r6, r4 4088 0098 0A43 orrs r2, r2, r1 4089 009a CEF80820 str r2, [lr, #8] 4090 009e D3E7 b .L405 4091 .LVL364: 4092 .L409: 4093 .LCFI67: 4094 .cfi_def_cfa_offset 0 4095 .cfi_restore 4 4096 .cfi_restore 5 4097 .cfi_restore 6 4098 .cfi_restore 7 4099 .cfi_restore 14 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4100 .loc 1 2132 0 4101 00a0 0220 movs r0, #2 4102 .LVL365: 4103 .loc 1 2220 0 4104 00a2 7047 bx lr 4105 .LVL366: 4106 .L402: 4107 .LCFI68: 4108 .cfi_def_cfa_offset 136 4109 .cfi_offset 4, -20 4110 .cfi_offset 5, -16 4111 .cfi_offset 6, -12 4112 .cfi_offset 7, -8 4113 .cfi_offset 14, -4 2194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4114 .loc 1 2194 0 4115 00a4 0C4A ldr r2, .L417+4 4116 00a6 9168 ldr r1, [r2, #8] ARM GAS /tmp/ccZL5Rsh.s page 263 4117 .LVL367: 4118 00a8 21F46041 bic r1, r1, #57344 4119 00ac 9160 str r1, [r2, #8] 4120 .LVL368: 4121 .LBB589: 4122 .LBB590: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4123 .loc 2 6724 0 4124 00ae A068 ldr r0, [r4, #8] 4125 .LBE590: 4126 .LBE589: 4127 .LBB592: 4128 .LBB593: 4129 00b0 A968 ldr r1, [r5, #8] 4130 00b2 C907 lsls r1, r1, #31 4131 .LBE593: 4132 .LBE592: 4133 .LBB595: 4134 .LBB591: 4135 00b4 00F00100 and r0, r0, #1 4136 .LVL369: 4137 .LBE591: 4138 .LBE595: 4139 .LBB596: 4140 .LBB594: 4141 00b8 07D4 bmi .L406 4142 .LVL370: 4143 .LBE594: 4144 .LBE596: 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4145 .loc 1 2199 0 4146 00ba 30B9 cbnz r0, .L406 2201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4147 .loc 1 2201 0 4148 00bc 9168 ldr r1, [r2, #8] 4149 00be 21F47161 bic r1, r1, #3856 4150 00c2 21F00F01 bic r1, r1, #15 4151 00c6 9160 str r1, [r2, #8] 4152 00c8 BEE7 b .L405 4153 .L406: 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 4154 .loc 1 2117 0 4155 00ca 0020 movs r0, #0 4156 00cc BCE7 b .L405 4157 .LVL371: 4158 .L403: 4159 .LBB597: 4160 .LBB588: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4161 .loc 2 6724 0 4162 00ce AA68 ldr r2, [r5, #8] 4163 00d0 BAE7 b .L405 4164 .L418: 4165 00d2 00BF .align 2 4166 .L417: 4167 00d4 00010050 .word 1342177536 4168 00d8 00030050 .word 1342178048 ARM GAS /tmp/ccZL5Rsh.s page 264 4169 .LBE588: 4170 .LBE597: 4171 .cfi_endproc 4172 .LFE351: 4174 .section .text.HAL_ADCEx_EnableInjectedQueue,"ax",%progbits 4175 .align 1 4176 .p2align 2,,3 4177 .global HAL_ADCEx_EnableInjectedQueue 4178 .syntax unified 4179 .thumb 4180 .thumb_func 4181 .fpu fpv4-sp-d16 4183 HAL_ADCEx_EnableInjectedQueue: 4184 .LFB352: 2221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 2222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable Injected Queue 2225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function resets CFGR register JQDIS bit in order to enable the 2226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc) 2233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4185 .loc 1 2233 0 4186 .cfi_startproc 4187 @ args = 0, pretend = 0, frame = 0 4188 @ frame_needed = 0, uses_anonymous_args = 0 4189 @ link register save eliminated. 4190 .LVL372: 2234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 2236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 2237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 4191 .loc 1 2241 0 4192 0000 0268 ldr r2, [r0] 4193 .LVL373: 4194 .LBB598: 4195 .LBB599: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4196 .loc 2 6846 0 4197 0002 9368 ldr r3, [r2, #8] 4198 0004 5B07 lsls r3, r3, #29 4199 .LBE599: 4200 .LBE598: 2233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 4201 .loc 1 2233 0 4202 0006 0146 mov r1, r0 4203 .LBB601: 4204 .LBB600: ARM GAS /tmp/ccZL5Rsh.s page 265 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4205 .loc 2 6846 0 4206 0008 02D5 bpl .L429 4207 .LVL374: 4208 .LBE600: 4209 .LBE601: 4210 .LBB602: 4211 .LBB603: 4212 .loc 2 7071 0 4213 000a 9368 ldr r3, [r2, #8] 4214 .L428: 4215 .LBE603: 4216 .LBE602: 2242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 2243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 2246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 2247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 2250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update state, clear previous result related to injected queue overflow */ 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); 2253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 4217 .loc 1 2258 0 4218 000c 0120 movs r0, #1 4219 .LVL375: 2259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4220 .loc 1 2262 0 4221 000e 7047 bx lr 4222 .LVL376: 4223 .L429: 4224 .LBB605: 4225 .LBB604: 4226 .loc 2 7071 0 4227 0010 9368 ldr r3, [r2, #8] 4228 0012 13F00803 ands r3, r3, #8 4229 0016 F9D1 bne .L428 4230 .LVL377: 4231 .LBE604: 4232 .LBE605: 2249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4233 .loc 1 2249 0 4234 0018 D068 ldr r0, [r2, #12] 4235 .LVL378: 4236 001a 20F00040 bic r0, r0, #-2147483648 4237 001e D060 str r0, [r2, #12] 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccZL5Rsh.s page 266 4238 .loc 1 2252 0 4239 0020 CA6D ldr r2, [r1, #92] 4240 0022 22F48042 bic r2, r2, #16384 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4241 .loc 1 2254 0 4242 0026 1846 mov r0, r3 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4243 .loc 1 2252 0 4244 0028 CA65 str r2, [r1, #92] 4245 .LVL379: 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4246 .loc 1 2254 0 4247 002a 7047 bx lr 4248 .cfi_endproc 4249 .LFE352: 4251 .section .text.HAL_ADCEx_DisableInjectedQueue,"ax",%progbits 4252 .align 1 4253 .p2align 2,,3 4254 .global HAL_ADCEx_DisableInjectedQueue 4255 .syntax unified 4256 .thumb 4257 .thumb_func 4258 .fpu fpv4-sp-d16 4260 HAL_ADCEx_DisableInjectedQueue: 4261 .LFB353: 2263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable Injected Queue 2266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function sets CFGR register JQDIS bit in order to disable the 2267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc) 2274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4262 .loc 1 2274 0 4263 .cfi_startproc 4264 @ args = 0, pretend = 0, frame = 0 4265 @ frame_needed = 0, uses_anonymous_args = 0 4266 @ link register save eliminated. 4267 .LVL380: 2275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 2277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 2278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 4268 .loc 1 2282 0 4269 0000 0368 ldr r3, [r0] 4270 .LVL381: 4271 .LBB606: 4272 .LBB607: 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccZL5Rsh.s page 267 4273 .loc 2 6846 0 4274 0002 9A68 ldr r2, [r3, #8] 4275 0004 5207 lsls r2, r2, #29 4276 0006 02D5 bpl .L440 4277 .LVL382: 4278 .LBE607: 4279 .LBE606: 4280 .LBB608: 4281 .LBB609: 4282 .loc 2 7071 0 4283 0008 9B68 ldr r3, [r3, #8] 4284 .LVL383: 4285 .L439: 4286 .LBE609: 4287 .LBE608: 2283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 2284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 2287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 2288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE); 2291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 4288 .loc 1 2295 0 4289 000a 0120 movs r0, #1 4290 .LVL384: 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4291 .loc 1 2299 0 4292 000c 7047 bx lr 4293 .LVL385: 4294 .L440: 4295 .LBB611: 4296 .LBB610: 4297 .loc 2 7071 0 4298 000e 9868 ldr r0, [r3, #8] 4299 .LVL386: 4300 0010 10F00800 ands r0, r0, #8 4301 0014 F9D1 bne .L439 4302 .LVL387: 4303 .LBE610: 4304 .LBE611: 4305 .LBB612: 4306 .LBB613: 4907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4307 .loc 2 4907 0 4308 0016 DA68 ldr r2, [r3, #12] 4309 0018 22F00042 bic r2, r2, #-2147483648 4310 001c 22F40012 bic r2, r2, #2097152 4311 0020 42F00042 orr r2, r2, #-2147483648 ARM GAS /tmp/ccZL5Rsh.s page 268 4312 0024 DA60 str r2, [r3, #12] 4313 .LVL388: 4314 .LBE613: 4315 .LBE612: 2291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4316 .loc 1 2291 0 4317 0026 7047 bx lr 4318 .cfi_endproc 4319 .LFE353: 4321 .section .text.HAL_ADCEx_DisableVoltageRegulator,"ax",%progbits 4322 .align 1 4323 .p2align 2,,3 4324 .global HAL_ADCEx_DisableVoltageRegulator 4325 .syntax unified 4326 .thumb 4327 .thumb_func 4328 .fpu fpv4-sp-d16 4330 HAL_ADCEx_DisableVoltageRegulator: 4331 .LFB354: 2300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable ADC voltage regulator. 2303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Disabling voltage regulator allows to save power. This operation can 2304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be carried out only when ADC is disabled. 2305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To enable again the voltage regulator, the user is expected to 2306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API. 2307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc) 2311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4332 .loc 1 2311 0 4333 .cfi_startproc 4334 @ args = 0, pretend = 0, frame = 0 4335 @ frame_needed = 0, uses_anonymous_args = 0 4336 @ link register save eliminated. 4337 .LVL389: 2312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 4338 .loc 1 2318 0 4339 0000 0268 ldr r2, [r0] 4340 .LVL390: 4341 .LBB614: 4342 .LBB615: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4343 .loc 2 6724 0 4344 0002 9068 ldr r0, [r2, #8] 4345 .LVL391: 4346 0004 10F00100 ands r0, r0, #1 4347 0008 06D1 bne .L443 4348 .LVL392: 4349 .LBE615: ARM GAS /tmp/ccZL5Rsh.s page 269 4350 .LBE614: 4351 .LBB616: 4352 .LBB617: 6653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4353 .loc 2 6653 0 4354 000a 9368 ldr r3, [r2, #8] 4355 000c 23F01043 bic r3, r3, #-1879048192 4356 0010 23F03F03 bic r3, r3, #63 4357 0014 9360 str r3, [r2, #8] 4358 .LVL393: 4359 .LBE617: 4360 .LBE616: 4361 0016 7047 bx lr 4362 .LVL394: 4363 .L443: 2319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_DisableInternalRegulator(hadc->Instance); 2321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 4364 .loc 1 2325 0 4365 0018 0120 movs r0, #1 4366 .LVL395: 2326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4367 .loc 1 2329 0 4368 001a 7047 bx lr 4369 .cfi_endproc 4370 .LFE354: 4372 .section .text.HAL_ADCEx_EnterADCDeepPowerDownMode,"ax",%progbits 4373 .align 1 4374 .p2align 2,,3 4375 .global HAL_ADCEx_EnterADCDeepPowerDownMode 4376 .syntax unified 4377 .thumb 4378 .thumb_func 4379 .fpu fpv4-sp-d16 4381 HAL_ADCEx_EnterADCDeepPowerDownMode: 4382 .LFB355: 2330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enter ADC deep-power-down mode 2333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This mode is achieved in setting DEEPPWD bit and allows to save power 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in reducing leakage currents. It is particularly interesting before 2335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * entering stop modes. 2336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the 2337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC voltage regulator. This means that this API encompasses 2338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal 2339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calibration is lost. 2340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To exit the ADC deep-power-down mode, the user is expected to 2341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API as well as to relaunch a calibration 2342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously 2343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * saved calibration factor. ARM GAS /tmp/ccZL5Rsh.s page 270 2344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc) 2348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4383 .loc 1 2348 0 4384 .cfi_startproc 4385 @ args = 0, pretend = 0, frame = 0 4386 @ frame_needed = 0, uses_anonymous_args = 0 4387 @ link register save eliminated. 4388 .LVL396: 2349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 4389 .loc 1 2355 0 4390 0000 0268 ldr r2, [r0] 4391 .LVL397: 4392 .LBB618: 4393 .LBB619: 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4394 .loc 2 6724 0 4395 0002 9068 ldr r0, [r2, #8] 4396 .LVL398: 4397 0004 10F00100 ands r0, r0, #1 4398 0008 08D1 bne .L446 4399 .LVL399: 4400 .LBE619: 4401 .LBE618: 4402 .LBB620: 4403 .LBB621: 6581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 4404 .loc 2 6581 0 4405 000a 9368 ldr r3, [r2, #8] 4406 000c 23F02043 bic r3, r3, #-1610612736 4407 0010 23F03F03 bic r3, r3, #63 4408 0014 43F00053 orr r3, r3, #536870912 4409 0018 9360 str r3, [r2, #8] 4410 .LVL400: 4411 .LBE621: 4412 .LBE620: 4413 001a 7047 bx lr 4414 .LVL401: 4415 .L446: 2356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_EnableDeepPowerDown(hadc->Instance); 2358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 4416 .loc 1 2362 0 4417 001c 0120 movs r0, #1 4418 .LVL402: ARM GAS /tmp/ccZL5Rsh.s page 271 2363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4419 .loc 1 2366 0 4420 001e 7047 bx lr 4421 .cfi_endproc 4422 .LFE355: 4424 .text 4425 .Letext0: 4426 .file 4 "/usr/include/newlib/machine/_default_types.h" 4427 .file 5 "/usr/include/newlib/sys/_stdint.h" 4428 .file 6 "Drivers/CMSIS/Include/core_cm4.h" 4429 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" 4430 .file 8 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 4431 .file 9 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 4432 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 4433 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h" 4434 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h" 4435 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h" 4436 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h" 4437 .file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h" 4438 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h" ARM GAS /tmp/ccZL5Rsh.s page 272 DEFINED SYMBOLS *ABS*:0000000000000000 stm32g4xx_hal_adc_ex.c /tmp/ccZL5Rsh.s:16 .text.HAL_ADCEx_Calibration_Start:0000000000000000 $t /tmp/ccZL5Rsh.s:24 .text.HAL_ADCEx_Calibration_Start:0000000000000000 HAL_ADCEx_Calibration_Start /tmp/ccZL5Rsh.s:173 .text.HAL_ADCEx_Calibration_Start:000000000000009c $d /tmp/ccZL5Rsh.s:178 .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 $t /tmp/ccZL5Rsh.s:186 .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 HAL_ADCEx_Calibration_GetValue /tmp/ccZL5Rsh.s:220 .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 $t /tmp/ccZL5Rsh.s:228 .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 HAL_ADCEx_Calibration_SetValue /tmp/ccZL5Rsh.s:380 .text.HAL_ADCEx_InjectedStart:0000000000000000 $t /tmp/ccZL5Rsh.s:388 .text.HAL_ADCEx_InjectedStart:0000000000000000 HAL_ADCEx_InjectedStart /tmp/ccZL5Rsh.s:584 .text.HAL_ADCEx_InjectedStart:00000000000000d0 $d /tmp/ccZL5Rsh.s:590 .text.HAL_ADCEx_InjectedStop:0000000000000000 $t /tmp/ccZL5Rsh.s:598 .text.HAL_ADCEx_InjectedStop:0000000000000000 HAL_ADCEx_InjectedStop /tmp/ccZL5Rsh.s:686 .text.HAL_ADCEx_InjectedPollForConversion:0000000000000000 $t /tmp/ccZL5Rsh.s:694 .text.HAL_ADCEx_InjectedPollForConversion:0000000000000000 HAL_ADCEx_InjectedPollForConversion /tmp/ccZL5Rsh.s:914 .text.HAL_ADCEx_InjectedPollForConversion:00000000000000e0 $d /tmp/ccZL5Rsh.s:920 .text.HAL_ADCEx_InjectedStart_IT:0000000000000000 $t /tmp/ccZL5Rsh.s:928 .text.HAL_ADCEx_InjectedStart_IT:0000000000000000 HAL_ADCEx_InjectedStart_IT /tmp/ccZL5Rsh.s:1150 .text.HAL_ADCEx_InjectedStart_IT:00000000000000f8 $d /tmp/ccZL5Rsh.s:1156 .text.HAL_ADCEx_InjectedStop_IT:0000000000000000 $t /tmp/ccZL5Rsh.s:1164 .text.HAL_ADCEx_InjectedStop_IT:0000000000000000 HAL_ADCEx_InjectedStop_IT /tmp/ccZL5Rsh.s:1255 .text.HAL_ADCEx_MultiModeStart_DMA:0000000000000000 $t /tmp/ccZL5Rsh.s:1263 .text.HAL_ADCEx_MultiModeStart_DMA:0000000000000000 HAL_ADCEx_MultiModeStart_DMA /tmp/ccZL5Rsh.s:1446 .text.HAL_ADCEx_MultiModeStart_DMA:00000000000000b8 $d /tmp/ccZL5Rsh.s:1457 .text.HAL_ADCEx_MultiModeStop_DMA:0000000000000000 $t /tmp/ccZL5Rsh.s:1465 .text.HAL_ADCEx_MultiModeStop_DMA:0000000000000000 HAL_ADCEx_MultiModeStop_DMA /tmp/ccZL5Rsh.s:1753 .text.HAL_ADCEx_MultiModeStop_DMA:0000000000000104 $d /tmp/ccZL5Rsh.s:1758 .text.HAL_ADCEx_MultiModeGetValue:0000000000000000 $t /tmp/ccZL5Rsh.s:1766 .text.HAL_ADCEx_MultiModeGetValue:0000000000000000 HAL_ADCEx_MultiModeGetValue /tmp/ccZL5Rsh.s:1783 .text.HAL_ADCEx_MultiModeGetValue:0000000000000008 $d /tmp/ccZL5Rsh.s:1788 .text.HAL_ADCEx_InjectedGetValue:0000000000000000 $t /tmp/ccZL5Rsh.s:1796 .text.HAL_ADCEx_InjectedGetValue:0000000000000000 HAL_ADCEx_InjectedGetValue /tmp/ccZL5Rsh.s:1845 .text.HAL_ADCEx_InjectedConvCpltCallback:0000000000000000 $t /tmp/ccZL5Rsh.s:1853 .text.HAL_ADCEx_InjectedConvCpltCallback:0000000000000000 HAL_ADCEx_InjectedConvCpltCallback /tmp/ccZL5Rsh.s:1867 .text.HAL_ADCEx_InjectedQueueOverflowCallback:0000000000000000 $t /tmp/ccZL5Rsh.s:1875 .text.HAL_ADCEx_InjectedQueueOverflowCallback:0000000000000000 HAL_ADCEx_InjectedQueueOverflowCallback /tmp/ccZL5Rsh.s:1886 .text.HAL_ADCEx_LevelOutOfWindow2Callback:0000000000000000 $t /tmp/ccZL5Rsh.s:1894 .text.HAL_ADCEx_LevelOutOfWindow2Callback:0000000000000000 HAL_ADCEx_LevelOutOfWindow2Callback /tmp/ccZL5Rsh.s:1905 .text.HAL_ADCEx_LevelOutOfWindow3Callback:0000000000000000 $t /tmp/ccZL5Rsh.s:1913 .text.HAL_ADCEx_LevelOutOfWindow3Callback:0000000000000000 HAL_ADCEx_LevelOutOfWindow3Callback /tmp/ccZL5Rsh.s:1924 .text.HAL_ADCEx_EndOfSamplingCallback:0000000000000000 $t /tmp/ccZL5Rsh.s:1932 .text.HAL_ADCEx_EndOfSamplingCallback:0000000000000000 HAL_ADCEx_EndOfSamplingCallback /tmp/ccZL5Rsh.s:1943 .text.HAL_ADCEx_RegularStop:0000000000000000 $t /tmp/ccZL5Rsh.s:1951 .text.HAL_ADCEx_RegularStop:0000000000000000 HAL_ADCEx_RegularStop /tmp/ccZL5Rsh.s:2041 .text.HAL_ADCEx_RegularStop_IT:0000000000000000 $t /tmp/ccZL5Rsh.s:2049 .text.HAL_ADCEx_RegularStop_IT:0000000000000000 HAL_ADCEx_RegularStop_IT /tmp/ccZL5Rsh.s:2144 .text.HAL_ADCEx_RegularStop_DMA:0000000000000000 $t /tmp/ccZL5Rsh.s:2152 .text.HAL_ADCEx_RegularStop_DMA:0000000000000000 HAL_ADCEx_RegularStop_DMA /tmp/ccZL5Rsh.s:2291 .text.HAL_ADCEx_RegularMultiModeStop_DMA:0000000000000000 $t /tmp/ccZL5Rsh.s:2299 .text.HAL_ADCEx_RegularMultiModeStop_DMA:0000000000000000 HAL_ADCEx_RegularMultiModeStop_DMA /tmp/ccZL5Rsh.s:2613 .text.HAL_ADCEx_RegularMultiModeStop_DMA:0000000000000114 $d /tmp/ccZL5Rsh.s:2618 .text.HAL_ADCEx_InjectedConfigChannel:0000000000000000 $t /tmp/ccZL5Rsh.s:2626 .text.HAL_ADCEx_InjectedConfigChannel:0000000000000000 HAL_ADCEx_InjectedConfigChannel /tmp/ccZL5Rsh.s:3403 .text.HAL_ADCEx_InjectedConfigChannel:00000000000003b8 $d /tmp/ccZL5Rsh.s:3423 .text.HAL_ADCEx_InjectedConfigChannel:00000000000003ec $t /tmp/ccZL5Rsh.s:3928 .text.HAL_ADCEx_InjectedConfigChannel:00000000000005a0 $d ARM GAS /tmp/ccZL5Rsh.s page 273 /tmp/ccZL5Rsh.s:3933 .text.HAL_ADCEx_MultiModeConfigChannel:0000000000000000 $t /tmp/ccZL5Rsh.s:3941 .text.HAL_ADCEx_MultiModeConfigChannel:0000000000000000 HAL_ADCEx_MultiModeConfigChannel /tmp/ccZL5Rsh.s:4167 .text.HAL_ADCEx_MultiModeConfigChannel:00000000000000d4 $d /tmp/ccZL5Rsh.s:4175 .text.HAL_ADCEx_EnableInjectedQueue:0000000000000000 $t /tmp/ccZL5Rsh.s:4183 .text.HAL_ADCEx_EnableInjectedQueue:0000000000000000 HAL_ADCEx_EnableInjectedQueue /tmp/ccZL5Rsh.s:4252 .text.HAL_ADCEx_DisableInjectedQueue:0000000000000000 $t /tmp/ccZL5Rsh.s:4260 .text.HAL_ADCEx_DisableInjectedQueue:0000000000000000 HAL_ADCEx_DisableInjectedQueue /tmp/ccZL5Rsh.s:4322 .text.HAL_ADCEx_DisableVoltageRegulator:0000000000000000 $t /tmp/ccZL5Rsh.s:4330 .text.HAL_ADCEx_DisableVoltageRegulator:0000000000000000 HAL_ADCEx_DisableVoltageRegulator /tmp/ccZL5Rsh.s:4373 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:0000000000000000 $t /tmp/ccZL5Rsh.s:4381 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:0000000000000000 HAL_ADCEx_EnterADCDeepPowerDownMode UNDEFINED SYMBOLS ADC_Disable ADC_Enable ADC_ConversionStop HAL_GetTick HAL_DMA_Start_IT ADC_DMAConvCplt ADC_DMAHalfConvCplt ADC_DMAError HAL_DMA_Abort SystemCoreClock