ARM GAS /tmp/ccl5zrdd.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 2 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "FastMathFunctions.c" 14 .text 15 .section .text.arm_cos_f32,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global arm_cos_f32 19 .arch armv7e-m 20 .syntax unified 21 .thumb 22 .thumb_func 23 .fpu fpv4-sp-d16 25 arm_cos_f32: 26 @ args = 0, pretend = 0, frame = 0 27 @ frame_needed = 0, uses_anonymous_args = 0 28 @ link register save eliminated. 29 0000 9FED207A vldr.32 s14, .L8 30 0004 F5EE007A vmov.f32 s15, #2.5e-1 31 0008 E0EE077A vfma.f32 s15, s0, s14 32 000c F5EEC07A vcmpe.f32 s15, #0 33 0010 F1EE10FA vmrs APSR_nzcv, FPSCR 34 0014 BDEEE70A vcvt.s32.f32 s0, s15 35 0018 04D5 bpl .L2 36 001a 10EE103A vmov r3, s0 @ int 37 001e 013B subs r3, r3, #1 38 0020 00EE103A vmov s0, r3 @ int 39 .L2: 40 0024 B8EEC00A vcvt.f32.s32 s0, s0 41 0028 DFED176A vldr.32 s13, .L8+4 42 002c 37EEC00A vsub.f32 s0, s15, s0 43 0030 20EE260A vmul.f32 s0, s0, s13 44 0034 BCEEC07A vcvt.u32.f32 s14, s0 45 0038 17EE103A vmov r3, s14 @ int 46 003c 9BB2 uxth r3, r3 47 003e B3F5007F cmp r3, #512 48 0042 19D2 bcs .L4 49 0044 07EE903A vmov s15, r3 @ int 50 0048 F8EE677A vcvt.f32.u32 s15, s15 51 004c 591C adds r1, r3, #1 52 004e 30EE670A vsub.f32 s0, s0, s15 53 0052 89B2 uxth r1, r1 54 .L5: 55 0054 0D4A ldr r2, .L8+8 56 0056 02EB8101 add r1, r2, r1, lsl #2 57 005a 91ED007A vldr.32 s14, [r1] 58 005e 02EB8303 add r3, r2, r3, lsl #2 ARM GAS /tmp/ccl5zrdd.s page 2 59 0062 F7EE007A vmov.f32 s15, #1.0e+0 60 0066 77EEC07A vsub.f32 s15, s15, s0 61 006a 20EE070A vmul.f32 s0, s0, s14 62 006e 93ED007A vldr.32 s14, [r3] 63 0072 A7EE870A vfma.f32 s0, s15, s14 64 0076 7047 bx lr 65 .L4: 66 0078 30EE660A vsub.f32 s0, s0, s13 67 007c 0121 movs r1, #1 68 007e 0023 movs r3, #0 69 0080 E8E7 b .L5 70 .L9: 71 0082 00BF .align 2 72 .L8: 73 0084 83F9223E .word 1042479491 74 0088 00000044 .word 1140850688 75 008c 00000000 .word sinTable_f32 77 .section .text.arm_cos_q15,"ax",%progbits 78 .align 1 79 .p2align 2,,3 80 .global arm_cos_q15 81 .syntax unified 82 .thumb 83 .thumb_func 84 .fpu fpv4-sp-d16 86 arm_cos_q15: 87 @ args = 0, pretend = 0, frame = 0 88 @ frame_needed = 0, uses_anonymous_args = 0 89 @ link register save eliminated. 90 0000 80B2 uxth r0, r0 91 0002 00F50053 add r3, r0, #8192 92 0006 1BB2 sxth r3, r3 93 0008 002B cmp r3, #0 94 000a BCBF itt lt 95 000c A0F5C040 sublt r0, r0, #24576 96 0010 03B2 sxthlt r3, r0 97 0012 9909 lsrs r1, r3, #6 98 0014 0A4A ldr r2, .L12 99 0016 481C adds r0, r1, #1 100 0018 03F03F03 and r3, r3, #63 101 001c 32F91110 ldrsh r1, [r2, r1, lsl #1] 102 0020 32F81020 ldrh r2, [r2, r0, lsl #1] 103 0024 5B02 lsls r3, r3, #9 104 0026 C3F50040 rsb r0, r3, #32768 105 002a 01FB00F0 mul r0, r1, r0 106 002e 000C lsrs r0, r0, #16 107 0030 0004 lsls r0, r0, #16 108 0032 13FB0203 smlabb r3, r3, r2, r0 109 0036 43F3CF30 sbfx r0, r3, #15, #16 110 003a 20F00100 bic r0, r0, #1 111 003e 7047 bx lr 112 .L13: 113 .align 2 114 .L12: 115 0040 00000000 .word sinTable_q15 117 .section .text.arm_cos_q31,"ax",%progbits 118 .align 1 ARM GAS /tmp/ccl5zrdd.s page 3 119 .p2align 2,,3 120 .global arm_cos_q31 121 .syntax unified 122 .thumb 123 .thumb_func 124 .fpu fpv4-sp-d16 126 arm_cos_q31: 127 @ args = 0, pretend = 0, frame = 0 128 @ frame_needed = 0, uses_anonymous_args = 0 129 0000 10F10052 adds r2, r0, #536870912 130 0004 48BF it mi 131 0006 00F12042 addmi r2, r0, #-1610612736 132 000a 0C49 ldr r1, .L17 133 000c 0C4B ldr r3, .L17+4 134 000e 900D lsrs r0, r2, #22 135 0010 03EA4223 and r3, r3, r2, lsl #9 136 0014 10B5 push {r4, lr} 137 0016 441C adds r4, r0, #1 138 0018 51F82000 ldr r0, [r1, r0, lsl #2] 139 001c 51F82440 ldr r4, [r1, r4, lsl #2] 140 0020 C3F1004C rsb ip, r3, #-2147483648 141 0024 4FEAE07E asr lr, r0, #31 142 0028 ACFB0020 umull r2, r0, ip, r0 143 002c 0CFB0E00 mla r0, ip, lr, r0 144 0030 0021 movs r1, #0 145 0032 C3FB0410 smlal r1, r0, r3, r4 146 0036 4000 lsls r0, r0, #1 147 0038 10BD pop {r4, pc} 148 .L18: 149 003a 00BF .align 2 150 .L17: 151 003c 00000000 .word sinTable_q31 152 0040 00FEFF7F .word 2147483136 154 .section .text.arm_sin_f32,"ax",%progbits 155 .align 1 156 .p2align 2,,3 157 .global arm_sin_f32 158 .syntax unified 159 .thumb 160 .thumb_func 161 .fpu fpv4-sp-d16 163 arm_sin_f32: 164 @ args = 0, pretend = 0, frame = 0 165 @ frame_needed = 0, uses_anonymous_args = 0 166 @ link register save eliminated. 167 0000 DFED1F7A vldr.32 s15, .L25 168 0004 20EE270A vmul.f32 s0, s0, s15 169 0008 B5EEC00A vcmpe.f32 s0, #0 170 000c F1EE10FA vmrs APSR_nzcv, FPSCR 171 0010 FDEEC07A vcvt.s32.f32 s15, s0 172 0014 04D5 bpl .L20 173 0016 17EE903A vmov r3, s15 @ int 174 001a 013B subs r3, r3, #1 175 001c 07EE903A vmov s15, r3 @ int 176 .L20: 177 0020 F8EEE77A vcvt.f32.s32 s15, s15 178 0024 9FED177A vldr.32 s14, .L25+4 ARM GAS /tmp/ccl5zrdd.s page 4 179 0028 30EE670A vsub.f32 s0, s0, s15 180 002c 20EE070A vmul.f32 s0, s0, s14 181 0030 FCEEC07A vcvt.u32.f32 s15, s0 182 0034 17EE903A vmov r3, s15 @ int 183 0038 9BB2 uxth r3, r3 184 003a B3F5007F cmp r3, #512 185 003e 19D2 bcs .L22 186 0040 07EE903A vmov s15, r3 @ int 187 0044 F8EE677A vcvt.f32.u32 s15, s15 188 0048 591C adds r1, r3, #1 189 004a 30EE670A vsub.f32 s0, s0, s15 190 004e 89B2 uxth r1, r1 191 .L23: 192 0050 0D4A ldr r2, .L25+8 193 0052 02EB8101 add r1, r2, r1, lsl #2 194 0056 91ED007A vldr.32 s14, [r1] 195 005a 02EB8303 add r3, r2, r3, lsl #2 196 005e F7EE007A vmov.f32 s15, #1.0e+0 197 0062 77EEC07A vsub.f32 s15, s15, s0 198 0066 20EE070A vmul.f32 s0, s0, s14 199 006a 93ED007A vldr.32 s14, [r3] 200 006e A7EE870A vfma.f32 s0, s15, s14 201 0072 7047 bx lr 202 .L22: 203 0074 30EE470A vsub.f32 s0, s0, s14 204 0078 0121 movs r1, #1 205 007a 0023 movs r3, #0 206 007c E8E7 b .L23 207 .L26: 208 007e 00BF .align 2 209 .L25: 210 0080 83F9223E .word 1042479491 211 0084 00000044 .word 1140850688 212 0088 00000000 .word sinTable_f32 214 .section .text.arm_sin_q15,"ax",%progbits 215 .align 1 216 .p2align 2,,3 217 .global arm_sin_q15 218 .syntax unified 219 .thumb 220 .thumb_func 221 .fpu fpv4-sp-d16 223 arm_sin_q15: 224 @ args = 0, pretend = 0, frame = 0 225 @ frame_needed = 0, uses_anonymous_args = 0 226 @ link register save eliminated. 227 0000 0028 cmp r0, #0 228 0002 BCBF itt lt 229 0004 A0F50040 sublt r0, r0, #32768 230 0008 00B2 sxthlt r0, r0 231 000a 8309 lsrs r3, r0, #6 232 000c 0B4A ldr r2, .L29 233 000e 00F03F00 and r0, r0, #63 234 0012 32F91310 ldrsh r1, [r2, r3, lsl #1] 235 0016 4002 lsls r0, r0, #9 236 0018 03F1010C add ip, r3, #1 237 001c C0F50043 rsb r3, r0, #32768 ARM GAS /tmp/ccl5zrdd.s page 5 238 0020 01FB03F3 mul r3, r1, r3 239 0024 32F81C20 ldrh r2, [r2, ip, lsl #1] 240 0028 1B0C lsrs r3, r3, #16 241 002a 1B04 lsls r3, r3, #16 242 002c 10FB0230 smlabb r0, r0, r2, r3 243 0030 40F3CF30 sbfx r0, r0, #15, #16 244 0034 20F00100 bic r0, r0, #1 245 0038 7047 bx lr 246 .L30: 247 003a 00BF .align 2 248 .L29: 249 003c 00000000 .word sinTable_q15 251 .section .text.arm_sin_q31,"ax",%progbits 252 .align 1 253 .p2align 2,,3 254 .global arm_sin_q31 255 .syntax unified 256 .thumb 257 .thumb_func 258 .fpu fpv4-sp-d16 260 arm_sin_q31: 261 @ args = 0, pretend = 0, frame = 0 262 @ frame_needed = 0, uses_anonymous_args = 0 263 0000 0028 cmp r0, #0 264 0002 B6BF itet lt 265 0004 00F10042 addlt r2, r0, #-2147483648 266 0008 0246 movge r2, r0 267 000a 1046 movlt r0, r2 268 000c 0B49 ldr r1, .L35 269 000e 0C4B ldr r3, .L35+4 270 0010 920D lsrs r2, r2, #22 271 0012 03EA4023 and r3, r3, r0, lsl #9 272 0016 10B5 push {r4, lr} 273 0018 541C adds r4, r2, #1 274 001a 51F82220 ldr r2, [r1, r2, lsl #2] 275 001e 51F82440 ldr r4, [r1, r4, lsl #2] 276 0022 C3F1004C rsb ip, r3, #-2147483648 277 0026 4FEAE27E asr lr, r2, #31 278 002a ACFB0220 umull r2, r0, ip, r2 279 002e 0CFB0E00 mla r0, ip, lr, r0 280 0032 0021 movs r1, #0 281 0034 C3FB0410 smlal r1, r0, r3, r4 282 0038 4000 lsls r0, r0, #1 283 003a 10BD pop {r4, pc} 284 .L36: 285 .align 2 286 .L35: 287 003c 00000000 .word sinTable_q31 288 0040 00FEFF7F .word 2147483136 290 .section .text.arm_sqrt_q15,"ax",%progbits 291 .align 1 292 .p2align 2,,3 293 .global arm_sqrt_q15 294 .syntax unified 295 .thumb 296 .thumb_func 297 .fpu fpv4-sp-d16 ARM GAS /tmp/ccl5zrdd.s page 6 299 arm_sqrt_q15: 300 @ args = 0, pretend = 0, frame = 0 301 @ frame_needed = 0, uses_anonymous_args = 0 302 0000 0028 cmp r0, #0 303 0002 63DD ble .L38 304 0004 B0FA80F2 clz r2, r0 305 0008 113A subs r2, r2, #17 306 000a 1FFA82FC uxth ip, r2 307 000e 12F00102 ands r2, r2, #1 308 0012 10B5 push {r4, lr} 309 0014 16BF itet ne 310 0016 0CF1FF3E addne lr, ip, #-1 311 001a 00FA0CF0 lsleq r0, r0, ip 312 001e 00FA0EF0 lslne r0, r0, lr 313 0022 0FFA80FE sxth lr, r0 314 0026 07EE90EA vmov s15, lr @ int 315 002a FAEEE87A vcvt.f32.s32 s15, s15, #15 316 002e 2A4B ldr r3, .L49 317 0030 17EE900A vmov r0, s15 @ int 318 0034 A3EB6003 sub r3, r3, r0, asr #1 319 0038 07EE903A vmov s15, r3 @ int 320 003c FEEEC97A vcvt.s32.f32 s15, s15, #14 321 0040 4FEA6E04 asr r4, lr, #1 322 0044 17EE903A vmov r3, s15 @ int 323 0048 1BB2 sxth r3, r3 324 004a 03FB03F0 mul r0, r3, r3 325 004e C013 asrs r0, r0, #15 326 0050 10FB04F0 smulbb r0, r0, r4 327 0054 C013 asrs r0, r0, #15 328 0056 C0F54050 rsb r0, r0, #12288 329 005a 03FB00F0 mul r0, r3, r0 330 005e 40F34F30 sbfx r0, r0, #13, #16 331 0062 20F00303 bic r3, r0, #3 332 0066 03FB03F0 mul r0, r3, r3 333 006a C013 asrs r0, r0, #15 334 006c 10FB04F0 smulbb r0, r0, r4 335 0070 C013 asrs r0, r0, #15 336 0072 C0F54050 rsb r0, r0, #12288 337 0076 03FB00F0 mul r0, r3, r0 338 007a 40F34F30 sbfx r0, r0, #13, #16 339 007e 20F00300 bic r0, r0, #3 340 0082 00FB00F3 mul r3, r0, r0 341 0086 DB13 asrs r3, r3, #15 342 0088 13FB04F3 smulbb r3, r3, r4 343 008c DB13 asrs r3, r3, #15 344 008e C3F54053 rsb r3, r3, #12288 345 0092 00FB03F3 mul r3, r0, r3 346 0096 DB13 asrs r3, r3, #15 347 0098 9B00 lsls r3, r3, #2 348 009a 13FB0EF3 smulbb r3, r3, lr 349 009e 43F38F33 sbfx r3, r3, #14, #16 350 00a2 23F00103 bic r3, r3, #1 351 00a6 4AB1 cbz r2, .L48 352 00a8 0CF1FF3C add ip, ip, #-1 353 00ac 4FEA6C0C asr ip, ip, #1 354 00b0 43FA0CF3 asr r3, r3, ip 355 00b4 1BB2 sxth r3, r3 ARM GAS /tmp/ccl5zrdd.s page 7 356 00b6 0B80 strh r3, [r1] @ movhi 357 00b8 0020 movs r0, #0 358 00ba 10BD pop {r4, pc} 359 .L48: 360 00bc 4CF34E0C sbfx ip, ip, #1, #15 361 00c0 43FA0CF3 asr r3, r3, ip 362 00c4 1BB2 sxth r3, r3 363 00c6 0B80 strh r3, [r1] @ movhi 364 00c8 0020 movs r0, #0 365 00ca 10BD pop {r4, pc} 366 .L38: 367 00cc 0023 movs r3, #0 368 00ce 0B80 strh r3, [r1] @ movhi 369 00d0 4FF0FF30 mov r0, #-1 370 00d4 7047 bx lr 371 .L50: 372 00d6 00BF .align 2 373 .L49: 374 00d8 DF59375F .word 1597463007 376 .section .text.arm_sqrt_q31,"ax",%progbits 377 .align 1 378 .p2align 2,,3 379 .global arm_sqrt_q31 380 .syntax unified 381 .thumb 382 .thumb_func 383 .fpu fpv4-sp-d16 385 arm_sqrt_q31: 386 @ args = 0, pretend = 0, frame = 0 387 @ frame_needed = 0, uses_anonymous_args = 0 388 0000 021E subs r2, r0, #0 389 0002 6CDD ble .L52 390 0004 B2FA82FC clz ip, r2 391 0008 F0B5 push {r4, r5, r6, r7, lr} 392 000a 0CF1FF3E add lr, ip, #-1 393 000e 1EF00104 ands r4, lr, #1 394 0012 16BF itet ne 395 0014 ACF10206 subne r6, ip, #2 396 0018 02FA0EF6 lsleq r6, r2, lr 397 001c 02FA06F6 lslne r6, r2, r6 398 0020 07EE906A vmov s15, r6 @ int 399 0024 FAEEE07A vcvt.f32.s32 s15, s15, #31 400 0028 2F4B ldr r3, .L63 401 002a 17EE900A vmov r0, s15 402 002e A3EB6000 sub r0, r3, r0, asr #1 403 0032 07EE900A vmov s15, r0 404 0036 FEEEC17A vcvt.s32.f32 s15, s15, #30 405 003a 7310 asrs r3, r6, #1 406 003c 17EE900A vmov r0, s15 @ int 407 0040 80FB0057 smull r5, r7, r0, r0 408 0044 EA0F lsrs r2, r5, #31 409 0046 42EA4702 orr r2, r2, r7, lsl #1 410 004a 83FB0257 smull r5, r7, r3, r2 411 004e EA0F lsrs r2, r5, #31 412 0050 42EA4702 orr r2, r2, r7, lsl #1 413 0054 C2F14052 rsb r2, r2, #805306368 414 0058 82FB0002 smull r0, r2, r2, r0 ARM GAS /tmp/ccl5zrdd.s page 8 415 005c C00F lsrs r0, r0, #31 416 005e 40EA4200 orr r0, r0, r2, lsl #1 417 0062 8000 lsls r0, r0, #2 418 0064 80FB0052 smull r5, r2, r0, r0 419 0068 ED0F lsrs r5, r5, #31 420 006a 45EA4205 orr r5, r5, r2, lsl #1 421 006e 83FB0552 smull r5, r2, r3, r5 422 0072 ED0F lsrs r5, r5, #31 423 0074 45EA4205 orr r5, r5, r2, lsl #1 424 0078 C5F14055 rsb r5, r5, #805306368 425 007c 85FB0005 smull r0, r5, r5, r0 426 0080 C00F lsrs r0, r0, #31 427 0082 40EA4500 orr r0, r0, r5, lsl #1 428 0086 8200 lsls r2, r0, #2 429 0088 82FB0205 smull r0, r5, r2, r2 430 008c C00F lsrs r0, r0, #31 431 008e 40EA4500 orr r0, r0, r5, lsl #1 432 0092 83FB0035 smull r3, r5, r3, r0 433 0096 D80F lsrs r0, r3, #31 434 0098 40EA4500 orr r0, r0, r5, lsl #1 435 009c C0F14050 rsb r0, r0, #805306368 436 00a0 80FB0203 smull r0, r3, r0, r2 437 00a4 C20F lsrs r2, r0, #31 438 00a6 42EA4302 orr r2, r2, r3, lsl #1 439 00aa 9200 lsls r2, r2, #2 440 00ac 82FB0626 smull r2, r6, r2, r6 441 00b0 D30F lsrs r3, r2, #31 442 00b2 43EA4603 orr r3, r3, r6, lsl #1 443 00b6 5B00 lsls r3, r3, #1 444 00b8 54B1 cbz r4, .L62 445 00ba ACF1020C sub ip, ip, #2 446 00be 0CEBDC7C add ip, ip, ip, lsr #31 447 00c2 4FEA6C0C asr ip, ip, #1 448 00c6 43FA0CF3 asr r3, r3, ip 449 00ca 0B60 str r3, [r1] 450 00cc 0020 movs r0, #0 451 00ce F0BD pop {r4, r5, r6, r7, pc} 452 .L62: 453 00d0 4FEA6E0E asr lr, lr, #1 454 00d4 43FA0EF3 asr r3, r3, lr 455 00d8 0B60 str r3, [r1] 456 00da 0020 movs r0, #0 457 00dc F0BD pop {r4, r5, r6, r7, pc} 458 .L52: 459 00de 0023 movs r3, #0 460 00e0 0B60 str r3, [r1] 461 00e2 4FF0FF30 mov r0, #-1 462 00e6 7047 bx lr 463 .L64: 464 .align 2 465 .L63: 466 00e8 DF59375F .word 1597463007 468 .section .text.arm_vexp_f32,"ax",%progbits 469 .align 1 470 .p2align 2,,3 471 .global arm_vexp_f32 472 .syntax unified ARM GAS /tmp/ccl5zrdd.s page 9 473 .thumb 474 .thumb_func 475 .fpu fpv4-sp-d16 477 arm_vexp_f32: 478 @ args = 0, pretend = 0, frame = 0 479 @ frame_needed = 0, uses_anonymous_args = 0 480 0000 62B1 cbz r2, .L73 481 0002 70B5 push {r4, r5, r6, lr} 482 0004 0646 mov r6, r0 483 0006 0D46 mov r5, r1 484 0008 1446 mov r4, r2 485 .L67: 486 000a B6EC010A vldmia.32 r6!, {s0} 487 000e FFF7FEFF bl expf 488 0012 013C subs r4, r4, #1 489 0014 A5EC010A vstmia.32 r5!, {s0} 490 0018 F7D1 bne .L67 491 001a 70BD pop {r4, r5, r6, pc} 492 .L73: 493 001c 7047 bx lr 495 001e 00BF .section .text.arm_vlog_f32,"ax",%progbits 496 .align 1 497 .p2align 2,,3 498 .global arm_vlog_f32 499 .syntax unified 500 .thumb 501 .thumb_func 502 .fpu fpv4-sp-d16 504 arm_vlog_f32: 505 @ args = 0, pretend = 0, frame = 0 506 @ frame_needed = 0, uses_anonymous_args = 0 507 0000 62B1 cbz r2, .L84 508 0002 70B5 push {r4, r5, r6, lr} 509 0004 0646 mov r6, r0 510 0006 0D46 mov r5, r1 511 0008 1446 mov r4, r2 512 .L78: 513 000a B6EC010A vldmia.32 r6!, {s0} 514 000e FFF7FEFF bl logf 515 0012 013C subs r4, r4, #1 516 0014 A5EC010A vstmia.32 r5!, {s0} 517 0018 F7D1 bne .L78 518 001a 70BD pop {r4, r5, r6, pc} 519 .L84: 520 001c 7047 bx lr 522 001e 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" ARM GAS /tmp/ccl5zrdd.s page 10 DEFINED SYMBOLS *ABS*:0000000000000000 FastMathFunctions.c /tmp/ccl5zrdd.s:16 .text.arm_cos_f32:0000000000000000 $t /tmp/ccl5zrdd.s:25 .text.arm_cos_f32:0000000000000000 arm_cos_f32 /tmp/ccl5zrdd.s:73 .text.arm_cos_f32:0000000000000084 $d /tmp/ccl5zrdd.s:78 .text.arm_cos_q15:0000000000000000 $t /tmp/ccl5zrdd.s:86 .text.arm_cos_q15:0000000000000000 arm_cos_q15 /tmp/ccl5zrdd.s:115 .text.arm_cos_q15:0000000000000040 $d /tmp/ccl5zrdd.s:118 .text.arm_cos_q31:0000000000000000 $t /tmp/ccl5zrdd.s:126 .text.arm_cos_q31:0000000000000000 arm_cos_q31 /tmp/ccl5zrdd.s:151 .text.arm_cos_q31:000000000000003c $d /tmp/ccl5zrdd.s:155 .text.arm_sin_f32:0000000000000000 $t /tmp/ccl5zrdd.s:163 .text.arm_sin_f32:0000000000000000 arm_sin_f32 /tmp/ccl5zrdd.s:210 .text.arm_sin_f32:0000000000000080 $d /tmp/ccl5zrdd.s:215 .text.arm_sin_q15:0000000000000000 $t /tmp/ccl5zrdd.s:223 .text.arm_sin_q15:0000000000000000 arm_sin_q15 /tmp/ccl5zrdd.s:249 .text.arm_sin_q15:000000000000003c $d /tmp/ccl5zrdd.s:252 .text.arm_sin_q31:0000000000000000 $t /tmp/ccl5zrdd.s:260 .text.arm_sin_q31:0000000000000000 arm_sin_q31 /tmp/ccl5zrdd.s:287 .text.arm_sin_q31:000000000000003c $d /tmp/ccl5zrdd.s:291 .text.arm_sqrt_q15:0000000000000000 $t /tmp/ccl5zrdd.s:299 .text.arm_sqrt_q15:0000000000000000 arm_sqrt_q15 /tmp/ccl5zrdd.s:374 .text.arm_sqrt_q15:00000000000000d8 $d /tmp/ccl5zrdd.s:377 .text.arm_sqrt_q31:0000000000000000 $t /tmp/ccl5zrdd.s:385 .text.arm_sqrt_q31:0000000000000000 arm_sqrt_q31 /tmp/ccl5zrdd.s:466 .text.arm_sqrt_q31:00000000000000e8 $d /tmp/ccl5zrdd.s:469 .text.arm_vexp_f32:0000000000000000 $t /tmp/ccl5zrdd.s:477 .text.arm_vexp_f32:0000000000000000 arm_vexp_f32 /tmp/ccl5zrdd.s:496 .text.arm_vlog_f32:0000000000000000 $t /tmp/ccl5zrdd.s:504 .text.arm_vlog_f32:0000000000000000 arm_vlog_f32 UNDEFINED SYMBOLS sinTable_f32 sinTable_q15 sinTable_q31 expf logf