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2c600301a2269fe40e56e51b008abc37b82e3a5e
bassofono/codice/build/main.lst
nzasch 2c600301a2 aggiunta cod
2021-07-02 22:19:04 +02:00

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ARM GAS /tmp/ccKbyuxk.s page 1
1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "main.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global HAL_ADC_ConvCpltCallback
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 HAL_ADC_ConvCpltCallback:
25 .LFB376:
26 .file 1 "Core/Src/main.c"
1:Core/Src/main.c **** /* USER CODE BEGIN Header */
2:Core/Src/main.c **** /**
3:Core/Src/main.c **** ******************************************************************************
4:Core/Src/main.c **** * @file : main.c
5:Core/Src/main.c **** * @brief : Main program body
6:Core/Src/main.c **** ******************************************************************************
7:Core/Src/main.c **** * @attention
8:Core/Src/main.c **** *
9:Core/Src/main.c **** * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
10:Core/Src/main.c **** * All rights reserved.</center></h2>
11:Core/Src/main.c **** *
12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/main.c **** * License. You may obtain a copy of the License at:
15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/main.c **** *
17:Core/Src/main.c **** ******************************************************************************
18:Core/Src/main.c **** */
19:Core/Src/main.c **** /* USER CODE END Header */
20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/main.c **** #include "main.h"
22:Core/Src/main.c ****
23:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
24:Core/Src/main.c **** /* USER CODE BEGIN Includes */
25:Core/Src/main.c **** #include <stdio.h>
26:Core/Src/main.c **** #include "bassofono.h"
27:Core/Src/main.c **** #include "interface.h"
28:Core/Src/main.c ****
29:Core/Src/main.c **** /* USER CODE END Includes */
30:Core/Src/main.c ****
31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
ARM GAS /tmp/ccKbyuxk.s page 2
33:Core/Src/main.c ****
34:Core/Src/main.c **** /* USER CODE END PTD */
35:Core/Src/main.c ****
36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
37:Core/Src/main.c **** /* USER CODE BEGIN PD */
38:Core/Src/main.c **** /* USER CODE END PD */
39:Core/Src/main.c ****
40:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
41:Core/Src/main.c **** /* USER CODE BEGIN PM */
42:Core/Src/main.c ****
43:Core/Src/main.c **** /* USER CODE END PM */
44:Core/Src/main.c ****
45:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
46:Core/Src/main.c **** ADC_HandleTypeDef hadc1;
47:Core/Src/main.c **** DMA_HandleTypeDef hdma_adc1;
48:Core/Src/main.c ****
49:Core/Src/main.c **** CORDIC_HandleTypeDef hcordic;
50:Core/Src/main.c ****
51:Core/Src/main.c **** DAC_HandleTypeDef hdac1;
52:Core/Src/main.c **** DMA_HandleTypeDef hdma_dac1_ch1;
53:Core/Src/main.c **** DMA_HandleTypeDef hdma_dac1_ch2;
54:Core/Src/main.c ****
55:Core/Src/main.c **** OPAMP_HandleTypeDef hopamp1;
56:Core/Src/main.c ****
57:Core/Src/main.c **** TIM_HandleTypeDef htim6;
58:Core/Src/main.c **** TIM_HandleTypeDef htim7;
59:Core/Src/main.c **** TIM_HandleTypeDef htim8;
60:Core/Src/main.c ****
61:Core/Src/main.c **** UART_HandleTypeDef huart1;
62:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_tx;
63:Core/Src/main.c ****
64:Core/Src/main.c **** /* USER CODE BEGIN PV */
65:Core/Src/main.c ****
66:Core/Src/main.c **** volatile uint8_t tick;
67:Core/Src/main.c ****
68:Core/Src/main.c **** // RX
69:Core/Src/main.c **** volatile uint8_t rx_adc_buffer_ready, half_rx_dac_buffer_empty;
70:Core/Src/main.c ****
71:Core/Src/main.c **** // TX
72:Core/Src/main.c **** // volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
73:Core/Src/main.c ****
74:Core/Src/main.c **** /* USER CODE END PV */
75:Core/Src/main.c ****
76:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
77:Core/Src/main.c **** void SystemClock_Config(void);
78:Core/Src/main.c **** static void MX_GPIO_Init(void);
79:Core/Src/main.c **** static void MX_DMA_Init(void);
80:Core/Src/main.c **** static void MX_DAC1_Init(void);
81:Core/Src/main.c **** static void MX_ADC1_Init(void);
82:Core/Src/main.c **** static void MX_TIM7_Init(void);
83:Core/Src/main.c **** static void MX_TIM6_Init(void);
84:Core/Src/main.c **** static void MX_CORDIC_Init(void);
85:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
86:Core/Src/main.c **** static void MX_TIM8_Init(void);
87:Core/Src/main.c **** static void MX_OPAMP1_Init(void);
88:Core/Src/main.c **** /* USER CODE BEGIN PFP */
89:Core/Src/main.c ****
ARM GAS /tmp/ccKbyuxk.s page 3
90:Core/Src/main.c **** /* USER CODE END PFP */
91:Core/Src/main.c ****
92:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
93:Core/Src/main.c **** /* USER CODE BEGIN 0 */
94:Core/Src/main.c ****
95:Core/Src/main.c **** // IRQ
96:Core/Src/main.c ****
97:Core/Src/main.c **** // ADC
98:Core/Src/main.c ****
99:Core/Src/main.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){
27 .loc 1 99 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
32 .LVL0:
100:Core/Src/main.c **** if(hadc->Instance == ADC1){
33 .loc 1 100 0
34 0000 0368 ldr r3, [r0]
35 0002 B3F1A04F cmp r3, #1342177280
36 0006 02D1 bne .L1
101:Core/Src/main.c **** rx_adc_buffer_ready = 1;
37 .loc 1 101 0
38 0008 014B ldr r3, .L4
39 000a 0122 movs r2, #1
40 000c 1A70 strb r2, [r3]
41 .L1:
102:Core/Src/main.c **** }
103:Core/Src/main.c **** }
42 .loc 1 103 0
43 000e 7047 bx lr
44 .L5:
45 .align 2
46 .L4:
47 0010 00000000 .word rx_adc_buffer_ready
48 .cfi_endproc
49 .LFE376:
51 .section .text.HAL_DAC_ConvHalfCpltCallbackCh1,"ax",%progbits
52 .align 1
53 .p2align 2,,3
54 .global HAL_DAC_ConvHalfCpltCallbackCh1
55 .syntax unified
56 .thumb
57 .thumb_func
58 .fpu fpv4-sp-d16
60 HAL_DAC_ConvHalfCpltCallbackCh1:
61 .LFB377:
104:Core/Src/main.c ****
105:Core/Src/main.c **** // DAC
106:Core/Src/main.c **** // rx
107:Core/Src/main.c **** void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
62 .loc 1 107 0
63 .cfi_startproc
64 @ args = 0, pretend = 0, frame = 0
65 @ frame_needed = 0, uses_anonymous_args = 0
66 @ link register save eliminated.
67 .LVL1:
ARM GAS /tmp/ccKbyuxk.s page 4
108:Core/Src/main.c **** lf_buffer_toggle = 0;
68 .loc 1 108 0
69 0000 0349 ldr r1, .L7
109:Core/Src/main.c **** half_rx_dac_buffer_empty = 1;
70 .loc 1 109 0
71 0002 044B ldr r3, .L7+4
108:Core/Src/main.c **** lf_buffer_toggle = 0;
72 .loc 1 108 0
73 0004 0020 movs r0, #0
74 .LVL2:
75 .loc 1 109 0
76 0006 0122 movs r2, #1
108:Core/Src/main.c **** lf_buffer_toggle = 0;
77 .loc 1 108 0
78 0008 0870 strb r0, [r1]
79 .loc 1 109 0
80 000a 1A70 strb r2, [r3]
110:Core/Src/main.c **** }
81 .loc 1 110 0
82 000c 7047 bx lr
83 .L8:
84 000e 00BF .align 2
85 .L7:
86 0010 00000000 .word lf_buffer_toggle
87 0014 00000000 .word half_rx_dac_buffer_empty
88 .cfi_endproc
89 .LFE377:
91 .section .text.HAL_DAC_ConvCpltCallbackCh1,"ax",%progbits
92 .align 1
93 .p2align 2,,3
94 .global HAL_DAC_ConvCpltCallbackCh1
95 .syntax unified
96 .thumb
97 .thumb_func
98 .fpu fpv4-sp-d16
100 HAL_DAC_ConvCpltCallbackCh1:
101 .LFB378:
111:Core/Src/main.c ****
112:Core/Src/main.c **** void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
102 .loc 1 112 0
103 .cfi_startproc
104 @ args = 0, pretend = 0, frame = 0
105 @ frame_needed = 0, uses_anonymous_args = 0
106 @ link register save eliminated.
107 .LVL3:
113:Core/Src/main.c **** lf_buffer_toggle = 1;
108 .loc 1 113 0
109 0000 0249 ldr r1, .L10
114:Core/Src/main.c **** half_rx_dac_buffer_empty = 1;
110 .loc 1 114 0
111 0002 034A ldr r2, .L10+4
113:Core/Src/main.c **** lf_buffer_toggle = 1;
112 .loc 1 113 0
113 0004 0123 movs r3, #1
114 0006 0B70 strb r3, [r1]
115 .loc 1 114 0
116 0008 1370 strb r3, [r2]
ARM GAS /tmp/ccKbyuxk.s page 5
115:Core/Src/main.c **** }
117 .loc 1 115 0
118 000a 7047 bx lr
119 .L11:
120 .align 2
121 .L10:
122 000c 00000000 .word lf_buffer_toggle
123 0010 00000000 .word half_rx_dac_buffer_empty
124 .cfi_endproc
125 .LFE378:
127 .section .text.HAL_DACEx_ConvHalfCpltCallbackCh2,"ax",%progbits
128 .align 1
129 .p2align 2,,3
130 .global HAL_DACEx_ConvHalfCpltCallbackCh2
131 .syntax unified
132 .thumb
133 .thumb_func
134 .fpu fpv4-sp-d16
136 HAL_DACEx_ConvHalfCpltCallbackCh2:
137 .LFB379:
116:Core/Src/main.c ****
117:Core/Src/main.c **** // tx
118:Core/Src/main.c **** void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
138 .loc 1 118 0
139 .cfi_startproc
140 @ args = 0, pretend = 0, frame = 0
141 @ frame_needed = 0, uses_anonymous_args = 0
142 .LVL4:
143 0000 08B5 push {r3, lr}
144 .LCFI0:
145 .cfi_def_cfa_offset 8
146 .cfi_offset 3, -8
147 .cfi_offset 14, -4
119:Core/Src/main.c **** HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
148 .loc 1 119 0
149 0002 2021 movs r1, #32
150 0004 0448 ldr r0, .L14
151 .LVL5:
152 0006 FFF7FEFF bl HAL_GPIO_TogglePin
153 .LVL6:
120:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
154 .loc 1 120 0
155 000a 0449 ldr r1, .L14+4
121:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
156 .loc 1 121 0
157 000c 044B ldr r3, .L14+8
120:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
158 .loc 1 120 0
159 000e 0020 movs r0, #0
160 .loc 1 121 0
161 0010 0122 movs r2, #1
120:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
162 .loc 1 120 0
163 0012 0870 strb r0, [r1]
164 .loc 1 121 0
165 0014 1A70 strb r2, [r3]
122:Core/Src/main.c **** }
ARM GAS /tmp/ccKbyuxk.s page 6
166 .loc 1 122 0
167 0016 08BD pop {r3, pc}
168 .L15:
169 .align 2
170 .L14:
171 0018 00040048 .word 1207960576
172 001c 00000000 .word tx_dac_buffer_toggle
173 0020 00000000 .word half_tx_dac_buffer_empty
174 .cfi_endproc
175 .LFE379:
177 .section .text.HAL_DACEx_ConvCpltCallbackCh2,"ax",%progbits
178 .align 1
179 .p2align 2,,3
180 .global HAL_DACEx_ConvCpltCallbackCh2
181 .syntax unified
182 .thumb
183 .thumb_func
184 .fpu fpv4-sp-d16
186 HAL_DACEx_ConvCpltCallbackCh2:
187 .LFB380:
123:Core/Src/main.c ****
124:Core/Src/main.c **** void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
188 .loc 1 124 0
189 .cfi_startproc
190 @ args = 0, pretend = 0, frame = 0
191 @ frame_needed = 0, uses_anonymous_args = 0
192 .LVL7:
193 0000 08B5 push {r3, lr}
194 .LCFI1:
195 .cfi_def_cfa_offset 8
196 .cfi_offset 3, -8
197 .cfi_offset 14, -4
125:Core/Src/main.c **** HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
198 .loc 1 125 0
199 0002 2021 movs r1, #32
200 0004 0448 ldr r0, .L18
201 .LVL8:
202 0006 FFF7FEFF bl HAL_GPIO_TogglePin
203 .LVL9:
126:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
204 .loc 1 126 0
205 000a 0449 ldr r1, .L18+4
127:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
206 .loc 1 127 0
207 000c 044A ldr r2, .L18+8
126:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
208 .loc 1 126 0
209 000e 0123 movs r3, #1
210 0010 0B70 strb r3, [r1]
211 .loc 1 127 0
212 0012 1370 strb r3, [r2]
128:Core/Src/main.c **** }
213 .loc 1 128 0
214 0014 08BD pop {r3, pc}
215 .L19:
216 0016 00BF .align 2
217 .L18:
ARM GAS /tmp/ccKbyuxk.s page 7
218 0018 00040048 .word 1207960576
219 001c 00000000 .word tx_dac_buffer_toggle
220 0020 00000000 .word half_tx_dac_buffer_empty
221 .cfi_endproc
222 .LFE380:
224 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits
225 .align 1
226 .p2align 2,,3
227 .global HAL_TIM_PeriodElapsedCallback
228 .syntax unified
229 .thumb
230 .thumb_func
231 .fpu fpv4-sp-d16
233 HAL_TIM_PeriodElapsedCallback:
234 .LFB381:
129:Core/Src/main.c ****
130:Core/Src/main.c **** /*
131:Core/Src/main.c **** void HAL_DAC_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
132:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
133:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
134:Core/Src/main.c **** }
135:Core/Src/main.c ****
136:Core/Src/main.c **** void HAL_DAC_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
137:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
138:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
139:Core/Src/main.c **** }
140:Core/Src/main.c **** */
141:Core/Src/main.c ****
142:Core/Src/main.c **** // TIMERZ
143:Core/Src/main.c **** // 10 ms
144:Core/Src/main.c **** void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){
235 .loc 1 144 0
236 .cfi_startproc
237 @ args = 0, pretend = 0, frame = 0
238 @ frame_needed = 0, uses_anonymous_args = 0
239 @ link register save eliminated.
240 .LVL10:
145:Core/Src/main.c **** if (htim->Instance == TIM7){
241 .loc 1 145 0
242 0000 0268 ldr r2, [r0]
243 0002 034B ldr r3, .L22
244 0004 9A42 cmp r2, r3
245 0006 02D1 bne .L20
146:Core/Src/main.c **** tick = 1;
246 .loc 1 146 0
247 0008 024B ldr r3, .L22+4
248 000a 0122 movs r2, #1
249 000c 1A70 strb r2, [r3]
250 .L20:
147:Core/Src/main.c **** }
148:Core/Src/main.c **** }
251 .loc 1 148 0
252 000e 7047 bx lr
253 .L23:
254 .align 2
255 .L22:
256 0010 00140040 .word 1073746944
ARM GAS /tmp/ccKbyuxk.s page 8
257 0014 00000000 .word tick
258 .cfi_endproc
259 .LFE381:
261 .section .text.HAL_UART_RxCpltCallback,"ax",%progbits
262 .align 1
263 .p2align 2,,3
264 .global HAL_UART_RxCpltCallback
265 .syntax unified
266 .thumb
267 .thumb_func
268 .fpu fpv4-sp-d16
270 HAL_UART_RxCpltCallback:
271 .LFB382:
149:Core/Src/main.c ****
150:Core/Src/main.c **** // uart
151:Core/Src/main.c **** void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){
272 .loc 1 151 0
273 .cfi_startproc
274 @ args = 0, pretend = 0, frame = 0
275 @ frame_needed = 0, uses_anonymous_args = 0
276 .LVL11:
277 0000 38B5 push {r3, r4, r5, lr}
278 .LCFI2:
279 .cfi_def_cfa_offset 16
280 .cfi_offset 3, -16
281 .cfi_offset 4, -12
282 .cfi_offset 5, -8
283 .cfi_offset 14, -4
152:Core/Src/main.c **** if (huart == &huart1){
284 .loc 1 152 0
285 0002 084B ldr r3, .L28
286 0004 9842 cmp r0, r3
287 0006 00D0 beq .L27
153:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
154:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
155:Core/Src/main.c **** }
156:Core/Src/main.c **** /*
157:Core/Src/main.c **** if (huart == &huart2){
158:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
159:Core/Src/main.c **** HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
160:Core/Src/main.c **** }
161:Core/Src/main.c **** */
162:Core/Src/main.c **** }
288 .loc 1 162 0
289 0008 38BD pop {r3, r4, r5, pc}
290 .L27:
291 .LBB96:
153:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
292 .loc 1 153 0
293 000a 074D ldr r5, .L28+4
294 000c 0446 mov r4, r0
295 000e 2878 ldrb r0, [r5] @ zero_extendqisi2
296 .LVL12:
297 0010 FFF7FEFF bl enqueue_cmd
298 .LVL13:
154:Core/Src/main.c **** }
299 .loc 1 154 0
ARM GAS /tmp/ccKbyuxk.s page 9
300 0014 2946 mov r1, r5
301 0016 2046 mov r0, r4
302 0018 0122 movs r2, #1
303 .LBE96:
304 .loc 1 162 0
305 001a BDE83840 pop {r3, r4, r5, lr}
306 .LCFI3:
307 .cfi_restore 14
308 .cfi_restore 5
309 .cfi_restore 4
310 .cfi_restore 3
311 .cfi_def_cfa_offset 0
312 .LVL14:
313 .LBB97:
154:Core/Src/main.c **** }
314 .loc 1 154 0
315 001e FFF7FEBF b HAL_UART_Receive_IT
316 .LVL15:
317 .L29:
318 0022 00BF .align 2
319 .L28:
320 0024 00000000 .word huart1
321 0028 00000000 .word uart_rx_buf
322 .LBE97:
323 .cfi_endproc
324 .LFE382:
326 .section .text.__io_putchar,"ax",%progbits
327 .align 1
328 .p2align 2,,3
329 .global __io_putchar
330 .syntax unified
331 .thumb
332 .thumb_func
333 .fpu fpv4-sp-d16
335 __io_putchar:
336 .LFB383:
163:Core/Src/main.c ****
164:Core/Src/main.c **** // non-DMA
165:Core/Src/main.c **** int __io_putchar(int ch){
337 .loc 1 165 0
338 .cfi_startproc
339 @ args = 0, pretend = 0, frame = 8
340 @ frame_needed = 0, uses_anonymous_args = 0
341 .LVL16:
342 0000 10B5 push {r4, lr}
343 .LCFI4:
344 .cfi_def_cfa_offset 8
345 .cfi_offset 4, -8
346 .cfi_offset 14, -4
347 0002 82B0 sub sp, sp, #8
348 .LCFI5:
349 .cfi_def_cfa_offset 16
166:Core/Src/main.c **** uint8_t c[1];
167:Core/Src/main.c **** c[0] = ch & 0x00FF;
350 .loc 1 167 0
351 0004 02A9 add r1, sp, #8
165:Core/Src/main.c **** uint8_t c[1];
ARM GAS /tmp/ccKbyuxk.s page 10
352 .loc 1 165 0
353 0006 0446 mov r4, r0
354 .loc 1 167 0
355 0008 01F8040D strb r0, [r1, #-4]!
168:Core/Src/main.c **** HAL_UART_Transmit(&huart1, &*c, 1, 10);
356 .loc 1 168 0
357 000c 0A23 movs r3, #10
358 000e 0122 movs r2, #1
359 0010 0248 ldr r0, .L32
360 .LVL17:
361 0012 FFF7FEFF bl HAL_UART_Transmit
362 .LVL18:
169:Core/Src/main.c **** // HAL_UART_Transmit(&huart2, &*c, 1, 10);
170:Core/Src/main.c **** return ch;
171:Core/Src/main.c **** }
363 .loc 1 171 0
364 0016 2046 mov r0, r4
365 0018 02B0 add sp, sp, #8
366 .LCFI6:
367 .cfi_def_cfa_offset 8
368 @ sp needed
369 001a 10BD pop {r4, pc}
370 .LVL19:
371 .L33:
372 .align 2
373 .L32:
374 001c 00000000 .word huart1
375 .cfi_endproc
376 .LFE383:
378 .section .text._write,"ax",%progbits
379 .align 1
380 .p2align 2,,3
381 .global _write
382 .syntax unified
383 .thumb
384 .thumb_func
385 .fpu fpv4-sp-d16
387 _write:
388 .LFB384:
172:Core/Src/main.c ****
173:Core/Src/main.c **** int _write(int file,char *ptr, int len){
389 .loc 1 173 0
390 .cfi_startproc
391 @ args = 0, pretend = 0, frame = 0
392 @ frame_needed = 0, uses_anonymous_args = 0
393 .LVL20:
394 0000 10B5 push {r4, lr}
395 .LCFI7:
396 .cfi_def_cfa_offset 8
397 .cfi_offset 4, -8
398 .cfi_offset 14, -4
174:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
399 .loc 1 174 0
400 0002 0348 ldr r0, .L36
401 .LVL21:
173:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
402 .loc 1 173 0
ARM GAS /tmp/ccKbyuxk.s page 11
403 0004 1446 mov r4, r2
404 .loc 1 174 0
405 0006 92B2 uxth r2, r2
406 .LVL22:
407 0008 FFF7FEFF bl HAL_UART_Transmit_DMA
408 .LVL23:
175:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
176:Core/Src/main.c **** /* int DataIdx;
177:Core/Src/main.c **** for(DataIdx= 0; DataIdx< len; DataIdx++) {
178:Core/Src/main.c **** __io_putchar(*ptr++);
179:Core/Src/main.c **** }*/
180:Core/Src/main.c **** return len;
181:Core/Src/main.c **** }
409 .loc 1 181 0
410 000c 2046 mov r0, r4
411 000e 10BD pop {r4, pc}
412 .LVL24:
413 .L37:
414 .align 2
415 .L36:
416 0010 00000000 .word huart1
417 .cfi_endproc
418 .LFE384:
420 .section .text.display_write,"ax",%progbits
421 .align 1
422 .p2align 2,,3
423 .global display_write
424 .syntax unified
425 .thumb
426 .thumb_func
427 .fpu fpv4-sp-d16
429 display_write:
430 .LFB385:
182:Core/Src/main.c ****
183:Core/Src/main.c **** int display_write(char *ptr, int len){
431 .loc 1 183 0
432 .cfi_startproc
433 @ args = 0, pretend = 0, frame = 0
434 @ frame_needed = 0, uses_anonymous_args = 0
435 .LVL25:
436 0000 10B5 push {r4, lr}
437 .LCFI8:
438 .cfi_def_cfa_offset 8
439 .cfi_offset 4, -8
440 .cfi_offset 14, -4
184:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
441 .loc 1 184 0
442 0002 8AB2 uxth r2, r1
183:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
443 .loc 1 183 0
444 0004 0C46 mov r4, r1
445 .loc 1 184 0
446 0006 0146 mov r1, r0
447 .LVL26:
448 0008 0248 ldr r0, .L40
449 .LVL27:
450 000a FFF7FEFF bl HAL_UART_Transmit_DMA
ARM GAS /tmp/ccKbyuxk.s page 12
451 .LVL28:
185:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
186:Core/Src/main.c **** return len;
187:Core/Src/main.c **** }
452 .loc 1 187 0
453 000e 2046 mov r0, r4
454 0010 10BD pop {r4, pc}
455 .LVL29:
456 .L41:
457 0012 00BF .align 2
458 .L40:
459 0014 00000000 .word huart1
460 .cfi_endproc
461 .LFE385:
463 .section .text.start_transmit,"ax",%progbits
464 .align 1
465 .p2align 2,,3
466 .global start_transmit
467 .syntax unified
468 .thumb
469 .thumb_func
470 .fpu fpv4-sp-d16
472 start_transmit:
473 .LFB386:
188:Core/Src/main.c ****
189:Core/Src/main.c **** void start_transmit(void){
474 .loc 1 189 0
475 .cfi_startproc
476 @ args = 0, pretend = 0, frame = 0
477 @ frame_needed = 0, uses_anonymous_args = 0
478 0000 10B5 push {r4, lr}
479 .LCFI9:
480 .cfi_def_cfa_offset 8
481 .cfi_offset 4, -8
482 .cfi_offset 14, -4
190:Core/Src/main.c **** transmit = 1;
483 .loc 1 190 0
484 0002 0B4B ldr r3, .L44
191:Core/Src/main.c **** // ADC
192:Core/Src/main.c **** // HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
193:Core/Src/main.c ****
194:Core/Src/main.c **** // DAC
195:Core/Src/main.c **** HAL_TIM_Base_Start(&htim8);
196:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
485 .loc 1 196 0
486 0004 0B4C ldr r4, .L44+4
195:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
487 .loc 1 195 0
488 0006 0C48 ldr r0, .L44+8
189:Core/Src/main.c **** transmit = 1;
489 .loc 1 189 0
490 0008 82B0 sub sp, sp, #8
491 .LCFI10:
492 .cfi_def_cfa_offset 16
190:Core/Src/main.c **** // ADC
493 .loc 1 190 0
494 000a 0122 movs r2, #1
ARM GAS /tmp/ccKbyuxk.s page 13
495 000c 1A70 strb r2, [r3]
195:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
496 .loc 1 195 0
497 000e FFF7FEFF bl HAL_TIM_Base_Start
498 .LVL30:
499 .loc 1 196 0
500 0012 2046 mov r0, r4
501 0014 1021 movs r1, #16
502 0016 FFF7FEFF bl HAL_DAC_Start
503 .LVL31:
197:Core/Src/main.c **** HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_2, tx_dac_buffer, (TX_DAC_BUFFER_SIZE * 2), DAC_ALIGN
504 .loc 1 197 0
505 001a 0023 movs r3, #0
506 001c 0093 str r3, [sp]
507 001e 2046 mov r0, r4
508 0020 4FF40063 mov r3, #2048
509 0024 054A ldr r2, .L44+12
510 0026 1021 movs r1, #16
511 0028 FFF7FEFF bl HAL_DAC_Start_DMA
512 .LVL32:
198:Core/Src/main.c **** }
513 .loc 1 198 0
514 002c 02B0 add sp, sp, #8
515 .LCFI11:
516 .cfi_def_cfa_offset 8
517 @ sp needed
518 002e 10BD pop {r4, pc}
519 .L45:
520 .align 2
521 .L44:
522 0030 00000000 .word transmit
523 0034 00000000 .word hdac1
524 0038 00000000 .word htim8
525 003c 00000000 .word tx_dac_buffer
526 .cfi_endproc
527 .LFE386:
529 .section .text.stop_transmit,"ax",%progbits
530 .align 1
531 .p2align 2,,3
532 .global stop_transmit
533 .syntax unified
534 .thumb
535 .thumb_func
536 .fpu fpv4-sp-d16
538 stop_transmit:
539 .LFB387:
199:Core/Src/main.c ****
200:Core/Src/main.c **** void stop_transmit(void){
540 .loc 1 200 0
541 .cfi_startproc
542 @ args = 0, pretend = 0, frame = 0
543 @ frame_needed = 0, uses_anonymous_args = 0
544 0000 10B5 push {r4, lr}
545 .LCFI12:
546 .cfi_def_cfa_offset 8
547 .cfi_offset 4, -8
548 .cfi_offset 14, -4
ARM GAS /tmp/ccKbyuxk.s page 14
201:Core/Src/main.c **** transmit = 0;
549 .loc 1 201 0
550 0002 084B ldr r3, .L48
202:Core/Src/main.c **** // ADC
203:Core/Src/main.c **** // HAL_ADC_Stop_DMA(&hadc1);
204:Core/Src/main.c ****
205:Core/Src/main.c **** // DAC
206:Core/Src/main.c **** HAL_TIM_Base_Stop(&htim8);
207:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
551 .loc 1 207 0
552 0004 084C ldr r4, .L48+4
206:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
553 .loc 1 206 0
554 0006 0948 ldr r0, .L48+8
201:Core/Src/main.c **** transmit = 0;
555 .loc 1 201 0
556 0008 0022 movs r2, #0
557 000a 1A70 strb r2, [r3]
206:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
558 .loc 1 206 0
559 000c FFF7FEFF bl HAL_TIM_Base_Stop
560 .LVL33:
561 .loc 1 207 0
562 0010 2046 mov r0, r4
563 0012 1021 movs r1, #16
564 0014 FFF7FEFF bl HAL_DAC_Stop
565 .LVL34:
208:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_2);
566 .loc 1 208 0
567 0018 2046 mov r0, r4
568 001a 1021 movs r1, #16
209:Core/Src/main.c **** }
569 .loc 1 209 0
570 001c BDE81040 pop {r4, lr}
571 .LCFI13:
572 .cfi_restore 14
573 .cfi_restore 4
574 .cfi_def_cfa_offset 0
208:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_2);
575 .loc 1 208 0
576 0020 FFF7FEBF b HAL_DAC_Stop_DMA
577 .LVL35:
578 .L49:
579 .align 2
580 .L48:
581 0024 00000000 .word transmit
582 0028 00000000 .word hdac1
583 002c 00000000 .word htim8
584 .cfi_endproc
585 .LFE387:
587 .section .text.start_receive,"ax",%progbits
588 .align 1
589 .p2align 2,,3
590 .global start_receive
591 .syntax unified
592 .thumb
593 .thumb_func
ARM GAS /tmp/ccKbyuxk.s page 15
594 .fpu fpv4-sp-d16
596 start_receive:
597 .LFB388:
210:Core/Src/main.c ****
211:Core/Src/main.c **** void start_receive(void){
598 .loc 1 211 0
599 .cfi_startproc
600 @ args = 0, pretend = 0, frame = 0
601 @ frame_needed = 0, uses_anonymous_args = 0
602 0000 30B5 push {r4, r5, lr}
603 .LCFI14:
604 .cfi_def_cfa_offset 12
605 .cfi_offset 4, -12
606 .cfi_offset 5, -8
607 .cfi_offset 14, -4
212:Core/Src/main.c **** receive = 1;
608 .loc 1 212 0
609 0002 0D4B ldr r3, .L52
213:Core/Src/main.c **** // ADC
214:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
610 .loc 1 214 0
611 0004 0D49 ldr r1, .L52+4
215:Core/Src/main.c ****
216:Core/Src/main.c **** // DAC
217:Core/Src/main.c **** HAL_TIM_Base_Start(&htim6);
218:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_1);
612 .loc 1 218 0
613 0006 0E4C ldr r4, .L52+8
214:Core/Src/main.c ****
614 .loc 1 214 0
615 0008 0E48 ldr r0, .L52+12
211:Core/Src/main.c **** receive = 1;
616 .loc 1 211 0
617 000a 83B0 sub sp, sp, #12
618 .LCFI15:
619 .cfi_def_cfa_offset 24
214:Core/Src/main.c ****
620 .loc 1 214 0
621 000c 4FF48062 mov r2, #1024
212:Core/Src/main.c **** // ADC
622 .loc 1 212 0
623 0010 0125 movs r5, #1
624 0012 1D70 strb r5, [r3]
214:Core/Src/main.c ****
625 .loc 1 214 0
626 0014 FFF7FEFF bl HAL_ADC_Start_DMA
627 .LVL36:
217:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_1);
628 .loc 1 217 0
629 0018 0B48 ldr r0, .L52+16
630 001a FFF7FEFF bl HAL_TIM_Base_Start
631 .LVL37:
632 .loc 1 218 0
633 001e 2046 mov r0, r4
634 0020 0021 movs r1, #0
635 0022 FFF7FEFF bl HAL_DAC_Start
636 .LVL38:
ARM GAS /tmp/ccKbyuxk.s page 16
219:Core/Src/main.c **** HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, lf_buffer, (LF_BUFFER_SIZE * 2), DAC_ALIGN_12B_R);
637 .loc 1 219 0
638 0026 0021 movs r1, #0
639 0028 2046 mov r0, r4
640 002a 0091 str r1, [sp]
641 002c 8023 movs r3, #128
642 002e 074A ldr r2, .L52+20
643 0030 FFF7FEFF bl HAL_DAC_Start_DMA
644 .LVL39:
220:Core/Src/main.c **** }
645 .loc 1 220 0
646 0034 03B0 add sp, sp, #12
647 .LCFI16:
648 .cfi_def_cfa_offset 12
649 @ sp needed
650 0036 30BD pop {r4, r5, pc}
651 .L53:
652 .align 2
653 .L52:
654 0038 00000000 .word receive
655 003c 00000000 .word adc_buffer
656 0040 00000000 .word hdac1
657 0044 00000000 .word hadc1
658 0048 00000000 .word htim6
659 004c 00000000 .word lf_buffer
660 .cfi_endproc
661 .LFE388:
663 .section .text.stop_receive,"ax",%progbits
664 .align 1
665 .p2align 2,,3
666 .global stop_receive
667 .syntax unified
668 .thumb
669 .thumb_func
670 .fpu fpv4-sp-d16
672 stop_receive:
673 .LFB389:
221:Core/Src/main.c ****
222:Core/Src/main.c **** void stop_receive(void){
674 .loc 1 222 0
675 .cfi_startproc
676 @ args = 0, pretend = 0, frame = 0
677 @ frame_needed = 0, uses_anonymous_args = 0
678 0000 38B5 push {r3, r4, r5, lr}
679 .LCFI17:
680 .cfi_def_cfa_offset 16
681 .cfi_offset 3, -16
682 .cfi_offset 4, -12
683 .cfi_offset 5, -8
684 .cfi_offset 14, -4
223:Core/Src/main.c **** receive = 0;
685 .loc 1 223 0
686 0002 0A4B ldr r3, .L56
224:Core/Src/main.c **** // ADC
225:Core/Src/main.c **** HAL_ADC_Stop_DMA(&hadc1);
226:Core/Src/main.c ****
227:Core/Src/main.c **** // DAC
ARM GAS /tmp/ccKbyuxk.s page 17
228:Core/Src/main.c **** HAL_TIM_Base_Stop(&htim6);
229:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1);
687 .loc 1 229 0
688 0004 0A4D ldr r5, .L56+4
225:Core/Src/main.c ****
689 .loc 1 225 0
690 0006 0B48 ldr r0, .L56+8
223:Core/Src/main.c **** receive = 0;
691 .loc 1 223 0
692 0008 0024 movs r4, #0
693 000a 1C70 strb r4, [r3]
225:Core/Src/main.c ****
694 .loc 1 225 0
695 000c FFF7FEFF bl HAL_ADC_Stop_DMA
696 .LVL40:
228:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1);
697 .loc 1 228 0
698 0010 0948 ldr r0, .L56+12
699 0012 FFF7FEFF bl HAL_TIM_Base_Stop
700 .LVL41:
701 .loc 1 229 0
702 0016 2146 mov r1, r4
703 0018 2846 mov r0, r5
704 001a FFF7FEFF bl HAL_DAC_Stop
705 .LVL42:
230:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1);
706 .loc 1 230 0
707 001e 2146 mov r1, r4
708 0020 2846 mov r0, r5
231:Core/Src/main.c **** }
709 .loc 1 231 0
710 0022 BDE83840 pop {r3, r4, r5, lr}
711 .LCFI18:
712 .cfi_restore 14
713 .cfi_restore 5
714 .cfi_restore 4
715 .cfi_restore 3
716 .cfi_def_cfa_offset 0
230:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1);
717 .loc 1 230 0
718 0026 FFF7FEBF b HAL_DAC_Stop_DMA
719 .LVL43:
720 .L57:
721 002a 00BF .align 2
722 .L56:
723 002c 00000000 .word receive
724 0030 00000000 .word hdac1
725 0034 00000000 .word hadc1
726 0038 00000000 .word htim6
727 .cfi_endproc
728 .LFE389:
730 .section .text.SystemClock_Config,"ax",%progbits
731 .align 1
732 .p2align 2,,3
733 .global SystemClock_Config
734 .syntax unified
735 .thumb
ARM GAS /tmp/ccKbyuxk.s page 18
736 .thumb_func
737 .fpu fpv4-sp-d16
739 SystemClock_Config:
740 .LFB391:
232:Core/Src/main.c ****
233:Core/Src/main.c ****
234:Core/Src/main.c **** /* USER CODE END 0 */
235:Core/Src/main.c ****
236:Core/Src/main.c **** /**
237:Core/Src/main.c **** * @brief The application entry point.
238:Core/Src/main.c **** * @retval int
239:Core/Src/main.c **** */
240:Core/Src/main.c **** int main(void)
241:Core/Src/main.c **** {
242:Core/Src/main.c **** /* USER CODE BEGIN 1 */
243:Core/Src/main.c **** state_changed = 0;
244:Core/Src/main.c **** display_init();
245:Core/Src/main.c **** state_set_default();
246:Core/Src/main.c **** interface_set_default();
247:Core/Src/main.c **** display_update_mode();
248:Core/Src/main.c **** display_update_state();
249:Core/Src/main.c **** /* USER CODE END 1 */
250:Core/Src/main.c ****
251:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
252:Core/Src/main.c ****
253:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
254:Core/Src/main.c **** HAL_Init();
255:Core/Src/main.c ****
256:Core/Src/main.c **** /* USER CODE BEGIN Init */
257:Core/Src/main.c ****
258:Core/Src/main.c **** /* USER CODE END Init */
259:Core/Src/main.c ****
260:Core/Src/main.c **** /* Configure the system clock */
261:Core/Src/main.c **** SystemClock_Config();
262:Core/Src/main.c ****
263:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
264:Core/Src/main.c ****
265:Core/Src/main.c **** /* USER CODE END SysInit */
266:Core/Src/main.c ****
267:Core/Src/main.c **** /* Initialize all configured peripherals */
268:Core/Src/main.c **** MX_GPIO_Init();
269:Core/Src/main.c **** MX_DMA_Init();
270:Core/Src/main.c **** MX_DAC1_Init();
271:Core/Src/main.c **** MX_ADC1_Init();
272:Core/Src/main.c **** MX_TIM7_Init();
273:Core/Src/main.c **** MX_TIM6_Init();
274:Core/Src/main.c **** MX_CORDIC_Init();
275:Core/Src/main.c **** MX_USART1_UART_Init();
276:Core/Src/main.c **** MX_TIM8_Init();
277:Core/Src/main.c **** MX_OPAMP1_Init();
278:Core/Src/main.c **** /* USER CODE BEGIN 2 */
279:Core/Src/main.c **** st2_filter_init();
280:Core/Src/main.c **** audio_filter_init();
281:Core/Src/main.c **** // diag();
282:Core/Src/main.c ****
283:Core/Src/main.c **** HAL_TIM_Base_Start_IT(&htim7);
284:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
ARM GAS /tmp/ccKbyuxk.s page 19
285:Core/Src/main.c **** // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
286:Core/Src/main.c ****
287:Core/Src/main.c **** start_receive();
288:Core/Src/main.c **** /* USER CODE END 2 */
289:Core/Src/main.c ****
290:Core/Src/main.c **** /* Infinite loop */
291:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
292:Core/Src/main.c **** while (1){
293:Core/Src/main.c **** /* USER CODE END WHILE */
294:Core/Src/main.c ****
295:Core/Src/main.c **** /* USER CODE BEGIN 3 */
296:Core/Src/main.c **** if(receive){
297:Core/Src/main.c **** if(rx_adc_buffer_ready){
298:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
299:Core/Src/main.c **** rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
300:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
301:Core/Src/main.c **** rx_adc_buffer_ready = 0;
302:Core/Src/main.c **** }
303:Core/Src/main.c **** if(half_rx_dac_buffer_empty){
304:Core/Src/main.c **** if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
305:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
306:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
307:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
308:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
309:Core/Src/main.c **** }
310:Core/Src/main.c **** }
311:Core/Src/main.c **** if (transmit){
312:Core/Src/main.c **** if(half_tx_dac_buffer_empty){
313:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
314:Core/Src/main.c **** tx_mixer(tx_dac_buffer[tx_dac_buffer_toggle], TX_DAC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
315:Core/Src/main.c **** half_tx_dac_buffer_empty = 0;
316:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
317:Core/Src/main.c **** }
318:Core/Src/main.c **** if(tx_adc_buffer_ready){
319:Core/Src/main.c **** if (modulation == MOD_DC) dc_modulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
320:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
321:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
322:Core/Src/main.c **** }
323:Core/Src/main.c **** }
324:Core/Src/main.c **** if(tick){
325:Core/Src/main.c **** if(receive){
326:Core/Src/main.c **** // TODO
327:Core/Src/main.c **** rx_measure_signal(if_I, LF_BUFFER_SIZE);
328:Core/Src/main.c **** }
329:Core/Src/main.c **** // HAL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin);
330:Core/Src/main.c **** while(rx_cmd_rb_in_idx != rx_cmd_rb_out_idx) dequeue_cmd();
331:Core/Src/main.c **** if(state_changed) display_update_state();
332:Core/Src/main.c **** if(uart_tx_buf_in_idx){
333:Core/Src/main.c **** display_write(uart_tx_buf, uart_tx_buf_in_idx);
334:Core/Src/main.c **** uart_tx_buf_in_idx = 0;
335:Core/Src/main.c **** }
336:Core/Src/main.c ****
337:Core/Src/main.c **** tick = 0;
338:Core/Src/main.c **** }
339:Core/Src/main.c **** }
340:Core/Src/main.c **** /* USER CODE END 3 */
341:Core/Src/main.c **** }
ARM GAS /tmp/ccKbyuxk.s page 20
342:Core/Src/main.c ****
343:Core/Src/main.c **** /**
344:Core/Src/main.c **** * @brief System Clock Configuration
345:Core/Src/main.c **** * @retval None
346:Core/Src/main.c **** */
347:Core/Src/main.c **** void SystemClock_Config(void)
348:Core/Src/main.c **** {
741 .loc 1 348 0
742 .cfi_startproc
743 @ args = 0, pretend = 0, frame = 144
744 @ frame_needed = 0, uses_anonymous_args = 0
745 0000 30B5 push {r4, r5, lr}
746 .LCFI19:
747 .cfi_def_cfa_offset 12
748 .cfi_offset 4, -12
749 .cfi_offset 5, -8
750 .cfi_offset 14, -4
349:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
751 .loc 1 349 0
752 0002 0021 movs r1, #0
348:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
753 .loc 1 348 0
754 0004 A5B0 sub sp, sp, #148
755 .LCFI20:
756 .cfi_def_cfa_offset 160
350:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
757 .loc 1 350 0
758 0006 0C46 mov r4, r1
349:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
759 .loc 1 349 0
760 0008 3822 movs r2, #56
761 000a 05A8 add r0, sp, #20
762 000c FFF7FEFF bl memset
763 .LVL44:
351:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
764 .loc 1 351 0
765 0010 2146 mov r1, r4
766 0012 4422 movs r2, #68
767 0014 13A8 add r0, sp, #76
350:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
768 .loc 1 350 0
769 0016 CDE90044 strd r4, r4, [sp]
770 001a CDE90244 strd r4, r4, [sp, #8]
771 001e 0494 str r4, [sp, #16]
772 .loc 1 351 0
773 0020 FFF7FEFF bl memset
774 .LVL45:
352:Core/Src/main.c ****
353:Core/Src/main.c **** /** Configure the main internal regulator output voltage
354:Core/Src/main.c **** */
355:Core/Src/main.c **** HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
775 .loc 1 355 0
776 0024 2046 mov r0, r4
777 0026 FFF7FEFF bl HAL_PWREx_ControlVoltageScaling
778 .LVL46:
356:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
357:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
ARM GAS /tmp/ccKbyuxk.s page 21
358:Core/Src/main.c **** */
359:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
360:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
361:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
362:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
779 .loc 1 362 0
780 002a 0324 movs r4, #3
361:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
781 .loc 1 361 0
782 002c 0223 movs r3, #2
359:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
783 .loc 1 359 0
784 002e 0125 movs r5, #1
360:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
785 .loc 1 360 0
786 0030 4FF48031 mov r1, #65536
363:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
364:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 28;
787 .loc 1 364 0
788 0034 1C22 movs r2, #28
365:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
366:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
367:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
368:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
789 .loc 1 368 0
790 0036 05A8 add r0, sp, #20
360:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
791 .loc 1 360 0
792 0038 CDE90551 strd r5, r1, [sp, #20]
361:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
793 .loc 1 361 0
794 003c 0C93 str r3, [sp, #48]
363:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 28;
795 .loc 1 363 0
796 003e 0E93 str r3, [sp, #56]
366:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
797 .loc 1 366 0
798 0040 CDE91033 strd r3, r3, [sp, #64]
367:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
799 .loc 1 367 0
800 0044 1293 str r3, [sp, #72]
362:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
801 .loc 1 362 0
802 0046 0D94 str r4, [sp, #52]
364:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
803 .loc 1 364 0
804 0048 0F92 str r2, [sp, #60]
805 .loc 1 368 0
806 004a FFF7FEFF bl HAL_RCC_OscConfig
807 .LVL47:
808 004e 08B1 cbz r0, .L59
809 .LBB98:
810 .LBB99:
811 .LBB100:
812 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
ARM GAS /tmp/ccKbyuxk.s page 22
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
ARM GAS /tmp/ccKbyuxk.s page 23
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
ARM GAS /tmp/ccKbyuxk.s page 24
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
140:Drivers/CMSIS/Include/cmsis_gcc.h ****
141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
150:Drivers/CMSIS/Include/cmsis_gcc.h ****
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
156:Drivers/CMSIS/Include/cmsis_gcc.h ****
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
165:Drivers/CMSIS/Include/cmsis_gcc.h ****
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
168:Drivers/CMSIS/Include/cmsis_gcc.h ****
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
ARM GAS /tmp/ccKbyuxk.s page 25
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
813 .loc 2 209 0
814 .syntax unified
815 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
816 0050 72B6 cpsid i
817 @ 0 "" 2
818 .thumb
819 .syntax unified
820 .L60:
821 0052 FEE7 b .L60
822 .L59:
823 0054 0346 mov r3, r0
824 .LBE100:
825 .LBE99:
826 .LBE98:
369:Core/Src/main.c **** {
370:Core/Src/main.c **** Error_Handler();
371:Core/Src/main.c **** }
372:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
373:Core/Src/main.c **** */
374:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
827 .loc 1 374 0
ARM GAS /tmp/ccKbyuxk.s page 26
828 0056 0F22 movs r2, #15
375:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
376:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
377:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
378:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
379:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
380:Core/Src/main.c ****
381:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
829 .loc 1 381 0
830 0058 6846 mov r0, sp
831 005a 0421 movs r1, #4
377:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
832 .loc 1 377 0
833 005c CDE90143 strd r4, r3, [sp, #4]
379:Core/Src/main.c ****
834 .loc 1 379 0
835 0060 CDE90333 strd r3, r3, [sp, #12]
374:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
836 .loc 1 374 0
837 0064 0092 str r2, [sp]
838 .loc 1 381 0
839 0066 FFF7FEFF bl HAL_RCC_ClockConfig
840 .LVL48:
841 006a 0346 mov r3, r0
842 006c 08B1 cbz r0, .L61
843 .LBB101:
844 .LBB102:
845 .LBB103:
846 .loc 2 209 0
847 .syntax unified
848 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
849 006e 72B6 cpsid i
850 @ 0 "" 2
851 .thumb
852 .syntax unified
853 .L62:
854 0070 FEE7 b .L62
855 .L61:
856 .LBE103:
857 .LBE102:
858 .LBE101:
382:Core/Src/main.c **** {
383:Core/Src/main.c **** Error_Handler();
384:Core/Src/main.c **** }
385:Core/Src/main.c **** /** Initializes the peripherals clocks
386:Core/Src/main.c **** */
387:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_ADC12;
859 .loc 1 387 0
860 0072 48F20101 movw r1, #32769
388:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
389:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
861 .loc 1 389 0
862 0076 4FF00052 mov r2, #536870912
390:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
863 .loc 1 390 0
864 007a 13A8 add r0, sp, #76
387:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
ARM GAS /tmp/ccKbyuxk.s page 27
865 .loc 1 387 0
866 007c CDE91313 strd r1, r3, [sp, #76]
389:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
867 .loc 1 389 0
868 0080 2292 str r2, [sp, #136]
869 .loc 1 390 0
870 0082 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
871 .LVL49:
872 0086 08B1 cbz r0, .L58
873 .LBB104:
874 .LBB105:
875 .LBB106:
876 .loc 2 209 0
877 .syntax unified
878 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
879 0088 72B6 cpsid i
880 @ 0 "" 2
881 .thumb
882 .syntax unified
883 .L64:
884 008a FEE7 b .L64
885 .L58:
886 .LBE106:
887 .LBE105:
888 .LBE104:
391:Core/Src/main.c **** {
392:Core/Src/main.c **** Error_Handler();
393:Core/Src/main.c **** }
394:Core/Src/main.c **** }
889 .loc 1 394 0
890 008c 25B0 add sp, sp, #148
891 .LCFI21:
892 .cfi_def_cfa_offset 12
893 @ sp needed
894 008e 30BD pop {r4, r5, pc}
895 .cfi_endproc
896 .LFE391:
898 .section .text.startup.main,"ax",%progbits
899 .align 1
900 .p2align 2,,3
901 .global main
902 .syntax unified
903 .thumb
904 .thumb_func
905 .fpu fpv4-sp-d16
907 main:
908 .LFB390:
241:Core/Src/main.c **** /* USER CODE BEGIN 1 */
909 .loc 1 241 0
910 .cfi_startproc
911 @ Volatile: function does not return.
912 @ args = 0, pretend = 0, frame = 80
913 @ frame_needed = 0, uses_anonymous_args = 0
914 0000 2DE98048 push {r7, fp, lr}
915 .LCFI22:
916 .cfi_def_cfa_offset 12
917 .cfi_offset 7, -12
ARM GAS /tmp/ccKbyuxk.s page 28
918 .cfi_offset 11, -8
919 .cfi_offset 14, -4
243:Core/Src/main.c **** display_init();
920 .loc 1 243 0
921 0004 DFF8F4A2 ldr r10, .L154+52
922 .LBB193:
923 .LBB194:
924 .LBB195:
395:Core/Src/main.c ****
396:Core/Src/main.c **** /**
397:Core/Src/main.c **** * @brief ADC1 Initialization Function
398:Core/Src/main.c **** * @param None
399:Core/Src/main.c **** * @retval None
400:Core/Src/main.c **** */
401:Core/Src/main.c **** static void MX_ADC1_Init(void)
402:Core/Src/main.c **** {
403:Core/Src/main.c ****
404:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
405:Core/Src/main.c ****
406:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */
407:Core/Src/main.c ****
408:Core/Src/main.c **** ADC_MultiModeTypeDef multimode = {0};
409:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
410:Core/Src/main.c ****
411:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
412:Core/Src/main.c ****
413:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */
414:Core/Src/main.c **** /** Common config
415:Core/Src/main.c **** */
416:Core/Src/main.c **** hadc1.Instance = ADC1;
417:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
418:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
419:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
420:Core/Src/main.c **** hadc1.Init.GainCompensation = 0;
421:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
422:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
423:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
424:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = ENABLE;
425:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
426:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
427:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
428:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
429:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE;
430:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
431:Core/Src/main.c **** hadc1.Init.OversamplingMode = ENABLE;
432:Core/Src/main.c **** hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_2;
433:Core/Src/main.c **** hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_NONE;
434:Core/Src/main.c **** hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
435:Core/Src/main.c **** hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
436:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
437:Core/Src/main.c **** {
438:Core/Src/main.c **** Error_Handler();
439:Core/Src/main.c **** }
440:Core/Src/main.c **** /** Configure the ADC multi-mode
441:Core/Src/main.c **** */
442:Core/Src/main.c **** multimode.Mode = ADC_MODE_INDEPENDENT;
443:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
ARM GAS /tmp/ccKbyuxk.s page 29
444:Core/Src/main.c **** {
445:Core/Src/main.c **** Error_Handler();
446:Core/Src/main.c **** }
447:Core/Src/main.c **** /** Configure Regular Channel
448:Core/Src/main.c **** */
449:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_VOPAMP1;
450:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
451:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
452:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
453:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
454:Core/Src/main.c **** sConfig.Offset = 0;
455:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
456:Core/Src/main.c **** {
457:Core/Src/main.c **** Error_Handler();
458:Core/Src/main.c **** }
459:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
460:Core/Src/main.c ****
461:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */
462:Core/Src/main.c ****
463:Core/Src/main.c **** }
464:Core/Src/main.c ****
465:Core/Src/main.c **** /**
466:Core/Src/main.c **** * @brief CORDIC Initialization Function
467:Core/Src/main.c **** * @param None
468:Core/Src/main.c **** * @retval None
469:Core/Src/main.c **** */
470:Core/Src/main.c **** static void MX_CORDIC_Init(void)
471:Core/Src/main.c **** {
472:Core/Src/main.c ****
473:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 0 */
474:Core/Src/main.c **** // CORDIC_HandleTypeDef hcordic = {0};
475:Core/Src/main.c **** CORDIC_ConfigTypeDef sConfig = {0};
476:Core/Src/main.c **** sConfig.Function = CORDIC_FUNCTION_SINE;
477:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
478:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
479:Core/Src/main.c **** sConfig.NbWrite = CORDIC_NBWRITE_1;
480:Core/Src/main.c **** sConfig.NbRead = CORDIC_NBREAD_1;
481:Core/Src/main.c **** sConfig.InSize = CORDIC_INSIZE_32BITS;
482:Core/Src/main.c **** sConfig.OutSize = CORDIC_OUTSIZE_16BITS;
483:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
484:Core/Src/main.c ****
485:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 1 */
486:Core/Src/main.c **** /* USER CODE END CORDIC_Init 1 */
487:Core/Src/main.c **** hcordic.Instance = CORDIC;
488:Core/Src/main.c **** if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
489:Core/Src/main.c **** {
490:Core/Src/main.c **** Error_Handler();
491:Core/Src/main.c **** }
492:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 2 */
493:Core/Src/main.c **** HAL_CORDIC_Configure(&hcordic, &sConfig);
494:Core/Src/main.c **** /* USER CODE END CORDIC_Init 2 */
495:Core/Src/main.c ****
496:Core/Src/main.c **** }
497:Core/Src/main.c ****
498:Core/Src/main.c **** /**
499:Core/Src/main.c **** * @brief DAC1 Initialization Function
500:Core/Src/main.c **** * @param None
ARM GAS /tmp/ccKbyuxk.s page 30
501:Core/Src/main.c **** * @retval None
502:Core/Src/main.c **** */
503:Core/Src/main.c **** static void MX_DAC1_Init(void)
504:Core/Src/main.c **** {
505:Core/Src/main.c ****
506:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 0 */
507:Core/Src/main.c ****
508:Core/Src/main.c **** /* USER CODE END DAC1_Init 0 */
509:Core/Src/main.c ****
510:Core/Src/main.c **** DAC_ChannelConfTypeDef sConfig = {0};
511:Core/Src/main.c ****
512:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 1 */
513:Core/Src/main.c ****
514:Core/Src/main.c **** /* USER CODE END DAC1_Init 1 */
515:Core/Src/main.c **** /** DAC Initialization
516:Core/Src/main.c **** */
517:Core/Src/main.c **** hdac1.Instance = DAC1;
518:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
519:Core/Src/main.c **** {
520:Core/Src/main.c **** Error_Handler();
521:Core/Src/main.c **** }
522:Core/Src/main.c **** /** DAC channel OUT1 config
523:Core/Src/main.c **** */
524:Core/Src/main.c **** sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
525:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
526:Core/Src/main.c **** sConfig.DAC_SignedFormat = ENABLE;
527:Core/Src/main.c **** sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
528:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
529:Core/Src/main.c **** sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
530:Core/Src/main.c **** sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
531:Core/Src/main.c **** sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
532:Core/Src/main.c **** sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
533:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
534:Core/Src/main.c **** {
535:Core/Src/main.c **** Error_Handler();
536:Core/Src/main.c **** }
537:Core/Src/main.c **** /** DAC channel OUT2 config
538:Core/Src/main.c **** */
539:Core/Src/main.c **** sConfig.DAC_SignedFormat = DISABLE;
540:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
541:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
542:Core/Src/main.c **** {
543:Core/Src/main.c **** Error_Handler();
544:Core/Src/main.c **** }
545:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 2 */
546:Core/Src/main.c ****
547:Core/Src/main.c **** /* USER CODE END DAC1_Init 2 */
548:Core/Src/main.c ****
549:Core/Src/main.c **** }
550:Core/Src/main.c ****
551:Core/Src/main.c **** /**
552:Core/Src/main.c **** * @brief OPAMP1 Initialization Function
553:Core/Src/main.c **** * @param None
554:Core/Src/main.c **** * @retval None
555:Core/Src/main.c **** */
556:Core/Src/main.c **** static void MX_OPAMP1_Init(void)
557:Core/Src/main.c **** {
ARM GAS /tmp/ccKbyuxk.s page 31
558:Core/Src/main.c ****
559:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 0 */
560:Core/Src/main.c ****
561:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 0 */
562:Core/Src/main.c ****
563:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 1 */
564:Core/Src/main.c ****
565:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 1 */
566:Core/Src/main.c **** hopamp1.Instance = OPAMP1;
567:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
568:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
569:Core/Src/main.c **** hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
570:Core/Src/main.c **** hopamp1.Init.InternalOutput = ENABLE;
571:Core/Src/main.c **** hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
572:Core/Src/main.c **** hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS;
573:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_8_OR_MINUS_7;
574:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
575:Core/Src/main.c **** if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
576:Core/Src/main.c **** {
577:Core/Src/main.c **** Error_Handler();
578:Core/Src/main.c **** }
579:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 2 */
580:Core/Src/main.c ****
581:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 2 */
582:Core/Src/main.c ****
583:Core/Src/main.c **** }
584:Core/Src/main.c ****
585:Core/Src/main.c **** /**
586:Core/Src/main.c **** * @brief TIM6 Initialization Function
587:Core/Src/main.c **** * @param None
588:Core/Src/main.c **** * @retval None
589:Core/Src/main.c **** */
590:Core/Src/main.c **** static void MX_TIM6_Init(void)
591:Core/Src/main.c **** {
592:Core/Src/main.c ****
593:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */
594:Core/Src/main.c ****
595:Core/Src/main.c **** /* USER CODE END TIM6_Init 0 */
596:Core/Src/main.c ****
597:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
598:Core/Src/main.c ****
599:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */
600:Core/Src/main.c ****
601:Core/Src/main.c **** /* USER CODE END TIM6_Init 1 */
602:Core/Src/main.c **** htim6.Instance = TIM6;
603:Core/Src/main.c **** htim6.Init.Prescaler = 0;
604:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
605:Core/Src/main.c **** htim6.Init.Period = 7679;
606:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
607:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
608:Core/Src/main.c **** {
609:Core/Src/main.c **** Error_Handler();
610:Core/Src/main.c **** }
611:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
612:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
613:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
614:Core/Src/main.c **** {
ARM GAS /tmp/ccKbyuxk.s page 32
615:Core/Src/main.c **** Error_Handler();
616:Core/Src/main.c **** }
617:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
618:Core/Src/main.c ****
619:Core/Src/main.c **** /* USER CODE END TIM6_Init 2 */
620:Core/Src/main.c ****
621:Core/Src/main.c **** }
622:Core/Src/main.c ****
623:Core/Src/main.c **** /**
624:Core/Src/main.c **** * @brief TIM7 Initialization Function
625:Core/Src/main.c **** * @param None
626:Core/Src/main.c **** * @retval None
627:Core/Src/main.c **** */
628:Core/Src/main.c **** static void MX_TIM7_Init(void)
629:Core/Src/main.c **** {
630:Core/Src/main.c ****
631:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */
632:Core/Src/main.c ****
633:Core/Src/main.c **** /* USER CODE END TIM7_Init 0 */
634:Core/Src/main.c ****
635:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
636:Core/Src/main.c ****
637:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */
638:Core/Src/main.c ****
639:Core/Src/main.c **** /* USER CODE END TIM7_Init 1 */
640:Core/Src/main.c **** htim7.Instance = TIM7;
641:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
642:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
643:Core/Src/main.c **** htim7.Init.Period = 999;
644:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
645:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
646:Core/Src/main.c **** {
647:Core/Src/main.c **** Error_Handler();
648:Core/Src/main.c **** }
649:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
650:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
651:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
652:Core/Src/main.c **** {
653:Core/Src/main.c **** Error_Handler();
654:Core/Src/main.c **** }
655:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
656:Core/Src/main.c ****
657:Core/Src/main.c **** /* USER CODE END TIM7_Init 2 */
658:Core/Src/main.c ****
659:Core/Src/main.c **** }
660:Core/Src/main.c ****
661:Core/Src/main.c **** /**
662:Core/Src/main.c **** * @brief TIM8 Initialization Function
663:Core/Src/main.c **** * @param None
664:Core/Src/main.c **** * @retval None
665:Core/Src/main.c **** */
666:Core/Src/main.c **** static void MX_TIM8_Init(void)
667:Core/Src/main.c **** {
668:Core/Src/main.c ****
669:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */
670:Core/Src/main.c ****
671:Core/Src/main.c **** /* USER CODE END TIM8_Init 0 */
ARM GAS /tmp/ccKbyuxk.s page 33
672:Core/Src/main.c ****
673:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
674:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
675:Core/Src/main.c ****
676:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */
677:Core/Src/main.c ****
678:Core/Src/main.c **** /* USER CODE END TIM8_Init 1 */
679:Core/Src/main.c **** htim8.Instance = TIM8;
680:Core/Src/main.c **** htim8.Init.Prescaler = 0;
681:Core/Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
682:Core/Src/main.c **** htim8.Init.Period = 239;
683:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
684:Core/Src/main.c **** htim8.Init.RepetitionCounter = 0;
685:Core/Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
686:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
687:Core/Src/main.c **** {
688:Core/Src/main.c **** Error_Handler();
689:Core/Src/main.c **** }
690:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
691:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
692:Core/Src/main.c **** {
693:Core/Src/main.c **** Error_Handler();
694:Core/Src/main.c **** }
695:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
696:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
697:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
698:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
699:Core/Src/main.c **** {
700:Core/Src/main.c **** Error_Handler();
701:Core/Src/main.c **** }
702:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */
703:Core/Src/main.c ****
704:Core/Src/main.c **** /* USER CODE END TIM8_Init 2 */
705:Core/Src/main.c ****
706:Core/Src/main.c **** }
707:Core/Src/main.c ****
708:Core/Src/main.c **** /**
709:Core/Src/main.c **** * @brief USART1 Initialization Function
710:Core/Src/main.c **** * @param None
711:Core/Src/main.c **** * @retval None
712:Core/Src/main.c **** */
713:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
714:Core/Src/main.c **** {
715:Core/Src/main.c ****
716:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
717:Core/Src/main.c ****
718:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
719:Core/Src/main.c ****
720:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
721:Core/Src/main.c ****
722:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
723:Core/Src/main.c **** huart1.Instance = USART1;
724:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
725:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
726:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
727:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
728:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
ARM GAS /tmp/ccKbyuxk.s page 34
729:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
730:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
731:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
732:Core/Src/main.c **** huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
733:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
734:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
735:Core/Src/main.c **** {
736:Core/Src/main.c **** Error_Handler();
737:Core/Src/main.c **** }
738:Core/Src/main.c **** if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
739:Core/Src/main.c **** {
740:Core/Src/main.c **** Error_Handler();
741:Core/Src/main.c **** }
742:Core/Src/main.c **** if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
743:Core/Src/main.c **** {
744:Core/Src/main.c **** Error_Handler();
745:Core/Src/main.c **** }
746:Core/Src/main.c **** if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
747:Core/Src/main.c **** {
748:Core/Src/main.c **** Error_Handler();
749:Core/Src/main.c **** }
750:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
751:Core/Src/main.c ****
752:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
753:Core/Src/main.c ****
754:Core/Src/main.c **** }
755:Core/Src/main.c ****
756:Core/Src/main.c **** /**
757:Core/Src/main.c **** * Enable DMA controller clock
758:Core/Src/main.c **** */
759:Core/Src/main.c **** static void MX_DMA_Init(void)
760:Core/Src/main.c **** {
761:Core/Src/main.c ****
762:Core/Src/main.c **** /* DMA controller clock enable */
763:Core/Src/main.c **** __HAL_RCC_DMAMUX1_CLK_ENABLE();
764:Core/Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE();
765:Core/Src/main.c ****
766:Core/Src/main.c **** /* DMA interrupt init */
767:Core/Src/main.c **** /* DMA1_Channel1_IRQn interrupt configuration */
768:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
769:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
770:Core/Src/main.c **** /* DMA1_Channel2_IRQn interrupt configuration */
771:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
772:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
773:Core/Src/main.c **** /* DMA1_Channel4_IRQn interrupt configuration */
774:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
775:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
776:Core/Src/main.c **** /* DMA1_Channel5_IRQn interrupt configuration */
777:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
778:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
779:Core/Src/main.c ****
780:Core/Src/main.c **** }
781:Core/Src/main.c ****
782:Core/Src/main.c **** /**
783:Core/Src/main.c **** * @brief GPIO Initialization Function
784:Core/Src/main.c **** * @param None
785:Core/Src/main.c **** * @retval None
ARM GAS /tmp/ccKbyuxk.s page 35
786:Core/Src/main.c **** */
787:Core/Src/main.c **** static void MX_GPIO_Init(void)
788:Core/Src/main.c **** {
789:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
790:Core/Src/main.c ****
791:Core/Src/main.c **** /* GPIO Ports Clock Enable */
792:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
925 .loc 1 792 0
926 0008 AF4D ldr r5, .L154
927 .LBE195:
928 .LBE194:
929 .LBE193:
930 .LBB202:
931 .LBB203:
517:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
932 .loc 1 517 0
933 000a DFF8F482 ldr r8, .L154+56
934 .LBE203:
935 .LBE202:
241:Core/Src/main.c **** /* USER CODE BEGIN 1 */
936 .loc 1 241 0
937 000e 97B0 sub sp, sp, #92
938 .LCFI23:
939 .cfi_def_cfa_offset 104
243:Core/Src/main.c **** display_init();
940 .loc 1 243 0
941 0010 0024 movs r4, #0
942 0012 AAF80040 strh r4, [r10] @ movhi
244:Core/Src/main.c **** state_set_default();
943 .loc 1 244 0
944 0016 FFF7FEFF bl display_init
945 .LVL50:
245:Core/Src/main.c **** interface_set_default();
946 .loc 1 245 0
947 001a FFF7FEFF bl state_set_default
948 .LVL51:
246:Core/Src/main.c **** display_update_mode();
949 .loc 1 246 0
950 001e FFF7FEFF bl interface_set_default
951 .LVL52:
247:Core/Src/main.c **** display_update_state();
952 .loc 1 247 0
953 0022 FFF7FEFF bl display_update_mode
954 .LVL53:
248:Core/Src/main.c **** /* USER CODE END 1 */
955 .loc 1 248 0
956 0026 FFF7FEFF bl display_update_state
957 .LVL54:
254:Core/Src/main.c ****
958 .loc 1 254 0
959 002a FFF7FEFF bl HAL_Init
960 .LVL55:
261:Core/Src/main.c ****
961 .loc 1 261 0
962 002e FFF7FEFF bl SystemClock_Config
963 .LVL56:
964 .LBB214:
ARM GAS /tmp/ccKbyuxk.s page 36
965 .LBB201:
789:Core/Src/main.c ****
966 .loc 1 789 0
967 0032 CDE90A44 strd r4, r4, [sp, #40]
968 0036 CDE90C44 strd r4, r4, [sp, #48]
969 003a 0E94 str r4, [sp, #56]
970 .LBB196:
971 .loc 1 792 0
972 003c EB6C ldr r3, [r5, #76]
973 .LBE196:
793:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
794:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
795:Core/Src/main.c ****
796:Core/Src/main.c **** /*Configure GPIO pin Output Level */
797:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, GPIO_PIN_RESET);
974 .loc 1 797 0
975 003e A348 ldr r0, .L154+4
976 .LBB197:
792:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
977 .loc 1 792 0
978 0040 43F02003 orr r3, r3, #32
979 0044 EB64 str r3, [r5, #76]
980 0046 EB6C ldr r3, [r5, #76]
981 0048 03F02003 and r3, r3, #32
982 004c 0493 str r3, [sp, #16]
983 004e 049B ldr r3, [sp, #16]
984 .LBE197:
985 .LBB198:
793:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
986 .loc 1 793 0
987 0050 EB6C ldr r3, [r5, #76]
988 0052 43F00103 orr r3, r3, #1
989 0056 EB64 str r3, [r5, #76]
990 0058 EB6C ldr r3, [r5, #76]
991 005a 03F00103 and r3, r3, #1
992 005e 0593 str r3, [sp, #20]
993 0060 059B ldr r3, [sp, #20]
994 .LBE198:
995 .LBB199:
794:Core/Src/main.c ****
996 .loc 1 794 0
997 0062 EB6C ldr r3, [r5, #76]
998 0064 43F00203 orr r3, r3, #2
999 0068 EB64 str r3, [r5, #76]
1000 006a EB6C ldr r3, [r5, #76]
1001 006c 03F00203 and r3, r3, #2
1002 .LBE199:
1003 .loc 1 797 0
1004 0070 2246 mov r2, r4
1005 0072 2021 movs r1, #32
1006 .LBB200:
794:Core/Src/main.c ****
1007 .loc 1 794 0
1008 0074 0693 str r3, [sp, #24]
1009 0076 069B ldr r3, [sp, #24]
1010 .LBE200:
798:Core/Src/main.c ****
ARM GAS /tmp/ccKbyuxk.s page 37
799:Core/Src/main.c **** /*Configure GPIO pin : OUT_Pin */
800:Core/Src/main.c **** GPIO_InitStruct.Pin = OUT_Pin;
1011 .loc 1 800 0
1012 0078 0E46 mov r6, r1
801:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
1013 .loc 1 801 0
1014 007a 0127 movs r7, #1
797:Core/Src/main.c ****
1015 .loc 1 797 0
1016 007c FFF7FEFF bl HAL_GPIO_WritePin
1017 .LVL57:
802:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
803:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
804:Core/Src/main.c **** HAL_GPIO_Init(OUT_GPIO_Port, &GPIO_InitStruct);
1018 .loc 1 804 0
1019 0080 0AA9 add r1, sp, #40
1020 0082 9248 ldr r0, .L154+4
803:Core/Src/main.c **** HAL_GPIO_Init(OUT_GPIO_Port, &GPIO_InitStruct);
1021 .loc 1 803 0
1022 0084 CDE90C44 strd r4, r4, [sp, #48]
801:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1023 .loc 1 801 0
1024 0088 CDE90A67 strd r6, r7, [sp, #40]
1025 .loc 1 804 0
1026 008c FFF7FEFF bl HAL_GPIO_Init
1027 .LVL58:
1028 .LBE201:
1029 .LBE214:
1030 .LBB215:
1031 .LBB216:
1032 .LBB217:
763:Core/Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE();
1033 .loc 1 763 0
1034 0090 AB6C ldr r3, [r5, #72]
1035 0092 43F00403 orr r3, r3, #4
1036 0096 AB64 str r3, [r5, #72]
1037 0098 AB6C ldr r3, [r5, #72]
1038 009a 03F00403 and r3, r3, #4
1039 009e 0293 str r3, [sp, #8]
1040 00a0 029B ldr r3, [sp, #8]
1041 .LBE217:
1042 .LBB218:
764:Core/Src/main.c ****
1043 .loc 1 764 0
1044 00a2 AB6C ldr r3, [r5, #72]
1045 00a4 3B43 orrs r3, r3, r7
1046 00a6 AB64 str r3, [r5, #72]
1047 00a8 AB6C ldr r3, [r5, #72]
1048 00aa 3B40 ands r3, r3, r7
1049 .LBE218:
768:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
1050 .loc 1 768 0
1051 00ac 2246 mov r2, r4
1052 00ae 2146 mov r1, r4
1053 .LBB219:
764:Core/Src/main.c ****
1054 .loc 1 764 0
ARM GAS /tmp/ccKbyuxk.s page 38
1055 00b0 0393 str r3, [sp, #12]
1056 .LBE219:
768:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
1057 .loc 1 768 0
1058 00b2 0B20 movs r0, #11
1059 .LBB220:
764:Core/Src/main.c ****
1060 .loc 1 764 0
1061 00b4 039B ldr r3, [sp, #12]
1062 .LBE220:
768:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
1063 .loc 1 768 0
1064 00b6 FFF7FEFF bl HAL_NVIC_SetPriority
1065 .LVL59:
769:Core/Src/main.c **** /* DMA1_Channel2_IRQn interrupt configuration */
1066 .loc 1 769 0
1067 00ba 0B20 movs r0, #11
1068 00bc FFF7FEFF bl HAL_NVIC_EnableIRQ
1069 .LVL60:
771:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
1070 .loc 1 771 0
1071 00c0 2246 mov r2, r4
1072 00c2 2146 mov r1, r4
1073 00c4 0C20 movs r0, #12
1074 00c6 FFF7FEFF bl HAL_NVIC_SetPriority
1075 .LVL61:
772:Core/Src/main.c **** /* DMA1_Channel4_IRQn interrupt configuration */
1076 .loc 1 772 0
1077 00ca 0C20 movs r0, #12
1078 00cc FFF7FEFF bl HAL_NVIC_EnableIRQ
1079 .LVL62:
774:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
1080 .loc 1 774 0
1081 00d0 2246 mov r2, r4
1082 00d2 2146 mov r1, r4
1083 00d4 0E20 movs r0, #14
1084 00d6 FFF7FEFF bl HAL_NVIC_SetPriority
1085 .LVL63:
775:Core/Src/main.c **** /* DMA1_Channel5_IRQn interrupt configuration */
1086 .loc 1 775 0
1087 00da 0E20 movs r0, #14
1088 00dc FFF7FEFF bl HAL_NVIC_EnableIRQ
1089 .LVL64:
777:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
1090 .loc 1 777 0
1091 00e0 2246 mov r2, r4
1092 00e2 2146 mov r1, r4
1093 00e4 0F20 movs r0, #15
1094 00e6 FFF7FEFF bl HAL_NVIC_SetPriority
1095 .LVL65:
778:Core/Src/main.c ****
1096 .loc 1 778 0
1097 00ea 0F20 movs r0, #15
1098 00ec FFF7FEFF bl HAL_NVIC_EnableIRQ
1099 .LVL66:
1100 .LBE216:
1101 .LBE215:
ARM GAS /tmp/ccKbyuxk.s page 39
1102 .LBB221:
1103 .LBB213:
510:Core/Src/main.c ****
1104 .loc 1 510 0
1105 00f0 2146 mov r1, r4
1106 00f2 0AA8 add r0, sp, #40
1107 00f4 3022 movs r2, #48
1108 00f6 FFF7FEFF bl memset
1109 .LVL67:
517:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
1110 .loc 1 517 0
1111 00fa 754B ldr r3, .L154+8
1112 00fc C8F80030 str r3, [r8]
518:Core/Src/main.c **** {
1113 .loc 1 518 0
1114 0100 4046 mov r0, r8
1115 0102 FFF7FEFF bl HAL_DAC_Init
1116 .LVL68:
1117 0106 08B1 cbz r0, .L67
1118 .LBB204:
1119 .LBB205:
1120 .LBB206:
1121 .loc 2 209 0
1122 .syntax unified
1123 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1124 0108 72B6 cpsid i
1125 @ 0 "" 2
1126 .thumb
1127 .syntax unified
1128 .L68:
1129 010a FEE7 b .L68
1130 .L67:
1131 .LBE206:
1132 .LBE205:
1133 .LBE204:
527:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
1134 .loc 1 527 0
1135 010c 0024 movs r4, #0
1136 010e 1E25 movs r5, #30
1137 0110 CDE90C45 strd r4, [sp, #48]
1138 0114 0024 movs r4, #0
1139 0116 0025 movs r5, #0
524:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
1140 .loc 1 524 0
1141 0118 0223 movs r3, #2
527:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
1142 .loc 1 527 0
1143 011a CDE90E45 strd r4, [sp, #56]
533:Core/Src/main.c **** {
1144 .loc 1 533 0
1145 011e 0246 mov r2, r0
525:Core/Src/main.c **** sConfig.DAC_SignedFormat = ENABLE;
1146 .loc 1 525 0
1147 0120 8DF82C00 strb r0, [sp, #44]
533:Core/Src/main.c **** {
1148 .loc 1 533 0
1149 0124 0AA9 add r1, sp, #40
ARM GAS /tmp/ccKbyuxk.s page 40
527:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
1150 .loc 1 527 0
1151 0126 0124 movs r4, #1
1152 0128 0025 movs r5, #0
533:Core/Src/main.c **** {
1153 .loc 1 533 0
1154 012a 4046 mov r0, r8
524:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
1155 .loc 1 524 0
1156 012c 0A93 str r3, [sp, #40]
526:Core/Src/main.c **** sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
1157 .loc 1 526 0
1158 012e 8DF82D70 strb r7, [sp, #45]
527:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
1159 .loc 1 527 0
1160 0132 CDE91045 strd r4, [sp, #64]
533:Core/Src/main.c **** {
1161 .loc 1 533 0
1162 0136 FFF7FEFF bl HAL_DAC_ConfigChannel
1163 .LVL69:
1164 013a 0346 mov r3, r0
1165 013c 08B1 cbz r0, .L69
1166 .LBB207:
1167 .LBB208:
1168 .LBB209:
1169 .loc 2 209 0
1170 .syntax unified
1171 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1172 013e 72B6 cpsid i
1173 @ 0 "" 2
1174 .thumb
1175 .syntax unified
1176 .L70:
1177 0140 FEE7 b .L70
1178 .L69:
1179 .LBE209:
1180 .LBE208:
1181 .LBE207:
541:Core/Src/main.c **** {
1182 .loc 1 541 0
1183 0142 4046 mov r0, r8
1184 0144 1022 movs r2, #16
1185 0146 0AA9 add r1, sp, #40
539:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
1186 .loc 1 539 0
1187 0148 8DF82D30 strb r3, [sp, #45]
540:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
1188 .loc 1 540 0
1189 014c 0D93 str r3, [sp, #52]
541:Core/Src/main.c **** {
1190 .loc 1 541 0
1191 014e FFF7FEFF bl HAL_DAC_ConfigChannel
1192 .LVL70:
1193 0152 0546 mov r5, r0
1194 0154 08B1 cbz r0, .L71
1195 .LBB210:
1196 .LBB211:
ARM GAS /tmp/ccKbyuxk.s page 41
1197 .LBB212:
1198 .loc 2 209 0
1199 .syntax unified
1200 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1201 0156 72B6 cpsid i
1202 @ 0 "" 2
1203 .thumb
1204 .syntax unified
1205 .L72:
1206 0158 FEE7 b .L72
1207 .L71:
1208 .LBE212:
1209 .LBE211:
1210 .LBE210:
1211 .LBE213:
1212 .LBE221:
1213 .LBB222:
1214 .LBB223:
416:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
1215 .loc 1 416 0
1216 015a 5E4C ldr r4, .L154+12
408:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
1217 .loc 1 408 0
1218 015c 0790 str r0, [sp, #28]
409:Core/Src/main.c ****
1219 .loc 1 409 0
1220 015e 0146 mov r1, r0
1221 0160 3246 mov r2, r6
1222 0162 0AA8 add r0, sp, #40
408:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
1223 .loc 1 408 0
1224 0164 CDE90855 strd r5, r5, [sp, #32]
422:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
1225 .loc 1 422 0
1226 0168 4FF00408 mov r8, #4
409:Core/Src/main.c ****
1227 .loc 1 409 0
1228 016c FFF7FEFF bl memset
1229 .LVL71:
417:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
1230 .loc 1 417 0
1231 0170 4FF44033 mov r3, #196608
416:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
1232 .loc 1 416 0
1233 0174 4FF0A042 mov r2, #1342177280
436:Core/Src/main.c **** {
1234 .loc 1 436 0
1235 0178 2046 mov r0, r4
417:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
1236 .loc 1 417 0
1237 017a C4E90023 strd r2, r3, [r4]
419:Core/Src/main.c **** hadc1.Init.GainCompensation = 0;
1238 .loc 1 419 0
1239 017e C4E90255 strd r5, r5, [r4, #8]
421:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
1240 .loc 1 421 0
1241 0182 C4E90455 strd r5, r5, [r4, #16]
ARM GAS /tmp/ccKbyuxk.s page 42
423:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = ENABLE;
1242 .loc 1 423 0
1243 0186 2577 strb r5, [r4, #28]
424:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
1244 .loc 1 424 0
1245 0188 6777 strb r7, [r4, #29]
425:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
1246 .loc 1 425 0
1247 018a 2762 str r7, [r4, #32]
426:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
1248 .loc 1 426 0
1249 018c 84F82450 strb r5, [r4, #36]
428:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE;
1250 .loc 1 428 0
1251 0190 C4E90B55 strd r5, r5, [r4, #44]
429:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
1252 .loc 1 429 0
1253 0194 84F83870 strb r7, [r4, #56]
430:Core/Src/main.c **** hadc1.Init.OversamplingMode = ENABLE;
1254 .loc 1 430 0
1255 0198 E563 str r5, [r4, #60]
431:Core/Src/main.c **** hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_2;
1256 .loc 1 431 0
1257 019a 84F84070 strb r7, [r4, #64]
433:Core/Src/main.c **** hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
1258 .loc 1 433 0
1259 019e C4E91155 strd r5, r5, [r4, #68]
434:Core/Src/main.c **** hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
1260 .loc 1 434 0
1261 01a2 E564 str r5, [r4, #76]
435:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
1262 .loc 1 435 0
1263 01a4 2765 str r7, [r4, #80]
422:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
1264 .loc 1 422 0
1265 01a6 C4F81880 str r8, [r4, #24]
436:Core/Src/main.c **** {
1266 .loc 1 436 0
1267 01aa FFF7FEFF bl HAL_ADC_Init
1268 .LVL72:
1269 01ae 0346 mov r3, r0
1270 01b0 08B1 cbz r0, .L73
1271 .LBB224:
1272 .LBB225:
1273 .LBB226:
1274 .loc 2 209 0
1275 .syntax unified
1276 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1277 01b2 72B6 cpsid i
1278 @ 0 "" 2
1279 .thumb
1280 .syntax unified
1281 .L74:
1282 01b4 FEE7 b .L74
1283 .L73:
1284 .LBE226:
1285 .LBE225:
ARM GAS /tmp/ccKbyuxk.s page 43
1286 .LBE224:
443:Core/Src/main.c **** {
1287 .loc 1 443 0
1288 01b6 07A9 add r1, sp, #28
1289 01b8 2046 mov r0, r4
442:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
1290 .loc 1 442 0
1291 01ba 0793 str r3, [sp, #28]
443:Core/Src/main.c **** {
1292 .loc 1 443 0
1293 01bc FFF7FEFF bl HAL_ADCEx_MultiModeConfigChannel
1294 .LVL73:
1295 01c0 0346 mov r3, r0
1296 01c2 08B1 cbz r0, .L75
1297 .LBB227:
1298 .LBB228:
1299 .LBB229:
1300 .loc 2 209 0
1301 .syntax unified
1302 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1303 01c4 72B6 cpsid i
1304 @ 0 "" 2
1305 .thumb
1306 .syntax unified
1307 .L76:
1308 01c6 FEE7 b .L76
1309 .L75:
1310 .LBE229:
1311 .LBE228:
1312 .LBE227:
449:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
1313 .loc 1 449 0
1314 01c8 4349 ldr r1, .L154+16
454:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
1315 .loc 1 454 0
1316 01ca 0F93 str r3, [sp, #60]
450:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
1317 .loc 1 450 0
1318 01cc 0622 movs r2, #6
452:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
1319 .loc 1 452 0
1320 01ce 7F23 movs r3, #127
449:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
1321 .loc 1 449 0
1322 01d0 0A91 str r1, [sp, #40]
455:Core/Src/main.c **** {
1323 .loc 1 455 0
1324 01d2 2046 mov r0, r4
1325 01d4 0AA9 add r1, sp, #40
451:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
1326 .loc 1 451 0
1327 01d6 CDF83080 str r8, [sp, #48]
453:Core/Src/main.c **** sConfig.Offset = 0;
1328 .loc 1 453 0
1329 01da CDF83880 str r8, [sp, #56]
450:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
1330 .loc 1 450 0
ARM GAS /tmp/ccKbyuxk.s page 44
1331 01de 0B92 str r2, [sp, #44]
452:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
1332 .loc 1 452 0
1333 01e0 0D93 str r3, [sp, #52]
455:Core/Src/main.c **** {
1334 .loc 1 455 0
1335 01e2 FFF7FEFF bl HAL_ADC_ConfigChannel
1336 .LVL74:
1337 01e6 08B1 cbz r0, .L77
1338 .LBB230:
1339 .LBB231:
1340 .LBB232:
1341 .loc 2 209 0
1342 .syntax unified
1343 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1344 01e8 72B6 cpsid i
1345 @ 0 "" 2
1346 .thumb
1347 .syntax unified
1348 .L78:
1349 01ea FEE7 b .L78
1350 .L77:
1351 .LBE232:
1352 .LBE231:
1353 .LBE230:
1354 .LBE223:
1355 .LBE222:
1356 .LBB233:
1357 .LBB234:
640:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
1358 .loc 1 640 0
1359 01ec 3B4C ldr r4, .L154+20
1360 01ee 3C49 ldr r1, .L154+24
635:Core/Src/main.c ****
1361 .loc 1 635 0
1362 01f0 0A90 str r0, [sp, #40]
643:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1363 .loc 1 643 0
1364 01f2 40F2E733 movw r3, #999
641:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
1365 .loc 1 641 0
1366 01f6 40F28F62 movw r2, #1679
635:Core/Src/main.c ****
1367 .loc 1 635 0
1368 01fa CDE90B00 strd r0, r0, [sp, #44]
642:Core/Src/main.c **** htim7.Init.Period = 999;
1369 .loc 1 642 0
1370 01fe A060 str r0, [r4, #8]
644:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
1371 .loc 1 644 0
1372 0200 A061 str r0, [r4, #24]
645:Core/Src/main.c **** {
1373 .loc 1 645 0
1374 0202 2046 mov r0, r4
643:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1375 .loc 1 643 0
1376 0204 E360 str r3, [r4, #12]
ARM GAS /tmp/ccKbyuxk.s page 45
640:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
1377 .loc 1 640 0
1378 0206 2160 str r1, [r4]
641:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
1379 .loc 1 641 0
1380 0208 6260 str r2, [r4, #4]
645:Core/Src/main.c **** {
1381 .loc 1 645 0
1382 020a FFF7FEFF bl HAL_TIM_Base_Init
1383 .LVL75:
1384 020e 0346 mov r3, r0
1385 0210 08B1 cbz r0, .L79
1386 .LBB235:
1387 .LBB236:
1388 .LBB237:
1389 .loc 2 209 0
1390 .syntax unified
1391 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1392 0212 72B6 cpsid i
1393 @ 0 "" 2
1394 .thumb
1395 .syntax unified
1396 .L80:
1397 0214 FEE7 b .L80
1398 .L79:
1399 .LBE237:
1400 .LBE236:
1401 .LBE235:
651:Core/Src/main.c **** {
1402 .loc 1 651 0
1403 0216 2046 mov r0, r4
1404 0218 0AA9 add r1, sp, #40
649:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
1405 .loc 1 649 0
1406 021a 0A93 str r3, [sp, #40]
650:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
1407 .loc 1 650 0
1408 021c 0C93 str r3, [sp, #48]
651:Core/Src/main.c **** {
1409 .loc 1 651 0
1410 021e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
1411 .LVL76:
1412 0222 08B1 cbz r0, .L81
1413 .LBB238:
1414 .LBB239:
1415 .LBB240:
1416 .loc 2 209 0
1417 .syntax unified
1418 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1419 0224 72B6 cpsid i
1420 @ 0 "" 2
1421 .thumb
1422 .syntax unified
1423 .L82:
1424 0226 FEE7 b .L82
1425 .L81:
1426 .LBE240:
ARM GAS /tmp/ccKbyuxk.s page 46
1427 .LBE239:
1428 .LBE238:
1429 .LBE234:
1430 .LBE233:
1431 .LBB241:
1432 .LBB242:
602:Core/Src/main.c **** htim6.Init.Prescaler = 0;
1433 .loc 1 602 0
1434 0228 2E4C ldr r4, .L154+28
1435 022a 2F4A ldr r2, .L154+32
597:Core/Src/main.c ****
1436 .loc 1 597 0
1437 022c 0A90 str r0, [sp, #40]
605:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1438 .loc 1 605 0
1439 022e 41F6FF53 movw r3, #7679
597:Core/Src/main.c ****
1440 .loc 1 597 0
1441 0232 CDE90B00 strd r0, r0, [sp, #44]
604:Core/Src/main.c **** htim6.Init.Period = 7679;
1442 .loc 1 604 0
1443 0236 C4E90100 strd r0, r0, [r4, #4]
606:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
1444 .loc 1 606 0
1445 023a A061 str r0, [r4, #24]
607:Core/Src/main.c **** {
1446 .loc 1 607 0
1447 023c 2046 mov r0, r4
605:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1448 .loc 1 605 0
1449 023e E360 str r3, [r4, #12]
602:Core/Src/main.c **** htim6.Init.Prescaler = 0;
1450 .loc 1 602 0
1451 0240 2260 str r2, [r4]
607:Core/Src/main.c **** {
1452 .loc 1 607 0
1453 0242 FFF7FEFF bl HAL_TIM_Base_Init
1454 .LVL77:
1455 0246 0346 mov r3, r0
1456 0248 08B1 cbz r0, .L83
1457 .LBB243:
1458 .LBB244:
1459 .LBB245:
1460 .loc 2 209 0
1461 .syntax unified
1462 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1463 024a 72B6 cpsid i
1464 @ 0 "" 2
1465 .thumb
1466 .syntax unified
1467 .L84:
1468 024c FEE7 b .L84
1469 .L83:
1470 .LBE245:
1471 .LBE244:
1472 .LBE243:
613:Core/Src/main.c **** {
ARM GAS /tmp/ccKbyuxk.s page 47
1473 .loc 1 613 0
1474 024e 2046 mov r0, r4
1475 0250 0AA9 add r1, sp, #40
611:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
1476 .loc 1 611 0
1477 0252 0A96 str r6, [sp, #40]
612:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
1478 .loc 1 612 0
1479 0254 0C93 str r3, [sp, #48]
613:Core/Src/main.c **** {
1480 .loc 1 613 0
1481 0256 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
1482 .LVL78:
1483 025a 08B1 cbz r0, .L85
1484 .LBB246:
1485 .LBB247:
1486 .LBB248:
1487 .loc 2 209 0
1488 .syntax unified
1489 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1490 025c 72B6 cpsid i
1491 @ 0 "" 2
1492 .thumb
1493 .syntax unified
1494 .L86:
1495 025e FEE7 b .L86
1496 .L85:
1497 .LBE248:
1498 .LBE247:
1499 .LBE246:
1500 .LBE242:
1501 .LBE241:
1502 .LBB249:
1503 .LBB250:
487:Core/Src/main.c **** if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
1504 .loc 1 487 0
1505 0260 224F ldr r7, .L154+36
1506 0262 234B ldr r3, .L154+40
1507 0264 3B60 str r3, [r7]
475:Core/Src/main.c **** sConfig.Function = CORDIC_FUNCTION_SINE;
1508 .loc 1 475 0
1509 0266 0023 movs r3, #0
1510 0268 CDE90B33 strd r3, r3, [sp, #44]
1511 026c CDE90E33 strd r3, r3, [sp, #56]
488:Core/Src/main.c **** {
1512 .loc 1 488 0
1513 0270 3846 mov r0, r7
482:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
1514 .loc 1 482 0
1515 0272 4FF40013 mov r3, #2097152
476:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
1516 .loc 1 476 0
1517 0276 4FF0010B mov fp, #1
477:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
1518 .loc 1 477 0
1519 027a 4026 movs r6, #64
476:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
ARM GAS /tmp/ccKbyuxk.s page 48
1520 .loc 1 476 0
1521 027c CDF828B0 str fp, [sp, #40]
477:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
1522 .loc 1 477 0
1523 0280 1096 str r6, [sp, #64]
482:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
1524 .loc 1 482 0
1525 0282 0D93 str r3, [sp, #52]
488:Core/Src/main.c **** {
1526 .loc 1 488 0
1527 0284 FFF7FEFF bl HAL_CORDIC_Init
1528 .LVL79:
1529 0288 0546 mov r5, r0
1530 028a 08B1 cbz r0, .L87
1531 .LBB251:
1532 .LBB252:
1533 .LBB253:
1534 .loc 2 209 0
1535 .syntax unified
1536 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1537 028c 72B6 cpsid i
1538 @ 0 "" 2
1539 .thumb
1540 .syntax unified
1541 .L88:
1542 028e FEE7 b .L88
1543 .L87:
1544 .LBE253:
1545 .LBE252:
1546 .LBE251:
1547 .LBE250:
1548 .LBE249:
1549 .LBB255:
1550 .LBB256:
723:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
1551 .loc 1 723 0
1552 0290 184C ldr r4, .L154+44
1553 .LBE256:
1554 .LBE255:
1555 .LBB270:
1556 .LBB254:
493:Core/Src/main.c **** /* USER CODE END CORDIC_Init 2 */
1557 .loc 1 493 0
1558 0292 0AA9 add r1, sp, #40
1559 0294 3846 mov r0, r7
1560 0296 FFF7FEFF bl HAL_CORDIC_Configure
1561 .LVL80:
1562 .LBE254:
1563 .LBE270:
1564 .LBB271:
1565 .LBB269:
723:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
1566 .loc 1 723 0
1567 029a 1749 ldr r1, .L154+48
1568 029c 2160 str r1, [r4]
724:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
1569 .loc 1 724 0
ARM GAS /tmp/ccKbyuxk.s page 49
1570 029e 4FF4E132 mov r2, #115200
728:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
1571 .loc 1 728 0
1572 02a2 0C23 movs r3, #12
734:Core/Src/main.c **** {
1573 .loc 1 734 0
1574 02a4 2046 mov r0, r4
725:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
1575 .loc 1 725 0
1576 02a6 A560 str r5, [r4, #8]
727:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
1577 .loc 1 727 0
1578 02a8 C4E90355 strd r5, r5, [r4, #12]
730:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
1579 .loc 1 730 0
1580 02ac C4E90655 strd r5, r5, [r4, #24]
732:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
1581 .loc 1 732 0
1582 02b0 C4E90855 strd r5, r5, [r4, #32]
733:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
1583 .loc 1 733 0
1584 02b4 A562 str r5, [r4, #40]
724:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
1585 .loc 1 724 0
1586 02b6 6260 str r2, [r4, #4]
728:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
1587 .loc 1 728 0
1588 02b8 6361 str r3, [r4, #20]
734:Core/Src/main.c **** {
1589 .loc 1 734 0
1590 02ba FFF7FEFF bl HAL_UART_Init
1591 .LVL81:
1592 02be 0146 mov r1, r0
1593 02c0 00B3 cbz r0, .L89
1594 .LBB257:
1595 .LBB258:
1596 .LBB259:
1597 .loc 2 209 0
1598 .syntax unified
1599 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1600 02c2 72B6 cpsid i
1601 @ 0 "" 2
1602 .thumb
1603 .syntax unified
1604 .L90:
1605 02c4 FEE7 b .L90
1606 .L155:
1607 02c6 00BF .align 2
1608 .L154:
1609 02c8 00100240 .word 1073876992
1610 02cc 00040048 .word 1207960576
1611 02d0 00080050 .word 1342179328
1612 02d4 00000000 .word hadc1
1613 02d8 002090B6 .word -1232068608
1614 02dc 00000000 .word htim7
1615 02e0 00140040 .word 1073746944
1616 02e4 00000000 .word htim6
ARM GAS /tmp/ccKbyuxk.s page 50
1617 02e8 00100040 .word 1073745920
1618 02ec 00000000 .word hcordic
1619 02f0 000C0240 .word 1073875968
1620 02f4 00000000 .word huart1
1621 02f8 00380140 .word 1073821696
1622 02fc 00000000 .word state_changed
1623 0300 00000000 .word hdac1
1624 .L89:
1625 .LBE259:
1626 .LBE258:
1627 .LBE257:
738:Core/Src/main.c **** {
1628 .loc 1 738 0
1629 0304 2046 mov r0, r4
1630 0306 FFF7FEFF bl HAL_UARTEx_SetTxFifoThreshold
1631 .LVL82:
1632 030a 0146 mov r1, r0
1633 030c 08B1 cbz r0, .L91
1634 .LBB260:
1635 .LBB261:
1636 .LBB262:
1637 .loc 2 209 0
1638 .syntax unified
1639 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1640 030e 72B6 cpsid i
1641 @ 0 "" 2
1642 .thumb
1643 .syntax unified
1644 .L92:
1645 0310 FEE7 b .L92
1646 .L91:
1647 .LBE262:
1648 .LBE261:
1649 .LBE260:
742:Core/Src/main.c **** {
1650 .loc 1 742 0
1651 0312 2046 mov r0, r4
1652 0314 FFF7FEFF bl HAL_UARTEx_SetRxFifoThreshold
1653 .LVL83:
1654 0318 08B1 cbz r0, .L93
1655 .LBB263:
1656 .LBB264:
1657 .LBB265:
1658 .loc 2 209 0
1659 .syntax unified
1660 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1661 031a 72B6 cpsid i
1662 @ 0 "" 2
1663 .thumb
1664 .syntax unified
1665 .L94:
1666 031c FEE7 b .L94
1667 .L93:
1668 .LBE265:
1669 .LBE264:
1670 .LBE263:
746:Core/Src/main.c **** {
ARM GAS /tmp/ccKbyuxk.s page 51
1671 .loc 1 746 0
1672 031e 2046 mov r0, r4
1673 0320 FFF7FEFF bl HAL_UARTEx_DisableFifoMode
1674 .LVL84:
1675 0324 08B1 cbz r0, .L95
1676 .LBB266:
1677 .LBB267:
1678 .LBB268:
1679 .loc 2 209 0
1680 .syntax unified
1681 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1682 0326 72B6 cpsid i
1683 @ 0 "" 2
1684 .thumb
1685 .syntax unified
1686 .L96:
1687 0328 FEE7 b .L96
1688 .L95:
1689 .LBE268:
1690 .LBE267:
1691 .LBE266:
1692 .LBE269:
1693 .LBE271:
1694 .LBB272:
1695 .LBB273:
679:Core/Src/main.c **** htim8.Init.Prescaler = 0;
1696 .loc 1 679 0
1697 032a 804D ldr r5, .L156
1698 032c 804A ldr r2, .L156+4
674:Core/Src/main.c ****
1699 .loc 1 674 0
1700 032e 0990 str r0, [sp, #36]
673:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
1701 .loc 1 673 0
1702 0330 CDE90A00 strd r0, r0, [sp, #40]
1703 0334 CDE90C00 strd r0, r0, [sp, #48]
674:Core/Src/main.c ****
1704 .loc 1 674 0
1705 0338 CDE90700 strd r0, r0, [sp, #28]
681:Core/Src/main.c **** htim8.Init.Period = 239;
1706 .loc 1 681 0
1707 033c C5E90100 strd r0, r0, [r5, #4]
684:Core/Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1708 .loc 1 684 0
1709 0340 C5E90400 strd r0, r0, [r5, #16]
685:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
1710 .loc 1 685 0
1711 0344 A861 str r0, [r5, #24]
682:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
1712 .loc 1 682 0
1713 0346 EF23 movs r3, #239
686:Core/Src/main.c **** {
1714 .loc 1 686 0
1715 0348 2846 mov r0, r5
679:Core/Src/main.c **** htim8.Init.Prescaler = 0;
1716 .loc 1 679 0
1717 034a 2A60 str r2, [r5]
ARM GAS /tmp/ccKbyuxk.s page 52
682:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
1718 .loc 1 682 0
1719 034c EB60 str r3, [r5, #12]
686:Core/Src/main.c **** {
1720 .loc 1 686 0
1721 034e FFF7FEFF bl HAL_TIM_Base_Init
1722 .LVL85:
1723 0352 08B1 cbz r0, .L97
1724 .LBB274:
1725 .LBB275:
1726 .LBB276:
1727 .loc 2 209 0
1728 .syntax unified
1729 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1730 0354 72B6 cpsid i
1731 @ 0 "" 2
1732 .thumb
1733 .syntax unified
1734 .L98:
1735 0356 FEE7 b .L98
1736 .L97:
1737 .LBE276:
1738 .LBE275:
1739 .LBE274:
690:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
1740 .loc 1 690 0
1741 0358 4FF48053 mov r3, #4096
691:Core/Src/main.c **** {
1742 .loc 1 691 0
1743 035c 0AA9 add r1, sp, #40
1744 035e 2846 mov r0, r5
690:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
1745 .loc 1 690 0
1746 0360 0A93 str r3, [sp, #40]
691:Core/Src/main.c **** {
1747 .loc 1 691 0
1748 0362 FFF7FEFF bl HAL_TIM_ConfigClockSource
1749 .LVL86:
1750 0366 0346 mov r3, r0
1751 0368 08B1 cbz r0, .L99
1752 .LBB277:
1753 .LBB278:
1754 .LBB279:
1755 .loc 2 209 0
1756 .syntax unified
1757 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1758 036a 72B6 cpsid i
1759 @ 0 "" 2
1760 .thumb
1761 .syntax unified
1762 .L100:
1763 036c FEE7 b .L100
1764 .L99:
1765 .LBE279:
1766 .LBE278:
1767 .LBE277:
695:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
ARM GAS /tmp/ccKbyuxk.s page 53
1768 .loc 1 695 0
1769 036e 2022 movs r2, #32
698:Core/Src/main.c **** {
1770 .loc 1 698 0
1771 0370 07A9 add r1, sp, #28
1772 0372 2846 mov r0, r5
697:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
1773 .loc 1 697 0
1774 0374 CDE90833 strd r3, r3, [sp, #32]
695:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
1775 .loc 1 695 0
1776 0378 0792 str r2, [sp, #28]
698:Core/Src/main.c **** {
1777 .loc 1 698 0
1778 037a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
1779 .LVL87:
1780 037e 08B1 cbz r0, .L101
1781 .LBB280:
1782 .LBB281:
1783 .LBB282:
1784 .loc 2 209 0
1785 .syntax unified
1786 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1787 0380 72B6 cpsid i
1788 @ 0 "" 2
1789 .thumb
1790 .syntax unified
1791 .L102:
1792 0382 FEE7 b .L102
1793 .L101:
1794 .LBE282:
1795 .LBE281:
1796 .LBE280:
1797 .LBE273:
1798 .LBE272:
1799 .LBB283:
1800 .LBB284:
566:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
1801 .loc 1 566 0
1802 0384 6B4B ldr r3, .L156+8
1803 0386 6C4A ldr r2, .L156+12
569:Core/Src/main.c **** hopamp1.Init.InternalOutput = ENABLE;
1804 .loc 1 569 0
1805 0388 1861 str r0, [r3, #16]
567:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
1806 .loc 1 567 0
1807 038a 8025 movs r5, #128
571:Core/Src/main.c **** hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS;
1808 .loc 1 571 0
1809 038c 9861 str r0, [r3, #24]
574:Core/Src/main.c **** if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
1810 .loc 1 574 0
1811 038e D862 str r0, [r3, #44]
572:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_8_OR_MINUS_7;
1812 .loc 1 572 0
1813 0390 4FF40031 mov r1, #131072
566:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
ARM GAS /tmp/ccKbyuxk.s page 54
1814 .loc 1 566 0
1815 0394 1A60 str r2, [r3]
575:Core/Src/main.c **** {
1816 .loc 1 575 0
1817 0396 1846 mov r0, r3
573:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
1818 .loc 1 573 0
1819 0398 4FF40042 mov r2, #32768
568:Core/Src/main.c **** hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
1820 .loc 1 568 0
1821 039c 9E60 str r6, [r3, #8]
570:Core/Src/main.c **** hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
1822 .loc 1 570 0
1823 039e 83F814B0 strb fp, [r3, #20]
567:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
1824 .loc 1 567 0
1825 03a2 5D60 str r5, [r3, #4]
573:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
1826 .loc 1 573 0
1827 03a4 C3E90912 strd r1, r2, [r3, #36]
575:Core/Src/main.c **** {
1828 .loc 1 575 0
1829 03a8 FFF7FEFF bl HAL_OPAMP_Init
1830 .LVL88:
1831 03ac 08B1 cbz r0, .L103
1832 .LBB285:
1833 .LBB286:
1834 .LBB287:
1835 .loc 2 209 0
1836 .syntax unified
1837 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1838 03ae 72B6 cpsid i
1839 @ 0 "" 2
1840 .thumb
1841 .syntax unified
1842 .L104:
1843 03b0 FEE7 b .L104
1844 .L103:
1845 .LBE287:
1846 .LBE286:
1847 .LBE285:
1848 .LBE284:
1849 .LBE283:
279:Core/Src/main.c **** audio_filter_init();
1850 .loc 1 279 0
1851 03b2 FFF7FEFF bl st2_filter_init
1852 .LVL89:
280:Core/Src/main.c **** // diag();
1853 .loc 1 280 0
1854 03b6 FFF7FEFF bl audio_filter_init
1855 .LVL90:
283:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
1856 .loc 1 283 0
1857 03ba 6048 ldr r0, .L156+16
1858 03bc DFF8DC91 ldr r9, .L156+112
1859 03c0 DFF8DC81 ldr r8, .L156+116
1860 03c4 5E4F ldr r7, .L156+20
ARM GAS /tmp/ccKbyuxk.s page 55
1861 03c6 5F4E ldr r6, .L156+24
1862 03c8 5F4D ldr r5, .L156+28
1863 03ca FFF7FEFF bl HAL_TIM_Base_Start_IT
1864 .LVL91:
284:Core/Src/main.c **** // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
1865 .loc 1 284 0
1866 03ce 5A46 mov r2, fp
1867 03d0 2046 mov r0, r4
1868 03d2 5E49 ldr r1, .L156+32
307:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
1869 .loc 1 307 0
1870 03d4 5E4C ldr r4, .L156+36
305:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
1871 .loc 1 305 0
1872 03d6 DFF8CCB1 ldr fp, .L156+120
284:Core/Src/main.c **** // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
1873 .loc 1 284 0
1874 03da FFF7FEFF bl HAL_UART_Receive_IT
1875 .LVL92:
287:Core/Src/main.c **** /* USER CODE END 2 */
1876 .loc 1 287 0
1877 03de FFF7FEFF bl start_receive
1878 .LVL93:
1879 .L118:
296:Core/Src/main.c **** if(rx_adc_buffer_ready){
1880 .loc 1 296 0
1881 03e2 99F80030 ldrb r3, [r9] @ zero_extendqisi2
1882 03e6 002B cmp r3, #0
1883 03e8 34D0 beq .L106
297:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
1884 .loc 1 297 0
1885 03ea 98F80030 ldrb r3, [r8] @ zero_extendqisi2
1886 03ee ABB1 cbz r3, .L107
298:Core/Src/main.c **** rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
1887 .loc 1 298 0
1888 03f0 0122 movs r2, #1
1889 03f2 2021 movs r1, #32
1890 03f4 5748 ldr r0, .L156+40
1891 03f6 FFF7FEFF bl HAL_GPIO_WritePin
1892 .LVL94:
299:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
1893 .loc 1 299 0
1894 03fa 3B68 ldr r3, [r7]
1895 03fc 0093 str r3, [sp]
1896 03fe 564A ldr r2, .L156+44
1897 0400 564B ldr r3, .L156+48
1898 0402 5748 ldr r0, .L156+52
1899 0404 4FF48061 mov r1, #1024
1900 0408 FFF7FEFF bl rx_mixer
1901 .LVL95:
300:Core/Src/main.c **** rx_adc_buffer_ready = 0;
1902 .loc 1 300 0
1903 040c 0022 movs r2, #0
1904 040e 2021 movs r1, #32
1905 0410 5048 ldr r0, .L156+40
1906 0412 FFF7FEFF bl HAL_GPIO_WritePin
1907 .LVL96:
ARM GAS /tmp/ccKbyuxk.s page 56
301:Core/Src/main.c **** }
1908 .loc 1 301 0
1909 0416 0023 movs r3, #0
1910 0418 88F80030 strb r3, [r8]
1911 .L107:
303:Core/Src/main.c **** if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
1912 .loc 1 303 0
1913 041c 3378 ldrb r3, [r6] @ zero_extendqisi2
1914 041e CBB1 cbz r3, .L106
304:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
1915 .loc 1 304 0
1916 0420 2B68 ldr r3, [r5]
1917 0422 002B cmp r3, #0
1918 0424 72D0 beq .L149
305:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
1919 .loc 1 305 0
1920 0426 5A1E subs r2, r3, #1
1921 0428 012A cmp r2, #1
1922 042a 75D9 bls .L150
306:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
1923 .loc 1 306 0
1924 042c 032B cmp r3, #3
1925 042e 05D1 bne .L110
306:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
1926 .loc 1 306 0 is_stmt 0 discriminator 1
1927 0430 2346 mov r3, r4
1928 0432 4022 movs r2, #64
1929 0434 4949 ldr r1, .L156+48
1930 0436 4848 ldr r0, .L156+44
1931 0438 FFF7FEFF bl am_demodulator
1932 .LVL97:
1933 .L110:
307:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
1934 .loc 1 307 0 is_stmt 1
1935 043c 494B ldr r3, .L156+56
1936 043e 4A49 ldr r1, .L156+60
1937 0440 1A78 ldrb r2, [r3] @ zero_extendqisi2
1938 0442 4A48 ldr r0, .L156+64
1939 0444 4023 movs r3, #64
1940 0446 01EB0222 add r2, r1, r2, lsl #8
1941 044a 2146 mov r1, r4
1942 044c FFF7FEFF bl arm_fir_q31
1943 .LVL98:
308:Core/Src/main.c **** }
1944 .loc 1 308 0
1945 0450 0023 movs r3, #0
1946 0452 3370 strb r3, [r6]
1947 .L106:
311:Core/Src/main.c **** if(half_tx_dac_buffer_empty){
1948 .loc 1 311 0
1949 0454 464B ldr r3, .L156+68
1950 0456 1B78 ldrb r3, [r3] @ zero_extendqisi2
1951 0458 13B3 cbz r3, .L113
312:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
1952 .loc 1 312 0
1953 045a 464B ldr r3, .L156+72
1954 045c 1B78 ldrb r3, [r3] @ zero_extendqisi2
ARM GAS /tmp/ccKbyuxk.s page 57
1955 045e 7BB1 cbz r3, .L114
1956 .LBB288:
314:Core/Src/main.c **** half_tx_dac_buffer_empty = 0;
1957 .loc 1 314 0
1958 0460 454B ldr r3, .L156+76
1959 0462 3D4A ldr r2, .L156+44
1960 0464 1878 ldrb r0, [r3] @ zero_extendqisi2
1961 0466 3B68 ldr r3, [r7]
1962 0468 0093 str r3, [sp]
1963 046a 444B ldr r3, .L156+80
1964 046c 4FF48061 mov r1, #1024
1965 0470 03EB0030 add r0, r3, r0, lsl #12
1966 0474 394B ldr r3, .L156+48
1967 0476 FFF7FEFF bl tx_mixer
1968 .LVL99:
315:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
1969 .loc 1 315 0
1970 047a 3E4A ldr r2, .L156+72
1971 047c 0023 movs r3, #0
1972 047e 1370 strb r3, [r2]
1973 .L114:
1974 .LBE288:
318:Core/Src/main.c **** if (modulation == MOD_DC) dc_modulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
1975 .loc 1 318 0
1976 0480 3F4B ldr r3, .L156+84
1977 0482 1B78 ldrb r3, [r3] @ zero_extendqisi2
1978 0484 63B1 cbz r3, .L113
319:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
1979 .loc 1 319 0
1980 0486 2B68 ldr r3, [r5]
1981 0488 3BB3 cbz r3, .L151
320:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
1982 .loc 1 320 0
1983 048a 5A1E subs r2, r3, #1
1984 048c 012A cmp r2, #1
1985 048e 1BD9 bls .L152
321:Core/Src/main.c **** }
1986 .loc 1 321 0
1987 0490 032B cmp r3, #3
1988 0492 05D1 bne .L113
321:Core/Src/main.c **** }
1989 .loc 1 321 0 is_stmt 0 discriminator 1
1990 0494 2346 mov r3, r4
1991 0496 4022 movs r2, #64
1992 0498 3049 ldr r1, .L156+48
1993 049a 2F48 ldr r0, .L156+44
1994 049c FFF7FEFF bl am_modulator
1995 .LVL100:
1996 .L113:
324:Core/Src/main.c **** if(receive){
1997 .loc 1 324 0 is_stmt 1
1998 04a0 384B ldr r3, .L156+88
1999 04a2 1B78 ldrb r3, [r3] @ zero_extendqisi2
2000 04a4 002B cmp r3, #0
2001 04a6 9CD0 beq .L118
325:Core/Src/main.c **** // TODO
2002 .loc 1 325 0
ARM GAS /tmp/ccKbyuxk.s page 58
2003 04a8 99F80030 ldrb r3, [r9] @ zero_extendqisi2
2004 04ac 1BB1 cbz r3, .L120
327:Core/Src/main.c **** }
2005 .loc 1 327 0
2006 04ae 4021 movs r1, #64
2007 04b0 2948 ldr r0, .L156+44
2008 04b2 FFF7FEFF bl rx_measure_signal
2009 .LVL101:
2010 .L120:
330:Core/Src/main.c **** if(state_changed) display_update_state();
2011 .loc 1 330 0 discriminator 1
2012 04b6 344B ldr r3, .L156+92
2013 04b8 1A78 ldrb r2, [r3] @ zero_extendqisi2
2014 04ba 344B ldr r3, .L156+96
2015 04bc 1B78 ldrb r3, [r3] @ zero_extendqisi2
2016 04be 9A42 cmp r2, r3
2017 04c0 11D0 beq .L153
2018 .LBB289:
330:Core/Src/main.c **** if(state_changed) display_update_state();
2019 .loc 1 330 0 is_stmt 0 discriminator 2
2020 04c2 FFF7FEFF bl dequeue_cmd
2021 .LVL102:
2022 04c6 F6E7 b .L120
2023 .L152:
2024 .LBE289:
320:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
2025 .loc 1 320 0 is_stmt 1 discriminator 1
2026 04c8 CDF800B0 str fp, [sp]
2027 04cc 2346 mov r3, r4
2028 04ce 4022 movs r2, #64
2029 04d0 2249 ldr r1, .L156+48
2030 04d2 2148 ldr r0, .L156+44
2031 04d4 FFF7FEFF bl ssb_modulator
2032 .LVL103:
2033 04d8 E2E7 b .L113
2034 .L151:
319:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
2035 .loc 1 319 0 discriminator 1
2036 04da 2246 mov r2, r4
2037 04dc 4021 movs r1, #64
2038 04de 1E48 ldr r0, .L156+44
2039 04e0 FFF7FEFF bl dc_modulator
2040 .LVL104:
2041 04e4 DCE7 b .L113
2042 .L153:
331:Core/Src/main.c **** if(uart_tx_buf_in_idx){
2043 .loc 1 331 0
2044 04e6 BAF80030 ldrh r3, [r10]
2045 04ea 0BB1 cbz r3, .L122
331:Core/Src/main.c **** if(uart_tx_buf_in_idx){
2046 .loc 1 331 0 is_stmt 0 discriminator 1
2047 04ec FFF7FEFF bl display_update_state
2048 .LVL105:
2049 .L122:
332:Core/Src/main.c **** display_write(uart_tx_buf, uart_tx_buf_in_idx);
2050 .loc 1 332 0 is_stmt 1
2051 04f0 274B ldr r3, .L156+100
ARM GAS /tmp/ccKbyuxk.s page 59
2052 04f2 1A88 ldrh r2, [r3]
2053 04f4 32B1 cbz r2, .L123
2054 .LVL106:
2055 .LBB290:
2056 .LBB291:
184:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
2057 .loc 1 184 0
2058 04f6 2749 ldr r1, .L156+104
2059 04f8 2748 ldr r0, .L156+108
2060 04fa FFF7FEFF bl HAL_UART_Transmit_DMA
2061 .LVL107:
2062 .LBE291:
2063 .LBE290:
334:Core/Src/main.c **** }
2064 .loc 1 334 0
2065 04fe 244A ldr r2, .L156+100
2066 0500 0023 movs r3, #0
2067 0502 1380 strh r3, [r2] @ movhi
2068 .L123:
337:Core/Src/main.c **** }
2069 .loc 1 337 0
2070 0504 1F4A ldr r2, .L156+88
2071 0506 0023 movs r3, #0
2072 0508 1370 strb r3, [r2]
2073 050a 6AE7 b .L118
2074 .L149:
304:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
2075 .loc 1 304 0 discriminator 1
2076 050c 2246 mov r2, r4
2077 050e 4021 movs r1, #64
2078 0510 1148 ldr r0, .L156+44
2079 0512 FFF7FEFF bl dc_demodulator
2080 .LVL108:
2081 0516 91E7 b .L110
2082 .L150:
305:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
2083 .loc 1 305 0 discriminator 1
2084 0518 CDF800B0 str fp, [sp]
2085 051c 2346 mov r3, r4
2086 051e 4022 movs r2, #64
2087 0520 0E49 ldr r1, .L156+48
2088 0522 0D48 ldr r0, .L156+44
2089 0524 FFF7FEFF bl ssb_demodulator
2090 .LVL109:
2091 0528 88E7 b .L110
2092 .L157:
2093 052a 00BF .align 2
2094 .L156:
2095 052c 00000000 .word htim8
2096 0530 00340140 .word 1073820672
2097 0534 00000000 .word hopamp1
2098 0538 00030140 .word 1073808128
2099 053c 00000000 .word htim7
2100 0540 00000000 .word nco1_increment
2101 0544 00000000 .word half_rx_dac_buffer_empty
2102 0548 00000000 .word modulation
2103 054c 00000000 .word uart_rx_buf
ARM GAS /tmp/ccKbyuxk.s page 60
2104 0550 00000000 .word prefilter_lf_buffer
2105 0554 00040048 .word 1207960576
2106 0558 00000000 .word if_I
2107 055c 00000000 .word if_Q
2108 0560 00000000 .word adc_buffer
2109 0564 00000000 .word lf_buffer_toggle
2110 0568 00000000 .word lf_buffer
2111 056c 00000000 .word audio_filter_struct
2112 0570 00000000 .word transmit
2113 0574 00000000 .word half_tx_dac_buffer_empty
2114 0578 00000000 .word tx_dac_buffer_toggle
2115 057c 00000000 .word tx_dac_buffer
2116 0580 00000000 .word tx_adc_buffer_ready
2117 0584 00000000 .word tick
2118 0588 00000000 .word rx_cmd_rb_in_idx
2119 058c 00000000 .word rx_cmd_rb_out_idx
2120 0590 00000000 .word uart_tx_buf_in_idx
2121 0594 00000000 .word uart_tx_buf
2122 0598 00000000 .word huart1
2123 059c 00000000 .word receive
2124 05a0 00000000 .word rx_adc_buffer_ready
2125 05a4 47E17A14 .word 343597383
2126 .cfi_endproc
2127 .LFE390:
2129 .section .text.Error_Handler,"ax",%progbits
2130 .align 1
2131 .p2align 2,,3
2132 .global Error_Handler
2133 .syntax unified
2134 .thumb
2135 .thumb_func
2136 .fpu fpv4-sp-d16
2138 Error_Handler:
2139 .LFB402:
805:Core/Src/main.c ****
806:Core/Src/main.c **** }
807:Core/Src/main.c ****
808:Core/Src/main.c **** /* USER CODE BEGIN 4 */
809:Core/Src/main.c ****
810:Core/Src/main.c **** /* USER CODE END 4 */
811:Core/Src/main.c ****
812:Core/Src/main.c **** /**
813:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
814:Core/Src/main.c **** * @retval None
815:Core/Src/main.c **** */
816:Core/Src/main.c **** void Error_Handler(void)
817:Core/Src/main.c **** {
2140 .loc 1 817 0
2141 .cfi_startproc
2142 @ Volatile: function does not return.
2143 @ args = 0, pretend = 0, frame = 0
2144 @ frame_needed = 0, uses_anonymous_args = 0
2145 @ link register save eliminated.
2146 .LBB292:
2147 .LBB293:
2148 .loc 2 209 0
2149 .syntax unified
ARM GAS /tmp/ccKbyuxk.s page 61
2150 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2151 0000 72B6 cpsid i
2152 @ 0 "" 2
2153 .thumb
2154 .syntax unified
2155 .L159:
2156 0002 FEE7 b .L159
2157 .LBE293:
2158 .LBE292:
2159 .cfi_endproc
2160 .LFE402:
2162 .comm half_rx_dac_buffer_empty,1,1
2163 .comm rx_adc_buffer_ready,1,1
2164 .comm tick,1,1
2165 .comm hdma_usart1_tx,96,4
2166 .comm huart1,144,4
2167 .comm htim8,76,4
2168 .comm htim7,76,4
2169 .comm htim6,76,4
2170 .comm hopamp1,60,4
2171 .comm hdma_dac1_ch2,96,4
2172 .comm hdma_dac1_ch1,96,4
2173 .comm hdac1,20,4
2174 .comm hcordic,40,4
2175 .comm hdma_adc1,96,4
2176 .comm hadc1,108,4
2177 .text
2178 .Letext0:
2179 .file 3 "/usr/include/newlib/machine/_default_types.h"
2180 .file 4 "/usr/include/newlib/sys/_stdint.h"
2181 .file 5 "Drivers/CMSIS/Include/core_cm4.h"
2182 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
2183 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
2184 .file 8 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
2185 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
2186 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h"
2187 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h"
2188 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
2189 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
2190 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
2191 .file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h"
2192 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h"
2193 .file 17 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h"
2194 .file 18 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
2195 .file 19 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h"
2196 .file 20 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
2197 .file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
2198 .file 22 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
2199 .file 23 "/usr/include/newlib/sys/lock.h"
2200 .file 24 "/usr/include/newlib/sys/_types.h"
2201 .file 25 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
2202 .file 26 "/usr/include/newlib/sys/reent.h"
2203 .file 27 "/usr/include/newlib/math.h"
2204 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
2205 .file 29 "Core/Inc/rx.h"
2206 .file 30 "Core/Inc/tx.h"
2207 .file 31 "Core/Inc/bassofono.h"
ARM GAS /tmp/ccKbyuxk.s page 62
2208 .file 32 "Core/Inc/interface.h"
2209 .file 33 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
2210 .file 34 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
2211 .file 35 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h"
2212 .file 36 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h"
2213 .file 37 "<built-in>"
ARM GAS /tmp/ccKbyuxk.s page 63
DEFINED SYMBOLS
*ABS*:0000000000000000 main.c
/tmp/ccKbyuxk.s:16 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t
/tmp/ccKbyuxk.s:24 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback
/tmp/ccKbyuxk.s:47 .text.HAL_ADC_ConvCpltCallback:0000000000000010 $d
*COM*:0000000000000001 rx_adc_buffer_ready
/tmp/ccKbyuxk.s:52 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 $t
/tmp/ccKbyuxk.s:60 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 HAL_DAC_ConvHalfCpltCallbackCh1
/tmp/ccKbyuxk.s:86 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000010 $d
*COM*:0000000000000001 half_rx_dac_buffer_empty
/tmp/ccKbyuxk.s:92 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 $t
/tmp/ccKbyuxk.s:100 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 HAL_DAC_ConvCpltCallbackCh1
/tmp/ccKbyuxk.s:122 .text.HAL_DAC_ConvCpltCallbackCh1:000000000000000c $d
/tmp/ccKbyuxk.s:128 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 $t
/tmp/ccKbyuxk.s:136 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvHalfCpltCallbackCh2
/tmp/ccKbyuxk.s:171 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000018 $d
/tmp/ccKbyuxk.s:178 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 $t
/tmp/ccKbyuxk.s:186 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvCpltCallbackCh2
/tmp/ccKbyuxk.s:218 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000018 $d
/tmp/ccKbyuxk.s:225 .text.HAL_TIM_PeriodElapsedCallback:0000000000000000 $t
/tmp/ccKbyuxk.s:233 .text.HAL_TIM_PeriodElapsedCallback:0000000000000000 HAL_TIM_PeriodElapsedCallback
/tmp/ccKbyuxk.s:256 .text.HAL_TIM_PeriodElapsedCallback:0000000000000010 $d
*COM*:0000000000000001 tick
/tmp/ccKbyuxk.s:262 .text.HAL_UART_RxCpltCallback:0000000000000000 $t
/tmp/ccKbyuxk.s:270 .text.HAL_UART_RxCpltCallback:0000000000000000 HAL_UART_RxCpltCallback
/tmp/ccKbyuxk.s:320 .text.HAL_UART_RxCpltCallback:0000000000000024 $d
*COM*:0000000000000090 huart1
/tmp/ccKbyuxk.s:327 .text.__io_putchar:0000000000000000 $t
/tmp/ccKbyuxk.s:335 .text.__io_putchar:0000000000000000 __io_putchar
/tmp/ccKbyuxk.s:374 .text.__io_putchar:000000000000001c $d
/tmp/ccKbyuxk.s:379 .text._write:0000000000000000 $t
/tmp/ccKbyuxk.s:387 .text._write:0000000000000000 _write
/tmp/ccKbyuxk.s:416 .text._write:0000000000000010 $d
/tmp/ccKbyuxk.s:421 .text.display_write:0000000000000000 $t
/tmp/ccKbyuxk.s:429 .text.display_write:0000000000000000 display_write
/tmp/ccKbyuxk.s:459 .text.display_write:0000000000000014 $d
/tmp/ccKbyuxk.s:464 .text.start_transmit:0000000000000000 $t
/tmp/ccKbyuxk.s:472 .text.start_transmit:0000000000000000 start_transmit
/tmp/ccKbyuxk.s:522 .text.start_transmit:0000000000000030 $d
*COM*:0000000000000014 hdac1
*COM*:000000000000004c htim8
/tmp/ccKbyuxk.s:530 .text.stop_transmit:0000000000000000 $t
/tmp/ccKbyuxk.s:538 .text.stop_transmit:0000000000000000 stop_transmit
/tmp/ccKbyuxk.s:581 .text.stop_transmit:0000000000000024 $d
/tmp/ccKbyuxk.s:588 .text.start_receive:0000000000000000 $t
/tmp/ccKbyuxk.s:596 .text.start_receive:0000000000000000 start_receive
/tmp/ccKbyuxk.s:654 .text.start_receive:0000000000000038 $d
*COM*:000000000000006c hadc1
*COM*:000000000000004c htim6
/tmp/ccKbyuxk.s:664 .text.stop_receive:0000000000000000 $t
/tmp/ccKbyuxk.s:672 .text.stop_receive:0000000000000000 stop_receive
/tmp/ccKbyuxk.s:723 .text.stop_receive:000000000000002c $d
/tmp/ccKbyuxk.s:731 .text.SystemClock_Config:0000000000000000 $t
/tmp/ccKbyuxk.s:739 .text.SystemClock_Config:0000000000000000 SystemClock_Config
/tmp/ccKbyuxk.s:899 .text.startup.main:0000000000000000 $t
/tmp/ccKbyuxk.s:907 .text.startup.main:0000000000000000 main
/tmp/ccKbyuxk.s:1609 .text.startup.main:00000000000002c8 $d
ARM GAS /tmp/ccKbyuxk.s page 64
*COM*:000000000000004c htim7
*COM*:0000000000000028 hcordic
/tmp/ccKbyuxk.s:1629 .text.startup.main:0000000000000304 $t
/tmp/ccKbyuxk.s:2095 .text.startup.main:000000000000052c $d
*COM*:000000000000003c hopamp1
/tmp/ccKbyuxk.s:2130 .text.Error_Handler:0000000000000000 $t
/tmp/ccKbyuxk.s:2138 .text.Error_Handler:0000000000000000 Error_Handler
*COM*:0000000000000060 hdma_usart1_tx
*COM*:0000000000000060 hdma_dac1_ch2
*COM*:0000000000000060 hdma_dac1_ch1
*COM*:0000000000000060 hdma_adc1
UNDEFINED SYMBOLS
lf_buffer_toggle
HAL_GPIO_TogglePin
tx_dac_buffer_toggle
half_tx_dac_buffer_empty
enqueue_cmd
HAL_UART_Receive_IT
uart_rx_buf
HAL_UART_Transmit
HAL_UART_Transmit_DMA
HAL_TIM_Base_Start
HAL_DAC_Start
HAL_DAC_Start_DMA
transmit
tx_dac_buffer
HAL_TIM_Base_Stop
HAL_DAC_Stop
HAL_DAC_Stop_DMA
HAL_ADC_Start_DMA
receive
adc_buffer
lf_buffer
HAL_ADC_Stop_DMA
memset
HAL_PWREx_ControlVoltageScaling
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCCEx_PeriphCLKConfig
display_init
state_set_default
interface_set_default
display_update_mode
display_update_state
HAL_Init
HAL_GPIO_WritePin
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_DAC_Init
HAL_DAC_ConfigChannel
HAL_ADC_Init
HAL_ADCEx_MultiModeConfigChannel
HAL_ADC_ConfigChannel
HAL_TIM_Base_Init
HAL_TIMEx_MasterConfigSynchronization
ARM GAS /tmp/ccKbyuxk.s page 65
HAL_CORDIC_Init
HAL_CORDIC_Configure
HAL_UART_Init
state_changed
HAL_UARTEx_SetTxFifoThreshold
HAL_UARTEx_SetRxFifoThreshold
HAL_UARTEx_DisableFifoMode
HAL_TIM_ConfigClockSource
HAL_OPAMP_Init
st2_filter_init
audio_filter_init
HAL_TIM_Base_Start_IT
rx_mixer
am_demodulator
arm_fir_q31
tx_mixer
am_modulator
rx_measure_signal
dequeue_cmd
ssb_modulator
dc_modulator
dc_demodulator
ssb_demodulator
nco1_increment
modulation
prefilter_lf_buffer
if_I
if_Q
audio_filter_struct
tx_adc_buffer_ready
rx_cmd_rb_in_idx
rx_cmd_rb_out_idx
uart_tx_buf_in_idx
uart_tx_buf
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