4206 lines
174 KiB
Plaintext
4206 lines
174 KiB
Plaintext
ARM GAS /tmp/ccmbTcom.s page 1
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1 .cpu cortex-m4
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2 .eabi_attribute 27, 1
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3 .eabi_attribute 28, 1
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4 .eabi_attribute 23, 1
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5 .eabi_attribute 24, 1
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6 .eabi_attribute 25, 1
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7 .eabi_attribute 26, 1
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8 .eabi_attribute 30, 2
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9 .eabi_attribute 34, 1
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10 .eabi_attribute 18, 4
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11 .file "main.c"
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12 .text
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13 .Ltext0:
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14 .cfi_sections .debug_frame
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15 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
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16 .align 1
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17 .p2align 2,,3
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18 .global HAL_ADC_ConvCpltCallback
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19 .syntax unified
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20 .thumb
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21 .thumb_func
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22 .fpu fpv4-sp-d16
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24 HAL_ADC_ConvCpltCallback:
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25 .LFB376:
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26 .file 1 "Core/Src/main.c"
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1:Core/Src/main.c **** /* USER CODE BEGIN Header */
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2:Core/Src/main.c **** /**
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3:Core/Src/main.c **** ******************************************************************************
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4:Core/Src/main.c **** * @file : main.c
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5:Core/Src/main.c **** * @brief : Main program body
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6:Core/Src/main.c **** ******************************************************************************
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7:Core/Src/main.c **** * @attention
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8:Core/Src/main.c **** *
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9:Core/Src/main.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics.
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10:Core/Src/main.c **** * All rights reserved.</center></h2>
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11:Core/Src/main.c **** *
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12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
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13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the
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14:Core/Src/main.c **** * License. You may obtain a copy of the License at:
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15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause
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16:Core/Src/main.c **** *
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17:Core/Src/main.c **** ******************************************************************************
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18:Core/Src/main.c **** */
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19:Core/Src/main.c **** /* USER CODE END Header */
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20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
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21:Core/Src/main.c **** #include "main.h"
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22:Core/Src/main.c ****
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23:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
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24:Core/Src/main.c **** /* USER CODE BEGIN Includes */
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25:Core/Src/main.c **** #include <stdio.h>
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26:Core/Src/main.c **** #include "bassofono.h"
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27:Core/Src/main.c **** #include "interface.h"
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28:Core/Src/main.c ****
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29:Core/Src/main.c **** /* USER CODE END Includes */
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30:Core/Src/main.c ****
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31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
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32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
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ARM GAS /tmp/ccmbTcom.s page 2
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33:Core/Src/main.c ****
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34:Core/Src/main.c **** /* USER CODE END PTD */
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35:Core/Src/main.c ****
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36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
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37:Core/Src/main.c **** /* USER CODE BEGIN PD */
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38:Core/Src/main.c **** /* USER CODE END PD */
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39:Core/Src/main.c ****
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40:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
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41:Core/Src/main.c **** /* USER CODE BEGIN PM */
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42:Core/Src/main.c ****
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43:Core/Src/main.c **** /* USER CODE END PM */
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44:Core/Src/main.c ****
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45:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
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46:Core/Src/main.c **** ADC_HandleTypeDef hadc1;
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47:Core/Src/main.c **** DMA_HandleTypeDef hdma_adc1;
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48:Core/Src/main.c ****
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49:Core/Src/main.c **** CORDIC_HandleTypeDef hcordic;
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50:Core/Src/main.c ****
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51:Core/Src/main.c **** DAC_HandleTypeDef hdac1;
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52:Core/Src/main.c **** DMA_HandleTypeDef hdma_dac1_ch1;
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53:Core/Src/main.c **** DMA_HandleTypeDef hdma_dac1_ch2;
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54:Core/Src/main.c ****
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55:Core/Src/main.c **** OPAMP_HandleTypeDef hopamp1;
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56:Core/Src/main.c ****
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57:Core/Src/main.c **** TIM_HandleTypeDef htim6;
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58:Core/Src/main.c **** TIM_HandleTypeDef htim7;
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59:Core/Src/main.c **** TIM_HandleTypeDef htim8;
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60:Core/Src/main.c ****
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61:Core/Src/main.c **** UART_HandleTypeDef huart1;
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62:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_tx;
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63:Core/Src/main.c ****
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64:Core/Src/main.c **** /* USER CODE BEGIN PV */
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65:Core/Src/main.c ****
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66:Core/Src/main.c **** volatile uint8_t tick;
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67:Core/Src/main.c ****
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68:Core/Src/main.c **** // RX
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69:Core/Src/main.c **** volatile uint8_t rx_adc_buffer_ready, half_rx_dac_buffer_empty;
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70:Core/Src/main.c ****
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71:Core/Src/main.c **** // TX
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72:Core/Src/main.c **** // volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
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73:Core/Src/main.c ****
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74:Core/Src/main.c **** /* USER CODE END PV */
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75:Core/Src/main.c ****
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76:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
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77:Core/Src/main.c **** void SystemClock_Config(void);
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78:Core/Src/main.c **** static void MX_GPIO_Init(void);
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79:Core/Src/main.c **** static void MX_DMA_Init(void);
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80:Core/Src/main.c **** static void MX_DAC1_Init(void);
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81:Core/Src/main.c **** static void MX_ADC1_Init(void);
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82:Core/Src/main.c **** static void MX_TIM7_Init(void);
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83:Core/Src/main.c **** static void MX_TIM6_Init(void);
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84:Core/Src/main.c **** static void MX_CORDIC_Init(void);
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85:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
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86:Core/Src/main.c **** static void MX_TIM8_Init(void);
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87:Core/Src/main.c **** static void MX_OPAMP1_Init(void);
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88:Core/Src/main.c **** /* USER CODE BEGIN PFP */
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89:Core/Src/main.c ****
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ARM GAS /tmp/ccmbTcom.s page 3
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90:Core/Src/main.c **** /* USER CODE END PFP */
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91:Core/Src/main.c ****
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92:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
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93:Core/Src/main.c **** /* USER CODE BEGIN 0 */
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94:Core/Src/main.c ****
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95:Core/Src/main.c **** // IRQ
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96:Core/Src/main.c ****
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97:Core/Src/main.c **** // ADC
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98:Core/Src/main.c ****
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99:Core/Src/main.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){
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27 .loc 1 99 0
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28 .cfi_startproc
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29 @ args = 0, pretend = 0, frame = 0
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30 @ frame_needed = 0, uses_anonymous_args = 0
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31 @ link register save eliminated.
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32 .LVL0:
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100:Core/Src/main.c **** if(hadc->Instance == ADC1){
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33 .loc 1 100 0
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34 0000 0368 ldr r3, [r0]
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35 0002 B3F1A04F cmp r3, #1342177280
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36 0006 02D1 bne .L1
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101:Core/Src/main.c **** rx_adc_buffer_ready = 1;
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37 .loc 1 101 0
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38 0008 014B ldr r3, .L4
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39 000a 0122 movs r2, #1
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40 000c 1A70 strb r2, [r3]
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41 .L1:
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102:Core/Src/main.c **** }
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103:Core/Src/main.c **** }
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42 .loc 1 103 0
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43 000e 7047 bx lr
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44 .L5:
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45 .align 2
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46 .L4:
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47 0010 00000000 .word rx_adc_buffer_ready
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48 .cfi_endproc
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49 .LFE376:
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51 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits
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52 .align 1
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53 .p2align 2,,3
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54 .global HAL_ADC_LevelOutOfWindowCallback
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55 .syntax unified
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56 .thumb
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57 .thumb_func
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58 .fpu fpv4-sp-d16
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60 HAL_ADC_LevelOutOfWindowCallback:
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61 .LFB377:
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104:Core/Src/main.c ****
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105:Core/Src/main.c **** void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc){
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62 .loc 1 105 0
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63 .cfi_startproc
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64 @ args = 0, pretend = 0, frame = 0
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65 @ frame_needed = 0, uses_anonymous_args = 0
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66 @ link register save eliminated.
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67 .LVL1:
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106:Core/Src/main.c **** if(hadc->Instance == ADC1){
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68 .loc 1 106 0
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ARM GAS /tmp/ccmbTcom.s page 4
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69 0000 0368 ldr r3, [r0]
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70 0002 B3F1A04F cmp r3, #1342177280
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71 0006 02D1 bne .L6
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107:Core/Src/main.c **** peak = 1;
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72 .loc 1 107 0
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73 0008 014B ldr r3, .L8
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74 000a 0122 movs r2, #1
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75 000c 1A60 str r2, [r3]
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76 .L6:
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108:Core/Src/main.c **** }
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109:Core/Src/main.c **** }
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77 .loc 1 109 0
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78 000e 7047 bx lr
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79 .L9:
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80 .align 2
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81 .L8:
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82 0010 00000000 .word peak
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83 .cfi_endproc
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84 .LFE377:
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86 .section .text.HAL_DAC_ConvHalfCpltCallbackCh1,"ax",%progbits
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87 .align 1
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88 .p2align 2,,3
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89 .global HAL_DAC_ConvHalfCpltCallbackCh1
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90 .syntax unified
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91 .thumb
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92 .thumb_func
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93 .fpu fpv4-sp-d16
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95 HAL_DAC_ConvHalfCpltCallbackCh1:
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96 .LFB378:
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110:Core/Src/main.c ****
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111:Core/Src/main.c **** // DAC
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112:Core/Src/main.c **** // rx
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113:Core/Src/main.c **** void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
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97 .loc 1 113 0
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98 .cfi_startproc
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99 @ args = 0, pretend = 0, frame = 0
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100 @ frame_needed = 0, uses_anonymous_args = 0
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101 @ link register save eliminated.
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102 .LVL2:
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114:Core/Src/main.c **** lf_buffer_toggle = 0;
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103 .loc 1 114 0
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104 0000 0349 ldr r1, .L11
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115:Core/Src/main.c **** half_rx_dac_buffer_empty = 1;
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105 .loc 1 115 0
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106 0002 044B ldr r3, .L11+4
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114:Core/Src/main.c **** lf_buffer_toggle = 0;
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107 .loc 1 114 0
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108 0004 0020 movs r0, #0
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109 .LVL3:
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110 .loc 1 115 0
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111 0006 0122 movs r2, #1
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114:Core/Src/main.c **** lf_buffer_toggle = 0;
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112 .loc 1 114 0
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113 0008 0870 strb r0, [r1]
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114 .loc 1 115 0
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115 000a 1A70 strb r2, [r3]
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116:Core/Src/main.c **** }
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ARM GAS /tmp/ccmbTcom.s page 5
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116 .loc 1 116 0
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117 000c 7047 bx lr
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118 .L12:
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119 000e 00BF .align 2
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120 .L11:
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121 0010 00000000 .word lf_buffer_toggle
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122 0014 00000000 .word half_rx_dac_buffer_empty
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123 .cfi_endproc
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124 .LFE378:
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126 .section .text.HAL_DAC_ConvCpltCallbackCh1,"ax",%progbits
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127 .align 1
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128 .p2align 2,,3
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129 .global HAL_DAC_ConvCpltCallbackCh1
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130 .syntax unified
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131 .thumb
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132 .thumb_func
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133 .fpu fpv4-sp-d16
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135 HAL_DAC_ConvCpltCallbackCh1:
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136 .LFB379:
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117:Core/Src/main.c ****
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118:Core/Src/main.c **** void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
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137 .loc 1 118 0
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138 .cfi_startproc
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139 @ args = 0, pretend = 0, frame = 0
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140 @ frame_needed = 0, uses_anonymous_args = 0
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141 @ link register save eliminated.
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142 .LVL4:
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119:Core/Src/main.c **** lf_buffer_toggle = 1;
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143 .loc 1 119 0
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144 0000 0249 ldr r1, .L14
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120:Core/Src/main.c **** half_rx_dac_buffer_empty = 1;
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145 .loc 1 120 0
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146 0002 034A ldr r2, .L14+4
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119:Core/Src/main.c **** lf_buffer_toggle = 1;
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147 .loc 1 119 0
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148 0004 0123 movs r3, #1
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149 0006 0B70 strb r3, [r1]
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150 .loc 1 120 0
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151 0008 1370 strb r3, [r2]
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121:Core/Src/main.c **** }
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152 .loc 1 121 0
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153 000a 7047 bx lr
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154 .L15:
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155 .align 2
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156 .L14:
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157 000c 00000000 .word lf_buffer_toggle
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158 0010 00000000 .word half_rx_dac_buffer_empty
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159 .cfi_endproc
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160 .LFE379:
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162 .section .text.HAL_DACEx_ConvHalfCpltCallbackCh2,"ax",%progbits
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163 .align 1
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164 .p2align 2,,3
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165 .global HAL_DACEx_ConvHalfCpltCallbackCh2
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166 .syntax unified
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167 .thumb
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168 .thumb_func
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169 .fpu fpv4-sp-d16
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ARM GAS /tmp/ccmbTcom.s page 6
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171 HAL_DACEx_ConvHalfCpltCallbackCh2:
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172 .LFB380:
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122:Core/Src/main.c ****
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123:Core/Src/main.c **** // tx
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124:Core/Src/main.c **** void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
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173 .loc 1 124 0
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174 .cfi_startproc
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175 @ args = 0, pretend = 0, frame = 0
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176 @ frame_needed = 0, uses_anonymous_args = 0
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177 .LVL5:
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178 0000 08B5 push {r3, lr}
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179 .LCFI0:
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180 .cfi_def_cfa_offset 8
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181 .cfi_offset 3, -8
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182 .cfi_offset 14, -4
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125:Core/Src/main.c **** HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
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183 .loc 1 125 0
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184 0002 2021 movs r1, #32
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185 0004 0448 ldr r0, .L18
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186 .LVL6:
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187 0006 FFF7FEFF bl HAL_GPIO_TogglePin
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188 .LVL7:
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126:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
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189 .loc 1 126 0
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190 000a 0449 ldr r1, .L18+4
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127:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
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191 .loc 1 127 0
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192 000c 044B ldr r3, .L18+8
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126:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
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193 .loc 1 126 0
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194 000e 0020 movs r0, #0
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195 .loc 1 127 0
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196 0010 0122 movs r2, #1
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126:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
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197 .loc 1 126 0
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198 0012 0870 strb r0, [r1]
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199 .loc 1 127 0
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200 0014 1A70 strb r2, [r3]
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128:Core/Src/main.c **** }
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201 .loc 1 128 0
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202 0016 08BD pop {r3, pc}
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203 .L19:
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204 .align 2
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205 .L18:
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206 0018 00040048 .word 1207960576
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207 001c 00000000 .word tx_dac_buffer_toggle
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208 0020 00000000 .word half_tx_dac_buffer_empty
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209 .cfi_endproc
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210 .LFE380:
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212 .section .text.HAL_DACEx_ConvCpltCallbackCh2,"ax",%progbits
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213 .align 1
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214 .p2align 2,,3
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215 .global HAL_DACEx_ConvCpltCallbackCh2
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216 .syntax unified
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217 .thumb
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218 .thumb_func
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219 .fpu fpv4-sp-d16
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ARM GAS /tmp/ccmbTcom.s page 7
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221 HAL_DACEx_ConvCpltCallbackCh2:
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222 .LFB381:
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129:Core/Src/main.c ****
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130:Core/Src/main.c **** void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
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223 .loc 1 130 0
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224 .cfi_startproc
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225 @ args = 0, pretend = 0, frame = 0
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226 @ frame_needed = 0, uses_anonymous_args = 0
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227 .LVL8:
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228 0000 08B5 push {r3, lr}
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229 .LCFI1:
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230 .cfi_def_cfa_offset 8
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231 .cfi_offset 3, -8
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232 .cfi_offset 14, -4
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131:Core/Src/main.c **** HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
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233 .loc 1 131 0
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234 0002 2021 movs r1, #32
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235 0004 0448 ldr r0, .L22
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236 .LVL9:
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237 0006 FFF7FEFF bl HAL_GPIO_TogglePin
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238 .LVL10:
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132:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
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239 .loc 1 132 0
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240 000a 0449 ldr r1, .L22+4
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133:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
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241 .loc 1 133 0
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242 000c 044A ldr r2, .L22+8
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132:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
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243 .loc 1 132 0
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244 000e 0123 movs r3, #1
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245 0010 0B70 strb r3, [r1]
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246 .loc 1 133 0
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247 0012 1370 strb r3, [r2]
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134:Core/Src/main.c **** }
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248 .loc 1 134 0
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249 0014 08BD pop {r3, pc}
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250 .L23:
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251 0016 00BF .align 2
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252 .L22:
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253 0018 00040048 .word 1207960576
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254 001c 00000000 .word tx_dac_buffer_toggle
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255 0020 00000000 .word half_tx_dac_buffer_empty
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256 .cfi_endproc
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257 .LFE381:
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259 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits
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260 .align 1
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261 .p2align 2,,3
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262 .global HAL_TIM_PeriodElapsedCallback
|
||
263 .syntax unified
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264 .thumb
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265 .thumb_func
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266 .fpu fpv4-sp-d16
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268 HAL_TIM_PeriodElapsedCallback:
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269 .LFB382:
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135:Core/Src/main.c ****
|
||
136:Core/Src/main.c **** /*
|
||
137:Core/Src/main.c **** void HAL_DAC_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
|
||
ARM GAS /tmp/ccmbTcom.s page 8
|
||
|
||
|
||
138:Core/Src/main.c **** tx_dac_buffer_toggle = 0;
|
||
139:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
|
||
140:Core/Src/main.c **** }
|
||
141:Core/Src/main.c ****
|
||
142:Core/Src/main.c **** void HAL_DAC_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
|
||
143:Core/Src/main.c **** tx_dac_buffer_toggle = 1;
|
||
144:Core/Src/main.c **** half_tx_dac_buffer_empty = 1;
|
||
145:Core/Src/main.c **** }
|
||
146:Core/Src/main.c **** */
|
||
147:Core/Src/main.c ****
|
||
148:Core/Src/main.c **** // TIMERZ
|
||
149:Core/Src/main.c **** // 10 ms
|
||
150:Core/Src/main.c **** void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){
|
||
270 .loc 1 150 0
|
||
271 .cfi_startproc
|
||
272 @ args = 0, pretend = 0, frame = 0
|
||
273 @ frame_needed = 0, uses_anonymous_args = 0
|
||
274 @ link register save eliminated.
|
||
275 .LVL11:
|
||
151:Core/Src/main.c **** if (htim->Instance == TIM7){
|
||
276 .loc 1 151 0
|
||
277 0000 0268 ldr r2, [r0]
|
||
278 0002 034B ldr r3, .L26
|
||
279 0004 9A42 cmp r2, r3
|
||
280 0006 02D1 bne .L24
|
||
152:Core/Src/main.c **** tick = 1;
|
||
281 .loc 1 152 0
|
||
282 0008 024B ldr r3, .L26+4
|
||
283 000a 0122 movs r2, #1
|
||
284 000c 1A70 strb r2, [r3]
|
||
285 .L24:
|
||
153:Core/Src/main.c **** }
|
||
154:Core/Src/main.c **** }
|
||
286 .loc 1 154 0
|
||
287 000e 7047 bx lr
|
||
288 .L27:
|
||
289 .align 2
|
||
290 .L26:
|
||
291 0010 00140040 .word 1073746944
|
||
292 0014 00000000 .word tick
|
||
293 .cfi_endproc
|
||
294 .LFE382:
|
||
296 .section .text.HAL_UART_RxCpltCallback,"ax",%progbits
|
||
297 .align 1
|
||
298 .p2align 2,,3
|
||
299 .global HAL_UART_RxCpltCallback
|
||
300 .syntax unified
|
||
301 .thumb
|
||
302 .thumb_func
|
||
303 .fpu fpv4-sp-d16
|
||
305 HAL_UART_RxCpltCallback:
|
||
306 .LFB383:
|
||
155:Core/Src/main.c ****
|
||
156:Core/Src/main.c **** // uart
|
||
157:Core/Src/main.c **** void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){
|
||
307 .loc 1 157 0
|
||
308 .cfi_startproc
|
||
ARM GAS /tmp/ccmbTcom.s page 9
|
||
|
||
|
||
309 @ args = 0, pretend = 0, frame = 0
|
||
310 @ frame_needed = 0, uses_anonymous_args = 0
|
||
311 .LVL12:
|
||
312 0000 38B5 push {r3, r4, r5, lr}
|
||
313 .LCFI2:
|
||
314 .cfi_def_cfa_offset 16
|
||
315 .cfi_offset 3, -16
|
||
316 .cfi_offset 4, -12
|
||
317 .cfi_offset 5, -8
|
||
318 .cfi_offset 14, -4
|
||
158:Core/Src/main.c **** if (huart == &huart1){
|
||
319 .loc 1 158 0
|
||
320 0002 084B ldr r3, .L32
|
||
321 0004 9842 cmp r0, r3
|
||
322 0006 00D0 beq .L31
|
||
159:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
|
||
160:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
|
||
161:Core/Src/main.c **** }
|
||
162:Core/Src/main.c **** /*
|
||
163:Core/Src/main.c **** if (huart == &huart2){
|
||
164:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
|
||
165:Core/Src/main.c **** HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
|
||
166:Core/Src/main.c **** }
|
||
167:Core/Src/main.c **** */
|
||
168:Core/Src/main.c **** }
|
||
323 .loc 1 168 0
|
||
324 0008 38BD pop {r3, r4, r5, pc}
|
||
325 .L31:
|
||
326 .LBB102:
|
||
159:Core/Src/main.c **** enqueue_cmd(uart_rx_buf[0]);
|
||
327 .loc 1 159 0
|
||
328 000a 074D ldr r5, .L32+4
|
||
329 000c 0446 mov r4, r0
|
||
330 000e 2878 ldrb r0, [r5] @ zero_extendqisi2
|
||
331 .LVL13:
|
||
332 0010 FFF7FEFF bl enqueue_cmd
|
||
333 .LVL14:
|
||
160:Core/Src/main.c **** }
|
||
334 .loc 1 160 0
|
||
335 0014 2946 mov r1, r5
|
||
336 0016 2046 mov r0, r4
|
||
337 0018 0122 movs r2, #1
|
||
338 .LBE102:
|
||
339 .loc 1 168 0
|
||
340 001a BDE83840 pop {r3, r4, r5, lr}
|
||
341 .LCFI3:
|
||
342 .cfi_restore 14
|
||
343 .cfi_restore 5
|
||
344 .cfi_restore 4
|
||
345 .cfi_restore 3
|
||
346 .cfi_def_cfa_offset 0
|
||
347 .LVL15:
|
||
348 .LBB103:
|
||
160:Core/Src/main.c **** }
|
||
349 .loc 1 160 0
|
||
350 001e FFF7FEBF b HAL_UART_Receive_IT
|
||
351 .LVL16:
|
||
ARM GAS /tmp/ccmbTcom.s page 10
|
||
|
||
|
||
352 .L33:
|
||
353 0022 00BF .align 2
|
||
354 .L32:
|
||
355 0024 00000000 .word huart1
|
||
356 0028 00000000 .word uart_rx_buf
|
||
357 .LBE103:
|
||
358 .cfi_endproc
|
||
359 .LFE383:
|
||
361 .section .text.__io_putchar,"ax",%progbits
|
||
362 .align 1
|
||
363 .p2align 2,,3
|
||
364 .global __io_putchar
|
||
365 .syntax unified
|
||
366 .thumb
|
||
367 .thumb_func
|
||
368 .fpu fpv4-sp-d16
|
||
370 __io_putchar:
|
||
371 .LFB384:
|
||
169:Core/Src/main.c ****
|
||
170:Core/Src/main.c **** // non-DMA
|
||
171:Core/Src/main.c **** int __io_putchar(int ch){
|
||
372 .loc 1 171 0
|
||
373 .cfi_startproc
|
||
374 @ args = 0, pretend = 0, frame = 8
|
||
375 @ frame_needed = 0, uses_anonymous_args = 0
|
||
376 .LVL17:
|
||
377 0000 10B5 push {r4, lr}
|
||
378 .LCFI4:
|
||
379 .cfi_def_cfa_offset 8
|
||
380 .cfi_offset 4, -8
|
||
381 .cfi_offset 14, -4
|
||
382 0002 82B0 sub sp, sp, #8
|
||
383 .LCFI5:
|
||
384 .cfi_def_cfa_offset 16
|
||
172:Core/Src/main.c **** uint8_t c[1];
|
||
173:Core/Src/main.c **** c[0] = ch & 0x00FF;
|
||
385 .loc 1 173 0
|
||
386 0004 02A9 add r1, sp, #8
|
||
171:Core/Src/main.c **** uint8_t c[1];
|
||
387 .loc 1 171 0
|
||
388 0006 0446 mov r4, r0
|
||
389 .loc 1 173 0
|
||
390 0008 01F8040D strb r0, [r1, #-4]!
|
||
174:Core/Src/main.c **** HAL_UART_Transmit(&huart1, &*c, 1, 10);
|
||
391 .loc 1 174 0
|
||
392 000c 0A23 movs r3, #10
|
||
393 000e 0122 movs r2, #1
|
||
394 0010 0248 ldr r0, .L36
|
||
395 .LVL18:
|
||
396 0012 FFF7FEFF bl HAL_UART_Transmit
|
||
397 .LVL19:
|
||
175:Core/Src/main.c **** // HAL_UART_Transmit(&huart2, &*c, 1, 10);
|
||
176:Core/Src/main.c **** return ch;
|
||
177:Core/Src/main.c **** }
|
||
398 .loc 1 177 0
|
||
399 0016 2046 mov r0, r4
|
||
400 0018 02B0 add sp, sp, #8
|
||
ARM GAS /tmp/ccmbTcom.s page 11
|
||
|
||
|
||
401 .LCFI6:
|
||
402 .cfi_def_cfa_offset 8
|
||
403 @ sp needed
|
||
404 001a 10BD pop {r4, pc}
|
||
405 .LVL20:
|
||
406 .L37:
|
||
407 .align 2
|
||
408 .L36:
|
||
409 001c 00000000 .word huart1
|
||
410 .cfi_endproc
|
||
411 .LFE384:
|
||
413 .section .text._write,"ax",%progbits
|
||
414 .align 1
|
||
415 .p2align 2,,3
|
||
416 .global _write
|
||
417 .syntax unified
|
||
418 .thumb
|
||
419 .thumb_func
|
||
420 .fpu fpv4-sp-d16
|
||
422 _write:
|
||
423 .LFB385:
|
||
178:Core/Src/main.c ****
|
||
179:Core/Src/main.c **** int _write(int file,char *ptr, int len){
|
||
424 .loc 1 179 0
|
||
425 .cfi_startproc
|
||
426 @ args = 0, pretend = 0, frame = 0
|
||
427 @ frame_needed = 0, uses_anonymous_args = 0
|
||
428 .LVL21:
|
||
429 0000 10B5 push {r4, lr}
|
||
430 .LCFI7:
|
||
431 .cfi_def_cfa_offset 8
|
||
432 .cfi_offset 4, -8
|
||
433 .cfi_offset 14, -4
|
||
180:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
|
||
434 .loc 1 180 0
|
||
435 0002 0348 ldr r0, .L40
|
||
436 .LVL22:
|
||
179:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
|
||
437 .loc 1 179 0
|
||
438 0004 1446 mov r4, r2
|
||
439 .loc 1 180 0
|
||
440 0006 92B2 uxth r2, r2
|
||
441 .LVL23:
|
||
442 0008 FFF7FEFF bl HAL_UART_Transmit_DMA
|
||
443 .LVL24:
|
||
181:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
|
||
182:Core/Src/main.c **** /* int DataIdx;
|
||
183:Core/Src/main.c **** for(DataIdx= 0; DataIdx< len; DataIdx++) {
|
||
184:Core/Src/main.c **** __io_putchar(*ptr++);
|
||
185:Core/Src/main.c **** }*/
|
||
186:Core/Src/main.c **** return len;
|
||
187:Core/Src/main.c **** }
|
||
444 .loc 1 187 0
|
||
445 000c 2046 mov r0, r4
|
||
446 000e 10BD pop {r4, pc}
|
||
447 .LVL25:
|
||
448 .L41:
|
||
ARM GAS /tmp/ccmbTcom.s page 12
|
||
|
||
|
||
449 .align 2
|
||
450 .L40:
|
||
451 0010 00000000 .word huart1
|
||
452 .cfi_endproc
|
||
453 .LFE385:
|
||
455 .section .text.display_write,"ax",%progbits
|
||
456 .align 1
|
||
457 .p2align 2,,3
|
||
458 .global display_write
|
||
459 .syntax unified
|
||
460 .thumb
|
||
461 .thumb_func
|
||
462 .fpu fpv4-sp-d16
|
||
464 display_write:
|
||
465 .LFB386:
|
||
188:Core/Src/main.c ****
|
||
189:Core/Src/main.c **** int display_write(char *ptr, int len){
|
||
466 .loc 1 189 0
|
||
467 .cfi_startproc
|
||
468 @ args = 0, pretend = 0, frame = 0
|
||
469 @ frame_needed = 0, uses_anonymous_args = 0
|
||
470 .LVL26:
|
||
471 0000 10B5 push {r4, lr}
|
||
472 .LCFI8:
|
||
473 .cfi_def_cfa_offset 8
|
||
474 .cfi_offset 4, -8
|
||
475 .cfi_offset 14, -4
|
||
190:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
|
||
476 .loc 1 190 0
|
||
477 0002 8AB2 uxth r2, r1
|
||
189:Core/Src/main.c **** HAL_UART_Transmit_DMA(&huart1, ptr, len);
|
||
478 .loc 1 189 0
|
||
479 0004 0C46 mov r4, r1
|
||
480 .loc 1 190 0
|
||
481 0006 0146 mov r1, r0
|
||
482 .LVL27:
|
||
483 0008 0248 ldr r0, .L44
|
||
484 .LVL28:
|
||
485 000a FFF7FEFF bl HAL_UART_Transmit_DMA
|
||
486 .LVL29:
|
||
191:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
|
||
192:Core/Src/main.c **** return len;
|
||
193:Core/Src/main.c **** }
|
||
487 .loc 1 193 0
|
||
488 000e 2046 mov r0, r4
|
||
489 0010 10BD pop {r4, pc}
|
||
490 .LVL30:
|
||
491 .L45:
|
||
492 0012 00BF .align 2
|
||
493 .L44:
|
||
494 0014 00000000 .word huart1
|
||
495 .cfi_endproc
|
||
496 .LFE386:
|
||
498 .section .text.start_transmit,"ax",%progbits
|
||
499 .align 1
|
||
500 .p2align 2,,3
|
||
501 .global start_transmit
|
||
ARM GAS /tmp/ccmbTcom.s page 13
|
||
|
||
|
||
502 .syntax unified
|
||
503 .thumb
|
||
504 .thumb_func
|
||
505 .fpu fpv4-sp-d16
|
||
507 start_transmit:
|
||
508 .LFB387:
|
||
194:Core/Src/main.c ****
|
||
195:Core/Src/main.c **** void start_transmit(void){
|
||
509 .loc 1 195 0
|
||
510 .cfi_startproc
|
||
511 @ args = 0, pretend = 0, frame = 0
|
||
512 @ frame_needed = 0, uses_anonymous_args = 0
|
||
513 0000 10B5 push {r4, lr}
|
||
514 .LCFI9:
|
||
515 .cfi_def_cfa_offset 8
|
||
516 .cfi_offset 4, -8
|
||
517 .cfi_offset 14, -4
|
||
196:Core/Src/main.c **** transmit = 1;
|
||
518 .loc 1 196 0
|
||
519 0002 0B4B ldr r3, .L48
|
||
197:Core/Src/main.c **** // ADC
|
||
198:Core/Src/main.c **** // HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
|
||
199:Core/Src/main.c ****
|
||
200:Core/Src/main.c **** // DAC
|
||
201:Core/Src/main.c **** HAL_TIM_Base_Start(&htim8);
|
||
202:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
|
||
520 .loc 1 202 0
|
||
521 0004 0B4C ldr r4, .L48+4
|
||
201:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
|
||
522 .loc 1 201 0
|
||
523 0006 0C48 ldr r0, .L48+8
|
||
195:Core/Src/main.c **** transmit = 1;
|
||
524 .loc 1 195 0
|
||
525 0008 82B0 sub sp, sp, #8
|
||
526 .LCFI10:
|
||
527 .cfi_def_cfa_offset 16
|
||
196:Core/Src/main.c **** // ADC
|
||
528 .loc 1 196 0
|
||
529 000a 0122 movs r2, #1
|
||
530 000c 1A70 strb r2, [r3]
|
||
201:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
|
||
531 .loc 1 201 0
|
||
532 000e FFF7FEFF bl HAL_TIM_Base_Start
|
||
533 .LVL31:
|
||
534 .loc 1 202 0
|
||
535 0012 2046 mov r0, r4
|
||
536 0014 1021 movs r1, #16
|
||
537 0016 FFF7FEFF bl HAL_DAC_Start
|
||
538 .LVL32:
|
||
203:Core/Src/main.c **** HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_2, tx_dac_buffer, (TX_DAC_BUFFER_SIZE * 2), DAC_ALIGN
|
||
539 .loc 1 203 0
|
||
540 001a 0023 movs r3, #0
|
||
541 001c 0093 str r3, [sp]
|
||
542 001e 2046 mov r0, r4
|
||
543 0020 4FF40063 mov r3, #2048
|
||
544 0024 054A ldr r2, .L48+12
|
||
545 0026 1021 movs r1, #16
|
||
ARM GAS /tmp/ccmbTcom.s page 14
|
||
|
||
|
||
546 0028 FFF7FEFF bl HAL_DAC_Start_DMA
|
||
547 .LVL33:
|
||
204:Core/Src/main.c **** }
|
||
548 .loc 1 204 0
|
||
549 002c 02B0 add sp, sp, #8
|
||
550 .LCFI11:
|
||
551 .cfi_def_cfa_offset 8
|
||
552 @ sp needed
|
||
553 002e 10BD pop {r4, pc}
|
||
554 .L49:
|
||
555 .align 2
|
||
556 .L48:
|
||
557 0030 00000000 .word transmit
|
||
558 0034 00000000 .word hdac1
|
||
559 0038 00000000 .word htim8
|
||
560 003c 00000000 .word tx_dac_buffer
|
||
561 .cfi_endproc
|
||
562 .LFE387:
|
||
564 .section .text.stop_transmit,"ax",%progbits
|
||
565 .align 1
|
||
566 .p2align 2,,3
|
||
567 .global stop_transmit
|
||
568 .syntax unified
|
||
569 .thumb
|
||
570 .thumb_func
|
||
571 .fpu fpv4-sp-d16
|
||
573 stop_transmit:
|
||
574 .LFB388:
|
||
205:Core/Src/main.c ****
|
||
206:Core/Src/main.c **** void stop_transmit(void){
|
||
575 .loc 1 206 0
|
||
576 .cfi_startproc
|
||
577 @ args = 0, pretend = 0, frame = 0
|
||
578 @ frame_needed = 0, uses_anonymous_args = 0
|
||
579 0000 10B5 push {r4, lr}
|
||
580 .LCFI12:
|
||
581 .cfi_def_cfa_offset 8
|
||
582 .cfi_offset 4, -8
|
||
583 .cfi_offset 14, -4
|
||
207:Core/Src/main.c **** transmit = 0;
|
||
584 .loc 1 207 0
|
||
585 0002 084B ldr r3, .L52
|
||
208:Core/Src/main.c **** // ADC
|
||
209:Core/Src/main.c **** // HAL_ADC_Stop_DMA(&hadc1);
|
||
210:Core/Src/main.c ****
|
||
211:Core/Src/main.c **** // DAC
|
||
212:Core/Src/main.c **** HAL_TIM_Base_Stop(&htim8);
|
||
213:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
|
||
586 .loc 1 213 0
|
||
587 0004 084C ldr r4, .L52+4
|
||
212:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
|
||
588 .loc 1 212 0
|
||
589 0006 0948 ldr r0, .L52+8
|
||
207:Core/Src/main.c **** transmit = 0;
|
||
590 .loc 1 207 0
|
||
591 0008 0022 movs r2, #0
|
||
592 000a 1A70 strb r2, [r3]
|
||
ARM GAS /tmp/ccmbTcom.s page 15
|
||
|
||
|
||
212:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
|
||
593 .loc 1 212 0
|
||
594 000c FFF7FEFF bl HAL_TIM_Base_Stop
|
||
595 .LVL34:
|
||
596 .loc 1 213 0
|
||
597 0010 2046 mov r0, r4
|
||
598 0012 1021 movs r1, #16
|
||
599 0014 FFF7FEFF bl HAL_DAC_Stop
|
||
600 .LVL35:
|
||
214:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_2);
|
||
601 .loc 1 214 0
|
||
602 0018 2046 mov r0, r4
|
||
603 001a 1021 movs r1, #16
|
||
215:Core/Src/main.c **** }
|
||
604 .loc 1 215 0
|
||
605 001c BDE81040 pop {r4, lr}
|
||
606 .LCFI13:
|
||
607 .cfi_restore 14
|
||
608 .cfi_restore 4
|
||
609 .cfi_def_cfa_offset 0
|
||
214:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_2);
|
||
610 .loc 1 214 0
|
||
611 0020 FFF7FEBF b HAL_DAC_Stop_DMA
|
||
612 .LVL36:
|
||
613 .L53:
|
||
614 .align 2
|
||
615 .L52:
|
||
616 0024 00000000 .word transmit
|
||
617 0028 00000000 .word hdac1
|
||
618 002c 00000000 .word htim8
|
||
619 .cfi_endproc
|
||
620 .LFE388:
|
||
622 .section .text.start_receive,"ax",%progbits
|
||
623 .align 1
|
||
624 .p2align 2,,3
|
||
625 .global start_receive
|
||
626 .syntax unified
|
||
627 .thumb
|
||
628 .thumb_func
|
||
629 .fpu fpv4-sp-d16
|
||
631 start_receive:
|
||
632 .LFB389:
|
||
216:Core/Src/main.c ****
|
||
217:Core/Src/main.c **** void start_receive(void){
|
||
633 .loc 1 217 0
|
||
634 .cfi_startproc
|
||
635 @ args = 0, pretend = 0, frame = 0
|
||
636 @ frame_needed = 0, uses_anonymous_args = 0
|
||
637 0000 30B5 push {r4, r5, lr}
|
||
638 .LCFI14:
|
||
639 .cfi_def_cfa_offset 12
|
||
640 .cfi_offset 4, -12
|
||
641 .cfi_offset 5, -8
|
||
642 .cfi_offset 14, -4
|
||
218:Core/Src/main.c **** receive = 1;
|
||
643 .loc 1 218 0
|
||
644 0002 0D4B ldr r3, .L56
|
||
ARM GAS /tmp/ccmbTcom.s page 16
|
||
|
||
|
||
219:Core/Src/main.c **** // ADC
|
||
220:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
|
||
645 .loc 1 220 0
|
||
646 0004 0D49 ldr r1, .L56+4
|
||
221:Core/Src/main.c ****
|
||
222:Core/Src/main.c **** // DAC
|
||
223:Core/Src/main.c **** HAL_TIM_Base_Start(&htim6);
|
||
224:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_1);
|
||
647 .loc 1 224 0
|
||
648 0006 0E4C ldr r4, .L56+8
|
||
220:Core/Src/main.c ****
|
||
649 .loc 1 220 0
|
||
650 0008 0E48 ldr r0, .L56+12
|
||
217:Core/Src/main.c **** receive = 1;
|
||
651 .loc 1 217 0
|
||
652 000a 83B0 sub sp, sp, #12
|
||
653 .LCFI15:
|
||
654 .cfi_def_cfa_offset 24
|
||
220:Core/Src/main.c ****
|
||
655 .loc 1 220 0
|
||
656 000c 4FF48062 mov r2, #1024
|
||
218:Core/Src/main.c **** // ADC
|
||
657 .loc 1 218 0
|
||
658 0010 0125 movs r5, #1
|
||
659 0012 1D70 strb r5, [r3]
|
||
220:Core/Src/main.c ****
|
||
660 .loc 1 220 0
|
||
661 0014 FFF7FEFF bl HAL_ADC_Start_DMA
|
||
662 .LVL37:
|
||
223:Core/Src/main.c **** HAL_DAC_Start(&hdac1,DAC_CHANNEL_1);
|
||
663 .loc 1 223 0
|
||
664 0018 0B48 ldr r0, .L56+16
|
||
665 001a FFF7FEFF bl HAL_TIM_Base_Start
|
||
666 .LVL38:
|
||
667 .loc 1 224 0
|
||
668 001e 2046 mov r0, r4
|
||
669 0020 0021 movs r1, #0
|
||
670 0022 FFF7FEFF bl HAL_DAC_Start
|
||
671 .LVL39:
|
||
225:Core/Src/main.c **** HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, lf_buffer, (LF_BUFFER_SIZE * 2), DAC_ALIGN_12B_R);
|
||
672 .loc 1 225 0
|
||
673 0026 0021 movs r1, #0
|
||
674 0028 2046 mov r0, r4
|
||
675 002a 0091 str r1, [sp]
|
||
676 002c 8023 movs r3, #128
|
||
677 002e 074A ldr r2, .L56+20
|
||
678 0030 FFF7FEFF bl HAL_DAC_Start_DMA
|
||
679 .LVL40:
|
||
226:Core/Src/main.c **** }
|
||
680 .loc 1 226 0
|
||
681 0034 03B0 add sp, sp, #12
|
||
682 .LCFI16:
|
||
683 .cfi_def_cfa_offset 12
|
||
684 @ sp needed
|
||
685 0036 30BD pop {r4, r5, pc}
|
||
686 .L57:
|
||
687 .align 2
|
||
ARM GAS /tmp/ccmbTcom.s page 17
|
||
|
||
|
||
688 .L56:
|
||
689 0038 00000000 .word receive
|
||
690 003c 00000000 .word adc_buffer
|
||
691 0040 00000000 .word hdac1
|
||
692 0044 00000000 .word hadc1
|
||
693 0048 00000000 .word htim6
|
||
694 004c 00000000 .word lf_buffer
|
||
695 .cfi_endproc
|
||
696 .LFE389:
|
||
698 .section .text.stop_receive,"ax",%progbits
|
||
699 .align 1
|
||
700 .p2align 2,,3
|
||
701 .global stop_receive
|
||
702 .syntax unified
|
||
703 .thumb
|
||
704 .thumb_func
|
||
705 .fpu fpv4-sp-d16
|
||
707 stop_receive:
|
||
708 .LFB390:
|
||
227:Core/Src/main.c ****
|
||
228:Core/Src/main.c **** void stop_receive(void){
|
||
709 .loc 1 228 0
|
||
710 .cfi_startproc
|
||
711 @ args = 0, pretend = 0, frame = 0
|
||
712 @ frame_needed = 0, uses_anonymous_args = 0
|
||
713 0000 38B5 push {r3, r4, r5, lr}
|
||
714 .LCFI17:
|
||
715 .cfi_def_cfa_offset 16
|
||
716 .cfi_offset 3, -16
|
||
717 .cfi_offset 4, -12
|
||
718 .cfi_offset 5, -8
|
||
719 .cfi_offset 14, -4
|
||
229:Core/Src/main.c **** receive = 0;
|
||
720 .loc 1 229 0
|
||
721 0002 0A4B ldr r3, .L60
|
||
230:Core/Src/main.c **** // ADC
|
||
231:Core/Src/main.c **** HAL_ADC_Stop_DMA(&hadc1);
|
||
232:Core/Src/main.c ****
|
||
233:Core/Src/main.c **** // DAC
|
||
234:Core/Src/main.c **** HAL_TIM_Base_Stop(&htim6);
|
||
235:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1);
|
||
722 .loc 1 235 0
|
||
723 0004 0A4D ldr r5, .L60+4
|
||
231:Core/Src/main.c ****
|
||
724 .loc 1 231 0
|
||
725 0006 0B48 ldr r0, .L60+8
|
||
229:Core/Src/main.c **** receive = 0;
|
||
726 .loc 1 229 0
|
||
727 0008 0024 movs r4, #0
|
||
728 000a 1C70 strb r4, [r3]
|
||
231:Core/Src/main.c ****
|
||
729 .loc 1 231 0
|
||
730 000c FFF7FEFF bl HAL_ADC_Stop_DMA
|
||
731 .LVL41:
|
||
234:Core/Src/main.c **** HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1);
|
||
732 .loc 1 234 0
|
||
733 0010 0948 ldr r0, .L60+12
|
||
ARM GAS /tmp/ccmbTcom.s page 18
|
||
|
||
|
||
734 0012 FFF7FEFF bl HAL_TIM_Base_Stop
|
||
735 .LVL42:
|
||
736 .loc 1 235 0
|
||
737 0016 2146 mov r1, r4
|
||
738 0018 2846 mov r0, r5
|
||
739 001a FFF7FEFF bl HAL_DAC_Stop
|
||
740 .LVL43:
|
||
236:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1);
|
||
741 .loc 1 236 0
|
||
742 001e 2146 mov r1, r4
|
||
743 0020 2846 mov r0, r5
|
||
237:Core/Src/main.c **** }
|
||
744 .loc 1 237 0
|
||
745 0022 BDE83840 pop {r3, r4, r5, lr}
|
||
746 .LCFI18:
|
||
747 .cfi_restore 14
|
||
748 .cfi_restore 5
|
||
749 .cfi_restore 4
|
||
750 .cfi_restore 3
|
||
751 .cfi_def_cfa_offset 0
|
||
236:Core/Src/main.c **** HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1);
|
||
752 .loc 1 236 0
|
||
753 0026 FFF7FEBF b HAL_DAC_Stop_DMA
|
||
754 .LVL44:
|
||
755 .L61:
|
||
756 002a 00BF .align 2
|
||
757 .L60:
|
||
758 002c 00000000 .word receive
|
||
759 0030 00000000 .word hdac1
|
||
760 0034 00000000 .word hadc1
|
||
761 0038 00000000 .word htim6
|
||
762 .cfi_endproc
|
||
763 .LFE390:
|
||
765 .section .text.set_gain,"ax",%progbits
|
||
766 .align 1
|
||
767 .p2align 2,,3
|
||
768 .global set_gain
|
||
769 .syntax unified
|
||
770 .thumb
|
||
771 .thumb_func
|
||
772 .fpu fpv4-sp-d16
|
||
774 set_gain:
|
||
775 .LFB391:
|
||
238:Core/Src/main.c ****
|
||
239:Core/Src/main.c **** void set_gain(void){
|
||
776 .loc 1 239 0
|
||
777 .cfi_startproc
|
||
778 @ args = 0, pretend = 0, frame = 0
|
||
779 @ frame_needed = 0, uses_anonymous_args = 0
|
||
780 0000 08B5 push {r3, lr}
|
||
781 .LCFI19:
|
||
782 .cfi_def_cfa_offset 8
|
||
783 .cfi_offset 3, -8
|
||
784 .cfi_offset 14, -4
|
||
240:Core/Src/main.c **** HAL_OPAMP_Stop(&hopamp1);
|
||
785 .loc 1 240 0
|
||
786 0002 1848 ldr r0, .L72
|
||
ARM GAS /tmp/ccmbTcom.s page 19
|
||
|
||
|
||
787 0004 FFF7FEFF bl HAL_OPAMP_Stop
|
||
788 .LVL45:
|
||
241:Core/Src/main.c **** switch (gain){
|
||
789 .loc 1 241 0
|
||
790 0008 174B ldr r3, .L72+4
|
||
791 000a 1B68 ldr r3, [r3]
|
||
792 000c 023B subs r3, r3, #2
|
||
793 000e 042B cmp r3, #4
|
||
794 0010 04D8 bhi .L63
|
||
795 0012 DFE803F0 tbb [pc, r3]
|
||
796 .L65:
|
||
797 0016 13 .byte (.L64-.L65)/2
|
||
798 0017 18 .byte (.L66-.L65)/2
|
||
799 0018 1D .byte (.L67-.L65)/2
|
||
800 0019 0E .byte (.L68-.L65)/2
|
||
801 001a 22 .byte (.L69-.L65)/2
|
||
802 001b 00 .p2align 1
|
||
803 .L63:
|
||
242:Core/Src/main.c **** case 1:
|
||
243:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_2_OR_MINUS_1;
|
||
804 .loc 1 243 0
|
||
805 001c 114B ldr r3, .L72
|
||
806 001e 0022 movs r2, #0
|
||
807 0020 9A62 str r2, [r3, #40]
|
||
808 .L70:
|
||
244:Core/Src/main.c **** break;
|
||
245:Core/Src/main.c **** case 2:
|
||
246:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_4_OR_MINUS_3;
|
||
247:Core/Src/main.c **** break;
|
||
248:Core/Src/main.c **** case 3:
|
||
249:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_8_OR_MINUS_7;
|
||
250:Core/Src/main.c **** break;
|
||
251:Core/Src/main.c **** case 4:
|
||
252:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_16_OR_MINUS_15;
|
||
253:Core/Src/main.c **** break;
|
||
254:Core/Src/main.c **** case 5:
|
||
255:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_32_OR_MINUS_31;
|
||
256:Core/Src/main.c **** break;
|
||
257:Core/Src/main.c **** case 6:
|
||
258:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_64_OR_MINUS_63;
|
||
259:Core/Src/main.c **** break;
|
||
260:Core/Src/main.c **** default:
|
||
261:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_2_OR_MINUS_1;
|
||
262:Core/Src/main.c **** break;
|
||
263:Core/Src/main.c **** }
|
||
264:Core/Src/main.c **** HAL_OPAMP_Init(&hopamp1);
|
||
809 .loc 1 264 0
|
||
810 0022 1048 ldr r0, .L72
|
||
811 0024 FFF7FEFF bl HAL_OPAMP_Init
|
||
812 .LVL46:
|
||
265:Core/Src/main.c **** HAL_OPAMP_Start(&hopamp1);
|
||
813 .loc 1 265 0
|
||
814 0028 0E48 ldr r0, .L72
|
||
266:Core/Src/main.c ****
|
||
267:Core/Src/main.c **** }
|
||
815 .loc 1 267 0
|
||
816 002a BDE80840 pop {r3, lr}
|
||
ARM GAS /tmp/ccmbTcom.s page 20
|
||
|
||
|
||
817 .LCFI20:
|
||
818 .cfi_remember_state
|
||
819 .cfi_restore 14
|
||
820 .cfi_restore 3
|
||
821 .cfi_def_cfa_offset 0
|
||
265:Core/Src/main.c **** HAL_OPAMP_Start(&hopamp1);
|
||
822 .loc 1 265 0
|
||
823 002e FFF7FEBF b HAL_OPAMP_Start
|
||
824 .LVL47:
|
||
825 .L68:
|
||
826 .LCFI21:
|
||
827 .cfi_restore_state
|
||
255:Core/Src/main.c **** break;
|
||
828 .loc 1 255 0
|
||
829 0032 0C4B ldr r3, .L72
|
||
830 0034 4FF48032 mov r2, #65536
|
||
831 0038 9A62 str r2, [r3, #40]
|
||
256:Core/Src/main.c **** case 6:
|
||
832 .loc 1 256 0
|
||
833 003a F2E7 b .L70
|
||
834 .L64:
|
||
246:Core/Src/main.c **** break;
|
||
835 .loc 1 246 0
|
||
836 003c 094B ldr r3, .L72
|
||
837 003e 4FF48042 mov r2, #16384
|
||
838 0042 9A62 str r2, [r3, #40]
|
||
247:Core/Src/main.c **** case 3:
|
||
839 .loc 1 247 0
|
||
840 0044 EDE7 b .L70
|
||
841 .L66:
|
||
249:Core/Src/main.c **** break;
|
||
842 .loc 1 249 0
|
||
843 0046 074B ldr r3, .L72
|
||
844 0048 4FF40042 mov r2, #32768
|
||
845 004c 9A62 str r2, [r3, #40]
|
||
250:Core/Src/main.c **** case 4:
|
||
846 .loc 1 250 0
|
||
847 004e E8E7 b .L70
|
||
848 .L67:
|
||
252:Core/Src/main.c **** break;
|
||
849 .loc 1 252 0
|
||
850 0050 044B ldr r3, .L72
|
||
851 0052 4FF44042 mov r2, #49152
|
||
852 0056 9A62 str r2, [r3, #40]
|
||
253:Core/Src/main.c **** case 5:
|
||
853 .loc 1 253 0
|
||
854 0058 E3E7 b .L70
|
||
855 .L69:
|
||
258:Core/Src/main.c **** break;
|
||
856 .loc 1 258 0
|
||
857 005a 024B ldr r3, .L72
|
||
858 005c 4FF4A032 mov r2, #81920
|
||
859 0060 9A62 str r2, [r3, #40]
|
||
259:Core/Src/main.c **** default:
|
||
860 .loc 1 259 0
|
||
861 0062 DEE7 b .L70
|
||
862 .L73:
|
||
ARM GAS /tmp/ccmbTcom.s page 21
|
||
|
||
|
||
863 .align 2
|
||
864 .L72:
|
||
865 0064 00000000 .word hopamp1
|
||
866 0068 00000000 .word gain
|
||
867 .cfi_endproc
|
||
868 .LFE391:
|
||
870 .section .text.SystemClock_Config,"ax",%progbits
|
||
871 .align 1
|
||
872 .p2align 2,,3
|
||
873 .global SystemClock_Config
|
||
874 .syntax unified
|
||
875 .thumb
|
||
876 .thumb_func
|
||
877 .fpu fpv4-sp-d16
|
||
879 SystemClock_Config:
|
||
880 .LFB393:
|
||
268:Core/Src/main.c ****
|
||
269:Core/Src/main.c ****
|
||
270:Core/Src/main.c **** /* USER CODE END 0 */
|
||
271:Core/Src/main.c ****
|
||
272:Core/Src/main.c **** /**
|
||
273:Core/Src/main.c **** * @brief The application entry point.
|
||
274:Core/Src/main.c **** * @retval int
|
||
275:Core/Src/main.c **** */
|
||
276:Core/Src/main.c **** int main(void)
|
||
277:Core/Src/main.c **** {
|
||
278:Core/Src/main.c **** /* USER CODE BEGIN 1 */
|
||
279:Core/Src/main.c **** state_changed = 0;
|
||
280:Core/Src/main.c **** display_init();
|
||
281:Core/Src/main.c **** state_set_default();
|
||
282:Core/Src/main.c **** interface_set_default();
|
||
283:Core/Src/main.c **** display_update_mode();
|
||
284:Core/Src/main.c **** display_update_state();
|
||
285:Core/Src/main.c **** /* USER CODE END 1 */
|
||
286:Core/Src/main.c ****
|
||
287:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
|
||
288:Core/Src/main.c ****
|
||
289:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||
290:Core/Src/main.c **** HAL_Init();
|
||
291:Core/Src/main.c ****
|
||
292:Core/Src/main.c **** /* USER CODE BEGIN Init */
|
||
293:Core/Src/main.c ****
|
||
294:Core/Src/main.c **** /* USER CODE END Init */
|
||
295:Core/Src/main.c ****
|
||
296:Core/Src/main.c **** /* Configure the system clock */
|
||
297:Core/Src/main.c **** SystemClock_Config();
|
||
298:Core/Src/main.c ****
|
||
299:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
|
||
300:Core/Src/main.c ****
|
||
301:Core/Src/main.c **** /* USER CODE END SysInit */
|
||
302:Core/Src/main.c ****
|
||
303:Core/Src/main.c **** /* Initialize all configured peripherals */
|
||
304:Core/Src/main.c **** MX_GPIO_Init();
|
||
305:Core/Src/main.c **** MX_DMA_Init();
|
||
306:Core/Src/main.c **** MX_DAC1_Init();
|
||
307:Core/Src/main.c **** MX_ADC1_Init();
|
||
308:Core/Src/main.c **** MX_TIM7_Init();
|
||
ARM GAS /tmp/ccmbTcom.s page 22
|
||
|
||
|
||
309:Core/Src/main.c **** MX_TIM6_Init();
|
||
310:Core/Src/main.c **** MX_CORDIC_Init();
|
||
311:Core/Src/main.c **** MX_USART1_UART_Init();
|
||
312:Core/Src/main.c **** MX_TIM8_Init();
|
||
313:Core/Src/main.c **** MX_OPAMP1_Init();
|
||
314:Core/Src/main.c **** /* USER CODE BEGIN 2 */
|
||
315:Core/Src/main.c **** st2_filter_init();
|
||
316:Core/Src/main.c **** audio_filter_init();
|
||
317:Core/Src/main.c **** // diag();
|
||
318:Core/Src/main.c **** HAL_OPAMP_Start(&hopamp1);
|
||
319:Core/Src/main.c **** set_gain();
|
||
320:Core/Src/main.c **** HAL_TIM_Base_Start_IT(&htim7);
|
||
321:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
|
||
322:Core/Src/main.c **** // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
|
||
323:Core/Src/main.c ****
|
||
324:Core/Src/main.c **** start_receive();
|
||
325:Core/Src/main.c **** /* USER CODE END 2 */
|
||
326:Core/Src/main.c ****
|
||
327:Core/Src/main.c **** /* Infinite loop */
|
||
328:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
|
||
329:Core/Src/main.c **** while (1){
|
||
330:Core/Src/main.c **** /* USER CODE END WHILE */
|
||
331:Core/Src/main.c ****
|
||
332:Core/Src/main.c **** /* USER CODE BEGIN 3 */
|
||
333:Core/Src/main.c **** if(receive){
|
||
334:Core/Src/main.c **** if(rx_adc_buffer_ready){
|
||
335:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
|
||
336:Core/Src/main.c **** rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
|
||
337:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
|
||
338:Core/Src/main.c **** rx_adc_buffer_ready = 0;
|
||
339:Core/Src/main.c **** }
|
||
340:Core/Src/main.c **** if(half_rx_dac_buffer_empty){
|
||
341:Core/Src/main.c **** if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
342:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
|
||
343:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
344:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
|
||
345:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
|
||
346:Core/Src/main.c **** }
|
||
347:Core/Src/main.c **** }
|
||
348:Core/Src/main.c **** if (transmit){
|
||
349:Core/Src/main.c **** if(half_tx_dac_buffer_empty){
|
||
350:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
|
||
351:Core/Src/main.c **** tx_mixer(tx_dac_buffer[tx_dac_buffer_toggle], TX_DAC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
|
||
352:Core/Src/main.c **** half_tx_dac_buffer_empty = 0;
|
||
353:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
|
||
354:Core/Src/main.c **** }
|
||
355:Core/Src/main.c **** if(tx_adc_buffer_ready){
|
||
356:Core/Src/main.c **** if (modulation == MOD_DC) dc_modulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
357:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
|
||
358:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
|
||
359:Core/Src/main.c **** }
|
||
360:Core/Src/main.c **** }
|
||
361:Core/Src/main.c **** if(tick){
|
||
362:Core/Src/main.c **** if(receive){
|
||
363:Core/Src/main.c **** // TODO
|
||
364:Core/Src/main.c **** rx_measure_signal(if_I, LF_BUFFER_SIZE);
|
||
365:Core/Src/main.c **** }
|
||
ARM GAS /tmp/ccmbTcom.s page 23
|
||
|
||
|
||
366:Core/Src/main.c **** // HAL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin);
|
||
367:Core/Src/main.c **** while(rx_cmd_rb_in_idx != rx_cmd_rb_out_idx) dequeue_cmd();
|
||
368:Core/Src/main.c **** if(state_changed) display_update_state();
|
||
369:Core/Src/main.c **** if(uart_tx_buf_in_idx){
|
||
370:Core/Src/main.c **** display_write(uart_tx_buf, uart_tx_buf_in_idx);
|
||
371:Core/Src/main.c **** uart_tx_buf_in_idx = 0;
|
||
372:Core/Src/main.c **** }
|
||
373:Core/Src/main.c **** if(peak){
|
||
374:Core/Src/main.c **** if(peakset == 0) click();
|
||
375:Core/Src/main.c **** peakset = 50;
|
||
376:Core/Src/main.c **** peak = 0;
|
||
377:Core/Src/main.c **** }
|
||
378:Core/Src/main.c **** if(peakset){
|
||
379:Core/Src/main.c **** peakset--;
|
||
380:Core/Src/main.c **** if(peakset == 0) click();
|
||
381:Core/Src/main.c **** }
|
||
382:Core/Src/main.c ****
|
||
383:Core/Src/main.c **** tick = 0;
|
||
384:Core/Src/main.c **** }
|
||
385:Core/Src/main.c **** }
|
||
386:Core/Src/main.c **** /* USER CODE END 3 */
|
||
387:Core/Src/main.c **** }
|
||
388:Core/Src/main.c ****
|
||
389:Core/Src/main.c **** /**
|
||
390:Core/Src/main.c **** * @brief System Clock Configuration
|
||
391:Core/Src/main.c **** * @retval None
|
||
392:Core/Src/main.c **** */
|
||
393:Core/Src/main.c **** void SystemClock_Config(void)
|
||
394:Core/Src/main.c **** {
|
||
881 .loc 1 394 0
|
||
882 .cfi_startproc
|
||
883 @ args = 0, pretend = 0, frame = 144
|
||
884 @ frame_needed = 0, uses_anonymous_args = 0
|
||
885 0000 30B5 push {r4, r5, lr}
|
||
886 .LCFI22:
|
||
887 .cfi_def_cfa_offset 12
|
||
888 .cfi_offset 4, -12
|
||
889 .cfi_offset 5, -8
|
||
890 .cfi_offset 14, -4
|
||
395:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
891 .loc 1 395 0
|
||
892 0002 0021 movs r1, #0
|
||
394:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
893 .loc 1 394 0
|
||
894 0004 A5B0 sub sp, sp, #148
|
||
895 .LCFI23:
|
||
896 .cfi_def_cfa_offset 160
|
||
396:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
897 .loc 1 396 0
|
||
898 0006 0C46 mov r4, r1
|
||
395:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
899 .loc 1 395 0
|
||
900 0008 3822 movs r2, #56
|
||
901 000a 05A8 add r0, sp, #20
|
||
902 000c FFF7FEFF bl memset
|
||
903 .LVL48:
|
||
397:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||
ARM GAS /tmp/ccmbTcom.s page 24
|
||
|
||
|
||
904 .loc 1 397 0
|
||
905 0010 2146 mov r1, r4
|
||
906 0012 4422 movs r2, #68
|
||
907 0014 13A8 add r0, sp, #76
|
||
396:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
908 .loc 1 396 0
|
||
909 0016 CDE90044 strd r4, r4, [sp]
|
||
910 001a CDE90244 strd r4, r4, [sp, #8]
|
||
911 001e 0494 str r4, [sp, #16]
|
||
912 .loc 1 397 0
|
||
913 0020 FFF7FEFF bl memset
|
||
914 .LVL49:
|
||
398:Core/Src/main.c ****
|
||
399:Core/Src/main.c **** /** Configure the main internal regulator output voltage
|
||
400:Core/Src/main.c **** */
|
||
401:Core/Src/main.c **** HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
|
||
915 .loc 1 401 0
|
||
916 0024 2046 mov r0, r4
|
||
917 0026 FFF7FEFF bl HAL_PWREx_ControlVoltageScaling
|
||
918 .LVL50:
|
||
402:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
|
||
403:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
|
||
404:Core/Src/main.c **** */
|
||
405:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||
406:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
407:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
408:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
919 .loc 1 408 0
|
||
920 002a 0324 movs r4, #3
|
||
407:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
921 .loc 1 407 0
|
||
922 002c 0223 movs r3, #2
|
||
405:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
923 .loc 1 405 0
|
||
924 002e 0125 movs r5, #1
|
||
406:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
925 .loc 1 406 0
|
||
926 0030 4FF48031 mov r1, #65536
|
||
409:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
|
||
410:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 28;
|
||
927 .loc 1 410 0
|
||
928 0034 1C22 movs r2, #28
|
||
411:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||
412:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
||
413:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||
414:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
929 .loc 1 414 0
|
||
930 0036 05A8 add r0, sp, #20
|
||
406:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
931 .loc 1 406 0
|
||
932 0038 CDE90551 strd r5, r1, [sp, #20]
|
||
407:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
933 .loc 1 407 0
|
||
934 003c 0C93 str r3, [sp, #48]
|
||
409:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 28;
|
||
935 .loc 1 409 0
|
||
936 003e 0E93 str r3, [sp, #56]
|
||
ARM GAS /tmp/ccmbTcom.s page 25
|
||
|
||
|
||
412:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||
937 .loc 1 412 0
|
||
938 0040 CDE91033 strd r3, r3, [sp, #64]
|
||
413:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
939 .loc 1 413 0
|
||
940 0044 1293 str r3, [sp, #72]
|
||
408:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
|
||
941 .loc 1 408 0
|
||
942 0046 0D94 str r4, [sp, #52]
|
||
410:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||
943 .loc 1 410 0
|
||
944 0048 0F92 str r2, [sp, #60]
|
||
945 .loc 1 414 0
|
||
946 004a FFF7FEFF bl HAL_RCC_OscConfig
|
||
947 .LVL51:
|
||
948 004e 08B1 cbz r0, .L75
|
||
949 .LBB104:
|
||
950 .LBB105:
|
||
951 .LBB106:
|
||
952 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
|
||
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
|
||
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
|
||
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
|
||
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
|
||
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
|
||
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
|
||
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
|
||
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
|
||
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
||
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
|
||
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
|
||
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
|
||
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
|
||
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
|
||
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
|
||
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
|
||
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
|
||
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
|
||
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
|
||
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
|
||
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
|
||
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
|
||
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
|
||
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
|
||
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
ARM GAS /tmp/ccmbTcom.s page 26
|
||
|
||
|
||
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
|
||
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
|
||
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
|
||
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
|
||
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
|
||
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
|
||
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
|
||
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
|
||
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
||
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
|
||
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
|
||
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
|
||
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
|
||
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
|
||
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
|
||
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
|
||
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
|
||
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
|
||
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
|
||
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
|
||
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
|
||
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
|
||
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
|
||
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
|
||
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
|
||
ARM GAS /tmp/ccmbTcom.s page 27
|
||
|
||
|
||
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
|
||
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
|
||
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
|
||
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
|
||
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
|
||
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
|
||
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
|
||
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
|
||
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
|
||
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
|
||
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
|
||
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
|
||
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
|
||
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
|
||
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
|
||
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
||
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
|
||
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
||
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
|
||
137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
||
138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
||
139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
|
||
140:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
||
142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
||
143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
||
144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
|
||
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
|
||
147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
|
||
148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
|
||
149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
|
||
150:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
|
||
ARM GAS /tmp/ccmbTcom.s page 28
|
||
|
||
|
||
152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
||
153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
|
||
154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
156:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
|
||
158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
||
159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
|
||
160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
|
||
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
165:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
|
||
167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
168:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
|
||
170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
|
||
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
|
||
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
|
||
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
|
||
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
|
||
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
|
||
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
|
||
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
|
||
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
|
||
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
||
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
|
||
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
|
||
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
|
||
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
|
||
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
|
||
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
ARM GAS /tmp/ccmbTcom.s page 29
|
||
|
||
|
||
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
|
||
953 .loc 2 209 0
|
||
954 .syntax unified
|
||
955 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
956 0050 72B6 cpsid i
|
||
957 @ 0 "" 2
|
||
958 .thumb
|
||
959 .syntax unified
|
||
960 .L76:
|
||
961 0052 FEE7 b .L76
|
||
962 .L75:
|
||
963 0054 0346 mov r3, r0
|
||
964 .LBE106:
|
||
965 .LBE105:
|
||
966 .LBE104:
|
||
415:Core/Src/main.c **** {
|
||
416:Core/Src/main.c **** Error_Handler();
|
||
417:Core/Src/main.c **** }
|
||
418:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
|
||
419:Core/Src/main.c **** */
|
||
420:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
967 .loc 1 420 0
|
||
968 0056 0F22 movs r2, #15
|
||
421:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
422:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
423:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
424:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||
425:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||
426:Core/Src/main.c ****
|
||
427:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||
969 .loc 1 427 0
|
||
970 0058 6846 mov r0, sp
|
||
971 005a 0421 movs r1, #4
|
||
423:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||
972 .loc 1 423 0
|
||
973 005c CDE90143 strd r4, r3, [sp, #4]
|
||
425:Core/Src/main.c ****
|
||
974 .loc 1 425 0
|
||
975 0060 CDE90333 strd r3, r3, [sp, #12]
|
||
420:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
976 .loc 1 420 0
|
||
977 0064 0092 str r2, [sp]
|
||
978 .loc 1 427 0
|
||
979 0066 FFF7FEFF bl HAL_RCC_ClockConfig
|
||
980 .LVL52:
|
||
981 006a 0346 mov r3, r0
|
||
982 006c 08B1 cbz r0, .L77
|
||
983 .LBB107:
|
||
984 .LBB108:
|
||
985 .LBB109:
|
||
986 .loc 2 209 0
|
||
987 .syntax unified
|
||
988 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
989 006e 72B6 cpsid i
|
||
990 @ 0 "" 2
|
||
991 .thumb
|
||
992 .syntax unified
|
||
ARM GAS /tmp/ccmbTcom.s page 30
|
||
|
||
|
||
993 .L78:
|
||
994 0070 FEE7 b .L78
|
||
995 .L77:
|
||
996 .LBE109:
|
||
997 .LBE108:
|
||
998 .LBE107:
|
||
428:Core/Src/main.c **** {
|
||
429:Core/Src/main.c **** Error_Handler();
|
||
430:Core/Src/main.c **** }
|
||
431:Core/Src/main.c **** /** Initializes the peripherals clocks
|
||
432:Core/Src/main.c **** */
|
||
433:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_ADC12;
|
||
999 .loc 1 433 0
|
||
1000 0072 48F20101 movw r1, #32769
|
||
434:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||
435:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
|
||
1001 .loc 1 435 0
|
||
1002 0076 4FF00052 mov r2, #536870912
|
||
436:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||
1003 .loc 1 436 0
|
||
1004 007a 13A8 add r0, sp, #76
|
||
433:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||
1005 .loc 1 433 0
|
||
1006 007c CDE91313 strd r1, r3, [sp, #76]
|
||
435:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||
1007 .loc 1 435 0
|
||
1008 0080 2292 str r2, [sp, #136]
|
||
1009 .loc 1 436 0
|
||
1010 0082 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
|
||
1011 .LVL53:
|
||
1012 0086 08B1 cbz r0, .L74
|
||
1013 .LBB110:
|
||
1014 .LBB111:
|
||
1015 .LBB112:
|
||
1016 .loc 2 209 0
|
||
1017 .syntax unified
|
||
1018 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1019 0088 72B6 cpsid i
|
||
1020 @ 0 "" 2
|
||
1021 .thumb
|
||
1022 .syntax unified
|
||
1023 .L80:
|
||
1024 008a FEE7 b .L80
|
||
1025 .L74:
|
||
1026 .LBE112:
|
||
1027 .LBE111:
|
||
1028 .LBE110:
|
||
437:Core/Src/main.c **** {
|
||
438:Core/Src/main.c **** Error_Handler();
|
||
439:Core/Src/main.c **** }
|
||
440:Core/Src/main.c **** }
|
||
1029 .loc 1 440 0
|
||
1030 008c 25B0 add sp, sp, #148
|
||
1031 .LCFI24:
|
||
1032 .cfi_def_cfa_offset 12
|
||
1033 @ sp needed
|
||
1034 008e 30BD pop {r4, r5, pc}
|
||
ARM GAS /tmp/ccmbTcom.s page 31
|
||
|
||
|
||
1035 .cfi_endproc
|
||
1036 .LFE393:
|
||
1038 .section .text.startup.main,"ax",%progbits
|
||
1039 .align 1
|
||
1040 .p2align 2,,3
|
||
1041 .global main
|
||
1042 .syntax unified
|
||
1043 .thumb
|
||
1044 .thumb_func
|
||
1045 .fpu fpv4-sp-d16
|
||
1047 main:
|
||
1048 .LFB392:
|
||
277:Core/Src/main.c **** /* USER CODE BEGIN 1 */
|
||
1049 .loc 1 277 0
|
||
1050 .cfi_startproc
|
||
1051 @ Volatile: function does not return.
|
||
1052 @ args = 0, pretend = 0, frame = 112
|
||
1053 @ frame_needed = 0, uses_anonymous_args = 0
|
||
1054 0000 2DE98048 push {r7, fp, lr}
|
||
1055 .LCFI25:
|
||
1056 .cfi_def_cfa_offset 12
|
||
1057 .cfi_offset 7, -12
|
||
1058 .cfi_offset 11, -8
|
||
1059 .cfi_offset 14, -4
|
||
279:Core/Src/main.c **** display_init();
|
||
1060 .loc 1 279 0
|
||
1061 0004 DFF8ECA2 ldr r10, .L177+48
|
||
1062 .LBB204:
|
||
1063 .LBB205:
|
||
1064 .LBB206:
|
||
441:Core/Src/main.c ****
|
||
442:Core/Src/main.c **** /**
|
||
443:Core/Src/main.c **** * @brief ADC1 Initialization Function
|
||
444:Core/Src/main.c **** * @param None
|
||
445:Core/Src/main.c **** * @retval None
|
||
446:Core/Src/main.c **** */
|
||
447:Core/Src/main.c **** static void MX_ADC1_Init(void)
|
||
448:Core/Src/main.c **** {
|
||
449:Core/Src/main.c ****
|
||
450:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
|
||
451:Core/Src/main.c ****
|
||
452:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */
|
||
453:Core/Src/main.c ****
|
||
454:Core/Src/main.c **** ADC_MultiModeTypeDef multimode = {0};
|
||
455:Core/Src/main.c **** ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
|
||
456:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
|
||
457:Core/Src/main.c ****
|
||
458:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
|
||
459:Core/Src/main.c ****
|
||
460:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */
|
||
461:Core/Src/main.c **** /** Common config
|
||
462:Core/Src/main.c **** */
|
||
463:Core/Src/main.c **** hadc1.Instance = ADC1;
|
||
464:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
|
||
465:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
|
||
466:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
||
467:Core/Src/main.c **** hadc1.Init.GainCompensation = 0;
|
||
ARM GAS /tmp/ccmbTcom.s page 32
|
||
|
||
|
||
468:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
|
||
469:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
||
470:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
|
||
471:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = ENABLE;
|
||
472:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
|
||
473:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
|
||
474:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||
475:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
||
476:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE;
|
||
477:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
|
||
478:Core/Src/main.c **** hadc1.Init.OversamplingMode = ENABLE;
|
||
479:Core/Src/main.c **** hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_2;
|
||
480:Core/Src/main.c **** hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_NONE;
|
||
481:Core/Src/main.c **** hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
|
||
482:Core/Src/main.c **** hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
|
||
483:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
||
484:Core/Src/main.c **** {
|
||
485:Core/Src/main.c **** Error_Handler();
|
||
486:Core/Src/main.c **** }
|
||
487:Core/Src/main.c **** /** Configure the ADC multi-mode
|
||
488:Core/Src/main.c **** */
|
||
489:Core/Src/main.c **** multimode.Mode = ADC_MODE_INDEPENDENT;
|
||
490:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
|
||
491:Core/Src/main.c **** {
|
||
492:Core/Src/main.c **** Error_Handler();
|
||
493:Core/Src/main.c **** }
|
||
494:Core/Src/main.c **** /** Configure Analog WatchDog 1
|
||
495:Core/Src/main.c **** */
|
||
496:Core/Src/main.c **** AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1;
|
||
497:Core/Src/main.c **** AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
|
||
498:Core/Src/main.c **** AnalogWDGConfig.Channel = ADC_CHANNEL_VOPAMP1;
|
||
499:Core/Src/main.c **** // AnalogWDGConfig.ITMode = ENABLE;
|
||
500:Core/Src/main.c **** AnalogWDGConfig.HighThreshold = 4089;
|
||
501:Core/Src/main.c **** AnalogWDGConfig.LowThreshold = 5;
|
||
502:Core/Src/main.c **** AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_2SAMPLES;
|
||
503:Core/Src/main.c **** if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
|
||
504:Core/Src/main.c **** {
|
||
505:Core/Src/main.c **** Error_Handler();
|
||
506:Core/Src/main.c **** }
|
||
507:Core/Src/main.c **** /** Configure Regular Channel
|
||
508:Core/Src/main.c **** */
|
||
509:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_VOPAMP1;
|
||
510:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
|
||
511:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
|
||
512:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
|
||
513:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
|
||
514:Core/Src/main.c **** sConfig.Offset = 0;
|
||
515:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||
516:Core/Src/main.c **** {
|
||
517:Core/Src/main.c **** Error_Handler();
|
||
518:Core/Src/main.c **** }
|
||
519:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
|
||
520:Core/Src/main.c ****
|
||
521:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */
|
||
522:Core/Src/main.c ****
|
||
523:Core/Src/main.c **** }
|
||
524:Core/Src/main.c ****
|
||
ARM GAS /tmp/ccmbTcom.s page 33
|
||
|
||
|
||
525:Core/Src/main.c **** /**
|
||
526:Core/Src/main.c **** * @brief CORDIC Initialization Function
|
||
527:Core/Src/main.c **** * @param None
|
||
528:Core/Src/main.c **** * @retval None
|
||
529:Core/Src/main.c **** */
|
||
530:Core/Src/main.c **** static void MX_CORDIC_Init(void)
|
||
531:Core/Src/main.c **** {
|
||
532:Core/Src/main.c ****
|
||
533:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 0 */
|
||
534:Core/Src/main.c **** // CORDIC_HandleTypeDef hcordic = {0};
|
||
535:Core/Src/main.c **** CORDIC_ConfigTypeDef sConfig = {0};
|
||
536:Core/Src/main.c **** sConfig.Function = CORDIC_FUNCTION_SINE;
|
||
537:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
|
||
538:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
|
||
539:Core/Src/main.c **** sConfig.NbWrite = CORDIC_NBWRITE_1;
|
||
540:Core/Src/main.c **** sConfig.NbRead = CORDIC_NBREAD_1;
|
||
541:Core/Src/main.c **** sConfig.InSize = CORDIC_INSIZE_32BITS;
|
||
542:Core/Src/main.c **** sConfig.OutSize = CORDIC_OUTSIZE_16BITS;
|
||
543:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
|
||
544:Core/Src/main.c ****
|
||
545:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 1 */
|
||
546:Core/Src/main.c **** /* USER CODE END CORDIC_Init 1 */
|
||
547:Core/Src/main.c **** hcordic.Instance = CORDIC;
|
||
548:Core/Src/main.c **** if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
|
||
549:Core/Src/main.c **** {
|
||
550:Core/Src/main.c **** Error_Handler();
|
||
551:Core/Src/main.c **** }
|
||
552:Core/Src/main.c **** /* USER CODE BEGIN CORDIC_Init 2 */
|
||
553:Core/Src/main.c **** HAL_CORDIC_Configure(&hcordic, &sConfig);
|
||
554:Core/Src/main.c **** /* USER CODE END CORDIC_Init 2 */
|
||
555:Core/Src/main.c ****
|
||
556:Core/Src/main.c **** }
|
||
557:Core/Src/main.c ****
|
||
558:Core/Src/main.c **** /**
|
||
559:Core/Src/main.c **** * @brief DAC1 Initialization Function
|
||
560:Core/Src/main.c **** * @param None
|
||
561:Core/Src/main.c **** * @retval None
|
||
562:Core/Src/main.c **** */
|
||
563:Core/Src/main.c **** static void MX_DAC1_Init(void)
|
||
564:Core/Src/main.c **** {
|
||
565:Core/Src/main.c ****
|
||
566:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 0 */
|
||
567:Core/Src/main.c ****
|
||
568:Core/Src/main.c **** /* USER CODE END DAC1_Init 0 */
|
||
569:Core/Src/main.c ****
|
||
570:Core/Src/main.c **** DAC_ChannelConfTypeDef sConfig = {0};
|
||
571:Core/Src/main.c ****
|
||
572:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 1 */
|
||
573:Core/Src/main.c ****
|
||
574:Core/Src/main.c **** /* USER CODE END DAC1_Init 1 */
|
||
575:Core/Src/main.c **** /** DAC Initialization
|
||
576:Core/Src/main.c **** */
|
||
577:Core/Src/main.c **** hdac1.Instance = DAC1;
|
||
578:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
|
||
579:Core/Src/main.c **** {
|
||
580:Core/Src/main.c **** Error_Handler();
|
||
581:Core/Src/main.c **** }
|
||
ARM GAS /tmp/ccmbTcom.s page 34
|
||
|
||
|
||
582:Core/Src/main.c **** /** DAC channel OUT1 config
|
||
583:Core/Src/main.c **** */
|
||
584:Core/Src/main.c **** sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
|
||
585:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
|
||
586:Core/Src/main.c **** sConfig.DAC_SignedFormat = ENABLE;
|
||
587:Core/Src/main.c **** sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
|
||
588:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
||
589:Core/Src/main.c **** sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
|
||
590:Core/Src/main.c **** sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
||
591:Core/Src/main.c **** sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
|
||
592:Core/Src/main.c **** sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
|
||
593:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
|
||
594:Core/Src/main.c **** {
|
||
595:Core/Src/main.c **** Error_Handler();
|
||
596:Core/Src/main.c **** }
|
||
597:Core/Src/main.c **** /** DAC channel OUT2 config
|
||
598:Core/Src/main.c **** */
|
||
599:Core/Src/main.c **** sConfig.DAC_SignedFormat = DISABLE;
|
||
600:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
|
||
601:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
|
||
602:Core/Src/main.c **** {
|
||
603:Core/Src/main.c **** Error_Handler();
|
||
604:Core/Src/main.c **** }
|
||
605:Core/Src/main.c **** /* USER CODE BEGIN DAC1_Init 2 */
|
||
606:Core/Src/main.c ****
|
||
607:Core/Src/main.c **** /* USER CODE END DAC1_Init 2 */
|
||
608:Core/Src/main.c ****
|
||
609:Core/Src/main.c **** }
|
||
610:Core/Src/main.c ****
|
||
611:Core/Src/main.c **** /**
|
||
612:Core/Src/main.c **** * @brief OPAMP1 Initialization Function
|
||
613:Core/Src/main.c **** * @param None
|
||
614:Core/Src/main.c **** * @retval None
|
||
615:Core/Src/main.c **** */
|
||
616:Core/Src/main.c **** static void MX_OPAMP1_Init(void)
|
||
617:Core/Src/main.c **** {
|
||
618:Core/Src/main.c ****
|
||
619:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 0 */
|
||
620:Core/Src/main.c ****
|
||
621:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 0 */
|
||
622:Core/Src/main.c ****
|
||
623:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 1 */
|
||
624:Core/Src/main.c ****
|
||
625:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 1 */
|
||
626:Core/Src/main.c **** hopamp1.Instance = OPAMP1;
|
||
627:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
|
||
628:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
|
||
629:Core/Src/main.c **** hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
|
||
630:Core/Src/main.c **** hopamp1.Init.InternalOutput = ENABLE;
|
||
631:Core/Src/main.c **** hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
|
||
632:Core/Src/main.c **** hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS;
|
||
633:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_64_OR_MINUS_63;
|
||
634:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
|
||
635:Core/Src/main.c **** if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
|
||
636:Core/Src/main.c **** {
|
||
637:Core/Src/main.c **** Error_Handler();
|
||
638:Core/Src/main.c **** }
|
||
ARM GAS /tmp/ccmbTcom.s page 35
|
||
|
||
|
||
639:Core/Src/main.c **** /* USER CODE BEGIN OPAMP1_Init 2 */
|
||
640:Core/Src/main.c ****
|
||
641:Core/Src/main.c **** /* USER CODE END OPAMP1_Init 2 */
|
||
642:Core/Src/main.c ****
|
||
643:Core/Src/main.c **** }
|
||
644:Core/Src/main.c ****
|
||
645:Core/Src/main.c **** /**
|
||
646:Core/Src/main.c **** * @brief TIM6 Initialization Function
|
||
647:Core/Src/main.c **** * @param None
|
||
648:Core/Src/main.c **** * @retval None
|
||
649:Core/Src/main.c **** */
|
||
650:Core/Src/main.c **** static void MX_TIM6_Init(void)
|
||
651:Core/Src/main.c **** {
|
||
652:Core/Src/main.c ****
|
||
653:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */
|
||
654:Core/Src/main.c ****
|
||
655:Core/Src/main.c **** /* USER CODE END TIM6_Init 0 */
|
||
656:Core/Src/main.c ****
|
||
657:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||
658:Core/Src/main.c ****
|
||
659:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */
|
||
660:Core/Src/main.c ****
|
||
661:Core/Src/main.c **** /* USER CODE END TIM6_Init 1 */
|
||
662:Core/Src/main.c **** htim6.Instance = TIM6;
|
||
663:Core/Src/main.c **** htim6.Init.Prescaler = 0;
|
||
664:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||
665:Core/Src/main.c **** htim6.Init.Period = 7679;
|
||
666:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
667:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
|
||
668:Core/Src/main.c **** {
|
||
669:Core/Src/main.c **** Error_Handler();
|
||
670:Core/Src/main.c **** }
|
||
671:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
|
||
672:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
673:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
|
||
674:Core/Src/main.c **** {
|
||
675:Core/Src/main.c **** Error_Handler();
|
||
676:Core/Src/main.c **** }
|
||
677:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
|
||
678:Core/Src/main.c ****
|
||
679:Core/Src/main.c **** /* USER CODE END TIM6_Init 2 */
|
||
680:Core/Src/main.c ****
|
||
681:Core/Src/main.c **** }
|
||
682:Core/Src/main.c ****
|
||
683:Core/Src/main.c **** /**
|
||
684:Core/Src/main.c **** * @brief TIM7 Initialization Function
|
||
685:Core/Src/main.c **** * @param None
|
||
686:Core/Src/main.c **** * @retval None
|
||
687:Core/Src/main.c **** */
|
||
688:Core/Src/main.c **** static void MX_TIM7_Init(void)
|
||
689:Core/Src/main.c **** {
|
||
690:Core/Src/main.c ****
|
||
691:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */
|
||
692:Core/Src/main.c ****
|
||
693:Core/Src/main.c **** /* USER CODE END TIM7_Init 0 */
|
||
694:Core/Src/main.c ****
|
||
695:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||
ARM GAS /tmp/ccmbTcom.s page 36
|
||
|
||
|
||
696:Core/Src/main.c ****
|
||
697:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */
|
||
698:Core/Src/main.c ****
|
||
699:Core/Src/main.c **** /* USER CODE END TIM7_Init 1 */
|
||
700:Core/Src/main.c **** htim7.Instance = TIM7;
|
||
701:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
|
||
702:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||
703:Core/Src/main.c **** htim7.Init.Period = 999;
|
||
704:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
705:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
|
||
706:Core/Src/main.c **** {
|
||
707:Core/Src/main.c **** Error_Handler();
|
||
708:Core/Src/main.c **** }
|
||
709:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||
710:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
711:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
|
||
712:Core/Src/main.c **** {
|
||
713:Core/Src/main.c **** Error_Handler();
|
||
714:Core/Src/main.c **** }
|
||
715:Core/Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
|
||
716:Core/Src/main.c ****
|
||
717:Core/Src/main.c **** /* USER CODE END TIM7_Init 2 */
|
||
718:Core/Src/main.c ****
|
||
719:Core/Src/main.c **** }
|
||
720:Core/Src/main.c ****
|
||
721:Core/Src/main.c **** /**
|
||
722:Core/Src/main.c **** * @brief TIM8 Initialization Function
|
||
723:Core/Src/main.c **** * @param None
|
||
724:Core/Src/main.c **** * @retval None
|
||
725:Core/Src/main.c **** */
|
||
726:Core/Src/main.c **** static void MX_TIM8_Init(void)
|
||
727:Core/Src/main.c **** {
|
||
728:Core/Src/main.c ****
|
||
729:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */
|
||
730:Core/Src/main.c ****
|
||
731:Core/Src/main.c **** /* USER CODE END TIM8_Init 0 */
|
||
732:Core/Src/main.c ****
|
||
733:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||
734:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||
735:Core/Src/main.c ****
|
||
736:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */
|
||
737:Core/Src/main.c ****
|
||
738:Core/Src/main.c **** /* USER CODE END TIM8_Init 1 */
|
||
739:Core/Src/main.c **** htim8.Instance = TIM8;
|
||
740:Core/Src/main.c **** htim8.Init.Prescaler = 0;
|
||
741:Core/Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||
742:Core/Src/main.c **** htim8.Init.Period = 239;
|
||
743:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||
744:Core/Src/main.c **** htim8.Init.RepetitionCounter = 0;
|
||
745:Core/Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
746:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
|
||
747:Core/Src/main.c **** {
|
||
748:Core/Src/main.c **** Error_Handler();
|
||
749:Core/Src/main.c **** }
|
||
750:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||
751:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
|
||
752:Core/Src/main.c **** {
|
||
ARM GAS /tmp/ccmbTcom.s page 37
|
||
|
||
|
||
753:Core/Src/main.c **** Error_Handler();
|
||
754:Core/Src/main.c **** }
|
||
755:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
|
||
756:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
|
||
757:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
758:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
|
||
759:Core/Src/main.c **** {
|
||
760:Core/Src/main.c **** Error_Handler();
|
||
761:Core/Src/main.c **** }
|
||
762:Core/Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */
|
||
763:Core/Src/main.c ****
|
||
764:Core/Src/main.c **** /* USER CODE END TIM8_Init 2 */
|
||
765:Core/Src/main.c ****
|
||
766:Core/Src/main.c **** }
|
||
767:Core/Src/main.c ****
|
||
768:Core/Src/main.c **** /**
|
||
769:Core/Src/main.c **** * @brief USART1 Initialization Function
|
||
770:Core/Src/main.c **** * @param None
|
||
771:Core/Src/main.c **** * @retval None
|
||
772:Core/Src/main.c **** */
|
||
773:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
|
||
774:Core/Src/main.c **** {
|
||
775:Core/Src/main.c ****
|
||
776:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
|
||
777:Core/Src/main.c ****
|
||
778:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
|
||
779:Core/Src/main.c ****
|
||
780:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
|
||
781:Core/Src/main.c ****
|
||
782:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
|
||
783:Core/Src/main.c **** huart1.Instance = USART1;
|
||
784:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
|
||
785:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||
786:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
|
||
787:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
|
||
788:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
|
||
789:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||
790:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||
791:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||
792:Core/Src/main.c **** huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||
793:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||
794:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
|
||
795:Core/Src/main.c **** {
|
||
796:Core/Src/main.c **** Error_Handler();
|
||
797:Core/Src/main.c **** }
|
||
798:Core/Src/main.c **** if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||
799:Core/Src/main.c **** {
|
||
800:Core/Src/main.c **** Error_Handler();
|
||
801:Core/Src/main.c **** }
|
||
802:Core/Src/main.c **** if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||
803:Core/Src/main.c **** {
|
||
804:Core/Src/main.c **** Error_Handler();
|
||
805:Core/Src/main.c **** }
|
||
806:Core/Src/main.c **** if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
|
||
807:Core/Src/main.c **** {
|
||
808:Core/Src/main.c **** Error_Handler();
|
||
809:Core/Src/main.c **** }
|
||
ARM GAS /tmp/ccmbTcom.s page 38
|
||
|
||
|
||
810:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
|
||
811:Core/Src/main.c ****
|
||
812:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
|
||
813:Core/Src/main.c ****
|
||
814:Core/Src/main.c **** }
|
||
815:Core/Src/main.c ****
|
||
816:Core/Src/main.c **** /**
|
||
817:Core/Src/main.c **** * Enable DMA controller clock
|
||
818:Core/Src/main.c **** */
|
||
819:Core/Src/main.c **** static void MX_DMA_Init(void)
|
||
820:Core/Src/main.c **** {
|
||
821:Core/Src/main.c ****
|
||
822:Core/Src/main.c **** /* DMA controller clock enable */
|
||
823:Core/Src/main.c **** __HAL_RCC_DMAMUX1_CLK_ENABLE();
|
||
824:Core/Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE();
|
||
825:Core/Src/main.c ****
|
||
826:Core/Src/main.c **** /* DMA interrupt init */
|
||
827:Core/Src/main.c **** /* DMA1_Channel1_IRQn interrupt configuration */
|
||
828:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
|
||
829:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
||
830:Core/Src/main.c **** /* DMA1_Channel2_IRQn interrupt configuration */
|
||
831:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
|
||
832:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
|
||
833:Core/Src/main.c **** /* DMA1_Channel4_IRQn interrupt configuration */
|
||
834:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
|
||
835:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
|
||
836:Core/Src/main.c **** /* DMA1_Channel5_IRQn interrupt configuration */
|
||
837:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
|
||
838:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
|
||
839:Core/Src/main.c ****
|
||
840:Core/Src/main.c **** }
|
||
841:Core/Src/main.c ****
|
||
842:Core/Src/main.c **** /**
|
||
843:Core/Src/main.c **** * @brief GPIO Initialization Function
|
||
844:Core/Src/main.c **** * @param None
|
||
845:Core/Src/main.c **** * @retval None
|
||
846:Core/Src/main.c **** */
|
||
847:Core/Src/main.c **** static void MX_GPIO_Init(void)
|
||
848:Core/Src/main.c **** {
|
||
849:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
850:Core/Src/main.c ****
|
||
851:Core/Src/main.c **** /* GPIO Ports Clock Enable */
|
||
852:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
|
||
1065 .loc 1 852 0
|
||
1066 0008 AE4D ldr r5, .L177
|
||
1067 .LBE206:
|
||
1068 .LBE205:
|
||
1069 .LBE204:
|
||
1070 .LBB213:
|
||
1071 .LBB214:
|
||
577:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
|
||
1072 .loc 1 577 0
|
||
1073 000a AF4F ldr r7, .L177+4
|
||
1074 .LBE214:
|
||
1075 .LBE213:
|
||
277:Core/Src/main.c **** /* USER CODE BEGIN 1 */
|
||
1076 .loc 1 277 0
|
||
ARM GAS /tmp/ccmbTcom.s page 39
|
||
|
||
|
||
1077 000c 9FB0 sub sp, sp, #124
|
||
1078 .LCFI26:
|
||
1079 .cfi_def_cfa_offset 136
|
||
279:Core/Src/main.c **** display_init();
|
||
1080 .loc 1 279 0
|
||
1081 000e 0024 movs r4, #0
|
||
1082 0010 AAF80040 strh r4, [r10] @ movhi
|
||
280:Core/Src/main.c **** state_set_default();
|
||
1083 .loc 1 280 0
|
||
1084 0014 FFF7FEFF bl display_init
|
||
1085 .LVL54:
|
||
281:Core/Src/main.c **** interface_set_default();
|
||
1086 .loc 1 281 0
|
||
1087 0018 FFF7FEFF bl state_set_default
|
||
1088 .LVL55:
|
||
282:Core/Src/main.c **** display_update_mode();
|
||
1089 .loc 1 282 0
|
||
1090 001c FFF7FEFF bl interface_set_default
|
||
1091 .LVL56:
|
||
283:Core/Src/main.c **** display_update_state();
|
||
1092 .loc 1 283 0
|
||
1093 0020 FFF7FEFF bl display_update_mode
|
||
1094 .LVL57:
|
||
284:Core/Src/main.c **** /* USER CODE END 1 */
|
||
1095 .loc 1 284 0
|
||
1096 0024 FFF7FEFF bl display_update_state
|
||
1097 .LVL58:
|
||
290:Core/Src/main.c ****
|
||
1098 .loc 1 290 0
|
||
1099 0028 FFF7FEFF bl HAL_Init
|
||
1100 .LVL59:
|
||
297:Core/Src/main.c ****
|
||
1101 .loc 1 297 0
|
||
1102 002c FFF7FEFF bl SystemClock_Config
|
||
1103 .LVL60:
|
||
1104 .LBB225:
|
||
1105 .LBB212:
|
||
849:Core/Src/main.c ****
|
||
1106 .loc 1 849 0
|
||
1107 0030 CDE91244 strd r4, r4, [sp, #72]
|
||
1108 0034 CDE91444 strd r4, r4, [sp, #80]
|
||
1109 0038 1694 str r4, [sp, #88]
|
||
1110 .LBB207:
|
||
1111 .loc 1 852 0
|
||
1112 003a EB6C ldr r3, [r5, #76]
|
||
1113 .LBE207:
|
||
853:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
854:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
855:Core/Src/main.c ****
|
||
856:Core/Src/main.c **** /*Configure GPIO pin Output Level */
|
||
857:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, GPIO_PIN_RESET);
|
||
1114 .loc 1 857 0
|
||
1115 003c A348 ldr r0, .L177+8
|
||
1116 .LBB208:
|
||
852:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
1117 .loc 1 852 0
|
||
1118 003e 43F02003 orr r3, r3, #32
|
||
ARM GAS /tmp/ccmbTcom.s page 40
|
||
|
||
|
||
1119 0042 EB64 str r3, [r5, #76]
|
||
1120 0044 EB6C ldr r3, [r5, #76]
|
||
1121 0046 03F02003 and r3, r3, #32
|
||
1122 004a 0593 str r3, [sp, #20]
|
||
1123 004c 059B ldr r3, [sp, #20]
|
||
1124 .LBE208:
|
||
1125 .LBB209:
|
||
853:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
1126 .loc 1 853 0
|
||
1127 004e EB6C ldr r3, [r5, #76]
|
||
1128 0050 43F00103 orr r3, r3, #1
|
||
1129 0054 EB64 str r3, [r5, #76]
|
||
1130 0056 EB6C ldr r3, [r5, #76]
|
||
1131 0058 03F00103 and r3, r3, #1
|
||
1132 005c 0693 str r3, [sp, #24]
|
||
1133 005e 069B ldr r3, [sp, #24]
|
||
1134 .LBE209:
|
||
1135 .LBB210:
|
||
854:Core/Src/main.c ****
|
||
1136 .loc 1 854 0
|
||
1137 0060 EB6C ldr r3, [r5, #76]
|
||
1138 0062 43F00203 orr r3, r3, #2
|
||
1139 0066 EB64 str r3, [r5, #76]
|
||
1140 0068 EB6C ldr r3, [r5, #76]
|
||
1141 006a 03F00203 and r3, r3, #2
|
||
1142 .LBE210:
|
||
1143 .loc 1 857 0
|
||
1144 006e 2246 mov r2, r4
|
||
1145 0070 2021 movs r1, #32
|
||
1146 .LBB211:
|
||
854:Core/Src/main.c ****
|
||
1147 .loc 1 854 0
|
||
1148 0072 0793 str r3, [sp, #28]
|
||
1149 0074 079B ldr r3, [sp, #28]
|
||
1150 .LBE211:
|
||
858:Core/Src/main.c ****
|
||
859:Core/Src/main.c **** /*Configure GPIO pin : OUT_Pin */
|
||
860:Core/Src/main.c **** GPIO_InitStruct.Pin = OUT_Pin;
|
||
1151 .loc 1 860 0
|
||
1152 0076 8846 mov r8, r1
|
||
861:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
1153 .loc 1 861 0
|
||
1154 0078 0126 movs r6, #1
|
||
857:Core/Src/main.c ****
|
||
1155 .loc 1 857 0
|
||
1156 007a FFF7FEFF bl HAL_GPIO_WritePin
|
||
1157 .LVL61:
|
||
862:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
863:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
864:Core/Src/main.c **** HAL_GPIO_Init(OUT_GPIO_Port, &GPIO_InitStruct);
|
||
1158 .loc 1 864 0
|
||
1159 007e 12A9 add r1, sp, #72
|
||
1160 0080 9248 ldr r0, .L177+8
|
||
863:Core/Src/main.c **** HAL_GPIO_Init(OUT_GPIO_Port, &GPIO_InitStruct);
|
||
1161 .loc 1 863 0
|
||
1162 0082 CDE91444 strd r4, r4, [sp, #80]
|
||
861:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
ARM GAS /tmp/ccmbTcom.s page 41
|
||
|
||
|
||
1163 .loc 1 861 0
|
||
1164 0086 CDE91286 strd r8, r6, [sp, #72]
|
||
1165 .loc 1 864 0
|
||
1166 008a FFF7FEFF bl HAL_GPIO_Init
|
||
1167 .LVL62:
|
||
1168 .LBE212:
|
||
1169 .LBE225:
|
||
1170 .LBB226:
|
||
1171 .LBB227:
|
||
1172 .LBB228:
|
||
823:Core/Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE();
|
||
1173 .loc 1 823 0
|
||
1174 008e AB6C ldr r3, [r5, #72]
|
||
1175 0090 43F00403 orr r3, r3, #4
|
||
1176 0094 AB64 str r3, [r5, #72]
|
||
1177 0096 AB6C ldr r3, [r5, #72]
|
||
1178 0098 03F00403 and r3, r3, #4
|
||
1179 009c 0393 str r3, [sp, #12]
|
||
1180 009e 039B ldr r3, [sp, #12]
|
||
1181 .LBE228:
|
||
1182 .LBB229:
|
||
824:Core/Src/main.c ****
|
||
1183 .loc 1 824 0
|
||
1184 00a0 AB6C ldr r3, [r5, #72]
|
||
1185 00a2 3343 orrs r3, r3, r6
|
||
1186 00a4 AB64 str r3, [r5, #72]
|
||
1187 00a6 AB6C ldr r3, [r5, #72]
|
||
1188 00a8 3340 ands r3, r3, r6
|
||
1189 .LBE229:
|
||
828:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
||
1190 .loc 1 828 0
|
||
1191 00aa 2246 mov r2, r4
|
||
1192 00ac 2146 mov r1, r4
|
||
1193 .LBB230:
|
||
824:Core/Src/main.c ****
|
||
1194 .loc 1 824 0
|
||
1195 00ae 0493 str r3, [sp, #16]
|
||
1196 .LBE230:
|
||
828:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
||
1197 .loc 1 828 0
|
||
1198 00b0 0B20 movs r0, #11
|
||
1199 .LBB231:
|
||
824:Core/Src/main.c ****
|
||
1200 .loc 1 824 0
|
||
1201 00b2 049B ldr r3, [sp, #16]
|
||
1202 .LBE231:
|
||
828:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
||
1203 .loc 1 828 0
|
||
1204 00b4 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
1205 .LVL63:
|
||
829:Core/Src/main.c **** /* DMA1_Channel2_IRQn interrupt configuration */
|
||
1206 .loc 1 829 0
|
||
1207 00b8 0B20 movs r0, #11
|
||
1208 00ba FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
1209 .LVL64:
|
||
831:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
|
||
1210 .loc 1 831 0
|
||
ARM GAS /tmp/ccmbTcom.s page 42
|
||
|
||
|
||
1211 00be 2246 mov r2, r4
|
||
1212 00c0 2146 mov r1, r4
|
||
1213 00c2 0C20 movs r0, #12
|
||
1214 00c4 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
1215 .LVL65:
|
||
832:Core/Src/main.c **** /* DMA1_Channel4_IRQn interrupt configuration */
|
||
1216 .loc 1 832 0
|
||
1217 00c8 0C20 movs r0, #12
|
||
1218 00ca FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
1219 .LVL66:
|
||
834:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
|
||
1220 .loc 1 834 0
|
||
1221 00ce 2246 mov r2, r4
|
||
1222 00d0 2146 mov r1, r4
|
||
1223 00d2 0E20 movs r0, #14
|
||
1224 00d4 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
1225 .LVL67:
|
||
835:Core/Src/main.c **** /* DMA1_Channel5_IRQn interrupt configuration */
|
||
1226 .loc 1 835 0
|
||
1227 00d8 0E20 movs r0, #14
|
||
1228 00da FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
1229 .LVL68:
|
||
837:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
|
||
1230 .loc 1 837 0
|
||
1231 00de 2246 mov r2, r4
|
||
1232 00e0 2146 mov r1, r4
|
||
1233 00e2 0F20 movs r0, #15
|
||
1234 00e4 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
1235 .LVL69:
|
||
838:Core/Src/main.c ****
|
||
1236 .loc 1 838 0
|
||
1237 00e8 0F20 movs r0, #15
|
||
1238 00ea FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
1239 .LVL70:
|
||
1240 .LBE227:
|
||
1241 .LBE226:
|
||
1242 .LBB232:
|
||
1243 .LBB224:
|
||
570:Core/Src/main.c ****
|
||
1244 .loc 1 570 0
|
||
1245 00ee 2146 mov r1, r4
|
||
1246 00f0 12A8 add r0, sp, #72
|
||
1247 00f2 3022 movs r2, #48
|
||
1248 00f4 FFF7FEFF bl memset
|
||
1249 .LVL71:
|
||
577:Core/Src/main.c **** if (HAL_DAC_Init(&hdac1) != HAL_OK)
|
||
1250 .loc 1 577 0
|
||
1251 00f8 754B ldr r3, .L177+12
|
||
1252 00fa 3B60 str r3, [r7]
|
||
578:Core/Src/main.c **** {
|
||
1253 .loc 1 578 0
|
||
1254 00fc 3846 mov r0, r7
|
||
1255 00fe FFF7FEFF bl HAL_DAC_Init
|
||
1256 .LVL72:
|
||
1257 0102 08B1 cbz r0, .L83
|
||
1258 .LBB215:
|
||
1259 .LBB216:
|
||
ARM GAS /tmp/ccmbTcom.s page 43
|
||
|
||
|
||
1260 .LBB217:
|
||
1261 .loc 2 209 0
|
||
1262 .syntax unified
|
||
1263 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1264 0104 72B6 cpsid i
|
||
1265 @ 0 "" 2
|
||
1266 .thumb
|
||
1267 .syntax unified
|
||
1268 .L84:
|
||
1269 0106 FEE7 b .L84
|
||
1270 .L83:
|
||
1271 .LBE217:
|
||
1272 .LBE216:
|
||
1273 .LBE215:
|
||
587:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
||
1274 .loc 1 587 0
|
||
1275 0108 0024 movs r4, #0
|
||
1276 010a 1E25 movs r5, #30
|
||
1277 010c CDE91445 strd r4, [sp, #80]
|
||
1278 0110 0024 movs r4, #0
|
||
1279 0112 0025 movs r5, #0
|
||
584:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
|
||
1280 .loc 1 584 0
|
||
1281 0114 0223 movs r3, #2
|
||
587:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
||
1282 .loc 1 587 0
|
||
1283 0116 CDE91645 strd r4, [sp, #88]
|
||
593:Core/Src/main.c **** {
|
||
1284 .loc 1 593 0
|
||
1285 011a 0246 mov r2, r0
|
||
585:Core/Src/main.c **** sConfig.DAC_SignedFormat = ENABLE;
|
||
1286 .loc 1 585 0
|
||
1287 011c 8DF84C00 strb r0, [sp, #76]
|
||
593:Core/Src/main.c **** {
|
||
1288 .loc 1 593 0
|
||
1289 0120 12A9 add r1, sp, #72
|
||
587:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
||
1290 .loc 1 587 0
|
||
1291 0122 0124 movs r4, #1
|
||
1292 0124 0025 movs r5, #0
|
||
593:Core/Src/main.c **** {
|
||
1293 .loc 1 593 0
|
||
1294 0126 3846 mov r0, r7
|
||
584:Core/Src/main.c **** sConfig.DAC_DMADoubleDataMode = DISABLE;
|
||
1295 .loc 1 584 0
|
||
1296 0128 1293 str r3, [sp, #72]
|
||
586:Core/Src/main.c **** sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
|
||
1297 .loc 1 586 0
|
||
1298 012a 8DF84D60 strb r6, [sp, #77]
|
||
587:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
||
1299 .loc 1 587 0
|
||
1300 012e CDE91845 strd r4, [sp, #96]
|
||
593:Core/Src/main.c **** {
|
||
1301 .loc 1 593 0
|
||
1302 0132 FFF7FEFF bl HAL_DAC_ConfigChannel
|
||
1303 .LVL73:
|
||
1304 0136 0346 mov r3, r0
|
||
ARM GAS /tmp/ccmbTcom.s page 44
|
||
|
||
|
||
1305 0138 08B1 cbz r0, .L85
|
||
1306 .LBB218:
|
||
1307 .LBB219:
|
||
1308 .LBB220:
|
||
1309 .loc 2 209 0
|
||
1310 .syntax unified
|
||
1311 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1312 013a 72B6 cpsid i
|
||
1313 @ 0 "" 2
|
||
1314 .thumb
|
||
1315 .syntax unified
|
||
1316 .L86:
|
||
1317 013c FEE7 b .L86
|
||
1318 .L85:
|
||
1319 .LBE220:
|
||
1320 .LBE219:
|
||
1321 .LBE218:
|
||
601:Core/Src/main.c **** {
|
||
1322 .loc 1 601 0
|
||
1323 013e 3846 mov r0, r7
|
||
1324 0140 1022 movs r2, #16
|
||
1325 0142 12A9 add r1, sp, #72
|
||
599:Core/Src/main.c **** sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
|
||
1326 .loc 1 599 0
|
||
1327 0144 8DF84D30 strb r3, [sp, #77]
|
||
600:Core/Src/main.c **** if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
|
||
1328 .loc 1 600 0
|
||
1329 0148 1593 str r3, [sp, #84]
|
||
601:Core/Src/main.c **** {
|
||
1330 .loc 1 601 0
|
||
1331 014a FFF7FEFF bl HAL_DAC_ConfigChannel
|
||
1332 .LVL74:
|
||
1333 014e 0546 mov r5, r0
|
||
1334 0150 08B1 cbz r0, .L87
|
||
1335 .LBB221:
|
||
1336 .LBB222:
|
||
1337 .LBB223:
|
||
1338 .loc 2 209 0
|
||
1339 .syntax unified
|
||
1340 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1341 0152 72B6 cpsid i
|
||
1342 @ 0 "" 2
|
||
1343 .thumb
|
||
1344 .syntax unified
|
||
1345 .L88:
|
||
1346 0154 FEE7 b .L88
|
||
1347 .L87:
|
||
1348 .LBE223:
|
||
1349 .LBE222:
|
||
1350 .LBE221:
|
||
1351 .LBE224:
|
||
1352 .LBE232:
|
||
1353 .LBB233:
|
||
1354 .LBB234:
|
||
463:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
|
||
1355 .loc 1 463 0
|
||
1356 0156 5F4C ldr r4, .L177+16
|
||
ARM GAS /tmp/ccmbTcom.s page 45
|
||
|
||
|
||
454:Core/Src/main.c **** ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
|
||
1357 .loc 1 454 0
|
||
1358 0158 0890 str r0, [sp, #32]
|
||
456:Core/Src/main.c ****
|
||
1359 .loc 1 456 0
|
||
1360 015a 0146 mov r1, r0
|
||
1361 015c 4246 mov r2, r8
|
||
1362 015e 12A8 add r0, sp, #72
|
||
455:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
|
||
1363 .loc 1 455 0
|
||
1364 0160 0B95 str r5, [sp, #44]
|
||
454:Core/Src/main.c **** ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
|
||
1365 .loc 1 454 0
|
||
1366 0162 CDE90955 strd r5, r5, [sp, #36]
|
||
455:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
|
||
1367 .loc 1 455 0
|
||
1368 0166 CDE90C55 strd r5, r5, [sp, #48]
|
||
1369 016a CDE90E55 strd r5, r5, [sp, #56]
|
||
1370 016e CDE91055 strd r5, r5, [sp, #64]
|
||
469:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
|
||
1371 .loc 1 469 0
|
||
1372 0172 0427 movs r7, #4
|
||
456:Core/Src/main.c ****
|
||
1373 .loc 1 456 0
|
||
1374 0174 FFF7FEFF bl memset
|
||
1375 .LVL75:
|
||
464:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
|
||
1376 .loc 1 464 0
|
||
1377 0178 4FF44033 mov r3, #196608
|
||
463:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
|
||
1378 .loc 1 463 0
|
||
1379 017c 4FF0A042 mov r2, #1342177280
|
||
483:Core/Src/main.c **** {
|
||
1380 .loc 1 483 0
|
||
1381 0180 2046 mov r0, r4
|
||
464:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
|
||
1382 .loc 1 464 0
|
||
1383 0182 C4E90023 strd r2, r3, [r4]
|
||
466:Core/Src/main.c **** hadc1.Init.GainCompensation = 0;
|
||
1384 .loc 1 466 0
|
||
1385 0186 C4E90255 strd r5, r5, [r4, #8]
|
||
468:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
||
1386 .loc 1 468 0
|
||
1387 018a C4E90455 strd r5, r5, [r4, #16]
|
||
470:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = ENABLE;
|
||
1388 .loc 1 470 0
|
||
1389 018e 2577 strb r5, [r4, #28]
|
||
471:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
|
||
1390 .loc 1 471 0
|
||
1391 0190 6677 strb r6, [r4, #29]
|
||
472:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
|
||
1392 .loc 1 472 0
|
||
1393 0192 2662 str r6, [r4, #32]
|
||
473:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||
1394 .loc 1 473 0
|
||
1395 0194 84F82450 strb r5, [r4, #36]
|
||
475:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE;
|
||
ARM GAS /tmp/ccmbTcom.s page 46
|
||
|
||
|
||
1396 .loc 1 475 0
|
||
1397 0198 C4E90B55 strd r5, r5, [r4, #44]
|
||
476:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
|
||
1398 .loc 1 476 0
|
||
1399 019c 84F83860 strb r6, [r4, #56]
|
||
477:Core/Src/main.c **** hadc1.Init.OversamplingMode = ENABLE;
|
||
1400 .loc 1 477 0
|
||
1401 01a0 E563 str r5, [r4, #60]
|
||
478:Core/Src/main.c **** hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_2;
|
||
1402 .loc 1 478 0
|
||
1403 01a2 84F84060 strb r6, [r4, #64]
|
||
480:Core/Src/main.c **** hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
|
||
1404 .loc 1 480 0
|
||
1405 01a6 C4E91155 strd r5, r5, [r4, #68]
|
||
481:Core/Src/main.c **** hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
|
||
1406 .loc 1 481 0
|
||
1407 01aa E564 str r5, [r4, #76]
|
||
482:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
||
1408 .loc 1 482 0
|
||
1409 01ac 2665 str r6, [r4, #80]
|
||
469:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
|
||
1410 .loc 1 469 0
|
||
1411 01ae A761 str r7, [r4, #24]
|
||
483:Core/Src/main.c **** {
|
||
1412 .loc 1 483 0
|
||
1413 01b0 FFF7FEFF bl HAL_ADC_Init
|
||
1414 .LVL76:
|
||
1415 01b4 0346 mov r3, r0
|
||
1416 01b6 08B1 cbz r0, .L89
|
||
1417 .LBB235:
|
||
1418 .LBB236:
|
||
1419 .LBB237:
|
||
1420 .loc 2 209 0
|
||
1421 .syntax unified
|
||
1422 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1423 01b8 72B6 cpsid i
|
||
1424 @ 0 "" 2
|
||
1425 .thumb
|
||
1426 .syntax unified
|
||
1427 .L90:
|
||
1428 01ba FEE7 b .L90
|
||
1429 .L89:
|
||
1430 .LBE237:
|
||
1431 .LBE236:
|
||
1432 .LBE235:
|
||
490:Core/Src/main.c **** {
|
||
1433 .loc 1 490 0
|
||
1434 01bc 08A9 add r1, sp, #32
|
||
1435 01be 2046 mov r0, r4
|
||
489:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
|
||
1436 .loc 1 489 0
|
||
1437 01c0 0893 str r3, [sp, #32]
|
||
490:Core/Src/main.c **** {
|
||
1438 .loc 1 490 0
|
||
1439 01c2 FFF7FEFF bl HAL_ADCEx_MultiModeConfigChannel
|
||
1440 .LVL77:
|
||
1441 01c6 08B1 cbz r0, .L91
|
||
ARM GAS /tmp/ccmbTcom.s page 47
|
||
|
||
|
||
1442 .LBB238:
|
||
1443 .LBB239:
|
||
1444 .LBB240:
|
||
1445 .loc 2 209 0
|
||
1446 .syntax unified
|
||
1447 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1448 01c8 72B6 cpsid i
|
||
1449 @ 0 "" 2
|
||
1450 .thumb
|
||
1451 .syntax unified
|
||
1452 .L92:
|
||
1453 01ca FEE7 b .L92
|
||
1454 .L91:
|
||
1455 .LBE240:
|
||
1456 .LBE239:
|
||
1457 .LBE238:
|
||
496:Core/Src/main.c **** AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
|
||
1458 .loc 1 496 0
|
||
1459 01cc 424B ldr r3, .L177+20
|
||
1460 01ce 0B93 str r3, [sp, #44]
|
||
500:Core/Src/main.c **** AnalogWDGConfig.LowThreshold = 5;
|
||
1461 .loc 1 500 0
|
||
1462 01d0 40F6F971 movw r1, #4089
|
||
497:Core/Src/main.c **** AnalogWDGConfig.Channel = ADC_CHANNEL_VOPAMP1;
|
||
1463 .loc 1 497 0
|
||
1464 01d4 4FF44003 mov r3, #12582912
|
||
501:Core/Src/main.c **** AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_2SAMPLES;
|
||
1465 .loc 1 501 0
|
||
1466 01d8 0522 movs r2, #5
|
||
497:Core/Src/main.c **** AnalogWDGConfig.Channel = ADC_CHANNEL_VOPAMP1;
|
||
1467 .loc 1 497 0
|
||
1468 01da 0C93 str r3, [sp, #48]
|
||
500:Core/Src/main.c **** AnalogWDGConfig.LowThreshold = 5;
|
||
1469 .loc 1 500 0
|
||
1470 01dc 0F91 str r1, [sp, #60]
|
||
502:Core/Src/main.c **** if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
|
||
1471 .loc 1 502 0
|
||
1472 01de 4FF48053 mov r3, #4096
|
||
498:Core/Src/main.c **** // AnalogWDGConfig.ITMode = ENABLE;
|
||
1473 .loc 1 498 0
|
||
1474 01e2 3E4D ldr r5, .L177+24
|
||
502:Core/Src/main.c **** if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
|
||
1475 .loc 1 502 0
|
||
1476 01e4 1193 str r3, [sp, #68]
|
||
503:Core/Src/main.c **** {
|
||
1477 .loc 1 503 0
|
||
1478 01e6 0BA9 add r1, sp, #44
|
||
1479 01e8 2046 mov r0, r4
|
||
498:Core/Src/main.c **** // AnalogWDGConfig.ITMode = ENABLE;
|
||
1480 .loc 1 498 0
|
||
1481 01ea 0D95 str r5, [sp, #52]
|
||
501:Core/Src/main.c **** AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_2SAMPLES;
|
||
1482 .loc 1 501 0
|
||
1483 01ec 1092 str r2, [sp, #64]
|
||
503:Core/Src/main.c **** {
|
||
1484 .loc 1 503 0
|
||
1485 01ee FFF7FEFF bl HAL_ADC_AnalogWDGConfig
|
||
ARM GAS /tmp/ccmbTcom.s page 48
|
||
|
||
|
||
1486 .LVL78:
|
||
1487 01f2 0346 mov r3, r0
|
||
1488 01f4 08B1 cbz r0, .L93
|
||
1489 .LBB241:
|
||
1490 .LBB242:
|
||
1491 .LBB243:
|
||
1492 .loc 2 209 0
|
||
1493 .syntax unified
|
||
1494 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1495 01f6 72B6 cpsid i
|
||
1496 @ 0 "" 2
|
||
1497 .thumb
|
||
1498 .syntax unified
|
||
1499 .L94:
|
||
1500 01f8 FEE7 b .L94
|
||
1501 .L93:
|
||
1502 .LBE243:
|
||
1503 .LBE242:
|
||
1504 .LBE241:
|
||
515:Core/Src/main.c **** {
|
||
1505 .loc 1 515 0
|
||
1506 01fa 2046 mov r0, r4
|
||
512:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
|
||
1507 .loc 1 512 0
|
||
1508 01fc 7F22 movs r2, #127
|
||
510:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
|
||
1509 .loc 1 510 0
|
||
1510 01fe 0624 movs r4, #6
|
||
515:Core/Src/main.c **** {
|
||
1511 .loc 1 515 0
|
||
1512 0200 12A9 add r1, sp, #72
|
||
509:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
|
||
1513 .loc 1 509 0
|
||
1514 0202 1295 str r5, [sp, #72]
|
||
511:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
|
||
1515 .loc 1 511 0
|
||
1516 0204 1497 str r7, [sp, #80]
|
||
513:Core/Src/main.c **** sConfig.Offset = 0;
|
||
1517 .loc 1 513 0
|
||
1518 0206 1697 str r7, [sp, #88]
|
||
514:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||
1519 .loc 1 514 0
|
||
1520 0208 1793 str r3, [sp, #92]
|
||
510:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
|
||
1521 .loc 1 510 0
|
||
1522 020a 1394 str r4, [sp, #76]
|
||
512:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
|
||
1523 .loc 1 512 0
|
||
1524 020c 1592 str r2, [sp, #84]
|
||
515:Core/Src/main.c **** {
|
||
1525 .loc 1 515 0
|
||
1526 020e FFF7FEFF bl HAL_ADC_ConfigChannel
|
||
1527 .LVL79:
|
||
1528 0212 08B1 cbz r0, .L95
|
||
1529 .LBB244:
|
||
1530 .LBB245:
|
||
1531 .LBB246:
|
||
ARM GAS /tmp/ccmbTcom.s page 49
|
||
|
||
|
||
1532 .loc 2 209 0
|
||
1533 .syntax unified
|
||
1534 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1535 0214 72B6 cpsid i
|
||
1536 @ 0 "" 2
|
||
1537 .thumb
|
||
1538 .syntax unified
|
||
1539 .L96:
|
||
1540 0216 FEE7 b .L96
|
||
1541 .L95:
|
||
1542 .LBE246:
|
||
1543 .LBE245:
|
||
1544 .LBE244:
|
||
1545 .LBE234:
|
||
1546 .LBE233:
|
||
1547 .LBB247:
|
||
1548 .LBB248:
|
||
700:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
|
||
1549 .loc 1 700 0
|
||
1550 0218 314C ldr r4, .L177+28
|
||
1551 021a 3249 ldr r1, .L177+32
|
||
695:Core/Src/main.c ****
|
||
1552 .loc 1 695 0
|
||
1553 021c 1290 str r0, [sp, #72]
|
||
703:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
1554 .loc 1 703 0
|
||
1555 021e 40F2E733 movw r3, #999
|
||
701:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||
1556 .loc 1 701 0
|
||
1557 0222 40F28F62 movw r2, #1679
|
||
695:Core/Src/main.c ****
|
||
1558 .loc 1 695 0
|
||
1559 0226 CDE91300 strd r0, r0, [sp, #76]
|
||
702:Core/Src/main.c **** htim7.Init.Period = 999;
|
||
1560 .loc 1 702 0
|
||
1561 022a A060 str r0, [r4, #8]
|
||
704:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
|
||
1562 .loc 1 704 0
|
||
1563 022c A061 str r0, [r4, #24]
|
||
705:Core/Src/main.c **** {
|
||
1564 .loc 1 705 0
|
||
1565 022e 2046 mov r0, r4
|
||
703:Core/Src/main.c **** htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
1566 .loc 1 703 0
|
||
1567 0230 E360 str r3, [r4, #12]
|
||
700:Core/Src/main.c **** htim7.Init.Prescaler = 1679;
|
||
1568 .loc 1 700 0
|
||
1569 0232 2160 str r1, [r4]
|
||
701:Core/Src/main.c **** htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||
1570 .loc 1 701 0
|
||
1571 0234 6260 str r2, [r4, #4]
|
||
705:Core/Src/main.c **** {
|
||
1572 .loc 1 705 0
|
||
1573 0236 FFF7FEFF bl HAL_TIM_Base_Init
|
||
1574 .LVL80:
|
||
1575 023a 0346 mov r3, r0
|
||
1576 023c 08B1 cbz r0, .L97
|
||
ARM GAS /tmp/ccmbTcom.s page 50
|
||
|
||
|
||
1577 .LBB249:
|
||
1578 .LBB250:
|
||
1579 .LBB251:
|
||
1580 .loc 2 209 0
|
||
1581 .syntax unified
|
||
1582 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1583 023e 72B6 cpsid i
|
||
1584 @ 0 "" 2
|
||
1585 .thumb
|
||
1586 .syntax unified
|
||
1587 .L98:
|
||
1588 0240 FEE7 b .L98
|
||
1589 .L97:
|
||
1590 .LBE251:
|
||
1591 .LBE250:
|
||
1592 .LBE249:
|
||
711:Core/Src/main.c **** {
|
||
1593 .loc 1 711 0
|
||
1594 0242 2046 mov r0, r4
|
||
1595 0244 12A9 add r1, sp, #72
|
||
709:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
1596 .loc 1 709 0
|
||
1597 0246 1293 str r3, [sp, #72]
|
||
710:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
|
||
1598 .loc 1 710 0
|
||
1599 0248 1493 str r3, [sp, #80]
|
||
711:Core/Src/main.c **** {
|
||
1600 .loc 1 711 0
|
||
1601 024a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
|
||
1602 .LVL81:
|
||
1603 024e 08B1 cbz r0, .L99
|
||
1604 .LBB252:
|
||
1605 .LBB253:
|
||
1606 .LBB254:
|
||
1607 .loc 2 209 0
|
||
1608 .syntax unified
|
||
1609 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1610 0250 72B6 cpsid i
|
||
1611 @ 0 "" 2
|
||
1612 .thumb
|
||
1613 .syntax unified
|
||
1614 .L100:
|
||
1615 0252 FEE7 b .L100
|
||
1616 .L99:
|
||
1617 .LBE254:
|
||
1618 .LBE253:
|
||
1619 .LBE252:
|
||
1620 .LBE248:
|
||
1621 .LBE247:
|
||
1622 .LBB255:
|
||
1623 .LBB256:
|
||
662:Core/Src/main.c **** htim6.Init.Prescaler = 0;
|
||
1624 .loc 1 662 0
|
||
1625 0254 244B ldr r3, .L177+36
|
||
1626 0256 2549 ldr r1, .L177+40
|
||
657:Core/Src/main.c ****
|
||
1627 .loc 1 657 0
|
||
ARM GAS /tmp/ccmbTcom.s page 51
|
||
|
||
|
||
1628 0258 1490 str r0, [sp, #80]
|
||
1629 025a CDE91200 strd r0, r0, [sp, #72]
|
||
664:Core/Src/main.c **** htim6.Init.Period = 7679;
|
||
1630 .loc 1 664 0
|
||
1631 025e C3E90100 strd r0, r0, [r3, #4]
|
||
666:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
|
||
1632 .loc 1 666 0
|
||
1633 0262 9861 str r0, [r3, #24]
|
||
665:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
1634 .loc 1 665 0
|
||
1635 0264 41F6FF52 movw r2, #7679
|
||
667:Core/Src/main.c **** {
|
||
1636 .loc 1 667 0
|
||
1637 0268 1846 mov r0, r3
|
||
662:Core/Src/main.c **** htim6.Init.Prescaler = 0;
|
||
1638 .loc 1 662 0
|
||
1639 026a 1960 str r1, [r3]
|
||
665:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
1640 .loc 1 665 0
|
||
1641 026c DA60 str r2, [r3, #12]
|
||
667:Core/Src/main.c **** {
|
||
1642 .loc 1 667 0
|
||
1643 026e FFF7FEFF bl HAL_TIM_Base_Init
|
||
1644 .LVL82:
|
||
1645 0272 08B1 cbz r0, .L101
|
||
1646 .LBB257:
|
||
1647 .LBB258:
|
||
1648 .LBB259:
|
||
1649 .loc 2 209 0
|
||
1650 .syntax unified
|
||
1651 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1652 0274 72B6 cpsid i
|
||
1653 @ 0 "" 2
|
||
1654 .thumb
|
||
1655 .syntax unified
|
||
1656 .L102:
|
||
1657 0276 FEE7 b .L102
|
||
1658 .L101:
|
||
1659 .LBE259:
|
||
1660 .LBE258:
|
||
1661 .LBE257:
|
||
672:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
|
||
1662 .loc 1 672 0
|
||
1663 0278 0023 movs r3, #0
|
||
671:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
1664 .loc 1 671 0
|
||
1665 027a 4FF02008 mov r8, #32
|
||
673:Core/Src/main.c **** {
|
||
1666 .loc 1 673 0
|
||
1667 027e 12A9 add r1, sp, #72
|
||
1668 0280 1948 ldr r0, .L177+36
|
||
672:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
|
||
1669 .loc 1 672 0
|
||
1670 0282 1493 str r3, [sp, #80]
|
||
671:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
1671 .loc 1 671 0
|
||
1672 0284 CDF84880 str r8, [sp, #72]
|
||
ARM GAS /tmp/ccmbTcom.s page 52
|
||
|
||
|
||
673:Core/Src/main.c **** {
|
||
1673 .loc 1 673 0
|
||
1674 0288 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
|
||
1675 .LVL83:
|
||
1676 028c 0346 mov r3, r0
|
||
1677 028e 08B1 cbz r0, .L103
|
||
1678 .LBB260:
|
||
1679 .LBB261:
|
||
1680 .LBB262:
|
||
1681 .loc 2 209 0
|
||
1682 .syntax unified
|
||
1683 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1684 0290 72B6 cpsid i
|
||
1685 @ 0 "" 2
|
||
1686 .thumb
|
||
1687 .syntax unified
|
||
1688 .L104:
|
||
1689 0292 FEE7 b .L104
|
||
1690 .L103:
|
||
1691 .LBE262:
|
||
1692 .LBE261:
|
||
1693 .LBE260:
|
||
1694 .LBE256:
|
||
1695 .LBE255:
|
||
1696 .LBB263:
|
||
1697 .LBB264:
|
||
547:Core/Src/main.c **** if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
|
||
1698 .loc 1 547 0
|
||
1699 0294 DFF86090 ldr r9, .L177+52
|
||
1700 0298 154A ldr r2, .L177+44
|
||
535:Core/Src/main.c **** sConfig.Function = CORDIC_FUNCTION_SINE;
|
||
1701 .loc 1 535 0
|
||
1702 029a 1390 str r0, [sp, #76]
|
||
1703 029c 1493 str r3, [sp, #80]
|
||
1704 029e CDE91633 strd r3, r3, [sp, #88]
|
||
548:Core/Src/main.c **** {
|
||
1705 .loc 1 548 0
|
||
1706 02a2 4846 mov r0, r9
|
||
542:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
|
||
1707 .loc 1 542 0
|
||
1708 02a4 4FF40013 mov r3, #2097152
|
||
536:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
|
||
1709 .loc 1 536 0
|
||
1710 02a8 0126 movs r6, #1
|
||
537:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
|
||
1711 .loc 1 537 0
|
||
1712 02aa 4027 movs r7, #64
|
||
547:Core/Src/main.c **** if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
|
||
1713 .loc 1 547 0
|
||
1714 02ac C9F80020 str r2, [r9]
|
||
536:Core/Src/main.c **** sConfig.Precision = CORDIC_PRECISION_4CYCLES;
|
||
1715 .loc 1 536 0
|
||
1716 02b0 1296 str r6, [sp, #72]
|
||
537:Core/Src/main.c **** sConfig.Scale = CORDIC_SCALE_0;
|
||
1717 .loc 1 537 0
|
||
1718 02b2 1897 str r7, [sp, #96]
|
||
542:Core/Src/main.c **** /* USER CODE END CORDIC_Init 0 */
|
||
ARM GAS /tmp/ccmbTcom.s page 53
|
||
|
||
|
||
1719 .loc 1 542 0
|
||
1720 02b4 1593 str r3, [sp, #84]
|
||
548:Core/Src/main.c **** {
|
||
1721 .loc 1 548 0
|
||
1722 02b6 FFF7FEFF bl HAL_CORDIC_Init
|
||
1723 .LVL84:
|
||
1724 02ba 0546 mov r5, r0
|
||
1725 02bc F0B1 cbz r0, .L105
|
||
1726 .LBB265:
|
||
1727 .LBB266:
|
||
1728 .LBB267:
|
||
1729 .loc 2 209 0
|
||
1730 .syntax unified
|
||
1731 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1732 02be 72B6 cpsid i
|
||
1733 @ 0 "" 2
|
||
1734 .thumb
|
||
1735 .syntax unified
|
||
1736 .L106:
|
||
1737 02c0 FEE7 b .L106
|
||
1738 .L178:
|
||
1739 02c2 00BF .align 2
|
||
1740 .L177:
|
||
1741 02c4 00100240 .word 1073876992
|
||
1742 02c8 00000000 .word hdac1
|
||
1743 02cc 00040048 .word 1207960576
|
||
1744 02d0 00080050 .word 1342179328
|
||
1745 02d4 00000000 .word hadc1
|
||
1746 02d8 0000C07D .word 2109734912
|
||
1747 02dc 002090B6 .word -1232068608
|
||
1748 02e0 00000000 .word htim7
|
||
1749 02e4 00140040 .word 1073746944
|
||
1750 02e8 00000000 .word htim6
|
||
1751 02ec 00100040 .word 1073745920
|
||
1752 02f0 000C0240 .word 1073875968
|
||
1753 02f4 00000000 .word state_changed
|
||
1754 02f8 00000000 .word hcordic
|
||
1755 .L105:
|
||
1756 .LBE267:
|
||
1757 .LBE266:
|
||
1758 .LBE265:
|
||
1759 .LBE264:
|
||
1760 .LBE263:
|
||
1761 .LBB269:
|
||
1762 .LBB270:
|
||
783:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
|
||
1763 .loc 1 783 0
|
||
1764 02fc A04C ldr r4, .L179
|
||
1765 .LBE270:
|
||
1766 .LBE269:
|
||
1767 .LBB284:
|
||
1768 .LBB268:
|
||
553:Core/Src/main.c **** /* USER CODE END CORDIC_Init 2 */
|
||
1769 .loc 1 553 0
|
||
1770 02fe 12A9 add r1, sp, #72
|
||
1771 0300 4846 mov r0, r9
|
||
1772 0302 FFF7FEFF bl HAL_CORDIC_Configure
|
||
ARM GAS /tmp/ccmbTcom.s page 54
|
||
|
||
|
||
1773 .LVL85:
|
||
1774 .LBE268:
|
||
1775 .LBE284:
|
||
1776 .LBB285:
|
||
1777 .LBB283:
|
||
783:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
|
||
1778 .loc 1 783 0
|
||
1779 0306 9F49 ldr r1, .L179+4
|
||
1780 0308 2160 str r1, [r4]
|
||
784:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||
1781 .loc 1 784 0
|
||
1782 030a 4FF4E132 mov r2, #115200
|
||
788:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||
1783 .loc 1 788 0
|
||
1784 030e 0C23 movs r3, #12
|
||
794:Core/Src/main.c **** {
|
||
1785 .loc 1 794 0
|
||
1786 0310 2046 mov r0, r4
|
||
785:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
|
||
1787 .loc 1 785 0
|
||
1788 0312 A560 str r5, [r4, #8]
|
||
787:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
|
||
1789 .loc 1 787 0
|
||
1790 0314 C4E90355 strd r5, r5, [r4, #12]
|
||
790:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||
1791 .loc 1 790 0
|
||
1792 0318 C4E90655 strd r5, r5, [r4, #24]
|
||
792:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||
1793 .loc 1 792 0
|
||
1794 031c C4E90855 strd r5, r5, [r4, #32]
|
||
793:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
|
||
1795 .loc 1 793 0
|
||
1796 0320 A562 str r5, [r4, #40]
|
||
784:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||
1797 .loc 1 784 0
|
||
1798 0322 6260 str r2, [r4, #4]
|
||
788:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||
1799 .loc 1 788 0
|
||
1800 0324 6361 str r3, [r4, #20]
|
||
794:Core/Src/main.c **** {
|
||
1801 .loc 1 794 0
|
||
1802 0326 FFF7FEFF bl HAL_UART_Init
|
||
1803 .LVL86:
|
||
1804 032a 0146 mov r1, r0
|
||
1805 032c 08B1 cbz r0, .L107
|
||
1806 .LBB271:
|
||
1807 .LBB272:
|
||
1808 .LBB273:
|
||
1809 .loc 2 209 0
|
||
1810 .syntax unified
|
||
1811 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1812 032e 72B6 cpsid i
|
||
1813 @ 0 "" 2
|
||
1814 .thumb
|
||
1815 .syntax unified
|
||
1816 .L108:
|
||
1817 0330 FEE7 b .L108
|
||
ARM GAS /tmp/ccmbTcom.s page 55
|
||
|
||
|
||
1818 .L107:
|
||
1819 .LBE273:
|
||
1820 .LBE272:
|
||
1821 .LBE271:
|
||
798:Core/Src/main.c **** {
|
||
1822 .loc 1 798 0
|
||
1823 0332 2046 mov r0, r4
|
||
1824 0334 FFF7FEFF bl HAL_UARTEx_SetTxFifoThreshold
|
||
1825 .LVL87:
|
||
1826 0338 0146 mov r1, r0
|
||
1827 033a 08B1 cbz r0, .L109
|
||
1828 .LBB274:
|
||
1829 .LBB275:
|
||
1830 .LBB276:
|
||
1831 .loc 2 209 0
|
||
1832 .syntax unified
|
||
1833 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1834 033c 72B6 cpsid i
|
||
1835 @ 0 "" 2
|
||
1836 .thumb
|
||
1837 .syntax unified
|
||
1838 .L110:
|
||
1839 033e FEE7 b .L110
|
||
1840 .L109:
|
||
1841 .LBE276:
|
||
1842 .LBE275:
|
||
1843 .LBE274:
|
||
802:Core/Src/main.c **** {
|
||
1844 .loc 1 802 0
|
||
1845 0340 2046 mov r0, r4
|
||
1846 0342 FFF7FEFF bl HAL_UARTEx_SetRxFifoThreshold
|
||
1847 .LVL88:
|
||
1848 0346 08B1 cbz r0, .L111
|
||
1849 .LBB277:
|
||
1850 .LBB278:
|
||
1851 .LBB279:
|
||
1852 .loc 2 209 0
|
||
1853 .syntax unified
|
||
1854 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1855 0348 72B6 cpsid i
|
||
1856 @ 0 "" 2
|
||
1857 .thumb
|
||
1858 .syntax unified
|
||
1859 .L112:
|
||
1860 034a FEE7 b .L112
|
||
1861 .L111:
|
||
1862 .LBE279:
|
||
1863 .LBE278:
|
||
1864 .LBE277:
|
||
806:Core/Src/main.c **** {
|
||
1865 .loc 1 806 0
|
||
1866 034c 2046 mov r0, r4
|
||
1867 034e FFF7FEFF bl HAL_UARTEx_DisableFifoMode
|
||
1868 .LVL89:
|
||
1869 0352 08B1 cbz r0, .L113
|
||
1870 .LBB280:
|
||
1871 .LBB281:
|
||
ARM GAS /tmp/ccmbTcom.s page 56
|
||
|
||
|
||
1872 .LBB282:
|
||
1873 .loc 2 209 0
|
||
1874 .syntax unified
|
||
1875 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1876 0354 72B6 cpsid i
|
||
1877 @ 0 "" 2
|
||
1878 .thumb
|
||
1879 .syntax unified
|
||
1880 .L114:
|
||
1881 0356 FEE7 b .L114
|
||
1882 .L113:
|
||
1883 .LBE282:
|
||
1884 .LBE281:
|
||
1885 .LBE280:
|
||
1886 .LBE283:
|
||
1887 .LBE285:
|
||
1888 .LBB286:
|
||
1889 .LBB287:
|
||
739:Core/Src/main.c **** htim8.Init.Prescaler = 0;
|
||
1890 .loc 1 739 0
|
||
1891 0358 8B4C ldr r4, .L179+8
|
||
1892 035a 8C4A ldr r2, .L179+12
|
||
734:Core/Src/main.c ****
|
||
1893 .loc 1 734 0
|
||
1894 035c 0D90 str r0, [sp, #52]
|
||
733:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||
1895 .loc 1 733 0
|
||
1896 035e CDE91200 strd r0, r0, [sp, #72]
|
||
1897 0362 CDE91400 strd r0, r0, [sp, #80]
|
||
734:Core/Src/main.c ****
|
||
1898 .loc 1 734 0
|
||
1899 0366 CDE90B00 strd r0, r0, [sp, #44]
|
||
741:Core/Src/main.c **** htim8.Init.Period = 239;
|
||
1900 .loc 1 741 0
|
||
1901 036a C4E90100 strd r0, r0, [r4, #4]
|
||
744:Core/Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||
1902 .loc 1 744 0
|
||
1903 036e C4E90400 strd r0, r0, [r4, #16]
|
||
745:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
|
||
1904 .loc 1 745 0
|
||
1905 0372 A061 str r0, [r4, #24]
|
||
742:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||
1906 .loc 1 742 0
|
||
1907 0374 EF23 movs r3, #239
|
||
746:Core/Src/main.c **** {
|
||
1908 .loc 1 746 0
|
||
1909 0376 2046 mov r0, r4
|
||
739:Core/Src/main.c **** htim8.Init.Prescaler = 0;
|
||
1910 .loc 1 739 0
|
||
1911 0378 2260 str r2, [r4]
|
||
742:Core/Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||
1912 .loc 1 742 0
|
||
1913 037a E360 str r3, [r4, #12]
|
||
746:Core/Src/main.c **** {
|
||
1914 .loc 1 746 0
|
||
1915 037c FFF7FEFF bl HAL_TIM_Base_Init
|
||
1916 .LVL90:
|
||
ARM GAS /tmp/ccmbTcom.s page 57
|
||
|
||
|
||
1917 0380 08B1 cbz r0, .L115
|
||
1918 .LBB288:
|
||
1919 .LBB289:
|
||
1920 .LBB290:
|
||
1921 .loc 2 209 0
|
||
1922 .syntax unified
|
||
1923 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1924 0382 72B6 cpsid i
|
||
1925 @ 0 "" 2
|
||
1926 .thumb
|
||
1927 .syntax unified
|
||
1928 .L116:
|
||
1929 0384 FEE7 b .L116
|
||
1930 .L115:
|
||
1931 .LBE290:
|
||
1932 .LBE289:
|
||
1933 .LBE288:
|
||
750:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
|
||
1934 .loc 1 750 0
|
||
1935 0386 4FF48053 mov r3, #4096
|
||
751:Core/Src/main.c **** {
|
||
1936 .loc 1 751 0
|
||
1937 038a 12A9 add r1, sp, #72
|
||
1938 038c 2046 mov r0, r4
|
||
750:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
|
||
1939 .loc 1 750 0
|
||
1940 038e 1293 str r3, [sp, #72]
|
||
751:Core/Src/main.c **** {
|
||
1941 .loc 1 751 0
|
||
1942 0390 FFF7FEFF bl HAL_TIM_ConfigClockSource
|
||
1943 .LVL91:
|
||
1944 0394 0346 mov r3, r0
|
||
1945 0396 08B1 cbz r0, .L117
|
||
1946 .LBB291:
|
||
1947 .LBB292:
|
||
1948 .LBB293:
|
||
1949 .loc 2 209 0
|
||
1950 .syntax unified
|
||
1951 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1952 0398 72B6 cpsid i
|
||
1953 @ 0 "" 2
|
||
1954 .thumb
|
||
1955 .syntax unified
|
||
1956 .L118:
|
||
1957 039a FEE7 b .L118
|
||
1958 .L117:
|
||
1959 .LBE293:
|
||
1960 .LBE292:
|
||
1961 .LBE291:
|
||
758:Core/Src/main.c **** {
|
||
1962 .loc 1 758 0
|
||
1963 039c 0BA9 add r1, sp, #44
|
||
1964 039e 2046 mov r0, r4
|
||
756:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||
1965 .loc 1 756 0
|
||
1966 03a0 CDE90B83 strd r8, r3, [sp, #44]
|
||
757:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
|
||
ARM GAS /tmp/ccmbTcom.s page 58
|
||
|
||
|
||
1967 .loc 1 757 0
|
||
1968 03a4 0D93 str r3, [sp, #52]
|
||
758:Core/Src/main.c **** {
|
||
1969 .loc 1 758 0
|
||
1970 03a6 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
|
||
1971 .LVL92:
|
||
1972 03aa 08B1 cbz r0, .L119
|
||
1973 .LBB294:
|
||
1974 .LBB295:
|
||
1975 .LBB296:
|
||
1976 .loc 2 209 0
|
||
1977 .syntax unified
|
||
1978 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1979 03ac 72B6 cpsid i
|
||
1980 @ 0 "" 2
|
||
1981 .thumb
|
||
1982 .syntax unified
|
||
1983 .L120:
|
||
1984 03ae FEE7 b .L120
|
||
1985 .L119:
|
||
1986 .LBE296:
|
||
1987 .LBE295:
|
||
1988 .LBE294:
|
||
1989 .LBE287:
|
||
1990 .LBE286:
|
||
1991 .LBB297:
|
||
1992 .LBB298:
|
||
626:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
|
||
1993 .loc 1 626 0
|
||
1994 03b0 774B ldr r3, .L179+16
|
||
1995 03b2 784D ldr r5, .L179+20
|
||
629:Core/Src/main.c **** hopamp1.Init.InternalOutput = ENABLE;
|
||
1996 .loc 1 629 0
|
||
1997 03b4 1861 str r0, [r3, #16]
|
||
627:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
|
||
1998 .loc 1 627 0
|
||
1999 03b6 8024 movs r4, #128
|
||
632:Core/Src/main.c **** hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_64_OR_MINUS_63;
|
||
2000 .loc 1 632 0
|
||
2001 03b8 4FF40031 mov r1, #131072
|
||
631:Core/Src/main.c **** hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS;
|
||
2002 .loc 1 631 0
|
||
2003 03bc 9861 str r0, [r3, #24]
|
||
634:Core/Src/main.c **** if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
|
||
2004 .loc 1 634 0
|
||
2005 03be D862 str r0, [r3, #44]
|
||
633:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
|
||
2006 .loc 1 633 0
|
||
2007 03c0 4FF4A032 mov r2, #81920
|
||
635:Core/Src/main.c **** {
|
||
2008 .loc 1 635 0
|
||
2009 03c4 1846 mov r0, r3
|
||
628:Core/Src/main.c **** hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
|
||
2010 .loc 1 628 0
|
||
2011 03c6 9F60 str r7, [r3, #8]
|
||
630:Core/Src/main.c **** hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
|
||
2012 .loc 1 630 0
|
||
ARM GAS /tmp/ccmbTcom.s page 59
|
||
|
||
|
||
2013 03c8 1E75 strb r6, [r3, #20]
|
||
626:Core/Src/main.c **** hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
|
||
2014 .loc 1 626 0
|
||
2015 03ca 1D60 str r5, [r3]
|
||
627:Core/Src/main.c **** hopamp1.Init.Mode = OPAMP_PGA_MODE;
|
||
2016 .loc 1 627 0
|
||
2017 03cc 5C60 str r4, [r3, #4]
|
||
633:Core/Src/main.c **** hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
|
||
2018 .loc 1 633 0
|
||
2019 03ce C3E90912 strd r1, r2, [r3, #36]
|
||
635:Core/Src/main.c **** {
|
||
2020 .loc 1 635 0
|
||
2021 03d2 FFF7FEFF bl HAL_OPAMP_Init
|
||
2022 .LVL93:
|
||
2023 03d6 08B1 cbz r0, .L121
|
||
2024 .LBB299:
|
||
2025 .LBB300:
|
||
2026 .LBB301:
|
||
2027 .loc 2 209 0
|
||
2028 .syntax unified
|
||
2029 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
2030 03d8 72B6 cpsid i
|
||
2031 @ 0 "" 2
|
||
2032 .thumb
|
||
2033 .syntax unified
|
||
2034 .L122:
|
||
2035 03da FEE7 b .L122
|
||
2036 .L121:
|
||
2037 .LBE301:
|
||
2038 .LBE300:
|
||
2039 .LBE299:
|
||
2040 .LBE298:
|
||
2041 .LBE297:
|
||
315:Core/Src/main.c **** audio_filter_init();
|
||
2042 .loc 1 315 0
|
||
2043 03dc FFF7FEFF bl st2_filter_init
|
||
2044 .LVL94:
|
||
316:Core/Src/main.c **** // diag();
|
||
2045 .loc 1 316 0
|
||
2046 03e0 FFF7FEFF bl audio_filter_init
|
||
2047 .LVL95:
|
||
318:Core/Src/main.c **** set_gain();
|
||
2048 .loc 1 318 0
|
||
2049 03e4 6A48 ldr r0, .L179+16
|
||
2050 03e6 DFF81492 ldr r9, .L179+124
|
||
2051 03ea DFF81482 ldr r8, .L179+128
|
||
2052 03ee 6A4F ldr r7, .L179+24
|
||
2053 03f0 DFF810B2 ldr fp, .L179+132
|
||
2054 03f4 694D ldr r5, .L179+28
|
||
2055 03f6 6A4E ldr r6, .L179+32
|
||
344:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
|
||
2056 .loc 1 344 0
|
||
2057 03f8 6A4C ldr r4, .L179+36
|
||
318:Core/Src/main.c **** set_gain();
|
||
2058 .loc 1 318 0
|
||
2059 03fa FFF7FEFF bl HAL_OPAMP_Start
|
||
2060 .LVL96:
|
||
ARM GAS /tmp/ccmbTcom.s page 60
|
||
|
||
|
||
319:Core/Src/main.c **** HAL_TIM_Base_Start_IT(&htim7);
|
||
2061 .loc 1 319 0
|
||
2062 03fe FFF7FEFF bl set_gain
|
||
2063 .LVL97:
|
||
320:Core/Src/main.c **** HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
|
||
2064 .loc 1 320 0
|
||
2065 0402 6948 ldr r0, .L179+40
|
||
2066 0404 FFF7FEFF bl HAL_TIM_Base_Start_IT
|
||
2067 .LVL98:
|
||
321:Core/Src/main.c **** // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
|
||
2068 .loc 1 321 0
|
||
2069 0408 0122 movs r2, #1
|
||
2070 040a 6849 ldr r1, .L179+44
|
||
2071 040c 5C48 ldr r0, .L179
|
||
2072 040e FFF7FEFF bl HAL_UART_Receive_IT
|
||
2073 .LVL99:
|
||
324:Core/Src/main.c **** /* USER CODE END 2 */
|
||
2074 .loc 1 324 0
|
||
2075 0412 FFF7FEFF bl start_receive
|
||
2076 .LVL100:
|
||
2077 .L136:
|
||
333:Core/Src/main.c **** if(rx_adc_buffer_ready){
|
||
2078 .loc 1 333 0
|
||
2079 0416 99F80030 ldrb r3, [r9] @ zero_extendqisi2
|
||
2080 041a 002B cmp r3, #0
|
||
2081 041c 39D0 beq .L124
|
||
334:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
|
||
2082 .loc 1 334 0
|
||
2083 041e 98F80030 ldrb r3, [r8] @ zero_extendqisi2
|
||
2084 0422 ABB1 cbz r3, .L125
|
||
335:Core/Src/main.c **** rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
|
||
2085 .loc 1 335 0
|
||
2086 0424 0122 movs r2, #1
|
||
2087 0426 2021 movs r1, #32
|
||
2088 0428 6148 ldr r0, .L179+48
|
||
2089 042a FFF7FEFF bl HAL_GPIO_WritePin
|
||
2090 .LVL101:
|
||
336:Core/Src/main.c **** HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
|
||
2091 .loc 1 336 0
|
||
2092 042e 3B68 ldr r3, [r7]
|
||
2093 0430 0093 str r3, [sp]
|
||
2094 0432 604A ldr r2, .L179+52
|
||
2095 0434 604B ldr r3, .L179+56
|
||
2096 0436 6148 ldr r0, .L179+60
|
||
2097 0438 4FF48061 mov r1, #1024
|
||
2098 043c FFF7FEFF bl rx_mixer
|
||
2099 .LVL102:
|
||
337:Core/Src/main.c **** rx_adc_buffer_ready = 0;
|
||
2100 .loc 1 337 0
|
||
2101 0440 0022 movs r2, #0
|
||
2102 0442 2021 movs r1, #32
|
||
2103 0444 5A48 ldr r0, .L179+48
|
||
2104 0446 FFF7FEFF bl HAL_GPIO_WritePin
|
||
2105 .LVL103:
|
||
338:Core/Src/main.c **** }
|
||
2106 .loc 1 338 0
|
||
2107 044a 0023 movs r3, #0
|
||
ARM GAS /tmp/ccmbTcom.s page 61
|
||
|
||
|
||
2108 044c 88F80030 strb r3, [r8]
|
||
2109 .L125:
|
||
340:Core/Src/main.c **** if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
2110 .loc 1 340 0
|
||
2111 0450 5B4B ldr r3, .L179+64
|
||
2112 0452 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
2113 0454 EBB1 cbz r3, .L124
|
||
341:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
|
||
2114 .loc 1 341 0
|
||
2115 0456 5B4B ldr r3, .L179+68
|
||
2116 0458 1B68 ldr r3, [r3]
|
||
2117 045a 002B cmp r3, #0
|
||
2118 045c 00F08980 beq .L172
|
||
342:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
2119 .loc 1 342 0
|
||
2120 0460 5A1E subs r2, r3, #1
|
||
2121 0462 012A cmp r2, #1
|
||
2122 0464 40F2D080 bls .L173
|
||
343:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
|
||
2123 .loc 1 343 0
|
||
2124 0468 032B cmp r3, #3
|
||
2125 046a 05D1 bne .L128
|
||
343:Core/Src/main.c **** arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER
|
||
2126 .loc 1 343 0 is_stmt 0 discriminator 1
|
||
2127 046c 2346 mov r3, r4
|
||
2128 046e 4022 movs r2, #64
|
||
2129 0470 5149 ldr r1, .L179+56
|
||
2130 0472 5048 ldr r0, .L179+52
|
||
2131 0474 FFF7FEFF bl am_demodulator
|
||
2132 .LVL104:
|
||
2133 .L128:
|
||
344:Core/Src/main.c **** half_rx_dac_buffer_empty = 0;
|
||
2134 .loc 1 344 0 is_stmt 1
|
||
2135 0478 534B ldr r3, .L179+72
|
||
2136 047a 5449 ldr r1, .L179+76
|
||
2137 047c 1A78 ldrb r2, [r3] @ zero_extendqisi2
|
||
2138 047e 5448 ldr r0, .L179+80
|
||
2139 0480 01EB0222 add r2, r1, r2, lsl #8
|
||
2140 0484 4023 movs r3, #64
|
||
2141 0486 2146 mov r1, r4
|
||
2142 0488 FFF7FEFF bl arm_fir_q31
|
||
2143 .LVL105:
|
||
345:Core/Src/main.c **** }
|
||
2144 .loc 1 345 0
|
||
2145 048c 4C4A ldr r2, .L179+64
|
||
2146 048e 0023 movs r3, #0
|
||
2147 0490 1370 strb r3, [r2]
|
||
2148 .L124:
|
||
348:Core/Src/main.c **** if(half_tx_dac_buffer_empty){
|
||
2149 .loc 1 348 0
|
||
2150 0492 504B ldr r3, .L179+84
|
||
2151 0494 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
2152 0496 1BB3 cbz r3, .L131
|
||
349:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
|
||
2153 .loc 1 349 0
|
||
2154 0498 4F4B ldr r3, .L179+88
|
||
2155 049a 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
ARM GAS /tmp/ccmbTcom.s page 62
|
||
|
||
|
||
2156 049c 7BB1 cbz r3, .L132
|
||
2157 .LBB302:
|
||
351:Core/Src/main.c **** half_tx_dac_buffer_empty = 0;
|
||
2158 .loc 1 351 0
|
||
2159 049e 4F4B ldr r3, .L179+92
|
||
2160 04a0 444A ldr r2, .L179+52
|
||
2161 04a2 1878 ldrb r0, [r3] @ zero_extendqisi2
|
||
2162 04a4 3B68 ldr r3, [r7]
|
||
2163 04a6 0093 str r3, [sp]
|
||
2164 04a8 4D4B ldr r3, .L179+96
|
||
2165 04aa 4FF48061 mov r1, #1024
|
||
2166 04ae 03EB0030 add r0, r3, r0, lsl #12
|
||
2167 04b2 414B ldr r3, .L179+56
|
||
2168 04b4 FFF7FEFF bl tx_mixer
|
||
2169 .LVL106:
|
||
352:Core/Src/main.c **** // HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
|
||
2170 .loc 1 352 0
|
||
2171 04b8 474A ldr r2, .L179+88
|
||
2172 04ba 0023 movs r3, #0
|
||
2173 04bc 1370 strb r3, [r2]
|
||
2174 .L132:
|
||
2175 .LBE302:
|
||
355:Core/Src/main.c **** if (modulation == MOD_DC) dc_modulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
2176 .loc 1 355 0
|
||
2177 04be 494B ldr r3, .L179+100
|
||
2178 04c0 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
2179 04c2 6BB1 cbz r3, .L131
|
||
356:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
|
||
2180 .loc 1 356 0
|
||
2181 04c4 3F4B ldr r3, .L179+68
|
||
2182 04c6 1B68 ldr r3, [r3]
|
||
2183 04c8 3BB3 cbz r3, .L174
|
||
357:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
|
||
2184 .loc 1 357 0
|
||
2185 04ca 5A1E subs r2, r3, #1
|
||
2186 04cc 012A cmp r2, #1
|
||
2187 04ce 1BD9 bls .L175
|
||
358:Core/Src/main.c **** }
|
||
2188 .loc 1 358 0
|
||
2189 04d0 032B cmp r3, #3
|
||
2190 04d2 05D1 bne .L131
|
||
358:Core/Src/main.c **** }
|
||
2191 .loc 1 358 0 is_stmt 0 discriminator 1
|
||
2192 04d4 2346 mov r3, r4
|
||
2193 04d6 4022 movs r2, #64
|
||
2194 04d8 3749 ldr r1, .L179+56
|
||
2195 04da 3648 ldr r0, .L179+52
|
||
2196 04dc FFF7FEFF bl am_modulator
|
||
2197 .LVL107:
|
||
2198 .L131:
|
||
361:Core/Src/main.c **** if(receive){
|
||
2199 .loc 1 361 0 is_stmt 1
|
||
2200 04e0 414B ldr r3, .L179+104
|
||
2201 04e2 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
2202 04e4 002B cmp r3, #0
|
||
2203 04e6 96D0 beq .L136
|
||
362:Core/Src/main.c **** // TODO
|
||
ARM GAS /tmp/ccmbTcom.s page 63
|
||
|
||
|
||
2204 .loc 1 362 0
|
||
2205 04e8 99F80030 ldrb r3, [r9] @ zero_extendqisi2
|
||
2206 04ec 1BB1 cbz r3, .L138
|
||
364:Core/Src/main.c **** }
|
||
2207 .loc 1 364 0
|
||
2208 04ee 4021 movs r1, #64
|
||
2209 04f0 3048 ldr r0, .L179+52
|
||
2210 04f2 FFF7FEFF bl rx_measure_signal
|
||
2211 .LVL108:
|
||
2212 .L138:
|
||
367:Core/Src/main.c **** if(state_changed) display_update_state();
|
||
2213 .loc 1 367 0 discriminator 1
|
||
2214 04f6 3D4B ldr r3, .L179+108
|
||
2215 04f8 1A78 ldrb r2, [r3] @ zero_extendqisi2
|
||
2216 04fa 3D4B ldr r3, .L179+112
|
||
2217 04fc 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
2218 04fe 9A42 cmp r2, r3
|
||
2219 0500 11D0 beq .L176
|
||
2220 .LBB303:
|
||
367:Core/Src/main.c **** if(state_changed) display_update_state();
|
||
2221 .loc 1 367 0 is_stmt 0 discriminator 2
|
||
2222 0502 FFF7FEFF bl dequeue_cmd
|
||
2223 .LVL109:
|
||
2224 0506 F6E7 b .L138
|
||
2225 .L175:
|
||
2226 .LBE303:
|
||
357:Core/Src/main.c **** else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, pre
|
||
2227 .loc 1 357 0 is_stmt 1 discriminator 1
|
||
2228 0508 3A4B ldr r3, .L179+116
|
||
2229 050a 0093 str r3, [sp]
|
||
2230 050c 4022 movs r2, #64
|
||
2231 050e 2346 mov r3, r4
|
||
2232 0510 2949 ldr r1, .L179+56
|
||
2233 0512 2848 ldr r0, .L179+52
|
||
2234 0514 FFF7FEFF bl ssb_modulator
|
||
2235 .LVL110:
|
||
2236 0518 E2E7 b .L131
|
||
2237 .L174:
|
||
356:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I,
|
||
2238 .loc 1 356 0 discriminator 1
|
||
2239 051a 2246 mov r2, r4
|
||
2240 051c 4021 movs r1, #64
|
||
2241 051e 2548 ldr r0, .L179+52
|
||
2242 0520 FFF7FEFF bl dc_modulator
|
||
2243 .LVL111:
|
||
2244 0524 DCE7 b .L131
|
||
2245 .L176:
|
||
368:Core/Src/main.c **** if(uart_tx_buf_in_idx){
|
||
2246 .loc 1 368 0
|
||
2247 0526 BAF80030 ldrh r3, [r10]
|
||
2248 052a 0BB1 cbz r3, .L140
|
||
368:Core/Src/main.c **** if(uart_tx_buf_in_idx){
|
||
2249 .loc 1 368 0 is_stmt 0 discriminator 1
|
||
2250 052c FFF7FEFF bl display_update_state
|
||
2251 .LVL112:
|
||
2252 .L140:
|
||
369:Core/Src/main.c **** display_write(uart_tx_buf, uart_tx_buf_in_idx);
|
||
ARM GAS /tmp/ccmbTcom.s page 64
|
||
|
||
|
||
2253 .loc 1 369 0 is_stmt 1
|
||
2254 0530 BBF80020 ldrh r2, [fp]
|
||
2255 0534 32B1 cbz r2, .L141
|
||
2256 .LVL113:
|
||
2257 .LBB304:
|
||
2258 .LBB305:
|
||
190:Core/Src/main.c **** // HAL_UART_Transmit_DMA(&huart2, ptr, len);
|
||
2259 .loc 1 190 0
|
||
2260 0536 3049 ldr r1, .L179+120
|
||
2261 0538 1148 ldr r0, .L179
|
||
2262 053a FFF7FEFF bl HAL_UART_Transmit_DMA
|
||
2263 .LVL114:
|
||
2264 .LBE305:
|
||
2265 .LBE304:
|
||
371:Core/Src/main.c **** }
|
||
2266 .loc 1 371 0
|
||
2267 053e 0023 movs r3, #0
|
||
2268 0540 ABF80030 strh r3, [fp] @ movhi
|
||
2269 .L141:
|
||
373:Core/Src/main.c **** if(peakset == 0) click();
|
||
2270 .loc 1 373 0
|
||
2271 0544 3268 ldr r2, [r6]
|
||
2272 0546 2B68 ldr r3, [r5]
|
||
2273 0548 52B1 cbz r2, .L142
|
||
374:Core/Src/main.c **** peakset = 50;
|
||
2274 .loc 1 374 0
|
||
2275 054a 0BB9 cbnz r3, .L143
|
||
2276 .LBB306:
|
||
374:Core/Src/main.c **** peakset = 50;
|
||
2277 .loc 1 374 0 is_stmt 0 discriminator 1
|
||
2278 054c FFF7FEFF bl click
|
||
2279 .LVL115:
|
||
2280 .L143:
|
||
2281 .LBE306:
|
||
376:Core/Src/main.c **** }
|
||
2282 .loc 1 376 0 is_stmt 1
|
||
2283 0550 0022 movs r2, #0
|
||
379:Core/Src/main.c **** if(peakset == 0) click();
|
||
2284 .loc 1 379 0
|
||
2285 0552 3123 movs r3, #49
|
||
376:Core/Src/main.c **** }
|
||
2286 .loc 1 376 0
|
||
2287 0554 3260 str r2, [r6]
|
||
379:Core/Src/main.c **** if(peakset == 0) click();
|
||
2288 .loc 1 379 0
|
||
2289 0556 2B60 str r3, [r5]
|
||
2290 .L146:
|
||
383:Core/Src/main.c **** }
|
||
2291 .loc 1 383 0
|
||
2292 0558 234A ldr r2, .L179+104
|
||
2293 055a 0023 movs r3, #0
|
||
2294 055c 1370 strb r3, [r2]
|
||
2295 055e 5AE7 b .L136
|
||
2296 .L142:
|
||
378:Core/Src/main.c **** peakset--;
|
||
2297 .loc 1 378 0
|
||
2298 0560 002B cmp r3, #0
|
||
ARM GAS /tmp/ccmbTcom.s page 65
|
||
|
||
|
||
2299 0562 F9D0 beq .L146
|
||
379:Core/Src/main.c **** if(peakset == 0) click();
|
||
2300 .loc 1 379 0
|
||
2301 0564 013B subs r3, r3, #1
|
||
2302 0566 2B60 str r3, [r5]
|
||
380:Core/Src/main.c **** }
|
||
2303 .loc 1 380 0
|
||
2304 0568 002B cmp r3, #0
|
||
2305 056a F5D1 bne .L146
|
||
2306 .LBB307:
|
||
380:Core/Src/main.c **** }
|
||
2307 .loc 1 380 0 is_stmt 0 discriminator 1
|
||
2308 056c FFF7FEFF bl click
|
||
2309 .LVL116:
|
||
2310 0570 F2E7 b .L146
|
||
2311 .L172:
|
||
2312 .LBE307:
|
||
341:Core/Src/main.c **** else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SI
|
||
2313 .loc 1 341 0 is_stmt 1 discriminator 1
|
||
2314 0572 2246 mov r2, r4
|
||
2315 0574 4021 movs r1, #64
|
||
2316 0576 0F48 ldr r0, .L179+52
|
||
2317 0578 FFF7FEFF bl dc_demodulator
|
||
2318 .LVL117:
|
||
2319 057c 7CE7 b .L128
|
||
2320 .L180:
|
||
2321 057e 00BF .align 2
|
||
2322 .L179:
|
||
2323 0580 00000000 .word huart1
|
||
2324 0584 00380140 .word 1073821696
|
||
2325 0588 00000000 .word htim8
|
||
2326 058c 00340140 .word 1073820672
|
||
2327 0590 00000000 .word hopamp1
|
||
2328 0594 00030140 .word 1073808128
|
||
2329 0598 00000000 .word nco1_increment
|
||
2330 059c 00000000 .word peakset
|
||
2331 05a0 00000000 .word peak
|
||
2332 05a4 00000000 .word prefilter_lf_buffer
|
||
2333 05a8 00000000 .word htim7
|
||
2334 05ac 00000000 .word uart_rx_buf
|
||
2335 05b0 00040048 .word 1207960576
|
||
2336 05b4 00000000 .word if_I
|
||
2337 05b8 00000000 .word if_Q
|
||
2338 05bc 00000000 .word adc_buffer
|
||
2339 05c0 00000000 .word half_rx_dac_buffer_empty
|
||
2340 05c4 00000000 .word modulation
|
||
2341 05c8 00000000 .word lf_buffer_toggle
|
||
2342 05cc 00000000 .word lf_buffer
|
||
2343 05d0 00000000 .word audio_filter_struct
|
||
2344 05d4 00000000 .word transmit
|
||
2345 05d8 00000000 .word half_tx_dac_buffer_empty
|
||
2346 05dc 00000000 .word tx_dac_buffer_toggle
|
||
2347 05e0 00000000 .word tx_dac_buffer
|
||
2348 05e4 00000000 .word tx_adc_buffer_ready
|
||
2349 05e8 00000000 .word tick
|
||
2350 05ec 00000000 .word rx_cmd_rb_in_idx
|
||
2351 05f0 00000000 .word rx_cmd_rb_out_idx
|
||
ARM GAS /tmp/ccmbTcom.s page 66
|
||
|
||
|
||
2352 05f4 47E17A14 .word 343597383
|
||
2353 05f8 00000000 .word uart_tx_buf
|
||
2354 05fc 00000000 .word receive
|
||
2355 0600 00000000 .word rx_adc_buffer_ready
|
||
2356 0604 00000000 .word uart_tx_buf_in_idx
|
||
2357 .L173:
|
||
342:Core/Src/main.c **** else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
|
||
2358 .loc 1 342 0 discriminator 1
|
||
2359 0608 044B ldr r3, .L181
|
||
2360 060a 0093 str r3, [sp]
|
||
2361 060c 4022 movs r2, #64
|
||
2362 060e 2346 mov r3, r4
|
||
2363 0610 0349 ldr r1, .L181+4
|
||
2364 0612 0448 ldr r0, .L181+8
|
||
2365 0614 FFF7FEFF bl ssb_demodulator
|
||
2366 .LVL118:
|
||
2367 0618 2EE7 b .L128
|
||
2368 .L182:
|
||
2369 061a 00BF .align 2
|
||
2370 .L181:
|
||
2371 061c 47E17A14 .word 343597383
|
||
2372 0620 00000000 .word if_Q
|
||
2373 0624 00000000 .word if_I
|
||
2374 .cfi_endproc
|
||
2375 .LFE392:
|
||
2377 .section .text.Error_Handler,"ax",%progbits
|
||
2378 .align 1
|
||
2379 .p2align 2,,3
|
||
2380 .global Error_Handler
|
||
2381 .syntax unified
|
||
2382 .thumb
|
||
2383 .thumb_func
|
||
2384 .fpu fpv4-sp-d16
|
||
2386 Error_Handler:
|
||
2387 .LFB404:
|
||
865:Core/Src/main.c ****
|
||
866:Core/Src/main.c **** }
|
||
867:Core/Src/main.c ****
|
||
868:Core/Src/main.c **** /* USER CODE BEGIN 4 */
|
||
869:Core/Src/main.c ****
|
||
870:Core/Src/main.c **** /* USER CODE END 4 */
|
||
871:Core/Src/main.c ****
|
||
872:Core/Src/main.c **** /**
|
||
873:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
|
||
874:Core/Src/main.c **** * @retval None
|
||
875:Core/Src/main.c **** */
|
||
876:Core/Src/main.c **** void Error_Handler(void)
|
||
877:Core/Src/main.c **** {
|
||
2388 .loc 1 877 0
|
||
2389 .cfi_startproc
|
||
2390 @ Volatile: function does not return.
|
||
2391 @ args = 0, pretend = 0, frame = 0
|
||
2392 @ frame_needed = 0, uses_anonymous_args = 0
|
||
2393 @ link register save eliminated.
|
||
2394 .LBB308:
|
||
2395 .LBB309:
|
||
2396 .loc 2 209 0
|
||
ARM GAS /tmp/ccmbTcom.s page 67
|
||
|
||
|
||
2397 .syntax unified
|
||
2398 @ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
2399 0000 72B6 cpsid i
|
||
2400 @ 0 "" 2
|
||
2401 .thumb
|
||
2402 .syntax unified
|
||
2403 .L184:
|
||
2404 0002 FEE7 b .L184
|
||
2405 .LBE309:
|
||
2406 .LBE308:
|
||
2407 .cfi_endproc
|
||
2408 .LFE404:
|
||
2410 .comm half_rx_dac_buffer_empty,1,1
|
||
2411 .comm rx_adc_buffer_ready,1,1
|
||
2412 .comm tick,1,1
|
||
2413 .comm hdma_usart1_tx,96,4
|
||
2414 .comm huart1,144,4
|
||
2415 .comm htim8,76,4
|
||
2416 .comm htim7,76,4
|
||
2417 .comm htim6,76,4
|
||
2418 .comm hopamp1,60,4
|
||
2419 .comm hdma_dac1_ch2,96,4
|
||
2420 .comm hdma_dac1_ch1,96,4
|
||
2421 .comm hdac1,20,4
|
||
2422 .comm hcordic,40,4
|
||
2423 .comm hdma_adc1,96,4
|
||
2424 .comm hadc1,108,4
|
||
2425 .text
|
||
2426 .Letext0:
|
||
2427 .file 3 "/usr/include/newlib/machine/_default_types.h"
|
||
2428 .file 4 "/usr/include/newlib/sys/_stdint.h"
|
||
2429 .file 5 "Drivers/CMSIS/Include/core_cm4.h"
|
||
2430 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
|
||
2431 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
|
||
2432 .file 8 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
|
||
2433 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
|
||
2434 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h"
|
||
2435 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h"
|
||
2436 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
|
||
2437 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
|
||
2438 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
|
||
2439 .file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h"
|
||
2440 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h"
|
||
2441 .file 17 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h"
|
||
2442 .file 18 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
|
||
2443 .file 19 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h"
|
||
2444 .file 20 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
|
||
2445 .file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
|
||
2446 .file 22 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
|
||
2447 .file 23 "/usr/include/newlib/sys/lock.h"
|
||
2448 .file 24 "/usr/include/newlib/sys/_types.h"
|
||
2449 .file 25 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
|
||
2450 .file 26 "/usr/include/newlib/sys/reent.h"
|
||
2451 .file 27 "/usr/include/newlib/math.h"
|
||
2452 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
|
||
2453 .file 29 "Core/Inc/rx.h"
|
||
2454 .file 30 "Core/Inc/tx.h"
|
||
ARM GAS /tmp/ccmbTcom.s page 68
|
||
|
||
|
||
2455 .file 31 "Core/Inc/bassofono.h"
|
||
2456 .file 32 "Core/Inc/interface.h"
|
||
2457 .file 33 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
|
||
2458 .file 34 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
|
||
2459 .file 35 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h"
|
||
2460 .file 36 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h"
|
||
2461 .file 37 "<built-in>"
|
||
ARM GAS /tmp/ccmbTcom.s page 69
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:0000000000000000 main.c
|
||
/tmp/ccmbTcom.s:16 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:24 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback
|
||
/tmp/ccmbTcom.s:47 .text.HAL_ADC_ConvCpltCallback:0000000000000010 $d
|
||
*COM*:0000000000000001 rx_adc_buffer_ready
|
||
/tmp/ccmbTcom.s:52 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:60 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback
|
||
/tmp/ccmbTcom.s:82 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000010 $d
|
||
/tmp/ccmbTcom.s:87 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:95 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 HAL_DAC_ConvHalfCpltCallbackCh1
|
||
/tmp/ccmbTcom.s:121 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000010 $d
|
||
*COM*:0000000000000001 half_rx_dac_buffer_empty
|
||
/tmp/ccmbTcom.s:127 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:135 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 HAL_DAC_ConvCpltCallbackCh1
|
||
/tmp/ccmbTcom.s:157 .text.HAL_DAC_ConvCpltCallbackCh1:000000000000000c $d
|
||
/tmp/ccmbTcom.s:163 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:171 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvHalfCpltCallbackCh2
|
||
/tmp/ccmbTcom.s:206 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000018 $d
|
||
/tmp/ccmbTcom.s:213 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:221 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvCpltCallbackCh2
|
||
/tmp/ccmbTcom.s:253 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000018 $d
|
||
/tmp/ccmbTcom.s:260 .text.HAL_TIM_PeriodElapsedCallback:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:268 .text.HAL_TIM_PeriodElapsedCallback:0000000000000000 HAL_TIM_PeriodElapsedCallback
|
||
/tmp/ccmbTcom.s:291 .text.HAL_TIM_PeriodElapsedCallback:0000000000000010 $d
|
||
*COM*:0000000000000001 tick
|
||
/tmp/ccmbTcom.s:297 .text.HAL_UART_RxCpltCallback:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:305 .text.HAL_UART_RxCpltCallback:0000000000000000 HAL_UART_RxCpltCallback
|
||
/tmp/ccmbTcom.s:355 .text.HAL_UART_RxCpltCallback:0000000000000024 $d
|
||
*COM*:0000000000000090 huart1
|
||
/tmp/ccmbTcom.s:362 .text.__io_putchar:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:370 .text.__io_putchar:0000000000000000 __io_putchar
|
||
/tmp/ccmbTcom.s:409 .text.__io_putchar:000000000000001c $d
|
||
/tmp/ccmbTcom.s:414 .text._write:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:422 .text._write:0000000000000000 _write
|
||
/tmp/ccmbTcom.s:451 .text._write:0000000000000010 $d
|
||
/tmp/ccmbTcom.s:456 .text.display_write:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:464 .text.display_write:0000000000000000 display_write
|
||
/tmp/ccmbTcom.s:494 .text.display_write:0000000000000014 $d
|
||
/tmp/ccmbTcom.s:499 .text.start_transmit:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:507 .text.start_transmit:0000000000000000 start_transmit
|
||
/tmp/ccmbTcom.s:557 .text.start_transmit:0000000000000030 $d
|
||
*COM*:0000000000000014 hdac1
|
||
*COM*:000000000000004c htim8
|
||
/tmp/ccmbTcom.s:565 .text.stop_transmit:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:573 .text.stop_transmit:0000000000000000 stop_transmit
|
||
/tmp/ccmbTcom.s:616 .text.stop_transmit:0000000000000024 $d
|
||
/tmp/ccmbTcom.s:623 .text.start_receive:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:631 .text.start_receive:0000000000000000 start_receive
|
||
/tmp/ccmbTcom.s:689 .text.start_receive:0000000000000038 $d
|
||
*COM*:000000000000006c hadc1
|
||
*COM*:000000000000004c htim6
|
||
/tmp/ccmbTcom.s:699 .text.stop_receive:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:707 .text.stop_receive:0000000000000000 stop_receive
|
||
/tmp/ccmbTcom.s:758 .text.stop_receive:000000000000002c $d
|
||
/tmp/ccmbTcom.s:766 .text.set_gain:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:774 .text.set_gain:0000000000000000 set_gain
|
||
ARM GAS /tmp/ccmbTcom.s page 70
|
||
|
||
|
||
/tmp/ccmbTcom.s:797 .text.set_gain:0000000000000016 $d
|
||
/tmp/ccmbTcom.s:865 .text.set_gain:0000000000000064 $d
|
||
*COM*:000000000000003c hopamp1
|
||
/tmp/ccmbTcom.s:871 .text.SystemClock_Config:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:879 .text.SystemClock_Config:0000000000000000 SystemClock_Config
|
||
/tmp/ccmbTcom.s:1039 .text.startup.main:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:1047 .text.startup.main:0000000000000000 main
|
||
/tmp/ccmbTcom.s:1741 .text.startup.main:00000000000002c4 $d
|
||
*COM*:000000000000004c htim7
|
||
*COM*:0000000000000028 hcordic
|
||
/tmp/ccmbTcom.s:1764 .text.startup.main:00000000000002fc $t
|
||
/tmp/ccmbTcom.s:2323 .text.startup.main:0000000000000580 $d
|
||
/tmp/ccmbTcom.s:2359 .text.startup.main:0000000000000608 $t
|
||
/tmp/ccmbTcom.s:2371 .text.startup.main:000000000000061c $d
|
||
/tmp/ccmbTcom.s:2378 .text.Error_Handler:0000000000000000 $t
|
||
/tmp/ccmbTcom.s:2386 .text.Error_Handler:0000000000000000 Error_Handler
|
||
*COM*:0000000000000060 hdma_usart1_tx
|
||
*COM*:0000000000000060 hdma_dac1_ch2
|
||
*COM*:0000000000000060 hdma_dac1_ch1
|
||
*COM*:0000000000000060 hdma_adc1
|
||
/tmp/ccmbTcom.s:802 .text.set_gain:000000000000001b $d
|
||
/tmp/ccmbTcom.s:802 .text.set_gain:000000000000001c $t
|
||
|
||
UNDEFINED SYMBOLS
|
||
peak
|
||
lf_buffer_toggle
|
||
HAL_GPIO_TogglePin
|
||
tx_dac_buffer_toggle
|
||
half_tx_dac_buffer_empty
|
||
enqueue_cmd
|
||
HAL_UART_Receive_IT
|
||
uart_rx_buf
|
||
HAL_UART_Transmit
|
||
HAL_UART_Transmit_DMA
|
||
HAL_TIM_Base_Start
|
||
HAL_DAC_Start
|
||
HAL_DAC_Start_DMA
|
||
transmit
|
||
tx_dac_buffer
|
||
HAL_TIM_Base_Stop
|
||
HAL_DAC_Stop
|
||
HAL_DAC_Stop_DMA
|
||
HAL_ADC_Start_DMA
|
||
receive
|
||
adc_buffer
|
||
lf_buffer
|
||
HAL_ADC_Stop_DMA
|
||
HAL_OPAMP_Stop
|
||
HAL_OPAMP_Init
|
||
HAL_OPAMP_Start
|
||
gain
|
||
memset
|
||
HAL_PWREx_ControlVoltageScaling
|
||
HAL_RCC_OscConfig
|
||
HAL_RCC_ClockConfig
|
||
HAL_RCCEx_PeriphCLKConfig
|
||
display_init
|
||
ARM GAS /tmp/ccmbTcom.s page 71
|
||
|
||
|
||
state_set_default
|
||
interface_set_default
|
||
display_update_mode
|
||
display_update_state
|
||
HAL_Init
|
||
HAL_GPIO_WritePin
|
||
HAL_GPIO_Init
|
||
HAL_NVIC_SetPriority
|
||
HAL_NVIC_EnableIRQ
|
||
HAL_DAC_Init
|
||
HAL_DAC_ConfigChannel
|
||
HAL_ADC_Init
|
||
HAL_ADCEx_MultiModeConfigChannel
|
||
HAL_ADC_AnalogWDGConfig
|
||
HAL_ADC_ConfigChannel
|
||
HAL_TIM_Base_Init
|
||
HAL_TIMEx_MasterConfigSynchronization
|
||
HAL_CORDIC_Init
|
||
state_changed
|
||
HAL_CORDIC_Configure
|
||
HAL_UART_Init
|
||
HAL_UARTEx_SetTxFifoThreshold
|
||
HAL_UARTEx_SetRxFifoThreshold
|
||
HAL_UARTEx_DisableFifoMode
|
||
HAL_TIM_ConfigClockSource
|
||
st2_filter_init
|
||
audio_filter_init
|
||
HAL_TIM_Base_Start_IT
|
||
rx_mixer
|
||
am_demodulator
|
||
arm_fir_q31
|
||
tx_mixer
|
||
am_modulator
|
||
rx_measure_signal
|
||
dequeue_cmd
|
||
ssb_modulator
|
||
dc_modulator
|
||
click
|
||
dc_demodulator
|
||
nco1_increment
|
||
peakset
|
||
prefilter_lf_buffer
|
||
if_I
|
||
if_Q
|
||
modulation
|
||
audio_filter_struct
|
||
tx_adc_buffer_ready
|
||
rx_cmd_rb_in_idx
|
||
rx_cmd_rb_out_idx
|
||
uart_tx_buf
|
||
uart_tx_buf_in_idx
|
||
ssb_demodulator
|