ARM GAS  /tmp/ccmwBztT.s 			page 1


   1              		.cpu cortex-m4
   2              		.eabi_attribute 27, 1
   3              		.eabi_attribute 28, 1
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 1
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.file	"stm32g4xx_it.c"
  14              		.text
  15              	.Ltext0:
  16              		.cfi_sections	.debug_frame
  17              		.section	.text.NMI_Handler,"ax",%progbits
  18              		.align	1
  19              		.global	NMI_Handler
  20              		.syntax unified
  21              		.thumb
  22              		.thumb_func
  23              		.fpu fpv4-sp-d16
  25              	NMI_Handler:
  26              	.LFB132:
  27              		.file 1 "Core/Src/stm32g4xx_it.c"
   1:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32g4xx_it.c **** /**
   3:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
   4:Core/Src/stm32g4xx_it.c ****   * @file    stm32g4xx_it.c
   5:Core/Src/stm32g4xx_it.c ****   * @brief   Interrupt Service Routines.
   6:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
   7:Core/Src/stm32g4xx_it.c ****   * @attention
   8:Core/Src/stm32g4xx_it.c ****   *
   9:Core/Src/stm32g4xx_it.c ****   * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  10:Core/Src/stm32g4xx_it.c ****   * All rights reserved.</center></h2>
  11:Core/Src/stm32g4xx_it.c ****   *
  12:Core/Src/stm32g4xx_it.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  13:Core/Src/stm32g4xx_it.c ****   * the "License"; You may not use this file except in compliance with the
  14:Core/Src/stm32g4xx_it.c ****   * License. You may obtain a copy of the License at:
  15:Core/Src/stm32g4xx_it.c ****   *                        opensource.org/licenses/BSD-3-Clause
  16:Core/Src/stm32g4xx_it.c ****   *
  17:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
  18:Core/Src/stm32g4xx_it.c ****   */
  19:Core/Src/stm32g4xx_it.c **** /* USER CODE END Header */
  20:Core/Src/stm32g4xx_it.c **** 
  21:Core/Src/stm32g4xx_it.c **** /* Includes ------------------------------------------------------------------*/
  22:Core/Src/stm32g4xx_it.c **** #include "main.h"
  23:Core/Src/stm32g4xx_it.c **** #include "stm32g4xx_it.h"
  24:Core/Src/stm32g4xx_it.c **** /* Private includes ----------------------------------------------------------*/
  25:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN Includes */
  26:Core/Src/stm32g4xx_it.c **** /* USER CODE END Includes */
  27:Core/Src/stm32g4xx_it.c **** 
  28:Core/Src/stm32g4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
  29:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN TD */
  30:Core/Src/stm32g4xx_it.c **** 
  31:Core/Src/stm32g4xx_it.c **** /* USER CODE END TD */
ARM GAS  /tmp/ccmwBztT.s 			page 2


  32:Core/Src/stm32g4xx_it.c **** 
  33:Core/Src/stm32g4xx_it.c **** /* Private define ------------------------------------------------------------*/
  34:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PD */
  35:Core/Src/stm32g4xx_it.c **** 
  36:Core/Src/stm32g4xx_it.c **** /* USER CODE END PD */
  37:Core/Src/stm32g4xx_it.c **** 
  38:Core/Src/stm32g4xx_it.c **** /* Private macro -------------------------------------------------------------*/
  39:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PM */
  40:Core/Src/stm32g4xx_it.c **** 
  41:Core/Src/stm32g4xx_it.c **** /* USER CODE END PM */
  42:Core/Src/stm32g4xx_it.c **** 
  43:Core/Src/stm32g4xx_it.c **** /* Private variables ---------------------------------------------------------*/
  44:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PV */
  45:Core/Src/stm32g4xx_it.c **** 
  46:Core/Src/stm32g4xx_it.c **** /* USER CODE END PV */
  47:Core/Src/stm32g4xx_it.c **** 
  48:Core/Src/stm32g4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
  49:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PFP */
  50:Core/Src/stm32g4xx_it.c **** 
  51:Core/Src/stm32g4xx_it.c **** /* USER CODE END PFP */
  52:Core/Src/stm32g4xx_it.c **** 
  53:Core/Src/stm32g4xx_it.c **** /* Private user code ---------------------------------------------------------*/
  54:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN 0 */
  55:Core/Src/stm32g4xx_it.c **** 
  56:Core/Src/stm32g4xx_it.c **** /* USER CODE END 0 */
  57:Core/Src/stm32g4xx_it.c **** 
  58:Core/Src/stm32g4xx_it.c **** /* External variables --------------------------------------------------------*/
  59:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  60:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart2_tx;
  61:Core/Src/stm32g4xx_it.c **** extern UART_HandleTypeDef hlpuart1;
  62:Core/Src/stm32g4xx_it.c **** extern UART_HandleTypeDef huart1;
  63:Core/Src/stm32g4xx_it.c **** extern UART_HandleTypeDef huart2;
  64:Core/Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim7;
  65:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN EV */
  66:Core/Src/stm32g4xx_it.c **** 
  67:Core/Src/stm32g4xx_it.c **** /* USER CODE END EV */
  68:Core/Src/stm32g4xx_it.c **** 
  69:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
  70:Core/Src/stm32g4xx_it.c **** /*           Cortex-M4 Processor Interruption and Exception Handlers          */
  71:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
  72:Core/Src/stm32g4xx_it.c **** /**
  73:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Non maskable interrupt.
  74:Core/Src/stm32g4xx_it.c ****   */
  75:Core/Src/stm32g4xx_it.c **** void NMI_Handler(void)
  76:Core/Src/stm32g4xx_it.c **** {
  28              		.loc 1 76 0
  29              		.cfi_startproc
  30              		@ Volatile: function does not return.
  31              		@ args = 0, pretend = 0, frame = 0
  32              		@ frame_needed = 0, uses_anonymous_args = 0
  33              		@ link register save eliminated.
  34              	.L2:
  35 0000 FEE7     		b	.L2
  36              		.cfi_endproc
  37              	.LFE132:
  39              		.section	.text.HardFault_Handler,"ax",%progbits
  40              		.align	1
ARM GAS  /tmp/ccmwBztT.s 			page 3


  41              		.global	HardFault_Handler
  42              		.syntax unified
  43              		.thumb
  44              		.thumb_func
  45              		.fpu fpv4-sp-d16
  47              	HardFault_Handler:
  48              	.LFB133:
  77:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  78:Core/Src/stm32g4xx_it.c **** 
  79:Core/Src/stm32g4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
  80:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  81:Core/Src/stm32g4xx_it.c ****   while (1)
  82:Core/Src/stm32g4xx_it.c ****   {
  83:Core/Src/stm32g4xx_it.c ****   }
  84:Core/Src/stm32g4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
  85:Core/Src/stm32g4xx_it.c **** }
  86:Core/Src/stm32g4xx_it.c **** 
  87:Core/Src/stm32g4xx_it.c **** /**
  88:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Hard fault interrupt.
  89:Core/Src/stm32g4xx_it.c ****   */
  90:Core/Src/stm32g4xx_it.c **** void HardFault_Handler(void)
  91:Core/Src/stm32g4xx_it.c **** {
  49              		.loc 1 91 0
  50              		.cfi_startproc
  51              		@ Volatile: function does not return.
  52              		@ args = 0, pretend = 0, frame = 0
  53              		@ frame_needed = 0, uses_anonymous_args = 0
  54              		@ link register save eliminated.
  55              	.L4:
  56 0000 FEE7     		b	.L4
  57              		.cfi_endproc
  58              	.LFE133:
  60              		.section	.text.MemManage_Handler,"ax",%progbits
  61              		.align	1
  62              		.global	MemManage_Handler
  63              		.syntax unified
  64              		.thumb
  65              		.thumb_func
  66              		.fpu fpv4-sp-d16
  68              	MemManage_Handler:
  69              	.LFB134:
  92:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
  93:Core/Src/stm32g4xx_it.c **** 
  94:Core/Src/stm32g4xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
  95:Core/Src/stm32g4xx_it.c ****   while (1)
  96:Core/Src/stm32g4xx_it.c ****   {
  97:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  98:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
  99:Core/Src/stm32g4xx_it.c ****   }
 100:Core/Src/stm32g4xx_it.c **** }
 101:Core/Src/stm32g4xx_it.c **** 
 102:Core/Src/stm32g4xx_it.c **** /**
 103:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Memory management fault.
 104:Core/Src/stm32g4xx_it.c ****   */
 105:Core/Src/stm32g4xx_it.c **** void MemManage_Handler(void)
 106:Core/Src/stm32g4xx_it.c **** {
  70              		.loc 1 106 0
ARM GAS  /tmp/ccmwBztT.s 			page 4


  71              		.cfi_startproc
  72              		@ Volatile: function does not return.
  73              		@ args = 0, pretend = 0, frame = 0
  74              		@ frame_needed = 0, uses_anonymous_args = 0
  75              		@ link register save eliminated.
  76              	.L6:
  77 0000 FEE7     		b	.L6
  78              		.cfi_endproc
  79              	.LFE134:
  81              		.section	.text.BusFault_Handler,"ax",%progbits
  82              		.align	1
  83              		.global	BusFault_Handler
  84              		.syntax unified
  85              		.thumb
  86              		.thumb_func
  87              		.fpu fpv4-sp-d16
  89              	BusFault_Handler:
  90              	.LFB135:
 107:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 108:Core/Src/stm32g4xx_it.c **** 
 109:Core/Src/stm32g4xx_it.c ****   /* USER CODE END MemoryManagement_IRQn 0 */
 110:Core/Src/stm32g4xx_it.c ****   while (1)
 111:Core/Src/stm32g4xx_it.c ****   {
 112:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
 113:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_MemoryManagement_IRQn 0 */
 114:Core/Src/stm32g4xx_it.c ****   }
 115:Core/Src/stm32g4xx_it.c **** }
 116:Core/Src/stm32g4xx_it.c **** 
 117:Core/Src/stm32g4xx_it.c **** /**
 118:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Prefetch fault, memory access fault.
 119:Core/Src/stm32g4xx_it.c ****   */
 120:Core/Src/stm32g4xx_it.c **** void BusFault_Handler(void)
 121:Core/Src/stm32g4xx_it.c **** {
  91              		.loc 1 121 0
  92              		.cfi_startproc
  93              		@ Volatile: function does not return.
  94              		@ args = 0, pretend = 0, frame = 0
  95              		@ frame_needed = 0, uses_anonymous_args = 0
  96              		@ link register save eliminated.
  97              	.L8:
  98 0000 FEE7     		b	.L8
  99              		.cfi_endproc
 100              	.LFE135:
 102              		.section	.text.UsageFault_Handler,"ax",%progbits
 103              		.align	1
 104              		.global	UsageFault_Handler
 105              		.syntax unified
 106              		.thumb
 107              		.thumb_func
 108              		.fpu fpv4-sp-d16
 110              	UsageFault_Handler:
 111              	.LFB136:
 122:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN BusFault_IRQn 0 */
 123:Core/Src/stm32g4xx_it.c **** 
 124:Core/Src/stm32g4xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
 125:Core/Src/stm32g4xx_it.c ****   while (1)
 126:Core/Src/stm32g4xx_it.c ****   {
ARM GAS  /tmp/ccmwBztT.s 			page 5


 127:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_BusFault_IRQn 0 */
 128:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_BusFault_IRQn 0 */
 129:Core/Src/stm32g4xx_it.c ****   }
 130:Core/Src/stm32g4xx_it.c **** }
 131:Core/Src/stm32g4xx_it.c **** 
 132:Core/Src/stm32g4xx_it.c **** /**
 133:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Undefined instruction or illegal state.
 134:Core/Src/stm32g4xx_it.c ****   */
 135:Core/Src/stm32g4xx_it.c **** void UsageFault_Handler(void)
 136:Core/Src/stm32g4xx_it.c **** {
 112              		.loc 1 136 0
 113              		.cfi_startproc
 114              		@ Volatile: function does not return.
 115              		@ args = 0, pretend = 0, frame = 0
 116              		@ frame_needed = 0, uses_anonymous_args = 0
 117              		@ link register save eliminated.
 118              	.L10:
 119 0000 FEE7     		b	.L10
 120              		.cfi_endproc
 121              	.LFE136:
 123              		.section	.text.SVC_Handler,"ax",%progbits
 124              		.align	1
 125              		.global	SVC_Handler
 126              		.syntax unified
 127              		.thumb
 128              		.thumb_func
 129              		.fpu fpv4-sp-d16
 131              	SVC_Handler:
 132              	.LFB137:
 137:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN UsageFault_IRQn 0 */
 138:Core/Src/stm32g4xx_it.c **** 
 139:Core/Src/stm32g4xx_it.c ****   /* USER CODE END UsageFault_IRQn 0 */
 140:Core/Src/stm32g4xx_it.c ****   while (1)
 141:Core/Src/stm32g4xx_it.c ****   {
 142:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
 143:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_UsageFault_IRQn 0 */
 144:Core/Src/stm32g4xx_it.c ****   }
 145:Core/Src/stm32g4xx_it.c **** }
 146:Core/Src/stm32g4xx_it.c **** 
 147:Core/Src/stm32g4xx_it.c **** /**
 148:Core/Src/stm32g4xx_it.c ****   * @brief This function handles System service call via SWI instruction.
 149:Core/Src/stm32g4xx_it.c ****   */
 150:Core/Src/stm32g4xx_it.c **** void SVC_Handler(void)
 151:Core/Src/stm32g4xx_it.c **** {
 133              		.loc 1 151 0
 134              		.cfi_startproc
 135              		@ args = 0, pretend = 0, frame = 0
 136              		@ frame_needed = 0, uses_anonymous_args = 0
 137              		@ link register save eliminated.
 152:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 0 */
 153:Core/Src/stm32g4xx_it.c **** 
 154:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SVCall_IRQn 0 */
 155:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 1 */
 156:Core/Src/stm32g4xx_it.c **** 
 157:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SVCall_IRQn 1 */
 158:Core/Src/stm32g4xx_it.c **** }
 138              		.loc 1 158 0
ARM GAS  /tmp/ccmwBztT.s 			page 6


 139 0000 7047     		bx	lr
 140              		.cfi_endproc
 141              	.LFE137:
 143              		.section	.text.DebugMon_Handler,"ax",%progbits
 144              		.align	1
 145              		.global	DebugMon_Handler
 146              		.syntax unified
 147              		.thumb
 148              		.thumb_func
 149              		.fpu fpv4-sp-d16
 151              	DebugMon_Handler:
 152              	.LFB138:
 159:Core/Src/stm32g4xx_it.c **** 
 160:Core/Src/stm32g4xx_it.c **** /**
 161:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Debug monitor.
 162:Core/Src/stm32g4xx_it.c ****   */
 163:Core/Src/stm32g4xx_it.c **** void DebugMon_Handler(void)
 164:Core/Src/stm32g4xx_it.c **** {
 153              		.loc 1 164 0
 154              		.cfi_startproc
 155              		@ args = 0, pretend = 0, frame = 0
 156              		@ frame_needed = 0, uses_anonymous_args = 0
 157              		@ link register save eliminated.
 165:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
 166:Core/Src/stm32g4xx_it.c **** 
 167:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 0 */
 168:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 169:Core/Src/stm32g4xx_it.c **** 
 170:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 1 */
 171:Core/Src/stm32g4xx_it.c **** }
 158              		.loc 1 171 0
 159 0000 7047     		bx	lr
 160              		.cfi_endproc
 161              	.LFE138:
 163              		.section	.text.PendSV_Handler,"ax",%progbits
 164              		.align	1
 165              		.global	PendSV_Handler
 166              		.syntax unified
 167              		.thumb
 168              		.thumb_func
 169              		.fpu fpv4-sp-d16
 171              	PendSV_Handler:
 172              	.LFB139:
 172:Core/Src/stm32g4xx_it.c **** 
 173:Core/Src/stm32g4xx_it.c **** /**
 174:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Pendable request for system service.
 175:Core/Src/stm32g4xx_it.c ****   */
 176:Core/Src/stm32g4xx_it.c **** void PendSV_Handler(void)
 177:Core/Src/stm32g4xx_it.c **** {
 173              		.loc 1 177 0
 174              		.cfi_startproc
 175              		@ args = 0, pretend = 0, frame = 0
 176              		@ frame_needed = 0, uses_anonymous_args = 0
 177              		@ link register save eliminated.
 178:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
 179:Core/Src/stm32g4xx_it.c **** 
 180:Core/Src/stm32g4xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
ARM GAS  /tmp/ccmwBztT.s 			page 7


 181:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
 182:Core/Src/stm32g4xx_it.c **** 
 183:Core/Src/stm32g4xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
 184:Core/Src/stm32g4xx_it.c **** }
 178              		.loc 1 184 0
 179 0000 7047     		bx	lr
 180              		.cfi_endproc
 181              	.LFE139:
 183              		.section	.text.SysTick_Handler,"ax",%progbits
 184              		.align	1
 185              		.global	SysTick_Handler
 186              		.syntax unified
 187              		.thumb
 188              		.thumb_func
 189              		.fpu fpv4-sp-d16
 191              	SysTick_Handler:
 192              	.LFB140:
 185:Core/Src/stm32g4xx_it.c **** 
 186:Core/Src/stm32g4xx_it.c **** /**
 187:Core/Src/stm32g4xx_it.c ****   * @brief This function handles System tick timer.
 188:Core/Src/stm32g4xx_it.c ****   */
 189:Core/Src/stm32g4xx_it.c **** void SysTick_Handler(void)
 190:Core/Src/stm32g4xx_it.c **** {
 193              		.loc 1 190 0
 194              		.cfi_startproc
 195              		@ args = 0, pretend = 0, frame = 0
 196              		@ frame_needed = 0, uses_anonymous_args = 0
 197 0000 08B5     		push	{r3, lr}
 198              	.LCFI0:
 199              		.cfi_def_cfa_offset 8
 200              		.cfi_offset 3, -8
 201              		.cfi_offset 14, -4
 191:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
 192:Core/Src/stm32g4xx_it.c **** 
 193:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
 194:Core/Src/stm32g4xx_it.c ****   HAL_IncTick();
 202              		.loc 1 194 0
 203 0002 FFF7FEFF 		bl	HAL_IncTick
 204              	.LVL0:
 195:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
 196:Core/Src/stm32g4xx_it.c **** 
 197:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
 198:Core/Src/stm32g4xx_it.c **** }
 205              		.loc 1 198 0
 206 0006 08BD     		pop	{r3, pc}
 207              		.cfi_endproc
 208              	.LFE140:
 210              		.section	.text.DMA1_Channel1_IRQHandler,"ax",%progbits
 211              		.align	1
 212              		.global	DMA1_Channel1_IRQHandler
 213              		.syntax unified
 214              		.thumb
 215              		.thumb_func
 216              		.fpu fpv4-sp-d16
 218              	DMA1_Channel1_IRQHandler:
 219              	.LFB141:
 199:Core/Src/stm32g4xx_it.c **** 
ARM GAS  /tmp/ccmwBztT.s 			page 8


 200:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
 201:Core/Src/stm32g4xx_it.c **** /* STM32G4xx Peripheral Interrupt Handlers                                    */
 202:Core/Src/stm32g4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals.                  */
 203:Core/Src/stm32g4xx_it.c **** /* For the available peripheral interrupt handler names,                      */
 204:Core/Src/stm32g4xx_it.c **** /* please refer to the startup file (startup_stm32g4xx.s).                    */
 205:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
 206:Core/Src/stm32g4xx_it.c **** 
 207:Core/Src/stm32g4xx_it.c **** /**
 208:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel1 global interrupt.
 209:Core/Src/stm32g4xx_it.c ****   */
 210:Core/Src/stm32g4xx_it.c **** void DMA1_Channel1_IRQHandler(void)
 211:Core/Src/stm32g4xx_it.c **** {
 220              		.loc 1 211 0
 221              		.cfi_startproc
 222              		@ args = 0, pretend = 0, frame = 0
 223              		@ frame_needed = 0, uses_anonymous_args = 0
 224 0000 08B5     		push	{r3, lr}
 225              	.LCFI1:
 226              		.cfi_def_cfa_offset 8
 227              		.cfi_offset 3, -8
 228              		.cfi_offset 14, -4
 212:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
 213:Core/Src/stm32g4xx_it.c **** 
 214:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel1_IRQn 0 */
 215:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_usart2_tx);
 229              		.loc 1 215 0
 230 0002 0248     		ldr	r0, .L18
 231 0004 FFF7FEFF 		bl	HAL_DMA_IRQHandler
 232              	.LVL1:
 216:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
 217:Core/Src/stm32g4xx_it.c **** 
 218:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel1_IRQn 1 */
 219:Core/Src/stm32g4xx_it.c **** }
 233              		.loc 1 219 0
 234 0008 08BD     		pop	{r3, pc}
 235              	.L19:
 236 000a 00BF     		.align	2
 237              	.L18:
 238 000c 00000000 		.word	hdma_usart2_tx
 239              		.cfi_endproc
 240              	.LFE141:
 242              		.section	.text.DMA1_Channel5_IRQHandler,"ax",%progbits
 243              		.align	1
 244              		.global	DMA1_Channel5_IRQHandler
 245              		.syntax unified
 246              		.thumb
 247              		.thumb_func
 248              		.fpu fpv4-sp-d16
 250              	DMA1_Channel5_IRQHandler:
 251              	.LFB142:
 220:Core/Src/stm32g4xx_it.c **** 
 221:Core/Src/stm32g4xx_it.c **** /**
 222:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel5 global interrupt.
 223:Core/Src/stm32g4xx_it.c ****   */
 224:Core/Src/stm32g4xx_it.c **** void DMA1_Channel5_IRQHandler(void)
 225:Core/Src/stm32g4xx_it.c **** {
 252              		.loc 1 225 0
ARM GAS  /tmp/ccmwBztT.s 			page 9


 253              		.cfi_startproc
 254              		@ args = 0, pretend = 0, frame = 0
 255              		@ frame_needed = 0, uses_anonymous_args = 0
 256 0000 08B5     		push	{r3, lr}
 257              	.LCFI2:
 258              		.cfi_def_cfa_offset 8
 259              		.cfi_offset 3, -8
 260              		.cfi_offset 14, -4
 226:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
 227:Core/Src/stm32g4xx_it.c **** 
 228:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel5_IRQn 0 */
 229:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_usart1_tx);
 261              		.loc 1 229 0
 262 0002 0248     		ldr	r0, .L22
 263 0004 FFF7FEFF 		bl	HAL_DMA_IRQHandler
 264              	.LVL2:
 230:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
 231:Core/Src/stm32g4xx_it.c **** 
 232:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel5_IRQn 1 */
 233:Core/Src/stm32g4xx_it.c **** }
 265              		.loc 1 233 0
 266 0008 08BD     		pop	{r3, pc}
 267              	.L23:
 268 000a 00BF     		.align	2
 269              	.L22:
 270 000c 00000000 		.word	hdma_usart1_tx
 271              		.cfi_endproc
 272              	.LFE142:
 274              		.section	.text.USART1_IRQHandler,"ax",%progbits
 275              		.align	1
 276              		.global	USART1_IRQHandler
 277              		.syntax unified
 278              		.thumb
 279              		.thumb_func
 280              		.fpu fpv4-sp-d16
 282              	USART1_IRQHandler:
 283              	.LFB143:
 234:Core/Src/stm32g4xx_it.c **** 
 235:Core/Src/stm32g4xx_it.c **** /**
 236:Core/Src/stm32g4xx_it.c ****   * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI li
 237:Core/Src/stm32g4xx_it.c ****   */
 238:Core/Src/stm32g4xx_it.c **** void USART1_IRQHandler(void)
 239:Core/Src/stm32g4xx_it.c **** {
 284              		.loc 1 239 0
 285              		.cfi_startproc
 286              		@ args = 0, pretend = 0, frame = 0
 287              		@ frame_needed = 0, uses_anonymous_args = 0
 288 0000 08B5     		push	{r3, lr}
 289              	.LCFI3:
 290              		.cfi_def_cfa_offset 8
 291              		.cfi_offset 3, -8
 292              		.cfi_offset 14, -4
 240:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 0 */
 241:Core/Src/stm32g4xx_it.c **** 
 242:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART1_IRQn 0 */
 243:Core/Src/stm32g4xx_it.c ****   HAL_UART_IRQHandler(&huart1);
 293              		.loc 1 243 0
ARM GAS  /tmp/ccmwBztT.s 			page 10


 294 0002 0248     		ldr	r0, .L26
 295 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
 296              	.LVL3:
 244:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 1 */
 245:Core/Src/stm32g4xx_it.c **** 
 246:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART1_IRQn 1 */
 247:Core/Src/stm32g4xx_it.c **** }
 297              		.loc 1 247 0
 298 0008 08BD     		pop	{r3, pc}
 299              	.L27:
 300 000a 00BF     		.align	2
 301              	.L26:
 302 000c 00000000 		.word	huart1
 303              		.cfi_endproc
 304              	.LFE143:
 306              		.section	.text.USART2_IRQHandler,"ax",%progbits
 307              		.align	1
 308              		.global	USART2_IRQHandler
 309              		.syntax unified
 310              		.thumb
 311              		.thumb_func
 312              		.fpu fpv4-sp-d16
 314              	USART2_IRQHandler:
 315              	.LFB144:
 248:Core/Src/stm32g4xx_it.c **** 
 249:Core/Src/stm32g4xx_it.c **** /**
 250:Core/Src/stm32g4xx_it.c ****   * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI li
 251:Core/Src/stm32g4xx_it.c ****   */
 252:Core/Src/stm32g4xx_it.c **** void USART2_IRQHandler(void)
 253:Core/Src/stm32g4xx_it.c **** {
 316              		.loc 1 253 0
 317              		.cfi_startproc
 318              		@ args = 0, pretend = 0, frame = 0
 319              		@ frame_needed = 0, uses_anonymous_args = 0
 320 0000 08B5     		push	{r3, lr}
 321              	.LCFI4:
 322              		.cfi_def_cfa_offset 8
 323              		.cfi_offset 3, -8
 324              		.cfi_offset 14, -4
 254:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART2_IRQn 0 */
 255:Core/Src/stm32g4xx_it.c **** 
 256:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART2_IRQn 0 */
 257:Core/Src/stm32g4xx_it.c ****   HAL_UART_IRQHandler(&huart2);
 325              		.loc 1 257 0
 326 0002 0248     		ldr	r0, .L30
 327 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
 328              	.LVL4:
 258:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART2_IRQn 1 */
 259:Core/Src/stm32g4xx_it.c **** 
 260:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART2_IRQn 1 */
 261:Core/Src/stm32g4xx_it.c **** }
 329              		.loc 1 261 0
 330 0008 08BD     		pop	{r3, pc}
 331              	.L31:
 332 000a 00BF     		.align	2
 333              	.L30:
 334 000c 00000000 		.word	huart2
ARM GAS  /tmp/ccmwBztT.s 			page 11


 335              		.cfi_endproc
 336              	.LFE144:
 338              		.section	.text.TIM7_IRQHandler,"ax",%progbits
 339              		.align	1
 340              		.global	TIM7_IRQHandler
 341              		.syntax unified
 342              		.thumb
 343              		.thumb_func
 344              		.fpu fpv4-sp-d16
 346              	TIM7_IRQHandler:
 347              	.LFB145:
 262:Core/Src/stm32g4xx_it.c **** 
 263:Core/Src/stm32g4xx_it.c **** /**
 264:Core/Src/stm32g4xx_it.c ****   * @brief This function handles TIM7 global interrupt.
 265:Core/Src/stm32g4xx_it.c ****   */
 266:Core/Src/stm32g4xx_it.c **** void TIM7_IRQHandler(void)
 267:Core/Src/stm32g4xx_it.c **** {
 348              		.loc 1 267 0
 349              		.cfi_startproc
 350              		@ args = 0, pretend = 0, frame = 0
 351              		@ frame_needed = 0, uses_anonymous_args = 0
 352 0000 08B5     		push	{r3, lr}
 353              	.LCFI5:
 354              		.cfi_def_cfa_offset 8
 355              		.cfi_offset 3, -8
 356              		.cfi_offset 14, -4
 268:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN TIM7_IRQn 0 */
 269:Core/Src/stm32g4xx_it.c **** 
 270:Core/Src/stm32g4xx_it.c ****   /* USER CODE END TIM7_IRQn 0 */
 271:Core/Src/stm32g4xx_it.c ****   HAL_TIM_IRQHandler(&htim7);
 357              		.loc 1 271 0
 358 0002 0248     		ldr	r0, .L34
 359 0004 FFF7FEFF 		bl	HAL_TIM_IRQHandler
 360              	.LVL5:
 272:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN TIM7_IRQn 1 */
 273:Core/Src/stm32g4xx_it.c **** 
 274:Core/Src/stm32g4xx_it.c ****   /* USER CODE END TIM7_IRQn 1 */
 275:Core/Src/stm32g4xx_it.c **** }
 361              		.loc 1 275 0
 362 0008 08BD     		pop	{r3, pc}
 363              	.L35:
 364 000a 00BF     		.align	2
 365              	.L34:
 366 000c 00000000 		.word	htim7
 367              		.cfi_endproc
 368              	.LFE145:
 370              		.section	.text.LPUART1_IRQHandler,"ax",%progbits
 371              		.align	1
 372              		.global	LPUART1_IRQHandler
 373              		.syntax unified
 374              		.thumb
 375              		.thumb_func
 376              		.fpu fpv4-sp-d16
 378              	LPUART1_IRQHandler:
 379              	.LFB146:
 276:Core/Src/stm32g4xx_it.c **** 
 277:Core/Src/stm32g4xx_it.c **** /**
ARM GAS  /tmp/ccmwBztT.s 			page 12


 278:Core/Src/stm32g4xx_it.c ****   * @brief This function handles LPUART1 global interrupt.
 279:Core/Src/stm32g4xx_it.c ****   */
 280:Core/Src/stm32g4xx_it.c **** void LPUART1_IRQHandler(void)
 281:Core/Src/stm32g4xx_it.c **** {
 380              		.loc 1 281 0
 381              		.cfi_startproc
 382              		@ args = 0, pretend = 0, frame = 0
 383              		@ frame_needed = 0, uses_anonymous_args = 0
 384 0000 08B5     		push	{r3, lr}
 385              	.LCFI6:
 386              		.cfi_def_cfa_offset 8
 387              		.cfi_offset 3, -8
 388              		.cfi_offset 14, -4
 282:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN LPUART1_IRQn 0 */
 283:Core/Src/stm32g4xx_it.c **** 
 284:Core/Src/stm32g4xx_it.c ****   /* USER CODE END LPUART1_IRQn 0 */
 285:Core/Src/stm32g4xx_it.c ****   HAL_UART_IRQHandler(&hlpuart1);
 389              		.loc 1 285 0
 390 0002 0248     		ldr	r0, .L38
 391 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
 392              	.LVL6:
 286:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN LPUART1_IRQn 1 */
 287:Core/Src/stm32g4xx_it.c **** 
 288:Core/Src/stm32g4xx_it.c ****   /* USER CODE END LPUART1_IRQn 1 */
 289:Core/Src/stm32g4xx_it.c **** }
 393              		.loc 1 289 0
 394 0008 08BD     		pop	{r3, pc}
 395              	.L39:
 396 000a 00BF     		.align	2
 397              	.L38:
 398 000c 00000000 		.word	hlpuart1
 399              		.cfi_endproc
 400              	.LFE146:
 402              		.text
 403              	.Letext0:
 404              		.file 2 "/usr/include/newlib/machine/_default_types.h"
 405              		.file 3 "/usr/include/newlib/sys/_stdint.h"
 406              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
 407              		.file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
 408              		.file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 409              		.file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 410              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 411              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
 412              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 413              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 414              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
ARM GAS  /tmp/ccmwBztT.s 			page 13


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32g4xx_it.c
     /tmp/ccmwBztT.s:18     .text.NMI_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:25     .text.NMI_Handler:0000000000000000 NMI_Handler
     /tmp/ccmwBztT.s:40     .text.HardFault_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:47     .text.HardFault_Handler:0000000000000000 HardFault_Handler
     /tmp/ccmwBztT.s:61     .text.MemManage_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:68     .text.MemManage_Handler:0000000000000000 MemManage_Handler
     /tmp/ccmwBztT.s:82     .text.BusFault_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:89     .text.BusFault_Handler:0000000000000000 BusFault_Handler
     /tmp/ccmwBztT.s:103    .text.UsageFault_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:110    .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
     /tmp/ccmwBztT.s:124    .text.SVC_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:131    .text.SVC_Handler:0000000000000000 SVC_Handler
     /tmp/ccmwBztT.s:144    .text.DebugMon_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:151    .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
     /tmp/ccmwBztT.s:164    .text.PendSV_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:171    .text.PendSV_Handler:0000000000000000 PendSV_Handler
     /tmp/ccmwBztT.s:184    .text.SysTick_Handler:0000000000000000 $t
     /tmp/ccmwBztT.s:191    .text.SysTick_Handler:0000000000000000 SysTick_Handler
     /tmp/ccmwBztT.s:211    .text.DMA1_Channel1_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:218    .text.DMA1_Channel1_IRQHandler:0000000000000000 DMA1_Channel1_IRQHandler
     /tmp/ccmwBztT.s:238    .text.DMA1_Channel1_IRQHandler:000000000000000c $d
     /tmp/ccmwBztT.s:243    .text.DMA1_Channel5_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:250    .text.DMA1_Channel5_IRQHandler:0000000000000000 DMA1_Channel5_IRQHandler
     /tmp/ccmwBztT.s:270    .text.DMA1_Channel5_IRQHandler:000000000000000c $d
     /tmp/ccmwBztT.s:275    .text.USART1_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:282    .text.USART1_IRQHandler:0000000000000000 USART1_IRQHandler
     /tmp/ccmwBztT.s:302    .text.USART1_IRQHandler:000000000000000c $d
     /tmp/ccmwBztT.s:307    .text.USART2_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:314    .text.USART2_IRQHandler:0000000000000000 USART2_IRQHandler
     /tmp/ccmwBztT.s:334    .text.USART2_IRQHandler:000000000000000c $d
     /tmp/ccmwBztT.s:339    .text.TIM7_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:346    .text.TIM7_IRQHandler:0000000000000000 TIM7_IRQHandler
     /tmp/ccmwBztT.s:366    .text.TIM7_IRQHandler:000000000000000c $d
     /tmp/ccmwBztT.s:371    .text.LPUART1_IRQHandler:0000000000000000 $t
     /tmp/ccmwBztT.s:378    .text.LPUART1_IRQHandler:0000000000000000 LPUART1_IRQHandler
     /tmp/ccmwBztT.s:398    .text.LPUART1_IRQHandler:000000000000000c $d

UNDEFINED SYMBOLS
HAL_IncTick
HAL_DMA_IRQHandler
hdma_usart2_tx
hdma_usart1_tx
HAL_UART_IRQHandler
huart1
huart2
HAL_TIM_IRQHandler
htim7
hlpuart1
