ARM GAS  /tmp/ccaQSkwV.s 			page 1


   1              		.cpu cortex-m4
   2              		.eabi_attribute 27, 1
   3              		.eabi_attribute 28, 1
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 1
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.file	"stm32g4xx_hal_msp.c"
  14              		.text
  15              	.Ltext0:
  16              		.cfi_sections	.debug_frame
  17              		.section	.text.HAL_MspInit,"ax",%progbits
  18              		.align	1
  19              		.global	HAL_MspInit
  20              		.syntax unified
  21              		.thumb
  22              		.thumb_func
  23              		.fpu fpv4-sp-d16
  25              	HAL_MspInit:
  26              	.LFB132:
  27              		.file 1 "Core/Src/stm32g4xx_hal_msp.c"
   1:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32g4xx_hal_msp.c **** /**
   3:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
   4:Core/Src/stm32g4xx_hal_msp.c ****   * @file         stm32g4xx_hal_msp.c
   5:Core/Src/stm32g4xx_hal_msp.c ****   * @brief        This file provides code for the MSP Initialization
   6:Core/Src/stm32g4xx_hal_msp.c ****   *               and de-Initialization codes.
   7:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
   8:Core/Src/stm32g4xx_hal_msp.c ****   * @attention
   9:Core/Src/stm32g4xx_hal_msp.c ****   *
  10:Core/Src/stm32g4xx_hal_msp.c ****   * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  11:Core/Src/stm32g4xx_hal_msp.c ****   * All rights reserved.</center></h2>
  12:Core/Src/stm32g4xx_hal_msp.c ****   *
  13:Core/Src/stm32g4xx_hal_msp.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  14:Core/Src/stm32g4xx_hal_msp.c ****   * the "License"; You may not use this file except in compliance with the
  15:Core/Src/stm32g4xx_hal_msp.c ****   * License. You may obtain a copy of the License at:
  16:Core/Src/stm32g4xx_hal_msp.c ****   *                        opensource.org/licenses/BSD-3-Clause
  17:Core/Src/stm32g4xx_hal_msp.c ****   *
  18:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
  19:Core/Src/stm32g4xx_hal_msp.c ****   */
  20:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Header */
  21:Core/Src/stm32g4xx_hal_msp.c **** 
  22:Core/Src/stm32g4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
  23:Core/Src/stm32g4xx_hal_msp.c **** #include "main.h"
  24:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
  25:Core/Src/stm32g4xx_hal_msp.c **** 
  26:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Includes */
  27:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  28:Core/Src/stm32g4xx_hal_msp.c **** 
  29:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart2_tx;
  30:Core/Src/stm32g4xx_hal_msp.c **** 
  31:Core/Src/stm32g4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
ARM GAS  /tmp/ccaQSkwV.s 			page 2


  32:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TD */
  33:Core/Src/stm32g4xx_hal_msp.c **** 
  34:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TD */
  35:Core/Src/stm32g4xx_hal_msp.c **** 
  36:Core/Src/stm32g4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
  37:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Define */
  38:Core/Src/stm32g4xx_hal_msp.c **** 
  39:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Define */
  40:Core/Src/stm32g4xx_hal_msp.c **** 
  41:Core/Src/stm32g4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
  42:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
  43:Core/Src/stm32g4xx_hal_msp.c **** 
  44:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Macro */
  45:Core/Src/stm32g4xx_hal_msp.c **** 
  46:Core/Src/stm32g4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
  47:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PV */
  48:Core/Src/stm32g4xx_hal_msp.c **** 
  49:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PV */
  50:Core/Src/stm32g4xx_hal_msp.c **** 
  51:Core/Src/stm32g4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
  52:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
  53:Core/Src/stm32g4xx_hal_msp.c **** 
  54:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PFP */
  55:Core/Src/stm32g4xx_hal_msp.c **** 
  56:Core/Src/stm32g4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
  57:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
  58:Core/Src/stm32g4xx_hal_msp.c **** 
  59:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
  60:Core/Src/stm32g4xx_hal_msp.c **** 
  61:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
  62:Core/Src/stm32g4xx_hal_msp.c **** 
  63:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END 0 */
  64:Core/Src/stm32g4xx_hal_msp.c **** /**
  65:Core/Src/stm32g4xx_hal_msp.c ****   * Initializes the Global MSP.
  66:Core/Src/stm32g4xx_hal_msp.c ****   */
  67:Core/Src/stm32g4xx_hal_msp.c **** void HAL_MspInit(void)
  68:Core/Src/stm32g4xx_hal_msp.c **** {
  28              		.loc 1 68 0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 8
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32 0000 00B5     		push	{lr}
  33              	.LCFI0:
  34              		.cfi_def_cfa_offset 4
  35              		.cfi_offset 14, -4
  36 0002 83B0     		sub	sp, sp, #12
  37              	.LCFI1:
  38              		.cfi_def_cfa_offset 16
  39              	.LBB2:
  69:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
  70:Core/Src/stm32g4xx_hal_msp.c **** 
  71:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END MspInit 0 */
  72:Core/Src/stm32g4xx_hal_msp.c **** 
  73:Core/Src/stm32g4xx_hal_msp.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
  40              		.loc 1 73 0
  41 0004 0B4B     		ldr	r3, .L3
  42 0006 1A6E     		ldr	r2, [r3, #96]
ARM GAS  /tmp/ccaQSkwV.s 			page 3


  43 0008 42F00102 		orr	r2, r2, #1
  44 000c 1A66     		str	r2, [r3, #96]
  45 000e 1A6E     		ldr	r2, [r3, #96]
  46 0010 02F00102 		and	r2, r2, #1
  47 0014 0092     		str	r2, [sp]
  48 0016 009A     		ldr	r2, [sp]
  49              	.LBE2:
  50              	.LBB3:
  74:Core/Src/stm32g4xx_hal_msp.c ****   __HAL_RCC_PWR_CLK_ENABLE();
  51              		.loc 1 74 0
  52 0018 9A6D     		ldr	r2, [r3, #88]
  53 001a 42F08052 		orr	r2, r2, #268435456
  54 001e 9A65     		str	r2, [r3, #88]
  55 0020 9B6D     		ldr	r3, [r3, #88]
  56 0022 03F08053 		and	r3, r3, #268435456
  57 0026 0193     		str	r3, [sp, #4]
  58 0028 019B     		ldr	r3, [sp, #4]
  59              	.LBE3:
  75:Core/Src/stm32g4xx_hal_msp.c **** 
  76:Core/Src/stm32g4xx_hal_msp.c ****   /* System interrupt init*/
  77:Core/Src/stm32g4xx_hal_msp.c **** 
  78:Core/Src/stm32g4xx_hal_msp.c ****   /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
  79:Core/Src/stm32g4xx_hal_msp.c ****   */
  80:Core/Src/stm32g4xx_hal_msp.c ****   HAL_PWREx_DisableUCPDDeadBattery();
  60              		.loc 1 80 0
  61 002a FFF7FEFF 		bl	HAL_PWREx_DisableUCPDDeadBattery
  62              	.LVL0:
  81:Core/Src/stm32g4xx_hal_msp.c **** 
  82:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 1 */
  83:Core/Src/stm32g4xx_hal_msp.c **** 
  84:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END MspInit 1 */
  85:Core/Src/stm32g4xx_hal_msp.c **** }
  63              		.loc 1 85 0
  64 002e 03B0     		add	sp, sp, #12
  65              	.LCFI2:
  66              		.cfi_def_cfa_offset 4
  67              		@ sp needed
  68 0030 5DF804FB 		ldr	pc, [sp], #4
  69              	.L4:
  70              		.align	2
  71              	.L3:
  72 0034 00100240 		.word	1073876992
  73              		.cfi_endproc
  74              	.LFE132:
  76              		.section	.text.HAL_UART_MspInit,"ax",%progbits
  77              		.align	1
  78              		.global	HAL_UART_MspInit
  79              		.syntax unified
  80              		.thumb
  81              		.thumb_func
  82              		.fpu fpv4-sp-d16
  84              	HAL_UART_MspInit:
  85              	.LFB133:
  86:Core/Src/stm32g4xx_hal_msp.c **** 
  87:Core/Src/stm32g4xx_hal_msp.c **** /**
  88:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP Initialization
  89:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
ARM GAS  /tmp/ccaQSkwV.s 			page 4


  90:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
  91:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
  92:Core/Src/stm32g4xx_hal_msp.c **** */
  93:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
  94:Core/Src/stm32g4xx_hal_msp.c **** {
  86              		.loc 1 94 0
  87              		.cfi_startproc
  88              		@ args = 0, pretend = 0, frame = 48
  89              		@ frame_needed = 0, uses_anonymous_args = 0
  90              	.LVL1:
  91 0000 10B5     		push	{r4, lr}
  92              	.LCFI3:
  93              		.cfi_def_cfa_offset 8
  94              		.cfi_offset 4, -8
  95              		.cfi_offset 14, -4
  96 0002 8CB0     		sub	sp, sp, #48
  97              	.LCFI4:
  98              		.cfi_def_cfa_offset 56
  95:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
  99              		.loc 1 95 0
 100 0004 0023     		movs	r3, #0
 101 0006 0793     		str	r3, [sp, #28]
 102 0008 0893     		str	r3, [sp, #32]
 103 000a 0993     		str	r3, [sp, #36]
 104 000c 0A93     		str	r3, [sp, #40]
 105 000e 0B93     		str	r3, [sp, #44]
  96:Core/Src/stm32g4xx_hal_msp.c ****   if(huart->Instance==LPUART1)
 106              		.loc 1 96 0
 107 0010 0368     		ldr	r3, [r0]
 108 0012 584A     		ldr	r2, .L17
 109 0014 9342     		cmp	r3, r2
 110 0016 08D0     		beq	.L12
 111 0018 0446     		mov	r4, r0
  97:Core/Src/stm32g4xx_hal_msp.c ****   {
  98:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspInit 0 */
  99:Core/Src/stm32g4xx_hal_msp.c **** 
 100:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END LPUART1_MspInit 0 */
 101:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 102:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_LPUART1_CLK_ENABLE();
 103:Core/Src/stm32g4xx_hal_msp.c **** 
 104:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 105:Core/Src/stm32g4xx_hal_msp.c ****     /**LPUART1 GPIO Configuration
 106:Core/Src/stm32g4xx_hal_msp.c ****     PA2     ------> LPUART1_TX
 107:Core/Src/stm32g4xx_hal_msp.c ****     PA3     ------> LPUART1_RX
 108:Core/Src/stm32g4xx_hal_msp.c ****     */
 109:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
 110:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 111:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 112:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 113:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF12_LPUART1;
 114:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 115:Core/Src/stm32g4xx_hal_msp.c **** 
 116:Core/Src/stm32g4xx_hal_msp.c ****     /* LPUART1 interrupt Init */
 117:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
 118:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(LPUART1_IRQn);
 119:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspInit 1 */
 120:Core/Src/stm32g4xx_hal_msp.c **** 
ARM GAS  /tmp/ccaQSkwV.s 			page 5


 121:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END LPUART1_MspInit 1 */
 122:Core/Src/stm32g4xx_hal_msp.c ****   }
 123:Core/Src/stm32g4xx_hal_msp.c ****   else if(huart->Instance==USART1)
 112              		.loc 1 123 0
 113 001a 574A     		ldr	r2, .L17+4
 114 001c 9342     		cmp	r3, r2
 115 001e 2AD0     		beq	.L13
 124:Core/Src/stm32g4xx_hal_msp.c ****   {
 125:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 0 */
 126:Core/Src/stm32g4xx_hal_msp.c **** 
 127:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 0 */
 128:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 129:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_ENABLE();
 130:Core/Src/stm32g4xx_hal_msp.c **** 
 131:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 132:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 133:Core/Src/stm32g4xx_hal_msp.c ****     PA9     ------> USART1_TX
 134:Core/Src/stm32g4xx_hal_msp.c ****     PA10     ------> USART1_RX
 135:Core/Src/stm32g4xx_hal_msp.c ****     */
 136:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
 137:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 138:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 139:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 140:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
 141:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 142:Core/Src/stm32g4xx_hal_msp.c **** 
 143:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 DMA Init */
 144:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1_TX Init */
 145:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Instance = DMA1_Channel5;
 146:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
 147:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 148:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 149:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 150:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 151:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 152:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 153:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 154:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 155:Core/Src/stm32g4xx_hal_msp.c ****     {
 156:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 157:Core/Src/stm32g4xx_hal_msp.c ****     }
 158:Core/Src/stm32g4xx_hal_msp.c **** 
 159:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
 160:Core/Src/stm32g4xx_hal_msp.c **** 
 161:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 interrupt Init */
 162:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 163:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 164:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 1 */
 165:Core/Src/stm32g4xx_hal_msp.c **** 
 166:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 1 */
 167:Core/Src/stm32g4xx_hal_msp.c ****   }
 168:Core/Src/stm32g4xx_hal_msp.c ****   else if(huart->Instance==USART2)
 116              		.loc 1 168 0
 117 0020 564A     		ldr	r2, .L17+8
 118 0022 9342     		cmp	r3, r2
 119 0024 67D0     		beq	.L14
 120              	.LVL2:
ARM GAS  /tmp/ccaQSkwV.s 			page 6


 121              	.L5:
 169:Core/Src/stm32g4xx_hal_msp.c ****   {
 170:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspInit 0 */
 171:Core/Src/stm32g4xx_hal_msp.c **** 
 172:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART2_MspInit 0 */
 173:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 174:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART2_CLK_ENABLE();
 175:Core/Src/stm32g4xx_hal_msp.c **** 
 176:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
 177:Core/Src/stm32g4xx_hal_msp.c ****     /**USART2 GPIO Configuration
 178:Core/Src/stm32g4xx_hal_msp.c ****     PB3     ------> USART2_TX
 179:Core/Src/stm32g4xx_hal_msp.c ****     PB4     ------> USART2_RX
 180:Core/Src/stm32g4xx_hal_msp.c ****     */
 181:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4;
 182:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 183:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 184:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 185:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 186:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 187:Core/Src/stm32g4xx_hal_msp.c **** 
 188:Core/Src/stm32g4xx_hal_msp.c ****     /* USART2 DMA Init */
 189:Core/Src/stm32g4xx_hal_msp.c ****     /* USART2_TX Init */
 190:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Instance = DMA1_Channel1;
 191:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX;
 192:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 193:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 194:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
 195:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 196:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 197:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Mode = DMA_NORMAL;
 198:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
 199:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
 200:Core/Src/stm32g4xx_hal_msp.c ****     {
 201:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 202:Core/Src/stm32g4xx_hal_msp.c ****     }
 203:Core/Src/stm32g4xx_hal_msp.c **** 
 204:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx);
 205:Core/Src/stm32g4xx_hal_msp.c **** 
 206:Core/Src/stm32g4xx_hal_msp.c ****     /* USART2 interrupt Init */
 207:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
 208:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART2_IRQn);
 209:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspInit 1 */
 210:Core/Src/stm32g4xx_hal_msp.c **** 
 211:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART2_MspInit 1 */
 212:Core/Src/stm32g4xx_hal_msp.c ****   }
 213:Core/Src/stm32g4xx_hal_msp.c **** 
 214:Core/Src/stm32g4xx_hal_msp.c **** }
 122              		.loc 1 214 0
 123 0026 0CB0     		add	sp, sp, #48
 124              	.LCFI5:
 125              		.cfi_remember_state
 126              		.cfi_def_cfa_offset 8
 127              		@ sp needed
 128 0028 10BD     		pop	{r4, pc}
 129              	.LVL3:
 130              	.L12:
 131              	.LCFI6:
ARM GAS  /tmp/ccaQSkwV.s 			page 7


 132              		.cfi_restore_state
 133              	.LBB4:
 102:Core/Src/stm32g4xx_hal_msp.c **** 
 134              		.loc 1 102 0
 135 002a 554B     		ldr	r3, .L17+12
 136 002c DA6D     		ldr	r2, [r3, #92]
 137 002e 42F00102 		orr	r2, r2, #1
 138 0032 DA65     		str	r2, [r3, #92]
 139 0034 DA6D     		ldr	r2, [r3, #92]
 140 0036 02F00102 		and	r2, r2, #1
 141 003a 0192     		str	r2, [sp, #4]
 142 003c 019A     		ldr	r2, [sp, #4]
 143              	.LBE4:
 144              	.LBB5:
 104:Core/Src/stm32g4xx_hal_msp.c ****     /**LPUART1 GPIO Configuration
 145              		.loc 1 104 0
 146 003e DA6C     		ldr	r2, [r3, #76]
 147 0040 42F00102 		orr	r2, r2, #1
 148 0044 DA64     		str	r2, [r3, #76]
 149 0046 DB6C     		ldr	r3, [r3, #76]
 150 0048 03F00103 		and	r3, r3, #1
 151 004c 0293     		str	r3, [sp, #8]
 152 004e 029B     		ldr	r3, [sp, #8]
 153              	.LBE5:
 109:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 154              		.loc 1 109 0
 155 0050 0C23     		movs	r3, #12
 156 0052 0793     		str	r3, [sp, #28]
 110:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 157              		.loc 1 110 0
 158 0054 0222     		movs	r2, #2
 159 0056 0892     		str	r2, [sp, #32]
 113:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 160              		.loc 1 113 0
 161 0058 0B93     		str	r3, [sp, #44]
 114:Core/Src/stm32g4xx_hal_msp.c **** 
 162              		.loc 1 114 0
 163 005a 07A9     		add	r1, sp, #28
 164 005c 4FF09040 		mov	r0, #1207959552
 165              	.LVL4:
 166 0060 FFF7FEFF 		bl	HAL_GPIO_Init
 167              	.LVL5:
 117:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(LPUART1_IRQn);
 168              		.loc 1 117 0
 169 0064 0022     		movs	r2, #0
 170 0066 1146     		mov	r1, r2
 171 0068 5B20     		movs	r0, #91
 172 006a FFF7FEFF 		bl	HAL_NVIC_SetPriority
 173              	.LVL6:
 118:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspInit 1 */
 174              		.loc 1 118 0
 175 006e 5B20     		movs	r0, #91
 176 0070 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 177              	.LVL7:
 178 0074 D7E7     		b	.L5
 179              	.LVL8:
 180              	.L13:
ARM GAS  /tmp/ccaQSkwV.s 			page 8


 181              	.LBB6:
 129:Core/Src/stm32g4xx_hal_msp.c **** 
 182              		.loc 1 129 0
 183 0076 424B     		ldr	r3, .L17+12
 184 0078 1A6E     		ldr	r2, [r3, #96]
 185 007a 42F48042 		orr	r2, r2, #16384
 186 007e 1A66     		str	r2, [r3, #96]
 187 0080 1A6E     		ldr	r2, [r3, #96]
 188 0082 02F48042 		and	r2, r2, #16384
 189 0086 0392     		str	r2, [sp, #12]
 190 0088 039A     		ldr	r2, [sp, #12]
 191              	.LBE6:
 192              	.LBB7:
 131:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 193              		.loc 1 131 0
 194 008a DA6C     		ldr	r2, [r3, #76]
 195 008c 42F00102 		orr	r2, r2, #1
 196 0090 DA64     		str	r2, [r3, #76]
 197 0092 DB6C     		ldr	r3, [r3, #76]
 198 0094 03F00103 		and	r3, r3, #1
 199 0098 0493     		str	r3, [sp, #16]
 200 009a 049B     		ldr	r3, [sp, #16]
 201              	.LBE7:
 136:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 202              		.loc 1 136 0
 203 009c 4FF4C063 		mov	r3, #1536
 204 00a0 0793     		str	r3, [sp, #28]
 137:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 205              		.loc 1 137 0
 206 00a2 0223     		movs	r3, #2
 207 00a4 0893     		str	r3, [sp, #32]
 140:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 208              		.loc 1 140 0
 209 00a6 0723     		movs	r3, #7
 210 00a8 0B93     		str	r3, [sp, #44]
 141:Core/Src/stm32g4xx_hal_msp.c **** 
 211              		.loc 1 141 0
 212 00aa 07A9     		add	r1, sp, #28
 213 00ac 4FF09040 		mov	r0, #1207959552
 214              	.LVL9:
 215 00b0 FFF7FEFF 		bl	HAL_GPIO_Init
 216              	.LVL10:
 145:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
 217              		.loc 1 145 0
 218 00b4 3348     		ldr	r0, .L17+16
 219 00b6 344B     		ldr	r3, .L17+20
 220 00b8 0360     		str	r3, [r0]
 146:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 221              		.loc 1 146 0
 222 00ba 1923     		movs	r3, #25
 223 00bc 4360     		str	r3, [r0, #4]
 147:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 224              		.loc 1 147 0
 225 00be 1023     		movs	r3, #16
 226 00c0 8360     		str	r3, [r0, #8]
 148:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 227              		.loc 1 148 0
ARM GAS  /tmp/ccaQSkwV.s 			page 9


 228 00c2 0023     		movs	r3, #0
 229 00c4 C360     		str	r3, [r0, #12]
 149:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 230              		.loc 1 149 0
 231 00c6 8022     		movs	r2, #128
 232 00c8 0261     		str	r2, [r0, #16]
 150:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 233              		.loc 1 150 0
 234 00ca 4361     		str	r3, [r0, #20]
 151:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 235              		.loc 1 151 0
 236 00cc 8361     		str	r3, [r0, #24]
 152:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 237              		.loc 1 152 0
 238 00ce C361     		str	r3, [r0, #28]
 153:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 239              		.loc 1 153 0
 240 00d0 0362     		str	r3, [r0, #32]
 154:Core/Src/stm32g4xx_hal_msp.c ****     {
 241              		.loc 1 154 0
 242 00d2 FFF7FEFF 		bl	HAL_DMA_Init
 243              	.LVL11:
 244 00d6 58B9     		cbnz	r0, .L15
 245              	.L9:
 159:Core/Src/stm32g4xx_hal_msp.c **** 
 246              		.loc 1 159 0
 247 00d8 2A4B     		ldr	r3, .L17+16
 248 00da A367     		str	r3, [r4, #120]
 249 00dc 9C62     		str	r4, [r3, #40]
 162:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 250              		.loc 1 162 0
 251 00de 0022     		movs	r2, #0
 252 00e0 1146     		mov	r1, r2
 253 00e2 2520     		movs	r0, #37
 254 00e4 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 255              	.LVL12:
 163:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 1 */
 256              		.loc 1 163 0
 257 00e8 2520     		movs	r0, #37
 258 00ea FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 259              	.LVL13:
 260 00ee 9AE7     		b	.L5
 261              	.L15:
 156:Core/Src/stm32g4xx_hal_msp.c ****     }
 262              		.loc 1 156 0
 263 00f0 FFF7FEFF 		bl	Error_Handler
 264              	.LVL14:
 265 00f4 F0E7     		b	.L9
 266              	.LVL15:
 267              	.L14:
 268              	.LBB8:
 174:Core/Src/stm32g4xx_hal_msp.c **** 
 269              		.loc 1 174 0
 270 00f6 224B     		ldr	r3, .L17+12
 271 00f8 9A6D     		ldr	r2, [r3, #88]
 272 00fa 42F40032 		orr	r2, r2, #131072
 273 00fe 9A65     		str	r2, [r3, #88]
ARM GAS  /tmp/ccaQSkwV.s 			page 10


 274 0100 9A6D     		ldr	r2, [r3, #88]
 275 0102 02F40032 		and	r2, r2, #131072
 276 0106 0592     		str	r2, [sp, #20]
 277 0108 059A     		ldr	r2, [sp, #20]
 278              	.LBE8:
 279              	.LBB9:
 176:Core/Src/stm32g4xx_hal_msp.c ****     /**USART2 GPIO Configuration
 280              		.loc 1 176 0
 281 010a DA6C     		ldr	r2, [r3, #76]
 282 010c 42F00202 		orr	r2, r2, #2
 283 0110 DA64     		str	r2, [r3, #76]
 284 0112 DB6C     		ldr	r3, [r3, #76]
 285 0114 03F00203 		and	r3, r3, #2
 286 0118 0693     		str	r3, [sp, #24]
 287 011a 069B     		ldr	r3, [sp, #24]
 288              	.LBE9:
 181:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 289              		.loc 1 181 0
 290 011c 1823     		movs	r3, #24
 291 011e 0793     		str	r3, [sp, #28]
 182:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 292              		.loc 1 182 0
 293 0120 0223     		movs	r3, #2
 294 0122 0893     		str	r3, [sp, #32]
 185:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 295              		.loc 1 185 0
 296 0124 0723     		movs	r3, #7
 297 0126 0B93     		str	r3, [sp, #44]
 186:Core/Src/stm32g4xx_hal_msp.c **** 
 298              		.loc 1 186 0
 299 0128 07A9     		add	r1, sp, #28
 300 012a 1848     		ldr	r0, .L17+24
 301              	.LVL16:
 302 012c FFF7FEFF 		bl	HAL_GPIO_Init
 303              	.LVL17:
 190:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX;
 304              		.loc 1 190 0
 305 0130 1748     		ldr	r0, .L17+28
 306 0132 184B     		ldr	r3, .L17+32
 307 0134 0360     		str	r3, [r0]
 191:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 308              		.loc 1 191 0
 309 0136 1B23     		movs	r3, #27
 310 0138 4360     		str	r3, [r0, #4]
 192:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 311              		.loc 1 192 0
 312 013a 1023     		movs	r3, #16
 313 013c 8360     		str	r3, [r0, #8]
 193:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
 314              		.loc 1 193 0
 315 013e 0023     		movs	r3, #0
 316 0140 C360     		str	r3, [r0, #12]
 194:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 317              		.loc 1 194 0
 318 0142 8022     		movs	r2, #128
 319 0144 0261     		str	r2, [r0, #16]
 195:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
ARM GAS  /tmp/ccaQSkwV.s 			page 11


 320              		.loc 1 195 0
 321 0146 4361     		str	r3, [r0, #20]
 196:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Mode = DMA_NORMAL;
 322              		.loc 1 196 0
 323 0148 8361     		str	r3, [r0, #24]
 197:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
 324              		.loc 1 197 0
 325 014a C361     		str	r3, [r0, #28]
 198:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
 326              		.loc 1 198 0
 327 014c 0362     		str	r3, [r0, #32]
 199:Core/Src/stm32g4xx_hal_msp.c ****     {
 328              		.loc 1 199 0
 329 014e FFF7FEFF 		bl	HAL_DMA_Init
 330              	.LVL18:
 331 0152 58B9     		cbnz	r0, .L16
 332              	.L10:
 204:Core/Src/stm32g4xx_hal_msp.c **** 
 333              		.loc 1 204 0
 334 0154 0E4B     		ldr	r3, .L17+28
 335 0156 A367     		str	r3, [r4, #120]
 336 0158 9C62     		str	r4, [r3, #40]
 207:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART2_IRQn);
 337              		.loc 1 207 0
 338 015a 0022     		movs	r2, #0
 339 015c 1146     		mov	r1, r2
 340 015e 2620     		movs	r0, #38
 341 0160 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 342              	.LVL19:
 208:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspInit 1 */
 343              		.loc 1 208 0
 344 0164 2620     		movs	r0, #38
 345 0166 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 346              	.LVL20:
 347              		.loc 1 214 0
 348 016a 5CE7     		b	.L5
 349              	.L16:
 201:Core/Src/stm32g4xx_hal_msp.c ****     }
 350              		.loc 1 201 0
 351 016c FFF7FEFF 		bl	Error_Handler
 352              	.LVL21:
 353 0170 F0E7     		b	.L10
 354              	.L18:
 355 0172 00BF     		.align	2
 356              	.L17:
 357 0174 00800040 		.word	1073774592
 358 0178 00380140 		.word	1073821696
 359 017c 00440040 		.word	1073759232
 360 0180 00100240 		.word	1073876992
 361 0184 00000000 		.word	hdma_usart1_tx
 362 0188 58000240 		.word	1073872984
 363 018c 00040048 		.word	1207960576
 364 0190 00000000 		.word	hdma_usart2_tx
 365 0194 08000240 		.word	1073872904
 366              		.cfi_endproc
 367              	.LFE133:
 369              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
ARM GAS  /tmp/ccaQSkwV.s 			page 12


 370              		.align	1
 371              		.global	HAL_UART_MspDeInit
 372              		.syntax unified
 373              		.thumb
 374              		.thumb_func
 375              		.fpu fpv4-sp-d16
 377              	HAL_UART_MspDeInit:
 378              	.LFB134:
 215:Core/Src/stm32g4xx_hal_msp.c **** 
 216:Core/Src/stm32g4xx_hal_msp.c **** /**
 217:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP De-Initialization
 218:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 219:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
 220:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 221:Core/Src/stm32g4xx_hal_msp.c **** */
 222:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 223:Core/Src/stm32g4xx_hal_msp.c **** {
 379              		.loc 1 223 0
 380              		.cfi_startproc
 381              		@ args = 0, pretend = 0, frame = 0
 382              		@ frame_needed = 0, uses_anonymous_args = 0
 383              	.LVL22:
 384 0000 10B5     		push	{r4, lr}
 385              	.LCFI7:
 386              		.cfi_def_cfa_offset 8
 387              		.cfi_offset 4, -8
 388              		.cfi_offset 14, -4
 224:Core/Src/stm32g4xx_hal_msp.c ****   if(huart->Instance==LPUART1)
 389              		.loc 1 224 0
 390 0002 0368     		ldr	r3, [r0]
 391 0004 1E4A     		ldr	r2, .L27
 392 0006 9342     		cmp	r3, r2
 393 0008 07D0     		beq	.L24
 394 000a 0446     		mov	r4, r0
 225:Core/Src/stm32g4xx_hal_msp.c ****   {
 226:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspDeInit 0 */
 227:Core/Src/stm32g4xx_hal_msp.c **** 
 228:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END LPUART1_MspDeInit 0 */
 229:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 230:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_LPUART1_CLK_DISABLE();
 231:Core/Src/stm32g4xx_hal_msp.c **** 
 232:Core/Src/stm32g4xx_hal_msp.c ****     /**LPUART1 GPIO Configuration
 233:Core/Src/stm32g4xx_hal_msp.c ****     PA2     ------> LPUART1_TX
 234:Core/Src/stm32g4xx_hal_msp.c ****     PA3     ------> LPUART1_RX
 235:Core/Src/stm32g4xx_hal_msp.c ****     */
 236:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
 237:Core/Src/stm32g4xx_hal_msp.c **** 
 238:Core/Src/stm32g4xx_hal_msp.c ****     /* LPUART1 interrupt DeInit */
 239:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(LPUART1_IRQn);
 240:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspDeInit 1 */
 241:Core/Src/stm32g4xx_hal_msp.c **** 
 242:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END LPUART1_MspDeInit 1 */
 243:Core/Src/stm32g4xx_hal_msp.c ****   }
 244:Core/Src/stm32g4xx_hal_msp.c ****   else if(huart->Instance==USART1)
 395              		.loc 1 244 0
 396 000c 1D4A     		ldr	r2, .L27+4
 397 000e 9342     		cmp	r3, r2
ARM GAS  /tmp/ccaQSkwV.s 			page 13


 398 0010 12D0     		beq	.L25
 245:Core/Src/stm32g4xx_hal_msp.c ****   {
 246:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 0 */
 247:Core/Src/stm32g4xx_hal_msp.c **** 
 248:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 0 */
 249:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 250:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_DISABLE();
 251:Core/Src/stm32g4xx_hal_msp.c **** 
 252:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 253:Core/Src/stm32g4xx_hal_msp.c ****     PA9     ------> USART1_TX
 254:Core/Src/stm32g4xx_hal_msp.c ****     PA10     ------> USART1_RX
 255:Core/Src/stm32g4xx_hal_msp.c ****     */
 256:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
 257:Core/Src/stm32g4xx_hal_msp.c **** 
 258:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 DMA DeInit */
 259:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(huart->hdmatx);
 260:Core/Src/stm32g4xx_hal_msp.c **** 
 261:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 interrupt DeInit */
 262:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART1_IRQn);
 263:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
 264:Core/Src/stm32g4xx_hal_msp.c **** 
 265:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 1 */
 266:Core/Src/stm32g4xx_hal_msp.c ****   }
 267:Core/Src/stm32g4xx_hal_msp.c ****   else if(huart->Instance==USART2)
 399              		.loc 1 267 0
 400 0012 1D4A     		ldr	r2, .L27+8
 401 0014 9342     		cmp	r3, r2
 402 0016 22D0     		beq	.L26
 403              	.LVL23:
 404              	.L19:
 268:Core/Src/stm32g4xx_hal_msp.c ****   {
 269:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspDeInit 0 */
 270:Core/Src/stm32g4xx_hal_msp.c **** 
 271:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART2_MspDeInit 0 */
 272:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 273:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART2_CLK_DISABLE();
 274:Core/Src/stm32g4xx_hal_msp.c **** 
 275:Core/Src/stm32g4xx_hal_msp.c ****     /**USART2 GPIO Configuration
 276:Core/Src/stm32g4xx_hal_msp.c ****     PB3     ------> USART2_TX
 277:Core/Src/stm32g4xx_hal_msp.c ****     PB4     ------> USART2_RX
 278:Core/Src/stm32g4xx_hal_msp.c ****     */
 279:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4);
 280:Core/Src/stm32g4xx_hal_msp.c **** 
 281:Core/Src/stm32g4xx_hal_msp.c ****     /* USART2 DMA DeInit */
 282:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(huart->hdmatx);
 283:Core/Src/stm32g4xx_hal_msp.c **** 
 284:Core/Src/stm32g4xx_hal_msp.c ****     /* USART2 interrupt DeInit */
 285:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART2_IRQn);
 286:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspDeInit 1 */
 287:Core/Src/stm32g4xx_hal_msp.c **** 
 288:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART2_MspDeInit 1 */
 289:Core/Src/stm32g4xx_hal_msp.c ****   }
 290:Core/Src/stm32g4xx_hal_msp.c **** 
 291:Core/Src/stm32g4xx_hal_msp.c **** }
 405              		.loc 1 291 0
 406 0018 10BD     		pop	{r4, pc}
 407              	.LVL24:
ARM GAS  /tmp/ccaQSkwV.s 			page 14


 408              	.L24:
 230:Core/Src/stm32g4xx_hal_msp.c **** 
 409              		.loc 1 230 0
 410 001a 02F5C832 		add	r2, r2, #102400
 411 001e D36D     		ldr	r3, [r2, #92]
 412 0020 23F00103 		bic	r3, r3, #1
 413 0024 D365     		str	r3, [r2, #92]
 236:Core/Src/stm32g4xx_hal_msp.c **** 
 414              		.loc 1 236 0
 415 0026 0C21     		movs	r1, #12
 416 0028 4FF09040 		mov	r0, #1207959552
 417              	.LVL25:
 418 002c FFF7FEFF 		bl	HAL_GPIO_DeInit
 419              	.LVL26:
 239:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN LPUART1_MspDeInit 1 */
 420              		.loc 1 239 0
 421 0030 5B20     		movs	r0, #91
 422 0032 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 423              	.LVL27:
 424 0036 EFE7     		b	.L19
 425              	.LVL28:
 426              	.L25:
 250:Core/Src/stm32g4xx_hal_msp.c **** 
 427              		.loc 1 250 0
 428 0038 02F55842 		add	r2, r2, #55296
 429 003c 136E     		ldr	r3, [r2, #96]
 430 003e 23F48043 		bic	r3, r3, #16384
 431 0042 1366     		str	r3, [r2, #96]
 256:Core/Src/stm32g4xx_hal_msp.c **** 
 432              		.loc 1 256 0
 433 0044 4FF4C061 		mov	r1, #1536
 434 0048 4FF09040 		mov	r0, #1207959552
 435              	.LVL29:
 436 004c FFF7FEFF 		bl	HAL_GPIO_DeInit
 437              	.LVL30:
 259:Core/Src/stm32g4xx_hal_msp.c **** 
 438              		.loc 1 259 0
 439 0050 A06F     		ldr	r0, [r4, #120]
 440 0052 FFF7FEFF 		bl	HAL_DMA_DeInit
 441              	.LVL31:
 262:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
 442              		.loc 1 262 0
 443 0056 2520     		movs	r0, #37
 444 0058 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 445              	.LVL32:
 446 005c DCE7     		b	.L19
 447              	.LVL33:
 448              	.L26:
 273:Core/Src/stm32g4xx_hal_msp.c **** 
 449              		.loc 1 273 0
 450 005e 02F5E632 		add	r2, r2, #117760
 451 0062 936D     		ldr	r3, [r2, #88]
 452 0064 23F40033 		bic	r3, r3, #131072
 453 0068 9365     		str	r3, [r2, #88]
 279:Core/Src/stm32g4xx_hal_msp.c **** 
 454              		.loc 1 279 0
 455 006a 1821     		movs	r1, #24
ARM GAS  /tmp/ccaQSkwV.s 			page 15


 456 006c 0748     		ldr	r0, .L27+12
 457              	.LVL34:
 458 006e FFF7FEFF 		bl	HAL_GPIO_DeInit
 459              	.LVL35:
 282:Core/Src/stm32g4xx_hal_msp.c **** 
 460              		.loc 1 282 0
 461 0072 A06F     		ldr	r0, [r4, #120]
 462 0074 FFF7FEFF 		bl	HAL_DMA_DeInit
 463              	.LVL36:
 285:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART2_MspDeInit 1 */
 464              		.loc 1 285 0
 465 0078 2620     		movs	r0, #38
 466 007a FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 467              	.LVL37:
 468              		.loc 1 291 0
 469 007e CBE7     		b	.L19
 470              	.L28:
 471              		.align	2
 472              	.L27:
 473 0080 00800040 		.word	1073774592
 474 0084 00380140 		.word	1073821696
 475 0088 00440040 		.word	1073759232
 476 008c 00040048 		.word	1207960576
 477              		.cfi_endproc
 478              	.LFE134:
 480              		.section	.text.HAL_TIM_Base_MspInit,"ax",%progbits
 481              		.align	1
 482              		.global	HAL_TIM_Base_MspInit
 483              		.syntax unified
 484              		.thumb
 485              		.thumb_func
 486              		.fpu fpv4-sp-d16
 488              	HAL_TIM_Base_MspInit:
 489              	.LFB135:
 292:Core/Src/stm32g4xx_hal_msp.c **** 
 293:Core/Src/stm32g4xx_hal_msp.c **** /**
 294:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
 295:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 296:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 297:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 298:Core/Src/stm32g4xx_hal_msp.c **** */
 299:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 300:Core/Src/stm32g4xx_hal_msp.c **** {
 490              		.loc 1 300 0
 491              		.cfi_startproc
 492              		@ args = 0, pretend = 0, frame = 8
 493              		@ frame_needed = 0, uses_anonymous_args = 0
 494              	.LVL38:
 301:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM7)
 495              		.loc 1 301 0
 496 0000 0268     		ldr	r2, [r0]
 497 0002 0E4B     		ldr	r3, .L36
 498 0004 9A42     		cmp	r2, r3
 499 0006 00D0     		beq	.L35
 500 0008 7047     		bx	lr
 501              	.L35:
 300:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM7)
ARM GAS  /tmp/ccaQSkwV.s 			page 16


 502              		.loc 1 300 0
 503 000a 00B5     		push	{lr}
 504              	.LCFI8:
 505              		.cfi_def_cfa_offset 4
 506              		.cfi_offset 14, -4
 507 000c 83B0     		sub	sp, sp, #12
 508              	.LCFI9:
 509              		.cfi_def_cfa_offset 16
 510              	.LBB10:
 302:Core/Src/stm32g4xx_hal_msp.c ****   {
 303:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 0 */
 304:Core/Src/stm32g4xx_hal_msp.c **** 
 305:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspInit 0 */
 306:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 307:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM7_CLK_ENABLE();
 511              		.loc 1 307 0
 512 000e 03F5FE33 		add	r3, r3, #130048
 513 0012 9A6D     		ldr	r2, [r3, #88]
 514 0014 42F02002 		orr	r2, r2, #32
 515 0018 9A65     		str	r2, [r3, #88]
 516 001a 9B6D     		ldr	r3, [r3, #88]
 517 001c 03F02003 		and	r3, r3, #32
 518 0020 0193     		str	r3, [sp, #4]
 519 0022 019B     		ldr	r3, [sp, #4]
 520              	.LBE10:
 308:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt Init */
 309:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
 521              		.loc 1 309 0
 522 0024 0022     		movs	r2, #0
 523 0026 1146     		mov	r1, r2
 524 0028 3720     		movs	r0, #55
 525              	.LVL39:
 526 002a FFF7FEFF 		bl	HAL_NVIC_SetPriority
 527              	.LVL40:
 310:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM7_IRQn);
 528              		.loc 1 310 0
 529 002e 3720     		movs	r0, #55
 530 0030 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 531              	.LVL41:
 311:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 1 */
 312:Core/Src/stm32g4xx_hal_msp.c **** 
 313:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspInit 1 */
 314:Core/Src/stm32g4xx_hal_msp.c ****   }
 315:Core/Src/stm32g4xx_hal_msp.c **** 
 316:Core/Src/stm32g4xx_hal_msp.c **** }
 532              		.loc 1 316 0
 533 0034 03B0     		add	sp, sp, #12
 534              	.LCFI10:
 535              		.cfi_def_cfa_offset 4
 536              		@ sp needed
 537 0036 5DF804FB 		ldr	pc, [sp], #4
 538              	.L37:
 539 003a 00BF     		.align	2
 540              	.L36:
 541 003c 00140040 		.word	1073746944
 542              		.cfi_endproc
 543              	.LFE135:
ARM GAS  /tmp/ccaQSkwV.s 			page 17


 545              		.section	.text.HAL_TIM_Base_MspDeInit,"ax",%progbits
 546              		.align	1
 547              		.global	HAL_TIM_Base_MspDeInit
 548              		.syntax unified
 549              		.thumb
 550              		.thumb_func
 551              		.fpu fpv4-sp-d16
 553              	HAL_TIM_Base_MspDeInit:
 554              	.LFB136:
 317:Core/Src/stm32g4xx_hal_msp.c **** 
 318:Core/Src/stm32g4xx_hal_msp.c **** /**
 319:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
 320:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 321:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 322:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 323:Core/Src/stm32g4xx_hal_msp.c **** */
 324:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
 325:Core/Src/stm32g4xx_hal_msp.c **** {
 555              		.loc 1 325 0
 556              		.cfi_startproc
 557              		@ args = 0, pretend = 0, frame = 0
 558              		@ frame_needed = 0, uses_anonymous_args = 0
 559              	.LVL42:
 560 0000 08B5     		push	{r3, lr}
 561              	.LCFI11:
 562              		.cfi_def_cfa_offset 8
 563              		.cfi_offset 3, -8
 564              		.cfi_offset 14, -4
 326:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM7)
 565              		.loc 1 326 0
 566 0002 0268     		ldr	r2, [r0]
 567 0004 064B     		ldr	r3, .L42
 568 0006 9A42     		cmp	r2, r3
 569 0008 00D0     		beq	.L41
 570              	.LVL43:
 571              	.L38:
 327:Core/Src/stm32g4xx_hal_msp.c ****   {
 328:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 0 */
 329:Core/Src/stm32g4xx_hal_msp.c **** 
 330:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspDeInit 0 */
 331:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 332:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM7_CLK_DISABLE();
 333:Core/Src/stm32g4xx_hal_msp.c **** 
 334:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt DeInit */
 335:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM7_IRQn);
 336:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 1 */
 337:Core/Src/stm32g4xx_hal_msp.c **** 
 338:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspDeInit 1 */
 339:Core/Src/stm32g4xx_hal_msp.c ****   }
 340:Core/Src/stm32g4xx_hal_msp.c **** 
 341:Core/Src/stm32g4xx_hal_msp.c **** }
 572              		.loc 1 341 0
 573 000a 08BD     		pop	{r3, pc}
 574              	.LVL44:
 575              	.L41:
 332:Core/Src/stm32g4xx_hal_msp.c **** 
 576              		.loc 1 332 0
ARM GAS  /tmp/ccaQSkwV.s 			page 18


 577 000c 054A     		ldr	r2, .L42+4
 578 000e 936D     		ldr	r3, [r2, #88]
 579 0010 23F02003 		bic	r3, r3, #32
 580 0014 9365     		str	r3, [r2, #88]
 335:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 1 */
 581              		.loc 1 335 0
 582 0016 3720     		movs	r0, #55
 583              	.LVL45:
 584 0018 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 585              	.LVL46:
 586              		.loc 1 341 0
 587 001c F5E7     		b	.L38
 588              	.L43:
 589 001e 00BF     		.align	2
 590              	.L42:
 591 0020 00140040 		.word	1073746944
 592 0024 00100240 		.word	1073876992
 593              		.cfi_endproc
 594              	.LFE136:
 596              		.text
 597              	.Letext0:
 598              		.file 2 "/usr/include/newlib/machine/_default_types.h"
 599              		.file 3 "/usr/include/newlib/sys/_stdint.h"
 600              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
 601              		.file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
 602              		.file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 603              		.file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 604              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
 605              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 606              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
 607              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 608              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 609              		.file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
 610              		.file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
 611              		.file 15 "Core/Inc/main.h"
 612              		.file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
ARM GAS  /tmp/ccaQSkwV.s 			page 19


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32g4xx_hal_msp.c
     /tmp/ccaQSkwV.s:18     .text.HAL_MspInit:0000000000000000 $t
     /tmp/ccaQSkwV.s:25     .text.HAL_MspInit:0000000000000000 HAL_MspInit
     /tmp/ccaQSkwV.s:72     .text.HAL_MspInit:0000000000000034 $d
     /tmp/ccaQSkwV.s:77     .text.HAL_UART_MspInit:0000000000000000 $t
     /tmp/ccaQSkwV.s:84     .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
     /tmp/ccaQSkwV.s:357    .text.HAL_UART_MspInit:0000000000000174 $d
     /tmp/ccaQSkwV.s:370    .text.HAL_UART_MspDeInit:0000000000000000 $t
     /tmp/ccaQSkwV.s:377    .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
     /tmp/ccaQSkwV.s:473    .text.HAL_UART_MspDeInit:0000000000000080 $d
     /tmp/ccaQSkwV.s:481    .text.HAL_TIM_Base_MspInit:0000000000000000 $t
     /tmp/ccaQSkwV.s:488    .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
     /tmp/ccaQSkwV.s:541    .text.HAL_TIM_Base_MspInit:000000000000003c $d
     /tmp/ccaQSkwV.s:546    .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
     /tmp/ccaQSkwV.s:553    .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
     /tmp/ccaQSkwV.s:591    .text.HAL_TIM_Base_MspDeInit:0000000000000020 $d

UNDEFINED SYMBOLS
HAL_PWREx_DisableUCPDDeadBattery
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_DMA_Init
Error_Handler
hdma_usart1_tx
hdma_usart2_tx
HAL_GPIO_DeInit
HAL_NVIC_DisableIRQ
HAL_DMA_DeInit
