ARM GAS  /tmp/cc8GRwsk.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 1
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"main.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.file 1 "Src/main.c"
  20              		.section	.text.MX_GPIO_Init,"ax",%progbits
  21              		.align	1
  22              		.syntax unified
  23              		.thumb
  24              		.thumb_func
  26              	MX_GPIO_Init:
  27              	.LFB341:
   1:Src/main.c    **** /* USER CODE BEGIN Header */
   2:Src/main.c    **** /**
   3:Src/main.c    ****   ******************************************************************************
   4:Src/main.c    ****   * @file           : main.c
   5:Src/main.c    ****   * @brief          : Main program body
   6:Src/main.c    ****   ******************************************************************************
   7:Src/main.c    ****   * @attention
   8:Src/main.c    ****   *
   9:Src/main.c    ****   * Copyright (c) 2022 STMicroelectronics.
  10:Src/main.c    ****   * All rights reserved.
  11:Src/main.c    ****   *
  12:Src/main.c    ****   * This software is licensed under terms that can be found in the LICENSE file
  13:Src/main.c    ****   * in the root directory of this software component.
  14:Src/main.c    ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Src/main.c    ****   *
  16:Src/main.c    ****   ******************************************************************************
  17:Src/main.c    ****   */
  18:Src/main.c    **** /* USER CODE END Header */
  19:Src/main.c    **** /* Includes ------------------------------------------------------------------*/
  20:Src/main.c    **** #include "main.h"
  21:Src/main.c    **** #include "usb_device.h"
  22:Src/main.c    **** 
  23:Src/main.c    **** /* Private includes ----------------------------------------------------------*/
  24:Src/main.c    **** /* USER CODE BEGIN Includes */
  25:Src/main.c    **** #include "si5351.h"
  26:Src/main.c    ****  
  27:Src/main.c    **** /* USER CODE END Includes */
  28:Src/main.c    **** 
  29:Src/main.c    **** /* Private typedef -----------------------------------------------------------*/
  30:Src/main.c    **** /* USER CODE BEGIN PTD */
  31:Src/main.c    **** 
ARM GAS  /tmp/cc8GRwsk.s 			page 2


  32:Src/main.c    **** /* USER CODE END PTD */
  33:Src/main.c    **** 
  34:Src/main.c    **** /* Private define ------------------------------------------------------------*/
  35:Src/main.c    **** /* USER CODE BEGIN PD */
  36:Src/main.c    **** /* USER CODE END PD */
  37:Src/main.c    **** 
  38:Src/main.c    **** /* Private macro -------------------------------------------------------------*/
  39:Src/main.c    **** /* USER CODE BEGIN PM */
  40:Src/main.c    **** 
  41:Src/main.c    **** /* USER CODE END PM */
  42:Src/main.c    **** 
  43:Src/main.c    **** /* Private variables ---------------------------------------------------------*/
  44:Src/main.c    **** ADC_HandleTypeDef hadc1;
  45:Src/main.c    **** ADC_HandleTypeDef hadc2;
  46:Src/main.c    **** 
  47:Src/main.c    **** I2C_HandleTypeDef hi2c1;
  48:Src/main.c    **** 
  49:Src/main.c    **** TIM_HandleTypeDef htim2;
  50:Src/main.c    **** TIM_HandleTypeDef htim3;
  51:Src/main.c    **** 
  52:Src/main.c    **** UART_HandleTypeDef huart1;
  53:Src/main.c    **** 
  54:Src/main.c    **** /* USER CODE BEGIN PV */
  55:Src/main.c    **** 
  56:Src/main.c    **** /* USER CODE END PV */
  57:Src/main.c    **** 
  58:Src/main.c    **** /* Private function prototypes -----------------------------------------------*/
  59:Src/main.c    **** void SystemClock_Config(void);
  60:Src/main.c    **** static void MX_GPIO_Init(void);
  61:Src/main.c    **** static void MX_TIM2_Init(void);
  62:Src/main.c    **** static void MX_I2C1_Init(void);
  63:Src/main.c    **** static void MX_TIM3_Init(void);
  64:Src/main.c    **** static void MX_ADC1_Init(void);
  65:Src/main.c    **** static void MX_ADC2_Init(void);
  66:Src/main.c    **** static void MX_USART1_UART_Init(void);
  67:Src/main.c    **** /* USER CODE BEGIN PFP */
  68:Src/main.c    **** 
  69:Src/main.c    **** /* USER CODE END PFP */
  70:Src/main.c    **** 
  71:Src/main.c    **** /* Private user code ---------------------------------------------------------*/
  72:Src/main.c    **** /* USER CODE BEGIN 0 */
  73:Src/main.c    **** 
  74:Src/main.c    **** /* USER CODE END 0 */
  75:Src/main.c    **** 
  76:Src/main.c    **** /**
  77:Src/main.c    ****   * @brief  The application entry point.
  78:Src/main.c    ****   * @retval int
  79:Src/main.c    ****   */
  80:Src/main.c    **** int main(void)
  81:Src/main.c    **** {
  82:Src/main.c    ****   /* USER CODE BEGIN 1 */
  83:Src/main.c    **** 
  84:Src/main.c    ****   /* USER CODE END 1 */
  85:Src/main.c    **** 
  86:Src/main.c    ****   /* MCU Configuration--------------------------------------------------------*/
  87:Src/main.c    **** 
  88:Src/main.c    ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
ARM GAS  /tmp/cc8GRwsk.s 			page 3


  89:Src/main.c    ****   HAL_Init();
  90:Src/main.c    **** 
  91:Src/main.c    ****   /* USER CODE BEGIN Init */
  92:Src/main.c    **** 
  93:Src/main.c    ****   /* USER CODE END Init */
  94:Src/main.c    **** 
  95:Src/main.c    ****   /* Configure the system clock */
  96:Src/main.c    ****   SystemClock_Config();
  97:Src/main.c    **** 
  98:Src/main.c    ****   /* USER CODE BEGIN SysInit */
  99:Src/main.c    **** 
 100:Src/main.c    ****   /* USER CODE END SysInit */
 101:Src/main.c    **** 
 102:Src/main.c    ****   /* Initialize all configured peripherals */
 103:Src/main.c    ****   MX_GPIO_Init();
 104:Src/main.c    ****   MX_TIM2_Init();
 105:Src/main.c    ****   MX_I2C1_Init();
 106:Src/main.c    ****   MX_TIM3_Init();
 107:Src/main.c    ****   MX_ADC1_Init();
 108:Src/main.c    ****   MX_ADC2_Init();
 109:Src/main.c    ****   MX_USART1_UART_Init();
 110:Src/main.c    ****   MX_USB_Device_Init();
 111:Src/main.c    ****   /* USER CODE BEGIN 2 */
 112:Src/main.c    **** 
 113:Src/main.c    ****    HAL_TIM_Base_Start_IT(&htim2);
 114:Src/main.c    ****    HAL_TIM_Base_Start_IT(&htim3);
 115:Src/main.c    **** 
 116:Src/main.c    **** 	HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
 117:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
 118:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
 119:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
 120:Src/main.c    **** 
 121:Src/main.c    **** 	HAL_Delay(10);
 122:Src/main.c    **** 	si5351_initialize();
 123:Src/main.c    ****         HAL_Delay(10);
 124:Src/main.c    ****         si5351_on_clk(0);
 125:Src/main.c    ****         si5351_on_clk(1);
 126:Src/main.c    ****         si5351_set_frequency(1000000,0);
 127:Src/main.c    ****         si5351_set_frequency(1000000,1);
 128:Src/main.c    **** 
 129:Src/main.c    ****   /* USER CODE END 2 */
 130:Src/main.c    **** 
 131:Src/main.c    ****   /* Infinite loop */
 132:Src/main.c    ****   /* USER CODE BEGIN WHILE */
 133:Src/main.c    ****   while (1)
 134:Src/main.c    ****   {
 135:Src/main.c    ****     /* USER CODE END WHILE */
 136:Src/main.c    **** 
 137:Src/main.c    ****     /* USER CODE BEGIN 3 */
 138:Src/main.c    **** //	HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
 139:Src/main.c    **** 
 140:Src/main.c    **** //                TIM2->CCR1 = pwm_value > 1024 ? 1024 : pwm_value;
 141:Src/main.c    **** //                TIM2->CCR2 = pwm_value > 2048 ? 1024 : sat_sub(pwm_value,1024) & 1023;
 142:Src/main.c    **** //                TIM2->CCR3 = pwm_value > 3072 ? 1024 : sat_sub(pwm_value,2048) & 1023;
 143:Src/main.c    **** //                TIM2->CCR4 = pwm_value > 4096 ? 1024 : sat_sub(pwm_value,3072) & 1023;
 144:Src/main.c    ****         HAL_Delay(10);
 145:Src/main.c    ****         si5351_set_frequency(1000000,0);
ARM GAS  /tmp/cc8GRwsk.s 			page 4


 146:Src/main.c    ****         si5351_set_frequency(1000000,1);
 147:Src/main.c    **** 
 148:Src/main.c    ****   }
 149:Src/main.c    ****   /* USER CODE END 3 */
 150:Src/main.c    **** }
 151:Src/main.c    **** 
 152:Src/main.c    **** /**
 153:Src/main.c    ****   * @brief System Clock Configuration
 154:Src/main.c    ****   * @retval None
 155:Src/main.c    ****   */
 156:Src/main.c    **** void SystemClock_Config(void)
 157:Src/main.c    **** {
 158:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 159:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 160:Src/main.c    **** 
 161:Src/main.c    ****   /** Configure the main internal regulator output voltage
 162:Src/main.c    ****   */
 163:Src/main.c    ****   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
 164:Src/main.c    **** 
 165:Src/main.c    ****   /** Initializes the RCC Oscillators according to the specified parameters
 166:Src/main.c    ****   * in the RCC_OscInitTypeDef structure.
 167:Src/main.c    ****   */
 168:Src/main.c    ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
 169:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 170:Src/main.c    ****   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 171:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 172:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 173:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 174:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 32;
 175:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 176:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 177:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 178:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 179:Src/main.c    ****   {
 180:Src/main.c    ****     Error_Handler();
 181:Src/main.c    ****   }
 182:Src/main.c    **** 
 183:Src/main.c    ****   /** Initializes the CPU, AHB and APB buses clocks
 184:Src/main.c    ****   */
 185:Src/main.c    ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 186:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 187:Src/main.c    ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 188:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 189:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 190:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 191:Src/main.c    **** 
 192:Src/main.c    ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
 193:Src/main.c    ****   {
 194:Src/main.c    ****     Error_Handler();
 195:Src/main.c    ****   }
 196:Src/main.c    ****   HAL_RCC_MCOConfig(RCC_MCO_PG10, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
 197:Src/main.c    **** }
 198:Src/main.c    **** 
 199:Src/main.c    **** /**
 200:Src/main.c    ****   * @brief ADC1 Initialization Function
 201:Src/main.c    ****   * @param None
 202:Src/main.c    ****   * @retval None
ARM GAS  /tmp/cc8GRwsk.s 			page 5


 203:Src/main.c    ****   */
 204:Src/main.c    **** static void MX_ADC1_Init(void)
 205:Src/main.c    **** {
 206:Src/main.c    **** 
 207:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 0 */
 208:Src/main.c    **** 
 209:Src/main.c    ****   /* USER CODE END ADC1_Init 0 */
 210:Src/main.c    **** 
 211:Src/main.c    ****   ADC_MultiModeTypeDef multimode = {0};
 212:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 213:Src/main.c    **** 
 214:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 1 */
 215:Src/main.c    **** 
 216:Src/main.c    ****   /* USER CODE END ADC1_Init 1 */
 217:Src/main.c    **** 
 218:Src/main.c    ****   /** Common config
 219:Src/main.c    ****   */
 220:Src/main.c    ****   hadc1.Instance = ADC1;
 221:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 222:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 223:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 224:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 225:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 226:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 227:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 228:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 229:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 230:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 231:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 232:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 233:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 234:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 235:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
 236:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 237:Src/main.c    ****   {
 238:Src/main.c    ****     Error_Handler();
 239:Src/main.c    ****   }
 240:Src/main.c    **** 
 241:Src/main.c    ****   /** Configure the ADC multi-mode
 242:Src/main.c    ****   */
 243:Src/main.c    ****   multimode.Mode = ADC_MODE_INDEPENDENT;
 244:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 245:Src/main.c    ****   {
 246:Src/main.c    ****     Error_Handler();
 247:Src/main.c    ****   }
 248:Src/main.c    **** 
 249:Src/main.c    ****   /** Configure Regular Channel
 250:Src/main.c    ****   */
 251:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_15;
 252:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 253:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
 254:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 255:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 256:Src/main.c    ****   sConfig.Offset = 0;
 257:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 258:Src/main.c    ****   {
 259:Src/main.c    ****     Error_Handler();
ARM GAS  /tmp/cc8GRwsk.s 			page 6


 260:Src/main.c    ****   }
 261:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 2 */
 262:Src/main.c    **** 
 263:Src/main.c    ****   /* USER CODE END ADC1_Init 2 */
 264:Src/main.c    **** 
 265:Src/main.c    **** }
 266:Src/main.c    **** 
 267:Src/main.c    **** /**
 268:Src/main.c    ****   * @brief ADC2 Initialization Function
 269:Src/main.c    ****   * @param None
 270:Src/main.c    ****   * @retval None
 271:Src/main.c    ****   */
 272:Src/main.c    **** static void MX_ADC2_Init(void)
 273:Src/main.c    **** {
 274:Src/main.c    **** 
 275:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 0 */
 276:Src/main.c    **** 
 277:Src/main.c    ****   /* USER CODE END ADC2_Init 0 */
 278:Src/main.c    **** 
 279:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 280:Src/main.c    **** 
 281:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 1 */
 282:Src/main.c    **** 
 283:Src/main.c    ****   /* USER CODE END ADC2_Init 1 */
 284:Src/main.c    **** 
 285:Src/main.c    ****   /** Common config
 286:Src/main.c    ****   */
 287:Src/main.c    ****   hadc2.Instance = ADC2;
 288:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 289:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 290:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 291:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 292:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 293:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 294:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 295:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 296:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 297:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 298:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 299:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 300:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 301:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 302:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 303:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
 304:Src/main.c    ****   {
 305:Src/main.c    ****     Error_Handler();
 306:Src/main.c    ****   }
 307:Src/main.c    **** 
 308:Src/main.c    ****   /** Configure Regular Channel
 309:Src/main.c    ****   */
 310:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_3;
 311:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 312:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
 313:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 314:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 315:Src/main.c    ****   sConfig.Offset = 0;
 316:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
ARM GAS  /tmp/cc8GRwsk.s 			page 7


 317:Src/main.c    ****   {
 318:Src/main.c    ****     Error_Handler();
 319:Src/main.c    ****   }
 320:Src/main.c    **** 
 321:Src/main.c    ****   /** Configure Regular Channel
 322:Src/main.c    ****   */
 323:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
 324:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 325:Src/main.c    ****   {
 326:Src/main.c    ****     Error_Handler();
 327:Src/main.c    ****   }
 328:Src/main.c    **** 
 329:Src/main.c    ****   /** Configure Regular Channel
 330:Src/main.c    ****   */
 331:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
 332:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 333:Src/main.c    ****   {
 334:Src/main.c    ****     Error_Handler();
 335:Src/main.c    ****   }
 336:Src/main.c    **** 
 337:Src/main.c    ****   /** Configure Regular Channel
 338:Src/main.c    ****   */
 339:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
 340:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 341:Src/main.c    ****   {
 342:Src/main.c    ****     Error_Handler();
 343:Src/main.c    ****   }
 344:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 2 */
 345:Src/main.c    **** 
 346:Src/main.c    ****   /* USER CODE END ADC2_Init 2 */
 347:Src/main.c    **** 
 348:Src/main.c    **** }
 349:Src/main.c    **** 
 350:Src/main.c    **** /**
 351:Src/main.c    ****   * @brief I2C1 Initialization Function
 352:Src/main.c    ****   * @param None
 353:Src/main.c    ****   * @retval None
 354:Src/main.c    ****   */
 355:Src/main.c    **** static void MX_I2C1_Init(void)
 356:Src/main.c    **** {
 357:Src/main.c    **** 
 358:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 0 */
 359:Src/main.c    **** 
 360:Src/main.c    ****   /* USER CODE END I2C1_Init 0 */
 361:Src/main.c    **** 
 362:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 1 */
 363:Src/main.c    **** 
 364:Src/main.c    ****   /* USER CODE END I2C1_Init 1 */
 365:Src/main.c    ****   hi2c1.Instance = I2C1;
 366:Src/main.c    ****   hi2c1.Init.Timing = 0x208080C1;
 367:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 368:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 369:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 370:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 371:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 372:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 373:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
ARM GAS  /tmp/cc8GRwsk.s 			page 8


 374:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 375:Src/main.c    ****   {
 376:Src/main.c    ****     Error_Handler();
 377:Src/main.c    ****   }
 378:Src/main.c    **** 
 379:Src/main.c    ****   /** Configure Analogue filter
 380:Src/main.c    ****   */
 381:Src/main.c    ****   if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
 382:Src/main.c    ****   {
 383:Src/main.c    ****     Error_Handler();
 384:Src/main.c    ****   }
 385:Src/main.c    **** 
 386:Src/main.c    ****   /** Configure Digital filter
 387:Src/main.c    ****   */
 388:Src/main.c    ****   if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
 389:Src/main.c    ****   {
 390:Src/main.c    ****     Error_Handler();
 391:Src/main.c    ****   }
 392:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 2 */
 393:Src/main.c    **** 
 394:Src/main.c    ****   /* USER CODE END I2C1_Init 2 */
 395:Src/main.c    **** 
 396:Src/main.c    **** }
 397:Src/main.c    **** 
 398:Src/main.c    **** /**
 399:Src/main.c    ****   * @brief TIM2 Initialization Function
 400:Src/main.c    ****   * @param None
 401:Src/main.c    ****   * @retval None
 402:Src/main.c    ****   */
 403:Src/main.c    **** static void MX_TIM2_Init(void)
 404:Src/main.c    **** {
 405:Src/main.c    **** 
 406:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 0 */
 407:Src/main.c    **** 
 408:Src/main.c    ****   /* USER CODE END TIM2_Init 0 */
 409:Src/main.c    **** 
 410:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
 411:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 412:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 413:Src/main.c    **** 
 414:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 1 */
 415:Src/main.c    **** 
 416:Src/main.c    ****   /* USER CODE END TIM2_Init 1 */
 417:Src/main.c    ****   htim2.Instance = TIM2;
 418:Src/main.c    ****   htim2.Init.Prescaler = 0;
 419:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 420:Src/main.c    ****   htim2.Init.Period = 2047;
 421:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 422:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 423:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 424:Src/main.c    ****   {
 425:Src/main.c    ****     Error_Handler();
 426:Src/main.c    ****   }
 427:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
 428:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 429:Src/main.c    ****   {
 430:Src/main.c    ****     Error_Handler();
ARM GAS  /tmp/cc8GRwsk.s 			page 9


 431:Src/main.c    ****   }
 432:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
 433:Src/main.c    ****   {
 434:Src/main.c    ****     Error_Handler();
 435:Src/main.c    ****   }
 436:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 437:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 438:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 439:Src/main.c    ****   {
 440:Src/main.c    ****     Error_Handler();
 441:Src/main.c    ****   }
 442:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
 443:Src/main.c    ****   sConfigOC.Pulse = 500;
 444:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 445:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 446:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 447:Src/main.c    ****   {
 448:Src/main.c    ****     Error_Handler();
 449:Src/main.c    ****   }
 450:Src/main.c    ****   sConfigOC.Pulse = 1000;
 451:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
 452:Src/main.c    ****   {
 453:Src/main.c    ****     Error_Handler();
 454:Src/main.c    ****   }
 455:Src/main.c    ****   sConfigOC.Pulse = 1500;
 456:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 457:Src/main.c    ****   {
 458:Src/main.c    ****     Error_Handler();
 459:Src/main.c    ****   }
 460:Src/main.c    ****   sConfigOC.Pulse = 2000;
 461:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 462:Src/main.c    ****   {
 463:Src/main.c    ****     Error_Handler();
 464:Src/main.c    ****   }
 465:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
 466:Src/main.c    **** 
 467:Src/main.c    ****   /* USER CODE END TIM2_Init 2 */
 468:Src/main.c    ****   HAL_TIM_MspPostInit(&htim2);
 469:Src/main.c    **** 
 470:Src/main.c    **** }
 471:Src/main.c    **** 
 472:Src/main.c    **** /**
 473:Src/main.c    ****   * @brief TIM3 Initialization Function
 474:Src/main.c    ****   * @param None
 475:Src/main.c    ****   * @retval None
 476:Src/main.c    ****   */
 477:Src/main.c    **** static void MX_TIM3_Init(void)
 478:Src/main.c    **** {
 479:Src/main.c    **** 
 480:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 0 */
 481:Src/main.c    **** 
 482:Src/main.c    ****   /* USER CODE END TIM3_Init 0 */
 483:Src/main.c    **** 
 484:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
 485:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 486:Src/main.c    **** 
 487:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 1 */
ARM GAS  /tmp/cc8GRwsk.s 			page 10


 488:Src/main.c    **** 
 489:Src/main.c    ****   /* USER CODE END TIM3_Init 1 */
 490:Src/main.c    ****   htim3.Instance = TIM3;
 491:Src/main.c    ****   htim3.Init.Prescaler = 49152;
 492:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 493:Src/main.c    ****   htim3.Init.Period = 199;
 494:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 495:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 496:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 497:Src/main.c    ****   {
 498:Src/main.c    ****     Error_Handler();
 499:Src/main.c    ****   }
 500:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
 501:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 502:Src/main.c    ****   {
 503:Src/main.c    ****     Error_Handler();
 504:Src/main.c    ****   }
 505:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 506:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 507:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 508:Src/main.c    ****   {
 509:Src/main.c    ****     Error_Handler();
 510:Src/main.c    ****   }
 511:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 2 */
 512:Src/main.c    **** 
 513:Src/main.c    ****   /* USER CODE END TIM3_Init 2 */
 514:Src/main.c    **** 
 515:Src/main.c    **** }
 516:Src/main.c    **** 
 517:Src/main.c    **** /**
 518:Src/main.c    ****   * @brief USART1 Initialization Function
 519:Src/main.c    ****   * @param None
 520:Src/main.c    ****   * @retval None
 521:Src/main.c    ****   */
 522:Src/main.c    **** static void MX_USART1_UART_Init(void)
 523:Src/main.c    **** {
 524:Src/main.c    **** 
 525:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 0 */
 526:Src/main.c    **** 
 527:Src/main.c    ****   /* USER CODE END USART1_Init 0 */
 528:Src/main.c    **** 
 529:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 1 */
 530:Src/main.c    **** 
 531:Src/main.c    ****   /* USER CODE END USART1_Init 1 */
 532:Src/main.c    ****   huart1.Instance = USART1;
 533:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 534:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 535:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 536:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 537:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 538:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 539:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 540:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 541:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 542:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 543:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 544:Src/main.c    ****   {
ARM GAS  /tmp/cc8GRwsk.s 			page 11


 545:Src/main.c    ****     Error_Handler();
 546:Src/main.c    ****   }
 547:Src/main.c    ****   if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 548:Src/main.c    ****   {
 549:Src/main.c    ****     Error_Handler();
 550:Src/main.c    ****   }
 551:Src/main.c    ****   if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 552:Src/main.c    ****   {
 553:Src/main.c    ****     Error_Handler();
 554:Src/main.c    ****   }
 555:Src/main.c    ****   if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 556:Src/main.c    ****   {
 557:Src/main.c    ****     Error_Handler();
 558:Src/main.c    ****   }
 559:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
 560:Src/main.c    **** 
 561:Src/main.c    ****   /* USER CODE END USART1_Init 2 */
 562:Src/main.c    **** 
 563:Src/main.c    **** }
 564:Src/main.c    **** 
 565:Src/main.c    **** /**
 566:Src/main.c    ****   * @brief GPIO Initialization Function
 567:Src/main.c    ****   * @param None
 568:Src/main.c    ****   * @retval None
 569:Src/main.c    ****   */
 570:Src/main.c    **** static void MX_GPIO_Init(void)
 571:Src/main.c    **** {
  28              		.loc 1 571 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 40
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32 0000 00B5     		push	{lr}
  33              	.LCFI0:
  34              		.cfi_def_cfa_offset 4
  35              		.cfi_offset 14, -4
  36 0002 8BB0     		sub	sp, sp, #44
  37              	.LCFI1:
  38              		.cfi_def_cfa_offset 48
 572:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
  39              		.loc 1 572 3 view .LVU1
  40              		.loc 1 572 20 is_stmt 0 view .LVU2
  41 0004 0023     		movs	r3, #0
  42 0006 0593     		str	r3, [sp, #20]
  43 0008 0693     		str	r3, [sp, #24]
  44 000a 0793     		str	r3, [sp, #28]
  45 000c 0893     		str	r3, [sp, #32]
  46 000e 0993     		str	r3, [sp, #36]
 573:Src/main.c    **** /* USER CODE BEGIN MX_GPIO_Init_1 */
 574:Src/main.c    **** /* USER CODE END MX_GPIO_Init_1 */
 575:Src/main.c    **** 
 576:Src/main.c    ****   /* GPIO Ports Clock Enable */
 577:Src/main.c    ****   __HAL_RCC_GPIOF_CLK_ENABLE();
  47              		.loc 1 577 3 is_stmt 1 view .LVU3
  48              	.LBB4:
  49              		.loc 1 577 3 view .LVU4
  50              		.loc 1 577 3 view .LVU5
  51 0010 03F18043 		add	r3, r3, #1073741824
ARM GAS  /tmp/cc8GRwsk.s 			page 12


  52 0014 03F50433 		add	r3, r3, #135168
  53 0018 DA6C     		ldr	r2, [r3, #76]
  54 001a 42F02002 		orr	r2, r2, #32
  55 001e DA64     		str	r2, [r3, #76]
  56              		.loc 1 577 3 view .LVU6
  57 0020 DA6C     		ldr	r2, [r3, #76]
  58 0022 02F02002 		and	r2, r2, #32
  59 0026 0192     		str	r2, [sp, #4]
  60              		.loc 1 577 3 view .LVU7
  61 0028 019A     		ldr	r2, [sp, #4]
  62              	.LBE4:
  63              		.loc 1 577 3 view .LVU8
 578:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
  64              		.loc 1 578 3 view .LVU9
  65              	.LBB5:
  66              		.loc 1 578 3 view .LVU10
  67              		.loc 1 578 3 view .LVU11
  68 002a DA6C     		ldr	r2, [r3, #76]
  69 002c 42F04002 		orr	r2, r2, #64
  70 0030 DA64     		str	r2, [r3, #76]
  71              		.loc 1 578 3 view .LVU12
  72 0032 DA6C     		ldr	r2, [r3, #76]
  73 0034 02F04002 		and	r2, r2, #64
  74 0038 0292     		str	r2, [sp, #8]
  75              		.loc 1 578 3 view .LVU13
  76 003a 029A     		ldr	r2, [sp, #8]
  77              	.LBE5:
  78              		.loc 1 578 3 view .LVU14
 579:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
  79              		.loc 1 579 3 view .LVU15
  80              	.LBB6:
  81              		.loc 1 579 3 view .LVU16
  82              		.loc 1 579 3 view .LVU17
  83 003c DA6C     		ldr	r2, [r3, #76]
  84 003e 42F00102 		orr	r2, r2, #1
  85 0042 DA64     		str	r2, [r3, #76]
  86              		.loc 1 579 3 view .LVU18
  87 0044 DA6C     		ldr	r2, [r3, #76]
  88 0046 02F00102 		and	r2, r2, #1
  89 004a 0392     		str	r2, [sp, #12]
  90              		.loc 1 579 3 view .LVU19
  91 004c 039A     		ldr	r2, [sp, #12]
  92              	.LBE6:
  93              		.loc 1 579 3 view .LVU20
 580:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
  94              		.loc 1 580 3 view .LVU21
  95              	.LBB7:
  96              		.loc 1 580 3 view .LVU22
  97              		.loc 1 580 3 view .LVU23
  98 004e DA6C     		ldr	r2, [r3, #76]
  99 0050 42F00202 		orr	r2, r2, #2
 100 0054 DA64     		str	r2, [r3, #76]
 101              		.loc 1 580 3 view .LVU24
 102 0056 DB6C     		ldr	r3, [r3, #76]
 103 0058 03F00203 		and	r3, r3, #2
 104 005c 0493     		str	r3, [sp, #16]
 105              		.loc 1 580 3 view .LVU25
ARM GAS  /tmp/cc8GRwsk.s 			page 13


 106 005e 049B     		ldr	r3, [sp, #16]
 107              	.LBE7:
 108              		.loc 1 580 3 view .LVU26
 581:Src/main.c    **** 
 582:Src/main.c    ****   /*Configure GPIO pin : PG10 */
 583:Src/main.c    ****   GPIO_InitStruct.Pin = GPIO_PIN_10;
 109              		.loc 1 583 3 view .LVU27
 110              		.loc 1 583 23 is_stmt 0 view .LVU28
 111 0060 4FF48063 		mov	r3, #1024
 112 0064 0593     		str	r3, [sp, #20]
 584:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 113              		.loc 1 584 3 is_stmt 1 view .LVU29
 114              		.loc 1 584 24 is_stmt 0 view .LVU30
 115 0066 0223     		movs	r3, #2
 116 0068 0693     		str	r3, [sp, #24]
 585:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 117              		.loc 1 585 3 is_stmt 1 view .LVU31
 586:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 118              		.loc 1 586 3 view .LVU32
 587:Src/main.c    ****   GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 119              		.loc 1 587 3 view .LVU33
 588:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 120              		.loc 1 588 3 view .LVU34
 121 006a 05A9     		add	r1, sp, #20
 122 006c 0248     		ldr	r0, .L3
 123 006e FFF7FEFF 		bl	HAL_GPIO_Init
 124              	.LVL0:
 589:Src/main.c    **** 
 590:Src/main.c    **** /* USER CODE BEGIN MX_GPIO_Init_2 */
 591:Src/main.c    **** /* USER CODE END MX_GPIO_Init_2 */
 592:Src/main.c    **** }
 125              		.loc 1 592 1 is_stmt 0 view .LVU35
 126 0072 0BB0     		add	sp, sp, #44
 127              	.LCFI2:
 128              		.cfi_def_cfa_offset 4
 129              		@ sp needed
 130 0074 5DF804FB 		ldr	pc, [sp], #4
 131              	.L4:
 132              		.align	2
 133              	.L3:
 134 0078 00180048 		.word	1207965696
 135              		.cfi_endproc
 136              	.LFE341:
 138              		.section	.text.Error_Handler,"ax",%progbits
 139              		.align	1
 140              		.global	Error_Handler
 141              		.syntax unified
 142              		.thumb
 143              		.thumb_func
 145              	Error_Handler:
 146              	.LFB342:
 593:Src/main.c    **** 
 594:Src/main.c    **** /* USER CODE BEGIN 4 */
 595:Src/main.c    **** 
 596:Src/main.c    **** /* USER CODE END 4 */
 597:Src/main.c    **** 
 598:Src/main.c    **** /**
ARM GAS  /tmp/cc8GRwsk.s 			page 14


 599:Src/main.c    ****   * @brief  This function is executed in case of error occurrence.
 600:Src/main.c    ****   * @retval None
 601:Src/main.c    ****   */
 602:Src/main.c    **** void Error_Handler(void)
 603:Src/main.c    **** {
 147              		.loc 1 603 1 is_stmt 1 view -0
 148              		.cfi_startproc
 149              		@ Volatile: function does not return.
 150              		@ args = 0, pretend = 0, frame = 0
 151              		@ frame_needed = 0, uses_anonymous_args = 0
 152              		@ link register save eliminated.
 604:Src/main.c    ****   /* USER CODE BEGIN Error_Handler_Debug */
 605:Src/main.c    ****   /* User can add his own implementation to report the HAL error return state */
 606:Src/main.c    ****   __disable_irq();
 153              		.loc 1 606 3 view .LVU37
 154              	.LBB8:
 155              	.LBI8:
 156              		.file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V5.2.0
   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     08. May 2019
   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
   8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
   9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  16:Drivers/CMSIS/Include/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  18:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
  23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  36:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  38:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
ARM GAS  /tmp/cc8GRwsk.s 			page 15


  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ASM
  41:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __INLINE
  44:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE                 
  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
  52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
  56:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __WEAK
  59:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED
  62:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Drivers/CMSIS/Include/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
ARM GAS  /tmp/cc8GRwsk.s 			page 16


  97:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Drivers/CMSIS/Include/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Drivers/CMSIS/Include/cmsis_gcc.h ****            in the used linker script.
 129:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 130:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 133:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 135:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 136:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t const* src;
 137:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 138:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 139:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __copy_table_t;
 140:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 141:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 142:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 143:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 144:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __zero_table_t;
 145:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 146:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 151:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
ARM GAS  /tmp/cc8GRwsk.s 			page 17


 154:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 155:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 156:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 157:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 161:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 162:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 163:Drivers/CMSIS/Include/cmsis_gcc.h ****   _start();
 164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 165:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 187:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 188:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 189:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 192:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 193:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
 194:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 195:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 198:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 204:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
 205:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 206:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 157              		.loc 2 207 27 view .LVU38
 158              	.LBB9:
 208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS  /tmp/cc8GRwsk.s 			page 18


 209:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 159              		.loc 2 209 3 view .LVU39
 160              		.syntax unified
 161              	@ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
 162 0000 72B6     		cpsid i
 163              	@ 0 "" 2
 164              		.thumb
 165              		.syntax unified
 166              	.L6:
 167              	.LBE9:
 168              	.LBE8:
 607:Src/main.c    ****   while (1)
 169              		.loc 1 607 3 discriminator 1 view .LVU40
 608:Src/main.c    ****   {
 609:Src/main.c    ****   }
 170              		.loc 1 609 3 discriminator 1 view .LVU41
 607:Src/main.c    ****   while (1)
 171              		.loc 1 607 9 discriminator 1 view .LVU42
 172 0002 FEE7     		b	.L6
 173              		.cfi_endproc
 174              	.LFE342:
 176              		.section	.text.MX_TIM2_Init,"ax",%progbits
 177              		.align	1
 178              		.syntax unified
 179              		.thumb
 180              		.thumb_func
 182              	MX_TIM2_Init:
 183              	.LFB338:
 404:Src/main.c    **** 
 184              		.loc 1 404 1 view -0
 185              		.cfi_startproc
 186              		@ args = 0, pretend = 0, frame = 56
 187              		@ frame_needed = 0, uses_anonymous_args = 0
 188 0000 00B5     		push	{lr}
 189              	.LCFI3:
 190              		.cfi_def_cfa_offset 4
 191              		.cfi_offset 14, -4
 192 0002 8FB0     		sub	sp, sp, #60
 193              	.LCFI4:
 194              		.cfi_def_cfa_offset 64
 410:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 195              		.loc 1 410 3 view .LVU44
 410:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 196              		.loc 1 410 26 is_stmt 0 view .LVU45
 197 0004 0023     		movs	r3, #0
 198 0006 0A93     		str	r3, [sp, #40]
 199 0008 0B93     		str	r3, [sp, #44]
 200 000a 0C93     		str	r3, [sp, #48]
 201 000c 0D93     		str	r3, [sp, #52]
 411:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 202              		.loc 1 411 3 is_stmt 1 view .LVU46
 411:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 203              		.loc 1 411 27 is_stmt 0 view .LVU47
 204 000e 0793     		str	r3, [sp, #28]
 205 0010 0893     		str	r3, [sp, #32]
 206 0012 0993     		str	r3, [sp, #36]
 412:Src/main.c    **** 
ARM GAS  /tmp/cc8GRwsk.s 			page 19


 207              		.loc 1 412 3 is_stmt 1 view .LVU48
 412:Src/main.c    **** 
 208              		.loc 1 412 22 is_stmt 0 view .LVU49
 209 0014 0093     		str	r3, [sp]
 210 0016 0193     		str	r3, [sp, #4]
 211 0018 0293     		str	r3, [sp, #8]
 212 001a 0393     		str	r3, [sp, #12]
 213 001c 0493     		str	r3, [sp, #16]
 214 001e 0593     		str	r3, [sp, #20]
 215 0020 0693     		str	r3, [sp, #24]
 417:Src/main.c    ****   htim2.Init.Prescaler = 0;
 216              		.loc 1 417 3 is_stmt 1 view .LVU50
 417:Src/main.c    ****   htim2.Init.Prescaler = 0;
 217              		.loc 1 417 18 is_stmt 0 view .LVU51
 218 0022 3248     		ldr	r0, .L25
 219 0024 4FF08042 		mov	r2, #1073741824
 220 0028 0260     		str	r2, [r0]
 418:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 221              		.loc 1 418 3 is_stmt 1 view .LVU52
 418:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 222              		.loc 1 418 24 is_stmt 0 view .LVU53
 223 002a 4360     		str	r3, [r0, #4]
 419:Src/main.c    ****   htim2.Init.Period = 2047;
 224              		.loc 1 419 3 is_stmt 1 view .LVU54
 419:Src/main.c    ****   htim2.Init.Period = 2047;
 225              		.loc 1 419 26 is_stmt 0 view .LVU55
 226 002c 8360     		str	r3, [r0, #8]
 420:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 227              		.loc 1 420 3 is_stmt 1 view .LVU56
 420:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 228              		.loc 1 420 21 is_stmt 0 view .LVU57
 229 002e 40F2FF72 		movw	r2, #2047
 230 0032 C260     		str	r2, [r0, #12]
 421:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 231              		.loc 1 421 3 is_stmt 1 view .LVU58
 421:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 232              		.loc 1 421 28 is_stmt 0 view .LVU59
 233 0034 0361     		str	r3, [r0, #16]
 422:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 234              		.loc 1 422 3 is_stmt 1 view .LVU60
 422:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 235              		.loc 1 422 32 is_stmt 0 view .LVU61
 236 0036 8361     		str	r3, [r0, #24]
 423:Src/main.c    ****   {
 237              		.loc 1 423 3 is_stmt 1 view .LVU62
 423:Src/main.c    ****   {
 238              		.loc 1 423 7 is_stmt 0 view .LVU63
 239 0038 FFF7FEFF 		bl	HAL_TIM_Base_Init
 240              	.LVL1:
 423:Src/main.c    ****   {
 241              		.loc 1 423 6 view .LVU64
 242 003c 0028     		cmp	r0, #0
 243 003e 44D1     		bne	.L17
 427:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 244              		.loc 1 427 3 is_stmt 1 view .LVU65
 427:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 245              		.loc 1 427 34 is_stmt 0 view .LVU66
ARM GAS  /tmp/cc8GRwsk.s 			page 20


 246 0040 4FF48053 		mov	r3, #4096
 247 0044 0A93     		str	r3, [sp, #40]
 428:Src/main.c    ****   {
 248              		.loc 1 428 3 is_stmt 1 view .LVU67
 428:Src/main.c    ****   {
 249              		.loc 1 428 7 is_stmt 0 view .LVU68
 250 0046 0AA9     		add	r1, sp, #40
 251 0048 2848     		ldr	r0, .L25
 252 004a FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
 253              	.LVL2:
 428:Src/main.c    ****   {
 254              		.loc 1 428 6 view .LVU69
 255 004e 0028     		cmp	r0, #0
 256 0050 3DD1     		bne	.L18
 432:Src/main.c    ****   {
 257              		.loc 1 432 3 is_stmt 1 view .LVU70
 432:Src/main.c    ****   {
 258              		.loc 1 432 7 is_stmt 0 view .LVU71
 259 0052 2648     		ldr	r0, .L25
 260 0054 FFF7FEFF 		bl	HAL_TIM_PWM_Init
 261              	.LVL3:
 432:Src/main.c    ****   {
 262              		.loc 1 432 6 view .LVU72
 263 0058 0028     		cmp	r0, #0
 264 005a 3AD1     		bne	.L19
 436:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 265              		.loc 1 436 3 is_stmt 1 view .LVU73
 436:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 266              		.loc 1 436 37 is_stmt 0 view .LVU74
 267 005c 0023     		movs	r3, #0
 268 005e 0793     		str	r3, [sp, #28]
 437:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 269              		.loc 1 437 3 is_stmt 1 view .LVU75
 437:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 270              		.loc 1 437 33 is_stmt 0 view .LVU76
 271 0060 0993     		str	r3, [sp, #36]
 438:Src/main.c    ****   {
 272              		.loc 1 438 3 is_stmt 1 view .LVU77
 438:Src/main.c    ****   {
 273              		.loc 1 438 7 is_stmt 0 view .LVU78
 274 0062 07A9     		add	r1, sp, #28
 275 0064 2148     		ldr	r0, .L25
 276 0066 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 277              	.LVL4:
 438:Src/main.c    ****   {
 278              		.loc 1 438 6 view .LVU79
 279 006a 0028     		cmp	r0, #0
 280 006c 33D1     		bne	.L20
 442:Src/main.c    ****   sConfigOC.Pulse = 500;
 281              		.loc 1 442 3 is_stmt 1 view .LVU80
 442:Src/main.c    ****   sConfigOC.Pulse = 500;
 282              		.loc 1 442 20 is_stmt 0 view .LVU81
 283 006e 6023     		movs	r3, #96
 284 0070 0093     		str	r3, [sp]
 443:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 285              		.loc 1 443 3 is_stmt 1 view .LVU82
 443:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
ARM GAS  /tmp/cc8GRwsk.s 			page 21


 286              		.loc 1 443 19 is_stmt 0 view .LVU83
 287 0072 4FF4FA73 		mov	r3, #500
 288 0076 0193     		str	r3, [sp, #4]
 444:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 289              		.loc 1 444 3 is_stmt 1 view .LVU84
 444:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 290              		.loc 1 444 24 is_stmt 0 view .LVU85
 291 0078 0022     		movs	r2, #0
 292 007a 0292     		str	r2, [sp, #8]
 445:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 293              		.loc 1 445 3 is_stmt 1 view .LVU86
 445:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 294              		.loc 1 445 24 is_stmt 0 view .LVU87
 295 007c 0492     		str	r2, [sp, #16]
 446:Src/main.c    ****   {
 296              		.loc 1 446 3 is_stmt 1 view .LVU88
 446:Src/main.c    ****   {
 297              		.loc 1 446 7 is_stmt 0 view .LVU89
 298 007e 6946     		mov	r1, sp
 299 0080 1A48     		ldr	r0, .L25
 300 0082 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 301              	.LVL5:
 446:Src/main.c    ****   {
 302              		.loc 1 446 6 view .LVU90
 303 0086 40BB     		cbnz	r0, .L21
 450:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
 304              		.loc 1 450 3 is_stmt 1 view .LVU91
 450:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
 305              		.loc 1 450 19 is_stmt 0 view .LVU92
 306 0088 4FF47A73 		mov	r3, #1000
 307 008c 0193     		str	r3, [sp, #4]
 451:Src/main.c    ****   {
 308              		.loc 1 451 3 is_stmt 1 view .LVU93
 451:Src/main.c    ****   {
 309              		.loc 1 451 7 is_stmt 0 view .LVU94
 310 008e 0422     		movs	r2, #4
 311 0090 6946     		mov	r1, sp
 312 0092 1648     		ldr	r0, .L25
 313 0094 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 314              	.LVL6:
 451:Src/main.c    ****   {
 315              		.loc 1 451 6 view .LVU95
 316 0098 08BB     		cbnz	r0, .L22
 455:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 317              		.loc 1 455 3 is_stmt 1 view .LVU96
 455:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 318              		.loc 1 455 19 is_stmt 0 view .LVU97
 319 009a 40F2DC53 		movw	r3, #1500
 320 009e 0193     		str	r3, [sp, #4]
 456:Src/main.c    ****   {
 321              		.loc 1 456 3 is_stmt 1 view .LVU98
 456:Src/main.c    ****   {
 322              		.loc 1 456 7 is_stmt 0 view .LVU99
 323 00a0 0822     		movs	r2, #8
 324 00a2 6946     		mov	r1, sp
 325 00a4 1148     		ldr	r0, .L25
 326 00a6 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
ARM GAS  /tmp/cc8GRwsk.s 			page 22


 327              	.LVL7:
 456:Src/main.c    ****   {
 328              		.loc 1 456 6 view .LVU100
 329 00aa D0B9     		cbnz	r0, .L23
 460:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 330              		.loc 1 460 3 is_stmt 1 view .LVU101
 460:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 331              		.loc 1 460 19 is_stmt 0 view .LVU102
 332 00ac 4FF4FA63 		mov	r3, #2000
 333 00b0 0193     		str	r3, [sp, #4]
 461:Src/main.c    ****   {
 334              		.loc 1 461 3 is_stmt 1 view .LVU103
 461:Src/main.c    ****   {
 335              		.loc 1 461 7 is_stmt 0 view .LVU104
 336 00b2 0C22     		movs	r2, #12
 337 00b4 6946     		mov	r1, sp
 338 00b6 0D48     		ldr	r0, .L25
 339 00b8 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 340              	.LVL8:
 461:Src/main.c    ****   {
 341              		.loc 1 461 6 view .LVU105
 342 00bc 98B9     		cbnz	r0, .L24
 468:Src/main.c    **** 
 343              		.loc 1 468 3 is_stmt 1 view .LVU106
 344 00be 0B48     		ldr	r0, .L25
 345 00c0 FFF7FEFF 		bl	HAL_TIM_MspPostInit
 346              	.LVL9:
 470:Src/main.c    **** 
 347              		.loc 1 470 1 is_stmt 0 view .LVU107
 348 00c4 0FB0     		add	sp, sp, #60
 349              	.LCFI5:
 350              		.cfi_remember_state
 351              		.cfi_def_cfa_offset 4
 352              		@ sp needed
 353 00c6 5DF804FB 		ldr	pc, [sp], #4
 354              	.L17:
 355              	.LCFI6:
 356              		.cfi_restore_state
 425:Src/main.c    ****   }
 357              		.loc 1 425 5 is_stmt 1 view .LVU108
 358 00ca FFF7FEFF 		bl	Error_Handler
 359              	.LVL10:
 360              	.L18:
 430:Src/main.c    ****   }
 361              		.loc 1 430 5 view .LVU109
 362 00ce FFF7FEFF 		bl	Error_Handler
 363              	.LVL11:
 364              	.L19:
 434:Src/main.c    ****   }
 365              		.loc 1 434 5 view .LVU110
 366 00d2 FFF7FEFF 		bl	Error_Handler
 367              	.LVL12:
 368              	.L20:
 440:Src/main.c    ****   }
 369              		.loc 1 440 5 view .LVU111
 370 00d6 FFF7FEFF 		bl	Error_Handler
 371              	.LVL13:
ARM GAS  /tmp/cc8GRwsk.s 			page 23


 372              	.L21:
 448:Src/main.c    ****   }
 373              		.loc 1 448 5 view .LVU112
 374 00da FFF7FEFF 		bl	Error_Handler
 375              	.LVL14:
 376              	.L22:
 453:Src/main.c    ****   }
 377              		.loc 1 453 5 view .LVU113
 378 00de FFF7FEFF 		bl	Error_Handler
 379              	.LVL15:
 380              	.L23:
 458:Src/main.c    ****   }
 381              		.loc 1 458 5 view .LVU114
 382 00e2 FFF7FEFF 		bl	Error_Handler
 383              	.LVL16:
 384              	.L24:
 463:Src/main.c    ****   }
 385              		.loc 1 463 5 view .LVU115
 386 00e6 FFF7FEFF 		bl	Error_Handler
 387              	.LVL17:
 388              	.L26:
 389 00ea 00BF     		.align	2
 390              	.L25:
 391 00ec 00000000 		.word	htim2
 392              		.cfi_endproc
 393              	.LFE338:
 395              		.section	.text.MX_I2C1_Init,"ax",%progbits
 396              		.align	1
 397              		.syntax unified
 398              		.thumb
 399              		.thumb_func
 401              	MX_I2C1_Init:
 402              	.LFB337:
 356:Src/main.c    **** 
 403              		.loc 1 356 1 view -0
 404              		.cfi_startproc
 405              		@ args = 0, pretend = 0, frame = 0
 406              		@ frame_needed = 0, uses_anonymous_args = 0
 407 0000 08B5     		push	{r3, lr}
 408              	.LCFI7:
 409              		.cfi_def_cfa_offset 8
 410              		.cfi_offset 3, -8
 411              		.cfi_offset 14, -4
 365:Src/main.c    ****   hi2c1.Init.Timing = 0x208080C1;
 412              		.loc 1 365 3 view .LVU117
 365:Src/main.c    ****   hi2c1.Init.Timing = 0x208080C1;
 413              		.loc 1 365 18 is_stmt 0 view .LVU118
 414 0002 1148     		ldr	r0, .L35
 415 0004 114B     		ldr	r3, .L35+4
 416 0006 0360     		str	r3, [r0]
 366:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 417              		.loc 1 366 3 is_stmt 1 view .LVU119
 366:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 418              		.loc 1 366 21 is_stmt 0 view .LVU120
 419 0008 114B     		ldr	r3, .L35+8
 420 000a 4360     		str	r3, [r0, #4]
 367:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
ARM GAS  /tmp/cc8GRwsk.s 			page 24


 421              		.loc 1 367 3 is_stmt 1 view .LVU121
 367:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 422              		.loc 1 367 26 is_stmt 0 view .LVU122
 423 000c 0023     		movs	r3, #0
 424 000e 8360     		str	r3, [r0, #8]
 368:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 425              		.loc 1 368 3 is_stmt 1 view .LVU123
 368:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 426              		.loc 1 368 29 is_stmt 0 view .LVU124
 427 0010 0122     		movs	r2, #1
 428 0012 C260     		str	r2, [r0, #12]
 369:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 429              		.loc 1 369 3 is_stmt 1 view .LVU125
 369:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 430              		.loc 1 369 30 is_stmt 0 view .LVU126
 431 0014 0361     		str	r3, [r0, #16]
 370:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 432              		.loc 1 370 3 is_stmt 1 view .LVU127
 370:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 433              		.loc 1 370 26 is_stmt 0 view .LVU128
 434 0016 4361     		str	r3, [r0, #20]
 371:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 435              		.loc 1 371 3 is_stmt 1 view .LVU129
 371:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 436              		.loc 1 371 31 is_stmt 0 view .LVU130
 437 0018 8361     		str	r3, [r0, #24]
 372:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 438              		.loc 1 372 3 is_stmt 1 view .LVU131
 372:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 439              		.loc 1 372 30 is_stmt 0 view .LVU132
 440 001a C361     		str	r3, [r0, #28]
 373:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 441              		.loc 1 373 3 is_stmt 1 view .LVU133
 373:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 442              		.loc 1 373 28 is_stmt 0 view .LVU134
 443 001c 0362     		str	r3, [r0, #32]
 374:Src/main.c    ****   {
 444              		.loc 1 374 3 is_stmt 1 view .LVU135
 374:Src/main.c    ****   {
 445              		.loc 1 374 7 is_stmt 0 view .LVU136
 446 001e FFF7FEFF 		bl	HAL_I2C_Init
 447              	.LVL18:
 374:Src/main.c    ****   {
 448              		.loc 1 374 6 view .LVU137
 449 0022 50B9     		cbnz	r0, .L32
 381:Src/main.c    ****   {
 450              		.loc 1 381 3 is_stmt 1 view .LVU138
 381:Src/main.c    ****   {
 451              		.loc 1 381 7 is_stmt 0 view .LVU139
 452 0024 0021     		movs	r1, #0
 453 0026 0848     		ldr	r0, .L35
 454 0028 FFF7FEFF 		bl	HAL_I2CEx_ConfigAnalogFilter
 455              	.LVL19:
 381:Src/main.c    ****   {
 456              		.loc 1 381 6 view .LVU140
 457 002c 38B9     		cbnz	r0, .L33
 388:Src/main.c    ****   {
ARM GAS  /tmp/cc8GRwsk.s 			page 25


 458              		.loc 1 388 3 is_stmt 1 view .LVU141
 388:Src/main.c    ****   {
 459              		.loc 1 388 7 is_stmt 0 view .LVU142
 460 002e 0021     		movs	r1, #0
 461 0030 0548     		ldr	r0, .L35
 462 0032 FFF7FEFF 		bl	HAL_I2CEx_ConfigDigitalFilter
 463              	.LVL20:
 388:Src/main.c    ****   {
 464              		.loc 1 388 6 view .LVU143
 465 0036 20B9     		cbnz	r0, .L34
 396:Src/main.c    **** 
 466              		.loc 1 396 1 view .LVU144
 467 0038 08BD     		pop	{r3, pc}
 468              	.L32:
 376:Src/main.c    ****   }
 469              		.loc 1 376 5 is_stmt 1 view .LVU145
 470 003a FFF7FEFF 		bl	Error_Handler
 471              	.LVL21:
 472              	.L33:
 383:Src/main.c    ****   }
 473              		.loc 1 383 5 view .LVU146
 474 003e FFF7FEFF 		bl	Error_Handler
 475              	.LVL22:
 476              	.L34:
 390:Src/main.c    ****   }
 477              		.loc 1 390 5 view .LVU147
 478 0042 FFF7FEFF 		bl	Error_Handler
 479              	.LVL23:
 480              	.L36:
 481 0046 00BF     		.align	2
 482              	.L35:
 483 0048 00000000 		.word	hi2c1
 484 004c 00540040 		.word	1073763328
 485 0050 C1808020 		.word	545292481
 486              		.cfi_endproc
 487              	.LFE337:
 489              		.section	.text.MX_TIM3_Init,"ax",%progbits
 490              		.align	1
 491              		.syntax unified
 492              		.thumb
 493              		.thumb_func
 495              	MX_TIM3_Init:
 496              	.LFB339:
 478:Src/main.c    **** 
 497              		.loc 1 478 1 view -0
 498              		.cfi_startproc
 499              		@ args = 0, pretend = 0, frame = 32
 500              		@ frame_needed = 0, uses_anonymous_args = 0
 501 0000 00B5     		push	{lr}
 502              	.LCFI8:
 503              		.cfi_def_cfa_offset 4
 504              		.cfi_offset 14, -4
 505 0002 89B0     		sub	sp, sp, #36
 506              	.LCFI9:
 507              		.cfi_def_cfa_offset 40
 484:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 508              		.loc 1 484 3 view .LVU149
ARM GAS  /tmp/cc8GRwsk.s 			page 26


 484:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 509              		.loc 1 484 26 is_stmt 0 view .LVU150
 510 0004 0023     		movs	r3, #0
 511 0006 0493     		str	r3, [sp, #16]
 512 0008 0593     		str	r3, [sp, #20]
 513 000a 0693     		str	r3, [sp, #24]
 514 000c 0793     		str	r3, [sp, #28]
 485:Src/main.c    **** 
 515              		.loc 1 485 3 is_stmt 1 view .LVU151
 485:Src/main.c    **** 
 516              		.loc 1 485 27 is_stmt 0 view .LVU152
 517 000e 0193     		str	r3, [sp, #4]
 518 0010 0293     		str	r3, [sp, #8]
 519 0012 0393     		str	r3, [sp, #12]
 490:Src/main.c    ****   htim3.Init.Prescaler = 49152;
 520              		.loc 1 490 3 is_stmt 1 view .LVU153
 490:Src/main.c    ****   htim3.Init.Prescaler = 49152;
 521              		.loc 1 490 18 is_stmt 0 view .LVU154
 522 0014 1348     		ldr	r0, .L45
 523 0016 144A     		ldr	r2, .L45+4
 524 0018 0260     		str	r2, [r0]
 491:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 525              		.loc 1 491 3 is_stmt 1 view .LVU155
 491:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 526              		.loc 1 491 24 is_stmt 0 view .LVU156
 527 001a 4FF44042 		mov	r2, #49152
 528 001e 4260     		str	r2, [r0, #4]
 492:Src/main.c    ****   htim3.Init.Period = 199;
 529              		.loc 1 492 3 is_stmt 1 view .LVU157
 492:Src/main.c    ****   htim3.Init.Period = 199;
 530              		.loc 1 492 26 is_stmt 0 view .LVU158
 531 0020 8360     		str	r3, [r0, #8]
 493:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 532              		.loc 1 493 3 is_stmt 1 view .LVU159
 493:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 533              		.loc 1 493 21 is_stmt 0 view .LVU160
 534 0022 C722     		movs	r2, #199
 535 0024 C260     		str	r2, [r0, #12]
 494:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 536              		.loc 1 494 3 is_stmt 1 view .LVU161
 494:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 537              		.loc 1 494 28 is_stmt 0 view .LVU162
 538 0026 0361     		str	r3, [r0, #16]
 495:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 539              		.loc 1 495 3 is_stmt 1 view .LVU163
 495:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 540              		.loc 1 495 32 is_stmt 0 view .LVU164
 541 0028 8361     		str	r3, [r0, #24]
 496:Src/main.c    ****   {
 542              		.loc 1 496 3 is_stmt 1 view .LVU165
 496:Src/main.c    ****   {
 543              		.loc 1 496 7 is_stmt 0 view .LVU166
 544 002a FFF7FEFF 		bl	HAL_TIM_Base_Init
 545              	.LVL24:
 496:Src/main.c    ****   {
 546              		.loc 1 496 6 view .LVU167
 547 002e 90B9     		cbnz	r0, .L42
ARM GAS  /tmp/cc8GRwsk.s 			page 27


 500:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 548              		.loc 1 500 3 is_stmt 1 view .LVU168
 500:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 549              		.loc 1 500 34 is_stmt 0 view .LVU169
 550 0030 4FF48053 		mov	r3, #4096
 551 0034 0493     		str	r3, [sp, #16]
 501:Src/main.c    ****   {
 552              		.loc 1 501 3 is_stmt 1 view .LVU170
 501:Src/main.c    ****   {
 553              		.loc 1 501 7 is_stmt 0 view .LVU171
 554 0036 04A9     		add	r1, sp, #16
 555 0038 0A48     		ldr	r0, .L45
 556 003a FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
 557              	.LVL25:
 501:Src/main.c    ****   {
 558              		.loc 1 501 6 view .LVU172
 559 003e 60B9     		cbnz	r0, .L43
 505:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 560              		.loc 1 505 3 is_stmt 1 view .LVU173
 505:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 561              		.loc 1 505 37 is_stmt 0 view .LVU174
 562 0040 0023     		movs	r3, #0
 563 0042 0193     		str	r3, [sp, #4]
 506:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 564              		.loc 1 506 3 is_stmt 1 view .LVU175
 506:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 565              		.loc 1 506 33 is_stmt 0 view .LVU176
 566 0044 0393     		str	r3, [sp, #12]
 507:Src/main.c    ****   {
 567              		.loc 1 507 3 is_stmt 1 view .LVU177
 507:Src/main.c    ****   {
 568              		.loc 1 507 7 is_stmt 0 view .LVU178
 569 0046 01A9     		add	r1, sp, #4
 570 0048 0648     		ldr	r0, .L45
 571 004a FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 572              	.LVL26:
 507:Src/main.c    ****   {
 573              		.loc 1 507 6 view .LVU179
 574 004e 30B9     		cbnz	r0, .L44
 515:Src/main.c    **** 
 575              		.loc 1 515 1 view .LVU180
 576 0050 09B0     		add	sp, sp, #36
 577              	.LCFI10:
 578              		.cfi_remember_state
 579              		.cfi_def_cfa_offset 4
 580              		@ sp needed
 581 0052 5DF804FB 		ldr	pc, [sp], #4
 582              	.L42:
 583              	.LCFI11:
 584              		.cfi_restore_state
 498:Src/main.c    ****   }
 585              		.loc 1 498 5 is_stmt 1 view .LVU181
 586 0056 FFF7FEFF 		bl	Error_Handler
 587              	.LVL27:
 588              	.L43:
 503:Src/main.c    ****   }
 589              		.loc 1 503 5 view .LVU182
ARM GAS  /tmp/cc8GRwsk.s 			page 28


 590 005a FFF7FEFF 		bl	Error_Handler
 591              	.LVL28:
 592              	.L44:
 509:Src/main.c    ****   }
 593              		.loc 1 509 5 view .LVU183
 594 005e FFF7FEFF 		bl	Error_Handler
 595              	.LVL29:
 596              	.L46:
 597 0062 00BF     		.align	2
 598              	.L45:
 599 0064 00000000 		.word	htim3
 600 0068 00040040 		.word	1073742848
 601              		.cfi_endproc
 602              	.LFE339:
 604              		.section	.text.MX_ADC1_Init,"ax",%progbits
 605              		.align	1
 606              		.syntax unified
 607              		.thumb
 608              		.thumb_func
 610              	MX_ADC1_Init:
 611              	.LFB335:
 205:Src/main.c    **** 
 612              		.loc 1 205 1 view -0
 613              		.cfi_startproc
 614              		@ args = 0, pretend = 0, frame = 48
 615              		@ frame_needed = 0, uses_anonymous_args = 0
 616 0000 10B5     		push	{r4, lr}
 617              	.LCFI12:
 618              		.cfi_def_cfa_offset 8
 619              		.cfi_offset 4, -8
 620              		.cfi_offset 14, -4
 621 0002 8CB0     		sub	sp, sp, #48
 622              	.LCFI13:
 623              		.cfi_def_cfa_offset 56
 211:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 624              		.loc 1 211 3 view .LVU185
 211:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 625              		.loc 1 211 24 is_stmt 0 view .LVU186
 626 0004 0024     		movs	r4, #0
 627 0006 0994     		str	r4, [sp, #36]
 628 0008 0A94     		str	r4, [sp, #40]
 629 000a 0B94     		str	r4, [sp, #44]
 212:Src/main.c    **** 
 630              		.loc 1 212 3 is_stmt 1 view .LVU187
 212:Src/main.c    **** 
 631              		.loc 1 212 26 is_stmt 0 view .LVU188
 632 000c 2022     		movs	r2, #32
 633 000e 2146     		mov	r1, r4
 634 0010 01A8     		add	r0, sp, #4
 635 0012 FFF7FEFF 		bl	memset
 636              	.LVL30:
 220:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 637              		.loc 1 220 3 is_stmt 1 view .LVU189
 220:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 638              		.loc 1 220 18 is_stmt 0 view .LVU190
 639 0016 1E48     		ldr	r0, .L55
 640 0018 4FF0A043 		mov	r3, #1342177280
ARM GAS  /tmp/cc8GRwsk.s 			page 29


 641 001c 0360     		str	r3, [r0]
 221:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 642              		.loc 1 221 3 is_stmt 1 view .LVU191
 221:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 643              		.loc 1 221 29 is_stmt 0 view .LVU192
 644 001e 4FF40033 		mov	r3, #131072
 645 0022 4360     		str	r3, [r0, #4]
 222:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 646              		.loc 1 222 3 is_stmt 1 view .LVU193
 222:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 647              		.loc 1 222 25 is_stmt 0 view .LVU194
 648 0024 8460     		str	r4, [r0, #8]
 223:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 649              		.loc 1 223 3 is_stmt 1 view .LVU195
 223:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 650              		.loc 1 223 24 is_stmt 0 view .LVU196
 651 0026 C460     		str	r4, [r0, #12]
 224:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 652              		.loc 1 224 3 is_stmt 1 view .LVU197
 224:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 653              		.loc 1 224 31 is_stmt 0 view .LVU198
 654 0028 0461     		str	r4, [r0, #16]
 225:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 655              		.loc 1 225 3 is_stmt 1 view .LVU199
 225:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 656              		.loc 1 225 27 is_stmt 0 view .LVU200
 657 002a 4461     		str	r4, [r0, #20]
 226:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 658              		.loc 1 226 3 is_stmt 1 view .LVU201
 226:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 659              		.loc 1 226 27 is_stmt 0 view .LVU202
 660 002c 0423     		movs	r3, #4
 661 002e 8361     		str	r3, [r0, #24]
 227:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 662              		.loc 1 227 3 is_stmt 1 view .LVU203
 227:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 663              		.loc 1 227 31 is_stmt 0 view .LVU204
 664 0030 0477     		strb	r4, [r0, #28]
 228:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 665              		.loc 1 228 3 is_stmt 1 view .LVU205
 228:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 666              		.loc 1 228 33 is_stmt 0 view .LVU206
 667 0032 4477     		strb	r4, [r0, #29]
 229:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 668              		.loc 1 229 3 is_stmt 1 view .LVU207
 229:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 669              		.loc 1 229 30 is_stmt 0 view .LVU208
 670 0034 0123     		movs	r3, #1
 671 0036 0362     		str	r3, [r0, #32]
 230:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 672              		.loc 1 230 3 is_stmt 1 view .LVU209
 230:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 673              		.loc 1 230 36 is_stmt 0 view .LVU210
 674 0038 80F82440 		strb	r4, [r0, #36]
 231:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 675              		.loc 1 231 3 is_stmt 1 view .LVU211
 231:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
ARM GAS  /tmp/cc8GRwsk.s 			page 30


 676              		.loc 1 231 31 is_stmt 0 view .LVU212
 677 003c C462     		str	r4, [r0, #44]
 232:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 678              		.loc 1 232 3 is_stmt 1 view .LVU213
 232:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 679              		.loc 1 232 35 is_stmt 0 view .LVU214
 680 003e 0463     		str	r4, [r0, #48]
 233:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 681              		.loc 1 233 3 is_stmt 1 view .LVU215
 233:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 682              		.loc 1 233 36 is_stmt 0 view .LVU216
 683 0040 80F83840 		strb	r4, [r0, #56]
 234:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
 684              		.loc 1 234 3 is_stmt 1 view .LVU217
 234:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
 685              		.loc 1 234 22 is_stmt 0 view .LVU218
 686 0044 C463     		str	r4, [r0, #60]
 235:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 687              		.loc 1 235 3 is_stmt 1 view .LVU219
 235:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 688              		.loc 1 235 31 is_stmt 0 view .LVU220
 689 0046 80F84040 		strb	r4, [r0, #64]
 236:Src/main.c    ****   {
 690              		.loc 1 236 3 is_stmt 1 view .LVU221
 236:Src/main.c    ****   {
 691              		.loc 1 236 7 is_stmt 0 view .LVU222
 692 004a FFF7FEFF 		bl	HAL_ADC_Init
 693              	.LVL31:
 236:Src/main.c    ****   {
 694              		.loc 1 236 6 view .LVU223
 695 004e C8B9     		cbnz	r0, .L52
 243:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 696              		.loc 1 243 3 is_stmt 1 view .LVU224
 243:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 697              		.loc 1 243 18 is_stmt 0 view .LVU225
 698 0050 0023     		movs	r3, #0
 699 0052 0993     		str	r3, [sp, #36]
 244:Src/main.c    ****   {
 700              		.loc 1 244 3 is_stmt 1 view .LVU226
 244:Src/main.c    ****   {
 701              		.loc 1 244 7 is_stmt 0 view .LVU227
 702 0054 09A9     		add	r1, sp, #36
 703 0056 0E48     		ldr	r0, .L55
 704 0058 FFF7FEFF 		bl	HAL_ADCEx_MultiModeConfigChannel
 705              	.LVL32:
 244:Src/main.c    ****   {
 706              		.loc 1 244 6 view .LVU228
 707 005c A0B9     		cbnz	r0, .L53
 251:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 708              		.loc 1 251 3 is_stmt 1 view .LVU229
 251:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 709              		.loc 1 251 19 is_stmt 0 view .LVU230
 710 005e 0D4B     		ldr	r3, .L55+4
 711 0060 0193     		str	r3, [sp, #4]
 252:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
 712              		.loc 1 252 3 is_stmt 1 view .LVU231
 252:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
ARM GAS  /tmp/cc8GRwsk.s 			page 31


 713              		.loc 1 252 16 is_stmt 0 view .LVU232
 714 0062 0623     		movs	r3, #6
 715 0064 0293     		str	r3, [sp, #8]
 253:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 716              		.loc 1 253 3 is_stmt 1 view .LVU233
 253:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 717              		.loc 1 253 24 is_stmt 0 view .LVU234
 718 0066 0023     		movs	r3, #0
 719 0068 0393     		str	r3, [sp, #12]
 254:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 720              		.loc 1 254 3 is_stmt 1 view .LVU235
 254:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 721              		.loc 1 254 22 is_stmt 0 view .LVU236
 722 006a 7F22     		movs	r2, #127
 723 006c 0492     		str	r2, [sp, #16]
 255:Src/main.c    ****   sConfig.Offset = 0;
 724              		.loc 1 255 3 is_stmt 1 view .LVU237
 255:Src/main.c    ****   sConfig.Offset = 0;
 725              		.loc 1 255 24 is_stmt 0 view .LVU238
 726 006e 0422     		movs	r2, #4
 727 0070 0592     		str	r2, [sp, #20]
 256:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 728              		.loc 1 256 3 is_stmt 1 view .LVU239
 256:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 729              		.loc 1 256 18 is_stmt 0 view .LVU240
 730 0072 0693     		str	r3, [sp, #24]
 257:Src/main.c    ****   {
 731              		.loc 1 257 3 is_stmt 1 view .LVU241
 257:Src/main.c    ****   {
 732              		.loc 1 257 7 is_stmt 0 view .LVU242
 733 0074 0DEB0201 		add	r1, sp, r2
 734 0078 0548     		ldr	r0, .L55
 735 007a FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 736              	.LVL33:
 257:Src/main.c    ****   {
 737              		.loc 1 257 6 view .LVU243
 738 007e 28B9     		cbnz	r0, .L54
 265:Src/main.c    **** 
 739              		.loc 1 265 1 view .LVU244
 740 0080 0CB0     		add	sp, sp, #48
 741              	.LCFI14:
 742              		.cfi_remember_state
 743              		.cfi_def_cfa_offset 8
 744              		@ sp needed
 745 0082 10BD     		pop	{r4, pc}
 746              	.L52:
 747              	.LCFI15:
 748              		.cfi_restore_state
 238:Src/main.c    ****   }
 749              		.loc 1 238 5 is_stmt 1 view .LVU245
 750 0084 FFF7FEFF 		bl	Error_Handler
 751              	.LVL34:
 752              	.L53:
 246:Src/main.c    ****   }
 753              		.loc 1 246 5 view .LVU246
 754 0088 FFF7FEFF 		bl	Error_Handler
 755              	.LVL35:
ARM GAS  /tmp/cc8GRwsk.s 			page 32


 756              	.L54:
 259:Src/main.c    ****   }
 757              		.loc 1 259 5 view .LVU247
 758 008c FFF7FEFF 		bl	Error_Handler
 759              	.LVL36:
 760              	.L56:
 761              		.align	2
 762              	.L55:
 763 0090 00000000 		.word	hadc1
 764 0094 0080F03E 		.word	1055948800
 765              		.cfi_endproc
 766              	.LFE335:
 768              		.section	.text.MX_ADC2_Init,"ax",%progbits
 769              		.align	1
 770              		.syntax unified
 771              		.thumb
 772              		.thumb_func
 774              	MX_ADC2_Init:
 775              	.LFB336:
 273:Src/main.c    **** 
 776              		.loc 1 273 1 view -0
 777              		.cfi_startproc
 778              		@ args = 0, pretend = 0, frame = 32
 779              		@ frame_needed = 0, uses_anonymous_args = 0
 780 0000 00B5     		push	{lr}
 781              	.LCFI16:
 782              		.cfi_def_cfa_offset 4
 783              		.cfi_offset 14, -4
 784 0002 89B0     		sub	sp, sp, #36
 785              	.LCFI17:
 786              		.cfi_def_cfa_offset 40
 279:Src/main.c    **** 
 787              		.loc 1 279 3 view .LVU249
 279:Src/main.c    **** 
 788              		.loc 1 279 26 is_stmt 0 view .LVU250
 789 0004 2022     		movs	r2, #32
 790 0006 0021     		movs	r1, #0
 791 0008 6846     		mov	r0, sp
 792 000a FFF7FEFF 		bl	memset
 793              	.LVL37:
 287:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 794              		.loc 1 287 3 is_stmt 1 view .LVU251
 287:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 795              		.loc 1 287 18 is_stmt 0 view .LVU252
 796 000e 2848     		ldr	r0, .L69
 797 0010 284B     		ldr	r3, .L69+4
 798 0012 0360     		str	r3, [r0]
 288:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 799              		.loc 1 288 3 is_stmt 1 view .LVU253
 288:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 800              		.loc 1 288 29 is_stmt 0 view .LVU254
 801 0014 4FF40033 		mov	r3, #131072
 802 0018 4360     		str	r3, [r0, #4]
 289:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 803              		.loc 1 289 3 is_stmt 1 view .LVU255
 289:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 804              		.loc 1 289 25 is_stmt 0 view .LVU256
ARM GAS  /tmp/cc8GRwsk.s 			page 33


 805 001a 0023     		movs	r3, #0
 806 001c 8360     		str	r3, [r0, #8]
 290:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 807              		.loc 1 290 3 is_stmt 1 view .LVU257
 290:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 808              		.loc 1 290 24 is_stmt 0 view .LVU258
 809 001e C360     		str	r3, [r0, #12]
 291:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 810              		.loc 1 291 3 is_stmt 1 view .LVU259
 291:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 811              		.loc 1 291 31 is_stmt 0 view .LVU260
 812 0020 0361     		str	r3, [r0, #16]
 292:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 813              		.loc 1 292 3 is_stmt 1 view .LVU261
 292:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 814              		.loc 1 292 27 is_stmt 0 view .LVU262
 815 0022 0122     		movs	r2, #1
 816 0024 4261     		str	r2, [r0, #20]
 293:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 817              		.loc 1 293 3 is_stmt 1 view .LVU263
 293:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 818              		.loc 1 293 27 is_stmt 0 view .LVU264
 819 0026 0822     		movs	r2, #8
 820 0028 8261     		str	r2, [r0, #24]
 294:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 821              		.loc 1 294 3 is_stmt 1 view .LVU265
 294:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 822              		.loc 1 294 31 is_stmt 0 view .LVU266
 823 002a 0377     		strb	r3, [r0, #28]
 295:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 824              		.loc 1 295 3 is_stmt 1 view .LVU267
 295:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 825              		.loc 1 295 33 is_stmt 0 view .LVU268
 826 002c 4377     		strb	r3, [r0, #29]
 296:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 827              		.loc 1 296 3 is_stmt 1 view .LVU269
 296:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 828              		.loc 1 296 30 is_stmt 0 view .LVU270
 829 002e 0422     		movs	r2, #4
 830 0030 0262     		str	r2, [r0, #32]
 297:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 831              		.loc 1 297 3 is_stmt 1 view .LVU271
 297:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 832              		.loc 1 297 36 is_stmt 0 view .LVU272
 833 0032 80F82430 		strb	r3, [r0, #36]
 298:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 834              		.loc 1 298 3 is_stmt 1 view .LVU273
 298:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 835              		.loc 1 298 31 is_stmt 0 view .LVU274
 836 0036 C362     		str	r3, [r0, #44]
 299:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 837              		.loc 1 299 3 is_stmt 1 view .LVU275
 299:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 838              		.loc 1 299 35 is_stmt 0 view .LVU276
 839 0038 0363     		str	r3, [r0, #48]
 300:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 840              		.loc 1 300 3 is_stmt 1 view .LVU277
ARM GAS  /tmp/cc8GRwsk.s 			page 34


 300:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 841              		.loc 1 300 36 is_stmt 0 view .LVU278
 842 003a 80F83830 		strb	r3, [r0, #56]
 301:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 843              		.loc 1 301 3 is_stmt 1 view .LVU279
 301:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 844              		.loc 1 301 22 is_stmt 0 view .LVU280
 845 003e C363     		str	r3, [r0, #60]
 302:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
 846              		.loc 1 302 3 is_stmt 1 view .LVU281
 302:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
 847              		.loc 1 302 31 is_stmt 0 view .LVU282
 848 0040 80F84030 		strb	r3, [r0, #64]
 303:Src/main.c    ****   {
 849              		.loc 1 303 3 is_stmt 1 view .LVU283
 303:Src/main.c    ****   {
 850              		.loc 1 303 7 is_stmt 0 view .LVU284
 851 0044 FFF7FEFF 		bl	HAL_ADC_Init
 852              	.LVL38:
 303:Src/main.c    ****   {
 853              		.loc 1 303 6 view .LVU285
 854 0048 38BB     		cbnz	r0, .L64
 310:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 855              		.loc 1 310 3 is_stmt 1 view .LVU286
 310:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 856              		.loc 1 310 19 is_stmt 0 view .LVU287
 857 004a 1B4B     		ldr	r3, .L69+8
 858 004c 0093     		str	r3, [sp]
 311:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
 859              		.loc 1 311 3 is_stmt 1 view .LVU288
 311:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
 860              		.loc 1 311 16 is_stmt 0 view .LVU289
 861 004e 0623     		movs	r3, #6
 862 0050 0193     		str	r3, [sp, #4]
 312:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 863              		.loc 1 312 3 is_stmt 1 view .LVU290
 312:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 864              		.loc 1 312 24 is_stmt 0 view .LVU291
 865 0052 0023     		movs	r3, #0
 866 0054 0293     		str	r3, [sp, #8]
 313:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 867              		.loc 1 313 3 is_stmt 1 view .LVU292
 313:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 868              		.loc 1 313 22 is_stmt 0 view .LVU293
 869 0056 7F22     		movs	r2, #127
 870 0058 0392     		str	r2, [sp, #12]
 314:Src/main.c    ****   sConfig.Offset = 0;
 871              		.loc 1 314 3 is_stmt 1 view .LVU294
 314:Src/main.c    ****   sConfig.Offset = 0;
 872              		.loc 1 314 24 is_stmt 0 view .LVU295
 873 005a 0422     		movs	r2, #4
 874 005c 0492     		str	r2, [sp, #16]
 315:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 875              		.loc 1 315 3 is_stmt 1 view .LVU296
 315:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 876              		.loc 1 315 18 is_stmt 0 view .LVU297
 877 005e 0593     		str	r3, [sp, #20]
ARM GAS  /tmp/cc8GRwsk.s 			page 35


 316:Src/main.c    ****   {
 878              		.loc 1 316 3 is_stmt 1 view .LVU298
 316:Src/main.c    ****   {
 879              		.loc 1 316 7 is_stmt 0 view .LVU299
 880 0060 6946     		mov	r1, sp
 881 0062 1348     		ldr	r0, .L69
 882 0064 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 883              	.LVL39:
 316:Src/main.c    ****   {
 884              		.loc 1 316 6 view .LVU300
 885 0068 C8B9     		cbnz	r0, .L65
 323:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 886              		.loc 1 323 3 is_stmt 1 view .LVU301
 323:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 887              		.loc 1 323 16 is_stmt 0 view .LVU302
 888 006a 0C23     		movs	r3, #12
 889 006c 0193     		str	r3, [sp, #4]
 324:Src/main.c    ****   {
 890              		.loc 1 324 3 is_stmt 1 view .LVU303
 324:Src/main.c    ****   {
 891              		.loc 1 324 7 is_stmt 0 view .LVU304
 892 006e 6946     		mov	r1, sp
 893 0070 0F48     		ldr	r0, .L69
 894 0072 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 895              	.LVL40:
 324:Src/main.c    ****   {
 896              		.loc 1 324 6 view .LVU305
 897 0076 A0B9     		cbnz	r0, .L66
 331:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 898              		.loc 1 331 3 is_stmt 1 view .LVU306
 331:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 899              		.loc 1 331 16 is_stmt 0 view .LVU307
 900 0078 1223     		movs	r3, #18
 901 007a 0193     		str	r3, [sp, #4]
 332:Src/main.c    ****   {
 902              		.loc 1 332 3 is_stmt 1 view .LVU308
 332:Src/main.c    ****   {
 903              		.loc 1 332 7 is_stmt 0 view .LVU309
 904 007c 6946     		mov	r1, sp
 905 007e 0C48     		ldr	r0, .L69
 906 0080 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 907              	.LVL41:
 332:Src/main.c    ****   {
 908              		.loc 1 332 6 view .LVU310
 909 0084 78B9     		cbnz	r0, .L67
 339:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 910              		.loc 1 339 3 is_stmt 1 view .LVU311
 339:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 911              		.loc 1 339 16 is_stmt 0 view .LVU312
 912 0086 1823     		movs	r3, #24
 913 0088 0193     		str	r3, [sp, #4]
 340:Src/main.c    ****   {
 914              		.loc 1 340 3 is_stmt 1 view .LVU313
 340:Src/main.c    ****   {
 915              		.loc 1 340 7 is_stmt 0 view .LVU314
 916 008a 6946     		mov	r1, sp
 917 008c 0848     		ldr	r0, .L69
ARM GAS  /tmp/cc8GRwsk.s 			page 36


 918 008e FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 919              	.LVL42:
 340:Src/main.c    ****   {
 920              		.loc 1 340 6 view .LVU315
 921 0092 50B9     		cbnz	r0, .L68
 348:Src/main.c    **** 
 922              		.loc 1 348 1 view .LVU316
 923 0094 09B0     		add	sp, sp, #36
 924              	.LCFI18:
 925              		.cfi_remember_state
 926              		.cfi_def_cfa_offset 4
 927              		@ sp needed
 928 0096 5DF804FB 		ldr	pc, [sp], #4
 929              	.L64:
 930              	.LCFI19:
 931              		.cfi_restore_state
 305:Src/main.c    ****   }
 932              		.loc 1 305 5 is_stmt 1 view .LVU317
 933 009a FFF7FEFF 		bl	Error_Handler
 934              	.LVL43:
 935              	.L65:
 318:Src/main.c    ****   }
 936              		.loc 1 318 5 view .LVU318
 937 009e FFF7FEFF 		bl	Error_Handler
 938              	.LVL44:
 939              	.L66:
 326:Src/main.c    ****   }
 940              		.loc 1 326 5 view .LVU319
 941 00a2 FFF7FEFF 		bl	Error_Handler
 942              	.LVL45:
 943              	.L67:
 334:Src/main.c    ****   }
 944              		.loc 1 334 5 view .LVU320
 945 00a6 FFF7FEFF 		bl	Error_Handler
 946              	.LVL46:
 947              	.L68:
 342:Src/main.c    ****   }
 948              		.loc 1 342 5 view .LVU321
 949 00aa FFF7FEFF 		bl	Error_Handler
 950              	.LVL47:
 951              	.L70:
 952 00ae 00BF     		.align	2
 953              	.L69:
 954 00b0 00000000 		.word	hadc2
 955 00b4 00010050 		.word	1342177536
 956 00b8 0800900C 		.word	210763784
 957              		.cfi_endproc
 958              	.LFE336:
 960              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
 961              		.align	1
 962              		.syntax unified
 963              		.thumb
 964              		.thumb_func
 966              	MX_USART1_UART_Init:
 967              	.LFB340:
 523:Src/main.c    **** 
 968              		.loc 1 523 1 view -0
ARM GAS  /tmp/cc8GRwsk.s 			page 37


 969              		.cfi_startproc
 970              		@ args = 0, pretend = 0, frame = 0
 971              		@ frame_needed = 0, uses_anonymous_args = 0
 972 0000 08B5     		push	{r3, lr}
 973              	.LCFI20:
 974              		.cfi_def_cfa_offset 8
 975              		.cfi_offset 3, -8
 976              		.cfi_offset 14, -4
 532:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 977              		.loc 1 532 3 view .LVU323
 532:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 978              		.loc 1 532 19 is_stmt 0 view .LVU324
 979 0002 1548     		ldr	r0, .L81
 980 0004 154B     		ldr	r3, .L81+4
 981 0006 0360     		str	r3, [r0]
 533:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 982              		.loc 1 533 3 is_stmt 1 view .LVU325
 533:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 983              		.loc 1 533 24 is_stmt 0 view .LVU326
 984 0008 4FF4E133 		mov	r3, #115200
 985 000c 4360     		str	r3, [r0, #4]
 534:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 986              		.loc 1 534 3 is_stmt 1 view .LVU327
 534:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 987              		.loc 1 534 26 is_stmt 0 view .LVU328
 988 000e 0023     		movs	r3, #0
 989 0010 8360     		str	r3, [r0, #8]
 535:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 990              		.loc 1 535 3 is_stmt 1 view .LVU329
 535:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 991              		.loc 1 535 24 is_stmt 0 view .LVU330
 992 0012 C360     		str	r3, [r0, #12]
 536:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 993              		.loc 1 536 3 is_stmt 1 view .LVU331
 536:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 994              		.loc 1 536 22 is_stmt 0 view .LVU332
 995 0014 0361     		str	r3, [r0, #16]
 537:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 996              		.loc 1 537 3 is_stmt 1 view .LVU333
 537:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 997              		.loc 1 537 20 is_stmt 0 view .LVU334
 998 0016 0C22     		movs	r2, #12
 999 0018 4261     		str	r2, [r0, #20]
 538:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 1000              		.loc 1 538 3 is_stmt 1 view .LVU335
 538:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 1001              		.loc 1 538 25 is_stmt 0 view .LVU336
 1002 001a 8361     		str	r3, [r0, #24]
 539:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 1003              		.loc 1 539 3 is_stmt 1 view .LVU337
 539:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 1004              		.loc 1 539 28 is_stmt 0 view .LVU338
 1005 001c C361     		str	r3, [r0, #28]
 540:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 1006              		.loc 1 540 3 is_stmt 1 view .LVU339
 540:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 1007              		.loc 1 540 30 is_stmt 0 view .LVU340
ARM GAS  /tmp/cc8GRwsk.s 			page 38


 1008 001e 0362     		str	r3, [r0, #32]
 541:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 1009              		.loc 1 541 3 is_stmt 1 view .LVU341
 541:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 1010              		.loc 1 541 30 is_stmt 0 view .LVU342
 1011 0020 4362     		str	r3, [r0, #36]
 542:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1012              		.loc 1 542 3 is_stmt 1 view .LVU343
 542:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1013              		.loc 1 542 38 is_stmt 0 view .LVU344
 1014 0022 8362     		str	r3, [r0, #40]
 543:Src/main.c    ****   {
 1015              		.loc 1 543 3 is_stmt 1 view .LVU345
 543:Src/main.c    ****   {
 1016              		.loc 1 543 7 is_stmt 0 view .LVU346
 1017 0024 FFF7FEFF 		bl	HAL_UART_Init
 1018              	.LVL48:
 543:Src/main.c    ****   {
 1019              		.loc 1 543 6 view .LVU347
 1020 0028 70B9     		cbnz	r0, .L77
 547:Src/main.c    ****   {
 1021              		.loc 1 547 3 is_stmt 1 view .LVU348
 547:Src/main.c    ****   {
 1022              		.loc 1 547 7 is_stmt 0 view .LVU349
 1023 002a 0021     		movs	r1, #0
 1024 002c 0A48     		ldr	r0, .L81
 1025 002e FFF7FEFF 		bl	HAL_UARTEx_SetTxFifoThreshold
 1026              	.LVL49:
 547:Src/main.c    ****   {
 1027              		.loc 1 547 6 view .LVU350
 1028 0032 58B9     		cbnz	r0, .L78
 551:Src/main.c    ****   {
 1029              		.loc 1 551 3 is_stmt 1 view .LVU351
 551:Src/main.c    ****   {
 1030              		.loc 1 551 7 is_stmt 0 view .LVU352
 1031 0034 0021     		movs	r1, #0
 1032 0036 0848     		ldr	r0, .L81
 1033 0038 FFF7FEFF 		bl	HAL_UARTEx_SetRxFifoThreshold
 1034              	.LVL50:
 551:Src/main.c    ****   {
 1035              		.loc 1 551 6 view .LVU353
 1036 003c 40B9     		cbnz	r0, .L79
 555:Src/main.c    ****   {
 1037              		.loc 1 555 3 is_stmt 1 view .LVU354
 555:Src/main.c    ****   {
 1038              		.loc 1 555 7 is_stmt 0 view .LVU355
 1039 003e 0648     		ldr	r0, .L81
 1040 0040 FFF7FEFF 		bl	HAL_UARTEx_DisableFifoMode
 1041              	.LVL51:
 555:Src/main.c    ****   {
 1042              		.loc 1 555 6 view .LVU356
 1043 0044 30B9     		cbnz	r0, .L80
 563:Src/main.c    **** 
 1044              		.loc 1 563 1 view .LVU357
 1045 0046 08BD     		pop	{r3, pc}
 1046              	.L77:
 545:Src/main.c    ****   }
ARM GAS  /tmp/cc8GRwsk.s 			page 39


 1047              		.loc 1 545 5 is_stmt 1 view .LVU358
 1048 0048 FFF7FEFF 		bl	Error_Handler
 1049              	.LVL52:
 1050              	.L78:
 549:Src/main.c    ****   }
 1051              		.loc 1 549 5 view .LVU359
 1052 004c FFF7FEFF 		bl	Error_Handler
 1053              	.LVL53:
 1054              	.L79:
 553:Src/main.c    ****   }
 1055              		.loc 1 553 5 view .LVU360
 1056 0050 FFF7FEFF 		bl	Error_Handler
 1057              	.LVL54:
 1058              	.L80:
 557:Src/main.c    ****   }
 1059              		.loc 1 557 5 view .LVU361
 1060 0054 FFF7FEFF 		bl	Error_Handler
 1061              	.LVL55:
 1062              	.L82:
 1063              		.align	2
 1064              	.L81:
 1065 0058 00000000 		.word	huart1
 1066 005c 00380140 		.word	1073821696
 1067              		.cfi_endproc
 1068              	.LFE340:
 1070              		.section	.text.SystemClock_Config,"ax",%progbits
 1071              		.align	1
 1072              		.global	SystemClock_Config
 1073              		.syntax unified
 1074              		.thumb
 1075              		.thumb_func
 1077              	SystemClock_Config:
 1078              	.LFB334:
 157:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 1079              		.loc 1 157 1 view -0
 1080              		.cfi_startproc
 1081              		@ args = 0, pretend = 0, frame = 80
 1082              		@ frame_needed = 0, uses_anonymous_args = 0
 1083 0000 00B5     		push	{lr}
 1084              	.LCFI21:
 1085              		.cfi_def_cfa_offset 4
 1086              		.cfi_offset 14, -4
 1087 0002 95B0     		sub	sp, sp, #84
 1088              	.LCFI22:
 1089              		.cfi_def_cfa_offset 88
 158:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 1090              		.loc 1 158 3 view .LVU363
 158:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 1091              		.loc 1 158 22 is_stmt 0 view .LVU364
 1092 0004 3822     		movs	r2, #56
 1093 0006 0021     		movs	r1, #0
 1094 0008 06A8     		add	r0, sp, #24
 1095 000a FFF7FEFF 		bl	memset
 1096              	.LVL56:
 159:Src/main.c    **** 
 1097              		.loc 1 159 3 is_stmt 1 view .LVU365
 159:Src/main.c    **** 
ARM GAS  /tmp/cc8GRwsk.s 			page 40


 1098              		.loc 1 159 22 is_stmt 0 view .LVU366
 1099 000e 0023     		movs	r3, #0
 1100 0010 0193     		str	r3, [sp, #4]
 1101 0012 0293     		str	r3, [sp, #8]
 1102 0014 0393     		str	r3, [sp, #12]
 1103 0016 0493     		str	r3, [sp, #16]
 1104 0018 0593     		str	r3, [sp, #20]
 163:Src/main.c    **** 
 1105              		.loc 1 163 3 is_stmt 1 view .LVU367
 1106 001a 4FF40070 		mov	r0, #512
 1107 001e FFF7FEFF 		bl	HAL_PWREx_ControlVoltageScaling
 1108              	.LVL57:
 168:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 1109              		.loc 1 168 3 view .LVU368
 168:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 1110              		.loc 1 168 36 is_stmt 0 view .LVU369
 1111 0022 2123     		movs	r3, #33
 1112 0024 0693     		str	r3, [sp, #24]
 169:Src/main.c    ****   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 1113              		.loc 1 169 3 is_stmt 1 view .LVU370
 169:Src/main.c    ****   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 1114              		.loc 1 169 30 is_stmt 0 view .LVU371
 1115 0026 4FF48033 		mov	r3, #65536
 1116 002a 0793     		str	r3, [sp, #28]
 170:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 1117              		.loc 1 170 3 is_stmt 1 view .LVU372
 170:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 1118              		.loc 1 170 32 is_stmt 0 view .LVU373
 1119 002c 0123     		movs	r3, #1
 1120 002e 0C93     		str	r3, [sp, #48]
 171:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 1121              		.loc 1 171 3 is_stmt 1 view .LVU374
 171:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 1122              		.loc 1 171 34 is_stmt 0 view .LVU375
 1123 0030 0223     		movs	r3, #2
 1124 0032 0D93     		str	r3, [sp, #52]
 172:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 1125              		.loc 1 172 3 is_stmt 1 view .LVU376
 172:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 1126              		.loc 1 172 35 is_stmt 0 view .LVU377
 1127 0034 0322     		movs	r2, #3
 1128 0036 0E92     		str	r2, [sp, #56]
 173:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 32;
 1129              		.loc 1 173 3 is_stmt 1 view .LVU378
 173:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 32;
 1130              		.loc 1 173 30 is_stmt 0 view .LVU379
 1131 0038 0F93     		str	r3, [sp, #60]
 174:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 1132              		.loc 1 174 3 is_stmt 1 view .LVU380
 174:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 1133              		.loc 1 174 30 is_stmt 0 view .LVU381
 1134 003a 2022     		movs	r2, #32
 1135 003c 1092     		str	r2, [sp, #64]
 175:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 1136              		.loc 1 175 3 is_stmt 1 view .LVU382
 175:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 1137              		.loc 1 175 30 is_stmt 0 view .LVU383
ARM GAS  /tmp/cc8GRwsk.s 			page 41


 1138 003e 1193     		str	r3, [sp, #68]
 176:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 1139              		.loc 1 176 3 is_stmt 1 view .LVU384
 176:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 1140              		.loc 1 176 30 is_stmt 0 view .LVU385
 1141 0040 0422     		movs	r2, #4
 1142 0042 1292     		str	r2, [sp, #72]
 177:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 1143              		.loc 1 177 3 is_stmt 1 view .LVU386
 177:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 1144              		.loc 1 177 30 is_stmt 0 view .LVU387
 1145 0044 1393     		str	r3, [sp, #76]
 178:Src/main.c    ****   {
 1146              		.loc 1 178 3 is_stmt 1 view .LVU388
 178:Src/main.c    ****   {
 1147              		.loc 1 178 7 is_stmt 0 view .LVU389
 1148 0046 06A8     		add	r0, sp, #24
 1149 0048 FFF7FEFF 		bl	HAL_RCC_OscConfig
 1150              	.LVL58:
 178:Src/main.c    ****   {
 1151              		.loc 1 178 6 view .LVU390
 1152 004c A0B9     		cbnz	r0, .L87
 185:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 1153              		.loc 1 185 3 is_stmt 1 view .LVU391
 185:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 1154              		.loc 1 185 31 is_stmt 0 view .LVU392
 1155 004e 0F23     		movs	r3, #15
 1156 0050 0193     		str	r3, [sp, #4]
 187:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 1157              		.loc 1 187 3 is_stmt 1 view .LVU393
 187:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 1158              		.loc 1 187 34 is_stmt 0 view .LVU394
 1159 0052 0321     		movs	r1, #3
 1160 0054 0291     		str	r1, [sp, #8]
 188:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 1161              		.loc 1 188 3 is_stmt 1 view .LVU395
 188:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 1162              		.loc 1 188 35 is_stmt 0 view .LVU396
 1163 0056 0023     		movs	r3, #0
 1164 0058 0393     		str	r3, [sp, #12]
 189:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 1165              		.loc 1 189 3 is_stmt 1 view .LVU397
 189:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 1166              		.loc 1 189 36 is_stmt 0 view .LVU398
 1167 005a 0493     		str	r3, [sp, #16]
 190:Src/main.c    **** 
 1168              		.loc 1 190 3 is_stmt 1 view .LVU399
 190:Src/main.c    **** 
 1169              		.loc 1 190 36 is_stmt 0 view .LVU400
 1170 005c 0593     		str	r3, [sp, #20]
 192:Src/main.c    ****   {
 1171              		.loc 1 192 3 is_stmt 1 view .LVU401
 192:Src/main.c    ****   {
 1172              		.loc 1 192 7 is_stmt 0 view .LVU402
 1173 005e 01A8     		add	r0, sp, #4
 1174 0060 FFF7FEFF 		bl	HAL_RCC_ClockConfig
 1175              	.LVL59:
ARM GAS  /tmp/cc8GRwsk.s 			page 42


 192:Src/main.c    ****   {
 1176              		.loc 1 192 6 view .LVU403
 1177 0064 50B9     		cbnz	r0, .L88
 196:Src/main.c    **** }
 1178              		.loc 1 196 3 is_stmt 1 view .LVU404
 1179 0066 0022     		movs	r2, #0
 1180 0068 4FF08061 		mov	r1, #67108864
 1181 006c 0448     		ldr	r0, .L89
 1182 006e FFF7FEFF 		bl	HAL_RCC_MCOConfig
 1183              	.LVL60:
 197:Src/main.c    **** 
 1184              		.loc 1 197 1 is_stmt 0 view .LVU405
 1185 0072 15B0     		add	sp, sp, #84
 1186              	.LCFI23:
 1187              		.cfi_remember_state
 1188              		.cfi_def_cfa_offset 4
 1189              		@ sp needed
 1190 0074 5DF804FB 		ldr	pc, [sp], #4
 1191              	.L87:
 1192              	.LCFI24:
 1193              		.cfi_restore_state
 180:Src/main.c    ****   }
 1194              		.loc 1 180 5 is_stmt 1 view .LVU406
 1195 0078 FFF7FEFF 		bl	Error_Handler
 1196              	.LVL61:
 1197              	.L88:
 194:Src/main.c    ****   }
 1198              		.loc 1 194 5 view .LVU407
 1199 007c FFF7FEFF 		bl	Error_Handler
 1200              	.LVL62:
 1201              	.L90:
 1202              		.align	2
 1203              	.L89:
 1204 0080 00040600 		.word	394240
 1205              		.cfi_endproc
 1206              	.LFE334:
 1208              		.section	.text.main,"ax",%progbits
 1209              		.align	1
 1210              		.global	main
 1211              		.syntax unified
 1212              		.thumb
 1213              		.thumb_func
 1215              	main:
 1216              	.LFB333:
  81:Src/main.c    ****   /* USER CODE BEGIN 1 */
 1217              		.loc 1 81 1 view -0
 1218              		.cfi_startproc
 1219              		@ Volatile: function does not return.
 1220              		@ args = 0, pretend = 0, frame = 0
 1221              		@ frame_needed = 0, uses_anonymous_args = 0
 1222 0000 08B5     		push	{r3, lr}
 1223              	.LCFI25:
 1224              		.cfi_def_cfa_offset 8
 1225              		.cfi_offset 3, -8
 1226              		.cfi_offset 14, -4
  89:Src/main.c    **** 
 1227              		.loc 1 89 3 view .LVU409
ARM GAS  /tmp/cc8GRwsk.s 			page 43


 1228 0002 FFF7FEFF 		bl	HAL_Init
 1229              	.LVL63:
  96:Src/main.c    **** 
 1230              		.loc 1 96 3 view .LVU410
 1231 0006 FFF7FEFF 		bl	SystemClock_Config
 1232              	.LVL64:
 103:Src/main.c    ****   MX_TIM2_Init();
 1233              		.loc 1 103 3 view .LVU411
 1234 000a FFF7FEFF 		bl	MX_GPIO_Init
 1235              	.LVL65:
 104:Src/main.c    ****   MX_I2C1_Init();
 1236              		.loc 1 104 3 view .LVU412
 1237 000e FFF7FEFF 		bl	MX_TIM2_Init
 1238              	.LVL66:
 105:Src/main.c    ****   MX_TIM3_Init();
 1239              		.loc 1 105 3 view .LVU413
 1240 0012 FFF7FEFF 		bl	MX_I2C1_Init
 1241              	.LVL67:
 106:Src/main.c    ****   MX_ADC1_Init();
 1242              		.loc 1 106 3 view .LVU414
 1243 0016 FFF7FEFF 		bl	MX_TIM3_Init
 1244              	.LVL68:
 107:Src/main.c    ****   MX_ADC2_Init();
 1245              		.loc 1 107 3 view .LVU415
 1246 001a FFF7FEFF 		bl	MX_ADC1_Init
 1247              	.LVL69:
 108:Src/main.c    ****   MX_USART1_UART_Init();
 1248              		.loc 1 108 3 view .LVU416
 1249 001e FFF7FEFF 		bl	MX_ADC2_Init
 1250              	.LVL70:
 109:Src/main.c    ****   MX_USB_Device_Init();
 1251              		.loc 1 109 3 view .LVU417
 1252 0022 FFF7FEFF 		bl	MX_USART1_UART_Init
 1253              	.LVL71:
 110:Src/main.c    ****   /* USER CODE BEGIN 2 */
 1254              		.loc 1 110 3 view .LVU418
 1255 0026 FFF7FEFF 		bl	MX_USB_Device_Init
 1256              	.LVL72:
 113:Src/main.c    ****    HAL_TIM_Base_Start_IT(&htim3);
 1257              		.loc 1 113 4 view .LVU419
 1258 002a 1D4C     		ldr	r4, .L94
 1259 002c 2046     		mov	r0, r4
 1260 002e FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
 1261              	.LVL73:
 114:Src/main.c    **** 
 1262              		.loc 1 114 4 view .LVU420
 1263 0032 1C48     		ldr	r0, .L94+4
 1264 0034 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
 1265              	.LVL74:
 116:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
 1266              		.loc 1 116 2 view .LVU421
 1267 0038 0021     		movs	r1, #0
 1268 003a 2046     		mov	r0, r4
 1269 003c FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1270              	.LVL75:
 117:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
 1271              		.loc 1 117 9 view .LVU422
ARM GAS  /tmp/cc8GRwsk.s 			page 44


 1272 0040 0421     		movs	r1, #4
 1273 0042 2046     		mov	r0, r4
 1274 0044 FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1275              	.LVL76:
 118:Src/main.c    ****         HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
 1276              		.loc 1 118 9 view .LVU423
 1277 0048 0821     		movs	r1, #8
 1278 004a 2046     		mov	r0, r4
 1279 004c FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1280              	.LVL77:
 119:Src/main.c    **** 
 1281              		.loc 1 119 9 view .LVU424
 1282 0050 0C21     		movs	r1, #12
 1283 0052 2046     		mov	r0, r4
 1284 0054 FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1285              	.LVL78:
 121:Src/main.c    **** 	si5351_initialize();
 1286              		.loc 1 121 2 view .LVU425
 1287 0058 0A20     		movs	r0, #10
 1288 005a FFF7FEFF 		bl	HAL_Delay
 1289              	.LVL79:
 122:Src/main.c    ****         HAL_Delay(10);
 1290              		.loc 1 122 2 view .LVU426
 1291 005e FFF7FEFF 		bl	si5351_initialize
 1292              	.LVL80:
 123:Src/main.c    ****         si5351_on_clk(0);
 1293              		.loc 1 123 9 view .LVU427
 1294 0062 0A20     		movs	r0, #10
 1295 0064 FFF7FEFF 		bl	HAL_Delay
 1296              	.LVL81:
 124:Src/main.c    ****         si5351_on_clk(1);
 1297              		.loc 1 124 9 view .LVU428
 1298 0068 0020     		movs	r0, #0
 1299 006a FFF7FEFF 		bl	si5351_on_clk
 1300              	.LVL82:
 125:Src/main.c    ****         si5351_set_frequency(1000000,0);
 1301              		.loc 1 125 9 view .LVU429
 1302 006e 0120     		movs	r0, #1
 1303 0070 FFF7FEFF 		bl	si5351_on_clk
 1304              	.LVL83:
 126:Src/main.c    ****         si5351_set_frequency(1000000,1);
 1305              		.loc 1 126 9 view .LVU430
 1306 0074 0C4C     		ldr	r4, .L94+8
 1307 0076 0021     		movs	r1, #0
 1308 0078 2046     		mov	r0, r4
 1309 007a FFF7FEFF 		bl	si5351_set_frequency
 1310              	.LVL84:
 127:Src/main.c    **** 
 1311              		.loc 1 127 9 view .LVU431
 1312 007e 0121     		movs	r1, #1
 1313 0080 2046     		mov	r0, r4
 1314 0082 FFF7FEFF 		bl	si5351_set_frequency
 1315              	.LVL85:
 1316              	.L92:
 133:Src/main.c    ****   {
 1317              		.loc 1 133 3 discriminator 1 view .LVU432
 144:Src/main.c    ****         si5351_set_frequency(1000000,0);
ARM GAS  /tmp/cc8GRwsk.s 			page 45


 1318              		.loc 1 144 9 discriminator 1 view .LVU433
 1319 0086 0A20     		movs	r0, #10
 1320 0088 FFF7FEFF 		bl	HAL_Delay
 1321              	.LVL86:
 145:Src/main.c    ****         si5351_set_frequency(1000000,1);
 1322              		.loc 1 145 9 discriminator 1 view .LVU434
 1323 008c 064C     		ldr	r4, .L94+8
 1324 008e 0021     		movs	r1, #0
 1325 0090 2046     		mov	r0, r4
 1326 0092 FFF7FEFF 		bl	si5351_set_frequency
 1327              	.LVL87:
 146:Src/main.c    **** 
 1328              		.loc 1 146 9 discriminator 1 view .LVU435
 1329 0096 0121     		movs	r1, #1
 1330 0098 2046     		mov	r0, r4
 1331 009a FFF7FEFF 		bl	si5351_set_frequency
 1332              	.LVL88:
 133:Src/main.c    ****   {
 1333              		.loc 1 133 9 discriminator 1 view .LVU436
 1334 009e F2E7     		b	.L92
 1335              	.L95:
 1336              		.align	2
 1337              	.L94:
 1338 00a0 00000000 		.word	htim2
 1339 00a4 00000000 		.word	htim3
 1340 00a8 40420F00 		.word	1000000
 1341              		.cfi_endproc
 1342              	.LFE333:
 1344              		.global	huart1
 1345              		.section	.bss.huart1,"aw",%nobits
 1346              		.align	2
 1349              	huart1:
 1350 0000 00000000 		.space	144
 1350      00000000 
 1350      00000000 
 1350      00000000 
 1350      00000000 
 1351              		.global	htim3
 1352              		.section	.bss.htim3,"aw",%nobits
 1353              		.align	2
 1356              	htim3:
 1357 0000 00000000 		.space	76
 1357      00000000 
 1357      00000000 
 1357      00000000 
 1357      00000000 
 1358              		.global	htim2
 1359              		.section	.bss.htim2,"aw",%nobits
 1360              		.align	2
 1363              	htim2:
 1364 0000 00000000 		.space	76
 1364      00000000 
 1364      00000000 
 1364      00000000 
 1364      00000000 
 1365              		.global	hi2c1
 1366              		.section	.bss.hi2c1,"aw",%nobits
ARM GAS  /tmp/cc8GRwsk.s 			page 46


 1367              		.align	2
 1370              	hi2c1:
 1371 0000 00000000 		.space	76
 1371      00000000 
 1371      00000000 
 1371      00000000 
 1371      00000000 
 1372              		.global	hadc2
 1373              		.section	.bss.hadc2,"aw",%nobits
 1374              		.align	2
 1377              	hadc2:
 1378 0000 00000000 		.space	108
 1378      00000000 
 1378      00000000 
 1378      00000000 
 1378      00000000 
 1379              		.global	hadc1
 1380              		.section	.bss.hadc1,"aw",%nobits
 1381              		.align	2
 1384              	hadc1:
 1385 0000 00000000 		.space	108
 1385      00000000 
 1385      00000000 
 1385      00000000 
 1385      00000000 
 1386              		.text
 1387              	.Letext0:
 1388              		.file 3 "/usr/lib/gcc/arm-none-eabi/12.2.1/include/stdint.h"
 1389              		.file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 1390              		.file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
 1391              		.file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 1392              		.file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h"
 1393              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
 1394              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 1395              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
 1396              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h"
 1397              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h"
 1398              		.file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 1399              		.file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 1400              		.file 15 "Inc/si5351.h"
 1401              		.file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
 1402              		.file 17 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h"
 1403              		.file 18 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h"
 1404              		.file 19 "Inc/main.h"
 1405              		.file 20 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h"
 1406              		.file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
 1407              		.file 22 "Inc/usb_device.h"
 1408              		.file 23 "<built-in>"
ARM GAS  /tmp/cc8GRwsk.s 			page 47


DEFINED SYMBOLS
                            *ABS*:00000000 main.c
     /tmp/cc8GRwsk.s:21     .text.MX_GPIO_Init:00000000 $t
     /tmp/cc8GRwsk.s:26     .text.MX_GPIO_Init:00000000 MX_GPIO_Init
     /tmp/cc8GRwsk.s:134    .text.MX_GPIO_Init:00000078 $d
     /tmp/cc8GRwsk.s:139    .text.Error_Handler:00000000 $t
     /tmp/cc8GRwsk.s:145    .text.Error_Handler:00000000 Error_Handler
     /tmp/cc8GRwsk.s:177    .text.MX_TIM2_Init:00000000 $t
     /tmp/cc8GRwsk.s:182    .text.MX_TIM2_Init:00000000 MX_TIM2_Init
     /tmp/cc8GRwsk.s:391    .text.MX_TIM2_Init:000000ec $d
     /tmp/cc8GRwsk.s:1363   .bss.htim2:00000000 htim2
     /tmp/cc8GRwsk.s:396    .text.MX_I2C1_Init:00000000 $t
     /tmp/cc8GRwsk.s:401    .text.MX_I2C1_Init:00000000 MX_I2C1_Init
     /tmp/cc8GRwsk.s:483    .text.MX_I2C1_Init:00000048 $d
     /tmp/cc8GRwsk.s:1370   .bss.hi2c1:00000000 hi2c1
     /tmp/cc8GRwsk.s:490    .text.MX_TIM3_Init:00000000 $t
     /tmp/cc8GRwsk.s:495    .text.MX_TIM3_Init:00000000 MX_TIM3_Init
     /tmp/cc8GRwsk.s:599    .text.MX_TIM3_Init:00000064 $d
     /tmp/cc8GRwsk.s:1356   .bss.htim3:00000000 htim3
     /tmp/cc8GRwsk.s:605    .text.MX_ADC1_Init:00000000 $t
     /tmp/cc8GRwsk.s:610    .text.MX_ADC1_Init:00000000 MX_ADC1_Init
     /tmp/cc8GRwsk.s:763    .text.MX_ADC1_Init:00000090 $d
     /tmp/cc8GRwsk.s:1384   .bss.hadc1:00000000 hadc1
     /tmp/cc8GRwsk.s:769    .text.MX_ADC2_Init:00000000 $t
     /tmp/cc8GRwsk.s:774    .text.MX_ADC2_Init:00000000 MX_ADC2_Init
     /tmp/cc8GRwsk.s:954    .text.MX_ADC2_Init:000000b0 $d
     /tmp/cc8GRwsk.s:1377   .bss.hadc2:00000000 hadc2
     /tmp/cc8GRwsk.s:961    .text.MX_USART1_UART_Init:00000000 $t
     /tmp/cc8GRwsk.s:966    .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
     /tmp/cc8GRwsk.s:1065   .text.MX_USART1_UART_Init:00000058 $d
     /tmp/cc8GRwsk.s:1349   .bss.huart1:00000000 huart1
     /tmp/cc8GRwsk.s:1071   .text.SystemClock_Config:00000000 $t
     /tmp/cc8GRwsk.s:1077   .text.SystemClock_Config:00000000 SystemClock_Config
     /tmp/cc8GRwsk.s:1204   .text.SystemClock_Config:00000080 $d
     /tmp/cc8GRwsk.s:1209   .text.main:00000000 $t
     /tmp/cc8GRwsk.s:1215   .text.main:00000000 main
     /tmp/cc8GRwsk.s:1338   .text.main:000000a0 $d
     /tmp/cc8GRwsk.s:1346   .bss.huart1:00000000 $d
     /tmp/cc8GRwsk.s:1353   .bss.htim3:00000000 $d
     /tmp/cc8GRwsk.s:1360   .bss.htim2:00000000 $d
     /tmp/cc8GRwsk.s:1367   .bss.hi2c1:00000000 $d
     /tmp/cc8GRwsk.s:1374   .bss.hadc2:00000000 $d
     /tmp/cc8GRwsk.s:1381   .bss.hadc1:00000000 $d

UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_TIM_Base_Init
HAL_TIM_ConfigClockSource
HAL_TIM_PWM_Init
HAL_TIMEx_MasterConfigSynchronization
HAL_TIM_PWM_ConfigChannel
HAL_TIM_MspPostInit
HAL_I2C_Init
HAL_I2CEx_ConfigAnalogFilter
HAL_I2CEx_ConfigDigitalFilter
memset
HAL_ADC_Init
ARM GAS  /tmp/cc8GRwsk.s 			page 48


HAL_ADCEx_MultiModeConfigChannel
HAL_ADC_ConfigChannel
HAL_UART_Init
HAL_UARTEx_SetTxFifoThreshold
HAL_UARTEx_SetRxFifoThreshold
HAL_UARTEx_DisableFifoMode
HAL_PWREx_ControlVoltageScaling
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCC_MCOConfig
HAL_Init
MX_USB_Device_Init
HAL_TIM_Base_Start_IT
HAL_TIM_PWM_Start
HAL_Delay
si5351_initialize
si5351_on_clk
si5351_set_frequency
