Files
squeow/squeow_sw/Src/main.c

856 lines
24 KiB
C
Raw Normal View History

2023-07-02 17:09:41 +02:00
/* USER CODE BEGIN Header */
/**
2025-01-28 19:01:22 +01:00
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
2023-07-02 17:09:41 +02:00
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "si5351.h"
2025-01-28 19:01:22 +01:00
#include "squeow.h"
#include "squeow_ui.h"
2023-07-02 17:09:41 +02:00
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc1;
ADC_HandleTypeDef hadc2;
2025-01-28 19:01:22 +01:00
DMA_HandleTypeDef hdma_adc2;
2023-07-02 17:09:41 +02:00
I2C_HandleTypeDef hi2c1;
TIM_HandleTypeDef htim2;
TIM_HandleTypeDef htim3;
2025-06-28 00:58:29 +02:00
TIM_HandleTypeDef htim8;
2023-07-02 17:09:41 +02:00
UART_HandleTypeDef huart1;
2025-01-28 19:01:22 +01:00
DMA_HandleTypeDef hdma_usart1_rx;
DMA_HandleTypeDef hdma_usart1_tx;
2023-07-02 17:09:41 +02:00
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
2025-01-28 19:01:22 +01:00
static void MX_DMA_Init(void);
2023-07-02 17:09:41 +02:00
static void MX_TIM2_Init(void);
static void MX_I2C1_Init(void);
static void MX_TIM3_Init(void);
static void MX_ADC1_Init(void);
static void MX_ADC2_Init(void);
static void MX_USART1_UART_Init(void);
2025-06-28 00:58:29 +02:00
static void MX_TIM8_Init(void);
2023-07-02 17:09:41 +02:00
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
2025-01-28 19:01:22 +01:00
2023-07-02 17:09:41 +02:00
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
2025-01-28 19:01:22 +01:00
MX_DMA_Init();
2023-07-02 17:09:41 +02:00
MX_TIM2_Init();
MX_I2C1_Init();
MX_TIM3_Init();
MX_ADC1_Init();
MX_ADC2_Init();
MX_USART1_UART_Init();
2025-06-28 00:58:29 +02:00
MX_TIM8_Init();
2023-07-02 17:09:41 +02:00
/* USER CODE BEGIN 2 */
2025-06-28 00:58:29 +02:00
// HAL_Delay(50);
// HAL_UARTEx_ReceiveToIdle_DMA(&huart1, (uint8_t *)&UART_RX_buf, UART_RX_BUF_SIZE);
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
// ADC1 audio
2025-01-28 19:01:22 +01:00
HAL_ADC_Start_IT(&hadc1);
// timer audio e pwm
HAL_TIM_Base_Start_IT(&htim2);
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
// timer sys
HAL_TIM_Base_Start_IT(&htim3);
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
2025-06-28 00:58:29 +02:00
// timer led
HAL_TIM_Base_Start_IT(&htim8);
HAL_TIM_PWM_Start(&htim8, TIM_CHANNEL_3);
// serve, lo start nonfa partire i CHN
TIM_CCxChannelCmd(htim8.Instance, TIM_CHANNEL_3, TIM_CCxN_ENABLE);
2025-01-28 19:01:22 +01:00
squeow_init();
squeow_ui_init();
2025-06-28 00:58:29 +02:00
/*
#ifdef SQUEOW_SYNTH
squeow_synth_init();
squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
squeow_synth_on();
#endif
*/
#ifdef SQUEOW_UI_SERIOW
seriow_stab_dump();
#endif
// prima lettura
HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
2023-07-02 17:09:41 +02:00
2025-06-28 00:58:29 +02:00
if (UART_TX_buf_lenght)
serial_write(UART_TX_buf, UART_TX_buf_lenght);
2023-07-02 17:09:41 +02:00
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
2025-01-28 19:01:22 +01:00
while (1) {
2023-07-02 17:09:41 +02:00
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
2025-01-28 19:01:22 +01:00
if (sys_tick) {
2025-06-28 00:58:29 +02:00
// 100hz
2025-01-28 19:01:22 +01:00
if (adc2_done) {
2025-06-28 00:58:29 +02:00
adc_rileva_soglie(adc2_valori);
2025-01-28 19:01:22 +01:00
HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
adc2_done = 0;
}
2025-06-28 00:58:29 +02:00
#ifdef SQUEOW_UI_LED
// visualizza LED volume con valore aggiornato da vu_meter
led_pwm_duty(ui_volume >> 3);
processa_blocco();
if (codice_allarme)
led_blocco(codice_allarme);
#endif
// eventi lenti
if (sys_tick_prescale > SYS_TICK_PRESCALE_10HZ) {
2025-01-28 19:01:22 +01:00
sys_tick_prescale = 0;
2025-06-28 00:58:29 +02:00
#ifdef SQUEOW_UI_TOSTA
tosta_var_bars();
#endif
#ifdef SQUEOW_UI_SERIOW
seriow_var_dump();
#endif
if (HAL_GPIO_ReadPin(G1_GPIO_Port, G1_Pin) == GPIO_PIN_RESET) {
blocco = 0;
}
if (UART_TX_buf_lenght)
serial_write(UART_TX_buf, UART_TX_buf_lenght);
} else {
sys_tick_prescale++;
}
2025-01-28 19:01:22 +01:00
sys_tick = 0;
}
}
2023-07-02 17:09:41 +02:00
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
2025-01-28 19:01:22 +01:00
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
2023-07-02 17:09:41 +02:00
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
2025-01-28 19:01:22 +01:00
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
2023-07-02 17:09:41 +02:00
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
2025-06-28 00:58:29 +02:00
RCC_OscInitStruct.PLL.PLLN = 28;
2023-07-02 17:09:41 +02:00
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
2025-01-28 19:01:22 +01:00
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
2023-07-02 17:09:41 +02:00
{
Error_Handler();
}
2025-06-28 00:58:29 +02:00
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
2023-07-02 17:09:41 +02:00
}
/**
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_MultiModeTypeDef multimode = {0};
2025-01-28 19:01:22 +01:00
ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
2023-07-02 17:09:41 +02:00
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
2025-01-28 19:01:22 +01:00
hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
2023-07-02 17:09:41 +02:00
hadc1.Init.Resolution = ADC_RESOLUTION_12B;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.GainCompensation = 0;
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc1.Init.LowPowerAutoWait = DISABLE;
hadc1.Init.ContinuousConvMode = DISABLE;
hadc1.Init.NbrOfConversion = 1;
hadc1.Init.DiscontinuousConvMode = DISABLE;
2025-01-28 19:01:22 +01:00
hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
2023-07-02 17:09:41 +02:00
hadc1.Init.DMAContinuousRequests = DISABLE;
hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc1.Init.OversamplingMode = DISABLE;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure the ADC multi-mode
*/
multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
{
Error_Handler();
}
2025-01-28 19:01:22 +01:00
/** Configure Analog WatchDog 1
*/
AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1;
AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
AnalogWDGConfig.Channel = ADC_CHANNEL_15;
AnalogWDGConfig.ITMode = ENABLE;
AnalogWDGConfig.HighThreshold = 4048;
AnalogWDGConfig.LowThreshold = 48;
AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_NONE;
if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
{
Error_Handler();
}
2023-07-02 17:09:41 +02:00
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_15;
sConfig.Rank = ADC_REGULAR_RANK_1;
2025-01-28 19:01:22 +01:00
sConfig.SamplingTime = ADC_SAMPLETIME_92CYCLES_5;
2023-07-02 17:09:41 +02:00
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
/**
* @brief ADC2 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC2_Init(void)
{
/* USER CODE BEGIN ADC2_Init 0 */
/* USER CODE END ADC2_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC2_Init 1 */
/* USER CODE END ADC2_Init 1 */
/** Common config
*/
hadc2.Instance = ADC2;
2025-01-28 19:01:22 +01:00
hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
2023-07-02 17:09:41 +02:00
hadc2.Init.Resolution = ADC_RESOLUTION_12B;
hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc2.Init.GainCompensation = 0;
hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
hadc2.Init.LowPowerAutoWait = DISABLE;
hadc2.Init.ContinuousConvMode = DISABLE;
hadc2.Init.NbrOfConversion = 4;
hadc2.Init.DiscontinuousConvMode = DISABLE;
hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc2.Init.DMAContinuousRequests = DISABLE;
hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc2.Init.OversamplingMode = DISABLE;
if (HAL_ADC_Init(&hadc2) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
2025-06-28 00:58:29 +02:00
sConfig.Channel = ADC_CHANNEL_4;
2023-07-02 17:09:41 +02:00
sConfig.Rank = ADC_REGULAR_RANK_1;
2025-01-28 19:01:22 +01:00
sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
2023-07-02 17:09:41 +02:00
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
2025-06-28 00:58:29 +02:00
sConfig.Channel = ADC_CHANNEL_3;
2023-07-02 17:09:41 +02:00
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
2025-01-28 19:01:22 +01:00
sConfig.Channel = ADC_CHANNEL_13;
2023-07-02 17:09:41 +02:00
sConfig.Rank = ADC_REGULAR_RANK_3;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
2025-01-28 19:01:22 +01:00
sConfig.Channel = ADC_CHANNEL_17;
2023-07-02 17:09:41 +02:00
sConfig.Rank = ADC_REGULAR_RANK_4;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC2_Init 2 */
/* USER CODE END ADC2_Init 2 */
}
/**
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
/* USER CODE BEGIN I2C1_Init 0 */
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
2025-06-28 00:58:29 +02:00
hi2c1.Init.Timing = 0x50916E9F;
2023-07-02 17:09:41 +02:00
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c1.Init.OwnAddress2 = 0;
hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
{
Error_Handler();
}
/** Configure Analogue filter
*/
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
{
Error_Handler();
}
/** Configure Digital filter
*/
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
htim2.Init.Prescaler = 0;
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
2025-01-28 19:01:22 +01:00
htim2.Init.Period = 4095;
2023-07-02 17:09:41 +02:00
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
2025-01-28 19:01:22 +01:00
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
2023-07-02 17:09:41 +02:00
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 500;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
2025-01-28 19:01:22 +01:00
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
2023-07-02 17:09:41 +02:00
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
sConfigOC.Pulse = 1000;
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
{
Error_Handler();
}
sConfigOC.Pulse = 1500;
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
{
Error_Handler();
}
sConfigOC.Pulse = 2000;
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
}
/**
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
2025-06-28 00:58:29 +02:00
htim3.Init.Prescaler = 16799;
2023-07-02 17:09:41 +02:00
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
2025-06-28 00:58:29 +02:00
htim3.Init.Period = 99;
2023-07-02 17:09:41 +02:00
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
}
2025-06-28 00:58:29 +02:00
/**
* @brief TIM8 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM8_Init(void)
{
/* USER CODE BEGIN TIM8_Init 0 */
/* USER CODE END TIM8_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
/* USER CODE BEGIN TIM8_Init 1 */
/* USER CODE END TIM8_Init 1 */
htim8.Instance = TIM8;
htim8.Init.Prescaler = 1679;
htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
htim8.Init.Period = 255;
htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim8.Init.RepetitionCounter = 0;
htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim8) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
{
Error_Handler();
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.BreakFilter = 0;
sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
sBreakDeadTimeConfig.Break2Filter = 0;
sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM8_Init 2 */
htim8.Instance->BDTR |= 0x8000;
/* USER CODE END TIM8_Init 2 */
HAL_TIM_MspPostInit(&htim8);
}
2023-07-02 17:09:41 +02:00
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
2025-06-28 00:58:29 +02:00
huart1.Init.BaudRate = 38400;
2023-07-02 17:09:41 +02:00
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
2025-01-28 19:01:22 +01:00
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMAMUX1_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
/* DMA1_Channel3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
/* DMA1_Channel4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
}
2023-07-02 17:09:41 +02:00
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
2025-06-28 00:58:29 +02:00
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
2023-07-02 17:09:41 +02:00
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
2025-01-28 19:01:22 +01:00
/*Configure GPIO pin Output Level */
2025-06-28 00:58:29 +02:00
HAL_GPIO_WritePin(GPIOB, G2_Pin|G4_Pin, GPIO_PIN_RESET);
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
/*Configure GPIO pin : PA8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
2023-07-02 17:09:41 +02:00
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
2025-06-28 00:58:29 +02:00
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
2023-07-02 17:09:41 +02:00
2025-06-28 00:58:29 +02:00
/*Configure GPIO pin : G1_Pin */
GPIO_InitStruct.Pin = G1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(G1_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : G2_Pin G4_Pin */
GPIO_InitStruct.Pin = G2_Pin|G4_Pin;
2025-01-28 19:01:22 +01:00
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
2025-06-28 00:58:29 +02:00
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
2023-07-02 17:09:41 +02:00
}
/* USER CODE BEGIN 4 */
2025-01-28 19:01:22 +01:00
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc) {
2025-06-28 00:58:29 +02:00
// analog_wd_status = 3;
2025-01-28 19:01:22 +01:00
}
2025-06-28 00:58:29 +02:00
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) { adc2_done = 1; }
2025-01-28 19:01:22 +01:00
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t offset) {
static uint16_t last_offset = 0;
// Ignore if called twice (which will happen on every half buffer)
if (offset != last_offset) {
// If wrap around reset last_size
if (offset < last_offset)
last_offset = 0;
while (last_offset < offset) {
// process_character((char) dmabuf[last_offset]);
// TODO
// store_cmd(UART_RX_buf[last_offset]);
++last_offset;
}
}
}
2025-06-28 00:58:29 +02:00
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { uart_sent = 1; }
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { uart_sent = 1; }
void UART_DMATransmitCplt(UART_HandleTypeDef *huart) { uart_sent = 1; }
2023-07-02 17:09:41 +02:00
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
2025-01-28 19:01:22 +01:00
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1) {
}
2023-07-02 17:09:41 +02:00
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
2025-01-28 19:01:22 +01:00
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
2023-07-02 17:09:41 +02:00
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */