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squeow/squeow_sw/build/stm32g4xx_hal_dma.lst

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ARM GAS /tmp/ccSt8eya.s page 1
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1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32g4xx_hal_dma.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c"
20 .section .text.DMA_SetConfig,"ax",%progbits
21 .align 1
22 .syntax unified
23 .thumb
24 .thumb_func
26 DMA_SetConfig:
27 .LVL0:
28 .LFB341:
1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @file stm32g4xx_hal_dma.c
4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @author MCD Application Team
5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DMA HAL module driver.
6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral:
8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + Initialization and de-initialization functions
9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + IO operation functions
10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + Peripheral State and errors functions
11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @attention
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * Copyright (c) 2019 STMicroelectronics.
16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * All rights reserved.
17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * This software is licensed under terms that can be found in the LICENSE file
19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * in the root directory of this software component.
20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ==============================================================================
25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### How to use this driver #####
26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ==============================================================================
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** necessary). Please refer to the Reference manual for connection between peripherals
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31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** and DMA requests.
32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters:
34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Channel request, Transfer Direction, Source and Destination data formats,
35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** using HAL_DMA_Init() function.
37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Prior to HAL_DMA_Init the peripheral clock shall be enabled for both DMA & DMAMUX
39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** thanks to:
40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (##) DMA1 or DMA2: __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE() ;
41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (##) DMAMUX1: __HAL_RCC_DMAMUX1_CLK_ENABLE();
42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er
44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** detection.
45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer
47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** Polling mode IO operation ***
51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** =================================
52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** address and destination address and the Length of data to be transferred
55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application.
57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** Interrupt mode IO operation ***
59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===================================
60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred.
65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** In this case the DMA interrupt is configured
66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** add his own function to register callbacks with HAL_DMA_RegisterCallback().
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** DMA HAL driver macros list ***
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** =============================================
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Below the list of macros in DMA HAL driver.
74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred
82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
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88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/
90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #include "stm32g4xx_hal.h"
91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @addtogroup STM32G4xx_HAL_Driver
93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA DMA
97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DMA HAL module driver
98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED
102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/
104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/
108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions
109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32
112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/
121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Initialization and de-initialization functions
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### Initialization and de-initialization functions #####
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction,
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** reference manual.
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
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145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Initialize the DMA according to the specified
147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle.
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tmp;
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the DMA handle allocation */
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma == NULL)
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode));
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Compute the channel index */
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get the CR register value */
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp = hdma->Instance->CCR;
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE |
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_DIR | DMA_CCR_MEM2MEM));
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Prepare the DMA Channel configuration */
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp |= hdma->Init.Direction |
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
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202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Write to DMA Channel CR register */
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CCR = tmp;
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX channel :
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXChannelBaseAndMask(hdma);
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if memory to memory force the request to 0*/
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Request = DMA_REQUEST_MEM2MEM;
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Set peripheral request to DMAMUX channel */
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX request generator :
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX request generator register*/
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR = 0U;
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = 0U;
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the error code */
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the DMA state*/
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Allocate lock resource and initialize it */
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED;
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral.
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259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the DMA handle allocation */
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (NULL == hdma)
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the selected DMA Channelx */
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Compute the channel index */
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset DMA Channel control register */
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CCR = 0;
294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX channel :
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXChannelBaseAndMask(hdma);
302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX channel that corresponds to the DMA channel */
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR = 0;
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset Request generator parameters if any */
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX request generator :
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
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316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX request generator register*/
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR = 0U;
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = 0U;
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clean callbacks */
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the error code */
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the DMA state */
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET;
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Input and Output operation functions
352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### IO operation functions #####
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..] This section provides functions allowing to:
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the source, destination address and data length and
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Start DMA transfer with interrupt
361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Abort DMA transfer
362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Poll for transfer complete
363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Handle DMA interrupt request
364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Start the DMA Transfer.
371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
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373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination (up to 256Kb
376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress,
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength));
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the peripheral */
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure the source, destination address and the data length & clear flags*/
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Peripheral */
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma);
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled.
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination (up to 256Kb
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres
422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t DataLength)
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength));
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
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430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the peripheral */
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure the source, destination address and the data length & clear flags*/
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the transfer complete interrupt */
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the transfer Error interrupt */
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (NULL != hdma->XferHalfCpltCallback)
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Half transfer complete interrupt as well */
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check if DMAMUX Synchronization is enabled*/
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable DMAMUX sync overrun IT*/
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* enable the request gen overrun IT*/
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Peripheral */
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma);
473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Remain BUSY */
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Abort the DMA Transfer.
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487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY)
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable DMA IT */
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the DMAMUX sync overrun IT*/
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the channel */
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the request gen overrun IT*/
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Aborts the DMA Transfer in Interrupt mode.
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
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544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State)
549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable DMA IT */
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the channel */
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the DMAMUX sync overrun IT*/
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the request gen overrun IT*/
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Call User Abort callback */
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferAbortCallback != NULL)
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback(hdma);
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
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601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Polling for transfer complete.
605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete.
608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param Timeout Timeout duration.
609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com
612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t Timeout)
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t temp;
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tickstart;
616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State)
618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Polling mode not supported in circular mode */
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (0U != (hdma->Instance->CCR & DMA_CCR_CIRC))
627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get the level transfer complete flag */
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Complete flag */
636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** temp = (uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU);
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half Transfer Complete flag */
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** temp = (uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU);
643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get tick */
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tickstart = HAL_GetTick();
647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** while (0U == (hdma->DmaBaseAddress->ISR & temp))
649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((0U != (hdma->DmaBaseAddress->ISR & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU)
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* When a DMA transfer error occurs */
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */
654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
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658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE;
659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check for the Timeout */
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (Timeout != HAL_MAX_DELAY)
670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /*Check for DMAMUX Request generator (if used) overrun status */
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator Check for DMAMUX request generator overrun */
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the request gen overrun interrupt */
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check for DMAMUX Synchronization overrun */
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
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715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the transfer complete flag */
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU));
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** all transfers are complete) */
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the half transfer complete flag */
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU));
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process unlocked */
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Handle DMA interrupt request.
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR;
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((0U != (flag_it & ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU)))) && (0U != (sourc
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the half transfer interrupt */
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the half transfer complete flag */
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1FU));
757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* but in Transfer Complete case */
760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferHalfCpltCallback != NULL)
762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half transfer callback */
764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma);
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU))))
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
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772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the transfer complete and error interrupt */
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the transfer complete flag */
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1FU));
781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferCpltCallback != NULL)
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer complete callback */
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback(hdma);
789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Error Interrupt management **************************************/
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU))))
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* When a DMA transfer error occurs */
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */
797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable ALL DMA IT */
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE;
805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferErrorCallback != NULL)
813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer error callback */
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback(hdma);
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Nothing To Do */
821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return;
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Register callbacks
827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
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829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CallbackID User Callback identifier
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param pCallback pointer to private callbacsk function which has pointer to
832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter.
833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** switch (CallbackID)
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID:
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = pCallback;
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID:
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback;
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID:
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = pCallback;
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID:
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = pCallback;
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** default:
863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief UnRegister callbacks
880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CallbackID User Callback identifier
883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
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886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** switch (CallbackID)
896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID:
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID:
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID:
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID:
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID:
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** default:
921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
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943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Peripheral State and Errors functions
944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### Peripheral State and Errors functions #####
948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** This subsection provides functions allowing to
951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Check the DMA state
952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Get error code
953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Return the DMA hande state.
960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL state
963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Return DMA handle state */
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->State;
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Return the DMA error code.
972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval DMA Error Code
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->ErrorCode;
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions
990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Sets the DMA Transfer parameter.
995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination
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1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32
1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
29 .loc 1 1003 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
34 .loc 1 1003 1 is_stmt 0 view .LVU1
35 0000 30B4 push {r4, r5}
36 .LCFI0:
37 .cfi_def_cfa_offset 8
38 .cfi_offset 4, -8
39 .cfi_offset 5, -4
1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
40 .loc 1 1005 3 is_stmt 1 view .LVU2
41 .loc 1 1005 7 is_stmt 0 view .LVU3
42 0002 C46C ldr r4, [r0, #76]
43 .loc 1 1005 34 view .LVU4
44 0004 056D ldr r5, [r0, #80]
45 0006 6560 str r5, [r4, #4]
1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
46 .loc 1 1007 3 is_stmt 1 view .LVU5
47 .loc 1 1007 11 is_stmt 0 view .LVU6
48 0008 446D ldr r4, [r0, #84]
49 .loc 1 1007 6 view .LVU7
50 000a 14B1 cbz r4, .L2
1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
51 .loc 1 1010 5 is_stmt 1 view .LVU8
52 .loc 1 1010 9 is_stmt 0 view .LVU9
53 000c 846D ldr r4, [r0, #88]
54 .loc 1 1010 41 view .LVU10
55 000e C56D ldr r5, [r0, #92]
56 0010 6560 str r5, [r4, #4]
57 .L2:
1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
58 .loc 1 1014 3 is_stmt 1 view .LVU11
59 .loc 1 1014 54 is_stmt 0 view .LVU12
60 0012 446C ldr r4, [r0, #68]
61 .loc 1 1014 69 view .LVU13
62 0014 04F01F0C and ip, r4, #31
63 .loc 1 1014 46 view .LVU14
64 0018 0124 movs r4, #1
65 001a 04FA0CF4 lsl r4, r4, ip
66 .loc 1 1014 30 view .LVU15
67 001e 056C ldr r5, [r0, #64]
68 0020 6C60 str r4, [r5, #4]
1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel data length */
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1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength;
69 .loc 1 1017 3 is_stmt 1 view .LVU16
70 .loc 1 1017 7 is_stmt 0 view .LVU17
71 0022 0468 ldr r4, [r0]
72 .loc 1 1017 25 view .LVU18
73 0024 6360 str r3, [r4, #4]
1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Memory to Peripheral */
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
74 .loc 1 1020 3 is_stmt 1 view .LVU19
75 .loc 1 1020 18 is_stmt 0 view .LVU20
76 0026 8368 ldr r3, [r0, #8]
77 .LVL1:
78 .loc 1 1020 6 view .LVU21
79 0028 102B cmp r3, #16
80 002a 05D0 beq .L6
1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel destination address */
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress;
1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel source address */
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress;
1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Peripheral to Memory */
1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel source address */
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress;
81 .loc 1 1032 5 is_stmt 1 view .LVU22
82 .loc 1 1032 9 is_stmt 0 view .LVU23
83 002c 0368 ldr r3, [r0]
84 .loc 1 1032 26 view .LVU24
85 002e 9960 str r1, [r3, #8]
86 .LVL2:
1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel destination address */
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress;
87 .loc 1 1035 5 is_stmt 1 view .LVU25
88 .loc 1 1035 9 is_stmt 0 view .LVU26
89 0030 0368 ldr r3, [r0]
90 .loc 1 1035 26 view .LVU27
91 0032 DA60 str r2, [r3, #12]
92 .L1:
1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
93 .loc 1 1037 1 view .LVU28
94 0034 30BC pop {r4, r5}
95 .LCFI1:
96 .cfi_remember_state
97 .cfi_restore 5
98 .cfi_restore 4
99 .cfi_def_cfa_offset 0
100 0036 7047 bx lr
101 .LVL3:
102 .L6:
103 .LCFI2:
104 .cfi_restore_state
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1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
105 .loc 1 1023 5 is_stmt 1 view .LVU29
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
106 .loc 1 1023 9 is_stmt 0 view .LVU30
107 0038 0368 ldr r3, [r0]
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
108 .loc 1 1023 26 view .LVU31
109 003a 9A60 str r2, [r3, #8]
110 .LVL4:
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
111 .loc 1 1026 5 is_stmt 1 view .LVU32
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
112 .loc 1 1026 9 is_stmt 0 view .LVU33
113 003c 0368 ldr r3, [r0]
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
114 .loc 1 1026 26 view .LVU34
115 003e D960 str r1, [r3, #12]
116 0040 F8E7 b .L1
117 .cfi_endproc
118 .LFE341:
120 .section .text.DMA_CalcDMAMUXChannelBaseAndMask,"ax",%progbits
121 .align 1
122 .syntax unified
123 .thumb
124 .thumb_func
126 DMA_CalcDMAMUXChannelBaseAndMask:
127 .LVL5:
128 .LFB342:
1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Updates the DMA handle with the DMAMUX channel and status mask depending on stream num
1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Stream.
1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
129 .loc 1 1046 1 is_stmt 1 view -0
130 .cfi_startproc
131 @ args = 0, pretend = 0, frame = 0
132 @ frame_needed = 0, uses_anonymous_args = 0
133 @ link register save eliminated.
1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t dmamux_base_addr;
134 .loc 1 1047 3 view .LVU36
1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t channel_number;
135 .loc 1 1048 3 view .LVU37
1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX_Channel_TypeDef *DMAMUX1_ChannelBase;
136 .loc 1 1049 3 view .LVU38
1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* check if instance is not outside the DMA channel range */
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1)
137 .loc 1 1052 3 view .LVU39
138 .loc 1 1052 21 is_stmt 0 view .LVU40
139 0000 0368 ldr r3, [r0]
140 .loc 1 1052 6 view .LVU41
141 0002 0C4A ldr r2, .L10
142 0004 9342 cmp r3, r2
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143 0006 13D8 bhi .L9
1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel0;
144 .loc 1 1055 25 view .LVU42
145 0008 0B49 ldr r1, .L10+4
146 .L8:
147 .LVL6:
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
v1.2
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1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G414xx
primo commit
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1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel8;
v1.2
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1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #elif defined (STM32G411xB) || defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1
primo commit
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1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel6;
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #else
1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel7;
1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #endif /* STM32G4x1xx) */
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** dmamux_base_addr = (uint32_t)DMAMUX1_ChannelBase;
148 .loc 1 1068 3 is_stmt 1 view .LVU43
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
149 .loc 1 1069 3 view .LVU44
150 .loc 1 1069 47 is_stmt 0 view .LVU45
151 000a DBB2 uxtb r3, r3
152 .loc 1 1069 56 view .LVU46
153 000c 083B subs r3, r3, #8
154 .loc 1 1069 18 view .LVU47
155 000e 0B4A ldr r2, .L10+8
156 0010 A2FB0323 umull r2, r3, r2, r3
157 .LVL7:
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelInde
158 .loc 1 1070 3 is_stmt 1 view .LVU48
159 .loc 1 1070 87 is_stmt 0 view .LVU49
160 0014 426C ldr r2, [r0, #68]
161 .loc 1 1070 109 view .LVU50
162 0016 22F00302 bic r2, r2, #3
163 .loc 1 1070 51 view .LVU51
164 001a 0A44 add r2, r2, r1
165 .loc 1 1070 23 view .LVU52
166 001c 8264 str r2, [r0, #72]
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
167 .loc 1 1071 3 is_stmt 1 view .LVU53
168 .loc 1 1071 29 is_stmt 0 view .LVU54
169 001e 084A ldr r2, .L10+12
170 0020 C264 str r2, [r0, #76]
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
171 .loc 1 1072 3 is_stmt 1 view .LVU55
172 .loc 1 1072 58 is_stmt 0 view .LVU56
173 0022 C3F30413 ubfx r3, r3, #4, #5
174 .LVL8:
175 .loc 1 1072 39 view .LVU57
176 0026 0122 movs r2, #1
177 0028 02FA03F3 lsl r3, r2, r3
178 .loc 1 1072 33 view .LVU58
179 002c 0365 str r3, [r0, #80]
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1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
180 .loc 1 1073 1 view .LVU59
181 002e 7047 bx lr
182 .LVL9:
183 .L9:
1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #else
184 .loc 1 1063 25 view .LVU60
185 0030 0449 ldr r1, .L10+16
186 0032 EAE7 b .L8
187 .L11:
188 .align 2
189 .L10:
190 0034 07040240 .word 1073873927
191 0038 00080240 .word 1073874944
192 003c CDCCCCCC .word -858993459
193 0040 80080240 .word 1073875072
194 0044 20080240 .word 1073874976
195 .cfi_endproc
196 .LFE342:
198 .section .text.DMA_CalcDMAMUXRequestGenBaseAndMask,"ax",%progbits
199 .align 1
200 .syntax unified
201 .thumb
202 .thumb_func
204 DMA_CalcDMAMUXRequestGenBaseAndMask:
205 .LVL10:
206 .LFB343:
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Updates the DMA handle with the DMAMUX request generator params
1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
207 .loc 1 1083 1 is_stmt 1 view -0
208 .cfi_startproc
209 @ args = 0, pretend = 0, frame = 0
210 @ frame_needed = 0, uses_anonymous_args = 0
211 @ link register save eliminated.
1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
212 .loc 1 1084 3 view .LVU62
213 .loc 1 1084 12 is_stmt 0 view .LVU63
214 0000 0379 ldrb r3, [r0, #4] @ zero_extendqisi2
215 .LVL11:
1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA Channels are connected to DMAMUX1 request generator blocks*/
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGener
216 .loc 1 1087 3 is_stmt 1 view .LVU64
217 .loc 1 1087 58 is_stmt 0 view .LVU65
218 0002 074A ldr r2, .L13
219 0004 1A44 add r2, r2, r3
220 0006 9200 lsls r2, r2, #2
221 .loc 1 1087 26 view .LVU66
222 0008 4265 str r2, [r0, #84]
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1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
223 .loc 1 1089 3 is_stmt 1 view .LVU67
224 .loc 1 1089 32 is_stmt 0 view .LVU68
225 000a 064A ldr r2, .L13+4
226 000c 8265 str r2, [r0, #88]
1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x1FU);
227 .loc 1 1091 3 is_stmt 1 view .LVU69
228 .loc 1 1091 55 is_stmt 0 view .LVU70
229 000e 013B subs r3, r3, #1
230 .LVL12:
231 .loc 1 1091 61 view .LVU71
232 0010 03F01F03 and r3, r3, #31
233 .LVL13:
234 .loc 1 1091 42 view .LVU72
235 0014 0122 movs r2, #1
236 0016 02FA03F3 lsl r3, r2, r3
237 .loc 1 1091 36 view .LVU73
238 001a C365 str r3, [r0, #92]
1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
239 .loc 1 1092 1 view .LVU74
240 001c 7047 bx lr
241 .L14:
242 001e 00BF .align 2
243 .L13:
244 0020 3F820010 .word 268468799
245 0024 40090240 .word 1073875264
246 .cfi_endproc
247 .LFE343:
249 .section .text.HAL_DMA_Init,"ax",%progbits
250 .align 1
251 .global HAL_DMA_Init
252 .syntax unified
253 .thumb
254 .thumb_func
256 HAL_DMA_Init:
257 .LVL14:
258 .LFB329:
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tmp;
259 .loc 1 153 1 is_stmt 1 view -0
260 .cfi_startproc
261 @ args = 0, pretend = 0, frame = 0
262 @ frame_needed = 0, uses_anonymous_args = 0
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
263 .loc 1 154 3 view .LVU76
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
264 .loc 1 157 3 view .LVU77
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
265 .loc 1 157 6 is_stmt 0 view .LVU78
266 0000 0028 cmp r0, #0
v1.2
2025-01-28 19:01:22 +01:00
267 0002 59D0 beq .L22
primo commit
2023-07-02 17:09:41 +02:00
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tmp;
268 .loc 1 153 1 view .LVU79
269 0004 10B5 push {r4, lr}
270 .LCFI3:
271 .cfi_def_cfa_offset 8
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 25
primo commit
2023-07-02 17:09:41 +02:00
272 .cfi_offset 4, -8
273 .cfi_offset 14, -4
274 0006 0446 mov r4, r0
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
275 .loc 1 163 3 is_stmt 1 view .LVU80
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
276 .loc 1 164 3 view .LVU81
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
277 .loc 1 165 3 view .LVU82
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
278 .loc 1 166 3 view .LVU83
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
279 .loc 1 167 3 view .LVU84
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode));
280 .loc 1 168 3 view .LVU85
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
281 .loc 1 169 3 view .LVU86
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
282 .loc 1 170 3 view .LVU87
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
283 .loc 1 172 3 view .LVU88
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
284 .loc 1 175 3 view .LVU89
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
285 .loc 1 175 22 is_stmt 0 view .LVU90
v1.2
2025-01-28 19:01:22 +01:00
286 0008 0268 ldr r2, [r0]
primo commit
2023-07-02 17:09:41 +02:00
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
287 .loc 1 175 6 view .LVU91
v1.2
2025-01-28 19:01:22 +01:00
288 000a 2C4B ldr r3, .L29
289 000c 9A42 cmp r2, r3
290 000e 3BD8 bhi .L17
primo commit
2023-07-02 17:09:41 +02:00
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
291 .loc 1 178 5 is_stmt 1 view .LVU92
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
292 .loc 1 178 53 is_stmt 0 view .LVU93
v1.2
2025-01-28 19:01:22 +01:00
293 0010 2B4B ldr r3, .L29+4
294 0012 1344 add r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
295 .loc 1 178 80 view .LVU94
v1.2
2025-01-28 19:01:22 +01:00
296 0014 2B49 ldr r1, .L29+8
297 0016 A1FB0313 umull r1, r3, r1, r3
primo commit
2023-07-02 17:09:41 +02:00
298 001a 1B09 lsrs r3, r3, #4
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
299 .loc 1 178 135 view .LVU95
300 001c 9B00 lsls r3, r3, #2
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
301 .loc 1 178 24 view .LVU96
302 001e 4364 str r3, [r0, #68]
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
303 .loc 1 179 5 is_stmt 1 view .LVU97
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
304 .loc 1 179 26 is_stmt 0 view .LVU98
v1.2
2025-01-28 19:01:22 +01:00
305 0020 294B ldr r3, .L29+12
primo commit
2023-07-02 17:09:41 +02:00
306 0022 0364 str r3, [r0, #64]
307 .L18:
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
308 .loc 1 189 3 is_stmt 1 view .LVU99
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 26
primo commit
2023-07-02 17:09:41 +02:00
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
309 .loc 1 189 15 is_stmt 0 view .LVU100
310 0024 0223 movs r3, #2
311 0026 84F82530 strb r3, [r4, #37]
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
312 .loc 1 192 3 is_stmt 1 view .LVU101
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
313 .loc 1 192 7 is_stmt 0 view .LVU102
v1.2
2025-01-28 19:01:22 +01:00
314 002a 1168 ldr r1, [r2]
primo commit
2023-07-02 17:09:41 +02:00
315 .LVL15:
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
316 .loc 1 195 3 is_stmt 1 view .LVU103
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
317 .loc 1 195 7 is_stmt 0 view .LVU104
v1.2
2025-01-28 19:01:22 +01:00
318 002c 6FF30E11 bfc r1, #4, #11
primo commit
2023-07-02 17:09:41 +02:00
319 .LVL16:
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
v1.2
2025-01-28 19:01:22 +01:00
320 .loc 1 200 3 is_stmt 1 view .LVU105
primo commit
2023-07-02 17:09:41 +02:00
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
v1.2
2025-01-28 19:01:22 +01:00
321 .loc 1 200 21 is_stmt 0 view .LVU106
322 0030 A368 ldr r3, [r4, #8]
primo commit
2023-07-02 17:09:41 +02:00
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
v1.2
2025-01-28 19:01:22 +01:00
323 .loc 1 201 21 view .LVU107
324 0032 E068 ldr r0, [r4, #12]
325 .LVL17:
primo commit
2023-07-02 17:09:41 +02:00
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
v1.2
2025-01-28 19:01:22 +01:00
326 .loc 1 200 39 view .LVU108
327 0034 0343 orrs r3, r3, r0
primo commit
2023-07-02 17:09:41 +02:00
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
v1.2
2025-01-28 19:01:22 +01:00
328 .loc 1 201 54 view .LVU109
329 0036 2069 ldr r0, [r4, #16]
primo commit
2023-07-02 17:09:41 +02:00
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
v1.2
2025-01-28 19:01:22 +01:00
330 .loc 1 201 42 view .LVU110
331 0038 0343 orrs r3, r3, r0
primo commit
2023-07-02 17:09:41 +02:00
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
v1.2
2025-01-28 19:01:22 +01:00
332 .loc 1 202 21 view .LVU111
333 003a 6069 ldr r0, [r4, #20]
primo commit
2023-07-02 17:09:41 +02:00
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
v1.2
2025-01-28 19:01:22 +01:00
334 .loc 1 201 72 view .LVU112
335 003c 0343 orrs r3, r3, r0
primo commit
2023-07-02 17:09:41 +02:00
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
v1.2
2025-01-28 19:01:22 +01:00
336 .loc 1 202 54 view .LVU113
337 003e A069 ldr r0, [r4, #24]
primo commit
2023-07-02 17:09:41 +02:00
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
v1.2
2025-01-28 19:01:22 +01:00
338 .loc 1 202 42 view .LVU114
339 0040 0343 orrs r3, r3, r0
primo commit
2023-07-02 17:09:41 +02:00
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
340 .loc 1 203 21 view .LVU115
341 0042 E069 ldr r0, [r4, #28]
primo commit
2023-07-02 17:09:41 +02:00
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
v1.2
2025-01-28 19:01:22 +01:00
342 .loc 1 202 72 view .LVU116
343 0044 0343 orrs r3, r3, r0
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
344 .loc 1 203 54 view .LVU117
345 0046 206A ldr r0, [r4, #32]
primo commit
2023-07-02 17:09:41 +02:00
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
346 .loc 1 203 42 view .LVU118
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 27
primo commit
2023-07-02 17:09:41 +02:00
v1.2
2025-01-28 19:01:22 +01:00
347 0048 0343 orrs r3, r3, r0
primo commit
2023-07-02 17:09:41 +02:00
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
v1.2
2025-01-28 19:01:22 +01:00
348 .loc 1 200 7 view .LVU119
349 004a 0B43 orrs r3, r3, r1
350 .LVL18:
primo commit
2023-07-02 17:09:41 +02:00
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
351 .loc 1 206 3 is_stmt 1 view .LVU120
primo commit
2023-07-02 17:09:41 +02:00
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
352 .loc 1 206 23 is_stmt 0 view .LVU121
353 004c 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
354 .loc 1 211 3 is_stmt 1 view .LVU122
355 004e 2046 mov r0, r4
356 0050 FFF7FEFF bl DMA_CalcDMAMUXChannelBaseAndMask
357 .LVL19:
primo commit
2023-07-02 17:09:41 +02:00
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
358 .loc 1 213 3 view .LVU123
primo commit
2023-07-02 17:09:41 +02:00
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
359 .loc 1 213 17 is_stmt 0 view .LVU124
360 0054 A368 ldr r3, [r4, #8]
primo commit
2023-07-02 17:09:41 +02:00
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
361 .loc 1 213 6 view .LVU125
362 0056 B3F5804F cmp r3, #16384
363 005a 20D0 beq .L27
364 .L19:
primo commit
2023-07-02 17:09:41 +02:00
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
365 .loc 1 220 3 is_stmt 1 view .LVU126
primo commit
2023-07-02 17:09:41 +02:00
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
366 .loc 1 220 7 is_stmt 0 view .LVU127
367 005c A36C ldr r3, [r4, #72]
primo commit
2023-07-02 17:09:41 +02:00
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
368 .loc 1 220 50 view .LVU128
369 005e 2279 ldrb r2, [r4, #4] @ zero_extendqisi2
primo commit
2023-07-02 17:09:41 +02:00
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
370 .loc 1 220 28 view .LVU129
371 0060 1A60 str r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
372 .loc 1 223 3 is_stmt 1 view .LVU130
primo commit
2023-07-02 17:09:41 +02:00
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
373 .loc 1 223 7 is_stmt 0 view .LVU131
374 0062 E36C ldr r3, [r4, #76]
primo commit
2023-07-02 17:09:41 +02:00
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
375 .loc 1 223 40 view .LVU132
376 0064 226D ldr r2, [r4, #80]
primo commit
2023-07-02 17:09:41 +02:00
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
377 .loc 1 223 34 view .LVU133
378 0066 5A60 str r2, [r3, #4]
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
379 .loc 1 225 3 is_stmt 1 view .LVU134
primo commit
2023-07-02 17:09:41 +02:00
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
380 .loc 1 225 19 is_stmt 0 view .LVU135
381 0068 6368 ldr r3, [r4, #4]
primo commit
2023-07-02 17:09:41 +02:00
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
382 .loc 1 225 35 view .LVU136
383 006a 013B subs r3, r3, #1
primo commit
2023-07-02 17:09:41 +02:00
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
384 .loc 1 225 6 view .LVU137
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 28
primo commit
2023-07-02 17:09:41 +02:00
v1.2
2025-01-28 19:01:22 +01:00
385 006c 032B cmp r3, #3
386 006e 19D9 bls .L28
primo commit
2023-07-02 17:09:41 +02:00
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
v1.2
2025-01-28 19:01:22 +01:00
387 .loc 1 240 5 is_stmt 1 view .LVU138
primo commit
2023-07-02 17:09:41 +02:00
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
v1.2
2025-01-28 19:01:22 +01:00
388 .loc 1 240 28 is_stmt 0 view .LVU139
389 0070 0023 movs r3, #0
390 0072 6365 str r3, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
v1.2
2025-01-28 19:01:22 +01:00
391 .loc 1 241 5 is_stmt 1 view .LVU140
primo commit
2023-07-02 17:09:41 +02:00
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
v1.2
2025-01-28 19:01:22 +01:00
392 .loc 1 241 34 is_stmt 0 view .LVU141
393 0074 A365 str r3, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
394 .loc 1 242 5 is_stmt 1 view .LVU142
primo commit
2023-07-02 17:09:41 +02:00
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
395 .loc 1 242 38 is_stmt 0 view .LVU143
396 0076 E365 str r3, [r4, #92]
397 .L21:
primo commit
2023-07-02 17:09:41 +02:00
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
398 .loc 1 246 3 is_stmt 1 view .LVU144
primo commit
2023-07-02 17:09:41 +02:00
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
399 .loc 1 246 19 is_stmt 0 view .LVU145
400 0078 0020 movs r0, #0
401 007a E063 str r0, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
402 .loc 1 249 3 is_stmt 1 view .LVU146
primo commit
2023-07-02 17:09:41 +02:00
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
403 .loc 1 249 16 is_stmt 0 view .LVU147
404 007c 0123 movs r3, #1
405 007e 84F82530 strb r3, [r4, #37]
primo commit
2023-07-02 17:09:41 +02:00
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
406 .loc 1 252 3 is_stmt 1 view .LVU148
primo commit
2023-07-02 17:09:41 +02:00
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
407 .loc 1 252 14 is_stmt 0 view .LVU149
408 0082 84F82400 strb r0, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
409 .loc 1 254 3 is_stmt 1 view .LVU150
primo commit
2023-07-02 17:09:41 +02:00
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
410 .loc 1 255 1 is_stmt 0 view .LVU151
411 0086 10BD pop {r4, pc}
412 .LVL20:
413 .L17:
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
414 .loc 1 184 5 is_stmt 1 view .LVU152
primo commit
2023-07-02 17:09:41 +02:00
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
415 .loc 1 184 53 is_stmt 0 view .LVU153
416 0088 104B ldr r3, .L29+16
417 008a 1344 add r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
418 .loc 1 184 80 view .LVU154
419 008c 0D49 ldr r1, .L29+8
420 008e A1FB0313 umull r1, r3, r1, r3
421 0092 1B09 lsrs r3, r3, #4
primo commit
2023-07-02 17:09:41 +02:00
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
422 .loc 1 184 135 view .LVU155
423 0094 9B00 lsls r3, r3, #2
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 29
primo commit
2023-07-02 17:09:41 +02:00
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
424 .loc 1 184 24 view .LVU156
425 0096 4364 str r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
426 .loc 1 185 5 is_stmt 1 view .LVU157
primo commit
2023-07-02 17:09:41 +02:00
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
427 .loc 1 185 26 is_stmt 0 view .LVU158
428 0098 0D4B ldr r3, .L29+20
429 009a 0364 str r3, [r0, #64]
430 009c C2E7 b .L18
431 .LVL21:
432 .L27:
primo commit
2023-07-02 17:09:41 +02:00
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
433 .loc 1 216 5 is_stmt 1 view .LVU159
primo commit
2023-07-02 17:09:41 +02:00
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
434 .loc 1 216 24 is_stmt 0 view .LVU160
435 009e 0023 movs r3, #0
436 00a0 6360 str r3, [r4, #4]
437 00a2 DBE7 b .L19
438 .L28:
primo commit
2023-07-02 17:09:41 +02:00
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
439 .loc 1 230 5 is_stmt 1 view .LVU161
440 00a4 2046 mov r0, r4
441 00a6 FFF7FEFF bl DMA_CalcDMAMUXRequestGenBaseAndMask
442 .LVL22:
primo commit
2023-07-02 17:09:41 +02:00
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
443 .loc 1 233 5 view .LVU162
primo commit
2023-07-02 17:09:41 +02:00
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
444 .loc 1 233 9 is_stmt 0 view .LVU163
445 00aa 636D ldr r3, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
446 .loc 1 233 34 view .LVU164
447 00ac 0022 movs r2, #0
448 00ae 1A60 str r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
449 .loc 1 236 5 is_stmt 1 view .LVU165
primo commit
2023-07-02 17:09:41 +02:00
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
450 .loc 1 236 9 is_stmt 0 view .LVU166
451 00b0 A36D ldr r3, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
452 .loc 1 236 47 view .LVU167
453 00b2 E26D ldr r2, [r4, #92]
primo commit
2023-07-02 17:09:41 +02:00
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
454 .loc 1 236 41 view .LVU168
455 00b4 5A60 str r2, [r3, #4]
456 00b6 DFE7 b .L21
457 .LVL23:
458 .L22:
459 .LCFI4:
460 .cfi_def_cfa_offset 0
461 .cfi_restore 4
462 .cfi_restore 14
primo commit
2023-07-02 17:09:41 +02:00
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
463 .loc 1 159 12 view .LVU169
464 00b8 0120 movs r0, #1
465 .LVL24:
primo commit
2023-07-02 17:09:41 +02:00
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 30
v1.2
2025-01-28 19:01:22 +01:00
466 .loc 1 255 1 view .LVU170
467 00ba 7047 bx lr
468 .L30:
469 .align 2
470 .L29:
471 00bc 07040240 .word 1073873927
472 00c0 F8FFFDBF .word -1073872904
473 00c4 CDCCCCCC .word -858993459
474 00c8 00000240 .word 1073872896
475 00cc F8FBFDBF .word -1073873928
476 00d0 00040240 .word 1073873920
477 .cfi_endproc
478 .LFE329:
480 .section .text.HAL_DMA_DeInit,"ax",%progbits
481 .align 1
482 .global HAL_DMA_DeInit
483 .syntax unified
484 .thumb
485 .thumb_func
487 HAL_DMA_DeInit:
488 .LVL25:
489 .LFB330:
primo commit
2023-07-02 17:09:41 +02:00
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
490 .loc 1 264 1 is_stmt 1 view -0
491 .cfi_startproc
492 @ args = 0, pretend = 0, frame = 0
493 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
494 .loc 1 267 3 view .LVU172
primo commit
2023-07-02 17:09:41 +02:00
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
495 .loc 1 267 6 is_stmt 0 view .LVU173
496 0000 0028 cmp r0, #0
497 0002 4BD0 beq .L36
primo commit
2023-07-02 17:09:41 +02:00
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
498 .loc 1 264 1 view .LVU174
499 0004 38B5 push {r3, r4, r5, lr}
500 .LCFI5:
501 .cfi_def_cfa_offset 16
502 .cfi_offset 3, -16
503 .cfi_offset 4, -12
504 .cfi_offset 5, -8
505 .cfi_offset 14, -4
506 0006 0446 mov r4, r0
primo commit
2023-07-02 17:09:41 +02:00
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
507 .loc 1 273 3 is_stmt 1 view .LVU175
primo commit
2023-07-02 17:09:41 +02:00
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
508 .loc 1 276 3 view .LVU176
509 0008 0268 ldr r2, [r0]
510 000a 1368 ldr r3, [r2]
511 000c 23F00103 bic r3, r3, #1
512 0010 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
513 .loc 1 279 3 view .LVU177
primo commit
2023-07-02 17:09:41 +02:00
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
514 .loc 1 279 22 is_stmt 0 view .LVU178
515 0012 0268 ldr r2, [r0]
primo commit
2023-07-02 17:09:41 +02:00
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 31
v1.2
2025-01-28 19:01:22 +01:00
516 .loc 1 279 6 view .LVU179
517 0014 224B ldr r3, .L42
518 0016 9A42 cmp r2, r3
519 0018 2CD8 bhi .L33
primo commit
2023-07-02 17:09:41 +02:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
v1.2
2025-01-28 19:01:22 +01:00
520 .loc 1 282 5 is_stmt 1 view .LVU180
primo commit
2023-07-02 17:09:41 +02:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
v1.2
2025-01-28 19:01:22 +01:00
521 .loc 1 282 53 is_stmt 0 view .LVU181
522 001a 224B ldr r3, .L42+4
523 001c 1344 add r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
v1.2
2025-01-28 19:01:22 +01:00
524 .loc 1 282 80 view .LVU182
525 001e 2249 ldr r1, .L42+8
526 0020 A1FB0313 umull r1, r3, r1, r3
527 0024 1B09 lsrs r3, r3, #4
primo commit
2023-07-02 17:09:41 +02:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
v1.2
2025-01-28 19:01:22 +01:00
528 .loc 1 282 135 view .LVU183
529 0026 9B00 lsls r3, r3, #2
primo commit
2023-07-02 17:09:41 +02:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
v1.2
2025-01-28 19:01:22 +01:00
530 .loc 1 282 24 view .LVU184
531 0028 4364 str r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
532 .loc 1 283 5 is_stmt 1 view .LVU185
primo commit
2023-07-02 17:09:41 +02:00
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
533 .loc 1 283 26 is_stmt 0 view .LVU186
534 002a 204B ldr r3, .L42+12
535 002c 0364 str r3, [r0, #64]
536 .L34:
primo commit
2023-07-02 17:09:41 +02:00
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
537 .loc 1 293 3 is_stmt 1 view .LVU187
primo commit
2023-07-02 17:09:41 +02:00
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
538 .loc 1 293 24 is_stmt 0 view .LVU188
539 002e 0025 movs r5, #0
540 0030 1560 str r5, [r2]
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
541 .loc 1 296 3 is_stmt 1 view .LVU189
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
542 .loc 1 296 54 is_stmt 0 view .LVU190
543 0032 636C ldr r3, [r4, #68]
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
544 .loc 1 296 69 view .LVU191
545 0034 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
546 .loc 1 296 7 view .LVU192
547 0038 216C ldr r1, [r4, #64]
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
548 .loc 1 296 46 view .LVU193
549 003a 0123 movs r3, #1
550 003c 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
551 .loc 1 296 30 view .LVU194
552 003e 4B60 str r3, [r1, #4]
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
553 .loc 1 301 3 is_stmt 1 view .LVU195
554 0040 2046 mov r0, r4
555 .LVL26:
primo commit
2023-07-02 17:09:41 +02:00
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 32
primo commit
2023-07-02 17:09:41 +02:00
v1.2
2025-01-28 19:01:22 +01:00
556 .loc 1 301 3 is_stmt 0 view .LVU196
557 0042 FFF7FEFF bl DMA_CalcDMAMUXChannelBaseAndMask
primo commit
2023-07-02 17:09:41 +02:00
558 .LVL27:
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
559 .loc 1 304 3 is_stmt 1 view .LVU197
primo commit
2023-07-02 17:09:41 +02:00
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
560 .loc 1 304 7 is_stmt 0 view .LVU198
561 0046 A36C ldr r3, [r4, #72]
primo commit
2023-07-02 17:09:41 +02:00
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
562 .loc 1 304 28 view .LVU199
563 0048 1D60 str r5, [r3]
primo commit
2023-07-02 17:09:41 +02:00
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
564 .loc 1 307 3 is_stmt 1 view .LVU200
primo commit
2023-07-02 17:09:41 +02:00
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
565 .loc 1 307 7 is_stmt 0 view .LVU201
566 004a E36C ldr r3, [r4, #76]
primo commit
2023-07-02 17:09:41 +02:00
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
567 .loc 1 307 40 view .LVU202
568 004c 226D ldr r2, [r4, #80]
primo commit
2023-07-02 17:09:41 +02:00
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
569 .loc 1 307 34 view .LVU203
570 004e 5A60 str r2, [r3, #4]
primo commit
2023-07-02 17:09:41 +02:00
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
571 .loc 1 310 3 is_stmt 1 view .LVU204
primo commit
2023-07-02 17:09:41 +02:00
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
572 .loc 1 310 19 is_stmt 0 view .LVU205
573 0050 6368 ldr r3, [r4, #4]
primo commit
2023-07-02 17:09:41 +02:00
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
574 .loc 1 310 35 view .LVU206
575 0052 013B subs r3, r3, #1
primo commit
2023-07-02 17:09:41 +02:00
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
576 .loc 1 310 6 view .LVU207
577 0054 032B cmp r3, #3
578 0056 18D9 bls .L41
579 .L35:
primo commit
2023-07-02 17:09:41 +02:00
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
v1.2
2025-01-28 19:01:22 +01:00
580 .loc 1 324 3 is_stmt 1 view .LVU208
primo commit
2023-07-02 17:09:41 +02:00
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
v1.2
2025-01-28 19:01:22 +01:00
581 .loc 1 324 26 is_stmt 0 view .LVU209
582 0058 0020 movs r0, #0
583 005a 6065 str r0, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
v1.2
2025-01-28 19:01:22 +01:00
584 .loc 1 325 3 is_stmt 1 view .LVU210
primo commit
2023-07-02 17:09:41 +02:00
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
v1.2
2025-01-28 19:01:22 +01:00
585 .loc 1 325 32 is_stmt 0 view .LVU211
586 005c A065 str r0, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
587 .loc 1 326 3 is_stmt 1 view .LVU212
primo commit
2023-07-02 17:09:41 +02:00
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
588 .loc 1 326 36 is_stmt 0 view .LVU213
589 005e E065 str r0, [r4, #92]
primo commit
2023-07-02 17:09:41 +02:00
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
v1.2
2025-01-28 19:01:22 +01:00
590 .loc 1 329 3 is_stmt 1 view .LVU214
primo commit
2023-07-02 17:09:41 +02:00
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
v1.2
2025-01-28 19:01:22 +01:00
591 .loc 1 329 26 is_stmt 0 view .LVU215
592 0060 E062 str r0, [r4, #44]
primo commit
2023-07-02 17:09:41 +02:00
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 33
v1.2
2025-01-28 19:01:22 +01:00
593 .loc 1 330 3 is_stmt 1 view .LVU216
primo commit
2023-07-02 17:09:41 +02:00
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
v1.2
2025-01-28 19:01:22 +01:00
594 .loc 1 330 30 is_stmt 0 view .LVU217
595 0062 2063 str r0, [r4, #48]
primo commit
2023-07-02 17:09:41 +02:00
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
v1.2
2025-01-28 19:01:22 +01:00
596 .loc 1 331 3 is_stmt 1 view .LVU218
primo commit
2023-07-02 17:09:41 +02:00
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
v1.2
2025-01-28 19:01:22 +01:00
597 .loc 1 331 27 is_stmt 0 view .LVU219
598 0064 6063 str r0, [r4, #52]
primo commit
2023-07-02 17:09:41 +02:00
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
599 .loc 1 332 3 is_stmt 1 view .LVU220
primo commit
2023-07-02 17:09:41 +02:00
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
600 .loc 1 332 27 is_stmt 0 view .LVU221
601 0066 A063 str r0, [r4, #56]
primo commit
2023-07-02 17:09:41 +02:00
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
602 .loc 1 335 3 is_stmt 1 view .LVU222
primo commit
2023-07-02 17:09:41 +02:00
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
603 .loc 1 335 19 is_stmt 0 view .LVU223
604 0068 E063 str r0, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
605 .loc 1 338 3 is_stmt 1 view .LVU224
primo commit
2023-07-02 17:09:41 +02:00
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
606 .loc 1 338 15 is_stmt 0 view .LVU225
607 006a 84F82500 strb r0, [r4, #37]
primo commit
2023-07-02 17:09:41 +02:00
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
608 .loc 1 341 3 is_stmt 1 view .LVU226
primo commit
2023-07-02 17:09:41 +02:00
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
609 .loc 1 341 3 view .LVU227
610 006e 84F82400 strb r0, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
611 .loc 1 341 3 view .LVU228
primo commit
2023-07-02 17:09:41 +02:00
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
612 .loc 1 343 3 view .LVU229
primo commit
2023-07-02 17:09:41 +02:00
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
613 .loc 1 344 1 is_stmt 0 view .LVU230
614 0072 38BD pop {r3, r4, r5, pc}
615 .LVL28:
616 .L33:
primo commit
2023-07-02 17:09:41 +02:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
617 .loc 1 288 5 is_stmt 1 view .LVU231
primo commit
2023-07-02 17:09:41 +02:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
618 .loc 1 288 53 is_stmt 0 view .LVU232
619 0074 0E4B ldr r3, .L42+16
620 0076 1344 add r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
621 .loc 1 288 80 view .LVU233
622 0078 0B49 ldr r1, .L42+8
623 007a A1FB0313 umull r1, r3, r1, r3
624 007e 1B09 lsrs r3, r3, #4
primo commit
2023-07-02 17:09:41 +02:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
625 .loc 1 288 135 view .LVU234
626 0080 9B00 lsls r3, r3, #2
primo commit
2023-07-02 17:09:41 +02:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
v1.2
2025-01-28 19:01:22 +01:00
627 .loc 1 288 24 view .LVU235
628 0082 4364 str r3, [r0, #68]
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
629 .loc 1 289 5 is_stmt 1 view .LVU236
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 34
primo commit
2023-07-02 17:09:41 +02:00
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
630 .loc 1 289 26 is_stmt 0 view .LVU237
631 0084 0B4B ldr r3, .L42+20
632 0086 0364 str r3, [r0, #64]
633 0088 D1E7 b .L34
634 .LVL29:
635 .L41:
primo commit
2023-07-02 17:09:41 +02:00
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
636 .loc 1 315 5 is_stmt 1 view .LVU238
637 008a 2046 mov r0, r4
638 008c FFF7FEFF bl DMA_CalcDMAMUXRequestGenBaseAndMask
639 .LVL30:
primo commit
2023-07-02 17:09:41 +02:00
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
640 .loc 1 318 5 view .LVU239
primo commit
2023-07-02 17:09:41 +02:00
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
641 .loc 1 318 9 is_stmt 0 view .LVU240
642 0090 636D ldr r3, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
643 .loc 1 318 34 view .LVU241
644 0092 1D60 str r5, [r3]
primo commit
2023-07-02 17:09:41 +02:00
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
645 .loc 1 321 5 is_stmt 1 view .LVU242
primo commit
2023-07-02 17:09:41 +02:00
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
646 .loc 1 321 9 is_stmt 0 view .LVU243
647 0094 A36D ldr r3, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
648 .loc 1 321 47 view .LVU244
649 0096 E26D ldr r2, [r4, #92]
primo commit
2023-07-02 17:09:41 +02:00
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
650 .loc 1 321 41 view .LVU245
651 0098 5A60 str r2, [r3, #4]
652 009a DDE7 b .L35
653 .LVL31:
654 .L36:
655 .LCFI6:
656 .cfi_def_cfa_offset 0
657 .cfi_restore 3
658 .cfi_restore 4
659 .cfi_restore 5
660 .cfi_restore 14
primo commit
2023-07-02 17:09:41 +02:00
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
v1.2
2025-01-28 19:01:22 +01:00
661 .loc 1 269 12 view .LVU246
662 009c 0120 movs r0, #1
663 .LVL32:
primo commit
2023-07-02 17:09:41 +02:00
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
664 .loc 1 344 1 view .LVU247
665 009e 7047 bx lr
666 .L43:
667 .align 2
668 .L42:
669 00a0 07040240 .word 1073873927
670 00a4 F8FFFDBF .word -1073872904
671 00a8 CDCCCCCC .word -858993459
672 00ac 00000240 .word 1073872896
673 00b0 F8FBFDBF .word -1073873928
674 00b4 00040240 .word 1073873920
675 .cfi_endproc
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 35
v1.2
2025-01-28 19:01:22 +01:00
676 .LFE330:
678 .section .text.HAL_DMA_Start,"ax",%progbits
679 .align 1
680 .global HAL_DMA_Start
681 .syntax unified
682 .thumb
683 .thumb_func
685 HAL_DMA_Start:
686 .LVL33:
687 .LFB331:
primo commit
2023-07-02 17:09:41 +02:00
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
v1.2
2025-01-28 19:01:22 +01:00
688 .loc 1 379 1 is_stmt 1 view -0
689 .cfi_startproc
690 @ args = 0, pretend = 0, frame = 0
691 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
v1.2
2025-01-28 19:01:22 +01:00
692 .loc 1 379 1 is_stmt 0 view .LVU249
693 0000 70B5 push {r4, r5, r6, lr}
694 .LCFI7:
695 .cfi_def_cfa_offset 16
696 .cfi_offset 4, -16
697 .cfi_offset 5, -12
698 .cfi_offset 6, -8
699 .cfi_offset 14, -4
700 0002 0446 mov r4, r0
primo commit
2023-07-02 17:09:41 +02:00
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
701 .loc 1 380 3 is_stmt 1 view .LVU250
702 .LVL34:
primo commit
2023-07-02 17:09:41 +02:00
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
703 .loc 1 383 3 view .LVU251
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
704 .loc 1 386 3 view .LVU252
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
705 .loc 1 386 3 view .LVU253
706 0004 90F82400 ldrb r0, [r0, #36] @ zero_extendqisi2
707 .LVL35:
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
708 .loc 1 386 3 is_stmt 0 view .LVU254
709 0008 0128 cmp r0, #1
UI led
2025-06-28 00:58:29 +02:00
710 000a 1FD0 beq .L47
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
v1.2
2025-01-28 19:01:22 +01:00
711 .loc 1 386 3 is_stmt 1 discriminator 2 view .LVU255
712 000c 0120 movs r0, #1
713 000e 84F82400 strb r0, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
714 .loc 1 386 3 view .LVU256
primo commit
2023-07-02 17:09:41 +02:00
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
715 .loc 1 388 3 view .LVU257
primo commit
2023-07-02 17:09:41 +02:00
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
v1.2
2025-01-28 19:01:22 +01:00
716 .loc 1 388 34 is_stmt 0 view .LVU258
717 0012 94F82500 ldrb r0, [r4, #37] @ zero_extendqisi2
primo commit
2023-07-02 17:09:41 +02:00
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
718 .loc 1 388 6 view .LVU259
719 0016 0128 cmp r0, #1
720 0018 04D0 beq .L49
v1.2
2025-01-28 19:01:22 +01:00
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
UI led
2025-06-28 00:58:29 +02:00
721 .loc 1 406 5 is_stmt 1 view .LVU260
ARM GAS /tmp/ccSt8eya.s page 36
primo commit
2023-07-02 17:09:41 +02:00
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
UI led
2025-06-28 00:58:29 +02:00
722 .loc 1 406 5 view .LVU261
723 001a 0023 movs r3, #0
724 .LVL36:
primo commit
2023-07-02 17:09:41 +02:00
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
UI led
2025-06-28 00:58:29 +02:00
725 .loc 1 406 5 is_stmt 0 view .LVU262
726 001c 84F82430 strb r3, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
UI led
2025-06-28 00:58:29 +02:00
727 .loc 1 406 5 is_stmt 1 view .LVU263
primo commit
2023-07-02 17:09:41 +02:00
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
728 .loc 1 407 5 view .LVU264
729 .LVL37:
primo commit
2023-07-02 17:09:41 +02:00
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
730 .loc 1 407 12 is_stmt 0 view .LVU265
731 0020 0220 movs r0, #2
732 .LVL38:
733 .L45:
primo commit
2023-07-02 17:09:41 +02:00
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
734 .loc 1 410 1 view .LVU266
735 0022 70BD pop {r4, r5, r6, pc}
736 .LVL39:
737 .L49:
primo commit
2023-07-02 17:09:41 +02:00
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
UI led
2025-06-28 00:58:29 +02:00
738 .loc 1 391 5 is_stmt 1 view .LVU267
primo commit
2023-07-02 17:09:41 +02:00
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
UI led
2025-06-28 00:58:29 +02:00
739 .loc 1 391 17 is_stmt 0 view .LVU268
740 0024 0220 movs r0, #2
741 0026 84F82500 strb r0, [r4, #37]
primo commit
2023-07-02 17:09:41 +02:00
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
742 .loc 1 392 5 is_stmt 1 view .LVU269
primo commit
2023-07-02 17:09:41 +02:00
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
743 .loc 1 392 21 is_stmt 0 view .LVU270
744 002a 0025 movs r5, #0
745 002c E563 str r5, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
746 .loc 1 395 5 is_stmt 1 view .LVU271
747 002e 2668 ldr r6, [r4]
748 0030 3068 ldr r0, [r6]
749 0032 20F00100 bic r0, r0, #1
750 0036 3060 str r0, [r6]
primo commit
2023-07-02 17:09:41 +02:00
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
751 .loc 1 398 5 view .LVU272
752 0038 2046 mov r0, r4
753 003a FFF7FEFF bl DMA_SetConfig
754 .LVL40:
primo commit
2023-07-02 17:09:41 +02:00
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
755 .loc 1 401 5 view .LVU273
756 003e 2268 ldr r2, [r4]
757 0040 1368 ldr r3, [r2]
758 0042 43F00103 orr r3, r3, #1
759 0046 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
760 .loc 1 380 21 is_stmt 0 view .LVU274
761 0048 2846 mov r0, r5
762 004a EAE7 b .L45
763 .LVL41:
764 .L47:
ARM GAS /tmp/ccSt8eya.s page 37
primo commit
2023-07-02 17:09:41 +02:00
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
765 .loc 1 386 3 discriminator 1 view .LVU275
766 004c 0220 movs r0, #2
767 004e E8E7 b .L45
768 .cfi_endproc
769 .LFE331:
771 .section .text.HAL_DMA_Start_IT,"ax",%progbits
772 .align 1
773 .global HAL_DMA_Start_IT
774 .syntax unified
775 .thumb
776 .thumb_func
778 HAL_DMA_Start_IT:
779 .LVL42:
780 .LFB332:
primo commit
2023-07-02 17:09:41 +02:00
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
781 .loc 1 423 1 is_stmt 1 view -0
782 .cfi_startproc
783 @ args = 0, pretend = 0, frame = 0
784 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
785 .loc 1 423 1 is_stmt 0 view .LVU277
786 0000 38B5 push {r3, r4, r5, lr}
787 .LCFI8:
788 .cfi_def_cfa_offset 16
789 .cfi_offset 3, -16
790 .cfi_offset 4, -12
791 .cfi_offset 5, -8
792 .cfi_offset 14, -4
793 0002 0446 mov r4, r0
primo commit
2023-07-02 17:09:41 +02:00
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
794 .loc 1 424 3 is_stmt 1 view .LVU278
795 .LVL43:
primo commit
2023-07-02 17:09:41 +02:00
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
796 .loc 1 427 3 view .LVU279
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
797 .loc 1 430 3 view .LVU280
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
798 .loc 1 430 3 view .LVU281
799 0004 90F82400 ldrb r0, [r0, #36] @ zero_extendqisi2
800 .LVL44:
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
801 .loc 1 430 3 is_stmt 0 view .LVU282
802 0008 0128 cmp r0, #1
803 000a 40D0 beq .L57
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
804 .loc 1 430 3 is_stmt 1 discriminator 2 view .LVU283
805 000c 0120 movs r0, #1
806 000e 84F82400 strb r0, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
807 .loc 1 430 3 view .LVU284
v1.2
2025-01-28 19:01:22 +01:00
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
808 .loc 1 432 3 view .LVU285
primo commit
2023-07-02 17:09:41 +02:00
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
809 .loc 1 432 34 is_stmt 0 view .LVU286
810 0012 94F82500 ldrb r0, [r4, #37] @ zero_extendqisi2
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
ARM GAS /tmp/ccSt8eya.s page 38
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
811 .loc 1 432 6 view .LVU287
812 0016 0128 cmp r0, #1
813 0018 04D0 beq .L59
primo commit
2023-07-02 17:09:41 +02:00
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
814 .loc 1 477 5 is_stmt 1 view .LVU288
primo commit
2023-07-02 17:09:41 +02:00
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
815 .loc 1 477 5 view .LVU289
816 001a 0023 movs r3, #0
817 .LVL45:
primo commit
2023-07-02 17:09:41 +02:00
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
818 .loc 1 477 5 is_stmt 0 view .LVU290
819 001c 84F82430 strb r3, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
820 .loc 1 477 5 is_stmt 1 view .LVU291
primo commit
2023-07-02 17:09:41 +02:00
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
821 .loc 1 480 5 view .LVU292
822 .LVL46:
primo commit
2023-07-02 17:09:41 +02:00
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
823 .loc 1 480 12 is_stmt 0 view .LVU293
824 0020 0220 movs r0, #2
825 .LVL47:
826 .L51:
primo commit
2023-07-02 17:09:41 +02:00
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
827 .loc 1 483 1 view .LVU294
828 0022 38BD pop {r3, r4, r5, pc}
829 .LVL48:
830 .L59:
primo commit
2023-07-02 17:09:41 +02:00
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
UI led
2025-06-28 00:58:29 +02:00
831 .loc 1 435 5 is_stmt 1 view .LVU295
primo commit
2023-07-02 17:09:41 +02:00
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
UI led
2025-06-28 00:58:29 +02:00
832 .loc 1 435 17 is_stmt 0 view .LVU296
833 0024 0220 movs r0, #2
834 0026 84F82500 strb r0, [r4, #37]
primo commit
2023-07-02 17:09:41 +02:00
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
835 .loc 1 436 5 is_stmt 1 view .LVU297
primo commit
2023-07-02 17:09:41 +02:00
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
836 .loc 1 436 21 is_stmt 0 view .LVU298
837 002a 0020 movs r0, #0
838 002c E063 str r0, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
839 .loc 1 439 5 is_stmt 1 view .LVU299
840 002e 2568 ldr r5, [r4]
841 0030 2868 ldr r0, [r5]
842 0032 20F00100 bic r0, r0, #1
843 0036 2860 str r0, [r5]
primo commit
2023-07-02 17:09:41 +02:00
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
844 .loc 1 442 5 view .LVU300
845 0038 2046 mov r0, r4
846 003a FFF7FEFF bl DMA_SetConfig
847 .LVL49:
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
848 .loc 1 446 5 view .LVU301
primo commit
2023-07-02 17:09:41 +02:00
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
849 .loc 1 446 21 is_stmt 0 view .LVU302
850 003e 236B ldr r3, [r4, #48]
v1.2
2025-01-28 19:01:22 +01:00
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
851 .loc 1 446 8 view .LVU303
ARM GAS /tmp/ccSt8eya.s page 39
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
852 0040 D3B1 cbz r3, .L53
primo commit
2023-07-02 17:09:41 +02:00
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
853 .loc 1 449 7 is_stmt 1 view .LVU304
854 0042 2268 ldr r2, [r4]
855 0044 1368 ldr r3, [r2]
856 0046 43F00E03 orr r3, r3, #14
857 004a 1360 str r3, [r2]
858 .L54:
primo commit
2023-07-02 17:09:41 +02:00
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
859 .loc 1 458 5 view .LVU305
primo commit
2023-07-02 17:09:41 +02:00
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
860 .loc 1 458 14 is_stmt 0 view .LVU306
861 004c A36C ldr r3, [r4, #72]
primo commit
2023-07-02 17:09:41 +02:00
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
862 .loc 1 458 29 view .LVU307
863 004e 1A68 ldr r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
864 .loc 1 458 8 view .LVU308
865 0050 12F4803F tst r2, #65536
866 0054 03D0 beq .L55
primo commit
2023-07-02 17:09:41 +02:00
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
867 .loc 1 461 7 is_stmt 1 view .LVU309
primo commit
2023-07-02 17:09:41 +02:00
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
868 .loc 1 461 26 is_stmt 0 view .LVU310
869 0056 1A68 ldr r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
870 .loc 1 461 32 view .LVU311
871 0058 42F48072 orr r2, r2, #256
872 005c 1A60 str r2, [r3]
873 .L55:
primo commit
2023-07-02 17:09:41 +02:00
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
874 .loc 1 464 5 is_stmt 1 view .LVU312
primo commit
2023-07-02 17:09:41 +02:00
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
875 .loc 1 464 13 is_stmt 0 view .LVU313
876 005e 636D ldr r3, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
877 .loc 1 464 8 view .LVU314
878 0060 1BB1 cbz r3, .L56
primo commit
2023-07-02 17:09:41 +02:00
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
879 .loc 1 468 7 is_stmt 1 view .LVU315
primo commit
2023-07-02 17:09:41 +02:00
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
880 .loc 1 468 29 is_stmt 0 view .LVU316
881 0062 1A68 ldr r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
882 .loc 1 468 36 view .LVU317
883 0064 42F48072 orr r2, r2, #256
884 0068 1A60 str r2, [r3]
885 .L56:
primo commit
2023-07-02 17:09:41 +02:00
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
886 .loc 1 472 5 is_stmt 1 view .LVU318
887 006a 2268 ldr r2, [r4]
888 006c 1368 ldr r3, [r2]
889 006e 43F00103 orr r3, r3, #1
890 0072 1360 str r3, [r2]
v1.2
2025-01-28 19:01:22 +01:00
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
891 .loc 1 424 21 is_stmt 0 view .LVU319
892 0074 0020 movs r0, #0
ARM GAS /tmp/ccSt8eya.s page 40
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
893 0076 D4E7 b .L51
894 .L53:
primo commit
2023-07-02 17:09:41 +02:00
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
UI led
2025-06-28 00:58:29 +02:00
895 .loc 1 453 7 is_stmt 1 view .LVU320
896 0078 2268 ldr r2, [r4]
897 007a 1368 ldr r3, [r2]
898 007c 23F00403 bic r3, r3, #4
899 0080 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
900 .loc 1 454 7 view .LVU321
901 0082 2268 ldr r2, [r4]
902 0084 1368 ldr r3, [r2]
903 0086 43F00A03 orr r3, r3, #10
904 008a 1360 str r3, [r2]
905 008c DEE7 b .L54
906 .LVL50:
907 .L57:
primo commit
2023-07-02 17:09:41 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
908 .loc 1 430 3 is_stmt 0 discriminator 1 view .LVU322
909 008e 0220 movs r0, #2
910 0090 C7E7 b .L51
911 .cfi_endproc
912 .LFE332:
914 .section .text.HAL_DMA_Abort,"ax",%progbits
915 .align 1
916 .global HAL_DMA_Abort
917 .syntax unified
918 .thumb
919 .thumb_func
921 HAL_DMA_Abort:
922 .LVL51:
923 .LFB333:
primo commit
2023-07-02 17:09:41 +02:00
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
924 .loc 1 492 1 is_stmt 1 view -0
925 .cfi_startproc
926 @ args = 0, pretend = 0, frame = 0
927 @ frame_needed = 0, uses_anonymous_args = 0
928 @ link register save eliminated.
primo commit
2023-07-02 17:09:41 +02:00
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
929 .loc 1 492 1 is_stmt 0 view .LVU324
930 0000 0346 mov r3, r0
primo commit
2023-07-02 17:09:41 +02:00
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
931 .loc 1 493 3 is_stmt 1 view .LVU325
932 .LVL52:
primo commit
2023-07-02 17:09:41 +02:00
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
933 .loc 1 495 3 view .LVU326
primo commit
2023-07-02 17:09:41 +02:00
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
934 .loc 1 495 10 is_stmt 0 view .LVU327
935 0002 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2
primo commit
2023-07-02 17:09:41 +02:00
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
936 .loc 1 495 5 view .LVU328
937 0006 022A cmp r2, #2
938 0008 09D0 beq .L61
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
939 .loc 1 498 5 is_stmt 1 view .LVU329
v1.2
2025-01-28 19:01:22 +01:00
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
940 .loc 1 498 21 is_stmt 0 view .LVU330
ARM GAS /tmp/ccSt8eya.s page 41
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
941 000a 0422 movs r2, #4
942 000c C263 str r2, [r0, #60]
primo commit
2023-07-02 17:09:41 +02:00
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
943 .loc 1 500 5 is_stmt 1 view .LVU331
944 .LVL53:
primo commit
2023-07-02 17:09:41 +02:00
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
945 .loc 1 500 12 is_stmt 0 view .LVU332
946 000e 0120 movs r0, #1
947 .LVL54:
948 .L62:
primo commit
2023-07-02 17:09:41 +02:00
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
949 .loc 1 530 3 is_stmt 1 view .LVU333
primo commit
2023-07-02 17:09:41 +02:00
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
950 .loc 1 530 15 is_stmt 0 view .LVU334
951 0010 0122 movs r2, #1
952 0012 83F82520 strb r2, [r3, #37]
primo commit
2023-07-02 17:09:41 +02:00
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
953 .loc 1 533 3 is_stmt 1 view .LVU335
primo commit
2023-07-02 17:09:41 +02:00
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
954 .loc 1 533 3 view .LVU336
955 0016 0022 movs r2, #0
956 0018 83F82420 strb r2, [r3, #36]
primo commit
2023-07-02 17:09:41 +02:00
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
957 .loc 1 533 3 view .LVU337
primo commit
2023-07-02 17:09:41 +02:00
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
958 .loc 1 535 3 view .LVU338
primo commit
2023-07-02 17:09:41 +02:00
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
959 .loc 1 536 1 is_stmt 0 view .LVU339
960 001c 7047 bx lr
961 .LVL55:
962 .L61:
primo commit
2023-07-02 17:09:41 +02:00
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
963 .loc 1 505 6 is_stmt 1 view .LVU340
964 001e 0168 ldr r1, [r0]
965 0020 0A68 ldr r2, [r1]
966 0022 22F00E02 bic r2, r2, #14
967 0026 0A60 str r2, [r1]
primo commit
2023-07-02 17:09:41 +02:00
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
968 .loc 1 508 6 view .LVU341
primo commit
2023-07-02 17:09:41 +02:00
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
969 .loc 1 508 10 is_stmt 0 view .LVU342
970 0028 816C ldr r1, [r0, #72]
primo commit
2023-07-02 17:09:41 +02:00
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
971 .loc 1 508 25 view .LVU343
972 002a 0A68 ldr r2, [r1]
primo commit
2023-07-02 17:09:41 +02:00
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
973 .loc 1 508 31 view .LVU344
974 002c 22F48072 bic r2, r2, #256
975 0030 0A60 str r2, [r1]
primo commit
2023-07-02 17:09:41 +02:00
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
976 .loc 1 511 6 is_stmt 1 view .LVU345
977 0032 0168 ldr r1, [r0]
978 0034 0A68 ldr r2, [r1]
979 0036 22F00102 bic r2, r2, #1
980 003a 0A60 str r2, [r1]
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
981 .loc 1 514 6 view .LVU346
ARM GAS /tmp/ccSt8eya.s page 42
primo commit
2023-07-02 17:09:41 +02:00
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
982 .loc 1 514 57 is_stmt 0 view .LVU347
983 003c 426C ldr r2, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
984 .loc 1 514 72 view .LVU348
985 003e 02F01F01 and r1, r2, #31
primo commit
2023-07-02 17:09:41 +02:00
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
986 .loc 1 514 10 view .LVU349
987 0042 006C ldr r0, [r0, #64]
988 .LVL56:
primo commit
2023-07-02 17:09:41 +02:00
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
989 .loc 1 514 49 view .LVU350
990 0044 0122 movs r2, #1
991 0046 8A40 lsls r2, r2, r1
primo commit
2023-07-02 17:09:41 +02:00
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
992 .loc 1 514 33 view .LVU351
993 0048 4260 str r2, [r0, #4]
primo commit
2023-07-02 17:09:41 +02:00
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
994 .loc 1 517 6 is_stmt 1 view .LVU352
primo commit
2023-07-02 17:09:41 +02:00
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
995 .loc 1 517 10 is_stmt 0 view .LVU353
996 004a DA6C ldr r2, [r3, #76]
primo commit
2023-07-02 17:09:41 +02:00
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
997 .loc 1 517 43 view .LVU354
998 004c 196D ldr r1, [r3, #80]
primo commit
2023-07-02 17:09:41 +02:00
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
999 .loc 1 517 37 view .LVU355
1000 004e 5160 str r1, [r2, #4]
primo commit
2023-07-02 17:09:41 +02:00
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1001 .loc 1 519 6 is_stmt 1 view .LVU356
primo commit
2023-07-02 17:09:41 +02:00
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1002 .loc 1 519 14 is_stmt 0 view .LVU357
1003 0050 5A6D ldr r2, [r3, #84]
primo commit
2023-07-02 17:09:41 +02:00
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1004 .loc 1 519 9 view .LVU358
1005 0052 42B1 cbz r2, .L63
primo commit
2023-07-02 17:09:41 +02:00
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1006 .loc 1 523 8 is_stmt 1 view .LVU359
primo commit
2023-07-02 17:09:41 +02:00
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1007 .loc 1 523 30 is_stmt 0 view .LVU360
1008 0054 1168 ldr r1, [r2]
primo commit
2023-07-02 17:09:41 +02:00
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1009 .loc 1 523 37 view .LVU361
1010 0056 21F48071 bic r1, r1, #256
1011 005a 1160 str r1, [r2]
primo commit
2023-07-02 17:09:41 +02:00
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1012 .loc 1 526 8 is_stmt 1 view .LVU362
primo commit
2023-07-02 17:09:41 +02:00
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1013 .loc 1 526 12 is_stmt 0 view .LVU363
1014 005c 9A6D ldr r2, [r3, #88]
primo commit
2023-07-02 17:09:41 +02:00
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1015 .loc 1 526 50 view .LVU364
1016 005e D96D ldr r1, [r3, #92]
primo commit
2023-07-02 17:09:41 +02:00
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1017 .loc 1 526 44 view .LVU365
1018 0060 5160 str r1, [r2, #4]
primo commit
2023-07-02 17:09:41 +02:00
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 43
1019 .loc 1 493 21 view .LVU366
1020 0062 0020 movs r0, #0
1021 0064 D4E7 b .L62
1022 .L63:
1023 0066 0020 movs r0, #0
1024 0068 D2E7 b .L62
1025 .cfi_endproc
1026 .LFE333:
1028 .section .text.HAL_DMA_Abort_IT,"ax",%progbits
1029 .align 1
1030 .global HAL_DMA_Abort_IT
1031 .syntax unified
1032 .thumb
1033 .thumb_func
1035 HAL_DMA_Abort_IT:
1036 .LVL57:
1037 .LFB334:
primo commit
2023-07-02 17:09:41 +02:00
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1038 .loc 1 545 1 is_stmt 1 view -0
1039 .cfi_startproc
1040 @ args = 0, pretend = 0, frame = 0
1041 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1042 .loc 1 545 1 is_stmt 0 view .LVU368
1043 0000 08B5 push {r3, lr}
1044 .LCFI9:
1045 .cfi_def_cfa_offset 8
1046 .cfi_offset 3, -8
1047 .cfi_offset 14, -4
primo commit
2023-07-02 17:09:41 +02:00
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1048 .loc 1 546 3 is_stmt 1 view .LVU369
1049 .LVL58:
primo commit
2023-07-02 17:09:41 +02:00
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1050 .loc 1 548 3 view .LVU370
primo commit
2023-07-02 17:09:41 +02:00
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1051 .loc 1 548 33 is_stmt 0 view .LVU371
1052 0002 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
primo commit
2023-07-02 17:09:41 +02:00
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1053 .loc 1 548 6 view .LVU372
1054 0006 022B cmp r3, #2
1055 0008 09D0 beq .L65
primo commit
2023-07-02 17:09:41 +02:00
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1056 .loc 1 551 5 is_stmt 1 view .LVU373
primo commit
2023-07-02 17:09:41 +02:00
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1057 .loc 1 551 21 is_stmt 0 view .LVU374
1058 000a 0423 movs r3, #4
1059 000c C363 str r3, [r0, #60]
primo commit
2023-07-02 17:09:41 +02:00
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1060 .loc 1 554 5 is_stmt 1 view .LVU375
v1.2
2025-01-28 19:01:22 +01:00
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1061 .loc 1 554 17 is_stmt 0 view .LVU376
1062 000e 0123 movs r3, #1
1063 0010 80F82530 strb r3, [r0, #37]
primo commit
2023-07-02 17:09:41 +02:00
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1064 .loc 1 557 5 is_stmt 1 view .LVU377
primo commit
2023-07-02 17:09:41 +02:00
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1065 .loc 1 557 5 view .LVU378
ARM GAS /tmp/ccSt8eya.s page 44
1066 0014 0022 movs r2, #0
1067 0016 80F82420 strb r2, [r0, #36]
primo commit
2023-07-02 17:09:41 +02:00
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1068 .loc 1 557 5 view .LVU379
primo commit
2023-07-02 17:09:41 +02:00
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1069 .loc 1 559 5 view .LVU380
1070 .LVL59:
primo commit
2023-07-02 17:09:41 +02:00
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1071 .loc 1 559 12 is_stmt 0 view .LVU381
1072 001a 1846 mov r0, r3
1073 .LVL60:
1074 .L66:
primo commit
2023-07-02 17:09:41 +02:00
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1075 .loc 1 600 3 is_stmt 1 view .LVU382
primo commit
2023-07-02 17:09:41 +02:00
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1076 .loc 1 601 1 is_stmt 0 view .LVU383
1077 001c 08BD pop {r3, pc}
1078 .LVL61:
1079 .L65:
primo commit
2023-07-02 17:09:41 +02:00
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1080 .loc 1 564 5 is_stmt 1 view .LVU384
1081 001e 0268 ldr r2, [r0]
1082 0020 1368 ldr r3, [r2]
1083 0022 23F00E03 bic r3, r3, #14
1084 0026 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1085 .loc 1 567 5 view .LVU385
1086 0028 0268 ldr r2, [r0]
1087 002a 1368 ldr r3, [r2]
1088 002c 23F00103 bic r3, r3, #1
1089 0030 1360 str r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1090 .loc 1 570 5 view .LVU386
primo commit
2023-07-02 17:09:41 +02:00
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1091 .loc 1 570 9 is_stmt 0 view .LVU387
1092 0032 826C ldr r2, [r0, #72]
primo commit
2023-07-02 17:09:41 +02:00
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1093 .loc 1 570 24 view .LVU388
1094 0034 1368 ldr r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1095 .loc 1 570 30 view .LVU389
1096 0036 23F48073 bic r3, r3, #256
1097 003a 1360 str r3, [r2]
v1.2
2025-01-28 19:01:22 +01:00
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1098 .loc 1 573 5 is_stmt 1 view .LVU390
primo commit
2023-07-02 17:09:41 +02:00
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1099 .loc 1 573 56 is_stmt 0 view .LVU391
1100 003c 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1101 .loc 1 573 71 view .LVU392
1102 003e 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1103 .loc 1 573 9 view .LVU393
1104 0042 016C ldr r1, [r0, #64]
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1105 .loc 1 573 48 view .LVU394
1106 0044 0123 movs r3, #1
ARM GAS /tmp/ccSt8eya.s page 45
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
1107 0046 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1108 .loc 1 573 32 view .LVU395
1109 0048 4B60 str r3, [r1, #4]
primo commit
2023-07-02 17:09:41 +02:00
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1110 .loc 1 576 5 is_stmt 1 view .LVU396
primo commit
2023-07-02 17:09:41 +02:00
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1111 .loc 1 576 9 is_stmt 0 view .LVU397
1112 004a C36C ldr r3, [r0, #76]
primo commit
2023-07-02 17:09:41 +02:00
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1113 .loc 1 576 42 view .LVU398
1114 004c 026D ldr r2, [r0, #80]
primo commit
2023-07-02 17:09:41 +02:00
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1115 .loc 1 576 36 view .LVU399
1116 004e 5A60 str r2, [r3, #4]
primo commit
2023-07-02 17:09:41 +02:00
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1117 .loc 1 578 5 is_stmt 1 view .LVU400
primo commit
2023-07-02 17:09:41 +02:00
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1118 .loc 1 578 13 is_stmt 0 view .LVU401
1119 0050 436D ldr r3, [r0, #84]
primo commit
2023-07-02 17:09:41 +02:00
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1120 .loc 1 578 8 view .LVU402
1121 0052 33B1 cbz r3, .L67
primo commit
2023-07-02 17:09:41 +02:00
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1122 .loc 1 582 7 is_stmt 1 view .LVU403
primo commit
2023-07-02 17:09:41 +02:00
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1123 .loc 1 582 29 is_stmt 0 view .LVU404
1124 0054 1A68 ldr r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1125 .loc 1 582 36 view .LVU405
1126 0056 22F48072 bic r2, r2, #256
1127 005a 1A60 str r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1128 .loc 1 585 7 is_stmt 1 view .LVU406
primo commit
2023-07-02 17:09:41 +02:00
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1129 .loc 1 585 11 is_stmt 0 view .LVU407
1130 005c 836D ldr r3, [r0, #88]
primo commit
2023-07-02 17:09:41 +02:00
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1131 .loc 1 585 49 view .LVU408
1132 005e C26D ldr r2, [r0, #92]
primo commit
2023-07-02 17:09:41 +02:00
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1133 .loc 1 585 43 view .LVU409
1134 0060 5A60 str r2, [r3, #4]
1135 .L67:
primo commit
2023-07-02 17:09:41 +02:00
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1136 .loc 1 589 5 is_stmt 1 view .LVU410
primo commit
2023-07-02 17:09:41 +02:00
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1137 .loc 1 589 17 is_stmt 0 view .LVU411
1138 0062 0123 movs r3, #1
1139 0064 80F82530 strb r3, [r0, #37]
v1.2
2025-01-28 19:01:22 +01:00
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1140 .loc 1 592 5 is_stmt 1 view .LVU412
v1.2
2025-01-28 19:01:22 +01:00
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1141 .loc 1 592 5 view .LVU413
1142 0068 0023 movs r3, #0
1143 006a 80F82430 strb r3, [r0, #36]
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
ARM GAS /tmp/ccSt8eya.s page 46
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
1144 .loc 1 592 5 view .LVU414
primo commit
2023-07-02 17:09:41 +02:00
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1145 .loc 1 595 5 view .LVU415
primo commit
2023-07-02 17:09:41 +02:00
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1146 .loc 1 595 13 is_stmt 0 view .LVU416
1147 006e 836B ldr r3, [r0, #56]
primo commit
2023-07-02 17:09:41 +02:00
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1148 .loc 1 595 8 view .LVU417
1149 0070 13B1 cbz r3, .L68
primo commit
2023-07-02 17:09:41 +02:00
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1150 .loc 1 597 7 is_stmt 1 view .LVU418
1151 0072 9847 blx r3
1152 .LVL62:
primo commit
2023-07-02 17:09:41 +02:00
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1153 .loc 1 546 21 is_stmt 0 view .LVU419
1154 0074 0020 movs r0, #0
1155 0076 D1E7 b .L66
1156 .LVL63:
1157 .L68:
primo commit
2023-07-02 17:09:41 +02:00
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1158 .loc 1 546 21 view .LVU420
1159 0078 0020 movs r0, #0
1160 .LVL64:
primo commit
2023-07-02 17:09:41 +02:00
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1161 .loc 1 546 21 view .LVU421
1162 007a CFE7 b .L66
1163 .cfi_endproc
1164 .LFE334:
1166 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits
1167 .align 1
1168 .global HAL_DMA_PollForTransfer
1169 .syntax unified
1170 .thumb
1171 .thumb_func
1173 HAL_DMA_PollForTransfer:
1174 .LVL65:
1175 .LFB335:
primo commit
2023-07-02 17:09:41 +02:00
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t temp;
UI led
2025-06-28 00:58:29 +02:00
1176 .loc 1 613 1 is_stmt 1 view -0
1177 .cfi_startproc
1178 @ args = 0, pretend = 0, frame = 0
1179 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t temp;
UI led
2025-06-28 00:58:29 +02:00
1180 .loc 1 613 1 is_stmt 0 view .LVU423
1181 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
1182 .LCFI10:
1183 .cfi_def_cfa_offset 24
1184 .cfi_offset 4, -24
1185 .cfi_offset 5, -20
1186 .cfi_offset 6, -16
1187 .cfi_offset 7, -12
1188 .cfi_offset 8, -8
1189 .cfi_offset 14, -4
1190 0004 0446 mov r4, r0
primo commit
2023-07-02 17:09:41 +02:00
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tickstart;
UI led
2025-06-28 00:58:29 +02:00
1191 .loc 1 614 3 is_stmt 1 view .LVU424
primo commit
2023-07-02 17:09:41 +02:00
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 47
1192 .loc 1 615 3 view .LVU425
primo commit
2023-07-02 17:09:41 +02:00
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1193 .loc 1 617 3 view .LVU426
primo commit
2023-07-02 17:09:41 +02:00
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1194 .loc 1 617 33 is_stmt 0 view .LVU427
1195 0006 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
primo commit
2023-07-02 17:09:41 +02:00
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1196 .loc 1 617 6 view .LVU428
1197 000a 022B cmp r3, #2
1198 000c 07D0 beq .L71
primo commit
2023-07-02 17:09:41 +02:00
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
UI led
2025-06-28 00:58:29 +02:00
1199 .loc 1 620 5 is_stmt 1 view .LVU429
primo commit
2023-07-02 17:09:41 +02:00
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
UI led
2025-06-28 00:58:29 +02:00
1200 .loc 1 620 21 is_stmt 0 view .LVU430
1201 000e 0423 movs r3, #4
1202 0010 C363 str r3, [r0, #60]
primo commit
2023-07-02 17:09:41 +02:00
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
UI led
2025-06-28 00:58:29 +02:00
1203 .loc 1 621 5 is_stmt 1 view .LVU431
primo commit
2023-07-02 17:09:41 +02:00
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
UI led
2025-06-28 00:58:29 +02:00
1204 .loc 1 621 5 view .LVU432
1205 0012 0023 movs r3, #0
1206 0014 80F82430 strb r3, [r0, #36]
primo commit
2023-07-02 17:09:41 +02:00
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
UI led
2025-06-28 00:58:29 +02:00
1207 .loc 1 621 5 view .LVU433
primo commit
2023-07-02 17:09:41 +02:00
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1208 .loc 1 622 5 view .LVU434
primo commit
2023-07-02 17:09:41 +02:00
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1209 .loc 1 622 12 is_stmt 0 view .LVU435
1210 0018 0120 movs r0, #1
1211 .LVL66:
1212 .L72:
primo commit
2023-07-02 17:09:41 +02:00
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1213 .loc 1 733 1 view .LVU436
1214 001a BDE8F081 pop {r4, r5, r6, r7, r8, pc}
1215 .LVL67:
1216 .L71:
primo commit
2023-07-02 17:09:41 +02:00
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1217 .loc 1 733 1 view .LVU437
1218 001e 0F46 mov r7, r1
1219 0020 1546 mov r5, r2
primo commit
2023-07-02 17:09:41 +02:00
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1220 .loc 1 626 3 is_stmt 1 view .LVU438
primo commit
2023-07-02 17:09:41 +02:00
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1221 .loc 1 626 18 is_stmt 0 view .LVU439
1222 0022 0368 ldr r3, [r0]
primo commit
2023-07-02 17:09:41 +02:00
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1223 .loc 1 626 28 view .LVU440
1224 0024 1B68 ldr r3, [r3]
v1.2
2025-01-28 19:01:22 +01:00
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1225 .loc 1 626 6 view .LVU441
1226 0026 13F0200F tst r3, #32
1227 002a 2BD1 bne .L86
primo commit
2023-07-02 17:09:41 +02:00
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1228 .loc 1 633 3 is_stmt 1 view .LVU442
primo commit
2023-07-02 17:09:41 +02:00
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1229 .loc 1 633 6 is_stmt 0 view .LVU443
1230 002c 79BB cbnz r1, .L74
ARM GAS /tmp/ccSt8eya.s page 48
primo commit
2023-07-02 17:09:41 +02:00
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1231 .loc 1 637 5 is_stmt 1 view .LVU444
primo commit
2023-07-02 17:09:41 +02:00
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1232 .loc 1 637 43 is_stmt 0 view .LVU445
1233 002e 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1234 .loc 1 637 58 view .LVU446
1235 0030 03F01F03 and r3, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1236 .loc 1 637 10 view .LVU447
1237 0034 0226 movs r6, #2
1238 0036 9E40 lsls r6, r6, r3
1239 .LVL68:
1240 .L75:
primo commit
2023-07-02 17:09:41 +02:00
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1241 .loc 1 646 3 is_stmt 1 view .LVU448
primo commit
2023-07-02 17:09:41 +02:00
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1242 .loc 1 646 15 is_stmt 0 view .LVU449
1243 0038 FFF7FEFF bl HAL_GetTick
1244 .LVL69:
primo commit
2023-07-02 17:09:41 +02:00
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1245 .loc 1 646 15 view .LVU450
1246 003c 8046 mov r8, r0
1247 .LVL70:
primo commit
2023-07-02 17:09:41 +02:00
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1248 .loc 1 648 3 is_stmt 1 view .LVU451
1249 .L78:
primo commit
2023-07-02 17:09:41 +02:00
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1250 .loc 1 648 13 view .LVU452
primo commit
2023-07-02 17:09:41 +02:00
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1251 .loc 1 648 21 is_stmt 0 view .LVU453
1252 003e 226C ldr r2, [r4, #64]
primo commit
2023-07-02 17:09:41 +02:00
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1253 .loc 1 648 37 view .LVU454
1254 0040 1368 ldr r3, [r2]
primo commit
2023-07-02 17:09:41 +02:00
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1255 .loc 1 648 13 view .LVU455
1256 0042 3342 tst r3, r6
1257 0044 34D1 bne .L87
v1.2
2025-01-28 19:01:22 +01:00
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1258 .loc 1 650 5 is_stmt 1 view .LVU456
primo commit
2023-07-02 17:09:41 +02:00
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1259 .loc 1 650 37 is_stmt 0 view .LVU457
1260 0046 1168 ldr r1, [r2]
primo commit
2023-07-02 17:09:41 +02:00
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1261 .loc 1 650 77 view .LVU458
1262 0048 636C ldr r3, [r4, #68]
primo commit
2023-07-02 17:09:41 +02:00
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1263 .loc 1 650 92 view .LVU459
1264 004a 03F01F03 and r3, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1265 .loc 1 650 69 view .LVU460
1266 004e 4FF0080C mov ip, #8
1267 0052 0CFA03FC lsl ip, ip, r3
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1268 .loc 1 650 8 view .LVU461
1269 0056 11EA0C0F tst r1, ip
ARM GAS /tmp/ccSt8eya.s page 49
primo commit
2023-07-02 17:09:41 +02:00
UI led
2025-06-28 00:58:29 +02:00
1270 005a 1ED1 bne .L88
primo commit
2023-07-02 17:09:41 +02:00
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1271 .loc 1 669 5 is_stmt 1 view .LVU462
primo commit
2023-07-02 17:09:41 +02:00
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1272 .loc 1 669 8 is_stmt 0 view .LVU463
1273 005c B5F1FF3F cmp r5, #-1
1274 0060 EDD0 beq .L78
primo commit
2023-07-02 17:09:41 +02:00
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1275 .loc 1 671 7 is_stmt 1 view .LVU464
primo commit
2023-07-02 17:09:41 +02:00
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1276 .loc 1 671 13 is_stmt 0 view .LVU465
1277 0062 FFF7FEFF bl HAL_GetTick
1278 .LVL71:
primo commit
2023-07-02 17:09:41 +02:00
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1279 .loc 1 671 27 discriminator 1 view .LVU466
1280 0066 A0EB0800 sub r0, r0, r8
primo commit
2023-07-02 17:09:41 +02:00
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1281 .loc 1 671 10 discriminator 1 view .LVU467
1282 006a A842 cmp r0, r5
1283 006c 01D8 bhi .L79
primo commit
2023-07-02 17:09:41 +02:00
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1284 .loc 1 671 51 discriminator 1 view .LVU468
1285 006e 002D cmp r5, #0
1286 0070 E5D1 bne .L78
1287 .L79:
primo commit
2023-07-02 17:09:41 +02:00
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1288 .loc 1 674 9 is_stmt 1 view .LVU469
primo commit
2023-07-02 17:09:41 +02:00
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1289 .loc 1 674 25 is_stmt 0 view .LVU470
1290 0072 2023 movs r3, #32
1291 0074 E363 str r3, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1292 .loc 1 677 9 is_stmt 1 view .LVU471
primo commit
2023-07-02 17:09:41 +02:00
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1293 .loc 1 677 21 is_stmt 0 view .LVU472
1294 0076 0120 movs r0, #1
1295 0078 84F82500 strb r0, [r4, #37]
primo commit
2023-07-02 17:09:41 +02:00
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1296 .loc 1 680 9 is_stmt 1 view .LVU473
primo commit
2023-07-02 17:09:41 +02:00
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1297 .loc 1 680 9 view .LVU474
1298 007c 0023 movs r3, #0
1299 007e 84F82430 strb r3, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1300 .loc 1 680 9 view .LVU475
primo commit
2023-07-02 17:09:41 +02:00
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1301 .loc 1 682 9 view .LVU476
primo commit
2023-07-02 17:09:41 +02:00
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1302 .loc 1 682 16 is_stmt 0 view .LVU477
1303 0082 CAE7 b .L72
1304 .LVL72:
1305 .L86:
primo commit
2023-07-02 17:09:41 +02:00
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
UI led
2025-06-28 00:58:29 +02:00
1306 .loc 1 628 5 is_stmt 1 view .LVU478
primo commit
2023-07-02 17:09:41 +02:00
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
UI led
2025-06-28 00:58:29 +02:00
1307 .loc 1 628 21 is_stmt 0 view .LVU479
1308 0084 4FF48073 mov r3, #256
ARM GAS /tmp/ccSt8eya.s page 50
1309 0088 C363 str r3, [r0, #60]
primo commit
2023-07-02 17:09:41 +02:00
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1310 .loc 1 629 5 is_stmt 1 view .LVU480
primo commit
2023-07-02 17:09:41 +02:00
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1311 .loc 1 629 12 is_stmt 0 view .LVU481
1312 008a 0120 movs r0, #1
1313 .LVL73:
primo commit
2023-07-02 17:09:41 +02:00
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1314 .loc 1 629 12 view .LVU482
1315 008c C5E7 b .L72
1316 .LVL74:
1317 .L74:
primo commit
2023-07-02 17:09:41 +02:00
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1318 .loc 1 642 5 is_stmt 1 view .LVU483
primo commit
2023-07-02 17:09:41 +02:00
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1319 .loc 1 642 43 is_stmt 0 view .LVU484
1320 008e 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1321 .loc 1 642 58 view .LVU485
1322 0090 03F01F03 and r3, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1323 .loc 1 642 10 view .LVU486
1324 0094 0426 movs r6, #4
1325 0096 9E40 lsls r6, r6, r3
1326 0098 CEE7 b .L75
1327 .LVL75:
1328 .L88:
primo commit
2023-07-02 17:09:41 +02:00
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1329 .loc 1 655 7 is_stmt 1 view .LVU487
primo commit
2023-07-02 17:09:41 +02:00
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1330 .loc 1 655 60 is_stmt 0 view .LVU488
1331 009a 0120 movs r0, #1
1332 009c 00FA03F3 lsl r3, r0, r3
primo commit
2023-07-02 17:09:41 +02:00
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1333 .loc 1 655 34 view .LVU489
1334 00a0 5360 str r3, [r2, #4]
primo commit
2023-07-02 17:09:41 +02:00
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1335 .loc 1 658 7 is_stmt 1 view .LVU490
primo commit
2023-07-02 17:09:41 +02:00
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1336 .loc 1 658 23 is_stmt 0 view .LVU491
1337 00a2 E063 str r0, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1338 .loc 1 661 7 is_stmt 1 view .LVU492
primo commit
2023-07-02 17:09:41 +02:00
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1339 .loc 1 661 19 is_stmt 0 view .LVU493
1340 00a4 84F82500 strb r0, [r4, #37]
v1.2
2025-01-28 19:01:22 +01:00
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1341 .loc 1 664 7 is_stmt 1 view .LVU494
v1.2
2025-01-28 19:01:22 +01:00
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1342 .loc 1 664 7 view .LVU495
1343 00a8 0023 movs r3, #0
1344 00aa 84F82430 strb r3, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1345 .loc 1 664 7 view .LVU496
primo commit
2023-07-02 17:09:41 +02:00
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1346 .loc 1 666 7 view .LVU497
primo commit
2023-07-02 17:09:41 +02:00
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 51
1347 .loc 1 666 14 is_stmt 0 view .LVU498
1348 00ae B4E7 b .L72
1349 .L87:
primo commit
2023-07-02 17:09:41 +02:00
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1350 .loc 1 688 3 is_stmt 1 view .LVU499
primo commit
2023-07-02 17:09:41 +02:00
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1351 .loc 1 688 11 is_stmt 0 view .LVU500
1352 00b0 636D ldr r3, [r4, #84]
primo commit
2023-07-02 17:09:41 +02:00
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1353 .loc 1 688 6 view .LVU501
1354 00b2 7BB1 cbz r3, .L81
primo commit
2023-07-02 17:09:41 +02:00
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1355 .loc 1 691 5 is_stmt 1 view .LVU502
primo commit
2023-07-02 17:09:41 +02:00
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1356 .loc 1 691 14 is_stmt 0 view .LVU503
1357 00b4 A26D ldr r2, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1358 .loc 1 691 38 view .LVU504
1359 00b6 1168 ldr r1, [r2]
primo commit
2023-07-02 17:09:41 +02:00
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1360 .loc 1 691 51 view .LVU505
1361 00b8 E26D ldr r2, [r4, #92]
primo commit
2023-07-02 17:09:41 +02:00
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1362 .loc 1 691 8 view .LVU506
1363 00ba 1142 tst r1, r2
1364 00bc 0AD0 beq .L81
primo commit
2023-07-02 17:09:41 +02:00
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1365 .loc 1 694 7 is_stmt 1 view .LVU507
primo commit
2023-07-02 17:09:41 +02:00
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1366 .loc 1 694 29 is_stmt 0 view .LVU508
1367 00be 1A68 ldr r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1368 .loc 1 694 36 view .LVU509
1369 00c0 42F48072 orr r2, r2, #256
1370 00c4 1A60 str r2, [r3]
primo commit
2023-07-02 17:09:41 +02:00
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1371 .loc 1 697 7 is_stmt 1 view .LVU510
primo commit
2023-07-02 17:09:41 +02:00
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1372 .loc 1 697 11 is_stmt 0 view .LVU511
1373 00c6 A36D ldr r3, [r4, #88]
primo commit
2023-07-02 17:09:41 +02:00
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1374 .loc 1 697 49 view .LVU512
1375 00c8 E26D ldr r2, [r4, #92]
primo commit
2023-07-02 17:09:41 +02:00
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1376 .loc 1 697 43 view .LVU513
1377 00ca 5A60 str r2, [r3, #4]
primo commit
2023-07-02 17:09:41 +02:00
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1378 .loc 1 700 7 is_stmt 1 view .LVU514
primo commit
2023-07-02 17:09:41 +02:00
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1379 .loc 1 700 11 is_stmt 0 view .LVU515
1380 00cc E36B ldr r3, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1381 .loc 1 700 23 view .LVU516
1382 00ce 43F48063 orr r3, r3, #1024
1383 00d2 E363 str r3, [r4, #60]
1384 .L81:
primo commit
2023-07-02 17:09:41 +02:00
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 52
1385 .loc 1 705 3 is_stmt 1 view .LVU517
primo commit
2023-07-02 17:09:41 +02:00
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1386 .loc 1 705 12 is_stmt 0 view .LVU518
1387 00d4 E36C ldr r3, [r4, #76]
primo commit
2023-07-02 17:09:41 +02:00
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1388 .loc 1 705 33 view .LVU519
1389 00d6 1968 ldr r1, [r3]
primo commit
2023-07-02 17:09:41 +02:00
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1390 .loc 1 705 45 view .LVU520
1391 00d8 226D ldr r2, [r4, #80]
primo commit
2023-07-02 17:09:41 +02:00
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1392 .loc 1 705 6 view .LVU521
1393 00da 1142 tst r1, r2
1394 00dc 04D0 beq .L82
primo commit
2023-07-02 17:09:41 +02:00
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1395 .loc 1 708 5 is_stmt 1 view .LVU522
primo commit
2023-07-02 17:09:41 +02:00
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1396 .loc 1 708 36 is_stmt 0 view .LVU523
1397 00de 5A60 str r2, [r3, #4]
primo commit
2023-07-02 17:09:41 +02:00
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1398 .loc 1 711 5 is_stmt 1 view .LVU524
primo commit
2023-07-02 17:09:41 +02:00
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1399 .loc 1 711 9 is_stmt 0 view .LVU525
1400 00e0 E36B ldr r3, [r4, #60]
primo commit
2023-07-02 17:09:41 +02:00
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1401 .loc 1 711 21 view .LVU526
1402 00e2 43F40073 orr r3, r3, #512
1403 00e6 E363 str r3, [r4, #60]
1404 .L82:
primo commit
2023-07-02 17:09:41 +02:00
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1405 .loc 1 714 3 is_stmt 1 view .LVU527
primo commit
2023-07-02 17:09:41 +02:00
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1406 .loc 1 714 6 is_stmt 0 view .LVU528
1407 00e8 6FB9 cbnz r7, .L83
v1.2
2025-01-28 19:01:22 +01:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1408 .loc 1 717 5 is_stmt 1 view .LVU529
primo commit
2023-07-02 17:09:41 +02:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1409 .loc 1 717 66 is_stmt 0 view .LVU530
1410 00ea 636C ldr r3, [r4, #68]
primo commit
2023-07-02 17:09:41 +02:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1411 .loc 1 717 81 view .LVU531
1412 00ec 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1413 .loc 1 717 9 view .LVU532
1414 00f0 216C ldr r1, [r4, #64]
primo commit
2023-07-02 17:09:41 +02:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1415 .loc 1 717 58 view .LVU533
1416 00f2 0223 movs r3, #2
1417 00f4 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1418 .loc 1 717 32 view .LVU534
1419 00f6 4B60 str r3, [r1, #4]
primo commit
2023-07-02 17:09:41 +02:00
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1420 .loc 1 721 5 is_stmt 1 view .LVU535
primo commit
2023-07-02 17:09:41 +02:00
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1421 .loc 1 721 17 is_stmt 0 view .LVU536
1422 00f8 0123 movs r3, #1
ARM GAS /tmp/ccSt8eya.s page 53
1423 00fa 84F82530 strb r3, [r4, #37]
1424 .L84:
primo commit
2023-07-02 17:09:41 +02:00
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1425 .loc 1 730 3 is_stmt 1 view .LVU537
primo commit
2023-07-02 17:09:41 +02:00
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1426 .loc 1 730 3 view .LVU538
1427 00fe 0020 movs r0, #0
1428 0100 84F82400 strb r0, [r4, #36]
primo commit
2023-07-02 17:09:41 +02:00
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1429 .loc 1 730 3 view .LVU539
primo commit
2023-07-02 17:09:41 +02:00
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1430 .loc 1 732 3 view .LVU540
primo commit
2023-07-02 17:09:41 +02:00
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1431 .loc 1 732 10 is_stmt 0 view .LVU541
1432 0104 89E7 b .L72
1433 .L83:
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1434 .loc 1 726 5 is_stmt 1 view .LVU542
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1435 .loc 1 726 66 is_stmt 0 view .LVU543
1436 0106 636C ldr r3, [r4, #68]
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1437 .loc 1 726 81 view .LVU544
1438 0108 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1439 .loc 1 726 9 view .LVU545
1440 010c 216C ldr r1, [r4, #64]
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1441 .loc 1 726 58 view .LVU546
1442 010e 0423 movs r3, #4
1443 0110 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1444 .loc 1 726 32 view .LVU547
1445 0112 4B60 str r3, [r1, #4]
1446 0114 F3E7 b .L84
1447 .cfi_endproc
1448 .LFE335:
1450 .section .text.HAL_DMA_IRQHandler,"ax",%progbits
1451 .align 1
1452 .global HAL_DMA_IRQHandler
1453 .syntax unified
1454 .thumb
1455 .thumb_func
1457 HAL_DMA_IRQHandler:
1458 .LVL76:
1459 .LFB336:
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR;
1460 .loc 1 742 1 is_stmt 1 view -0
1461 .cfi_startproc
1462 @ args = 0, pretend = 0, frame = 0
1463 @ frame_needed = 0, uses_anonymous_args = 0
primo commit
2023-07-02 17:09:41 +02:00
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR;
UI led
2025-06-28 00:58:29 +02:00
1464 .loc 1 742 1 is_stmt 0 view .LVU549
1465 0000 38B5 push {r3, r4, r5, lr}
1466 .LCFI11:
1467 .cfi_def_cfa_offset 16
1468 .cfi_offset 3, -16
ARM GAS /tmp/ccSt8eya.s page 54
v1.2
2025-01-28 19:01:22 +01:00
UI led
2025-06-28 00:58:29 +02:00
1469 .cfi_offset 4, -12
1470 .cfi_offset 5, -8
1471 .cfi_offset 14, -4
primo commit
2023-07-02 17:09:41 +02:00
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
UI led
2025-06-28 00:58:29 +02:00
1472 .loc 1 743 3 is_stmt 1 view .LVU550
primo commit
2023-07-02 17:09:41 +02:00
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
UI led
2025-06-28 00:58:29 +02:00
1473 .loc 1 743 26 is_stmt 0 view .LVU551
1474 0002 036C ldr r3, [r0, #64]
primo commit
2023-07-02 17:09:41 +02:00
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
UI led
2025-06-28 00:58:29 +02:00
1475 .loc 1 743 12 view .LVU552
1476 0004 1968 ldr r1, [r3]
1477 .LVL77:
primo commit
2023-07-02 17:09:41 +02:00
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1478 .loc 1 744 3 is_stmt 1 view .LVU553
primo commit
2023-07-02 17:09:41 +02:00
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1479 .loc 1 744 28 is_stmt 0 view .LVU554
1480 0006 0468 ldr r4, [r0]
primo commit
2023-07-02 17:09:41 +02:00
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1481 .loc 1 744 12 view .LVU555
1482 0008 2568 ldr r5, [r4]
1483 .LVL78:
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1484 .loc 1 747 3 is_stmt 1 view .LVU556
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1485 .loc 1 747 57 is_stmt 0 view .LVU557
1486 000a 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1487 .loc 1 747 72 view .LVU558
1488 000c 03F01F03 and r3, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1489 .loc 1 747 49 view .LVU559
1490 0010 0422 movs r2, #4
1491 0012 9A40 lsls r2, r2, r3
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1492 .loc 1 747 6 view .LVU560
1493 0014 0A42 tst r2, r1
1494 0016 15D0 beq .L90
primo commit
2023-07-02 17:09:41 +02:00
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1495 .loc 1 747 84 discriminator 1 view .LVU561
1496 0018 15F0040F tst r5, #4
1497 001c 12D0 beq .L90
primo commit
2023-07-02 17:09:41 +02:00
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1498 .loc 1 750 5 is_stmt 1 view .LVU562
primo commit
2023-07-02 17:09:41 +02:00
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1499 .loc 1 750 24 is_stmt 0 view .LVU563
1500 001e 2368 ldr r3, [r4]
v1.2
2025-01-28 19:01:22 +01:00
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1501 .loc 1 750 8 view .LVU564
1502 0020 13F0200F tst r3, #32
1503 0024 03D1 bne .L91
primo commit
2023-07-02 17:09:41 +02:00
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1504 .loc 1 753 7 is_stmt 1 view .LVU565
1505 0026 2368 ldr r3, [r4]
1506 0028 23F00403 bic r3, r3, #4
1507 002c 2360 str r3, [r4]
1508 .L91:
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 55
1509 .loc 1 756 5 view .LVU566
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1510 .loc 1 756 67 is_stmt 0 view .LVU567
1511 002e 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1512 .loc 1 756 82 view .LVU568
1513 0030 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1514 .loc 1 756 9 view .LVU569
1515 0034 016C ldr r1, [r0, #64]
1516 .LVL79:
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1517 .loc 1 756 59 view .LVU570
1518 0036 0423 movs r3, #4
1519 0038 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1520 .loc 1 756 32 view .LVU571
1521 003a 4B60 str r3, [r1, #4]
primo commit
2023-07-02 17:09:41 +02:00
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1522 .loc 1 761 5 is_stmt 1 view .LVU572
primo commit
2023-07-02 17:09:41 +02:00
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1523 .loc 1 761 13 is_stmt 0 view .LVU573
1524 003c 036B ldr r3, [r0, #48]
primo commit
2023-07-02 17:09:41 +02:00
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1525 .loc 1 761 8 view .LVU574
1526 003e 03B1 cbz r3, .L89
primo commit
2023-07-02 17:09:41 +02:00
764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1527 .loc 1 764 7 is_stmt 1 view .LVU575
1528 0040 9847 blx r3
1529 .LVL80:
1530 .L89:
primo commit
2023-07-02 17:09:41 +02:00
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1531 .loc 1 823 1 is_stmt 0 view .LVU576
1532 0042 38BD pop {r3, r4, r5, pc}
1533 .LVL81:
1534 .L90:
primo commit
2023-07-02 17:09:41 +02:00
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
UI led
2025-06-28 00:58:29 +02:00
1535 .loc 1 768 8 is_stmt 1 view .LVU577
primo commit
2023-07-02 17:09:41 +02:00
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
UI led
2025-06-28 00:58:29 +02:00
1536 .loc 1 768 54 is_stmt 0 view .LVU578
1537 0044 0222 movs r2, #2
1538 0046 9A40 lsls r2, r2, r3
primo commit
2023-07-02 17:09:41 +02:00
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
UI led
2025-06-28 00:58:29 +02:00
1539 .loc 1 768 11 view .LVU579
1540 0048 0A42 tst r2, r1
1541 004a 1CD0 beq .L93
v1.2
2025-01-28 19:01:22 +01:00
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1542 .loc 1 769 12 view .LVU580
1543 004c 15F0020F tst r5, #2
1544 0050 19D0 beq .L93
primo commit
2023-07-02 17:09:41 +02:00
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1545 .loc 1 771 5 is_stmt 1 view .LVU581
primo commit
2023-07-02 17:09:41 +02:00
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1546 .loc 1 771 24 is_stmt 0 view .LVU582
1547 0052 2368 ldr r3, [r4]
primo commit
2023-07-02 17:09:41 +02:00
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1548 .loc 1 771 8 view .LVU583
ARM GAS /tmp/ccSt8eya.s page 56
1549 0054 13F0200F tst r3, #32
1550 0058 06D1 bne .L94
primo commit
2023-07-02 17:09:41 +02:00
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1551 .loc 1 774 7 is_stmt 1 view .LVU584
1552 005a 2368 ldr r3, [r4]
1553 005c 23F00A03 bic r3, r3, #10
1554 0060 2360 str r3, [r4]
primo commit
2023-07-02 17:09:41 +02:00
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1555 .loc 1 777 7 view .LVU585
primo commit
2023-07-02 17:09:41 +02:00
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1556 .loc 1 777 19 is_stmt 0 view .LVU586
1557 0062 0123 movs r3, #1
1558 0064 80F82530 strb r3, [r0, #37]
1559 .L94:
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1560 .loc 1 780 5 is_stmt 1 view .LVU587
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1561 .loc 1 780 67 is_stmt 0 view .LVU588
1562 0068 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1563 .loc 1 780 82 view .LVU589
1564 006a 03F01F02 and r2, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1565 .loc 1 780 9 view .LVU590
1566 006e 016C ldr r1, [r0, #64]
1567 .LVL82:
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1568 .loc 1 780 59 view .LVU591
1569 0070 0223 movs r3, #2
1570 0072 9340 lsls r3, r3, r2
primo commit
2023-07-02 17:09:41 +02:00
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1571 .loc 1 780 32 view .LVU592
1572 0074 4B60 str r3, [r1, #4]
primo commit
2023-07-02 17:09:41 +02:00
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1573 .loc 1 783 5 is_stmt 1 view .LVU593
primo commit
2023-07-02 17:09:41 +02:00
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1574 .loc 1 783 5 view .LVU594
1575 0076 0023 movs r3, #0
1576 0078 80F82430 strb r3, [r0, #36]
primo commit
2023-07-02 17:09:41 +02:00
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1577 .loc 1 783 5 view .LVU595
v1.2
2025-01-28 19:01:22 +01:00
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1578 .loc 1 785 5 view .LVU596
primo commit
2023-07-02 17:09:41 +02:00
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1579 .loc 1 785 13 is_stmt 0 view .LVU597
1580 007c C36A ldr r3, [r0, #44]
primo commit
2023-07-02 17:09:41 +02:00
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1581 .loc 1 785 8 view .LVU598
1582 007e 002B cmp r3, #0
1583 0080 DFD0 beq .L89
primo commit
2023-07-02 17:09:41 +02:00
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1584 .loc 1 788 7 is_stmt 1 view .LVU599
1585 0082 9847 blx r3
1586 .LVL83:
primo commit
2023-07-02 17:09:41 +02:00
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1587 .loc 1 788 7 is_stmt 0 view .LVU600
1588 0084 DDE7 b .L89
ARM GAS /tmp/ccSt8eya.s page 57
1589 .LVL84:
1590 .L93:
primo commit
2023-07-02 17:09:41 +02:00
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
UI led
2025-06-28 00:58:29 +02:00
1591 .loc 1 792 8 is_stmt 1 view .LVU601
primo commit
2023-07-02 17:09:41 +02:00
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
UI led
2025-06-28 00:58:29 +02:00
1592 .loc 1 792 54 is_stmt 0 view .LVU602
1593 0086 0822 movs r2, #8
1594 0088 02FA03F3 lsl r3, r2, r3
primo commit
2023-07-02 17:09:41 +02:00
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
UI led
2025-06-28 00:58:29 +02:00
1595 .loc 1 792 11 view .LVU603
1596 008c 0B42 tst r3, r1
1597 008e D8D0 beq .L89
primo commit
2023-07-02 17:09:41 +02:00
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1598 .loc 1 793 12 view .LVU604
1599 0090 15F0080F tst r5, #8
1600 0094 D5D0 beq .L89
primo commit
2023-07-02 17:09:41 +02:00
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1601 .loc 1 798 5 is_stmt 1 view .LVU605
1602 0096 2368 ldr r3, [r4]
1603 0098 23F00E03 bic r3, r3, #14
1604 009c 2360 str r3, [r4]
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1605 .loc 1 801 5 view .LVU606
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1606 .loc 1 801 66 is_stmt 0 view .LVU607
1607 009e 436C ldr r3, [r0, #68]
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1608 .loc 1 801 81 view .LVU608
1609 00a0 03F01F03 and r3, r3, #31
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1610 .loc 1 801 9 view .LVU609
1611 00a4 016C ldr r1, [r0, #64]
1612 .LVL85:
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1613 .loc 1 801 58 view .LVU610
1614 00a6 0122 movs r2, #1
1615 00a8 02FA03F3 lsl r3, r2, r3
primo commit
2023-07-02 17:09:41 +02:00
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1616 .loc 1 801 32 view .LVU611
1617 00ac 4B60 str r3, [r1, #4]
primo commit
2023-07-02 17:09:41 +02:00
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1618 .loc 1 804 5 is_stmt 1 view .LVU612
primo commit
2023-07-02 17:09:41 +02:00
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1619 .loc 1 804 21 is_stmt 0 view .LVU613
1620 00ae C263 str r2, [r0, #60]
primo commit
2023-07-02 17:09:41 +02:00
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1621 .loc 1 807 5 is_stmt 1 view .LVU614
primo commit
2023-07-02 17:09:41 +02:00
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1622 .loc 1 807 17 is_stmt 0 view .LVU615
1623 00b0 80F82520 strb r2, [r0, #37]
primo commit
2023-07-02 17:09:41 +02:00
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1624 .loc 1 810 5 is_stmt 1 view .LVU616
primo commit
2023-07-02 17:09:41 +02:00
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1625 .loc 1 810 5 view .LVU617
1626 00b4 0023 movs r3, #0
1627 00b6 80F82430 strb r3, [r0, #36]
primo commit
2023-07-02 17:09:41 +02:00
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 58
1628 .loc 1 810 5 view .LVU618
primo commit
2023-07-02 17:09:41 +02:00
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1629 .loc 1 812 5 view .LVU619
primo commit
2023-07-02 17:09:41 +02:00
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1630 .loc 1 812 13 is_stmt 0 view .LVU620
1631 00ba 436B ldr r3, [r0, #52]
primo commit
2023-07-02 17:09:41 +02:00
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1632 .loc 1 812 8 view .LVU621
1633 00bc 002B cmp r3, #0
1634 00be C0D0 beq .L89
primo commit
2023-07-02 17:09:41 +02:00
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1635 .loc 1 815 7 is_stmt 1 view .LVU622
1636 00c0 9847 blx r3
1637 .LVL86:
primo commit
2023-07-02 17:09:41 +02:00
821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return;
UI led
2025-06-28 00:58:29 +02:00
1638 .loc 1 821 3 view .LVU623
primo commit
2023-07-02 17:09:41 +02:00
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1639 .loc 1 822 3 view .LVU624
1640 00c2 BEE7 b .L89
1641 .cfi_endproc
1642 .LFE336:
1644 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits
1645 .align 1
1646 .global HAL_DMA_RegisterCallback
1647 .syntax unified
1648 .thumb
1649 .thumb_func
1651 HAL_DMA_RegisterCallback:
1652 .LVL87:
1653 .LFB337:
primo commit
2023-07-02 17:09:41 +02:00
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1654 .loc 1 836 1 view -0
1655 .cfi_startproc
1656 @ args = 0, pretend = 0, frame = 0
1657 @ frame_needed = 0, uses_anonymous_args = 0
1658 @ link register save eliminated.
primo commit
2023-07-02 17:09:41 +02:00
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1659 .loc 1 836 1 is_stmt 0 view .LVU626
1660 0000 0346 mov r3, r0
primo commit
2023-07-02 17:09:41 +02:00
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1661 .loc 1 837 3 is_stmt 1 view .LVU627
1662 .LVL88:
primo commit
2023-07-02 17:09:41 +02:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1663 .loc 1 840 3 view .LVU628
primo commit
2023-07-02 17:09:41 +02:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1664 .loc 1 840 3 view .LVU629
1665 0002 90F82400 ldrb r0, [r0, #36] @ zero_extendqisi2
1666 .LVL89:
v1.2
2025-01-28 19:01:22 +01:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1667 .loc 1 840 3 is_stmt 0 view .LVU630
1668 0006 0128 cmp r0, #1
1669 0008 20D0 beq .L104
primo commit
2023-07-02 17:09:41 +02:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1670 .loc 1 840 3 is_stmt 1 discriminator 2 view .LVU631
1671 000a 0120 movs r0, #1
1672 000c 83F82400 strb r0, [r3, #36]
primo commit
2023-07-02 17:09:41 +02:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 59
1673 .loc 1 840 3 view .LVU632
primo commit
2023-07-02 17:09:41 +02:00
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1674 .loc 1 842 3 view .LVU633
primo commit
2023-07-02 17:09:41 +02:00
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1675 .loc 1 842 34 is_stmt 0 view .LVU634
1676 0010 93F825C0 ldrb ip, [r3, #37] @ zero_extendqisi2
1677 0014 5FFA8CF0 uxtb r0, ip
primo commit
2023-07-02 17:09:41 +02:00
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1678 .loc 1 842 6 view .LVU635
1679 0018 BCF1010F cmp ip, #1
1680 001c 04D0 beq .L107
primo commit
2023-07-02 17:09:41 +02:00
869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1681 .loc 1 869 12 view .LVU636
1682 001e 0120 movs r0, #1
1683 .L98:
1684 .LVL90:
primo commit
2023-07-02 17:09:41 +02:00
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1685 .loc 1 873 3 is_stmt 1 view .LVU637
primo commit
2023-07-02 17:09:41 +02:00
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1686 .loc 1 873 3 view .LVU638
1687 0020 0022 movs r2, #0
1688 .LVL91:
primo commit
2023-07-02 17:09:41 +02:00
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1689 .loc 1 873 3 is_stmt 0 view .LVU639
1690 0022 83F82420 strb r2, [r3, #36]
primo commit
2023-07-02 17:09:41 +02:00
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1691 .loc 1 873 3 is_stmt 1 view .LVU640
primo commit
2023-07-02 17:09:41 +02:00
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1692 .loc 1 875 3 view .LVU641
primo commit
2023-07-02 17:09:41 +02:00
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1693 .loc 1 875 10 is_stmt 0 view .LVU642
1694 0026 7047 bx lr
1695 .LVL92:
1696 .L107:
primo commit
2023-07-02 17:09:41 +02:00
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1697 .loc 1 844 5 is_stmt 1 view .LVU643
1698 0028 0329 cmp r1, #3
1699 002a F9D8 bhi .L98
1700 002c DFE801F0 tbb [pc, r1]
1701 .L100:
1702 0030 02 .byte (.L103-.L100)/2
1703 0031 05 .byte (.L102-.L100)/2
1704 0032 08 .byte (.L101-.L100)/2
1705 0033 0B .byte (.L99-.L100)/2
1706 .p2align 1
1707 .L103:
primo commit
2023-07-02 17:09:41 +02:00
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1708 .loc 1 847 9 view .LVU644
primo commit
2023-07-02 17:09:41 +02:00
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1709 .loc 1 847 32 is_stmt 0 view .LVU645
1710 0034 DA62 str r2, [r3, #44]
primo commit
2023-07-02 17:09:41 +02:00
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1711 .loc 1 848 9 is_stmt 1 view .LVU646
primo commit
2023-07-02 17:09:41 +02:00
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1712 .loc 1 837 21 is_stmt 0 view .LVU647
1713 0036 0846 mov r0, r1
primo commit
2023-07-02 17:09:41 +02:00
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 60
1714 .loc 1 848 9 view .LVU648
1715 0038 F2E7 b .L98
1716 .L102:
primo commit
2023-07-02 17:09:41 +02:00
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1717 .loc 1 851 9 is_stmt 1 view .LVU649
primo commit
2023-07-02 17:09:41 +02:00
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1718 .loc 1 851 36 is_stmt 0 view .LVU650
1719 003a 1A63 str r2, [r3, #48]
primo commit
2023-07-02 17:09:41 +02:00
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1720 .loc 1 852 9 is_stmt 1 view .LVU651
primo commit
2023-07-02 17:09:41 +02:00
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1721 .loc 1 837 21 is_stmt 0 view .LVU652
1722 003c 0020 movs r0, #0
primo commit
2023-07-02 17:09:41 +02:00
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1723 .loc 1 852 9 view .LVU653
1724 003e EFE7 b .L98
1725 .L101:
primo commit
2023-07-02 17:09:41 +02:00
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1726 .loc 1 855 9 is_stmt 1 view .LVU654
primo commit
2023-07-02 17:09:41 +02:00
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1727 .loc 1 855 33 is_stmt 0 view .LVU655
1728 0040 5A63 str r2, [r3, #52]
primo commit
2023-07-02 17:09:41 +02:00
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1729 .loc 1 856 9 is_stmt 1 view .LVU656
primo commit
2023-07-02 17:09:41 +02:00
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1730 .loc 1 837 21 is_stmt 0 view .LVU657
1731 0042 0020 movs r0, #0
primo commit
2023-07-02 17:09:41 +02:00
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1732 .loc 1 856 9 view .LVU658
1733 0044 ECE7 b .L98
1734 .L99:
primo commit
2023-07-02 17:09:41 +02:00
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1735 .loc 1 859 9 is_stmt 1 view .LVU659
primo commit
2023-07-02 17:09:41 +02:00
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1736 .loc 1 859 33 is_stmt 0 view .LVU660
1737 0046 9A63 str r2, [r3, #56]
primo commit
2023-07-02 17:09:41 +02:00
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1738 .loc 1 860 9 is_stmt 1 view .LVU661
primo commit
2023-07-02 17:09:41 +02:00
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1739 .loc 1 837 21 is_stmt 0 view .LVU662
1740 0048 0020 movs r0, #0
primo commit
2023-07-02 17:09:41 +02:00
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1741 .loc 1 860 9 view .LVU663
1742 004a E9E7 b .L98
1743 .L104:
primo commit
2023-07-02 17:09:41 +02:00
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1744 .loc 1 840 3 discriminator 1 view .LVU664
1745 004c 0220 movs r0, #2
primo commit
2023-07-02 17:09:41 +02:00
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1746 .loc 1 876 1 view .LVU665
1747 004e 7047 bx lr
1748 .cfi_endproc
1749 .LFE337:
1751 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits
1752 .align 1
1753 .global HAL_DMA_UnRegisterCallback
1754 .syntax unified
ARM GAS /tmp/ccSt8eya.s page 61
1755 .thumb
1756 .thumb_func
1758 HAL_DMA_UnRegisterCallback:
1759 .LVL93:
1760 .LFB338:
primo commit
2023-07-02 17:09:41 +02:00
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1761 .loc 1 887 1 is_stmt 1 view -0
1762 .cfi_startproc
1763 @ args = 0, pretend = 0, frame = 0
1764 @ frame_needed = 0, uses_anonymous_args = 0
1765 @ link register save eliminated.
primo commit
2023-07-02 17:09:41 +02:00
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
UI led
2025-06-28 00:58:29 +02:00
1766 .loc 1 887 1 is_stmt 0 view .LVU667
1767 0000 0346 mov r3, r0
primo commit
2023-07-02 17:09:41 +02:00
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1768 .loc 1 888 3 is_stmt 1 view .LVU668
1769 .LVL94:
primo commit
2023-07-02 17:09:41 +02:00
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1770 .loc 1 891 3 view .LVU669
primo commit
2023-07-02 17:09:41 +02:00
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1771 .loc 1 891 3 view .LVU670
1772 0002 90F82420 ldrb r2, [r0, #36] @ zero_extendqisi2
1773 0006 012A cmp r2, #1
1774 0008 26D0 beq .L117
primo commit
2023-07-02 17:09:41 +02:00
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1775 .loc 1 891 3 discriminator 2 view .LVU671
1776 000a 0122 movs r2, #1
1777 000c 80F82420 strb r2, [r0, #36]
primo commit
2023-07-02 17:09:41 +02:00
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1778 .loc 1 891 3 view .LVU672
primo commit
2023-07-02 17:09:41 +02:00
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1779 .loc 1 893 3 view .LVU673
primo commit
2023-07-02 17:09:41 +02:00
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1780 .loc 1 893 34 is_stmt 0 view .LVU674
1781 0010 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2
1782 0014 D0B2 uxtb r0, r2
1783 .LVL95:
primo commit
2023-07-02 17:09:41 +02:00
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1784 .loc 1 893 6 view .LVU675
1785 0016 012A cmp r2, #1
1786 0018 04D0 beq .L120
primo commit
2023-07-02 17:09:41 +02:00
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1787 .loc 1 927 12 view .LVU676
1788 001a 0120 movs r0, #1
1789 .L110:
1790 .LVL96:
v1.2
2025-01-28 19:01:22 +01:00
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1791 .loc 1 931 3 is_stmt 1 view .LVU677
primo commit
2023-07-02 17:09:41 +02:00
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1792 .loc 1 931 3 view .LVU678
1793 001c 0022 movs r2, #0
1794 001e 83F82420 strb r2, [r3, #36]
primo commit
2023-07-02 17:09:41 +02:00
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1795 .loc 1 931 3 view .LVU679
primo commit
2023-07-02 17:09:41 +02:00
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1796 .loc 1 933 3 view .LVU680
primo commit
2023-07-02 17:09:41 +02:00
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/ccSt8eya.s page 62
1797 .loc 1 933 10 is_stmt 0 view .LVU681
1798 0022 7047 bx lr
1799 .LVL97:
1800 .L120:
primo commit
2023-07-02 17:09:41 +02:00
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
UI led
2025-06-28 00:58:29 +02:00
1801 .loc 1 895 5 is_stmt 1 view .LVU682
1802 0024 0429 cmp r1, #4
1803 0026 F9D8 bhi .L110
1804 0028 DFE801F0 tbb [pc, r1]
1805 .L112:
1806 002c 03 .byte (.L116-.L112)/2
1807 002d 07 .byte (.L115-.L112)/2
1808 002e 0A .byte (.L114-.L112)/2
1809 002f 0D .byte (.L113-.L112)/2
1810 0030 10 .byte (.L111-.L112)/2
1811 0031 00 .p2align 1
1812 .L116:
primo commit
2023-07-02 17:09:41 +02:00
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1813 .loc 1 898 9 view .LVU683
primo commit
2023-07-02 17:09:41 +02:00
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1814 .loc 1 898 32 is_stmt 0 view .LVU684
1815 0032 0022 movs r2, #0
1816 0034 DA62 str r2, [r3, #44]
primo commit
2023-07-02 17:09:41 +02:00
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1817 .loc 1 899 9 is_stmt 1 view .LVU685
primo commit
2023-07-02 17:09:41 +02:00
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1818 .loc 1 888 21 is_stmt 0 view .LVU686
1819 0036 0846 mov r0, r1
primo commit
2023-07-02 17:09:41 +02:00
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1820 .loc 1 899 9 view .LVU687
1821 0038 F0E7 b .L110
1822 .L115:
primo commit
2023-07-02 17:09:41 +02:00
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1823 .loc 1 902 9 is_stmt 1 view .LVU688
primo commit
2023-07-02 17:09:41 +02:00
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1824 .loc 1 902 36 is_stmt 0 view .LVU689
1825 003a 0020 movs r0, #0
1826 003c 1863 str r0, [r3, #48]
primo commit
2023-07-02 17:09:41 +02:00
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1827 .loc 1 903 9 is_stmt 1 view .LVU690
1828 003e EDE7 b .L110
1829 .L114:
v1.2
2025-01-28 19:01:22 +01:00
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1830 .loc 1 906 9 view .LVU691
primo commit
2023-07-02 17:09:41 +02:00
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1831 .loc 1 906 33 is_stmt 0 view .LVU692
1832 0040 0020 movs r0, #0
1833 0042 5863 str r0, [r3, #52]
primo commit
2023-07-02 17:09:41 +02:00
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1834 .loc 1 907 9 is_stmt 1 view .LVU693
1835 0044 EAE7 b .L110
1836 .L113:
primo commit
2023-07-02 17:09:41 +02:00
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1837 .loc 1 910 9 view .LVU694
primo commit
2023-07-02 17:09:41 +02:00
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
2025-06-28 00:58:29 +02:00
1838 .loc 1 910 33 is_stmt 0 view .LVU695
1839 0046 0020 movs r0, #0
ARM GAS /tmp/ccSt8eya.s page 63
1840 0048 9863 str r0, [r3, #56]
primo commit
2023-07-02 17:09:41 +02:00
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1841 .loc 1 911 9 is_stmt 1 view .LVU696
1842 004a E7E7 b .L110
1843 .L111:
primo commit
2023-07-02 17:09:41 +02:00
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
1844 .loc 1 914 9 view .LVU697
primo commit
2023-07-02 17:09:41 +02:00
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
1845 .loc 1 914 32 is_stmt 0 view .LVU698
1846 004c 0020 movs r0, #0
1847 004e D862 str r0, [r3, #44]
primo commit
2023-07-02 17:09:41 +02:00
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
1848 .loc 1 915 9 is_stmt 1 view .LVU699
primo commit
2023-07-02 17:09:41 +02:00
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
1849 .loc 1 915 36 is_stmt 0 view .LVU700
1850 0050 1863 str r0, [r3, #48]
primo commit
2023-07-02 17:09:41 +02:00
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
UI led
2025-06-28 00:58:29 +02:00
1851 .loc 1 916 9 is_stmt 1 view .LVU701
primo commit
2023-07-02 17:09:41 +02:00
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
UI led
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1852 .loc 1 916 33 is_stmt 0 view .LVU702
1853 0052 5863 str r0, [r3, #52]
primo commit
2023-07-02 17:09:41 +02:00
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
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1854 .loc 1 917 9 is_stmt 1 view .LVU703
primo commit
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917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
UI led
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1855 .loc 1 917 33 is_stmt 0 view .LVU704
1856 0054 9863 str r0, [r3, #56]
primo commit
2023-07-02 17:09:41 +02:00
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1857 .loc 1 918 9 is_stmt 1 view .LVU705
1858 0056 E1E7 b .L110
1859 .LVL98:
1860 .L117:
primo commit
2023-07-02 17:09:41 +02:00
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1861 .loc 1 891 3 is_stmt 0 discriminator 1 view .LVU706
1862 0058 0220 movs r0, #2
1863 .LVL99:
primo commit
2023-07-02 17:09:41 +02:00
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1864 .loc 1 934 1 view .LVU707
1865 005a 7047 bx lr
1866 .cfi_endproc
1867 .LFE338:
1869 .section .text.HAL_DMA_GetState,"ax",%progbits
1870 .align 1
1871 .global HAL_DMA_GetState
1872 .syntax unified
1873 .thumb
1874 .thumb_func
1876 HAL_DMA_GetState:
1877 .LVL100:
1878 .LFB339:
primo commit
2023-07-02 17:09:41 +02:00
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Return DMA handle state */
UI led
2025-06-28 00:58:29 +02:00
1879 .loc 1 965 1 is_stmt 1 view -0
1880 .cfi_startproc
1881 @ args = 0, pretend = 0, frame = 0
1882 @ frame_needed = 0, uses_anonymous_args = 0
1883 @ link register save eliminated.
primo commit
2023-07-02 17:09:41 +02:00
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
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1884 .loc 1 967 3 view .LVU709
ARM GAS /tmp/ccSt8eya.s page 64
primo commit
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967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
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1885 .loc 1 967 14 is_stmt 0 view .LVU710
1886 0000 90F82500 ldrb r0, [r0, #37] @ zero_extendqisi2
1887 .LVL101:
primo commit
2023-07-02 17:09:41 +02:00
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
2025-06-28 00:58:29 +02:00
1888 .loc 1 968 1 view .LVU711
1889 0004 7047 bx lr
1890 .cfi_endproc
1891 .LFE339:
1893 .section .text.HAL_DMA_GetError,"ax",%progbits
1894 .align 1
1895 .global HAL_DMA_GetError
1896 .syntax unified
1897 .thumb
1898 .thumb_func
1900 HAL_DMA_GetError:
1901 .LVL102:
1902 .LFB340:
primo commit
2023-07-02 17:09:41 +02:00
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->ErrorCode;
UI led
2025-06-28 00:58:29 +02:00
1903 .loc 1 977 1 is_stmt 1 view -0
1904 .cfi_startproc
1905 @ args = 0, pretend = 0, frame = 0
1906 @ frame_needed = 0, uses_anonymous_args = 0
1907 @ link register save eliminated.
primo commit
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978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1908 .loc 1 978 3 view .LVU713
primo commit
2023-07-02 17:09:41 +02:00
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
UI led
2025-06-28 00:58:29 +02:00
1909 .loc 1 978 14 is_stmt 0 view .LVU714
1910 0000 C06B ldr r0, [r0, #60]
1911 .LVL103:
primo commit
2023-07-02 17:09:41 +02:00
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
UI led
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1912 .loc 1 979 1 view .LVU715
1913 0002 7047 bx lr
1914 .cfi_endproc
1915 .LFE340:
1917 .text
1918 .Letext0:
1919 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1920 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1921 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1922 .file 5 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1923 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
1924 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
ARM GAS /tmp/ccSt8eya.s page 65
primo commit
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DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_dma.c
UI led
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/tmp/ccSt8eya.s:21 .text.DMA_SetConfig:00000000 $t
/tmp/ccSt8eya.s:26 .text.DMA_SetConfig:00000000 DMA_SetConfig
/tmp/ccSt8eya.s:121 .text.DMA_CalcDMAMUXChannelBaseAndMask:00000000 $t
/tmp/ccSt8eya.s:126 .text.DMA_CalcDMAMUXChannelBaseAndMask:00000000 DMA_CalcDMAMUXChannelBaseAndMask
/tmp/ccSt8eya.s:190 .text.DMA_CalcDMAMUXChannelBaseAndMask:00000034 $d
/tmp/ccSt8eya.s:199 .text.DMA_CalcDMAMUXRequestGenBaseAndMask:00000000 $t
/tmp/ccSt8eya.s:204 .text.DMA_CalcDMAMUXRequestGenBaseAndMask:00000000 DMA_CalcDMAMUXRequestGenBaseAndMask
/tmp/ccSt8eya.s:244 .text.DMA_CalcDMAMUXRequestGenBaseAndMask:00000020 $d
/tmp/ccSt8eya.s:250 .text.HAL_DMA_Init:00000000 $t
/tmp/ccSt8eya.s:256 .text.HAL_DMA_Init:00000000 HAL_DMA_Init
/tmp/ccSt8eya.s:471 .text.HAL_DMA_Init:000000bc $d
/tmp/ccSt8eya.s:481 .text.HAL_DMA_DeInit:00000000 $t
/tmp/ccSt8eya.s:487 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit
/tmp/ccSt8eya.s:669 .text.HAL_DMA_DeInit:000000a0 $d
/tmp/ccSt8eya.s:679 .text.HAL_DMA_Start:00000000 $t
/tmp/ccSt8eya.s:685 .text.HAL_DMA_Start:00000000 HAL_DMA_Start
/tmp/ccSt8eya.s:772 .text.HAL_DMA_Start_IT:00000000 $t
/tmp/ccSt8eya.s:778 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT
/tmp/ccSt8eya.s:915 .text.HAL_DMA_Abort:00000000 $t
/tmp/ccSt8eya.s:921 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort
/tmp/ccSt8eya.s:1029 .text.HAL_DMA_Abort_IT:00000000 $t
/tmp/ccSt8eya.s:1035 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT
/tmp/ccSt8eya.s:1167 .text.HAL_DMA_PollForTransfer:00000000 $t
/tmp/ccSt8eya.s:1173 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer
/tmp/ccSt8eya.s:1451 .text.HAL_DMA_IRQHandler:00000000 $t
/tmp/ccSt8eya.s:1457 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler
/tmp/ccSt8eya.s:1645 .text.HAL_DMA_RegisterCallback:00000000 $t
/tmp/ccSt8eya.s:1651 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback
/tmp/ccSt8eya.s:1702 .text.HAL_DMA_RegisterCallback:00000030 $d
/tmp/ccSt8eya.s:1706 .text.HAL_DMA_RegisterCallback:00000034 $t
/tmp/ccSt8eya.s:1752 .text.HAL_DMA_UnRegisterCallback:00000000 $t
/tmp/ccSt8eya.s:1758 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback
/tmp/ccSt8eya.s:1806 .text.HAL_DMA_UnRegisterCallback:0000002c $d
/tmp/ccSt8eya.s:1870 .text.HAL_DMA_GetState:00000000 $t
/tmp/ccSt8eya.s:1876 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState
/tmp/ccSt8eya.s:1894 .text.HAL_DMA_GetError:00000000 $t
/tmp/ccSt8eya.s:1900 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError
/tmp/ccSt8eya.s:1811 .text.HAL_DMA_UnRegisterCallback:00000031 $d
/tmp/ccSt8eya.s:1811 .text.HAL_DMA_UnRegisterCallback:00000032 $t
primo commit
2023-07-02 17:09:41 +02:00
UNDEFINED SYMBOLS
HAL_GetTick
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