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squeow/squeow_sw/build/stm32g4xx_hal_msp.lst

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UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/cclhdxfP.s page 1
primo commit
2023-07-02 17:09:41 +02:00
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32g4xx_hal_msp.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Src/stm32g4xx_hal_msp.c"
20 .section .text.HAL_MspInit,"ax",%progbits
21 .align 1
22 .global HAL_MspInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_MspInit:
28 .LFB329:
1:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Src/stm32g4xx_hal_msp.c **** /**
3:Src/stm32g4xx_hal_msp.c **** ******************************************************************************
4:Src/stm32g4xx_hal_msp.c **** * @file stm32g4xx_hal_msp.c
5:Src/stm32g4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Src/stm32g4xx_hal_msp.c **** * and de-Initialization codes.
7:Src/stm32g4xx_hal_msp.c **** ******************************************************************************
8:Src/stm32g4xx_hal_msp.c **** * @attention
9:Src/stm32g4xx_hal_msp.c **** *
10:Src/stm32g4xx_hal_msp.c **** * Copyright (c) 2022 STMicroelectronics.
11:Src/stm32g4xx_hal_msp.c **** * All rights reserved.
12:Src/stm32g4xx_hal_msp.c **** *
13:Src/stm32g4xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
14:Src/stm32g4xx_hal_msp.c **** * in the root directory of this software component.
15:Src/stm32g4xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
16:Src/stm32g4xx_hal_msp.c **** *
17:Src/stm32g4xx_hal_msp.c **** ******************************************************************************
18:Src/stm32g4xx_hal_msp.c **** */
19:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Header */
20:Src/stm32g4xx_hal_msp.c ****
21:Src/stm32g4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
22:Src/stm32g4xx_hal_msp.c **** #include "main.h"
23:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
24:Src/stm32g4xx_hal_msp.c ****
25:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Includes */
v1.2
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26:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc2;
27:Src/stm32g4xx_hal_msp.c ****
28:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_rx;
primo commit
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29:Src/stm32g4xx_hal_msp.c ****
v1.2
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30:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
UI led
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ARM GAS /tmp/cclhdxfP.s page 2
primo commit
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31:Src/stm32g4xx_hal_msp.c ****
v1.2
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32:Src/stm32g4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
33:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TD */
primo commit
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34:Src/stm32g4xx_hal_msp.c ****
v1.2
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35:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TD */
primo commit
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36:Src/stm32g4xx_hal_msp.c ****
v1.2
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37:Src/stm32g4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
38:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Define */
primo commit
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39:Src/stm32g4xx_hal_msp.c ****
v1.2
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40:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Define */
primo commit
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41:Src/stm32g4xx_hal_msp.c ****
v1.2
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42:Src/stm32g4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
43:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
primo commit
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44:Src/stm32g4xx_hal_msp.c ****
v1.2
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45:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Macro */
primo commit
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46:Src/stm32g4xx_hal_msp.c ****
v1.2
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47:Src/stm32g4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
48:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PV */
primo commit
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49:Src/stm32g4xx_hal_msp.c ****
v1.2
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50:Src/stm32g4xx_hal_msp.c **** /* USER CODE END PV */
primo commit
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51:Src/stm32g4xx_hal_msp.c ****
v1.2
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52:Src/stm32g4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
53:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
primo commit
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54:Src/stm32g4xx_hal_msp.c ****
v1.2
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55:Src/stm32g4xx_hal_msp.c **** /* USER CODE END PFP */
primo commit
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56:Src/stm32g4xx_hal_msp.c ****
v1.2
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57:Src/stm32g4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
58:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
59:Src/stm32g4xx_hal_msp.c ****
60:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
61:Src/stm32g4xx_hal_msp.c ****
62:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
63:Src/stm32g4xx_hal_msp.c ****
64:Src/stm32g4xx_hal_msp.c **** /* USER CODE END 0 */
65:Src/stm32g4xx_hal_msp.c ****
66:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
UI led
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67:Src/stm32g4xx_hal_msp.c **** /**
v1.2
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68:Src/stm32g4xx_hal_msp.c **** * Initializes the Global MSP.
69:Src/stm32g4xx_hal_msp.c **** */
70:Src/stm32g4xx_hal_msp.c **** void HAL_MspInit(void)
71:Src/stm32g4xx_hal_msp.c **** {
29 .loc 1 71 1 view -0
primo commit
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30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 8
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 00B5 push {lr}
34 .LCFI0:
35 .cfi_def_cfa_offset 4
36 .cfi_offset 14, -4
37 0002 83B0 sub sp, sp, #12
38 .LCFI1:
39 .cfi_def_cfa_offset 16
v1.2
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72:Src/stm32g4xx_hal_msp.c ****
73:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
74:Src/stm32g4xx_hal_msp.c ****
75:Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 0 */
76:Src/stm32g4xx_hal_msp.c ****
UI led
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ARM GAS /tmp/cclhdxfP.s page 3
primo commit
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v1.2
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77:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
40 .loc 1 77 3 view .LVU1
41 .LBB2:
42 .loc 1 77 3 view .LVU2
43 .loc 1 77 3 view .LVU3
44 0004 0B4B ldr r3, .L3
primo commit
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45 0006 1A6E ldr r2, [r3, #96]
46 0008 42F00102 orr r2, r2, #1
47 000c 1A66 str r2, [r3, #96]
v1.2
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48 .loc 1 77 3 view .LVU4
primo commit
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49 000e 1A6E ldr r2, [r3, #96]
50 0010 02F00102 and r2, r2, #1
51 0014 0092 str r2, [sp]
v1.2
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52 .loc 1 77 3 view .LVU5
primo commit
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53 0016 009A ldr r2, [sp]
54 .LBE2:
v1.2
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55 .loc 1 77 3 view .LVU6
78:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
56 .loc 1 78 3 view .LVU7
primo commit
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57 .LBB3:
v1.2
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58 .loc 1 78 3 view .LVU8
59 .loc 1 78 3 view .LVU9
primo commit
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60 0018 9A6D ldr r2, [r3, #88]
61 001a 42F08052 orr r2, r2, #268435456
62 001e 9A65 str r2, [r3, #88]
v1.2
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63 .loc 1 78 3 view .LVU10
primo commit
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64 0020 9B6D ldr r3, [r3, #88]
65 0022 03F08053 and r3, r3, #268435456
66 0026 0193 str r3, [sp, #4]
v1.2
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67 .loc 1 78 3 view .LVU11
primo commit
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68 0028 019B ldr r3, [sp, #4]
69 .LBE3:
v1.2
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70 .loc 1 78 3 view .LVU12
primo commit
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79:Src/stm32g4xx_hal_msp.c ****
v1.2
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80:Src/stm32g4xx_hal_msp.c **** /* System interrupt init*/
primo commit
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81:Src/stm32g4xx_hal_msp.c ****
v1.2
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82:Src/stm32g4xx_hal_msp.c **** /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
83:Src/stm32g4xx_hal_msp.c **** */
84:Src/stm32g4xx_hal_msp.c **** HAL_PWREx_DisableUCPDDeadBattery();
71 .loc 1 84 3 view .LVU13
72 002a FFF7FEFF bl HAL_PWREx_DisableUCPDDeadBattery
73 .LVL0:
85:Src/stm32g4xx_hal_msp.c ****
86:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
87:Src/stm32g4xx_hal_msp.c ****
88:Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 1 */
89:Src/stm32g4xx_hal_msp.c **** }
74 .loc 1 89 1 is_stmt 0 view .LVU14
primo commit
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75 002e 03B0 add sp, sp, #12
76 .LCFI2:
77 .cfi_def_cfa_offset 4
78 @ sp needed
79 0030 5DF804FB ldr pc, [sp], #4
80 .L4:
81 .align 2
82 .L3:
83 0034 00100240 .word 1073876992
UI led
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ARM GAS /tmp/cclhdxfP.s page 4
v1.2
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primo commit
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84 .cfi_endproc
85 .LFE329:
87 .section .text.HAL_ADC_MspInit,"ax",%progbits
88 .align 1
89 .global HAL_ADC_MspInit
90 .syntax unified
91 .thumb
92 .thumb_func
94 HAL_ADC_MspInit:
95 .LVL1:
96 .LFB330:
v1.2
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90:Src/stm32g4xx_hal_msp.c ****
91:Src/stm32g4xx_hal_msp.c **** static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0;
92:Src/stm32g4xx_hal_msp.c ****
93:Src/stm32g4xx_hal_msp.c **** /**
UI led
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94:Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP Initialization
95:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
96:Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
97:Src/stm32g4xx_hal_msp.c **** * @retval None
98:Src/stm32g4xx_hal_msp.c **** */
v1.2
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99:Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
100:Src/stm32g4xx_hal_msp.c **** {
97 .loc 1 100 1 is_stmt 1 view -0
primo commit
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98 .cfi_startproc
99 @ args = 0, pretend = 0, frame = 104
100 @ frame_needed = 0, uses_anonymous_args = 0
v1.2
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101 .loc 1 100 1 is_stmt 0 view .LVU16
102 0000 30B5 push {r4, r5, lr}
primo commit
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103 .LCFI3:
v1.2
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104 .cfi_def_cfa_offset 12
105 .cfi_offset 4, -12
106 .cfi_offset 5, -8
107 .cfi_offset 14, -4
108 0002 9BB0 sub sp, sp, #108
109 .LCFI4:
110 .cfi_def_cfa_offset 120
111 0004 0446 mov r4, r0
101:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
112 .loc 1 101 3 is_stmt 1 view .LVU17
113 .loc 1 101 20 is_stmt 0 view .LVU18
114 0006 0021 movs r1, #0
115 0008 1591 str r1, [sp, #84]
116 000a 1691 str r1, [sp, #88]
117 000c 1791 str r1, [sp, #92]
118 000e 1891 str r1, [sp, #96]
119 0010 1991 str r1, [sp, #100]
102:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
120 .loc 1 102 3 is_stmt 1 view .LVU19
121 .loc 1 102 28 is_stmt 0 view .LVU20
122 0012 4422 movs r2, #68
123 0014 04A8 add r0, sp, #16
124 .LVL2:
125 .loc 1 102 28 view .LVU21
126 0016 FFF7FEFF bl memset
127 .LVL3:
103:Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
128 .loc 1 103 3 is_stmt 1 view .LVU22
UI led
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ARM GAS /tmp/cclhdxfP.s page 5
v1.2
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129 .loc 1 103 10 is_stmt 0 view .LVU23
130 001a 2368 ldr r3, [r4]
131 .loc 1 103 5 view .LVU24
132 001c B3F1A04F cmp r3, #1342177280
133 0020 04D0 beq .L14
104:Src/stm32g4xx_hal_msp.c **** {
UI led
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105:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
v1.2
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106:Src/stm32g4xx_hal_msp.c ****
UI led
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107:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
v1.2
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108:Src/stm32g4xx_hal_msp.c ****
109:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks
110:Src/stm32g4xx_hal_msp.c **** */
111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
112:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
113:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
114:Src/stm32g4xx_hal_msp.c **** {
115:Src/stm32g4xx_hal_msp.c **** Error_Handler();
primo commit
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116:Src/stm32g4xx_hal_msp.c **** }
117:Src/stm32g4xx_hal_msp.c ****
v1.2
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118:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
119:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++;
120:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
121:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
122:Src/stm32g4xx_hal_msp.c **** }
123:Src/stm32g4xx_hal_msp.c ****
124:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
125:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
126:Src/stm32g4xx_hal_msp.c **** PB0 ------> ADC1_IN15
127:Src/stm32g4xx_hal_msp.c **** */
UI led
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128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = A1_Pin;
v1.2
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129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
130:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
UI led
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131:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(A1_GPIO_Port, &GPIO_InitStruct);
v1.2
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132:Src/stm32g4xx_hal_msp.c ****
133:Src/stm32g4xx_hal_msp.c **** /* ADC1 interrupt Init */
134:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
135:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
UI led
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136:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
v1.2
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137:Src/stm32g4xx_hal_msp.c ****
UI led
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138:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
v1.2
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139:Src/stm32g4xx_hal_msp.c **** }
140:Src/stm32g4xx_hal_msp.c **** else if(hadc->Instance==ADC2)
134 .loc 1 140 8 is_stmt 1 view .LVU25
135 .loc 1 140 10 is_stmt 0 view .LVU26
136 0022 4B4A ldr r2, .L21
137 0024 9342 cmp r3, r2
138 0026 3CD0 beq .L15
139 .LVL4:
140 .L5:
141:Src/stm32g4xx_hal_msp.c **** {
UI led
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142:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 0 */
v1.2
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143:Src/stm32g4xx_hal_msp.c ****
UI led
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144:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 0 */
primo commit
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145:Src/stm32g4xx_hal_msp.c ****
v1.2
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146:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks
147:Src/stm32g4xx_hal_msp.c **** */
148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
UI led
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ARM GAS /tmp/cclhdxfP.s page 6
v1.2
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149:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
150:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
151:Src/stm32g4xx_hal_msp.c **** {
152:Src/stm32g4xx_hal_msp.c **** Error_Handler();
153:Src/stm32g4xx_hal_msp.c **** }
154:Src/stm32g4xx_hal_msp.c ****
155:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
156:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++;
157:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
158:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
159:Src/stm32g4xx_hal_msp.c **** }
160:Src/stm32g4xx_hal_msp.c ****
161:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
162:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
163:Src/stm32g4xx_hal_msp.c **** PA4 ------> ADC2_IN17
164:Src/stm32g4xx_hal_msp.c **** PA5 ------> ADC2_IN13
165:Src/stm32g4xx_hal_msp.c **** PA6 ------> ADC2_IN3
166:Src/stm32g4xx_hal_msp.c **** PA7 ------> ADC2_IN4
167:Src/stm32g4xx_hal_msp.c **** */
UI led
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168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = A5_Pin|A4_Pin|A3_Pin|A2_Pin;
v1.2
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169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
170:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
171:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
172:Src/stm32g4xx_hal_msp.c ****
173:Src/stm32g4xx_hal_msp.c **** /* ADC2 DMA Init */
174:Src/stm32g4xx_hal_msp.c **** /* ADC2 Init */
175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Instance = DMA1_Channel2;
176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2;
177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
UI led
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180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
v1.2
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182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL;
183:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
184:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
185:Src/stm32g4xx_hal_msp.c **** {
186:Src/stm32g4xx_hal_msp.c **** Error_Handler();
187:Src/stm32g4xx_hal_msp.c **** }
188:Src/stm32g4xx_hal_msp.c ****
189:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2);
190:Src/stm32g4xx_hal_msp.c ****
191:Src/stm32g4xx_hal_msp.c **** /* ADC2 interrupt Init */
192:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
193:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
UI led
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194:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */
v1.2
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195:Src/stm32g4xx_hal_msp.c ****
UI led
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196:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 1 */
v1.2
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197:Src/stm32g4xx_hal_msp.c **** }
198:Src/stm32g4xx_hal_msp.c ****
199:Src/stm32g4xx_hal_msp.c **** }
141 .loc 1 199 1 view .LVU27
142 0028 1BB0 add sp, sp, #108
143 .LCFI5:
144 .cfi_remember_state
145 .cfi_def_cfa_offset 12
146 @ sp needed
UI led
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ARM GAS /tmp/cclhdxfP.s page 7
v1.2
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147 002a 30BD pop {r4, r5, pc}
148 .LVL5:
149 .L14:
150 .LCFI6:
151 .cfi_restore_state
111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
152 .loc 1 111 5 is_stmt 1 view .LVU28
111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
153 .loc 1 111 40 is_stmt 0 view .LVU29
154 002c 4FF40043 mov r3, #32768
155 0030 0493 str r3, [sp, #16]
112:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
156 .loc 1 112 5 is_stmt 1 view .LVU30
112:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
157 .loc 1 112 39 is_stmt 0 view .LVU31
158 0032 4FF00053 mov r3, #536870912
159 0036 1393 str r3, [sp, #76]
113:Src/stm32g4xx_hal_msp.c **** {
160 .loc 1 113 5 is_stmt 1 view .LVU32
113:Src/stm32g4xx_hal_msp.c **** {
161 .loc 1 113 9 is_stmt 0 view .LVU33
162 0038 04A8 add r0, sp, #16
163 003a FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
164 .LVL6:
113:Src/stm32g4xx_hal_msp.c **** {
165 .loc 1 113 8 discriminator 1 view .LVU34
166 003e 10BB cbnz r0, .L16
167 .L7:
119:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
168 .loc 1 119 5 is_stmt 1 view .LVU35
119:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
169 .loc 1 119 30 is_stmt 0 view .LVU36
170 0040 444A ldr r2, .L21+4
171 0042 1368 ldr r3, [r2]
172 0044 0133 adds r3, r3, #1
173 0046 1360 str r3, [r2]
120:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
174 .loc 1 120 5 is_stmt 1 view .LVU37
120:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
175 .loc 1 120 7 is_stmt 0 view .LVU38
176 0048 012B cmp r3, #1
177 004a 1FD0 beq .L17
178 .L8:
121:Src/stm32g4xx_hal_msp.c **** }
179 .loc 1 121 7 is_stmt 1 discriminator 1 view .LVU39
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
180 .loc 1 124 5 view .LVU40
181 .LBB4:
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
182 .loc 1 124 5 view .LVU41
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
183 .loc 1 124 5 view .LVU42
184 004c 424B ldr r3, .L21+8
185 004e DA6C ldr r2, [r3, #76]
186 0050 42F00202 orr r2, r2, #2
187 0054 DA64 str r2, [r3, #76]
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
UI led
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ARM GAS /tmp/cclhdxfP.s page 8
v1.2
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188 .loc 1 124 5 view .LVU43
189 0056 DB6C ldr r3, [r3, #76]
190 0058 03F00203 and r3, r3, #2
191 005c 0193 str r3, [sp, #4]
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
192 .loc 1 124 5 view .LVU44
193 005e 019B ldr r3, [sp, #4]
194 .LBE4:
124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
195 .loc 1 124 5 view .LVU45
128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
196 .loc 1 128 5 view .LVU46
128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
197 .loc 1 128 25 is_stmt 0 view .LVU47
198 0060 0123 movs r3, #1
199 0062 1593 str r3, [sp, #84]
129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
200 .loc 1 129 5 is_stmt 1 view .LVU48
129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
201 .loc 1 129 26 is_stmt 0 view .LVU49
202 0064 0323 movs r3, #3
203 0066 1693 str r3, [sp, #88]
UI led
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130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(A1_GPIO_Port, &GPIO_InitStruct);
v1.2
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204 .loc 1 130 5 is_stmt 1 view .LVU50
UI led
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130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(A1_GPIO_Port, &GPIO_InitStruct);
v1.2
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205 .loc 1 130 26 is_stmt 0 view .LVU51
206 0068 0024 movs r4, #0
207 .LVL7:
UI led
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130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(A1_GPIO_Port, &GPIO_InitStruct);
v1.2
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208 .loc 1 130 26 view .LVU52
209 006a 1794 str r4, [sp, #92]
131:Src/stm32g4xx_hal_msp.c ****
210 .loc 1 131 5 is_stmt 1 view .LVU53
211 006c 15A9 add r1, sp, #84
212 006e 3B48 ldr r0, .L21+12
213 0070 FFF7FEFF bl HAL_GPIO_Init
214 .LVL8:
134:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
215 .loc 1 134 5 view .LVU54
216 0074 2246 mov r2, r4
217 0076 2146 mov r1, r4
218 0078 1220 movs r0, #18
219 007a FFF7FEFF bl HAL_NVIC_SetPriority
220 .LVL9:
UI led
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135:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
v1.2
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221 .loc 1 135 5 view .LVU55
222 007e 1220 movs r0, #18
223 0080 FFF7FEFF bl HAL_NVIC_EnableIRQ
224 .LVL10:
225 0084 D0E7 b .L5
226 .LVL11:
227 .L16:
primo commit
2023-07-02 17:09:41 +02:00
115:Src/stm32g4xx_hal_msp.c **** }
v1.2
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228 .loc 1 115 7 view .LVU56
229 0086 FFF7FEFF bl Error_Handler
230 .LVL12:
231 008a D9E7 b .L7
UI led
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ARM GAS /tmp/cclhdxfP.s page 9
v1.2
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232 .L17:
121:Src/stm32g4xx_hal_msp.c **** }
233 .loc 1 121 7 view .LVU57
234 .LBB5:
121:Src/stm32g4xx_hal_msp.c **** }
235 .loc 1 121 7 view .LVU58
121:Src/stm32g4xx_hal_msp.c **** }
236 .loc 1 121 7 view .LVU59
237 008c 324B ldr r3, .L21+8
238 008e DA6C ldr r2, [r3, #76]
239 0090 42F40052 orr r2, r2, #8192
240 0094 DA64 str r2, [r3, #76]
121:Src/stm32g4xx_hal_msp.c **** }
241 .loc 1 121 7 view .LVU60
242 0096 DB6C ldr r3, [r3, #76]
243 0098 03F40053 and r3, r3, #8192
244 009c 0093 str r3, [sp]
121:Src/stm32g4xx_hal_msp.c **** }
245 .loc 1 121 7 view .LVU61
246 009e 009B ldr r3, [sp]
247 00a0 D4E7 b .L8
248 .L15:
249 .LBE5:
148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
250 .loc 1 148 5 view .LVU62
148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
251 .loc 1 148 40 is_stmt 0 view .LVU63
252 00a2 4FF40043 mov r3, #32768
253 00a6 0493 str r3, [sp, #16]
149:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
254 .loc 1 149 5 is_stmt 1 view .LVU64
149:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
255 .loc 1 149 39 is_stmt 0 view .LVU65
256 00a8 4FF00053 mov r3, #536870912
257 00ac 1393 str r3, [sp, #76]
150:Src/stm32g4xx_hal_msp.c **** {
258 .loc 1 150 5 is_stmt 1 view .LVU66
150:Src/stm32g4xx_hal_msp.c **** {
259 .loc 1 150 9 is_stmt 0 view .LVU67
260 00ae 04A8 add r0, sp, #16
261 00b0 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
262 .LVL13:
150:Src/stm32g4xx_hal_msp.c **** {
263 .loc 1 150 8 discriminator 1 view .LVU68
264 00b4 0028 cmp r0, #0
265 00b6 3AD1 bne .L18
266 .L10:
156:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
267 .loc 1 156 5 is_stmt 1 view .LVU69
156:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
268 .loc 1 156 30 is_stmt 0 view .LVU70
269 00b8 264A ldr r2, .L21+4
270 00ba 1368 ldr r3, [r2]
271 00bc 0133 adds r3, r3, #1
272 00be 1360 str r3, [r2]
157:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
273 .loc 1 157 5 is_stmt 1 view .LVU71
UI led
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ARM GAS /tmp/cclhdxfP.s page 10
v1.2
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157:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
274 .loc 1 157 7 is_stmt 0 view .LVU72
275 00c0 012B cmp r3, #1
276 00c2 37D0 beq .L19
277 .L11:
158:Src/stm32g4xx_hal_msp.c **** }
278 .loc 1 158 7 is_stmt 1 discriminator 1 view .LVU73
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
279 .loc 1 161 5 view .LVU74
280 .LBB6:
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
281 .loc 1 161 5 view .LVU75
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
282 .loc 1 161 5 view .LVU76
283 00c4 244B ldr r3, .L21+8
284 00c6 DA6C ldr r2, [r3, #76]
285 00c8 42F00102 orr r2, r2, #1
286 00cc DA64 str r2, [r3, #76]
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
287 .loc 1 161 5 view .LVU77
288 00ce DB6C ldr r3, [r3, #76]
289 00d0 03F00103 and r3, r3, #1
290 00d4 0393 str r3, [sp, #12]
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
291 .loc 1 161 5 view .LVU78
292 00d6 039B ldr r3, [sp, #12]
293 .LBE6:
161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
294 .loc 1 161 5 view .LVU79
168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
295 .loc 1 168 5 view .LVU80
168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
296 .loc 1 168 25 is_stmt 0 view .LVU81
297 00d8 F023 movs r3, #240
298 00da 1593 str r3, [sp, #84]
169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
299 .loc 1 169 5 is_stmt 1 view .LVU82
169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
300 .loc 1 169 26 is_stmt 0 view .LVU83
301 00dc 0323 movs r3, #3
302 00de 1693 str r3, [sp, #88]
170:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
303 .loc 1 170 5 is_stmt 1 view .LVU84
170:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
304 .loc 1 170 26 is_stmt 0 view .LVU85
305 00e0 0025 movs r5, #0
306 00e2 1795 str r5, [sp, #92]
171:Src/stm32g4xx_hal_msp.c ****
307 .loc 1 171 5 is_stmt 1 view .LVU86
308 00e4 15A9 add r1, sp, #84
309 00e6 4FF09040 mov r0, #1207959552
310 00ea FFF7FEFF bl HAL_GPIO_Init
311 .LVL14:
175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2;
312 .loc 1 175 5 view .LVU87
175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2;
313 .loc 1 175 24 is_stmt 0 view .LVU88
UI led
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ARM GAS /tmp/cclhdxfP.s page 11
v1.2
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314 00ee 1C48 ldr r0, .L21+16
315 00f0 1C4B ldr r3, .L21+20
316 00f2 0360 str r3, [r0]
176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
317 .loc 1 176 5 is_stmt 1 view .LVU89
176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
318 .loc 1 176 28 is_stmt 0 view .LVU90
319 00f4 2423 movs r3, #36
320 00f6 4360 str r3, [r0, #4]
177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
321 .loc 1 177 5 is_stmt 1 view .LVU91
177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
322 .loc 1 177 30 is_stmt 0 view .LVU92
323 00f8 8560 str r5, [r0, #8]
178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
324 .loc 1 178 5 is_stmt 1 view .LVU93
178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
325 .loc 1 178 30 is_stmt 0 view .LVU94
326 00fa C560 str r5, [r0, #12]
UI led
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179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
v1.2
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327 .loc 1 179 5 is_stmt 1 view .LVU95
UI led
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179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
v1.2
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328 .loc 1 179 27 is_stmt 0 view .LVU96
329 00fc 8023 movs r3, #128
330 00fe 0361 str r3, [r0, #16]
UI led
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180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
v1.2
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331 .loc 1 180 5 is_stmt 1 view .LVU97
UI led
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180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
v1.2
2025-01-28 19:01:22 +01:00
332 .loc 1 180 40 is_stmt 0 view .LVU98
UI led
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333 0100 4FF40073 mov r3, #512
v1.2
2025-01-28 19:01:22 +01:00
334 0104 4361 str r3, [r0, #20]
181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL;
335 .loc 1 181 5 is_stmt 1 view .LVU99
181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL;
336 .loc 1 181 37 is_stmt 0 view .LVU100
UI led
2025-06-28 00:58:29 +02:00
337 0106 4FF40063 mov r3, #2048
v1.2
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338 010a 8361 str r3, [r0, #24]
182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
339 .loc 1 182 5 is_stmt 1 view .LVU101
182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
340 .loc 1 182 25 is_stmt 0 view .LVU102
341 010c C561 str r5, [r0, #28]
183:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
342 .loc 1 183 5 is_stmt 1 view .LVU103
183:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
343 .loc 1 183 29 is_stmt 0 view .LVU104
344 010e 0562 str r5, [r0, #32]
184:Src/stm32g4xx_hal_msp.c **** {
345 .loc 1 184 5 is_stmt 1 view .LVU105
184:Src/stm32g4xx_hal_msp.c **** {
346 .loc 1 184 9 is_stmt 0 view .LVU106
347 0110 FFF7FEFF bl HAL_DMA_Init
348 .LVL15:
184:Src/stm32g4xx_hal_msp.c **** {
349 .loc 1 184 8 discriminator 1 view .LVU107
350 0114 C8B9 cbnz r0, .L20
351 .L12:
UI led
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ARM GAS /tmp/cclhdxfP.s page 12
v1.2
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189:Src/stm32g4xx_hal_msp.c ****
352 .loc 1 189 5 is_stmt 1 view .LVU108
189:Src/stm32g4xx_hal_msp.c ****
353 .loc 1 189 5 view .LVU109
354 0116 124B ldr r3, .L21+16
355 0118 6365 str r3, [r4, #84]
primo commit
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189:Src/stm32g4xx_hal_msp.c ****
v1.2
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356 .loc 1 189 5 view .LVU110
357 011a 9C62 str r4, [r3, #40]
189:Src/stm32g4xx_hal_msp.c ****
358 .loc 1 189 5 view .LVU111
192:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
359 .loc 1 192 5 view .LVU112
360 011c 0022 movs r2, #0
361 011e 1146 mov r1, r2
362 0120 1220 movs r0, #18
363 0122 FFF7FEFF bl HAL_NVIC_SetPriority
364 .LVL16:
UI led
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193:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */
v1.2
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365 .loc 1 193 5 view .LVU113
366 0126 1220 movs r0, #18
367 0128 FFF7FEFF bl HAL_NVIC_EnableIRQ
368 .LVL17:
369 .loc 1 199 1 is_stmt 0 view .LVU114
370 012c 7CE7 b .L5
371 .L18:
152:Src/stm32g4xx_hal_msp.c **** }
372 .loc 1 152 7 is_stmt 1 view .LVU115
373 012e FFF7FEFF bl Error_Handler
374 .LVL18:
375 0132 C1E7 b .L10
376 .L19:
158:Src/stm32g4xx_hal_msp.c **** }
377 .loc 1 158 7 view .LVU116
378 .LBB7:
158:Src/stm32g4xx_hal_msp.c **** }
379 .loc 1 158 7 view .LVU117
158:Src/stm32g4xx_hal_msp.c **** }
380 .loc 1 158 7 view .LVU118
381 0134 084B ldr r3, .L21+8
382 0136 DA6C ldr r2, [r3, #76]
383 0138 42F40052 orr r2, r2, #8192
384 013c DA64 str r2, [r3, #76]
158:Src/stm32g4xx_hal_msp.c **** }
385 .loc 1 158 7 view .LVU119
386 013e DB6C ldr r3, [r3, #76]
387 0140 03F40053 and r3, r3, #8192
388 0144 0293 str r3, [sp, #8]
158:Src/stm32g4xx_hal_msp.c **** }
389 .loc 1 158 7 view .LVU120
390 0146 029B ldr r3, [sp, #8]
391 0148 BCE7 b .L11
392 .L20:
393 .LBE7:
186:Src/stm32g4xx_hal_msp.c **** }
394 .loc 1 186 7 view .LVU121
395 014a FFF7FEFF bl Error_Handler
UI led
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ARM GAS /tmp/cclhdxfP.s page 13
v1.2
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396 .LVL19:
397 014e E2E7 b .L12
398 .L22:
399 .align 2
400 .L21:
401 0150 00010050 .word 1342177536
402 0154 00000000 .word HAL_RCC_ADC12_CLK_ENABLED
403 0158 00100240 .word 1073876992
404 015c 00040048 .word 1207960576
405 0160 00000000 .word hdma_adc2
406 0164 1C000240 .word 1073872924
407 .cfi_endproc
408 .LFE330:
410 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
411 .align 1
412 .global HAL_ADC_MspDeInit
413 .syntax unified
414 .thumb
415 .thumb_func
417 HAL_ADC_MspDeInit:
418 .LVL20:
419 .LFB331:
200:Src/stm32g4xx_hal_msp.c ****
201:Src/stm32g4xx_hal_msp.c **** /**
UI led
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202:Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
203:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
204:Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
205:Src/stm32g4xx_hal_msp.c **** * @retval None
206:Src/stm32g4xx_hal_msp.c **** */
v1.2
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207:Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
208:Src/stm32g4xx_hal_msp.c **** {
420 .loc 1 208 1 view -0
421 .cfi_startproc
422 @ args = 0, pretend = 0, frame = 0
423 @ frame_needed = 0, uses_anonymous_args = 0
424 .loc 1 208 1 is_stmt 0 view .LVU123
425 0000 10B5 push {r4, lr}
426 .LCFI7:
427 .cfi_def_cfa_offset 8
428 .cfi_offset 4, -8
429 .cfi_offset 14, -4
209:Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
430 .loc 1 209 3 is_stmt 1 view .LVU124
431 .loc 1 209 10 is_stmt 0 view .LVU125
432 0002 0368 ldr r3, [r0]
433 .loc 1 209 5 view .LVU126
434 0004 B3F1A04F cmp r3, #1342177280
435 0008 04D0 beq .L29
436 000a 0446 mov r4, r0
210:Src/stm32g4xx_hal_msp.c **** {
UI led
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211:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
v1.2
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212:Src/stm32g4xx_hal_msp.c ****
UI led
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213:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
v1.2
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214:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
215:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--;
216:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
217:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
UI led
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ARM GAS /tmp/cclhdxfP.s page 14
v1.2
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218:Src/stm32g4xx_hal_msp.c **** }
primo commit
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219:Src/stm32g4xx_hal_msp.c ****
v1.2
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220:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration
221:Src/stm32g4xx_hal_msp.c **** PB0 ------> ADC1_IN15
222:Src/stm32g4xx_hal_msp.c **** */
UI led
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223:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(A1_GPIO_Port, A1_Pin);
primo commit
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224:Src/stm32g4xx_hal_msp.c ****
v1.2
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225:Src/stm32g4xx_hal_msp.c **** /* ADC1 interrupt DeInit */
UI led
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226:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */
v1.2
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227:Src/stm32g4xx_hal_msp.c **** /**
228:Src/stm32g4xx_hal_msp.c **** * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
229:Src/stm32g4xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
230:Src/stm32g4xx_hal_msp.c **** */
231:Src/stm32g4xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
UI led
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232:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1:ADC1_2_IRQn disable */
v1.2
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233:Src/stm32g4xx_hal_msp.c ****
UI led
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234:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
v1.2
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235:Src/stm32g4xx_hal_msp.c ****
UI led
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236:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
v1.2
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237:Src/stm32g4xx_hal_msp.c **** }
238:Src/stm32g4xx_hal_msp.c **** else if(hadc->Instance==ADC2)
437 .loc 1 238 8 is_stmt 1 view .LVU127
438 .loc 1 238 10 is_stmt 0 view .LVU128
439 000c 124A ldr r2, .L31
440 000e 9342 cmp r3, r2
441 0010 0FD0 beq .L30
442 .LVL21:
443 .L23:
239:Src/stm32g4xx_hal_msp.c **** {
UI led
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240:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 0 */
v1.2
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241:Src/stm32g4xx_hal_msp.c ****
UI led
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242:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 0 */
v1.2
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243:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
244:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--;
245:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
246:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
primo commit
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247:Src/stm32g4xx_hal_msp.c **** }
v1.2
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248:Src/stm32g4xx_hal_msp.c ****
249:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration
250:Src/stm32g4xx_hal_msp.c **** PA4 ------> ADC2_IN17
251:Src/stm32g4xx_hal_msp.c **** PA5 ------> ADC2_IN13
252:Src/stm32g4xx_hal_msp.c **** PA6 ------> ADC2_IN3
253:Src/stm32g4xx_hal_msp.c **** PA7 ------> ADC2_IN4
254:Src/stm32g4xx_hal_msp.c **** */
UI led
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255:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, A5_Pin|A4_Pin|A3_Pin|A2_Pin);
v1.2
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256:Src/stm32g4xx_hal_msp.c ****
257:Src/stm32g4xx_hal_msp.c **** /* ADC2 DMA DeInit */
258:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle);
259:Src/stm32g4xx_hal_msp.c ****
260:Src/stm32g4xx_hal_msp.c **** /* ADC2 interrupt DeInit */
UI led
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261:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */
v1.2
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262:Src/stm32g4xx_hal_msp.c **** /**
263:Src/stm32g4xx_hal_msp.c **** * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
264:Src/stm32g4xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
265:Src/stm32g4xx_hal_msp.c **** */
266:Src/stm32g4xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
UI led
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267:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2:ADC1_2_IRQn disable */
ARM GAS /tmp/cclhdxfP.s page 15
v1.2
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268:Src/stm32g4xx_hal_msp.c ****
UI led
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269:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */
v1.2
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270:Src/stm32g4xx_hal_msp.c ****
UI led
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271:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 1 */
v1.2
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272:Src/stm32g4xx_hal_msp.c **** }
273:Src/stm32g4xx_hal_msp.c ****
274:Src/stm32g4xx_hal_msp.c **** }
444 .loc 1 274 1 view .LVU129
445 0012 10BD pop {r4, pc}
446 .LVL22:
447 .L29:
215:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
448 .loc 1 215 5 is_stmt 1 view .LVU130
215:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
449 .loc 1 215 30 is_stmt 0 view .LVU131
450 0014 114A ldr r2, .L31+4
451 0016 1368 ldr r3, [r2]
452 0018 013B subs r3, r3, #1
453 001a 1360 str r3, [r2]
216:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
454 .loc 1 216 5 is_stmt 1 view .LVU132
216:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
455 .loc 1 216 7 is_stmt 0 view .LVU133
456 001c 23B9 cbnz r3, .L25
217:Src/stm32g4xx_hal_msp.c **** }
457 .loc 1 217 7 is_stmt 1 view .LVU134
458 001e 104A ldr r2, .L31+8
459 0020 D36C ldr r3, [r2, #76]
460 0022 23F40053 bic r3, r3, #8192
461 0026 D364 str r3, [r2, #76]
462 .L25:
223:Src/stm32g4xx_hal_msp.c ****
463 .loc 1 223 5 view .LVU135
464 0028 0121 movs r1, #1
465 002a 0E48 ldr r0, .L31+12
466 .LVL23:
223:Src/stm32g4xx_hal_msp.c ****
467 .loc 1 223 5 is_stmt 0 view .LVU136
468 002c FFF7FEFF bl HAL_GPIO_DeInit
469 .LVL24:
470 0030 EFE7 b .L23
471 .LVL25:
472 .L30:
244:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
473 .loc 1 244 5 is_stmt 1 view .LVU137
244:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
474 .loc 1 244 30 is_stmt 0 view .LVU138
475 0032 0A4A ldr r2, .L31+4
476 0034 1368 ldr r3, [r2]
477 0036 013B subs r3, r3, #1
478 0038 1360 str r3, [r2]
245:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
479 .loc 1 245 5 is_stmt 1 view .LVU139
245:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
480 .loc 1 245 7 is_stmt 0 view .LVU140
481 003a 23B9 cbnz r3, .L27
246:Src/stm32g4xx_hal_msp.c **** }
UI led
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ARM GAS /tmp/cclhdxfP.s page 16
v1.2
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482 .loc 1 246 7 is_stmt 1 view .LVU141
483 003c 084A ldr r2, .L31+8
484 003e D36C ldr r3, [r2, #76]
485 0040 23F40053 bic r3, r3, #8192
486 0044 D364 str r3, [r2, #76]
487 .L27:
255:Src/stm32g4xx_hal_msp.c ****
488 .loc 1 255 5 view .LVU142
489 0046 F021 movs r1, #240
490 0048 4FF09040 mov r0, #1207959552
491 .LVL26:
255:Src/stm32g4xx_hal_msp.c ****
492 .loc 1 255 5 is_stmt 0 view .LVU143
493 004c FFF7FEFF bl HAL_GPIO_DeInit
494 .LVL27:
258:Src/stm32g4xx_hal_msp.c ****
495 .loc 1 258 5 is_stmt 1 view .LVU144
496 0050 606D ldr r0, [r4, #84]
497 0052 FFF7FEFF bl HAL_DMA_DeInit
498 .LVL28:
499 .loc 1 274 1 is_stmt 0 view .LVU145
500 0056 DCE7 b .L23
501 .L32:
502 .align 2
503 .L31:
504 0058 00010050 .word 1342177536
505 005c 00000000 .word HAL_RCC_ADC12_CLK_ENABLED
506 0060 00100240 .word 1073876992
507 0064 00040048 .word 1207960576
508 .cfi_endproc
509 .LFE331:
511 .section .text.HAL_I2C_MspInit,"ax",%progbits
512 .align 1
513 .global HAL_I2C_MspInit
514 .syntax unified
515 .thumb
516 .thumb_func
518 HAL_I2C_MspInit:
519 .LVL29:
520 .LFB332:
275:Src/stm32g4xx_hal_msp.c ****
276:Src/stm32g4xx_hal_msp.c **** /**
UI led
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277:Src/stm32g4xx_hal_msp.c **** * @brief I2C MSP Initialization
278:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
279:Src/stm32g4xx_hal_msp.c **** * @param hi2c: I2C handle pointer
280:Src/stm32g4xx_hal_msp.c **** * @retval None
281:Src/stm32g4xx_hal_msp.c **** */
v1.2
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282:Src/stm32g4xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
283:Src/stm32g4xx_hal_msp.c **** {
521 .loc 1 283 1 is_stmt 1 view -0
522 .cfi_startproc
523 @ args = 0, pretend = 0, frame = 104
524 @ frame_needed = 0, uses_anonymous_args = 0
525 .loc 1 283 1 is_stmt 0 view .LVU147
UI led
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526 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
v1.2
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527 .LCFI8:
UI led
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528 .cfi_def_cfa_offset 24
ARM GAS /tmp/cclhdxfP.s page 17
529 .cfi_offset 4, -24
530 .cfi_offset 5, -20
531 .cfi_offset 6, -16
532 .cfi_offset 7, -12
533 .cfi_offset 8, -8
534 .cfi_offset 14, -4
535 0004 9AB0 sub sp, sp, #104
536 .LCFI9:
537 .cfi_def_cfa_offset 128
538 0006 0446 mov r4, r0
v1.2
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284:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
UI led
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539 .loc 1 284 3 is_stmt 1 view .LVU148
540 .loc 1 284 20 is_stmt 0 view .LVU149
541 0008 0021 movs r1, #0
542 000a 1591 str r1, [sp, #84]
543 000c 1691 str r1, [sp, #88]
544 000e 1791 str r1, [sp, #92]
545 0010 1891 str r1, [sp, #96]
546 0012 1991 str r1, [sp, #100]
v1.2
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285:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
UI led
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547 .loc 1 285 3 is_stmt 1 view .LVU150
548 .loc 1 285 28 is_stmt 0 view .LVU151
549 0014 4422 movs r2, #68
550 0016 04A8 add r0, sp, #16
551 .LVL30:
552 .loc 1 285 28 view .LVU152
553 0018 FFF7FEFF bl memset
554 .LVL31:
v1.2
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286:Src/stm32g4xx_hal_msp.c **** if(hi2c->Instance==I2C1)
UI led
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555 .loc 1 286 3 is_stmt 1 view .LVU153
556 .loc 1 286 10 is_stmt 0 view .LVU154
557 001c 2268 ldr r2, [r4]
558 .loc 1 286 5 view .LVU155
559 001e 254B ldr r3, .L39
560 0020 9A42 cmp r2, r3
561 0022 02D0 beq .L37
562 .LVL32:
563 .L33:
v1.2
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287:Src/stm32g4xx_hal_msp.c **** {
UI led
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288:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */
v1.2
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289:Src/stm32g4xx_hal_msp.c ****
UI led
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290:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */
v1.2
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291:Src/stm32g4xx_hal_msp.c ****
292:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks
293:Src/stm32g4xx_hal_msp.c **** */
294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1;
295:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
296:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
297:Src/stm32g4xx_hal_msp.c **** {
298:Src/stm32g4xx_hal_msp.c **** Error_Handler();
299:Src/stm32g4xx_hal_msp.c **** }
primo commit
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300:Src/stm32g4xx_hal_msp.c ****
v1.2
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301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
302:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
303:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
304:Src/stm32g4xx_hal_msp.c **** PA15 ------> I2C1_SCL
305:Src/stm32g4xx_hal_msp.c **** PB7 ------> I2C1_SDA
UI led
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ARM GAS /tmp/cclhdxfP.s page 18
v1.2
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UI led
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306:Src/stm32g4xx_hal_msp.c **** */
v1.2
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307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15;
308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
311:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
312:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
313:Src/stm32g4xx_hal_msp.c ****
314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_7;
315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
318:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
319:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
320:Src/stm32g4xx_hal_msp.c ****
321:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
322:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
323:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
324:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
325:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */
primo commit
2023-07-02 17:09:41 +02:00
326:Src/stm32g4xx_hal_msp.c ****
v1.2
2025-01-28 19:01:22 +01:00
327:Src/stm32g4xx_hal_msp.c **** }
328:Src/stm32g4xx_hal_msp.c ****
329:Src/stm32g4xx_hal_msp.c **** }
UI led
2025-06-28 00:58:29 +02:00
564 .loc 1 329 1 view .LVU156
565 0024 1AB0 add sp, sp, #104
566 .LCFI10:
567 .cfi_remember_state
568 .cfi_def_cfa_offset 24
569 @ sp needed
570 0026 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
571 .LVL33:
572 .L37:
573 .LCFI11:
574 .cfi_restore_state
v1.2
2025-01-28 19:01:22 +01:00
294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
UI led
2025-06-28 00:58:29 +02:00
575 .loc 1 294 5 is_stmt 1 view .LVU157
v1.2
2025-01-28 19:01:22 +01:00
294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
UI led
2025-06-28 00:58:29 +02:00
576 .loc 1 294 40 is_stmt 0 view .LVU158
577 002a 4023 movs r3, #64
578 002c 0493 str r3, [sp, #16]
v1.2
2025-01-28 19:01:22 +01:00
295:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
UI led
2025-06-28 00:58:29 +02:00
579 .loc 1 295 5 is_stmt 1 view .LVU159
v1.2
2025-01-28 19:01:22 +01:00
296:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
580 .loc 1 296 5 view .LVU160
v1.2
2025-01-28 19:01:22 +01:00
296:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
581 .loc 1 296 9 is_stmt 0 view .LVU161
582 002e 04A8 add r0, sp, #16
583 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
584 .LVL34:
v1.2
2025-01-28 19:01:22 +01:00
296:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
585 .loc 1 296 8 discriminator 1 view .LVU162
586 0034 0028 cmp r0, #0
587 0036 39D1 bne .L38
588 .L35:
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
589 .loc 1 301 5 is_stmt 1 view .LVU163
ARM GAS /tmp/cclhdxfP.s page 19
v1.2
2025-01-28 19:01:22 +01:00
UI led
2025-06-28 00:58:29 +02:00
590 .LBB8:
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
591 .loc 1 301 5 view .LVU164
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
592 .loc 1 301 5 view .LVU165
593 0038 1F4C ldr r4, .L39+4
594 .LVL35:
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
595 .loc 1 301 5 is_stmt 0 view .LVU166
596 003a E36C ldr r3, [r4, #76]
597 003c 43F00103 orr r3, r3, #1
598 0040 E364 str r3, [r4, #76]
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
599 .loc 1 301 5 is_stmt 1 view .LVU167
600 0042 E36C ldr r3, [r4, #76]
601 0044 03F00103 and r3, r3, #1
602 0048 0193 str r3, [sp, #4]
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
603 .loc 1 301 5 view .LVU168
604 004a 019B ldr r3, [sp, #4]
605 .LBE8:
v1.2
2025-01-28 19:01:22 +01:00
301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
UI led
2025-06-28 00:58:29 +02:00
606 .loc 1 301 5 view .LVU169
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
607 .loc 1 302 5 view .LVU170
608 .LBB9:
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
609 .loc 1 302 5 view .LVU171
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
610 .loc 1 302 5 view .LVU172
611 004c E36C ldr r3, [r4, #76]
612 004e 43F00203 orr r3, r3, #2
613 0052 E364 str r3, [r4, #76]
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
614 .loc 1 302 5 view .LVU173
615 0054 E36C ldr r3, [r4, #76]
616 0056 03F00203 and r3, r3, #2
617 005a 0293 str r3, [sp, #8]
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
618 .loc 1 302 5 view .LVU174
619 005c 029B ldr r3, [sp, #8]
620 .LBE9:
v1.2
2025-01-28 19:01:22 +01:00
302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
UI led
2025-06-28 00:58:29 +02:00
621 .loc 1 302 5 view .LVU175
v1.2
2025-01-28 19:01:22 +01:00
307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
UI led
2025-06-28 00:58:29 +02:00
622 .loc 1 307 5 view .LVU176
v1.2
2025-01-28 19:01:22 +01:00
307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
UI led
2025-06-28 00:58:29 +02:00
623 .loc 1 307 25 is_stmt 0 view .LVU177
624 005e 4FF40043 mov r3, #32768
625 0062 1593 str r3, [sp, #84]
v1.2
2025-01-28 19:01:22 +01:00
308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
UI led
2025-06-28 00:58:29 +02:00
626 .loc 1 308 5 is_stmt 1 view .LVU178
v1.2
2025-01-28 19:01:22 +01:00
308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
UI led
2025-06-28 00:58:29 +02:00
627 .loc 1 308 26 is_stmt 0 view .LVU179
628 0064 4FF01208 mov r8, #18
629 0068 CDF85880 str r8, [sp, #88]
v1.2
2025-01-28 19:01:22 +01:00
309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
UI led
2025-06-28 00:58:29 +02:00
ARM GAS /tmp/cclhdxfP.s page 20
v1.2
2025-01-28 19:01:22 +01:00
UI led
2025-06-28 00:58:29 +02:00
630 .loc 1 309 5 is_stmt 1 view .LVU180
v1.2
2025-01-28 19:01:22 +01:00
309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
UI led
2025-06-28 00:58:29 +02:00
631 .loc 1 309 26 is_stmt 0 view .LVU181
632 006c 0025 movs r5, #0
633 006e 1795 str r5, [sp, #92]
v1.2
2025-01-28 19:01:22 +01:00
310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
UI led
2025-06-28 00:58:29 +02:00
634 .loc 1 310 5 is_stmt 1 view .LVU182
v1.2
2025-01-28 19:01:22 +01:00
310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
UI led
2025-06-28 00:58:29 +02:00
635 .loc 1 310 27 is_stmt 0 view .LVU183
636 0070 1895 str r5, [sp, #96]
v1.2
2025-01-28 19:01:22 +01:00
311:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
UI led
2025-06-28 00:58:29 +02:00
637 .loc 1 311 5 is_stmt 1 view .LVU184
v1.2
2025-01-28 19:01:22 +01:00
311:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
UI led
2025-06-28 00:58:29 +02:00
638 .loc 1 311 31 is_stmt 0 view .LVU185
639 0072 0427 movs r7, #4
640 0074 1997 str r7, [sp, #100]
v1.2
2025-01-28 19:01:22 +01:00
312:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
641 .loc 1 312 5 is_stmt 1 view .LVU186
642 0076 15AE add r6, sp, #84
643 0078 3146 mov r1, r6
644 007a 4FF09040 mov r0, #1207959552
645 007e FFF7FEFF bl HAL_GPIO_Init
646 .LVL36:
v1.2
2025-01-28 19:01:22 +01:00
314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
UI led
2025-06-28 00:58:29 +02:00
647 .loc 1 314 5 view .LVU187
v1.2
2025-01-28 19:01:22 +01:00
314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
UI led
2025-06-28 00:58:29 +02:00
648 .loc 1 314 25 is_stmt 0 view .LVU188
649 0082 8023 movs r3, #128
650 0084 1593 str r3, [sp, #84]
v1.2
2025-01-28 19:01:22 +01:00
315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
UI led
2025-06-28 00:58:29 +02:00
651 .loc 1 315 5 is_stmt 1 view .LVU189
v1.2
2025-01-28 19:01:22 +01:00
315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
UI led
2025-06-28 00:58:29 +02:00
652 .loc 1 315 26 is_stmt 0 view .LVU190
653 0086 CDF85880 str r8, [sp, #88]
v1.2
2025-01-28 19:01:22 +01:00
316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
UI led
2025-06-28 00:58:29 +02:00
654 .loc 1 316 5 is_stmt 1 view .LVU191
v1.2
2025-01-28 19:01:22 +01:00
316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
UI led
2025-06-28 00:58:29 +02:00
655 .loc 1 316 26 is_stmt 0 view .LVU192
656 008a 1795 str r5, [sp, #92]
v1.2
2025-01-28 19:01:22 +01:00
317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
UI led
2025-06-28 00:58:29 +02:00
657 .loc 1 317 5 is_stmt 1 view .LVU193
v1.2
2025-01-28 19:01:22 +01:00
317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
UI led
2025-06-28 00:58:29 +02:00
658 .loc 1 317 27 is_stmt 0 view .LVU194
659 008c 1895 str r5, [sp, #96]
v1.2
2025-01-28 19:01:22 +01:00
318:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
UI led
2025-06-28 00:58:29 +02:00
660 .loc 1 318 5 is_stmt 1 view .LVU195
v1.2
2025-01-28 19:01:22 +01:00
318:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
UI led
2025-06-28 00:58:29 +02:00
661 .loc 1 318 31 is_stmt 0 view .LVU196
662 008e 1997 str r7, [sp, #100]
v1.2
2025-01-28 19:01:22 +01:00
319:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
663 .loc 1 319 5 is_stmt 1 view .LVU197
664 0090 3146 mov r1, r6
665 0092 0A48 ldr r0, .L39+8
666 0094 FFF7FEFF bl HAL_GPIO_Init
667 .LVL37:
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
668 .loc 1 322 5 view .LVU198
ARM GAS /tmp/cclhdxfP.s page 21
669 .LBB10:
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
670 .loc 1 322 5 view .LVU199
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
671 .loc 1 322 5 view .LVU200
672 0098 A36D ldr r3, [r4, #88]
673 009a 43F40013 orr r3, r3, #2097152
674 009e A365 str r3, [r4, #88]
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
675 .loc 1 322 5 view .LVU201
676 00a0 A36D ldr r3, [r4, #88]
677 00a2 03F40013 and r3, r3, #2097152
678 00a6 0393 str r3, [sp, #12]
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
679 .loc 1 322 5 view .LVU202
680 00a8 039B ldr r3, [sp, #12]
681 .LBE10:
322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
682 .loc 1 322 5 discriminator 1 view .LVU203
683 .loc 1 329 1 is_stmt 0 view .LVU204
684 00aa BBE7 b .L33
685 .LVL38:
686 .L38:
v1.2
2025-01-28 19:01:22 +01:00
298:Src/stm32g4xx_hal_msp.c **** }
UI led
2025-06-28 00:58:29 +02:00
687 .loc 1 298 7 is_stmt 1 view .LVU205
688 00ac FFF7FEFF bl Error_Handler
689 .LVL39:
690 00b0 C2E7 b .L35
691 .L40:
692 00b2 00BF .align 2
693 .L39:
694 00b4 00540040 .word 1073763328
695 00b8 00100240 .word 1073876992
696 00bc 00040048 .word 1207960576
697 .cfi_endproc
698 .LFE332:
700 .section .text.HAL_I2C_MspDeInit,"ax",%progbits
701 .align 1
702 .global HAL_I2C_MspDeInit
703 .syntax unified
704 .thumb
705 .thumb_func
707 HAL_I2C_MspDeInit:
708 .LVL40:
709 .LFB333:
v1.2
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330:Src/stm32g4xx_hal_msp.c ****
331:Src/stm32g4xx_hal_msp.c **** /**
UI led
2025-06-28 00:58:29 +02:00
332:Src/stm32g4xx_hal_msp.c **** * @brief I2C MSP De-Initialization
333:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
334:Src/stm32g4xx_hal_msp.c **** * @param hi2c: I2C handle pointer
335:Src/stm32g4xx_hal_msp.c **** * @retval None
336:Src/stm32g4xx_hal_msp.c **** */
v1.2
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337:Src/stm32g4xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
338:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
710 .loc 1 338 1 view -0
711 .cfi_startproc
712 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/cclhdxfP.s page 22
713 @ frame_needed = 0, uses_anonymous_args = 0
714 .loc 1 338 1 is_stmt 0 view .LVU207
715 0000 08B5 push {r3, lr}
716 .LCFI12:
717 .cfi_def_cfa_offset 8
718 .cfi_offset 3, -8
719 .cfi_offset 14, -4
v1.2
2025-01-28 19:01:22 +01:00
339:Src/stm32g4xx_hal_msp.c **** if(hi2c->Instance==I2C1)
UI led
2025-06-28 00:58:29 +02:00
720 .loc 1 339 3 is_stmt 1 view .LVU208
721 .loc 1 339 10 is_stmt 0 view .LVU209
722 0002 0268 ldr r2, [r0]
723 .loc 1 339 5 view .LVU210
724 0004 094B ldr r3, .L45
725 0006 9A42 cmp r2, r3
726 0008 00D0 beq .L44
727 .LVL41:
728 .L41:
v1.2
2025-01-28 19:01:22 +01:00
340:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
341:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */
v1.2
2025-01-28 19:01:22 +01:00
342:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
343:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */
v1.2
2025-01-28 19:01:22 +01:00
344:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
345:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE();
346:Src/stm32g4xx_hal_msp.c ****
347:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration
348:Src/stm32g4xx_hal_msp.c **** PA15 ------> I2C1_SCL
349:Src/stm32g4xx_hal_msp.c **** PB7 ------> I2C1_SDA
350:Src/stm32g4xx_hal_msp.c **** */
351:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15);
primo commit
2023-07-02 17:09:41 +02:00
352:Src/stm32g4xx_hal_msp.c ****
v1.2
2025-01-28 19:01:22 +01:00
353:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
primo commit
2023-07-02 17:09:41 +02:00
354:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
355:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
356:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
357:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
358:Src/stm32g4xx_hal_msp.c **** }
359:Src/stm32g4xx_hal_msp.c ****
360:Src/stm32g4xx_hal_msp.c **** }
UI led
2025-06-28 00:58:29 +02:00
729 .loc 1 360 1 view .LVU211
730 000a 08BD pop {r3, pc}
731 .LVL42:
732 .L44:
v1.2
2025-01-28 19:01:22 +01:00
345:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
733 .loc 1 345 5 is_stmt 1 view .LVU212
734 000c 084A ldr r2, .L45+4
735 000e 936D ldr r3, [r2, #88]
736 0010 23F40013 bic r3, r3, #2097152
737 0014 9365 str r3, [r2, #88]
v1.2
2025-01-28 19:01:22 +01:00
351:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
738 .loc 1 351 5 view .LVU213
739 0016 4FF40041 mov r1, #32768
740 001a 4FF09040 mov r0, #1207959552
741 .LVL43:
v1.2
2025-01-28 19:01:22 +01:00
351:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
742 .loc 1 351 5 is_stmt 0 view .LVU214
743 001e FFF7FEFF bl HAL_GPIO_DeInit
744 .LVL44:
ARM GAS /tmp/cclhdxfP.s page 23
v1.2
2025-01-28 19:01:22 +01:00
353:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
745 .loc 1 353 5 is_stmt 1 view .LVU215
746 0022 8021 movs r1, #128
747 0024 0348 ldr r0, .L45+8
748 0026 FFF7FEFF bl HAL_GPIO_DeInit
749 .LVL45:
750 .loc 1 360 1 is_stmt 0 view .LVU216
751 002a EEE7 b .L41
752 .L46:
753 .align 2
754 .L45:
755 002c 00540040 .word 1073763328
756 0030 00100240 .word 1073876992
757 0034 00040048 .word 1207960576
758 .cfi_endproc
759 .LFE333:
761 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
762 .align 1
763 .global HAL_TIM_Base_MspInit
764 .syntax unified
765 .thumb
766 .thumb_func
768 HAL_TIM_Base_MspInit:
769 .LVL46:
770 .LFB334:
v1.2
2025-01-28 19:01:22 +01:00
361:Src/stm32g4xx_hal_msp.c ****
362:Src/stm32g4xx_hal_msp.c **** /**
UI led
2025-06-28 00:58:29 +02:00
363:Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
364:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
365:Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
366:Src/stm32g4xx_hal_msp.c **** * @retval None
367:Src/stm32g4xx_hal_msp.c **** */
v1.2
2025-01-28 19:01:22 +01:00
368:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
369:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
771 .loc 1 369 1 is_stmt 1 view -0
772 .cfi_startproc
773 @ args = 0, pretend = 0, frame = 16
774 @ frame_needed = 0, uses_anonymous_args = 0
775 .loc 1 369 1 is_stmt 0 view .LVU218
776 0000 00B5 push {lr}
777 .LCFI13:
778 .cfi_def_cfa_offset 4
779 .cfi_offset 14, -4
780 0002 85B0 sub sp, sp, #20
781 .LCFI14:
782 .cfi_def_cfa_offset 24
v1.2
2025-01-28 19:01:22 +01:00
370:Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM2)
UI led
2025-06-28 00:58:29 +02:00
783 .loc 1 370 3 is_stmt 1 view .LVU219
784 .loc 1 370 15 is_stmt 0 view .LVU220
785 0004 0368 ldr r3, [r0]
786 .loc 1 370 5 view .LVU221
787 0006 B3F1804F cmp r3, #1073741824
788 000a 08D0 beq .L52
v1.2
2025-01-28 19:01:22 +01:00
371:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
372:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */
primo commit
2023-07-02 17:09:41 +02:00
373:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
374:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */
ARM GAS /tmp/cclhdxfP.s page 24
v1.2
2025-01-28 19:01:22 +01:00
UI led
2025-06-28 00:58:29 +02:00
375:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
376:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE();
v1.2
2025-01-28 19:01:22 +01:00
377:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
379:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn);
UI led
2025-06-28 00:58:29 +02:00
380:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
381:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
382:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
383:Src/stm32g4xx_hal_msp.c **** }
384:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM3)
UI led
2025-06-28 00:58:29 +02:00
789 .loc 1 384 8 is_stmt 1 view .LVU222
790 .loc 1 384 10 is_stmt 0 view .LVU223
791 000c 1D4A ldr r2, .L55
792 000e 9342 cmp r3, r2
793 0010 19D0 beq .L53
v1.2
2025-01-28 19:01:22 +01:00
385:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
386:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 0 */
v1.2
2025-01-28 19:01:22 +01:00
387:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
388:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 0 */
v1.2
2025-01-28 19:01:22 +01:00
389:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
390:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_ENABLE();
391:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
393:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn);
UI led
2025-06-28 00:58:29 +02:00
394:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
395:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
396:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 1 */
v1.2
2025-01-28 19:01:22 +01:00
397:Src/stm32g4xx_hal_msp.c **** }
UI led
2025-06-28 00:58:29 +02:00
398:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
794 .loc 1 398 8 is_stmt 1 view .LVU224
795 .loc 1 398 10 is_stmt 0 view .LVU225
796 0012 1D4A ldr r2, .L55+4
797 0014 9342 cmp r3, r2
798 0016 29D0 beq .L54
799 .LVL47:
800 .L47:
399:Src/stm32g4xx_hal_msp.c **** {
400:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 0 */
401:Src/stm32g4xx_hal_msp.c ****
402:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 0 */
403:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
404:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_ENABLE();
405:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
406:Src/stm32g4xx_hal_msp.c ****
407:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 1 */
408:Src/stm32g4xx_hal_msp.c **** }
409:Src/stm32g4xx_hal_msp.c ****
410:Src/stm32g4xx_hal_msp.c **** }
801 .loc 1 410 1 view .LVU226
802 0018 05B0 add sp, sp, #20
803 .LCFI15:
804 .cfi_remember_state
805 .cfi_def_cfa_offset 4
806 @ sp needed
807 001a 5DF804FB ldr pc, [sp], #4
808 .LVL48:
809 .L52:
ARM GAS /tmp/cclhdxfP.s page 25
810 .LCFI16:
811 .cfi_restore_state
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
812 .loc 1 376 5 is_stmt 1 view .LVU227
813 .LBB11:
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
814 .loc 1 376 5 view .LVU228
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
815 .loc 1 376 5 view .LVU229
816 001e 03F50433 add r3, r3, #135168
817 0022 9A6D ldr r2, [r3, #88]
818 0024 42F00102 orr r2, r2, #1
819 0028 9A65 str r2, [r3, #88]
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
820 .loc 1 376 5 view .LVU230
821 002a 9B6D ldr r3, [r3, #88]
822 002c 03F00103 and r3, r3, #1
823 0030 0193 str r3, [sp, #4]
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
824 .loc 1 376 5 view .LVU231
825 0032 019B ldr r3, [sp, #4]
826 .LBE11:
v1.2
2025-01-28 19:01:22 +01:00
376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
827 .loc 1 376 5 view .LVU232
v1.2
2025-01-28 19:01:22 +01:00
378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn);
UI led
2025-06-28 00:58:29 +02:00
828 .loc 1 378 5 view .LVU233
829 0034 0022 movs r2, #0
830 0036 1146 mov r1, r2
831 0038 1C20 movs r0, #28
832 .LVL49:
v1.2
2025-01-28 19:01:22 +01:00
378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn);
UI led
2025-06-28 00:58:29 +02:00
833 .loc 1 378 5 is_stmt 0 view .LVU234
834 003a FFF7FEFF bl HAL_NVIC_SetPriority
835 .LVL50:
379:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
836 .loc 1 379 5 is_stmt 1 view .LVU235
837 003e 1C20 movs r0, #28
838 0040 FFF7FEFF bl HAL_NVIC_EnableIRQ
839 .LVL51:
840 0044 E8E7 b .L47
841 .LVL52:
842 .L53:
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
843 .loc 1 390 5 view .LVU236
844 .LBB12:
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
845 .loc 1 390 5 view .LVU237
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
846 .loc 1 390 5 view .LVU238
847 0046 114B ldr r3, .L55+8
848 0048 9A6D ldr r2, [r3, #88]
849 004a 42F00202 orr r2, r2, #2
850 004e 9A65 str r2, [r3, #88]
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
851 .loc 1 390 5 view .LVU239
852 0050 9B6D ldr r3, [r3, #88]
853 0052 03F00203 and r3, r3, #2
ARM GAS /tmp/cclhdxfP.s page 26
854 0056 0293 str r3, [sp, #8]
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
855 .loc 1 390 5 view .LVU240
856 0058 029B ldr r3, [sp, #8]
857 .LBE12:
v1.2
2025-01-28 19:01:22 +01:00
390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */
UI led
2025-06-28 00:58:29 +02:00
858 .loc 1 390 5 view .LVU241
v1.2
2025-01-28 19:01:22 +01:00
392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn);
UI led
2025-06-28 00:58:29 +02:00
859 .loc 1 392 5 view .LVU242
860 005a 0022 movs r2, #0
861 005c 1146 mov r1, r2
862 005e 1D20 movs r0, #29
863 .LVL53:
v1.2
2025-01-28 19:01:22 +01:00
392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn);
UI led
2025-06-28 00:58:29 +02:00
864 .loc 1 392 5 is_stmt 0 view .LVU243
865 0060 FFF7FEFF bl HAL_NVIC_SetPriority
866 .LVL54:
393:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
867 .loc 1 393 5 is_stmt 1 view .LVU244
868 0064 1D20 movs r0, #29
869 0066 FFF7FEFF bl HAL_NVIC_EnableIRQ
870 .LVL55:
871 006a D5E7 b .L47
872 .LVL56:
873 .L54:
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
874 .loc 1 404 5 view .LVU245
875 .LBB13:
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
876 .loc 1 404 5 view .LVU246
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
877 .loc 1 404 5 view .LVU247
878 006c 074B ldr r3, .L55+8
879 006e 1A6E ldr r2, [r3, #96]
880 0070 42F40052 orr r2, r2, #8192
881 0074 1A66 str r2, [r3, #96]
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
882 .loc 1 404 5 view .LVU248
883 0076 1B6E ldr r3, [r3, #96]
884 0078 03F40053 and r3, r3, #8192
885 007c 0393 str r3, [sp, #12]
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
886 .loc 1 404 5 view .LVU249
887 007e 039B ldr r3, [sp, #12]
888 .LBE13:
404:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
889 .loc 1 404 5 discriminator 1 view .LVU250
890 .loc 1 410 1 is_stmt 0 view .LVU251
891 0080 CAE7 b .L47
892 .L56:
893 0082 00BF .align 2
894 .L55:
895 0084 00040040 .word 1073742848
896 0088 00340140 .word 1073820672
897 008c 00100240 .word 1073876992
898 .cfi_endproc
899 .LFE334:
ARM GAS /tmp/cclhdxfP.s page 27
901 .section .text.HAL_TIM_MspPostInit,"ax",%progbits
902 .align 1
903 .global HAL_TIM_MspPostInit
904 .syntax unified
905 .thumb
906 .thumb_func
908 HAL_TIM_MspPostInit:
909 .LVL57:
910 .LFB335:
411:Src/stm32g4xx_hal_msp.c ****
412:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
413:Src/stm32g4xx_hal_msp.c **** {
911 .loc 1 413 1 is_stmt 1 view -0
912 .cfi_startproc
913 @ args = 0, pretend = 0, frame = 32
914 @ frame_needed = 0, uses_anonymous_args = 0
915 .loc 1 413 1 is_stmt 0 view .LVU253
916 0000 00B5 push {lr}
917 .LCFI17:
918 .cfi_def_cfa_offset 4
919 .cfi_offset 14, -4
920 0002 89B0 sub sp, sp, #36
921 .LCFI18:
922 .cfi_def_cfa_offset 40
414:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
923 .loc 1 414 3 is_stmt 1 view .LVU254
924 .loc 1 414 20 is_stmt 0 view .LVU255
925 0004 0023 movs r3, #0
926 0006 0393 str r3, [sp, #12]
927 0008 0493 str r3, [sp, #16]
928 000a 0593 str r3, [sp, #20]
929 000c 0693 str r3, [sp, #24]
930 000e 0793 str r3, [sp, #28]
415:Src/stm32g4xx_hal_msp.c **** if(htim->Instance==TIM2)
931 .loc 1 415 3 is_stmt 1 view .LVU256
932 .loc 1 415 10 is_stmt 0 view .LVU257
933 0010 0368 ldr r3, [r0]
934 .loc 1 415 5 view .LVU258
935 0012 B3F1804F cmp r3, #1073741824
936 0016 05D0 beq .L61
416:Src/stm32g4xx_hal_msp.c **** {
417:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */
418:Src/stm32g4xx_hal_msp.c ****
419:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */
420:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
421:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
422:Src/stm32g4xx_hal_msp.c **** PA0 ------> TIM2_CH1
423:Src/stm32g4xx_hal_msp.c **** PA1 ------> TIM2_CH2
424:Src/stm32g4xx_hal_msp.c **** PA2 ------> TIM2_CH3
425:Src/stm32g4xx_hal_msp.c **** PA3 ------> TIM2_CH4
426:Src/stm32g4xx_hal_msp.c **** */
427:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
428:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
429:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
430:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
431:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
432:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
ARM GAS /tmp/cclhdxfP.s page 28
433:Src/stm32g4xx_hal_msp.c ****
434:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */
435:Src/stm32g4xx_hal_msp.c ****
436:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */
437:Src/stm32g4xx_hal_msp.c **** }
438:Src/stm32g4xx_hal_msp.c **** else if(htim->Instance==TIM8)
937 .loc 1 438 8 is_stmt 1 view .LVU259
938 .loc 1 438 10 is_stmt 0 view .LVU260
939 0018 184A ldr r2, .L63
940 001a 9342 cmp r3, r2
941 001c 19D0 beq .L62
942 .LVL58:
943 .L57:
v1.2
2025-01-28 19:01:22 +01:00
439:Src/stm32g4xx_hal_msp.c **** {
UI led
2025-06-28 00:58:29 +02:00
440:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspPostInit 0 */
v1.2
2025-01-28 19:01:22 +01:00
441:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
442:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspPostInit 0 */
443:Src/stm32g4xx_hal_msp.c ****
444:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
445:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
446:Src/stm32g4xx_hal_msp.c **** PB5 ------> TIM8_CH3N
447:Src/stm32g4xx_hal_msp.c **** */
448:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_5;
449:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
450:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
451:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
452:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
453:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
454:Src/stm32g4xx_hal_msp.c ****
455:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspPostInit 1 */
456:Src/stm32g4xx_hal_msp.c ****
457:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspPostInit 1 */
458:Src/stm32g4xx_hal_msp.c **** }
v1.2
2025-01-28 19:01:22 +01:00
459:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
460:Src/stm32g4xx_hal_msp.c **** }
944 .loc 1 460 1 view .LVU261
945 001e 09B0 add sp, sp, #36
946 .LCFI19:
947 .cfi_remember_state
948 .cfi_def_cfa_offset 4
949 @ sp needed
950 0020 5DF804FB ldr pc, [sp], #4
951 .LVL59:
952 .L61:
953 .LCFI20:
954 .cfi_restore_state
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
955 .loc 1 420 5 is_stmt 1 view .LVU262
956 .LBB14:
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
957 .loc 1 420 5 view .LVU263
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
958 .loc 1 420 5 view .LVU264
959 0024 03F50433 add r3, r3, #135168
960 0028 DA6C ldr r2, [r3, #76]
961 002a 42F00102 orr r2, r2, #1
962 002e DA64 str r2, [r3, #76]
ARM GAS /tmp/cclhdxfP.s page 29
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
963 .loc 1 420 5 view .LVU265
964 0030 DB6C ldr r3, [r3, #76]
965 0032 03F00103 and r3, r3, #1
966 0036 0193 str r3, [sp, #4]
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
967 .loc 1 420 5 view .LVU266
968 0038 019B ldr r3, [sp, #4]
969 .LBE14:
420:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration
970 .loc 1 420 5 view .LVU267
427:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
971 .loc 1 427 5 view .LVU268
427:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
972 .loc 1 427 25 is_stmt 0 view .LVU269
973 003a 0F23 movs r3, #15
974 003c 0393 str r3, [sp, #12]
428:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
975 .loc 1 428 5 is_stmt 1 view .LVU270
428:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
976 .loc 1 428 26 is_stmt 0 view .LVU271
977 003e 0223 movs r3, #2
978 0040 0493 str r3, [sp, #16]
429:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
979 .loc 1 429 5 is_stmt 1 view .LVU272
430:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
980 .loc 1 430 5 view .LVU273
431:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
981 .loc 1 431 5 view .LVU274
431:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
982 .loc 1 431 31 is_stmt 0 view .LVU275
983 0042 0123 movs r3, #1
984 0044 0793 str r3, [sp, #28]
432:Src/stm32g4xx_hal_msp.c ****
985 .loc 1 432 5 is_stmt 1 view .LVU276
986 0046 03A9 add r1, sp, #12
987 0048 4FF09040 mov r0, #1207959552
988 .LVL60:
432:Src/stm32g4xx_hal_msp.c ****
989 .loc 1 432 5 is_stmt 0 view .LVU277
990 004c FFF7FEFF bl HAL_GPIO_Init
991 .LVL61:
992 0050 E5E7 b .L57
993 .LVL62:
994 .L62:
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
995 .loc 1 444 5 is_stmt 1 view .LVU278
996 .LBB15:
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
997 .loc 1 444 5 view .LVU279
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
998 .loc 1 444 5 view .LVU280
999 0052 0B4B ldr r3, .L63+4
1000 0054 DA6C ldr r2, [r3, #76]
1001 0056 42F00202 orr r2, r2, #2
1002 005a DA64 str r2, [r3, #76]
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
ARM GAS /tmp/cclhdxfP.s page 30
1003 .loc 1 444 5 view .LVU281
1004 005c DB6C ldr r3, [r3, #76]
1005 005e 03F00203 and r3, r3, #2
1006 0062 0293 str r3, [sp, #8]
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
1007 .loc 1 444 5 view .LVU282
1008 0064 029B ldr r3, [sp, #8]
1009 .LBE15:
444:Src/stm32g4xx_hal_msp.c **** /**TIM8 GPIO Configuration
1010 .loc 1 444 5 view .LVU283
448:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1011 .loc 1 448 5 view .LVU284
448:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1012 .loc 1 448 25 is_stmt 0 view .LVU285
1013 0066 2023 movs r3, #32
1014 0068 0393 str r3, [sp, #12]
449:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1015 .loc 1 449 5 is_stmt 1 view .LVU286
449:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1016 .loc 1 449 26 is_stmt 0 view .LVU287
1017 006a 0223 movs r3, #2
1018 006c 0493 str r3, [sp, #16]
450:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
1019 .loc 1 450 5 is_stmt 1 view .LVU288
451:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
1020 .loc 1 451 5 view .LVU289
452:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1021 .loc 1 452 5 view .LVU290
452:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1022 .loc 1 452 31 is_stmt 0 view .LVU291
1023 006e 0323 movs r3, #3
1024 0070 0793 str r3, [sp, #28]
453:Src/stm32g4xx_hal_msp.c ****
1025 .loc 1 453 5 is_stmt 1 view .LVU292
1026 0072 03A9 add r1, sp, #12
1027 0074 0348 ldr r0, .L63+8
1028 .LVL63:
453:Src/stm32g4xx_hal_msp.c ****
1029 .loc 1 453 5 is_stmt 0 view .LVU293
1030 0076 FFF7FEFF bl HAL_GPIO_Init
1031 .LVL64:
1032 .loc 1 460 1 view .LVU294
1033 007a D0E7 b .L57
1034 .L64:
1035 .align 2
1036 .L63:
1037 007c 00340140 .word 1073820672
1038 0080 00100240 .word 1073876992
1039 0084 00040048 .word 1207960576
1040 .cfi_endproc
1041 .LFE335:
1043 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
1044 .align 1
1045 .global HAL_TIM_Base_MspDeInit
1046 .syntax unified
1047 .thumb
1048 .thumb_func
ARM GAS /tmp/cclhdxfP.s page 31
1050 HAL_TIM_Base_MspDeInit:
1051 .LVL65:
1052 .LFB336:
461:Src/stm32g4xx_hal_msp.c **** /**
462:Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
463:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
464:Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
465:Src/stm32g4xx_hal_msp.c **** * @retval None
466:Src/stm32g4xx_hal_msp.c **** */
467:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
468:Src/stm32g4xx_hal_msp.c **** {
1053 .loc 1 468 1 is_stmt 1 view -0
1054 .cfi_startproc
1055 @ args = 0, pretend = 0, frame = 0
1056 @ frame_needed = 0, uses_anonymous_args = 0
1057 .loc 1 468 1 is_stmt 0 view .LVU296
1058 0000 08B5 push {r3, lr}
1059 .LCFI21:
1060 .cfi_def_cfa_offset 8
1061 .cfi_offset 3, -8
1062 .cfi_offset 14, -4
469:Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM2)
1063 .loc 1 469 3 is_stmt 1 view .LVU297
1064 .loc 1 469 15 is_stmt 0 view .LVU298
1065 0002 0368 ldr r3, [r0]
1066 .loc 1 469 5 view .LVU299
1067 0004 B3F1804F cmp r3, #1073741824
1068 0008 06D0 beq .L70
470:Src/stm32g4xx_hal_msp.c **** {
471:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */
472:Src/stm32g4xx_hal_msp.c ****
473:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */
474:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
475:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE();
476:Src/stm32g4xx_hal_msp.c ****
477:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt DeInit */
478:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM2_IRQn);
479:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
480:Src/stm32g4xx_hal_msp.c ****
481:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */
482:Src/stm32g4xx_hal_msp.c **** }
483:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM3)
1069 .loc 1 483 8 is_stmt 1 view .LVU300
1070 .loc 1 483 10 is_stmt 0 view .LVU301
1071 000a 104A ldr r2, .L73
1072 000c 9342 cmp r3, r2
1073 000e 0CD0 beq .L71
484:Src/stm32g4xx_hal_msp.c **** {
485:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */
486:Src/stm32g4xx_hal_msp.c ****
487:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 0 */
488:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
489:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_DISABLE();
490:Src/stm32g4xx_hal_msp.c ****
491:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt DeInit */
492:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM3_IRQn);
493:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
ARM GAS /tmp/cclhdxfP.s page 32
494:Src/stm32g4xx_hal_msp.c ****
495:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 1 */
496:Src/stm32g4xx_hal_msp.c **** }
497:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
1074 .loc 1 497 8 is_stmt 1 view .LVU302
1075 .loc 1 497 10 is_stmt 0 view .LVU303
1076 0010 0F4A ldr r2, .L73+4
1077 0012 9342 cmp r3, r2
1078 0014 13D0 beq .L72
1079 .LVL66:
1080 .L65:
498:Src/stm32g4xx_hal_msp.c **** {
499:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 0 */
500:Src/stm32g4xx_hal_msp.c ****
501:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 0 */
502:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
503:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_DISABLE();
504:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
505:Src/stm32g4xx_hal_msp.c ****
506:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 1 */
507:Src/stm32g4xx_hal_msp.c **** }
v1.2
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508:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
509:Src/stm32g4xx_hal_msp.c **** }
1081 .loc 1 509 1 view .LVU304
1082 0016 08BD pop {r3, pc}
1083 .LVL67:
1084 .L70:
475:Src/stm32g4xx_hal_msp.c ****
1085 .loc 1 475 5 is_stmt 1 view .LVU305
1086 0018 0E4A ldr r2, .L73+8
1087 001a 936D ldr r3, [r2, #88]
1088 001c 23F00103 bic r3, r3, #1
1089 0020 9365 str r3, [r2, #88]
478:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
1090 .loc 1 478 5 view .LVU306
1091 0022 1C20 movs r0, #28
1092 .LVL68:
478:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
1093 .loc 1 478 5 is_stmt 0 view .LVU307
1094 0024 FFF7FEFF bl HAL_NVIC_DisableIRQ
1095 .LVL69:
1096 0028 F5E7 b .L65
1097 .LVL70:
1098 .L71:
489:Src/stm32g4xx_hal_msp.c ****
1099 .loc 1 489 5 is_stmt 1 view .LVU308
1100 002a 02F50332 add r2, r2, #134144
1101 002e 936D ldr r3, [r2, #88]
1102 0030 23F00203 bic r3, r3, #2
1103 0034 9365 str r3, [r2, #88]
492:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
1104 .loc 1 492 5 view .LVU309
1105 0036 1D20 movs r0, #29
1106 .LVL71:
492:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
1107 .loc 1 492 5 is_stmt 0 view .LVU310
1108 0038 FFF7FEFF bl HAL_NVIC_DisableIRQ
ARM GAS /tmp/cclhdxfP.s page 33
1109 .LVL72:
1110 003c EBE7 b .L65
1111 .LVL73:
1112 .L72:
503:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
1113 .loc 1 503 5 is_stmt 1 view .LVU311
1114 003e 02F55C42 add r2, r2, #56320
1115 0042 136E ldr r3, [r2, #96]
1116 0044 23F40053 bic r3, r3, #8192
1117 0048 1366 str r3, [r2, #96]
1118 .loc 1 509 1 is_stmt 0 view .LVU312
1119 004a E4E7 b .L65
1120 .L74:
1121 .align 2
1122 .L73:
1123 004c 00040040 .word 1073742848
1124 0050 00340140 .word 1073820672
1125 0054 00100240 .word 1073876992
1126 .cfi_endproc
1127 .LFE336:
1129 .section .text.HAL_UART_MspInit,"ax",%progbits
1130 .align 1
1131 .global HAL_UART_MspInit
1132 .syntax unified
1133 .thumb
1134 .thumb_func
1136 HAL_UART_MspInit:
1137 .LVL74:
1138 .LFB337:
510:Src/stm32g4xx_hal_msp.c ****
511:Src/stm32g4xx_hal_msp.c **** /**
512:Src/stm32g4xx_hal_msp.c **** * @brief UART MSP Initialization
513:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
514:Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
515:Src/stm32g4xx_hal_msp.c **** * @retval None
516:Src/stm32g4xx_hal_msp.c **** */
517:Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
518:Src/stm32g4xx_hal_msp.c **** {
1139 .loc 1 518 1 is_stmt 1 view -0
1140 .cfi_startproc
1141 @ args = 0, pretend = 0, frame = 96
1142 @ frame_needed = 0, uses_anonymous_args = 0
1143 .loc 1 518 1 is_stmt 0 view .LVU314
1144 0000 30B5 push {r4, r5, lr}
1145 .LCFI22:
1146 .cfi_def_cfa_offset 12
1147 .cfi_offset 4, -12
1148 .cfi_offset 5, -8
1149 .cfi_offset 14, -4
1150 0002 99B0 sub sp, sp, #100
1151 .LCFI23:
1152 .cfi_def_cfa_offset 112
1153 0004 0446 mov r4, r0
519:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
1154 .loc 1 519 3 is_stmt 1 view .LVU315
1155 .loc 1 519 20 is_stmt 0 view .LVU316
1156 0006 0021 movs r1, #0
ARM GAS /tmp/cclhdxfP.s page 34
1157 0008 1391 str r1, [sp, #76]
1158 000a 1491 str r1, [sp, #80]
1159 000c 1591 str r1, [sp, #84]
1160 000e 1691 str r1, [sp, #88]
1161 0010 1791 str r1, [sp, #92]
520:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
1162 .loc 1 520 3 is_stmt 1 view .LVU317
1163 .loc 1 520 28 is_stmt 0 view .LVU318
1164 0012 4422 movs r2, #68
1165 0014 02A8 add r0, sp, #8
1166 .LVL75:
1167 .loc 1 520 28 view .LVU319
1168 0016 FFF7FEFF bl memset
1169 .LVL76:
521:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
1170 .loc 1 521 3 is_stmt 1 view .LVU320
1171 .loc 1 521 11 is_stmt 0 view .LVU321
1172 001a 2268 ldr r2, [r4]
1173 .loc 1 521 5 view .LVU322
1174 001c 344B ldr r3, .L85
1175 001e 9A42 cmp r2, r3
1176 0020 01D0 beq .L81
1177 .L75:
522:Src/stm32g4xx_hal_msp.c **** {
523:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */
v1.2
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524:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
525:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */
v1.2
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526:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
527:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks
528:Src/stm32g4xx_hal_msp.c **** */
529:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
530:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
531:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
532:Src/stm32g4xx_hal_msp.c **** {
533:Src/stm32g4xx_hal_msp.c **** Error_Handler();
534:Src/stm32g4xx_hal_msp.c **** }
535:Src/stm32g4xx_hal_msp.c ****
536:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
537:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE();
538:Src/stm32g4xx_hal_msp.c ****
539:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
540:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
541:Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX
542:Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX
543:Src/stm32g4xx_hal_msp.c **** */
544:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
545:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
546:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
547:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
548:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
549:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
v1.2
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550:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
551:Src/stm32g4xx_hal_msp.c **** /* USART1 DMA Init */
552:Src/stm32g4xx_hal_msp.c **** /* USART1_RX Init */
553:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Instance = DMA1_Channel3;
554:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
555:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
ARM GAS /tmp/cclhdxfP.s page 35
556:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
557:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
558:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
559:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
560:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL;
561:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
562:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
563:Src/stm32g4xx_hal_msp.c **** {
564:Src/stm32g4xx_hal_msp.c **** Error_Handler();
565:Src/stm32g4xx_hal_msp.c **** }
v1.2
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566:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
567:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
568:Src/stm32g4xx_hal_msp.c ****
569:Src/stm32g4xx_hal_msp.c **** /* USART1_TX Init */
570:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Instance = DMA1_Channel4;
571:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
572:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
573:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
574:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
575:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
576:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
577:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL;
578:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
579:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
580:Src/stm32g4xx_hal_msp.c **** {
581:Src/stm32g4xx_hal_msp.c **** Error_Handler();
582:Src/stm32g4xx_hal_msp.c **** }
583:Src/stm32g4xx_hal_msp.c ****
584:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
585:Src/stm32g4xx_hal_msp.c ****
586:Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt Init */
587:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
588:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
589:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */
590:Src/stm32g4xx_hal_msp.c ****
591:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */
592:Src/stm32g4xx_hal_msp.c ****
593:Src/stm32g4xx_hal_msp.c **** }
594:Src/stm32g4xx_hal_msp.c ****
595:Src/stm32g4xx_hal_msp.c **** }
1178 .loc 1 595 1 view .LVU323
1179 0022 19B0 add sp, sp, #100
1180 .LCFI24:
1181 .cfi_remember_state
1182 .cfi_def_cfa_offset 12
1183 @ sp needed
1184 0024 30BD pop {r4, r5, pc}
1185 .LVL77:
1186 .L81:
1187 .LCFI25:
1188 .cfi_restore_state
529:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
1189 .loc 1 529 5 is_stmt 1 view .LVU324
529:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
1190 .loc 1 529 40 is_stmt 0 view .LVU325
1191 0026 0123 movs r3, #1
1192 0028 0293 str r3, [sp, #8]
ARM GAS /tmp/cclhdxfP.s page 36
530:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
1193 .loc 1 530 5 is_stmt 1 view .LVU326
531:Src/stm32g4xx_hal_msp.c **** {
1194 .loc 1 531 5 view .LVU327
531:Src/stm32g4xx_hal_msp.c **** {
1195 .loc 1 531 9 is_stmt 0 view .LVU328
1196 002a 02A8 add r0, sp, #8
1197 002c FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
1198 .LVL78:
531:Src/stm32g4xx_hal_msp.c **** {
1199 .loc 1 531 8 discriminator 1 view .LVU329
1200 0030 0028 cmp r0, #0
1201 0032 53D1 bne .L82
1202 .L77:
537:Src/stm32g4xx_hal_msp.c ****
1203 .loc 1 537 5 is_stmt 1 view .LVU330
1204 .LBB16:
537:Src/stm32g4xx_hal_msp.c ****
1205 .loc 1 537 5 view .LVU331
537:Src/stm32g4xx_hal_msp.c ****
1206 .loc 1 537 5 view .LVU332
1207 0034 2F4B ldr r3, .L85+4
1208 0036 1A6E ldr r2, [r3, #96]
1209 0038 42F48042 orr r2, r2, #16384
1210 003c 1A66 str r2, [r3, #96]
537:Src/stm32g4xx_hal_msp.c ****
1211 .loc 1 537 5 view .LVU333
1212 003e 1A6E ldr r2, [r3, #96]
1213 0040 02F48042 and r2, r2, #16384
1214 0044 0092 str r2, [sp]
537:Src/stm32g4xx_hal_msp.c ****
1215 .loc 1 537 5 view .LVU334
1216 0046 009A ldr r2, [sp]
1217 .LBE16:
537:Src/stm32g4xx_hal_msp.c ****
1218 .loc 1 537 5 view .LVU335
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1219 .loc 1 539 5 view .LVU336
1220 .LBB17:
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1221 .loc 1 539 5 view .LVU337
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1222 .loc 1 539 5 view .LVU338
1223 0048 DA6C ldr r2, [r3, #76]
1224 004a 42F00102 orr r2, r2, #1
1225 004e DA64 str r2, [r3, #76]
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1226 .loc 1 539 5 view .LVU339
1227 0050 DB6C ldr r3, [r3, #76]
1228 0052 03F00103 and r3, r3, #1
1229 0056 0193 str r3, [sp, #4]
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1230 .loc 1 539 5 view .LVU340
1231 0058 019B ldr r3, [sp, #4]
1232 .LBE17:
539:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1233 .loc 1 539 5 view .LVU341
ARM GAS /tmp/cclhdxfP.s page 37
544:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1234 .loc 1 544 5 view .LVU342
544:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1235 .loc 1 544 25 is_stmt 0 view .LVU343
1236 005a 4FF4C063 mov r3, #1536
1237 005e 1393 str r3, [sp, #76]
545:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1238 .loc 1 545 5 is_stmt 1 view .LVU344
545:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1239 .loc 1 545 26 is_stmt 0 view .LVU345
1240 0060 0223 movs r3, #2
1241 0062 1493 str r3, [sp, #80]
546:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
1242 .loc 1 546 5 is_stmt 1 view .LVU346
546:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
1243 .loc 1 546 26 is_stmt 0 view .LVU347
1244 0064 0025 movs r5, #0
1245 0066 1595 str r5, [sp, #84]
547:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
1246 .loc 1 547 5 is_stmt 1 view .LVU348
547:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
1247 .loc 1 547 27 is_stmt 0 view .LVU349
1248 0068 1693 str r3, [sp, #88]
548:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1249 .loc 1 548 5 is_stmt 1 view .LVU350
548:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1250 .loc 1 548 31 is_stmt 0 view .LVU351
1251 006a 0723 movs r3, #7
1252 006c 1793 str r3, [sp, #92]
549:Src/stm32g4xx_hal_msp.c ****
1253 .loc 1 549 5 is_stmt 1 view .LVU352
1254 006e 13A9 add r1, sp, #76
1255 0070 4FF09040 mov r0, #1207959552
1256 0074 FFF7FEFF bl HAL_GPIO_Init
1257 .LVL79:
553:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
1258 .loc 1 553 5 view .LVU353
553:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
1259 .loc 1 553 29 is_stmt 0 view .LVU354
1260 0078 1F48 ldr r0, .L85+8
1261 007a 204B ldr r3, .L85+12
1262 007c 0360 str r3, [r0]
554:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
1263 .loc 1 554 5 is_stmt 1 view .LVU355
554:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
1264 .loc 1 554 33 is_stmt 0 view .LVU356
1265 007e 1823 movs r3, #24
1266 0080 4360 str r3, [r0, #4]
555:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
1267 .loc 1 555 5 is_stmt 1 view .LVU357
555:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
1268 .loc 1 555 35 is_stmt 0 view .LVU358
1269 0082 8560 str r5, [r0, #8]
556:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
1270 .loc 1 556 5 is_stmt 1 view .LVU359
556:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
1271 .loc 1 556 35 is_stmt 0 view .LVU360
ARM GAS /tmp/cclhdxfP.s page 38
1272 0084 C560 str r5, [r0, #12]
557:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1273 .loc 1 557 5 is_stmt 1 view .LVU361
557:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1274 .loc 1 557 32 is_stmt 0 view .LVU362
1275 0086 8023 movs r3, #128
1276 0088 0361 str r3, [r0, #16]
558:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
1277 .loc 1 558 5 is_stmt 1 view .LVU363
558:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
1278 .loc 1 558 45 is_stmt 0 view .LVU364
1279 008a 4561 str r5, [r0, #20]
559:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL;
1280 .loc 1 559 5 is_stmt 1 view .LVU365
559:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL;
1281 .loc 1 559 42 is_stmt 0 view .LVU366
1282 008c 8561 str r5, [r0, #24]
560:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
1283 .loc 1 560 5 is_stmt 1 view .LVU367
560:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
1284 .loc 1 560 30 is_stmt 0 view .LVU368
1285 008e C561 str r5, [r0, #28]
561:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
1286 .loc 1 561 5 is_stmt 1 view .LVU369
561:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
1287 .loc 1 561 34 is_stmt 0 view .LVU370
1288 0090 0562 str r5, [r0, #32]
562:Src/stm32g4xx_hal_msp.c **** {
1289 .loc 1 562 5 is_stmt 1 view .LVU371
562:Src/stm32g4xx_hal_msp.c **** {
1290 .loc 1 562 9 is_stmt 0 view .LVU372
1291 0092 FFF7FEFF bl HAL_DMA_Init
1292 .LVL80:
562:Src/stm32g4xx_hal_msp.c **** {
1293 .loc 1 562 8 discriminator 1 view .LVU373
1294 0096 20BB cbnz r0, .L83
1295 .L78:
567:Src/stm32g4xx_hal_msp.c ****
1296 .loc 1 567 5 is_stmt 1 view .LVU374
567:Src/stm32g4xx_hal_msp.c ****
1297 .loc 1 567 5 view .LVU375
1298 0098 174B ldr r3, .L85+8
1299 009a C4F88030 str r3, [r4, #128]
567:Src/stm32g4xx_hal_msp.c ****
1300 .loc 1 567 5 view .LVU376
1301 009e 9C62 str r4, [r3, #40]
567:Src/stm32g4xx_hal_msp.c ****
1302 .loc 1 567 5 view .LVU377
570:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
1303 .loc 1 570 5 view .LVU378
570:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
1304 .loc 1 570 29 is_stmt 0 view .LVU379
1305 00a0 1748 ldr r0, .L85+16
1306 00a2 184B ldr r3, .L85+20
1307 00a4 0360 str r3, [r0]
571:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
1308 .loc 1 571 5 is_stmt 1 view .LVU380
ARM GAS /tmp/cclhdxfP.s page 39
571:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
1309 .loc 1 571 33 is_stmt 0 view .LVU381
1310 00a6 1923 movs r3, #25
1311 00a8 4360 str r3, [r0, #4]
572:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
1312 .loc 1 572 5 is_stmt 1 view .LVU382
572:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
1313 .loc 1 572 35 is_stmt 0 view .LVU383
1314 00aa 1023 movs r3, #16
1315 00ac 8360 str r3, [r0, #8]
573:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
1316 .loc 1 573 5 is_stmt 1 view .LVU384
573:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
1317 .loc 1 573 35 is_stmt 0 view .LVU385
1318 00ae 0023 movs r3, #0
1319 00b0 C360 str r3, [r0, #12]
574:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1320 .loc 1 574 5 is_stmt 1 view .LVU386
574:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1321 .loc 1 574 32 is_stmt 0 view .LVU387
1322 00b2 8022 movs r2, #128
1323 00b4 0261 str r2, [r0, #16]
575:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
1324 .loc 1 575 5 is_stmt 1 view .LVU388
575:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
1325 .loc 1 575 45 is_stmt 0 view .LVU389
1326 00b6 4361 str r3, [r0, #20]
576:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL;
1327 .loc 1 576 5 is_stmt 1 view .LVU390
576:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL;
1328 .loc 1 576 42 is_stmt 0 view .LVU391
1329 00b8 8361 str r3, [r0, #24]
577:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
1330 .loc 1 577 5 is_stmt 1 view .LVU392
577:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
1331 .loc 1 577 30 is_stmt 0 view .LVU393
1332 00ba C361 str r3, [r0, #28]
578:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
1333 .loc 1 578 5 is_stmt 1 view .LVU394
578:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
1334 .loc 1 578 34 is_stmt 0 view .LVU395
1335 00bc 0362 str r3, [r0, #32]
579:Src/stm32g4xx_hal_msp.c **** {
1336 .loc 1 579 5 is_stmt 1 view .LVU396
579:Src/stm32g4xx_hal_msp.c **** {
1337 .loc 1 579 9 is_stmt 0 view .LVU397
1338 00be FFF7FEFF bl HAL_DMA_Init
1339 .LVL81:
579:Src/stm32g4xx_hal_msp.c **** {
1340 .loc 1 579 8 discriminator 1 view .LVU398
1341 00c2 88B9 cbnz r0, .L84
1342 .L79:
584:Src/stm32g4xx_hal_msp.c ****
1343 .loc 1 584 5 is_stmt 1 view .LVU399
584:Src/stm32g4xx_hal_msp.c ****
1344 .loc 1 584 5 view .LVU400
1345 00c4 0E4B ldr r3, .L85+16
ARM GAS /tmp/cclhdxfP.s page 40
1346 00c6 E367 str r3, [r4, #124]
584:Src/stm32g4xx_hal_msp.c ****
1347 .loc 1 584 5 view .LVU401
1348 00c8 9C62 str r4, [r3, #40]
v1.2
2025-01-28 19:01:22 +01:00
584:Src/stm32g4xx_hal_msp.c ****
UI led
2025-06-28 00:58:29 +02:00
1349 .loc 1 584 5 view .LVU402
587:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
1350 .loc 1 587 5 view .LVU403
1351 00ca 0022 movs r2, #0
1352 00cc 1146 mov r1, r2
1353 00ce 2520 movs r0, #37
1354 00d0 FFF7FEFF bl HAL_NVIC_SetPriority
1355 .LVL82:
588:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */
1356 .loc 1 588 5 view .LVU404
1357 00d4 2520 movs r0, #37
1358 00d6 FFF7FEFF bl HAL_NVIC_EnableIRQ
1359 .LVL83:
1360 .loc 1 595 1 is_stmt 0 view .LVU405
1361 00da A2E7 b .L75
1362 .L82:
533:Src/stm32g4xx_hal_msp.c **** }
1363 .loc 1 533 7 is_stmt 1 view .LVU406
1364 00dc FFF7FEFF bl Error_Handler
1365 .LVL84:
1366 00e0 A8E7 b .L77
1367 .L83:
564:Src/stm32g4xx_hal_msp.c **** }
1368 .loc 1 564 7 view .LVU407
1369 00e2 FFF7FEFF bl Error_Handler
1370 .LVL85:
1371 00e6 D7E7 b .L78
1372 .L84:
581:Src/stm32g4xx_hal_msp.c **** }
1373 .loc 1 581 7 view .LVU408
1374 00e8 FFF7FEFF bl Error_Handler
1375 .LVL86:
1376 00ec EAE7 b .L79
1377 .L86:
1378 00ee 00BF .align 2
1379 .L85:
1380 00f0 00380140 .word 1073821696
1381 00f4 00100240 .word 1073876992
1382 00f8 00000000 .word hdma_usart1_rx
1383 00fc 30000240 .word 1073872944
1384 0100 00000000 .word hdma_usart1_tx
1385 0104 44000240 .word 1073872964
1386 .cfi_endproc
1387 .LFE337:
1389 .section .text.HAL_UART_MspDeInit,"ax",%progbits
1390 .align 1
1391 .global HAL_UART_MspDeInit
1392 .syntax unified
1393 .thumb
1394 .thumb_func
1396 HAL_UART_MspDeInit:
1397 .LVL87:
ARM GAS /tmp/cclhdxfP.s page 41
1398 .LFB338:
596:Src/stm32g4xx_hal_msp.c ****
597:Src/stm32g4xx_hal_msp.c **** /**
598:Src/stm32g4xx_hal_msp.c **** * @brief UART MSP De-Initialization
599:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
600:Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
601:Src/stm32g4xx_hal_msp.c **** * @retval None
602:Src/stm32g4xx_hal_msp.c **** */
603:Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
604:Src/stm32g4xx_hal_msp.c **** {
1399 .loc 1 604 1 view -0
1400 .cfi_startproc
1401 @ args = 0, pretend = 0, frame = 0
1402 @ frame_needed = 0, uses_anonymous_args = 0
605:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
1403 .loc 1 605 3 view .LVU410
1404 .loc 1 605 11 is_stmt 0 view .LVU411
1405 0000 0268 ldr r2, [r0]
1406 .loc 1 605 5 view .LVU412
1407 0002 0E4B ldr r3, .L94
1408 0004 9A42 cmp r2, r3
1409 0006 00D0 beq .L93
1410 0008 7047 bx lr
1411 .L93:
604:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
1412 .loc 1 604 1 view .LVU413
1413 000a 10B5 push {r4, lr}
1414 .LCFI26:
1415 .cfi_def_cfa_offset 8
1416 .cfi_offset 4, -8
1417 .cfi_offset 14, -4
1418 000c 0446 mov r4, r0
606:Src/stm32g4xx_hal_msp.c **** {
607:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */
608:Src/stm32g4xx_hal_msp.c ****
609:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */
610:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
611:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE();
1419 .loc 1 611 5 is_stmt 1 view .LVU414
1420 000e 0C4A ldr r2, .L94+4
1421 0010 136E ldr r3, [r2, #96]
1422 0012 23F48043 bic r3, r3, #16384
1423 0016 1366 str r3, [r2, #96]
612:Src/stm32g4xx_hal_msp.c ****
613:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
614:Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX
615:Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX
616:Src/stm32g4xx_hal_msp.c **** */
617:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
1424 .loc 1 617 5 view .LVU415
1425 0018 4FF4C061 mov r1, #1536
1426 001c 4FF09040 mov r0, #1207959552
1427 .LVL88:
1428 .loc 1 617 5 is_stmt 0 view .LVU416
1429 0020 FFF7FEFF bl HAL_GPIO_DeInit
1430 .LVL89:
618:Src/stm32g4xx_hal_msp.c ****
ARM GAS /tmp/cclhdxfP.s page 42
619:Src/stm32g4xx_hal_msp.c **** /* USART1 DMA DeInit */
620:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(huart->hdmarx);
1431 .loc 1 620 5 is_stmt 1 view .LVU417
1432 0024 D4F88000 ldr r0, [r4, #128]
1433 0028 FFF7FEFF bl HAL_DMA_DeInit
1434 .LVL90:
621:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(huart->hdmatx);
1435 .loc 1 621 5 view .LVU418
1436 002c E06F ldr r0, [r4, #124]
1437 002e FFF7FEFF bl HAL_DMA_DeInit
1438 .LVL91:
622:Src/stm32g4xx_hal_msp.c ****
623:Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt DeInit */
624:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USART1_IRQn);
1439 .loc 1 624 5 view .LVU419
1440 0032 2520 movs r0, #37
1441 0034 FFF7FEFF bl HAL_NVIC_DisableIRQ
1442 .LVL92:
625:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */
626:Src/stm32g4xx_hal_msp.c ****
627:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */
628:Src/stm32g4xx_hal_msp.c **** }
629:Src/stm32g4xx_hal_msp.c ****
630:Src/stm32g4xx_hal_msp.c **** }
1443 .loc 1 630 1 is_stmt 0 view .LVU420
1444 0038 10BD pop {r4, pc}
1445 .LVL93:
1446 .L95:
1447 .loc 1 630 1 view .LVU421
1448 003a 00BF .align 2
1449 .L94:
1450 003c 00380140 .word 1073821696
1451 0040 00100240 .word 1073876992
1452 .cfi_endproc
1453 .LFE338:
1455 .section .bss.HAL_RCC_ADC12_CLK_ENABLED,"aw",%nobits
1456 .align 2
1459 HAL_RCC_ADC12_CLK_ENABLED:
1460 0000 00000000 .space 4
1461 .text
1462 .Letext0:
1463 .file 2 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1464 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1465 .file 4 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1466 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
1467 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1468 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h"
1469 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
1470 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
1471 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
1472 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h"
1473 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
1474 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
1475 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
1476 .file 15 "Inc/main.h"
1477 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
1478 .file 17 "<built-in>"
ARM GAS /tmp/cclhdxfP.s page 43
ARM GAS /tmp/cclhdxfP.s page 44
primo commit
2023-07-02 17:09:41 +02:00
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_msp.c
UI led
2025-06-28 00:58:29 +02:00
/tmp/cclhdxfP.s:21 .text.HAL_MspInit:00000000 $t
/tmp/cclhdxfP.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/cclhdxfP.s:83 .text.HAL_MspInit:00000034 $d
/tmp/cclhdxfP.s:88 .text.HAL_ADC_MspInit:00000000 $t
/tmp/cclhdxfP.s:94 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
/tmp/cclhdxfP.s:401 .text.HAL_ADC_MspInit:00000150 $d
/tmp/cclhdxfP.s:1459 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 HAL_RCC_ADC12_CLK_ENABLED
/tmp/cclhdxfP.s:411 .text.HAL_ADC_MspDeInit:00000000 $t
/tmp/cclhdxfP.s:417 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
/tmp/cclhdxfP.s:504 .text.HAL_ADC_MspDeInit:00000058 $d
/tmp/cclhdxfP.s:512 .text.HAL_I2C_MspInit:00000000 $t
/tmp/cclhdxfP.s:518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit
/tmp/cclhdxfP.s:694 .text.HAL_I2C_MspInit:000000b4 $d
/tmp/cclhdxfP.s:701 .text.HAL_I2C_MspDeInit:00000000 $t
/tmp/cclhdxfP.s:707 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit
/tmp/cclhdxfP.s:755 .text.HAL_I2C_MspDeInit:0000002c $d
/tmp/cclhdxfP.s:762 .text.HAL_TIM_Base_MspInit:00000000 $t
/tmp/cclhdxfP.s:768 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
/tmp/cclhdxfP.s:895 .text.HAL_TIM_Base_MspInit:00000084 $d
/tmp/cclhdxfP.s:902 .text.HAL_TIM_MspPostInit:00000000 $t
/tmp/cclhdxfP.s:908 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
/tmp/cclhdxfP.s:1037 .text.HAL_TIM_MspPostInit:0000007c $d
/tmp/cclhdxfP.s:1044 .text.HAL_TIM_Base_MspDeInit:00000000 $t
/tmp/cclhdxfP.s:1050 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
/tmp/cclhdxfP.s:1123 .text.HAL_TIM_Base_MspDeInit:0000004c $d
/tmp/cclhdxfP.s:1130 .text.HAL_UART_MspInit:00000000 $t
/tmp/cclhdxfP.s:1136 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
/tmp/cclhdxfP.s:1380 .text.HAL_UART_MspInit:000000f0 $d
/tmp/cclhdxfP.s:1390 .text.HAL_UART_MspDeInit:00000000 $t
/tmp/cclhdxfP.s:1396 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
/tmp/cclhdxfP.s:1450 .text.HAL_UART_MspDeInit:0000003c $d
/tmp/cclhdxfP.s:1456 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 $d
primo commit
2023-07-02 17:09:41 +02:00
UNDEFINED SYMBOLS
HAL_PWREx_DisableUCPDDeadBattery
memset
HAL_RCCEx_PeriphCLKConfig
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
v1.2
2025-01-28 19:01:22 +01:00
Error_Handler
HAL_DMA_Init
hdma_adc2
HAL_GPIO_DeInit
HAL_DMA_DeInit
primo commit
2023-07-02 17:09:41 +02:00
HAL_NVIC_DisableIRQ
v1.2
2025-01-28 19:01:22 +01:00
hdma_usart1_rx
hdma_usart1_tx
Reference in New Issue Copy Permalink