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ARM GAS /tmp/cc4Hnewt.s page 1
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1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32g4xx_hal_rcc_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c"
20 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits
21 .align 1
22 .global HAL_RCCEx_PeriphCLKConfig
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_RCCEx_PeriphCLKConfig:
28 .LVL0:
29 .LFB329:
1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ******************************************************************************
3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @file stm32g4xx_hal_rcc_ex.c
4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @author MCD Application Team
5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver.
6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * functionalities RCC extended peripheral:
8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions
9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * + Extended Clock management functions
10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions
11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ******************************************************************************
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @attention
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * Copyright (c) 2019 STMicroelectronics.
16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * All rights reserved.
17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in
19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * the root directory of this software component.
20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ******************************************************************************
22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/
25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #include "stm32g4xx_hal.h"
26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
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30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx
32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCC Extended HAL module driver
33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED
37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/
39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Private defines -----------------------------------------------------------*/
40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants
41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */
44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define DIVIDER_P_UPDATE 0U
46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define DIVIDER_Q_UPDATE 1U
47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define DIVIDER_R_UPDATE 2U
48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define __LSCO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define LSCO_GPIO_PORT GPIOA
51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #define LSCO_PIN GPIO_PIN_2
52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @}
54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Private macros ------------------------------------------------------------*/
57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/
58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/
59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Functions RCCEx Private Functions
60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @}
65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Exported functions --------------------------------------------------------*/
68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions
75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @verbatim
77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions #####
79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** [..]
81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks
82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequencies.
83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** [..]
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including
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87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the backup registers) are set to their reset values.
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @endverbatim
90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Initialize the RCC extended peripherals clocks according to the specified
94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef.
95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * contains a field PeriphClockSelection which can be a combination of the following value
97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock
99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4)
102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5)
103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock
104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4)
108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock
109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock
110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_FDCAN FDCAN peripheral clock (only for devices with FDCAN)
112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock
113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB)
114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC1 and ADC2 peripheral clock
115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC345 ADC3, ADC4 and ADC5 peripheral clock (only for devic
116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_QSPI QuadSPI peripheral clock (only for devices with QuadSP
117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * the RTC clock source: in this case the access to Backup domain is enabled.
120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval HAL status
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
30 .loc 1 124 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 8
33 @ frame_needed = 0, uses_anonymous_args = 0
34 .loc 1 124 1 is_stmt 0 view .LVU1
35 0000 F0B5 push {r4, r5, r6, r7, lr}
36 .LCFI0:
37 .cfi_def_cfa_offset 20
38 .cfi_offset 4, -20
39 .cfi_offset 5, -16
40 .cfi_offset 6, -12
41 .cfi_offset 7, -8
42 .cfi_offset 14, -4
43 0002 83B0 sub sp, sp, #12
44 .LCFI1:
45 .cfi_def_cfa_offset 32
46 0004 0446 mov r4, r0
125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t tmpregister;
47 .loc 1 125 3 is_stmt 1 view .LVU2
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126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t tickstart;
48 .loc 1 126 3 view .LVU3
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */
49 .loc 1 127 3 view .LVU4
50 .LVL1:
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_StatusTypeDef status = HAL_OK; /* Final status */
51 .loc 1 128 3 view .LVU5
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
52 .loc 1 131 3 view .LVU6
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- RTC clock source configuration ----------------------*/
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
53 .loc 1 134 3 view .LVU7
54 .loc 1 134 20 is_stmt 0 view .LVU8
55 0006 0368 ldr r3, [r0]
56 .loc 1 134 5 view .LVU9
57 0008 13F4002F tst r3, #524288
58 000c 69D0 beq .L27
59 .LBB2:
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
60 .loc 1 136 5 is_stmt 1 view .LVU10
61 .LVL2:
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check for RTC Parameters used to output RTCCLK */
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
62 .loc 1 139 5 view .LVU11
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable Power Clock */
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
63 .loc 1 142 5 view .LVU12
64 .loc 1 142 8 is_stmt 0 view .LVU13
65 000e AE4B ldr r3, .L40
66 0010 9B6D ldr r3, [r3, #88]
67 .loc 1 142 7 view .LVU14
68 0012 13F0805F tst r3, #268435456
69 0016 1ED1 bne .L28
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
70 .loc 1 144 7 is_stmt 1 view .LVU15
71 .LBB3:
72 .loc 1 144 7 view .LVU16
73 .loc 1 144 7 view .LVU17
74 0018 AB4B ldr r3, .L40
75 001a 9A6D ldr r2, [r3, #88]
76 001c 42F08052 orr r2, r2, #268435456
77 0020 9A65 str r2, [r3, #88]
78 .loc 1 144 7 view .LVU18
79 0022 9B6D ldr r3, [r3, #88]
80 0024 03F08053 and r3, r3, #268435456
81 0028 0193 str r3, [sp, #4]
82 .loc 1 144 7 view .LVU19
83 002a 019B ldr r3, [sp, #4]
84 .LBE3:
85 .loc 1 144 7 view .LVU20
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145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pwrclkchanged = SET;
86 .loc 1 145 7 view .LVU21
87 .LVL3:
88 .loc 1 145 21 is_stmt 0 view .LVU22
89 002c 0126 movs r6, #1
90 .LVL4:
91 .L3:
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** SET_BIT(PWR->CR1, PWR_CR1_DBP);
92 .loc 1 149 5 is_stmt 1 view .LVU23
93 002e A74A ldr r2, .L40+4
94 0030 1368 ldr r3, [r2]
95 0032 43F48073 orr r3, r3, #256
96 0036 1360 str r3, [r2]
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
97 .loc 1 152 5 view .LVU24
98 .loc 1 152 17 is_stmt 0 view .LVU25
99 0038 FFF7FEFF bl HAL_GetTick
100 .LVL5:
101 .loc 1 152 17 view .LVU26
102 003c 0546 mov r5, r0
103 .LVL6:
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** while((PWR->CR1 & PWR_CR1_DBP) == 0U)
104 .loc 1 154 5 is_stmt 1 view .LVU27
105 .L4:
106 .loc 1 154 36 view .LVU28
107 .loc 1 154 15 is_stmt 0 view .LVU29
108 003e A34B ldr r3, .L40+4
109 0040 1B68 ldr r3, [r3]
110 .loc 1 154 36 view .LVU30
111 0042 13F4807F tst r3, #256
112 0046 08D1 bne .L32
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
113 .loc 1 156 7 is_stmt 1 view .LVU31
114 .loc 1 156 11 is_stmt 0 view .LVU32
115 0048 FFF7FEFF bl HAL_GetTick
116 .LVL7:
2025-01-28 19:01:22 +01:00
117 .loc 1 156 25 discriminator 1 view .LVU33
2023-07-02 17:09:41 +02:00
118 004c 401B subs r0, r0, r5
2025-01-28 19:01:22 +01:00
119 .loc 1 156 9 discriminator 1 view .LVU34
2023-07-02 17:09:41 +02:00
120 004e 0228 cmp r0, #2
121 0050 F5D9 bls .L4
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ret = HAL_TIMEOUT;
122 .loc 1 158 13 view .LVU35
123 0052 0325 movs r5, #3
124 .LVL8:
125 .loc 1 158 13 view .LVU36
126 0054 02E0 b .L5
127 .LVL9:
128 .L28:
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
129 .loc 1 136 22 view .LVU37
130 0056 0026 movs r6, #0
131 0058 E9E7 b .L3
132 .LVL10:
133 .L32:
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
134 .loc 1 136 22 view .LVU38
135 .LBE2:
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_StatusTypeDef status = HAL_OK; /* Final status */
136 .loc 1 127 21 view .LVU39
137 005a 0025 movs r5, #0
138 .LVL11:
139 .L5:
140 .LBB4:
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(ret == HAL_OK)
141 .loc 1 163 5 is_stmt 1 view .LVU40
142 .loc 1 163 7 is_stmt 0 view .LVU41
143 005c 45BB cbnz r5, .L7
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from default */
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL);
144 .loc 1 166 7 is_stmt 1 view .LVU42
145 .loc 1 166 21 is_stmt 0 view .LVU43
146 005e 9A4B ldr r3, .L40
147 0060 D3F89030 ldr r3, [r3, #144]
148 .LVL12:
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection
149 .loc 1 168 7 is_stmt 1 view .LVU44
150 .loc 1 168 9 is_stmt 0 view .LVU45
151 0064 13F44073 ands r3, r3, #768
152 .LVL13:
153 .loc 1 168 9 view .LVU46
2025-06-28 00:58:29 +02:00
154 0068 18D0 beq .L8
2023-07-02 17:09:41 +02:00
155 .loc 1 168 81 discriminator 1 view .LVU47
156 006a 226C ldr r2, [r4, #64]
157 .loc 1 168 49 discriminator 1 view .LVU48
158 006c 9A42 cmp r2, r3
2025-06-28 00:58:29 +02:00
159 006e 12D0 beq .L9
2023-07-02 17:09:41 +02:00
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL));
160 .loc 1 171 9 is_stmt 1 view .LVU49
161 .loc 1 171 23 is_stmt 0 view .LVU50
162 0070 954A ldr r2, .L40
163 0072 D2F89030 ldr r3, [r2, #144]
164 .LVL14:
165 .loc 1 171 21 view .LVU51
166 0076 23F44073 bic r3, r3, #768
167 .LVL15:
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE();
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
168 .loc 1 173 9 is_stmt 1 view .LVU52
169 007a D2F89010 ldr r1, [r2, #144]
170 007e 41F48031 orr r1, r1, #65536
171 0082 C2F89010 str r1, [r2, #144]
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE();
172 .loc 1 174 9 view .LVU53
173 0086 D2F89010 ldr r1, [r2, #144]
174 008a 21F48031 bic r1, r1, #65536
175 008e C2F89010 str r1, [r2, #144]
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC->BDCR = tmpregister;
176 .loc 1 176 9 view .LVU54
177 .loc 1 176 19 is_stmt 0 view .LVU55
178 0092 C2F89030 str r3, [r2, #144]
2025-06-28 00:58:29 +02:00
179 .L9:
2023-07-02 17:09:41 +02:00
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON))
180 .loc 1 180 7 is_stmt 1 view .LVU56
181 .loc 1 180 10 is_stmt 0 view .LVU57
182 0096 13F0010F tst r3, #1
183 009a 10D1 bne .L33
184 .LVL16:
2025-06-28 00:58:29 +02:00
185 .L8:
2023-07-02 17:09:41 +02:00
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get Start Tick*/
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Wait till LSE is ready */
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U)
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ret = HAL_TIMEOUT;
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(ret == HAL_OK)
186 .loc 1 196 7 is_stmt 1 view .LVU58
187 .loc 1 196 9 is_stmt 0 view .LVU59
188 009c 45B9 cbnz r5, .L7
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Apply new RTC clock source selection */
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
189 .loc 1 199 9 is_stmt 1 view .LVU60
190 009e 8A4A ldr r2, .L40
191 00a0 D2F89030 ldr r3, [r2, #144]
192 00a4 23F44073 bic r3, r3, #768
193 00a8 216C ldr r1, [r4, #64]
194 00aa 0B43 orrs r3, r3, r1
195 00ac C2F89030 str r3, [r2, #144]
2025-06-28 00:58:29 +02:00
196 .L7:
197 .LVL17:
2023-07-02 17:09:41 +02:00
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* set overall return value */
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** status = ret;
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* set overall return value */
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** status = ret;
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Restore clock configuration if changed */
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
198 .loc 1 214 5 view .LVU61
199 .loc 1 214 7 is_stmt 0 view .LVU62
200 00b0 C6B1 cbz r6, .L2
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
201 .loc 1 216 7 is_stmt 1 view .LVU63
202 00b2 854A ldr r2, .L40
203 00b4 936D ldr r3, [r2, #88]
204 00b6 23F08053 bic r3, r3, #268435456
205 00ba 9365 str r3, [r2, #88]
206 00bc 12E0 b .L2
207 .LVL18:
208 .L33:
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
209 .loc 1 183 9 view .LVU64
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
210 .loc 1 183 21 is_stmt 0 view .LVU65
211 00be FFF7FEFF bl HAL_GetTick
212 .LVL19:
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
213 .loc 1 183 21 view .LVU66
214 00c2 0746 mov r7, r0
215 .LVL20:
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
216 .loc 1 186 9 is_stmt 1 view .LVU67
217 .L10:
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
218 .loc 1 186 52 view .LVU68
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
219 .loc 1 186 15 is_stmt 0 view .LVU69
220 00c4 804B ldr r3, .L40
221 00c6 D3F89030 ldr r3, [r3, #144]
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
222 .loc 1 186 52 view .LVU70
223 00ca 13F0020F tst r3, #2
2025-06-28 00:58:29 +02:00
224 00ce E5D1 bne .L8
2023-07-02 17:09:41 +02:00
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
225 .loc 1 188 11 is_stmt 1 view .LVU71
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
226 .loc 1 188 15 is_stmt 0 view .LVU72
227 00d0 FFF7FEFF bl HAL_GetTick
228 .LVL21:
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
229 .loc 1 188 29 discriminator 1 view .LVU73
2023-07-02 17:09:41 +02:00
230 00d4 C01B subs r0, r0, r7
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
231 .loc 1 188 13 discriminator 1 view .LVU74
2023-07-02 17:09:41 +02:00
232 00d6 41F28833 movw r3, #5000
233 00da 9842 cmp r0, r3
234 00dc F2D9 bls .L10
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
235 .loc 1 190 17 view .LVU75
236 00de 0325 movs r5, #3
237 .LVL22:
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
238 .loc 1 190 17 view .LVU76
2025-06-28 00:58:29 +02:00
239 00e0 DCE7 b .L8
2023-07-02 17:09:41 +02:00
240 .LVL23:
241 .L27:
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
242 .loc 1 190 17 view .LVU77
243 .LBE4:
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
244 .loc 1 128 21 view .LVU78
245 00e2 0025 movs r5, #0
246 .LVL24:
247 .L2:
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- USART1 clock source configuration -------------------*/
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
248 .loc 1 221 3 is_stmt 1 view .LVU79
249 .loc 1 221 21 is_stmt 0 view .LVU80
250 00e4 2368 ldr r3, [r4]
251 .loc 1 221 5 view .LVU81
252 00e6 13F0010F tst r3, #1
253 00ea 08D0 beq .L12
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
254 .loc 1 224 5 is_stmt 1 view .LVU82
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
255 .loc 1 227 5 view .LVU83
256 00ec 764A ldr r2, .L40
257 00ee D2F88830 ldr r3, [r2, #136]
258 00f2 23F00303 bic r3, r3, #3
259 00f6 6168 ldr r1, [r4, #4]
260 00f8 0B43 orrs r3, r3, r1
261 00fa C2F88830 str r3, [r2, #136]
262 .L12:
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- USART2 clock source configuration -------------------*/
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
263 .loc 1 231 3 view .LVU84
264 .loc 1 231 21 is_stmt 0 view .LVU85
265 00fe 2368 ldr r3, [r4]
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
266 .loc 1 231 5 view .LVU86
267 0100 13F0020F tst r3, #2
268 0104 08D0 beq .L13
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
269 .loc 1 234 5 is_stmt 1 view .LVU87
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
270 .loc 1 237 5 view .LVU88
271 0106 704A ldr r2, .L40
272 0108 D2F88830 ldr r3, [r2, #136]
273 010c 23F00C03 bic r3, r3, #12
274 0110 A168 ldr r1, [r4, #8]
275 0112 0B43 orrs r3, r3, r1
276 0114 C2F88830 str r3, [r2, #136]
277 .L13:
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USART3)
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- USART3 clock source configuration -------------------*/
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
278 .loc 1 243 3 view .LVU89
279 .loc 1 243 21 is_stmt 0 view .LVU90
2023-07-02 17:09:41 +02:00
280 0118 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
281 .loc 1 243 5 view .LVU91
2023-07-02 17:09:41 +02:00
282 011a 13F0040F tst r3, #4
283 011e 08D0 beq .L14
2025-01-28 19:01:22 +01:00
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
284 .loc 1 246 5 is_stmt 1 view .LVU92
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
285 .loc 1 249 5 view .LVU93
2023-07-02 17:09:41 +02:00
286 0120 694A ldr r2, .L40
287 0122 D2F88830 ldr r3, [r2, #136]
288 0126 23F03003 bic r3, r3, #48
289 012a E168 ldr r1, [r4, #12]
290 012c 0B43 orrs r3, r3, r1
291 012e C2F88830 str r3, [r2, #136]
292 .L14:
2025-01-28 19:01:22 +01:00
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USART3 */
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART4)
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- UART4 clock source configuration --------------------*/
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
293 .loc 1 256 3 view .LVU94
294 .loc 1 256 21 is_stmt 0 view .LVU95
2023-07-02 17:09:41 +02:00
295 0132 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
296 .loc 1 256 5 view .LVU96
2023-07-02 17:09:41 +02:00
297 0134 13F0080F tst r3, #8
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
298 0138 08D0 beq .L15
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
299 .loc 1 259 5 is_stmt 1 view .LVU97
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
300 .loc 1 262 5 view .LVU98
2023-07-02 17:09:41 +02:00
301 013a 634A ldr r2, .L40
302 013c D2F88830 ldr r3, [r2, #136]
303 0140 23F0C003 bic r3, r3, #192
304 0144 2169 ldr r1, [r4, #16]
305 0146 0B43 orrs r3, r3, r1
306 0148 C2F88830 str r3, [r2, #136]
307 .L15:
2025-01-28 19:01:22 +01:00
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART4 */
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART5)
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- UART5 clock source configuration --------------------*/
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
2023-07-02 17:09:41 +02:00
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the UART5 clock source */
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART5 */
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- LPUART1 clock source configuration ------------------*/
281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
308 .loc 1 281 3 view .LVU99
309 .loc 1 281 21 is_stmt 0 view .LVU100
2023-07-02 17:09:41 +02:00
310 014c 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
311 .loc 1 281 5 view .LVU101
2023-07-02 17:09:41 +02:00
312 014e 13F0200F tst r3, #32
313 0152 08D0 beq .L16
2025-01-28 19:01:22 +01:00
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
314 .loc 1 284 5 is_stmt 1 view .LVU102
285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the LPUAR1 clock source */
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
315 .loc 1 287 5 view .LVU103
2023-07-02 17:09:41 +02:00
316 0154 5C4A ldr r2, .L40
317 0156 D2F88830 ldr r3, [r2, #136]
318 015a 23F44063 bic r3, r3, #3072
319 015e 6169 ldr r1, [r4, #20]
320 0160 0B43 orrs r3, r3, r1
321 0162 C2F88830 str r3, [r2, #136]
322 .L16:
2025-01-28 19:01:22 +01:00
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- I2C1 clock source configuration ---------------------*/
291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
323 .loc 1 291 3 view .LVU104
324 .loc 1 291 21 is_stmt 0 view .LVU105
2023-07-02 17:09:41 +02:00
325 0166 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
326 .loc 1 291 5 view .LVU106
2023-07-02 17:09:41 +02:00
327 0168 13F0400F tst r3, #64
328 016c 08D0 beq .L17
2025-01-28 19:01:22 +01:00
292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
329 .loc 1 294 5 is_stmt 1 view .LVU107
295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */
297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
330 .loc 1 297 5 view .LVU108
2023-07-02 17:09:41 +02:00
331 016e 564A ldr r2, .L40
332 0170 D2F88830 ldr r3, [r2, #136]
333 0174 23F44053 bic r3, r3, #12288
334 0178 A169 ldr r1, [r4, #24]
335 017a 0B43 orrs r3, r3, r1
336 017c C2F88830 str r3, [r2, #136]
337 .L17:
2025-01-28 19:01:22 +01:00
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- I2C2 clock source configuration ---------------------*/
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
338 .loc 1 301 3 view .LVU109
339 .loc 1 301 21 is_stmt 0 view .LVU110
2023-07-02 17:09:41 +02:00
340 0180 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
341 .loc 1 301 5 view .LVU111
2023-07-02 17:09:41 +02:00
342 0182 13F0800F tst r3, #128
343 0186 08D0 beq .L18
2025-01-28 19:01:22 +01:00
302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
344 .loc 1 304 5 is_stmt 1 view .LVU112
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the I2C2 clock source */
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
345 .loc 1 307 5 view .LVU113
2023-07-02 17:09:41 +02:00
346 0188 4F4A ldr r2, .L40
347 018a D2F88830 ldr r3, [r2, #136]
348 018e 23F44043 bic r3, r3, #49152
349 0192 E169 ldr r1, [r4, #28]
350 0194 0B43 orrs r3, r3, r1
351 0196 C2F88830 str r3, [r2, #136]
352 .L18:
2025-01-28 19:01:22 +01:00
308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C3)
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- I2C3 clock source configuration ---------------------*/
312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
353 .loc 1 312 3 view .LVU114
354 .loc 1 312 21 is_stmt 0 view .LVU115
2023-07-02 17:09:41 +02:00
355 019a 2368 ldr r3, [r4]
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
356 .loc 1 312 5 view .LVU116
357 019c 13F4807F tst r3, #256
358 01a0 08D0 beq .L19
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
359 .loc 1 315 5 is_stmt 1 view .LVU117
316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the I2C3 clock source */
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
360 .loc 1 318 5 view .LVU118
2023-07-02 17:09:41 +02:00
361 01a2 494A ldr r2, .L40
362 01a4 D2F88830 ldr r3, [r2, #136]
363 01a8 23F44033 bic r3, r3, #196608
364 01ac 216A ldr r1, [r4, #32]
365 01ae 0B43 orrs r3, r3, r1
366 01b0 C2F88830 str r3, [r2, #136]
367 .L19:
2025-01-28 19:01:22 +01:00
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C3 */
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C4)
2023-07-02 17:09:41 +02:00
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- I2C4 clock source configuration ---------------------*/
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
2023-07-02 17:09:41 +02:00
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the I2C4 clock source */
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C4 */
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- LPTIM1 clock source configuration ---------------------*/
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
368 .loc 1 337 3 view .LVU119
369 .loc 1 337 21 is_stmt 0 view .LVU120
2023-07-02 17:09:41 +02:00
370 01b4 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
371 .loc 1 337 5 view .LVU121
2023-07-02 17:09:41 +02:00
372 01b6 13F4007F tst r3, #512
373 01ba 08D0 beq .L20
2025-01-28 19:01:22 +01:00
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_LPTIM1CLKSOURCE(PeriphClkInit->Lptim1ClockSelection));
374 .loc 1 340 5 is_stmt 1 view .LVU122
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the LPTIM1 clock source */
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
375 .loc 1 343 5 view .LVU123
2023-07-02 17:09:41 +02:00
376 01bc 424A ldr r2, .L40
377 01be D2F88830 ldr r3, [r2, #136]
378 01c2 23F44023 bic r3, r3, #786432
379 01c6 616A ldr r1, [r4, #36]
380 01c8 0B43 orrs r3, r3, r1
381 01ca C2F88830 str r3, [r2, #136]
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
382 .L20:
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SAI1)
347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- SAI1 clock source configuration ---------------------*/
348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
383 .loc 1 348 3 view .LVU124
384 .loc 1 348 21 is_stmt 0 view .LVU125
2023-07-02 17:09:41 +02:00
385 01ce 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
386 .loc 1 348 5 view .LVU126
2023-07-02 17:09:41 +02:00
387 01d0 13F4806F tst r3, #1024
388 01d4 0CD0 beq .L21
2025-01-28 19:01:22 +01:00
349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
389 .loc 1 351 5 is_stmt 1 view .LVU127
352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the SAI1 interface clock source */
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
390 .loc 1 354 5 view .LVU128
2023-07-02 17:09:41 +02:00
391 01d6 3C4A ldr r2, .L40
392 01d8 D2F88830 ldr r3, [r2, #136]
393 01dc 23F44013 bic r3, r3, #3145728
394 01e0 A16A ldr r1, [r4, #40]
395 01e2 0B43 orrs r3, r3, r1
396 01e4 C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLL)
397 .loc 1 356 5 view .LVU129
398 .loc 1 356 21 is_stmt 0 view .LVU130
2023-07-02 17:09:41 +02:00
399 01e8 A36A ldr r3, [r4, #40]
2025-01-28 19:01:22 +01:00
400 .loc 1 356 7 view .LVU131
2023-07-02 17:09:41 +02:00
401 01ea B3F5801F cmp r3, #1048576
402 01ee 57D0 beq .L34
403 .L21:
2025-01-28 19:01:22 +01:00
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SAI1 */
364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SPI_I2S_SUPPORT)
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- I2S clock source configuration ---------------------*/
367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S)
404 .loc 1 367 3 is_stmt 1 view .LVU132
405 .loc 1 367 21 is_stmt 0 view .LVU133
2023-07-02 17:09:41 +02:00
406 01f0 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
407 .loc 1 367 5 view .LVU134
2023-07-02 17:09:41 +02:00
408 01f2 13F4006F tst r3, #2048
409 01f6 0CD0 beq .L22
2025-01-28 19:01:22 +01:00
368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
410 .loc 1 370 5 is_stmt 1 view .LVU135
371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the I2S interface clock source */
373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
411 .loc 1 373 5 view .LVU136
2023-07-02 17:09:41 +02:00
412 01f8 334A ldr r2, .L40
413 01fa D2F88830 ldr r3, [r2, #136]
414 01fe 23F44003 bic r3, r3, #12582912
415 0202 E16A ldr r1, [r4, #44]
416 0204 0B43 orrs r3, r3, r1
417 0206 C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLL)
418 .loc 1 375 5 view .LVU137
419 .loc 1 375 21 is_stmt 0 view .LVU138
2023-07-02 17:09:41 +02:00
420 020a E36A ldr r3, [r4, #44]
2025-01-28 19:01:22 +01:00
421 .loc 1 375 7 view .LVU139
2023-07-02 17:09:41 +02:00
422 020c B3F5800F cmp r3, #4194304
423 0210 4BD0 beq .L35
424 .L22:
2025-01-28 19:01:22 +01:00
376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SPI_I2S_SUPPORT */
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(FDCAN1)
385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- FDCAN clock source configuration ---------------------*/
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
425 .loc 1 386 3 is_stmt 1 view .LVU140
426 .loc 1 386 21 is_stmt 0 view .LVU141
2023-07-02 17:09:41 +02:00
427 0212 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
428 .loc 1 386 5 view .LVU142
2023-07-02 17:09:41 +02:00
429 0214 13F4805F tst r3, #4096
430 0218 0CD0 beq .L23
2025-01-28 19:01:22 +01:00
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_FDCANCLKSOURCE(PeriphClkInit->FdcanClockSelection));
431 .loc 1 389 5 is_stmt 1 view .LVU143
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the FDCAN interface clock source */
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
432 .loc 1 392 5 view .LVU144
2023-07-02 17:09:41 +02:00
433 021a 2B4A ldr r2, .L40
434 021c D2F88830 ldr r3, [r2, #136]
435 0220 23F04073 bic r3, r3, #50331648
436 0224 216B ldr r1, [r4, #48]
437 0226 0B43 orrs r3, r3, r1
438 0228 C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->FdcanClockSelection == RCC_FDCANCLKSOURCE_PLL)
439 .loc 1 394 5 view .LVU145
440 .loc 1 394 21 is_stmt 0 view .LVU146
2023-07-02 17:09:41 +02:00
441 022c 236B ldr r3, [r4, #48]
2025-01-28 19:01:22 +01:00
442 .loc 1 394 7 view .LVU147
2023-07-02 17:09:41 +02:00
443 022e B3F1807F cmp r3, #16777216
444 0232 3FD0 beq .L36
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2023-07-02 17:09:41 +02:00
445 .L23:
2025-01-28 19:01:22 +01:00
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* FDCAN1 */
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USB)
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- USB clock source configuration ----------------------*/
405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB))
446 .loc 1 405 3 is_stmt 1 view .LVU148
447 .loc 1 405 21 is_stmt 0 view .LVU149
2023-07-02 17:09:41 +02:00
448 0234 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
449 .loc 1 405 5 view .LVU150
2023-07-02 17:09:41 +02:00
450 0236 13F4005F tst r3, #8192
451 023a 0CD0 beq .L24
2025-01-28 19:01:22 +01:00
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
452 .loc 1 407 5 is_stmt 1 view .LVU151
408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
453 .loc 1 408 5 view .LVU152
2023-07-02 17:09:41 +02:00
454 023c 224A ldr r2, .L40
455 023e D2F88830 ldr r3, [r2, #136]
456 0242 23F04063 bic r3, r3, #201326592
457 0246 616B ldr r1, [r4, #52]
458 0248 0B43 orrs r3, r3, r1
459 024a C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL)
460 .loc 1 410 5 view .LVU153
461 .loc 1 410 21 is_stmt 0 view .LVU154
2023-07-02 17:09:41 +02:00
462 024e 636B ldr r3, [r4, #52]
2025-01-28 19:01:22 +01:00
463 .loc 1 410 7 view .LVU155
2023-07-02 17:09:41 +02:00
464 0250 B3F1006F cmp r3, #134217728
465 0254 33D0 beq .L37
466 .L24:
2025-01-28 19:01:22 +01:00
411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USB */
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- RNG clock source configuration ----------------------*/
420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG))
467 .loc 1 420 3 is_stmt 1 view .LVU156
468 .loc 1 420 21 is_stmt 0 view .LVU157
2023-07-02 17:09:41 +02:00
469 0256 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
470 .loc 1 420 5 view .LVU158
2023-07-02 17:09:41 +02:00
471 0258 13F4804F tst r3, #16384
472 025c 0CD0 beq .L25
2025-01-28 19:01:22 +01:00
421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection));
473 .loc 1 422 5 is_stmt 1 view .LVU159
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
474 .loc 1 423 5 view .LVU160
2023-07-02 17:09:41 +02:00
475 025e 1A4A ldr r2, .L40
476 0260 D2F88830 ldr r3, [r2, #136]
477 0264 23F04063 bic r3, r3, #201326592
478 0268 A16B ldr r1, [r4, #56]
479 026a 0B43 orrs r3, r3, r1
480 026c C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL)
481 .loc 1 425 5 view .LVU161
482 .loc 1 425 21 is_stmt 0 view .LVU162
2023-07-02 17:09:41 +02:00
483 0270 A36B ldr r3, [r4, #56]
2025-01-28 19:01:22 +01:00
484 .loc 1 425 7 view .LVU163
2023-07-02 17:09:41 +02:00
485 0272 B3F1006F cmp r3, #134217728
486 0276 2BD0 beq .L38
487 .L25:
2025-01-28 19:01:22 +01:00
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- ADC12 clock source configuration ----------------------*/
433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12)
488 .loc 1 433 3 is_stmt 1 view .LVU164
489 .loc 1 433 21 is_stmt 0 view .LVU165
2023-07-02 17:09:41 +02:00
490 0278 2368 ldr r3, [r4]
2025-01-28 19:01:22 +01:00
491 .loc 1 433 5 view .LVU166
2023-07-02 17:09:41 +02:00
492 027a 13F4004F tst r3, #32768
493 027e 0CD0 beq .L26
2025-01-28 19:01:22 +01:00
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC12CLKSOURCE(PeriphClkInit->Adc12ClockSelection));
494 .loc 1 436 5 is_stmt 1 view .LVU167
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the ADC12 interface clock source */
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection);
495 .loc 1 439 5 view .LVU168
2023-07-02 17:09:41 +02:00
496 0280 114A ldr r2, .L40
497 0282 D2F88830 ldr r3, [r2, #136]
498 0286 23F04053 bic r3, r3, #805306368
499 028a E16B ldr r1, [r4, #60]
500 028c 0B43 orrs r3, r3, r1
501 028e C2F88830 str r3, [r2, #136]
2025-01-28 19:01:22 +01:00
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->Adc12ClockSelection == RCC_ADC12CLKSOURCE_PLL)
502 .loc 1 441 5 view .LVU169
503 .loc 1 441 21 is_stmt 0 view .LVU170
2023-07-02 17:09:41 +02:00
504 0292 E36B ldr r3, [r4, #60]
2025-01-28 19:01:22 +01:00
505 .loc 1 441 7 view .LVU171
2023-07-02 17:09:41 +02:00
506 0294 B3F1805F cmp r3, #268435456
507 0298 1FD0 beq .L39
508 .L26:
2025-01-28 19:01:22 +01:00
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLLADCCLK output */
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_ADCCLK);
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(ADC345_COMMON)
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- ADC345 clock source configuration ----------------------*/
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC345) == RCC_PERIPHCLK_ADC345)
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC345CLKSOURCE(PeriphClkInit->Adc345ClockSelection));
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the ADC345 interface clock source */
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_ADC345_CONFIG(PeriphClkInit->Adc345ClockSelection);
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->Adc345ClockSelection == RCC_ADC345CLKSOURCE_PLL)
459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLLADCCLK output */
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_ADCCLK);
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* ADC345_COMMON */
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(QUADSPI)
467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /*-------------------------- QuadSPIx clock source configuration ----------------*/
469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_QSPICLKSOURCE(PeriphClkInit->QspiClockSelection));
2023-07-02 17:09:41 +02:00
473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the QuadSPI clock source */
475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClkInit->QspiClockSelection == RCC_QSPICLKSOURCE_PLL)
478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable PLL48M1CLK output */
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* QUADSPI */
485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** return status;
509 .loc 1 486 3 is_stmt 1 view .LVU172
487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
510 .loc 1 487 1 is_stmt 0 view .LVU173
2023-07-02 17:09:41 +02:00
511 029a 2846 mov r0, r5
512 029c 03B0 add sp, sp, #12
513 .LCFI2:
514 .cfi_remember_state
515 .cfi_def_cfa_offset 20
516 @ sp needed
517 029e F0BD pop {r4, r5, r6, r7, pc}
518 .LVL25:
519 .L34:
520 .LCFI3:
521 .cfi_restore_state
2025-01-28 19:01:22 +01:00
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
522 .loc 1 359 7 is_stmt 1 view .LVU174
2023-07-02 17:09:41 +02:00
523 02a0 D368 ldr r3, [r2, #12]
524 02a2 43F48013 orr r3, r3, #1048576
525 02a6 D360 str r3, [r2, #12]
526 02a8 A2E7 b .L21
527 .L35:
2025-01-28 19:01:22 +01:00
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
528 .loc 1 378 7 view .LVU175
2023-07-02 17:09:41 +02:00
529 02aa D368 ldr r3, [r2, #12]
530 02ac 43F48013 orr r3, r3, #1048576
531 02b0 D360 str r3, [r2, #12]
532 02b2 AEE7 b .L22
533 .L36:
2025-01-28 19:01:22 +01:00
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
534 .loc 1 397 7 view .LVU176
2023-07-02 17:09:41 +02:00
535 02b4 D368 ldr r3, [r2, #12]
536 02b6 43F48013 orr r3, r3, #1048576
537 02ba D360 str r3, [r2, #12]
538 02bc BAE7 b .L23
539 .L37:
2025-01-28 19:01:22 +01:00
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
540 .loc 1 413 7 view .LVU177
2023-07-02 17:09:41 +02:00
541 02be D368 ldr r3, [r2, #12]
542 02c0 43F48013 orr r3, r3, #1048576
543 02c4 D360 str r3, [r2, #12]
544 02c6 C6E7 b .L24
545 .L41:
546 .align 2
547 .L40:
548 02c8 00100240 .word 1073876992
549 02cc 00700040 .word 1073770496
550 .L38:
2025-01-28 19:01:22 +01:00
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
551 .loc 1 428 7 view .LVU178
2023-07-02 17:09:41 +02:00
552 02d0 D368 ldr r3, [r2, #12]
553 02d2 43F48013 orr r3, r3, #1048576
554 02d6 D360 str r3, [r2, #12]
555 02d8 CEE7 b .L25
556 .L39:
2025-01-28 19:01:22 +01:00
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
557 .loc 1 444 7 view .LVU179
2023-07-02 17:09:41 +02:00
558 02da D368 ldr r3, [r2, #12]
559 02dc 43F48033 orr r3, r3, #65536
560 02e0 D360 str r3, [r2, #12]
561 02e2 DAE7 b .L26
562 .cfi_endproc
563 .LFE329:
565 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits
566 .align 1
567 .global HAL_RCCEx_GetPeriphCLKConfig
568 .syntax unified
569 .thumb
570 .thumb_func
572 HAL_RCCEx_GetPeriphCLKConfig:
573 .LVL26:
574 .LFB330:
2025-01-28 19:01:22 +01:00
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal RCC configuration registers.
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * clocks(USART1, USART2, USART3, UART4, UART5, LPUART1, I2C1, I2C2, I2C3, I2C4,
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * LPTIM1, SAI1, I2Sx, FDCANx, USB, RNG, ADCx, RTC, QSPI).
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
575 .loc 1 498 1 view -0
2023-07-02 17:09:41 +02:00
576 .cfi_startproc
577 @ args = 0, pretend = 0, frame = 0
578 @ frame_needed = 0, uses_anonymous_args = 0
579 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/
2023-07-02 17:09:41 +02:00
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(STM32G474xx) || defined(STM32G484xx)
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_UART5 | \
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C4 | \
507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_QSPI | \
510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G414xx)
513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHC
515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_I2S | RCC_PERIPHC
516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_ADC12 | RCC_PERIPHCLK_RTC;
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G491xx) || defined(STM32G4A1xx)
2023-07-02 17:09:41 +02:00
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_UART5 | \
522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_QSPI | \
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G473xx) || defined(STM32G483xx)
529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_UART5 | \
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C4 | \
534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_QSPI | \
537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G471xx)
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_UART5 | \
543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C4 | \
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G431xx) || defined(STM32G441xx)
550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
580 .loc 1 551 3 view .LVU181
581 .loc 1 551 39 is_stmt 0 view .LVU182
2023-07-02 17:09:41 +02:00
582 0000 294B ldr r3, .L43
583 0002 0360 str r3, [r0]
2025-01-28 19:01:22 +01:00
552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32G411xB) || defined(STM32G411xC)
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_I2S | RCC_PERIPHCL
561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC12 | RCC_PERIPHCL
562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #elif defined(STM32GBK1CB)
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCL
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCL
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCL
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB | RCC_PERIPHCL
569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** RCC_PERIPHCLK_RTC;
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* STM32G474xx || STM32G484xx */
572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the USART1 clock source ---------------------------------------------*/
575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
584 .loc 1 575 3 is_stmt 1 view .LVU183
585 .loc 1 575 42 is_stmt 0 view .LVU184
2023-07-02 17:09:41 +02:00
586 0004 294B ldr r3, .L43+4
587 0006 D3F88820 ldr r2, [r3, #136]
588 000a 02F00302 and r2, r2, #3
2025-01-28 19:01:22 +01:00
589 .loc 1 575 40 view .LVU185
2023-07-02 17:09:41 +02:00
590 000e 4260 str r2, [r0, #4]
2025-01-28 19:01:22 +01:00
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
591 .loc 1 577 3 is_stmt 1 view .LVU186
592 .loc 1 577 42 is_stmt 0 view .LVU187
2023-07-02 17:09:41 +02:00
593 0010 D3F88820 ldr r2, [r3, #136]
594 0014 02F00C02 and r2, r2, #12
2025-01-28 19:01:22 +01:00
595 .loc 1 577 40 view .LVU188
2023-07-02 17:09:41 +02:00
596 0018 8260 str r2, [r0, #8]
2025-01-28 19:01:22 +01:00
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USART3)
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the USART3 clock source ---------------------------------------------*/
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
597 .loc 1 581 3 is_stmt 1 view .LVU189
598 .loc 1 581 42 is_stmt 0 view .LVU190
2023-07-02 17:09:41 +02:00
599 001a D3F88820 ldr r2, [r3, #136]
600 001e 02F03002 and r2, r2, #48
2025-01-28 19:01:22 +01:00
601 .loc 1 581 40 view .LVU191
2023-07-02 17:09:41 +02:00
602 0022 C260 str r2, [r0, #12]
2025-01-28 19:01:22 +01:00
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USART3 */
583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART4)
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the UART4 clock source ----------------------------------------------*/
586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE();
603 .loc 1 586 3 is_stmt 1 view .LVU192
604 .loc 1 586 42 is_stmt 0 view .LVU193
2023-07-02 17:09:41 +02:00
605 0024 D3F88820 ldr r2, [r3, #136]
606 0028 02F0C002 and r2, r2, #192
2025-01-28 19:01:22 +01:00
607 .loc 1 586 40 view .LVU194
2023-07-02 17:09:41 +02:00
608 002c 0261 str r2, [r0, #16]
2025-01-28 19:01:22 +01:00
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART4 */
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART5)
590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the UART5 clock source ----------------------------------------------*/
591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE();
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART5 */
593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the LPUART1 clock source --------------------------------------------*/
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE();
609 .loc 1 595 3 is_stmt 1 view .LVU195
610 .loc 1 595 42 is_stmt 0 view .LVU196
2023-07-02 17:09:41 +02:00
611 002e D3F88820 ldr r2, [r3, #136]
612 0032 02F44062 and r2, r2, #3072
2025-01-28 19:01:22 +01:00
613 .loc 1 595 40 view .LVU197
2023-07-02 17:09:41 +02:00
614 0036 4261 str r2, [r0, #20]
2025-01-28 19:01:22 +01:00
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
615 .loc 1 598 3 is_stmt 1 view .LVU198
616 .loc 1 598 42 is_stmt 0 view .LVU199
2023-07-02 17:09:41 +02:00
617 0038 D3F88820 ldr r2, [r3, #136]
618 003c 02F44052 and r2, r2, #12288
2025-01-28 19:01:22 +01:00
619 .loc 1 598 40 view .LVU200
2023-07-02 17:09:41 +02:00
620 0040 8261 str r2, [r0, #24]
2025-01-28 19:01:22 +01:00
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the I2C2 clock source ----------------------------------------------*/
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE();
621 .loc 1 601 3 is_stmt 1 view .LVU201
622 .loc 1 601 42 is_stmt 0 view .LVU202
2023-07-02 17:09:41 +02:00
623 0042 D3F88820 ldr r2, [r3, #136]
624 0046 02F44042 and r2, r2, #49152
2025-01-28 19:01:22 +01:00
625 .loc 1 601 40 view .LVU203
2023-07-02 17:09:41 +02:00
626 004a C261 str r2, [r0, #28]
2025-01-28 19:01:22 +01:00
602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C3)
604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the I2C3 clock source -----------------------------------------------*/
605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE();
627 .loc 1 605 3 is_stmt 1 view .LVU204
628 .loc 1 605 42 is_stmt 0 view .LVU205
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2023-07-02 17:09:41 +02:00
629 004c D3F88820 ldr r2, [r3, #136]
630 0050 02F44032 and r2, r2, #196608
2025-01-28 19:01:22 +01:00
631 .loc 1 605 40 view .LVU206
2023-07-02 17:09:41 +02:00
632 0054 0262 str r2, [r0, #32]
2025-01-28 19:01:22 +01:00
606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C3 */
607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C4)
609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the I2C4 clock source -----------------------------------------------*/
610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->I2c4ClockSelection = __HAL_RCC_GET_I2C4_SOURCE();
611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C4 */
612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the LPTIM1 clock source ---------------------------------------------*/
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE();
633 .loc 1 614 3 is_stmt 1 view .LVU207
634 .loc 1 614 42 is_stmt 0 view .LVU208
2023-07-02 17:09:41 +02:00
635 0056 D3F88820 ldr r2, [r3, #136]
636 005a 02F44022 and r2, r2, #786432
2025-01-28 19:01:22 +01:00
637 .loc 1 614 40 view .LVU209
2023-07-02 17:09:41 +02:00
638 005e 4262 str r2, [r0, #36]
2025-01-28 19:01:22 +01:00
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SAI1)
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the SAI1 clock source -----------------------------------------------*/
618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE();
639 .loc 1 618 3 is_stmt 1 view .LVU210
640 .loc 1 618 42 is_stmt 0 view .LVU211
2023-07-02 17:09:41 +02:00
641 0060 D3F88820 ldr r2, [r3, #136]
642 0064 02F44012 and r2, r2, #3145728
2025-01-28 19:01:22 +01:00
643 .loc 1 618 40 view .LVU212
2023-07-02 17:09:41 +02:00
644 0068 8262 str r2, [r0, #40]
2025-01-28 19:01:22 +01:00
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SAI1 */
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SPI_I2S_SUPPORT)
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the I2S clock source -----------------------------------------------*/
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->I2sClockSelection = __HAL_RCC_GET_I2S_SOURCE();
645 .loc 1 623 3 is_stmt 1 view .LVU213
646 .loc 1 623 41 is_stmt 0 view .LVU214
2023-07-02 17:09:41 +02:00
647 006a D3F88820 ldr r2, [r3, #136]
648 006e 02F44002 and r2, r2, #12582912
2025-01-28 19:01:22 +01:00
649 .loc 1 623 39 view .LVU215
2023-07-02 17:09:41 +02:00
650 0072 C262 str r2, [r0, #44]
2025-01-28 19:01:22 +01:00
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SPI_I2S_SUPPORT */
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(FDCAN1)
627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the FDCAN clock source -----------------------------------------------*/
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->FdcanClockSelection = __HAL_RCC_GET_FDCAN_SOURCE();
651 .loc 1 628 3 is_stmt 1 view .LVU216
652 .loc 1 628 43 is_stmt 0 view .LVU217
2023-07-02 17:09:41 +02:00
653 0074 D3F88820 ldr r2, [r3, #136]
654 0078 02F04072 and r2, r2, #50331648
2025-01-28 19:01:22 +01:00
655 .loc 1 628 41 view .LVU218
2023-07-02 17:09:41 +02:00
656 007c 0263 str r2, [r0, #48]
2025-01-28 19:01:22 +01:00
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* FDCAN1 */
630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USB)
632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the USB clock source ------------------------------------------------*/
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
657 .loc 1 633 3 is_stmt 1 view .LVU219
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
658 .loc 1 633 40 is_stmt 0 view .LVU220
2023-07-02 17:09:41 +02:00
659 007e D3F88820 ldr r2, [r3, #136]
660 0082 02F04062 and r2, r2, #201326592
2025-01-28 19:01:22 +01:00
661 .loc 1 633 38 view .LVU221
2023-07-02 17:09:41 +02:00
662 0086 4263 str r2, [r0, #52]
2025-01-28 19:01:22 +01:00
634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USB */
635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the RNG clock source ------------------------------------------------*/
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->RngClockSelection = __HAL_RCC_GET_RNG_SOURCE();
663 .loc 1 637 3 is_stmt 1 view .LVU222
664 .loc 1 637 40 is_stmt 0 view .LVU223
2023-07-02 17:09:41 +02:00
665 0088 D3F88820 ldr r2, [r3, #136]
666 008c 02F04062 and r2, r2, #201326592
2025-01-28 19:01:22 +01:00
667 .loc 1 637 38 view .LVU224
2023-07-02 17:09:41 +02:00
668 0090 8263 str r2, [r0, #56]
2025-01-28 19:01:22 +01:00
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the ADC12 clock source -----------------------------------------------*/
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Adc12ClockSelection = __HAL_RCC_GET_ADC12_SOURCE();
669 .loc 1 640 3 is_stmt 1 view .LVU225
670 .loc 1 640 44 is_stmt 0 view .LVU226
2023-07-02 17:09:41 +02:00
671 0092 D3F88820 ldr r2, [r3, #136]
672 0096 02F04052 and r2, r2, #805306368
2025-01-28 19:01:22 +01:00
673 .loc 1 640 42 view .LVU227
2023-07-02 17:09:41 +02:00
674 009a C263 str r2, [r0, #60]
2025-01-28 19:01:22 +01:00
641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(ADC345_COMMON)
643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the ADC345 clock source ----------------------------------------------*/
644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->Adc345ClockSelection = __HAL_RCC_GET_ADC345_SOURCE();
645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* ADC345_COMMON */
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(QUADSPI)
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the QuadSPIclock source --------------------------------------------*/
649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->QspiClockSelection = __HAL_RCC_GET_QSPI_SOURCE();
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* QUADSPI */
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the RTC clock source ------------------------------------------------*/
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
675 .loc 1 653 3 is_stmt 1 view .LVU228
676 .loc 1 653 42 is_stmt 0 view .LVU229
2023-07-02 17:09:41 +02:00
677 009c D3F89030 ldr r3, [r3, #144]
678 00a0 03F44073 and r3, r3, #768
2025-01-28 19:01:22 +01:00
679 .loc 1 653 40 view .LVU230
2023-07-02 17:09:41 +02:00
680 00a4 0364 str r3, [r0, #64]
2025-01-28 19:01:22 +01:00
654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
681 .loc 1 655 1 view .LVU231
2023-07-02 17:09:41 +02:00
682 00a6 7047 bx lr
683 .L44:
684 .align 2
685 .L43:
686 00a8 EFFF0800 .word 589807
687 00ac 00100240 .word 1073876992
688 .cfi_endproc
689 .LFE330:
691 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits
692 .align 1
693 .global HAL_RCCEx_GetPeriphCLKFreq
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2025-01-28 19:01:22 +01:00
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694 .syntax unified
695 .thumb
696 .thumb_func
698 HAL_RCCEx_GetPeriphCLKFreq:
699 .LVL27:
700 .LFB331:
2025-01-28 19:01:22 +01:00
656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Return the peripheral clock frequency for peripherals with clock source from PLL
659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note Return 0 if peripheral clock identifier not managed by this API
660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This parameter can be one of the following values:
662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock
663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4)
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5)
667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock
668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4)
672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock
673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S SPI peripheral clock
675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_FDCAN FDCAN peripheral clock (only for devices with FDCAN)
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB)
678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC1 and ADC2 peripheral clock
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC345 ADC3, ADC4 and ADC5 peripheral clock (only for devic
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_QSPI QSPI peripheral clock (only for devices with QSPI)
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval Frequency in Hz
683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
701 .loc 1 685 1 is_stmt 1 view -0
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702 .cfi_startproc
703 @ args = 0, pretend = 0, frame = 0
704 @ frame_needed = 0, uses_anonymous_args = 0
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705 .loc 1 685 1 is_stmt 0 view .LVU233
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706 0000 08B5 push {r3, lr}
707 .LCFI4:
708 .cfi_def_cfa_offset 8
709 .cfi_offset 3, -8
710 .cfi_offset 14, -4
2025-01-28 19:01:22 +01:00
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t frequency = 0U;
711 .loc 1 686 3 is_stmt 1 view .LVU234
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712 .LVL28:
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687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
713 .loc 1 687 3 view .LVU235
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t pllvco, plln, pllp;
714 .loc 1 688 3 view .LVU236
689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
715 .loc 1 691 3 view .LVU237
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2025-01-28 19:01:22 +01:00
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(PeriphClk == RCC_PERIPHCLK_RTC)
716 .loc 1 693 3 view .LVU238
717 .loc 1 693 5 is_stmt 0 view .LVU239
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718 0002 B0F5002F cmp r0, #524288
719 0006 43D0 beq .L137
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694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current RTC source */
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE();
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_RTCCLKSOURCE_LSE))
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if ((HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)) && (srcclk == RCC_RTCCLKSOURCE_LSI))
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSI_VALUE;
707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_RTCCLKSOURCE_HSE_DIV32))
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U;
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for RTC*/
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Other external peripheral clock source than RTC */
722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Compute PLL clock input */
724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI) /* HSI ? */
720 .loc 1 724 5 is_stmt 1 view .LVU240
721 .loc 1 724 8 is_stmt 0 view .LVU241
722 0008 A84B ldr r3, .L170
2023-07-02 17:09:41 +02:00
723 000a DB68 ldr r3, [r3, #12]
724 000c 03F00303 and r3, r3, #3
2025-01-28 19:01:22 +01:00
725 .loc 1 724 7 view .LVU242
2023-07-02 17:09:41 +02:00
726 0010 022B cmp r3, #2
727 0012 61D0 beq .L138
2025-01-28 19:01:22 +01:00
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = HSI_VALUE;
729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = 0U;
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) /* HSE ? */
728 .loc 1 735 10 is_stmt 1 view .LVU243
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
729 .loc 1 735 13 is_stmt 0 view .LVU244
730 0014 A54B ldr r3, .L170
2023-07-02 17:09:41 +02:00
731 0016 DB68 ldr r3, [r3, #12]
732 0018 03F00303 and r3, r3, #3
2025-01-28 19:01:22 +01:00
733 .loc 1 735 12 view .LVU245
2023-07-02 17:09:41 +02:00
734 001c 032B cmp r3, #3
735 001e 62D0 beq .L139
2025-01-28 19:01:22 +01:00
736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = HSE_VALUE;
740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = 0U;
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else /* No source */
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = 0U;
736 .loc 1 748 14 view .LVU246
2023-07-02 17:09:41 +02:00
737 0020 0022 movs r2, #0
738 .L51:
739 .LVL29:
2025-01-28 19:01:22 +01:00
749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLL Source) / PLLM */
752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U));
740 .loc 1 752 5 is_stmt 1 view .LVU247
741 .loc 1 752 26 is_stmt 0 view .LVU248
742 0022 A24B ldr r3, .L170
2023-07-02 17:09:41 +02:00
743 0024 DB68 ldr r3, [r3, #12]
2025-01-28 19:01:22 +01:00
744 .loc 1 752 67 view .LVU249
2023-07-02 17:09:41 +02:00
745 0026 C3F30313 ubfx r3, r3, #4, #4
2025-01-28 19:01:22 +01:00
746 .loc 1 752 92 view .LVU250
2023-07-02 17:09:41 +02:00
747 002a 0133 adds r3, r3, #1
2025-01-28 19:01:22 +01:00
748 .loc 1 752 12 view .LVU251
2023-07-02 17:09:41 +02:00
749 002c B2FBF3F2 udiv r2, r2, r3
750 .LVL30:
2025-01-28 19:01:22 +01:00
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** switch(PeriphClk)
751 .loc 1 754 5 is_stmt 1 view .LVU252
2023-07-02 17:09:41 +02:00
752 0030 B0F5807F cmp r0, #256
2025-01-28 19:01:22 +01:00
753 0034 00F0AB81 beq .L52
2023-07-02 17:09:41 +02:00
754 0038 7AD8 bhi .L53
755 003a 2028 cmp r0, #32
756 003c 5AD8 bhi .L54
757 003e 0028 cmp r0, #0
2025-01-28 19:01:22 +01:00
758 0040 00F0B982 beq .L108
2023-07-02 17:09:41 +02:00
759 0044 0138 subs r0, r0, #1
760 .LVL31:
2025-01-28 19:01:22 +01:00
761 .loc 1 754 5 is_stmt 0 view .LVU253
2023-07-02 17:09:41 +02:00
762 0046 1F28 cmp r0, #31
2025-01-28 19:01:22 +01:00
763 0048 00F2B782 bhi .L109
2023-07-02 17:09:41 +02:00
764 004c DFE810F0 tbh [pc, r0, lsl #1]
765 .L56:
2025-01-28 19:01:22 +01:00
766 0050 CB00 .2byte (.L60-.L56)/2
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
767 0052 ED00 .2byte (.L59-.L56)/2
768 0054 B502 .2byte (.L109-.L56)/2
769 0056 0F01 .2byte (.L58-.L56)/2
770 0058 B502 .2byte (.L109-.L56)/2
771 005a B502 .2byte (.L109-.L56)/2
772 005c B502 .2byte (.L109-.L56)/2
773 005e 3701 .2byte (.L57-.L56)/2
774 0060 B502 .2byte (.L109-.L56)/2
775 0062 B502 .2byte (.L109-.L56)/2
776 0064 B502 .2byte (.L109-.L56)/2
777 0066 B502 .2byte (.L109-.L56)/2
778 0068 B502 .2byte (.L109-.L56)/2
779 006a B502 .2byte (.L109-.L56)/2
780 006c B502 .2byte (.L109-.L56)/2
781 006e B502 .2byte (.L109-.L56)/2
782 0070 B502 .2byte (.L109-.L56)/2
783 0072 B502 .2byte (.L109-.L56)/2
784 0074 B502 .2byte (.L109-.L56)/2
785 0076 B502 .2byte (.L109-.L56)/2
786 0078 B502 .2byte (.L109-.L56)/2
787 007a B502 .2byte (.L109-.L56)/2
788 007c B502 .2byte (.L109-.L56)/2
789 007e B502 .2byte (.L109-.L56)/2
790 0080 B502 .2byte (.L109-.L56)/2
791 0082 B502 .2byte (.L109-.L56)/2
792 0084 B502 .2byte (.L109-.L56)/2
793 0086 B502 .2byte (.L109-.L56)/2
794 0088 B502 .2byte (.L109-.L56)/2
795 008a B502 .2byte (.L109-.L56)/2
796 008c B502 .2byte (.L109-.L56)/2
797 008e 5901 .2byte (.L55-.L56)/2
2023-07-02 17:09:41 +02:00
798 .LVL32:
799 .p2align 1
800 .L137:
2025-01-28 19:01:22 +01:00
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
801 .loc 1 696 5 is_stmt 1 view .LVU254
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
802 .loc 1 696 14 is_stmt 0 view .LVU255
803 0090 864A ldr r2, .L170
2023-07-02 17:09:41 +02:00
804 0092 D2F89030 ldr r3, [r2, #144]
2025-01-28 19:01:22 +01:00
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
805 .loc 1 696 12 view .LVU256
2023-07-02 17:09:41 +02:00
806 0096 03F44073 and r3, r3, #768
807 .LVL33:
2025-01-28 19:01:22 +01:00
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
808 .loc 1 699 5 is_stmt 1 view .LVU257
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
809 .loc 1 699 10 is_stmt 0 view .LVU258
2023-07-02 17:09:41 +02:00
810 009a D2F89020 ldr r2, [r2, #144]
2025-01-28 19:01:22 +01:00
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
811 .loc 1 699 8 view .LVU259
2023-07-02 17:09:41 +02:00
812 009e 12F0020F tst r2, #2
813 00a2 03D0 beq .L47
2025-01-28 19:01:22 +01:00
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
814 .loc 1 699 54 discriminator 1 view .LVU260
2023-07-02 17:09:41 +02:00
815 00a4 B3F5807F cmp r3, #256
2025-01-28 19:01:22 +01:00
816 00a8 00F07D82 beq .L104
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2023-07-02 17:09:41 +02:00
817 .L47:
2025-01-28 19:01:22 +01:00
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
818 .loc 1 704 10 is_stmt 1 view .LVU261
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
819 .loc 1 704 15 is_stmt 0 view .LVU262
820 00ac 7F4A ldr r2, .L170
2023-07-02 17:09:41 +02:00
821 00ae D2F89420 ldr r2, [r2, #148]
2025-01-28 19:01:22 +01:00
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
822 .loc 1 704 13 view .LVU263
2023-07-02 17:09:41 +02:00
823 00b2 12F0020F tst r2, #2
824 00b6 03D0 beq .L49
2025-01-28 19:01:22 +01:00
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
825 .loc 1 704 57 discriminator 1 view .LVU264
2023-07-02 17:09:41 +02:00
826 00b8 B3F5007F cmp r3, #512
2025-01-28 19:01:22 +01:00
827 00bc 00F07682 beq .L105
2023-07-02 17:09:41 +02:00
828 .L49:
2025-01-28 19:01:22 +01:00
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
829 .loc 1 709 10 is_stmt 1 view .LVU265
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
830 .loc 1 709 15 is_stmt 0 view .LVU266
831 00c0 7A4A ldr r2, .L170
2023-07-02 17:09:41 +02:00
832 00c2 1068 ldr r0, [r2]
833 .LVL34:
2025-01-28 19:01:22 +01:00
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
834 .loc 1 709 13 view .LVU267
2023-07-02 17:09:41 +02:00
835 00c4 10F40030 ands r0, r0, #131072
2025-01-28 19:01:22 +01:00
836 00c8 00F07882 beq .L45
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
837 .loc 1 709 55 discriminator 1 view .LVU268
2023-07-02 17:09:41 +02:00
838 00cc B3F5407F cmp r3, #768
2025-01-28 19:01:22 +01:00
839 00d0 00F06F82 beq .L106
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
840 .loc 1 686 12 view .LVU269
2023-07-02 17:09:41 +02:00
841 00d4 0020 movs r0, #0
2025-01-28 19:01:22 +01:00
842 00d6 71E2 b .L45
2023-07-02 17:09:41 +02:00
843 .LVL35:
844 .L138:
2025-01-28 19:01:22 +01:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
845 .loc 1 726 7 is_stmt 1 view .LVU270
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
846 .loc 1 726 10 is_stmt 0 view .LVU271
847 00d8 744B ldr r3, .L170
2023-07-02 17:09:41 +02:00
848 00da 1A68 ldr r2, [r3]
2025-01-28 19:01:22 +01:00
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
849 .loc 1 726 9 view .LVU272
2023-07-02 17:09:41 +02:00
850 00dc 12F48062 ands r2, r2, #1024
851 00e0 9FD0 beq .L51
2025-01-28 19:01:22 +01:00
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
852 .loc 1 728 16 view .LVU273
853 00e2 734A ldr r2, .L170+4
2023-07-02 17:09:41 +02:00
854 00e4 9DE7 b .L51
855 .L139:
2025-01-28 19:01:22 +01:00
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
856 .loc 1 737 7 is_stmt 1 view .LVU274
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
857 .loc 1 737 10 is_stmt 0 view .LVU275
858 00e6 714B ldr r3, .L170
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2023-07-02 17:09:41 +02:00
859 00e8 1A68 ldr r2, [r3]
2025-01-28 19:01:22 +01:00
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
860 .loc 1 737 9 view .LVU276
2023-07-02 17:09:41 +02:00
861 00ea 12F40032 ands r2, r2, #131072
862 00ee 98D0 beq .L51
2025-01-28 19:01:22 +01:00
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
863 .loc 1 739 16 view .LVU277
864 00f0 704A ldr r2, .L170+8
2023-07-02 17:09:41 +02:00
865 00f2 96E7 b .L51
866 .LVL36:
867 .L54:
2025-01-28 19:01:22 +01:00
868 .loc 1 754 5 view .LVU278
2023-07-02 17:09:41 +02:00
869 00f4 4028 cmp r0, #64
2025-01-28 19:01:22 +01:00
870 00f6 00F02981 beq .L61
2023-07-02 17:09:41 +02:00
871 00fa 8028 cmp r0, #128
872 00fc 16D1 bne .L140
2025-01-28 19:01:22 +01:00
755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1:
758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current USART1 source */
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE();
760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_USART1CLKSOURCE_PCLK2)
762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq();
764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_USART1CLKSOURCE_SYSCLK)
766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART1CLKSOURCE_HSI) )
2023-07-02 17:09:41 +02:00
770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
2023-07-02 17:09:41 +02:00
772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART1CLKSOURCE_LSE))
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for USART1 */
778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2:
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current USART2 source */
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE();
787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_USART2CLKSOURCE_PCLK1)
789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_USART2CLKSOURCE_SYSCLK)
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART2CLKSOURCE_HSI))
2023-07-02 17:09:41 +02:00
797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
2023-07-02 17:09:41 +02:00
799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART2CLKSOURCE_LSE))
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for USART2 */
805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USART3)
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3:
813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current USART3 source */
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE();
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_USART3CLKSOURCE_PCLK1)
817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_USART3CLKSOURCE_SYSCLK)
821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART3CLKSOURCE_HSI))
2023-07-02 17:09:41 +02:00
825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
2023-07-02 17:09:41 +02:00
827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART3CLKSOURCE_LSE))
829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for USART3 */
833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USART3 */
839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART4)
841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART4:
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current UART4 source */
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART4_SOURCE();
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_UART4CLKSOURCE_PCLK1)
846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_UART4CLKSOURCE_SYSCLK)
850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_UART4CLKSOURCE_HSI))
2023-07-02 17:09:41 +02:00
854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
2023-07-02 17:09:41 +02:00
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_UART4CLKSOURCE_LSE))
858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for UART4 */
862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART4 */
868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(UART5)
870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART5:
871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current UART5 source */
872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART5_SOURCE();
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_UART5CLKSOURCE_PCLK1)
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_UART5CLKSOURCE_SYSCLK)
879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_UART5CLKSOURCE_HSI))
883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_UART5CLKSOURCE_LSE))
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for UART5 */
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
2023-07-02 17:09:41 +02:00
892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
2023-07-02 17:09:41 +02:00
894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* UART5 */
897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_LPUART1:
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current LPUART1 source */
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_LPUART1_SOURCE();
901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_LPUART1CLKSOURCE_PCLK1)
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_LPUART1CLKSOURCE_SYSCLK)
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPUART1CLKSOURCE_HSI))
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPUART1CLKSOURCE_LSE))
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for LPUART1 */
919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1:
926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current I2C1 source */
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE();
928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_I2C1CLKSOURCE_PCLK1)
930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C1CLKSOURCE_HSI))
938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for I2C1 */
942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C2:
949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current I2C2 source */
950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C2_SOURCE();
873 .loc 1 950 7 is_stmt 1 view .LVU279
874 .loc 1 950 16 is_stmt 0 view .LVU280
875 00fe 6B4B ldr r3, .L170
2023-07-02 17:09:41 +02:00
876 0100 D3F88830 ldr r3, [r3, #136]
877 .LVL37:
2025-01-28 19:01:22 +01:00
951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_I2C2CLKSOURCE_PCLK1)
878 .loc 1 952 7 is_stmt 1 view .LVU281
879 .loc 1 952 9 is_stmt 0 view .LVU282
2023-07-02 17:09:41 +02:00
880 0104 13F44043 ands r3, r3, #49152
881 .LVL38:
2025-01-28 19:01:22 +01:00
882 .loc 1 952 9 view .LVU283
883 0108 00F03B81 beq .L141
953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2C2CLKSOURCE_SYSCLK)
884 .loc 1 956 12 is_stmt 1 view .LVU284
885 .loc 1 956 14 is_stmt 0 view .LVU285
2023-07-02 17:09:41 +02:00
886 010c B3F5804F cmp r3, #16384
2025-01-28 19:01:22 +01:00
887 0110 00F03A81 beq .L142
957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C2CLKSOURCE_HSI))
888 .loc 1 960 12 is_stmt 1 view .LVU286
889 .loc 1 960 16 is_stmt 0 view .LVU287
890 0114 654A ldr r2, .L170
2023-07-02 17:09:41 +02:00
891 .LVL39:
2025-01-28 19:01:22 +01:00
892 .loc 1 960 16 view .LVU288
2023-07-02 17:09:41 +02:00
893 0116 1068 ldr r0, [r2]
894 .LVL40:
2025-01-28 19:01:22 +01:00
895 .loc 1 960 14 view .LVU289
2023-07-02 17:09:41 +02:00
896 0118 10F48060 ands r0, r0, #1024
2025-01-28 19:01:22 +01:00
897 011c 00F04E82 beq .L45
898 .loc 1 960 56 discriminator 1 view .LVU290
2023-07-02 17:09:41 +02:00
899 0120 B3F5004F cmp r3, #32768
2025-01-28 19:01:22 +01:00
900 0124 00F06682 beq .L121
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
901 .loc 1 686 12 view .LVU291
2023-07-02 17:09:41 +02:00
902 0128 0020 movs r0, #0
2025-01-28 19:01:22 +01:00
903 012a 47E2 b .L45
2023-07-02 17:09:41 +02:00
904 .LVL41:
905 .L140:
2025-01-28 19:01:22 +01:00
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
906 .loc 1 754 5 view .LVU292
2023-07-02 17:09:41 +02:00
907 012c 0020 movs r0, #0
908 .LVL42:
2025-01-28 19:01:22 +01:00
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
909 .loc 1 754 5 view .LVU293
910 012e 45E2 b .L45
2023-07-02 17:09:41 +02:00
911 .LVL43:
912 .L53:
2025-01-28 19:01:22 +01:00
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
913 .loc 1 754 5 view .LVU294
2023-07-02 17:09:41 +02:00
914 0130 B0F5805F cmp r0, #4096
2025-01-28 19:01:22 +01:00
915 0134 00F0AD81 beq .L63
916 0138 33D8 bhi .L64
917 013a B0F5806F cmp r0, #1024
918 013e 00F04481 beq .L65
919 0142 B0F5006F cmp r0, #2048
920 0146 00F07281 beq .L66
921 014a B0F5007F cmp r0, #512
922 014e 26D1 bne .L143
961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for I2C2 */
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C3)
972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C3:
974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current I2C3 source */
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C3_SOURCE();
976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_I2C3CLKSOURCE_PCLK1)
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2C3CLKSOURCE_SYSCLK)
982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C3CLKSOURCE_HSI))
986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for I2C3 */
990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C3 */
997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(I2C4)
999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C4:
1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current I2C4 source */
1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C4_SOURCE();
1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_I2C4CLKSOURCE_PCLK1)
2023-07-02 17:09:41 +02:00
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
2023-07-02 17:09:41 +02:00
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2C4CLKSOURCE_SYSCLK)
1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C4CLKSOURCE_HSI))
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for I2C4 */
1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* I2C4 */
1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_LPTIM1:
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current LPTIM1 source */
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_LPTIM1_SOURCE();
923 .loc 1 1027 7 is_stmt 1 view .LVU295
924 .loc 1 1027 16 is_stmt 0 view .LVU296
925 0150 564B ldr r3, .L170
926 0152 D3F88830 ldr r3, [r3, #136]
927 .LVL44:
1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_LPTIM1CLKSOURCE_PCLK1)
928 .loc 1 1029 7 is_stmt 1 view .LVU297
929 .loc 1 1029 9 is_stmt 0 view .LVU298
930 0156 13F44023 ands r3, r3, #786432
931 .LVL45:
932 .loc 1 1029 9 view .LVU299
933 015a 00F03381 beq .L144
1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_LSI))
934 .loc 1 1033 12 is_stmt 1 view .LVU300
935 .loc 1 1033 16 is_stmt 0 view .LVU301
936 015e 534A ldr r2, .L170
937 .LVL46:
938 .loc 1 1033 16 view .LVU302
939 0160 D2F89420 ldr r2, [r2, #148]
940 .loc 1 1033 14 view .LVU303
941 0164 12F0020F tst r2, #2
942 0168 03D0 beq .L93
943 .loc 1 1033 58 discriminator 1 view .LVU304
944 016a B3F5802F cmp r3, #262144
945 016e 00F04582 beq .L123
946 .L93:
1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSI_VALUE;
1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_HSI))
947 .loc 1 1037 12 is_stmt 1 view .LVU305
948 .loc 1 1037 16 is_stmt 0 view .LVU306
949 0172 4E4A ldr r2, .L170
950 0174 1268 ldr r2, [r2]
951 .loc 1 1037 14 view .LVU307
952 0176 12F4806F tst r2, #1024
953 017a 03D0 beq .L94
954 .loc 1 1037 56 discriminator 1 view .LVU308
955 017c B3F5002F cmp r3, #524288
956 0180 00F03F82 beq .L124
957 .L94:
2023-07-02 17:09:41 +02:00
1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
2023-07-02 17:09:41 +02:00
1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_LSE))
958 .loc 1 1041 12 is_stmt 1 view .LVU309
959 .loc 1 1041 17 is_stmt 0 view .LVU310
960 0184 494A ldr r2, .L170
961 0186 D2F89000 ldr r0, [r2, #144]
962 .LVL47:
963 .loc 1 1041 15 view .LVU311
964 018a 10F00200 ands r0, r0, #2
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
965 018e 00F01582 beq .L45
966 .loc 1 1041 61 discriminator 1 view .LVU312
967 0192 B3F5402F cmp r3, #786432
968 0196 00F03682 beq .L125
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
969 .loc 1 686 12 view .LVU313
970 019a 0020 movs r0, #0
971 019c 0EE2 b .L45
972 .LVL48:
973 .L143:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
974 .loc 1 754 5 view .LVU314
975 019e 0020 movs r0, #0
976 .LVL49:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
977 .loc 1 754 5 view .LVU315
978 01a0 0CE2 b .L45
979 .LVL50:
980 .L64:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
981 .loc 1 754 5 view .LVU316
982 01a2 B0F5804F cmp r0, #16384
983 01a6 00F0AD81 beq .L68
984 01aa B0F5004F cmp r0, #32768
985 01ae 00F0CC81 beq .L69
986 01b2 B0F5005F cmp r0, #8192
987 01b6 14D1 bne .L145
1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for LPTIM1 */
1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SAI1)
1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_SAI1:
1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current SAI1 source */
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_SAI1_SOURCE();
1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_SAI1CLKSOURCE_SYSCLK)
1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_SAI1CLKSOURCE_PLL)
1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_48M1CLK) != 0U)
1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_SAI1CLKSOURCE_EXT)
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* External clock used.*/
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = EXTERNAL_CLOCK_VALUE;
1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_SAI1CLKSOURCE_HSI))
1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for SAI1 */
1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
2023-07-02 17:09:41 +02:00
1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
2023-07-02 17:09:41 +02:00
1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SAI1 */
1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(SPI_I2S_SUPPORT)
1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S:
1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current I2Sx source */
1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2S_SOURCE();
1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_I2SCLKSOURCE_SYSCLK)
1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
2023-07-02 17:09:41 +02:00
1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2SCLKSOURCE_PLL)
1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_48M1CLK) != 0U)
1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_I2SCLKSOURCE_EXT)
1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* External clock used.*/
1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = EXTERNAL_CLOCK_VALUE;
1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2SCLKSOURCE_HSI))
2023-07-02 17:09:41 +02:00
1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for I2S */
1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* SPI_I2S_SUPPORT */
1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(FDCAN1)
1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_FDCAN:
1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current FDCANx source */
1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_FDCAN_SOURCE();
1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_FDCANCLKSOURCE_PCLK1)
1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_FDCANCLKSOURCE_HSE)
1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSE_VALUE;
1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_FDCANCLKSOURCE_PLL)
1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_48M1CLK) != 0U)
1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for FDCAN */
1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* FDCAN1 */
1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(USB)
1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB:
1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current USB source */
1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE();
988 .loc 1 1158 7 is_stmt 1 view .LVU317
989 .loc 1 1158 16 is_stmt 0 view .LVU318
990 01b8 3C4B ldr r3, .L170
991 01ba D3F88830 ldr r3, [r3, #136]
992 .loc 1 1158 14 view .LVU319
993 01be 03F04063 and r3, r3, #201326592
994 .LVL51:
1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_USBCLKSOURCE_PLL) /* PLL ? */
995 .loc 1 1160 7 is_stmt 1 view .LVU320
996 .loc 1 1160 9 is_stmt 0 view .LVU321
997 01c2 B3F1006F cmp r3, #134217728
998 01c6 00F08C81 beq .L146
1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if((HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) && (srcclk == RCC_USBCLKSOURCE_HSI48
999 .loc 1 1166 12 is_stmt 1 view .LVU322
1000 .loc 1 1166 16 is_stmt 0 view .LVU323
1001 01ca 384A ldr r2, .L170
1002 .LVL52:
1003 .loc 1 1166 16 view .LVU324
1004 01cc D2F89800 ldr r0, [r2, #152]
1005 .LVL53:
1006 .loc 1 1166 14 view .LVU325
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1007 01d0 10F00200 ands r0, r0, #2
1008 01d4 00F0F281 beq .L45
1009 .loc 1 1166 64 discriminator 1 view .LVU326
1010 01d8 002B cmp r3, #0
1011 01da 00F02182 beq .L132
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1012 .loc 1 686 12 view .LVU327
1013 01de 0020 movs r0, #0
1014 01e0 ECE1 b .L45
1015 .LVL54:
1016 .L145:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1017 .loc 1 754 5 view .LVU328
1018 01e2 0020 movs r0, #0
1019 .LVL55:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1020 .loc 1 754 5 view .LVU329
1021 01e4 EAE1 b .L45
1022 .LVL56:
1023 .L60:
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1024 .loc 1 759 7 is_stmt 1 view .LVU330
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1025 .loc 1 759 16 is_stmt 0 view .LVU331
1026 01e6 314B ldr r3, .L170
1027 01e8 D3F88830 ldr r3, [r3, #136]
1028 .LVL57:
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1029 .loc 1 761 7 is_stmt 1 view .LVU332
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1030 .loc 1 761 9 is_stmt 0 view .LVU333
1031 01ec 13F00303 ands r3, r3, #3
1032 .LVL58:
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1033 .loc 1 761 9 view .LVU334
1034 01f0 15D0 beq .L147
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1035 .loc 1 765 12 is_stmt 1 view .LVU335
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1036 .loc 1 765 14 is_stmt 0 view .LVU336
1037 01f2 012B cmp r3, #1
1038 01f4 16D0 beq .L148
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1039 .loc 1 769 12 is_stmt 1 view .LVU337
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1040 .loc 1 769 16 is_stmt 0 view .LVU338
1041 01f6 2D4A ldr r2, .L170
1042 .LVL59:
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1043 .loc 1 769 16 view .LVU339
1044 01f8 1268 ldr r2, [r2]
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1045 .loc 1 769 14 view .LVU340
1046 01fa 12F4806F tst r2, #1024
1047 01fe 02D0 beq .L73
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1048 .loc 1 769 56 discriminator 1 view .LVU341
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1049 0200 022B cmp r3, #2
1050 0202 00F0DC81 beq .L110
1051 .L73:
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1052 .loc 1 773 12 is_stmt 1 view .LVU342
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1053 .loc 1 773 16 is_stmt 0 view .LVU343
1054 0206 294A ldr r2, .L170
1055 0208 D2F89000 ldr r0, [r2, #144]
1056 .LVL60:
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1057 .loc 1 773 14 view .LVU344
1058 020c 10F00200 ands r0, r0, #2
1059 0210 00F0D481 beq .L45
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1060 .loc 1 773 60 discriminator 1 view .LVU345
1061 0214 032B cmp r3, #3
1062 0216 00F0D481 beq .L111
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1063 .loc 1 686 12 view .LVU346
1064 021a 0020 movs r0, #0
1065 021c CEE1 b .L45
1066 .LVL61:
1067 .L147:
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1068 .loc 1 763 9 is_stmt 1 view .LVU347
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1069 .loc 1 763 21 is_stmt 0 view .LVU348
1070 021e FFF7FEFF bl HAL_RCC_GetPCLK2Freq
1071 .LVL62:
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1072 .loc 1 763 21 view .LVU349
1073 0222 CBE1 b .L45
1074 .LVL63:
1075 .L148:
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1076 .loc 1 767 9 is_stmt 1 view .LVU350
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1077 .loc 1 767 21 is_stmt 0 view .LVU351
1078 0224 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1079 .LVL64:
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1080 .loc 1 767 21 view .LVU352
1081 0228 C8E1 b .L45
1082 .LVL65:
1083 .L59:
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1084 .loc 1 786 7 is_stmt 1 view .LVU353
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1085 .loc 1 786 16 is_stmt 0 view .LVU354
1086 022a 204B ldr r3, .L170
1087 022c D3F88830 ldr r3, [r3, #136]
1088 .LVL66:
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1089 .loc 1 788 7 is_stmt 1 view .LVU355
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1090 .loc 1 788 9 is_stmt 0 view .LVU356
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
1091 0230 13F00C03 ands r3, r3, #12
1092 .LVL67:
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1093 .loc 1 788 9 view .LVU357
1094 0234 15D0 beq .L149
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1095 .loc 1 792 12 is_stmt 1 view .LVU358
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1096 .loc 1 792 14 is_stmt 0 view .LVU359
1097 0236 042B cmp r3, #4
1098 0238 16D0 beq .L150
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1099 .loc 1 796 12 is_stmt 1 view .LVU360
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1100 .loc 1 796 16 is_stmt 0 view .LVU361
1101 023a 1C4A ldr r2, .L170
1102 .LVL68:
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1103 .loc 1 796 16 view .LVU362
1104 023c 1268 ldr r2, [r2]
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1105 .loc 1 796 14 view .LVU363
1106 023e 12F4806F tst r2, #1024
1107 0242 02D0 beq .L76
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1108 .loc 1 796 56 discriminator 1 view .LVU364
1109 0244 082B cmp r3, #8
1110 0246 00F0BF81 beq .L112
1111 .L76:
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1112 .loc 1 800 12 is_stmt 1 view .LVU365
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1113 .loc 1 800 16 is_stmt 0 view .LVU366
1114 024a 184A ldr r2, .L170
1115 024c D2F89000 ldr r0, [r2, #144]
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1116 .loc 1 800 14 view .LVU367
1117 0250 10F00200 ands r0, r0, #2
1118 0254 00F0B281 beq .L45
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1119 .loc 1 800 61 discriminator 1 view .LVU368
1120 0258 0C2B cmp r3, #12
1121 025a 00F0B781 beq .L113
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1122 .loc 1 686 12 view .LVU369
1123 025e 0020 movs r0, #0
1124 0260 ACE1 b .L45
1125 .LVL69:
1126 .L149:
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1127 .loc 1 790 9 is_stmt 1 view .LVU370
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1128 .loc 1 790 21 is_stmt 0 view .LVU371
1129 0262 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1130 .LVL70:
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1131 .loc 1 790 21 view .LVU372
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
1132 0266 A9E1 b .L45
1133 .LVL71:
1134 .L150:
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1135 .loc 1 794 9 is_stmt 1 view .LVU373
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1136 .loc 1 794 21 is_stmt 0 view .LVU374
1137 0268 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1138 .LVL72:
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1139 .loc 1 794 21 view .LVU375
1140 026c A6E1 b .L45
1141 .LVL73:
1142 .L58:
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1143 .loc 1 814 7 is_stmt 1 view .LVU376
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1144 .loc 1 814 16 is_stmt 0 view .LVU377
1145 026e 0F4B ldr r3, .L170
1146 0270 D3F88830 ldr r3, [r3, #136]
1147 .LVL74:
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1148 .loc 1 816 7 is_stmt 1 view .LVU378
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1149 .loc 1 816 9 is_stmt 0 view .LVU379
1150 0274 13F03003 ands r3, r3, #48
1151 .LVL75:
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1152 .loc 1 816 9 view .LVU380
1153 0278 15D0 beq .L151
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1154 .loc 1 820 12 is_stmt 1 view .LVU381
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1155 .loc 1 820 14 is_stmt 0 view .LVU382
1156 027a 102B cmp r3, #16
1157 027c 1CD0 beq .L152
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1158 .loc 1 824 12 is_stmt 1 view .LVU383
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1159 .loc 1 824 16 is_stmt 0 view .LVU384
1160 027e 0B4A ldr r2, .L170
1161 .LVL76:
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1162 .loc 1 824 16 view .LVU385
1163 0280 1268 ldr r2, [r2]
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1164 .loc 1 824 14 view .LVU386
1165 0282 12F4806F tst r2, #1024
1166 0286 02D0 beq .L79
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1167 .loc 1 824 56 discriminator 1 view .LVU387
1168 0288 202B cmp r3, #32
1169 028a 00F0A281 beq .L114
1170 .L79:
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1171 .loc 1 828 12 is_stmt 1 view .LVU388
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1172 .loc 1 828 16 is_stmt 0 view .LVU389
1173 028e 074A ldr r2, .L170
1174 0290 D2F89000 ldr r0, [r2, #144]
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1175 .loc 1 828 14 view .LVU390
1176 0294 10F00200 ands r0, r0, #2
1177 0298 00F09081 beq .L45
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1178 .loc 1 828 60 discriminator 1 view .LVU391
1179 029c 302B cmp r3, #48
1180 029e 00F09A81 beq .L115
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1181 .loc 1 686 12 view .LVU392
1182 02a2 0020 movs r0, #0
1183 02a4 8AE1 b .L45
1184 .LVL77:
1185 .L151:
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1186 .loc 1 818 9 is_stmt 1 view .LVU393
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1187 .loc 1 818 21 is_stmt 0 view .LVU394
1188 02a6 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1189 .LVL78:
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1190 .loc 1 818 21 view .LVU395
1191 02aa 87E1 b .L45
1192 .L171:
1193 .align 2
1194 .L170:
1195 02ac 00100240 .word 1073876992
1196 02b0 0024F400 .word 16000000
2025-06-28 00:58:29 +02:00
1197 02b4 00366E01 .word 24000000
2025-01-28 19:01:22 +01:00
1198 .LVL79:
1199 .L152:
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1200 .loc 1 822 9 is_stmt 1 view .LVU396
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1201 .loc 1 822 21 is_stmt 0 view .LVU397
1202 02b8 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1203 .LVL80:
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1204 .loc 1 822 21 view .LVU398
1205 02bc 7EE1 b .L45
1206 .LVL81:
1207 .L57:
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1208 .loc 1 843 7 is_stmt 1 view .LVU399
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1209 .loc 1 843 16 is_stmt 0 view .LVU400
1210 02be B74B ldr r3, .L172
1211 02c0 D3F88830 ldr r3, [r3, #136]
1212 .LVL82:
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1213 .loc 1 845 7 is_stmt 1 view .LVU401
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1214 .loc 1 845 9 is_stmt 0 view .LVU402
1215 02c4 13F0C003 ands r3, r3, #192
2025-06-28 00:58:29 +02:00
2023-07-02 17:09:41 +02:00
2025-01-28 19:01:22 +01:00
1216 .LVL83:
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1217 .loc 1 845 9 view .LVU403
1218 02c8 15D0 beq .L153
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1219 .loc 1 849 12 is_stmt 1 view .LVU404
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1220 .loc 1 849 14 is_stmt 0 view .LVU405
1221 02ca 402B cmp r3, #64
1222 02cc 16D0 beq .L154
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1223 .loc 1 853 12 is_stmt 1 view .LVU406
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1224 .loc 1 853 16 is_stmt 0 view .LVU407
1225 02ce B34A ldr r2, .L172
1226 .LVL84:
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1227 .loc 1 853 16 view .LVU408
1228 02d0 1268 ldr r2, [r2]
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1229 .loc 1 853 14 view .LVU409
1230 02d2 12F4806F tst r2, #1024
1231 02d6 02D0 beq .L82
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1232 .loc 1 853 56 discriminator 1 view .LVU410
1233 02d8 802B cmp r3, #128
1234 02da 00F07F81 beq .L116
1235 .L82:
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1236 .loc 1 857 12 is_stmt 1 view .LVU411
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1237 .loc 1 857 16 is_stmt 0 view .LVU412
1238 02de AF4A ldr r2, .L172
1239 02e0 D2F89000 ldr r0, [r2, #144]
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1240 .loc 1 857 14 view .LVU413
1241 02e4 10F00200 ands r0, r0, #2
1242 02e8 00F06881 beq .L45
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1243 .loc 1 857 60 discriminator 1 view .LVU414
1244 02ec C02B cmp r3, #192
1245 02ee 00F07781 beq .L117
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1246 .loc 1 686 12 view .LVU415
1247 02f2 0020 movs r0, #0
1248 02f4 62E1 b .L45
1249 .LVL85:
1250 .L153:
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1251 .loc 1 847 9 is_stmt 1 view .LVU416
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1252 .loc 1 847 21 is_stmt 0 view .LVU417
1253 02f6 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1254 .LVL86:
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1255 .loc 1 847 21 view .LVU418
1256 02fa 5FE1 b .L45
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1257 .LVL87:
1258 .L154:
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1259 .loc 1 851 9 is_stmt 1 view .LVU419
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1260 .loc 1 851 21 is_stmt 0 view .LVU420
1261 02fc FFF7FEFF bl HAL_RCC_GetSysClockFreq
1262 .LVL88:
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1263 .loc 1 851 21 view .LVU421
1264 0300 5CE1 b .L45
1265 .LVL89:
1266 .L55:
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1267 .loc 1 900 7 is_stmt 1 view .LVU422
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1268 .loc 1 900 16 is_stmt 0 view .LVU423
1269 0302 A64B ldr r3, .L172
1270 0304 D3F88830 ldr r3, [r3, #136]
1271 .LVL90:
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1272 .loc 1 902 7 is_stmt 1 view .LVU424
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1273 .loc 1 902 9 is_stmt 0 view .LVU425
1274 0308 13F44063 ands r3, r3, #3072
1275 .LVL91:
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1276 .loc 1 902 9 view .LVU426
1277 030c 18D0 beq .L155
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1278 .loc 1 906 12 is_stmt 1 view .LVU427
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1279 .loc 1 906 14 is_stmt 0 view .LVU428
1280 030e B3F5806F cmp r3, #1024
1281 0312 18D0 beq .L156
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1282 .loc 1 910 12 is_stmt 1 view .LVU429
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1283 .loc 1 910 16 is_stmt 0 view .LVU430
1284 0314 A14A ldr r2, .L172
1285 .LVL92:
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1286 .loc 1 910 16 view .LVU431
1287 0316 1268 ldr r2, [r2]
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1288 .loc 1 910 14 view .LVU432
1289 0318 12F4806F tst r2, #1024
1290 031c 03D0 beq .L85
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1291 .loc 1 910 56 discriminator 1 view .LVU433
1292 031e B3F5006F cmp r3, #2048
1293 0322 00F06081 beq .L118
1294 .L85:
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1295 .loc 1 914 12 is_stmt 1 view .LVU434
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1296 .loc 1 914 16 is_stmt 0 view .LVU435
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1297 0326 9D4A ldr r2, .L172
1298 0328 D2F89000 ldr r0, [r2, #144]
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1299 .loc 1 914 14 view .LVU436
1300 032c 10F00200 ands r0, r0, #2
1301 0330 00F04481 beq .L45
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1302 .loc 1 914 60 discriminator 1 view .LVU437
1303 0334 B3F5406F cmp r3, #3072
1304 0338 00F05781 beq .L119
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1305 .loc 1 686 12 view .LVU438
1306 033c 0020 movs r0, #0
1307 033e 3DE1 b .L45
1308 .LVL93:
1309 .L155:
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1310 .loc 1 904 9 is_stmt 1 view .LVU439
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1311 .loc 1 904 21 is_stmt 0 view .LVU440
1312 0340 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1313 .LVL94:
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1314 .loc 1 904 21 view .LVU441
1315 0344 3AE1 b .L45
1316 .LVL95:
1317 .L156:
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1318 .loc 1 908 9 is_stmt 1 view .LVU442
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1319 .loc 1 908 21 is_stmt 0 view .LVU443
1320 0346 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1321 .LVL96:
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1322 .loc 1 908 21 view .LVU444
1323 034a 37E1 b .L45
1324 .LVL97:
1325 .L61:
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1326 .loc 1 927 7 is_stmt 1 view .LVU445
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1327 .loc 1 927 16 is_stmt 0 view .LVU446
1328 034c 934B ldr r3, .L172
1329 034e D3F88830 ldr r3, [r3, #136]
1330 .LVL98:
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1331 .loc 1 929 7 is_stmt 1 view .LVU447
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1332 .loc 1 929 9 is_stmt 0 view .LVU448
1333 0352 13F44053 ands r3, r3, #12288
1334 .LVL99:
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1335 .loc 1 929 9 view .LVU449
1336 0356 0ED0 beq .L157
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1337 .loc 1 933 12 is_stmt 1 view .LVU450
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1338 .loc 1 933 14 is_stmt 0 view .LVU451
1339 0358 B3F5805F cmp r3, #4096
1340 035c 0ED0 beq .L158
2023-07-02 17:09:41 +02:00
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1341 .loc 1 937 12 is_stmt 1 view .LVU452
2023-07-02 17:09:41 +02:00
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1342 .loc 1 937 16 is_stmt 0 view .LVU453
1343 035e 8F4A ldr r2, .L172
1344 .LVL100:
2023-07-02 17:09:41 +02:00
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1345 .loc 1 937 16 view .LVU454
1346 0360 1068 ldr r0, [r2]
1347 .LVL101:
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1348 .loc 1 937 14 view .LVU455
1349 0362 10F48060 ands r0, r0, #1024
1350 0366 00F02981 beq .L45
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1351 .loc 1 937 56 discriminator 1 view .LVU456
1352 036a B3F5005F cmp r3, #8192
1353 036e 00F03F81 beq .L120
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1354 .loc 1 686 12 view .LVU457
1355 0372 0020 movs r0, #0
1356 0374 22E1 b .L45
1357 .LVL102:
1358 .L157:
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1359 .loc 1 931 9 is_stmt 1 view .LVU458
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1360 .loc 1 931 21 is_stmt 0 view .LVU459
1361 0376 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1362 .LVL103:
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1363 .loc 1 931 21 view .LVU460
1364 037a 1FE1 b .L45
1365 .LVL104:
1366 .L158:
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1367 .loc 1 935 9 is_stmt 1 view .LVU461
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1368 .loc 1 935 21 is_stmt 0 view .LVU462
1369 037c FFF7FEFF bl HAL_RCC_GetSysClockFreq
1370 .LVL105:
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1371 .loc 1 935 21 view .LVU463
1372 0380 1CE1 b .L45
1373 .LVL106:
1374 .L141:
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1375 .loc 1 954 9 is_stmt 1 view .LVU464
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1376 .loc 1 954 21 is_stmt 0 view .LVU465
1377 0382 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1378 .LVL107:
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1379 .loc 1 954 21 view .LVU466
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1380 0386 19E1 b .L45
1381 .LVL108:
1382 .L142:
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1383 .loc 1 958 9 is_stmt 1 view .LVU467
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1384 .loc 1 958 21 is_stmt 0 view .LVU468
1385 0388 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1386 .LVL109:
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1387 .loc 1 958 21 view .LVU469
1388 038c 16E1 b .L45
1389 .LVL110:
1390 .L52:
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1391 .loc 1 975 7 is_stmt 1 view .LVU470
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1392 .loc 1 975 16 is_stmt 0 view .LVU471
1393 038e 834B ldr r3, .L172
1394 0390 D3F88830 ldr r3, [r3, #136]
1395 .LVL111:
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1396 .loc 1 977 7 is_stmt 1 view .LVU472
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1397 .loc 1 977 9 is_stmt 0 view .LVU473
1398 0394 13F44033 ands r3, r3, #196608
1399 .LVL112:
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1400 .loc 1 977 9 view .LVU474
1401 0398 0ED0 beq .L159
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1402 .loc 1 981 12 is_stmt 1 view .LVU475
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1403 .loc 1 981 14 is_stmt 0 view .LVU476
1404 039a B3F5803F cmp r3, #65536
1405 039e 0ED0 beq .L160
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1406 .loc 1 985 12 is_stmt 1 view .LVU477
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1407 .loc 1 985 16 is_stmt 0 view .LVU478
1408 03a0 7E4A ldr r2, .L172
1409 .LVL113:
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1410 .loc 1 985 16 view .LVU479
1411 03a2 1068 ldr r0, [r2]
1412 .LVL114:
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1413 .loc 1 985 14 view .LVU480
1414 03a4 10F48060 ands r0, r0, #1024
1415 03a8 00F00881 beq .L45
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1416 .loc 1 985 56 discriminator 1 view .LVU481
1417 03ac B3F5003F cmp r3, #131072
1418 03b0 00F02281 beq .L122
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1419 .loc 1 686 12 view .LVU482
1420 03b4 0020 movs r0, #0
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1421 03b6 01E1 b .L45
1422 .LVL115:
1423 .L159:
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1424 .loc 1 979 9 is_stmt 1 view .LVU483
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1425 .loc 1 979 21 is_stmt 0 view .LVU484
1426 03b8 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1427 .LVL116:
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1428 .loc 1 979 21 view .LVU485
1429 03bc FEE0 b .L45
1430 .LVL117:
1431 .L160:
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1432 .loc 1 983 9 is_stmt 1 view .LVU486
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1433 .loc 1 983 21 is_stmt 0 view .LVU487
1434 03be FFF7FEFF bl HAL_RCC_GetSysClockFreq
1435 .LVL118:
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1436 .loc 1 983 21 view .LVU488
1437 03c2 FBE0 b .L45
1438 .LVL119:
1439 .L144:
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1440 .loc 1 1031 9 is_stmt 1 view .LVU489
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1441 .loc 1 1031 21 is_stmt 0 view .LVU490
1442 03c4 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1443 .LVL120:
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1444 .loc 1 1031 21 view .LVU491
1445 03c8 F8E0 b .L45
1446 .LVL121:
1447 .L65:
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1448 .loc 1 1056 7 is_stmt 1 view .LVU492
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1449 .loc 1 1056 16 is_stmt 0 view .LVU493
1450 03ca 744B ldr r3, .L172
1451 03cc D3F88830 ldr r3, [r3, #136]
1452 .LVL122:
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1453 .loc 1 1058 7 is_stmt 1 view .LVU494
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1454 .loc 1 1058 9 is_stmt 0 view .LVU495
1455 03d0 13F44013 ands r3, r3, #3145728
1456 .LVL123:
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1457 .loc 1 1058 9 view .LVU496
1458 03d4 12D0 beq .L161
1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1459 .loc 1 1062 12 is_stmt 1 view .LVU497
1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1460 .loc 1 1062 14 is_stmt 0 view .LVU498
1461 03d6 B3F5801F cmp r3, #1048576
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1462 03da 12D0 beq .L162
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1463 .loc 1 1071 12 is_stmt 1 view .LVU499
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1464 .loc 1 1071 14 is_stmt 0 view .LVU500
1465 03dc B3F5001F cmp r3, #2097152
1466 03e0 00F01481 beq .L126
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1467 .loc 1 1076 12 is_stmt 1 view .LVU501
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1468 .loc 1 1076 16 is_stmt 0 view .LVU502
1469 03e4 6D4A ldr r2, .L172
1470 .LVL124:
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1471 .loc 1 1076 16 view .LVU503
1472 03e6 1068 ldr r0, [r2]
1473 .LVL125:
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1474 .loc 1 1076 14 view .LVU504
1475 03e8 10F48060 ands r0, r0, #1024
1476 03ec 00F0E680 beq .L45
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1477 .loc 1 1076 56 discriminator 1 view .LVU505
1478 03f0 B3F5401F cmp r3, #3145728
1479 03f4 00F00C81 beq .L127
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1480 .loc 1 686 12 view .LVU506
1481 03f8 0020 movs r0, #0
1482 03fa DFE0 b .L45
1483 .LVL126:
1484 .L161:
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1485 .loc 1 1060 9 is_stmt 1 view .LVU507
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1486 .loc 1 1060 21 is_stmt 0 view .LVU508
1487 03fc FFF7FEFF bl HAL_RCC_GetSysClockFreq
1488 .LVL127:
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1489 .loc 1 1060 21 view .LVU509
1490 0400 DCE0 b .L45
1491 .LVL128:
1492 .L162:
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1493 .loc 1 1064 9 is_stmt 1 view .LVU510
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1494 .loc 1 1064 12 is_stmt 0 view .LVU511
1495 0402 03F18043 add r3, r3, #1073741824
1496 .LVL129:
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1497 .loc 1 1064 12 view .LVU512
1498 0406 A3F55F23 sub r3, r3, #913408
1499 .LVL130:
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1500 .loc 1 1064 12 view .LVU513
1501 040a D868 ldr r0, [r3, #12]
1502 .LVL131:
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1503 .loc 1 1064 11 view .LVU514
1504 040c 10F48010 ands r0, r0, #1048576
1505 0410 00F0D480 beq .L45
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1506 .loc 1 1067 11 is_stmt 1 view .LVU515
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1507 .loc 1 1067 18 is_stmt 0 view .LVU516
1508 0414 D868 ldr r0, [r3, #12]
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1509 .loc 1 1067 16 view .LVU517
1510 0416 C0F30620 ubfx r0, r0, #8, #7
1511 .LVL132:
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1512 .loc 1 1068 11 is_stmt 1 view .LVU518
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1513 .loc 1 1068 31 is_stmt 0 view .LVU519
1514 041a 02FB00F0 mul r0, r2, r0
1515 .LVL133:
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1516 .loc 1 1068 44 view .LVU520
1517 041e DB68 ldr r3, [r3, #12]
1518 .LVL134:
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1519 .loc 1 1068 85 view .LVU521
1520 0420 C3F34153 ubfx r3, r3, #21, #2
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1521 .loc 1 1068 110 view .LVU522
1522 0424 0133 adds r3, r3, #1
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1523 .loc 1 1068 116 view .LVU523
1524 0426 5B00 lsls r3, r3, #1
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1525 .loc 1 1068 21 view .LVU524
1526 0428 B0FBF3F0 udiv r0, r0, r3
1527 .LVL135:
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1528 .loc 1 1068 21 view .LVU525
1529 042c C6E0 b .L45
1530 .LVL136:
1531 .L66:
1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1532 .loc 1 1092 7 is_stmt 1 view .LVU526
1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1533 .loc 1 1092 16 is_stmt 0 view .LVU527
1534 042e 5B4B ldr r3, .L172
1535 0430 D3F88830 ldr r3, [r3, #136]
1536 .LVL137:
1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1537 .loc 1 1094 7 is_stmt 1 view .LVU528
1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1538 .loc 1 1094 9 is_stmt 0 view .LVU529
1539 0434 13F44003 ands r3, r3, #12582912
1540 .LVL138:
1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1541 .loc 1 1094 9 view .LVU530
1542 0438 12D0 beq .L163
1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1543 .loc 1 1098 12 is_stmt 1 view .LVU531
1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1544 .loc 1 1098 14 is_stmt 0 view .LVU532
1545 043a B3F5800F cmp r3, #4194304
1546 043e 12D0 beq .L164
1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1547 .loc 1 1107 12 is_stmt 1 view .LVU533
1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1548 .loc 1 1107 14 is_stmt 0 view .LVU534
1549 0440 B3F5000F cmp r3, #8388608
1550 0444 00F0E680 beq .L128
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1551 .loc 1 1112 12 is_stmt 1 view .LVU535
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1552 .loc 1 1112 16 is_stmt 0 view .LVU536
1553 0448 544A ldr r2, .L172
1554 .LVL139:
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1555 .loc 1 1112 16 view .LVU537
1556 044a 1068 ldr r0, [r2]
1557 .LVL140:
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1558 .loc 1 1112 14 view .LVU538
1559 044c 10F48060 ands r0, r0, #1024
1560 0450 00F0B480 beq .L45
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1561 .loc 1 1112 56 discriminator 1 view .LVU539
1562 0454 B3F5400F cmp r3, #12582912
1563 0458 00F0DE80 beq .L129
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1564 .loc 1 686 12 view .LVU540
1565 045c 0020 movs r0, #0
1566 045e ADE0 b .L45
1567 .LVL141:
1568 .L163:
1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1569 .loc 1 1096 9 is_stmt 1 view .LVU541
1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1570 .loc 1 1096 21 is_stmt 0 view .LVU542
1571 0460 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1572 .LVL142:
1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1573 .loc 1 1096 21 view .LVU543
1574 0464 AAE0 b .L45
1575 .LVL143:
1576 .L164:
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1577 .loc 1 1100 9 is_stmt 1 view .LVU544
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1578 .loc 1 1100 12 is_stmt 0 view .LVU545
1579 0466 03F17F53 add r3, r3, #1069547520
1580 .LVL144:
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1581 .loc 1 1100 12 view .LVU546
1582 046a 03F50433 add r3, r3, #135168
1583 .LVL145:
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1584 .loc 1 1100 12 view .LVU547
1585 046e D868 ldr r0, [r3, #12]
1586 .LVL146:
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1587 .loc 1 1100 11 view .LVU548
1588 0470 10F48010 ands r0, r0, #1048576
1589 0474 00F0A280 beq .L45
1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1590 .loc 1 1103 11 is_stmt 1 view .LVU549
1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1591 .loc 1 1103 18 is_stmt 0 view .LVU550
1592 0478 D868 ldr r0, [r3, #12]
1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1593 .loc 1 1103 16 view .LVU551
1594 047a C0F30620 ubfx r0, r0, #8, #7
1595 .LVL147:
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1596 .loc 1 1104 11 is_stmt 1 view .LVU552
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1597 .loc 1 1104 31 is_stmt 0 view .LVU553
1598 047e 02FB00F0 mul r0, r2, r0
1599 .LVL148:
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1600 .loc 1 1104 44 view .LVU554
1601 0482 DB68 ldr r3, [r3, #12]
1602 .LVL149:
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1603 .loc 1 1104 85 view .LVU555
1604 0484 C3F34153 ubfx r3, r3, #21, #2
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1605 .loc 1 1104 110 view .LVU556
1606 0488 0133 adds r3, r3, #1
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1607 .loc 1 1104 116 view .LVU557
1608 048a 5B00 lsls r3, r3, #1
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1609 .loc 1 1104 21 view .LVU558
1610 048c B0FBF3F0 udiv r0, r0, r3
1611 .LVL150:
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1612 .loc 1 1104 21 view .LVU559
1613 0490 94E0 b .L45
1614 .LVL151:
1615 .L63:
1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1616 .loc 1 1127 7 is_stmt 1 view .LVU560
1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1617 .loc 1 1127 16 is_stmt 0 view .LVU561
1618 0492 424B ldr r3, .L172
1619 0494 D3F88830 ldr r3, [r3, #136]
1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1620 .loc 1 1127 14 view .LVU562
1621 0498 03F04073 and r3, r3, #50331648
1622 .LVL152:
1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1623 .loc 1 1129 7 is_stmt 1 view .LVU563
1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1624 .loc 1 1129 9 is_stmt 0 view .LVU564
1625 049c B3F1007F cmp r3, #33554432
1626 04a0 07D0 beq .L165
1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1627 .loc 1 1133 12 is_stmt 1 view .LVU565
1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1628 .loc 1 1133 14 is_stmt 0 view .LVU566
1629 04a2 002B cmp r3, #0
1630 04a4 00F0BA80 beq .L130
1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1631 .loc 1 1137 12 is_stmt 1 view .LVU567
1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1632 .loc 1 1137 14 is_stmt 0 view .LVU568
1633 04a8 B3F1807F cmp r3, #16777216
1634 04ac 04D0 beq .L166
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1635 .loc 1 686 12 view .LVU569
1636 04ae 0020 movs r0, #0
1637 .LVL153:
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1638 .loc 1 686 12 view .LVU570
1639 04b0 84E0 b .L45
1640 .LVL154:
1641 .L165:
1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1642 .loc 1 1131 9 is_stmt 1 view .LVU571
1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1643 .loc 1 1131 21 is_stmt 0 view .LVU572
1644 04b2 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1645 .LVL155:
1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1646 .loc 1 1131 21 view .LVU573
1647 04b6 81E0 b .L45
1648 .LVL156:
1649 .L166:
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1650 .loc 1 1139 9 is_stmt 1 view .LVU574
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1651 .loc 1 1139 12 is_stmt 0 view .LVU575
1652 04b8 03F17C53 add r3, r3, #1056964608
1653 .LVL157:
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1654 .loc 1 1139 12 view .LVU576
1655 04bc 03F50433 add r3, r3, #135168
1656 .LVL158:
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1657 .loc 1 1139 12 view .LVU577
1658 04c0 D868 ldr r0, [r3, #12]
1659 .LVL159:
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1660 .loc 1 1139 11 view .LVU578
1661 04c2 10F48010 ands r0, r0, #1048576
1662 04c6 79D0 beq .L45
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1663 .loc 1 1142 11 is_stmt 1 view .LVU579
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1664 .loc 1 1142 18 is_stmt 0 view .LVU580
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1665 04c8 D868 ldr r0, [r3, #12]
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_
1666 .loc 1 1142 16 view .LVU581
1667 04ca C0F30620 ubfx r0, r0, #8, #7
1668 .LVL160:
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1669 .loc 1 1143 11 is_stmt 1 view .LVU582
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1670 .loc 1 1143 31 is_stmt 0 view .LVU583
1671 04ce 02FB00F0 mul r0, r2, r0
1672 .LVL161:
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1673 .loc 1 1143 44 view .LVU584
1674 04d2 DB68 ldr r3, [r3, #12]
1675 .LVL162:
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1676 .loc 1 1143 85 view .LVU585
1677 04d4 C3F34153 ubfx r3, r3, #21, #2
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1678 .loc 1 1143 110 view .LVU586
1679 04d8 0133 adds r3, r3, #1
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1680 .loc 1 1143 116 view .LVU587
1681 04da 5B00 lsls r3, r3, #1
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1682 .loc 1 1143 21 view .LVU588
1683 04dc B0FBF3F0 udiv r0, r0, r3
1684 .LVL163:
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1685 .loc 1 1143 21 view .LVU589
1686 04e0 6CE0 b .L45
1687 .LVL164:
1688 .L146:
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1689 .loc 1 1163 9 is_stmt 1 view .LVU590
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1690 .loc 1 1163 16 is_stmt 0 view .LVU591
1691 04e2 03F16053 add r3, r3, #939524096
1692 .LVL165:
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1693 .loc 1 1163 16 view .LVU592
1694 04e6 03F50433 add r3, r3, #135168
1695 .LVL166:
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1696 .loc 1 1163 16 view .LVU593
1697 04ea D868 ldr r0, [r3, #12]
1698 .LVL167:
1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1699 .loc 1 1163 14 view .LVU594
1700 04ec C0F30620 ubfx r0, r0, #8, #7
1701 .LVL168:
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1702 .loc 1 1164 9 is_stmt 1 view .LVU595
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1703 .loc 1 1164 29 is_stmt 0 view .LVU596
1704 04f0 02FB00F0 mul r0, r2, r0
1705 .LVL169:
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1706 .loc 1 1164 42 view .LVU597
1707 04f4 DB68 ldr r3, [r3, #12]
1708 .LVL170:
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1709 .loc 1 1164 83 view .LVU598
1710 04f6 C3F34153 ubfx r3, r3, #21, #2
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1711 .loc 1 1164 108 view .LVU599
1712 04fa 0133 adds r3, r3, #1
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1713 .loc 1 1164 114 view .LVU600
1714 04fc 5B00 lsls r3, r3, #1
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1715 .loc 1 1164 19 view .LVU601
1716 04fe B0FBF3F0 udiv r0, r0, r3
1717 .LVL171:
1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1718 .loc 1 1164 19 view .LVU602
1719 0502 5BE0 b .L45
1720 .LVL172:
1721 .L68:
1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI48_VALUE;
1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else /* No clock source */
1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* USB */
1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RNG:
1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current RNG source */
1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RNG_SOURCE();
1722 .loc 1 1180 7 is_stmt 1 view .LVU603
1723 .loc 1 1180 16 is_stmt 0 view .LVU604
1724 0504 254B ldr r3, .L172
1725 0506 D3F88830 ldr r3, [r3, #136]
1726 .loc 1 1180 14 view .LVU605
1727 050a 03F04063 and r3, r3, #201326592
1728 .LVL173:
1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_RNGCLKSOURCE_PLL) /* PLL ? */
1729 .loc 1 1182 7 is_stmt 1 view .LVU606
1730 .loc 1 1182 9 is_stmt 0 view .LVU607
1731 050e B3F1006F cmp r3, #134217728
1732 0512 09D0 beq .L167
1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if( (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) && (srcclk == RCC_RNGCLKSOURCE_HSI4
1733 .loc 1 1188 12 is_stmt 1 view .LVU608
1734 .loc 1 1188 17 is_stmt 0 view .LVU609
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1735 0514 214A ldr r2, .L172
1736 .LVL174:
1737 .loc 1 1188 17 view .LVU610
1738 0516 D2F89800 ldr r0, [r2, #152]
1739 .LVL175:
1740 .loc 1 1188 14 view .LVU611
1741 051a 10F00200 ands r0, r0, #2
1742 051e 4DD0 beq .L45
1743 .loc 1 1188 65 discriminator 1 view .LVU612
1744 0520 002B cmp r3, #0
1745 0522 7FD0 beq .L133
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
1746 .loc 1 686 12 view .LVU613
1747 0524 0020 movs r0, #0
1748 0526 49E0 b .L45
1749 .LVL176:
1750 .L167:
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1751 .loc 1 1185 9 is_stmt 1 view .LVU614
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1752 .loc 1 1185 16 is_stmt 0 view .LVU615
1753 0528 03F16053 add r3, r3, #939524096
1754 .LVL177:
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1755 .loc 1 1185 16 view .LVU616
1756 052c 03F50433 add r3, r3, #135168
1757 .LVL178:
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1758 .loc 1 1185 16 view .LVU617
1759 0530 D868 ldr r0, [r3, #12]
1760 .LVL179:
1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1761 .loc 1 1185 14 view .LVU618
1762 0532 C0F30620 ubfx r0, r0, #8, #7
1763 .LVL180:
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1764 .loc 1 1186 9 is_stmt 1 view .LVU619
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1765 .loc 1 1186 29 is_stmt 0 view .LVU620
1766 0536 02FB00F0 mul r0, r2, r0
1767 .LVL181:
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1768 .loc 1 1186 42 view .LVU621
1769 053a DB68 ldr r3, [r3, #12]
1770 .LVL182:
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1771 .loc 1 1186 83 view .LVU622
1772 053c C3F34153 ubfx r3, r3, #21, #2
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1773 .loc 1 1186 108 view .LVU623
1774 0540 0133 adds r3, r3, #1
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1775 .loc 1 1186 114 view .LVU624
1776 0542 5B00 lsls r3, r3, #1
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1777 .loc 1 1186 19 view .LVU625
1778 0544 B0FBF3F0 udiv r0, r0, r3
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1779 .LVL183:
1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1780 .loc 1 1186 19 view .LVU626
1781 0548 38E0 b .L45
1782 .LVL184:
1783 .L69:
1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI48_VALUE;
1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else /* No clock source */
1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC12:
1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current ADC12 source */
1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC12_SOURCE();
1784 .loc 1 1200 7 is_stmt 1 view .LVU627
1785 .loc 1 1200 16 is_stmt 0 view .LVU628
1786 054a 144B ldr r3, .L172
1787 054c D3F88830 ldr r3, [r3, #136]
1788 .loc 1 1200 14 view .LVU629
1789 0550 03F04053 and r3, r3, #805306368
1790 .LVL185:
1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_ADC12CLKSOURCE_PLL)
1791 .loc 1 1202 7 is_stmt 1 view .LVU630
1792 .loc 1 1202 9 is_stmt 0 view .LVU631
1793 0554 B3F1805F cmp r3, #268435456
1794 0558 04D0 beq .L168
1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_ADCCLK) != 0U)
1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLP) = f(VCO input) * PLLN / PLLP */
1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos;
1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pllp == 0U)
1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != 0U)
1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = 17U;
1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = 7U;
1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / pllp;
1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_ADC12CLKSOURCE_SYSCLK)
1795 .loc 1 1223 12 is_stmt 1 view .LVU632
1796 .loc 1 1223 14 is_stmt 0 view .LVU633
1797 055a B3F1005F cmp r3, #536870912
1798 055e 1FD0 beq .L169
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t srcclk;
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1799 .loc 1 686 12 view .LVU634
1800 0560 0020 movs r0, #0
1801 .LVL186:
1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for ADC12 */
1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(ADC345_COMMON)
1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC345:
1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current ADC345 source */
1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC345_SOURCE();
1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_ADC345CLKSOURCE_PLL)
1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_ADCCLK) != 0U)
1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLP) = f(VCO input) * PLLN / PLLP */
1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos;
1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pllp == 0U)
1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != 0U)
1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = 17U;
1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = 7U;
1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / pllp;
1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_ADC345CLKSOURCE_SYSCLK)
1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clock not enabled for ADC345 */
1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* ADC345_COMMON */
1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(QUADSPI)
1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_QSPI:
1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the current QSPI source */
1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_QSPI_SOURCE();
1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(srcclk == RCC_QSPICLKSOURCE_PLL) /* PLL ? */
1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* f(PLLQ) = f(VCO input) * PLLN / PLLQ */
1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos;
1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PL
1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_QSPICLKSOURCE_HSI)
1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(srcclk == RCC_QSPICLKSOURCE_SYSCLK)
1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else /* No clock source */
1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0 */
1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #endif /* QUADSPI */
2023-07-02 17:09:41 +02:00
1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** default:
1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** break;
1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** return(frequency);
1802 .loc 1 1305 3 is_stmt 1 view .LVU635
1803 .loc 1 1305 9 is_stmt 0 view .LVU636
1804 0562 2BE0 b .L45
1805 .LVL187:
1806 .L168:
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1807 .loc 1 1204 9 is_stmt 1 view .LVU637
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1808 .loc 1 1204 12 is_stmt 0 view .LVU638
1809 0564 03F14053 add r3, r3, #805306368
1810 .LVL188:
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1811 .loc 1 1204 12 view .LVU639
1812 0568 03F50433 add r3, r3, #135168
1813 .LVL189:
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1814 .loc 1 1204 12 view .LVU640
1815 056c D868 ldr r0, [r3, #12]
1816 .LVL190:
1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1817 .loc 1 1204 11 view .LVU641
1818 056e 10F48030 ands r0, r0, #65536
1819 0572 23D0 beq .L45
1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos;
1820 .loc 1 1207 11 is_stmt 1 view .LVU642
1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos;
1821 .loc 1 1207 18 is_stmt 0 view .LVU643
1822 0574 D968 ldr r1, [r3, #12]
1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos;
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1823 .loc 1 1207 16 view .LVU644
1824 0576 C1F30621 ubfx r1, r1, #8, #7
1825 .LVL191:
1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pllp == 0U)
1826 .loc 1 1208 11 is_stmt 1 view .LVU645
1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pllp == 0U)
1827 .loc 1 1208 18 is_stmt 0 view .LVU646
1828 057a DB68 ldr r3, [r3, #12]
1829 .LVL192:
1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1830 .loc 1 1209 11 is_stmt 1 view .LVU647
1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1831 .loc 1 1209 13 is_stmt 0 view .LVU648
1832 057c DB0E lsrs r3, r3, #27
1833 .LVL193:
1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1834 .loc 1 1209 13 view .LVU649
1835 057e 05D1 bne .L103
1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1836 .loc 1 1211 13 is_stmt 1 view .LVU650
1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1837 .loc 1 1211 16 is_stmt 0 view .LVU651
1838 0580 064B ldr r3, .L172
1839 .LVL194:
1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1840 .loc 1 1211 16 view .LVU652
1841 0582 DB68 ldr r3, [r3, #12]
1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1842 .loc 1 1211 15 view .LVU653
1843 0584 13F4003F tst r3, #131072
1844 0588 05D0 beq .L134
1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1845 .loc 1 1213 20 view .LVU654
1846 058a 1123 movs r3, #17
1847 .L103:
1848 .LVL195:
1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1849 .loc 1 1220 11 is_stmt 1 view .LVU655
1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1850 .loc 1 1220 31 is_stmt 0 view .LVU656
1851 058c 01FB02F2 mul r2, r1, r2
1852 .LVL196:
1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1853 .loc 1 1220 21 view .LVU657
1854 0590 B2FBF3F0 udiv r0, r2, r3
1855 .LVL197:
1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1856 .loc 1 1220 21 view .LVU658
1857 0594 12E0 b .L45
1858 .LVL198:
1859 .L134:
1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1860 .loc 1 1217 20 view .LVU659
1861 0596 0723 movs r3, #7
1862 0598 F8E7 b .L103
1863 .L173:
1864 059a 00BF .align 2
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1865 .L172:
1866 059c 00100240 .word 1073876992
1867 .LVL199:
1868 .L169:
1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1869 .loc 1 1225 9 is_stmt 1 view .LVU660
1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1870 .loc 1 1225 21 is_stmt 0 view .LVU661
1871 05a0 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1872 .LVL200:
1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1873 .loc 1 1225 21 view .LVU662
1874 05a4 0AE0 b .L45
1875 .LVL201:
1876 .L104:
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1877 .loc 1 701 17 view .LVU663
1878 05a6 4FF40040 mov r0, #32768
1879 .LVL202:
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1880 .loc 1 701 17 view .LVU664
1881 05aa 07E0 b .L45
1882 .LVL203:
1883 .L105:
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1884 .loc 1 706 17 view .LVU665
1885 05ac 4FF4FA40 mov r0, #32000
1886 .LVL204:
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1887 .loc 1 706 17 view .LVU666
1888 05b0 04E0 b .L45
1889 .L106:
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1890 .loc 1 711 17 view .LVU667
1891 05b2 1D48 ldr r0, .L174
1892 05b4 02E0 b .L45
1893 .LVL205:
1894 .L108:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1895 .loc 1 754 5 view .LVU668
1896 05b6 0020 movs r0, #0
1897 .LVL206:
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1898 .loc 1 754 5 view .LVU669
1899 05b8 00E0 b .L45
1900 .L109:
1901 05ba 0020 movs r0, #0
1902 .LVL207:
1903 .L45:
1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1904 .loc 1 1306 1 view .LVU670
1905 05bc 08BD pop {r3, pc}
1906 .LVL208:
1907 .L110:
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1908 .loc 1 771 19 view .LVU671
1909 05be 1B48 ldr r0, .L174+4
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1910 .LVL209:
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1911 .loc 1 771 19 view .LVU672
1912 05c0 FCE7 b .L45
1913 .L111:
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1914 .loc 1 775 19 view .LVU673
1915 05c2 4FF40040 mov r0, #32768
1916 05c6 F9E7 b .L45
1917 .L112:
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1918 .loc 1 798 19 view .LVU674
1919 05c8 1848 ldr r0, .L174+4
1920 05ca F7E7 b .L45
1921 .L113:
802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1922 .loc 1 802 19 view .LVU675
1923 05cc 4FF40040 mov r0, #32768
1924 05d0 F4E7 b .L45
1925 .L114:
826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1926 .loc 1 826 19 view .LVU676
1927 05d2 1648 ldr r0, .L174+4
1928 05d4 F2E7 b .L45
1929 .L115:
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1930 .loc 1 830 19 view .LVU677
1931 05d6 4FF40040 mov r0, #32768
1932 05da EFE7 b .L45
1933 .L116:
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1934 .loc 1 855 19 view .LVU678
1935 05dc 1348 ldr r0, .L174+4
1936 05de EDE7 b .L45
1937 .L117:
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1938 .loc 1 859 19 view .LVU679
1939 05e0 4FF40040 mov r0, #32768
1940 05e4 EAE7 b .L45
1941 .L118:
912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1942 .loc 1 912 19 view .LVU680
1943 05e6 1148 ldr r0, .L174+4
1944 05e8 E8E7 b .L45
1945 .L119:
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1946 .loc 1 916 19 view .LVU681
1947 05ea 4FF40040 mov r0, #32768
1948 05ee E5E7 b .L45
1949 .L120:
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1950 .loc 1 939 19 view .LVU682
1951 05f0 0E48 ldr r0, .L174+4
1952 05f2 E3E7 b .L45
1953 .L121:
962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1954 .loc 1 962 19 view .LVU683
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
1955 05f4 0D48 ldr r0, .L174+4
1956 05f6 E1E7 b .L45
1957 .L122:
987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1958 .loc 1 987 19 view .LVU684
1959 05f8 0C48 ldr r0, .L174+4
1960 05fa DFE7 b .L45
1961 .LVL210:
1962 .L123:
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1963 .loc 1 1035 19 view .LVU685
1964 05fc 4FF4FA40 mov r0, #32000
1965 .LVL211:
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1966 .loc 1 1035 19 view .LVU686
1967 0600 DCE7 b .L45
1968 .LVL212:
1969 .L124:
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1970 .loc 1 1039 19 view .LVU687
1971 0602 0A48 ldr r0, .L174+4
1972 .LVL213:
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1973 .loc 1 1039 19 view .LVU688
1974 0604 DAE7 b .L45
1975 .L125:
1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1976 .loc 1 1043 19 view .LVU689
1977 0606 4FF40040 mov r0, #32768
1978 060a D7E7 b .L45
1979 .LVL214:
1980 .L126:
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1981 .loc 1 1074 19 view .LVU690
1982 060c 0848 ldr r0, .L174+8
1983 .LVL215:
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1984 .loc 1 1074 19 view .LVU691
1985 060e D5E7 b .L45
1986 .LVL216:
1987 .L127:
1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1988 .loc 1 1078 19 view .LVU692
1989 0610 0648 ldr r0, .L174+4
1990 0612 D3E7 b .L45
1991 .LVL217:
1992 .L128:
1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1993 .loc 1 1110 19 view .LVU693
1994 0614 0648 ldr r0, .L174+8
1995 .LVL218:
1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1996 .loc 1 1110 19 view .LVU694
1997 0616 D1E7 b .L45
1998 .LVL219:
1999 .L129:
1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2000 .loc 1 1114 19 view .LVU695
2001 0618 0448 ldr r0, .L174+4
2002 061a CFE7 b .L45
2003 .LVL220:
2004 .L130:
1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2005 .loc 1 1135 19 view .LVU696
2025-06-28 00:58:29 +02:00
2006 061c 0548 ldr r0, .L174+12
2025-01-28 19:01:22 +01:00
2007 .LVL221:
1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2008 .loc 1 1135 19 view .LVU697
2009 061e CDE7 b .L45
2010 .LVL222:
2011 .L132:
1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2012 .loc 1 1168 19 view .LVU698
2025-06-28 00:58:29 +02:00
2013 0620 0548 ldr r0, .L174+16
2025-01-28 19:01:22 +01:00
2014 0622 CBE7 b .L45
2015 .L133:
1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2016 .loc 1 1190 19 view .LVU699
2025-06-28 00:58:29 +02:00
2017 0624 0448 ldr r0, .L174+16
2025-01-28 19:01:22 +01:00
2018 0626 C9E7 b .L45
2019 .L175:
2020 .align 2
2021 .L174:
2025-06-28 00:58:29 +02:00
2022 0628 B0710B00 .word 750000
2025-01-28 19:01:22 +01:00
2023 062c 0024F400 .word 16000000
2024 0630 0080BB00 .word 12288000
2025-06-28 00:58:29 +02:00
2025 0634 00366E01 .word 24000000
2026 0638 006CDC02 .word 48000000
2027 .cfi_endproc
2028 .LFE331:
2030 .section .text.HAL_RCCEx_EnableLSECSS,"ax",%progbits
2031 .align 1
2032 .global HAL_RCCEx_EnableLSECSS
2033 .syntax unified
2034 .thumb
2035 .thumb_func
2037 HAL_RCCEx_EnableLSECSS:
2038 .LFB332:
2025-01-28 19:01:22 +01:00
1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @}
1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group2 Extended Clock management functions
1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Extended Clock management functions
1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @verbatim
1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ##### Extended clock management functions #####
1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** [..]
1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the
1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** activation or deactivation of LSE CSS,
1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** Low speed clock output and clock after wake-up from STOP mode.
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @endverbatim
2025-01-28 19:01:22 +01:00
1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
2023-07-02 17:09:41 +02:00
1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
2025-01-28 19:01:22 +01:00
1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Enable the LSE Clock Security System.
1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled
1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC
1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * clock with HAL_RCCEx_PeriphCLKConfig().
1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableLSECSS(void)
1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2039 .loc 1 1335 1 is_stmt 1 view -0
2040 .cfi_startproc
2041 @ args = 0, pretend = 0, frame = 0
2042 @ frame_needed = 0, uses_anonymous_args = 0
2043 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
2025-06-28 00:58:29 +02:00
2044 .loc 1 1336 3 view .LVU701
2045 0000 034A ldr r2, .L177
2046 0002 D2F89030 ldr r3, [r2, #144]
2047 0006 43F02003 orr r3, r3, #32
2048 000a C2F89030 str r3, [r2, #144]
2023-07-02 17:09:41 +02:00
1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2049 .loc 1 1337 1 is_stmt 0 view .LVU702
2050 000e 7047 bx lr
2051 .L178:
2052 .align 2
2053 .L177:
2054 0010 00100240 .word 1073876992
2055 .cfi_endproc
2056 .LFE332:
2058 .section .text.HAL_RCCEx_DisableLSECSS,"ax",%progbits
2059 .align 1
2060 .global HAL_RCCEx_DisableLSECSS
2061 .syntax unified
2062 .thumb
2063 .thumb_func
2065 HAL_RCCEx_DisableLSECSS:
2066 .LFB333:
2023-07-02 17:09:41 +02:00
1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
2025-01-28 19:01:22 +01:00
1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Disable the LSE Clock Security System.
1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note LSE Clock Security System can only be disabled after a LSE failure detection.
1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_DisableLSECSS(void)
1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2067 .loc 1 1345 1 is_stmt 1 view -0
2068 .cfi_startproc
2069 @ args = 0, pretend = 0, frame = 0
2070 @ frame_needed = 0, uses_anonymous_args = 0
2071 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
2025-06-28 00:58:29 +02:00
2072 .loc 1 1346 3 view .LVU704
2073 0000 054B ldr r3, .L180
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2074 0002 D3F89020 ldr r2, [r3, #144]
2075 0006 22F02002 bic r2, r2, #32
2076 000a C3F89020 str r2, [r3, #144]
2025-01-28 19:01:22 +01:00
1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Disable LSE CSS IT if any */
1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS);
2025-06-28 00:58:29 +02:00
2077 .loc 1 1349 3 view .LVU705
2078 000e 9A69 ldr r2, [r3, #24]
2079 0010 22F40072 bic r2, r2, #512
2080 0014 9A61 str r2, [r3, #24]
2025-01-28 19:01:22 +01:00
1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2081 .loc 1 1350 1 is_stmt 0 view .LVU706
2082 0016 7047 bx lr
2083 .L181:
2084 .align 2
2085 .L180:
2086 0018 00100240 .word 1073876992
2087 .cfi_endproc
2088 .LFE333:
2090 .section .text.HAL_RCCEx_EnableLSECSS_IT,"ax",%progbits
2091 .align 1
2092 .global HAL_RCCEx_EnableLSECSS_IT
2093 .syntax unified
2094 .thumb
2095 .thumb_func
2097 HAL_RCCEx_EnableLSECSS_IT:
2098 .LFB334:
2025-01-28 19:01:22 +01:00
1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Enable the LSE Clock Security System Interrupt & corresponding EXTI line.
1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note LSE Clock Security System Interrupt is mapped on RTC EXTI line 19
1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableLSECSS_IT(void)
1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2099 .loc 1 1358 1 is_stmt 1 view -0
2100 .cfi_startproc
2101 @ args = 0, pretend = 0, frame = 0
2102 @ frame_needed = 0, uses_anonymous_args = 0
2103 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable LSE CSS */
1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
2025-06-28 00:58:29 +02:00
2104 .loc 1 1360 3 view .LVU708
2105 0000 0A4B ldr r3, .L183
2106 0002 D3F89020 ldr r2, [r3, #144]
2107 0006 42F02002 orr r2, r2, #32
2108 000a C3F89020 str r2, [r3, #144]
2025-01-28 19:01:22 +01:00
1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable LSE CSS IT */
1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS);
2025-06-28 00:58:29 +02:00
2109 .loc 1 1363 3 view .LVU709
2110 000e 9A69 ldr r2, [r3, #24]
2111 0010 42F40072 orr r2, r2, #512
2112 0014 9A61 str r2, [r3, #24]
2025-01-28 19:01:22 +01:00
1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable IT on EXTI Line 19 */
1366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_LSECSS_EXTI_ENABLE_IT();
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2113 .loc 1 1366 3 view .LVU710
2114 0016 A3F58633 sub r3, r3, #68608
2115 001a 1A68 ldr r2, [r3]
2116 001c 42F40022 orr r2, r2, #524288
2117 0020 1A60 str r2, [r3]
2025-01-28 19:01:22 +01:00
1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE();
2025-06-28 00:58:29 +02:00
2118 .loc 1 1367 3 view .LVU711
2119 0022 9A68 ldr r2, [r3, #8]
2120 0024 42F40022 orr r2, r2, #524288
2121 0028 9A60 str r2, [r3, #8]
2025-01-28 19:01:22 +01:00
1368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2122 .loc 1 1368 1 is_stmt 0 view .LVU712
2123 002a 7047 bx lr
2124 .L184:
2125 .align 2
2126 .L183:
2127 002c 00100240 .word 1073876992
2128 .cfi_endproc
2129 .LFE334:
2131 .section .text.HAL_RCCEx_LSECSS_Callback,"ax",%progbits
2132 .align 1
2133 .weak HAL_RCCEx_LSECSS_Callback
2134 .syntax unified
2135 .thumb
2136 .thumb_func
2138 HAL_RCCEx_LSECSS_Callback:
2139 .LFB336:
2023-07-02 17:09:41 +02:00
1369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Handle the RCC LSE Clock Security System interrupt request.
1372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_LSECSS_IRQHandler(void)
1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check RCC LSE CSSF flag */
1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_IT(RCC_IT_LSECSS))
1378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* RCC LSE Clock Security System interrupt user callback */
1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_LSECSS_Callback();
1381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear RCC LSE CSS pending bit */
1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS);
1384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCCEx LSE Clock Security System interrupt callback.
1389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval none
1390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_LSECSS_Callback(void)
1392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2140 .loc 1 1392 1 is_stmt 1 view -0
2141 .cfi_startproc
2142 @ args = 0, pretend = 0, frame = 0
2143 @ frame_needed = 0, uses_anonymous_args = 0
2144 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file
2025-01-28 19:01:22 +01:00
1395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2145 .loc 1 1396 1 view .LVU714
2146 0000 7047 bx lr
2147 .cfi_endproc
2148 .LFE336:
2150 .section .text.HAL_RCCEx_LSECSS_IRQHandler,"ax",%progbits
2151 .align 1
2152 .global HAL_RCCEx_LSECSS_IRQHandler
2153 .syntax unified
2154 .thumb
2155 .thumb_func
2157 HAL_RCCEx_LSECSS_IRQHandler:
2158 .LFB335:
2025-01-28 19:01:22 +01:00
1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check RCC LSE CSSF flag */
2025-06-28 00:58:29 +02:00
2159 .loc 1 1375 1 view -0
2160 .cfi_startproc
2161 @ args = 0, pretend = 0, frame = 0
2162 @ frame_needed = 0, uses_anonymous_args = 0
2163 0000 08B5 push {r3, lr}
2164 .LCFI5:
2165 .cfi_def_cfa_offset 8
2166 .cfi_offset 3, -8
2167 .cfi_offset 14, -4
2025-01-28 19:01:22 +01:00
1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2168 .loc 1 1377 3 view .LVU716
2025-01-28 19:01:22 +01:00
1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2169 .loc 1 1377 6 is_stmt 0 view .LVU717
2170 0002 064B ldr r3, .L190
2171 0004 DB69 ldr r3, [r3, #28]
2025-01-28 19:01:22 +01:00
1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2172 .loc 1 1377 5 view .LVU718
2173 0006 13F4007F tst r3, #512
2174 000a 00D1 bne .L189
2175 .L186:
2025-01-28 19:01:22 +01:00
1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2176 .loc 1 1385 1 view .LVU719
2177 000c 08BD pop {r3, pc}
2178 .L189:
2025-01-28 19:01:22 +01:00
1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2179 .loc 1 1380 5 is_stmt 1 view .LVU720
2180 000e FFF7FEFF bl HAL_RCCEx_LSECSS_Callback
2181 .LVL223:
2025-01-28 19:01:22 +01:00
1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2182 .loc 1 1383 5 view .LVU721
2183 0012 024B ldr r3, .L190
2184 0014 4FF40072 mov r2, #512
2185 0018 1A62 str r2, [r3, #32]
2025-01-28 19:01:22 +01:00
1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2186 .loc 1 1385 1 is_stmt 0 view .LVU722
2187 001a F7E7 b .L186
2188 .L191:
2189 .align 2
2190 .L190:
2191 001c 00100240 .word 1073876992
2192 .cfi_endproc
2193 .LFE335:
2195 .section .text.HAL_RCCEx_EnableLSCO,"ax",%progbits
2196 .align 1
2197 .global HAL_RCCEx_EnableLSCO
2198 .syntax unified
2199 .thumb
2200 .thumb_func
2202 HAL_RCCEx_EnableLSCO:
2203 .LVL224:
2204 .LFB337:
2025-01-28 19:01:22 +01:00
1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Select the Low Speed clock source to output on LSCO pin (PA2).
1400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param LSCOSource specifies the Low Speed clock source to output.
1401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This parameter can be one of the following values:
1402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_LSCOSOURCE_LSI LSI clock selected as LSCO source
1403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_LSCOSOURCE_LSE LSE clock selected as LSCO source
1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource)
1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2205 .loc 1 1407 1 is_stmt 1 view -0
2206 .cfi_startproc
2207 @ args = 0, pretend = 0, frame = 32
2208 @ frame_needed = 0, uses_anonymous_args = 0
2209 .loc 1 1407 1 is_stmt 0 view .LVU724
2210 0000 30B5 push {r4, r5, lr}
2211 .LCFI6:
2212 .cfi_def_cfa_offset 12
2213 .cfi_offset 4, -12
2214 .cfi_offset 5, -8
2215 .cfi_offset 14, -4
2216 0002 89B0 sub sp, sp, #36
2217 .LCFI7:
2218 .cfi_def_cfa_offset 48
2219 0004 0546 mov r5, r0
2025-01-28 19:01:22 +01:00
1408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** GPIO_InitTypeDef GPIO_InitStruct;
2025-06-28 00:58:29 +02:00
2220 .loc 1 1408 3 is_stmt 1 view .LVU725
2025-01-28 19:01:22 +01:00
1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
2025-06-28 00:58:29 +02:00
2221 .loc 1 1409 3 view .LVU726
2222 .LVL225:
2025-01-28 19:01:22 +01:00
1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus backupchanged = RESET;
2025-06-28 00:58:29 +02:00
2223 .loc 1 1410 3 view .LVU727
2025-01-28 19:01:22 +01:00
1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
1413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_LSCOSOURCE(LSCOSource));
2025-06-28 00:58:29 +02:00
2224 .loc 1 1413 3 view .LVU728
2025-01-28 19:01:22 +01:00
1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* LSCO Pin Clock Enable */
1416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __LSCO_CLK_ENABLE();
2025-06-28 00:58:29 +02:00
2225 .loc 1 1416 3 view .LVU729
2226 .LBB5:
2227 .loc 1 1416 3 view .LVU730
2228 .loc 1 1416 3 view .LVU731
2229 0006 244C ldr r4, .L203
2230 0008 E36C ldr r3, [r4, #76]
2231 000a 43F00103 orr r3, r3, #1
2232 000e E364 str r3, [r4, #76]
2233 .loc 1 1416 3 view .LVU732
2234 0010 E36C ldr r3, [r4, #76]
2235 0012 03F00103 and r3, r3, #1
2236 0016 0193 str r3, [sp, #4]
2237 .loc 1 1416 3 view .LVU733
2238 0018 019B ldr r3, [sp, #4]
2239 .LBE5:
2240 .loc 1 1416 3 view .LVU734
2025-01-28 19:01:22 +01:00
1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Configure the LSCO pin in analog mode */
1419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** GPIO_InitStruct.Pin = LSCO_PIN;
2025-06-28 00:58:29 +02:00
2241 .loc 1 1419 3 view .LVU735
2242 .loc 1 1419 23 is_stmt 0 view .LVU736
2243 001a 0423 movs r3, #4
2244 001c 0393 str r3, [sp, #12]
2025-01-28 19:01:22 +01:00
1420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
2025-06-28 00:58:29 +02:00
2245 .loc 1 1420 3 is_stmt 1 view .LVU737
2246 .loc 1 1420 24 is_stmt 0 view .LVU738
2247 001e 0323 movs r3, #3
2248 0020 0493 str r3, [sp, #16]
2025-01-28 19:01:22 +01:00
1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
2025-06-28 00:58:29 +02:00
2249 .loc 1 1421 3 is_stmt 1 view .LVU739
2250 .loc 1 1421 25 is_stmt 0 view .LVU740
2251 0022 0223 movs r3, #2
2252 0024 0693 str r3, [sp, #24]
2025-01-28 19:01:22 +01:00
1422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
2025-06-28 00:58:29 +02:00
2253 .loc 1 1422 3 is_stmt 1 view .LVU741
2254 .loc 1 1422 24 is_stmt 0 view .LVU742
2255 0026 0023 movs r3, #0
2256 0028 0593 str r3, [sp, #20]
2025-01-28 19:01:22 +01:00
1423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct);
2025-06-28 00:58:29 +02:00
2257 .loc 1 1423 3 is_stmt 1 view .LVU743
2258 002a 03A9 add r1, sp, #12
2259 002c 4FF09040 mov r0, #1207959552
2260 .LVL226:
2261 .loc 1 1423 3 is_stmt 0 view .LVU744
2262 0030 FFF7FEFF bl HAL_GPIO_Init
2263 .LVL227:
2023-07-02 17:09:41 +02:00
1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Update LSCOSEL clock source in Backup Domain control register */
1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
2025-06-28 00:58:29 +02:00
2264 .loc 1 1426 3 is_stmt 1 view .LVU745
2265 .loc 1 1426 6 is_stmt 0 view .LVU746
2266 0034 A36D ldr r3, [r4, #88]
2267 .loc 1 1426 5 view .LVU747
2268 0036 13F0805F tst r3, #268435456
2269 003a 1DD1 bne .L197
2023-07-02 17:09:41 +02:00
1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
2025-06-28 00:58:29 +02:00
2270 .loc 1 1428 5 is_stmt 1 view .LVU748
2271 .LBB6:
2272 .loc 1 1428 5 view .LVU749
2273 .loc 1 1428 5 view .LVU750
2274 003c A26D ldr r2, [r4, #88]
2275 003e 42F08052 orr r2, r2, #268435456
2276 0042 A265 str r2, [r4, #88]
2277 .loc 1 1428 5 view .LVU751
2278 0044 A36D ldr r3, [r4, #88]
2279 0046 03F08053 and r3, r3, #268435456
2280 004a 0293 str r3, [sp, #8]
2281 .loc 1 1428 5 view .LVU752
2282 004c 029B ldr r3, [sp, #8]
2283 .LBE6:
2284 .loc 1 1428 5 view .LVU753
2025-01-28 19:01:22 +01:00
1429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pwrclkchanged = SET;
2025-06-28 00:58:29 +02:00
2285 .loc 1 1429 5 view .LVU754
2286 .LVL228:
2287 .loc 1 1429 19 is_stmt 0 view .LVU755
2288 004e 0124 movs r4, #1
2289 .LVL229:
2290 .L193:
2023-07-02 17:09:41 +02:00
1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
2025-06-28 00:58:29 +02:00
2291 .loc 1 1431 3 is_stmt 1 view .LVU756
2292 .loc 1 1431 6 is_stmt 0 view .LVU757
2293 0050 124B ldr r3, .L203+4
2294 0052 1B68 ldr r3, [r3]
2295 .loc 1 1431 5 view .LVU758
2296 0054 13F4807F tst r3, #256
2297 0058 10D0 beq .L200
2025-01-28 19:01:22 +01:00
1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2298 .loc 1 1410 20 view .LVU759
2299 005a 0022 movs r2, #0
2300 .LVL230:
2301 .L194:
2023-07-02 17:09:41 +02:00
1432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_PWR_EnableBkUpAccess();
1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** backupchanged = SET;
1435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2023-07-02 17:09:41 +02:00
1436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN);
2025-06-28 00:58:29 +02:00
2302 .loc 1 1437 3 is_stmt 1 view .LVU760
2303 005c 0E4B ldr r3, .L203
2304 005e D3F89000 ldr r0, [r3, #144]
2305 0062 20F04070 bic r0, r0, #50331648
2306 0066 2843 orrs r0, r0, r5
2307 0068 40F08070 orr r0, r0, #16777216
2308 006c C3F89000 str r0, [r3, #144]
2025-01-28 19:01:22 +01:00
1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(backupchanged == SET)
2025-06-28 00:58:29 +02:00
2309 .loc 1 1439 3 view .LVU761
2310 .loc 1 1439 5 is_stmt 0 view .LVU762
2311 0070 42B9 cbnz r2, .L201
2312 .LVL231:
2313 .L195:
2025-01-28 19:01:22 +01:00
1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_PWR_DisableBkUpAccess();
1442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
2025-06-28 00:58:29 +02:00
2314 .loc 1 1443 3 is_stmt 1 view .LVU763
2315 .loc 1 1443 5 is_stmt 0 view .LVU764
2316 0072 54B9 cbnz r4, .L202
2317 .L192:
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
1446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2318 .loc 1 1447 1 view .LVU765
2319 0074 09B0 add sp, sp, #36
2320 .LCFI8:
2321 .cfi_remember_state
2322 .cfi_def_cfa_offset 12
2323 @ sp needed
2324 0076 30BD pop {r4, r5, pc}
2325 .LVL232:
2326 .L197:
2327 .LCFI9:
2328 .cfi_restore_state
2025-01-28 19:01:22 +01:00
1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus backupchanged = RESET;
2025-06-28 00:58:29 +02:00
2329 .loc 1 1409 20 view .LVU766
2330 0078 0024 movs r4, #0
2331 007a E9E7 b .L193
2332 .LVL233:
2333 .L200:
2025-01-28 19:01:22 +01:00
1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** backupchanged = SET;
2025-06-28 00:58:29 +02:00
2334 .loc 1 1433 5 is_stmt 1 view .LVU767
2335 007c FFF7FEFF bl HAL_PWR_EnableBkUpAccess
2336 .LVL234:
2025-01-28 19:01:22 +01:00
1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2337 .loc 1 1434 5 view .LVU768
2025-01-28 19:01:22 +01:00
1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2338 .loc 1 1434 19 is_stmt 0 view .LVU769
2339 0080 0122 movs r2, #1
2340 0082 EBE7 b .L194
2341 .LVL235:
2342 .L201:
2025-01-28 19:01:22 +01:00
1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2343 .loc 1 1441 5 is_stmt 1 view .LVU770
2344 0084 FFF7FEFF bl HAL_PWR_DisableBkUpAccess
2345 .LVL236:
2025-01-28 19:01:22 +01:00
1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2346 .loc 1 1441 5 is_stmt 0 view .LVU771
2347 0088 F3E7 b .L195
2348 .L202:
2025-01-28 19:01:22 +01:00
1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2349 .loc 1 1445 5 is_stmt 1 view .LVU772
2350 008a 034A ldr r2, .L203
2351 008c 936D ldr r3, [r2, #88]
2352 008e 23F08053 bic r3, r3, #268435456
2353 0092 9365 str r3, [r2, #88]
2354 .loc 1 1447 1 is_stmt 0 view .LVU773
2355 0094 EEE7 b .L192
2356 .L204:
2357 0096 00BF .align 2
2358 .L203:
2359 0098 00100240 .word 1073876992
2360 009c 00700040 .word 1073770496
2361 .cfi_endproc
2362 .LFE337:
2364 .section .text.HAL_RCCEx_DisableLSCO,"ax",%progbits
2365 .align 1
2366 .global HAL_RCCEx_DisableLSCO
2367 .syntax unified
2368 .thumb
2369 .thumb_func
2371 HAL_RCCEx_DisableLSCO:
2372 .LFB338:
2025-01-28 19:01:22 +01:00
1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Disable the Low Speed clock output.
1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_DisableLSCO(void)
1454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2373 .loc 1 1454 1 is_stmt 1 view -0
2374 .cfi_startproc
2375 @ args = 0, pretend = 0, frame = 8
2376 @ frame_needed = 0, uses_anonymous_args = 0
2377 0000 10B5 push {r4, lr}
2378 .LCFI10:
2379 .cfi_def_cfa_offset 8
2380 .cfi_offset 4, -8
2381 .cfi_offset 14, -4
2382 0002 82B0 sub sp, sp, #8
2383 .LCFI11:
2384 .cfi_def_cfa_offset 16
2025-01-28 19:01:22 +01:00
1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
2025-06-28 00:58:29 +02:00
2385 .loc 1 1455 3 view .LVU775
2386 .LVL237:
2025-01-28 19:01:22 +01:00
1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus backupchanged = RESET;
2025-06-28 00:58:29 +02:00
2387 .loc 1 1456 3 view .LVU776
2023-07-02 17:09:41 +02:00
1457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Update LSCOEN bit in Backup Domain control register */
1459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
2025-06-28 00:58:29 +02:00
2388 .loc 1 1459 3 view .LVU777
2389 .loc 1 1459 6 is_stmt 0 view .LVU778
2390 0004 174B ldr r3, .L216
2391 0006 9B6D ldr r3, [r3, #88]
2392 .loc 1 1459 5 view .LVU779
2393 0008 13F0805F tst r3, #268435456
2394 000c 1BD1 bne .L210
2025-01-28 19:01:22 +01:00
1460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
2025-06-28 00:58:29 +02:00
2395 .loc 1 1461 5 is_stmt 1 view .LVU780
2396 .LBB7:
2397 .loc 1 1461 5 view .LVU781
2398 .loc 1 1461 5 view .LVU782
2399 000e 154B ldr r3, .L216
2400 0010 9A6D ldr r2, [r3, #88]
2401 0012 42F08052 orr r2, r2, #268435456
2402 0016 9A65 str r2, [r3, #88]
2403 .loc 1 1461 5 view .LVU783
2404 0018 9B6D ldr r3, [r3, #88]
2405 001a 03F08053 and r3, r3, #268435456
2406 001e 0193 str r3, [sp, #4]
2407 .loc 1 1461 5 view .LVU784
2408 0020 019B ldr r3, [sp, #4]
2409 .LBE7:
2410 .loc 1 1461 5 view .LVU785
2025-01-28 19:01:22 +01:00
1462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pwrclkchanged = SET;
2025-06-28 00:58:29 +02:00
2411 .loc 1 1462 5 view .LVU786
2412 .LVL238:
2413 .loc 1 1462 19 is_stmt 0 view .LVU787
2414 0022 0124 movs r4, #1
2415 .LVL239:
2416 .L206:
2025-01-28 19:01:22 +01:00
1463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
2025-06-28 00:58:29 +02:00
2417 .loc 1 1464 3 is_stmt 1 view .LVU788
2418 .loc 1 1464 6 is_stmt 0 view .LVU789
2419 0024 104B ldr r3, .L216+4
2420 0026 1B68 ldr r3, [r3]
2421 .loc 1 1464 5 view .LVU790
2422 0028 13F4807F tst r3, #256
2423 002c 0DD0 beq .L213
2025-01-28 19:01:22 +01:00
1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2424 .loc 1 1456 20 view .LVU791
2425 002e 0021 movs r1, #0
2426 .LVL240:
2427 .L207:
2025-01-28 19:01:22 +01:00
1465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable access to the backup domain */
1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_PWR_EnableBkUpAccess();
1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** backupchanged = SET;
1469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN);
2025-06-28 00:58:29 +02:00
2428 .loc 1 1471 3 is_stmt 1 view .LVU792
2429 0030 0C4A ldr r2, .L216
2430 0032 D2F89030 ldr r3, [r2, #144]
2431 0036 23F08073 bic r3, r3, #16777216
2432 003a C2F89030 str r3, [r2, #144]
2025-01-28 19:01:22 +01:00
1472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Restore previous configuration */
1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(backupchanged == SET)
2025-06-28 00:58:29 +02:00
2433 .loc 1 1474 3 view .LVU793
2434 .loc 1 1474 5 is_stmt 0 view .LVU794
2435 003e 41B9 cbnz r1, .L214
2436 .LVL241:
2437 .L208:
2025-01-28 19:01:22 +01:00
1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Disable access to the backup domain */
1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_PWR_DisableBkUpAccess();
1478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
2025-06-28 00:58:29 +02:00
2438 .loc 1 1479 3 is_stmt 1 view .LVU795
2439 .loc 1 1479 5 is_stmt 0 view .LVU796
2440 0040 54B9 cbnz r4, .L215
2441 .L205:
2025-01-28 19:01:22 +01:00
1480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
1482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2442 .loc 1 1483 1 view .LVU797
2443 0042 02B0 add sp, sp, #8
2444 .LCFI12:
2445 .cfi_remember_state
2446 .cfi_def_cfa_offset 8
2447 @ sp needed
2448 0044 10BD pop {r4, pc}
2449 .LVL242:
2450 .L210:
2451 .LCFI13:
2452 .cfi_restore_state
2025-01-28 19:01:22 +01:00
1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** FlagStatus backupchanged = RESET;
2025-06-28 00:58:29 +02:00
2453 .loc 1 1455 20 view .LVU798
2454 0046 0024 movs r4, #0
2455 0048 ECE7 b .L206
2456 .LVL243:
2457 .L213:
2025-01-28 19:01:22 +01:00
1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** backupchanged = SET;
2025-06-28 00:58:29 +02:00
2458 .loc 1 1467 5 is_stmt 1 view .LVU799
2459 004a FFF7FEFF bl HAL_PWR_EnableBkUpAccess
2460 .LVL244:
2025-01-28 19:01:22 +01:00
1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2461 .loc 1 1468 5 view .LVU800
2025-01-28 19:01:22 +01:00
1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2462 .loc 1 1468 19 is_stmt 0 view .LVU801
2463 004e 0121 movs r1, #1
2464 0050 EEE7 b .L207
2465 .LVL245:
2466 .L214:
2025-01-28 19:01:22 +01:00
1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2467 .loc 1 1477 5 is_stmt 1 view .LVU802
2468 0052 FFF7FEFF bl HAL_PWR_DisableBkUpAccess
2469 .LVL246:
2025-01-28 19:01:22 +01:00
1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2470 .loc 1 1477 5 is_stmt 0 view .LVU803
2471 0056 F3E7 b .L208
2472 .L215:
2025-01-28 19:01:22 +01:00
1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2473 .loc 1 1481 5 is_stmt 1 view .LVU804
2474 0058 024A ldr r2, .L216
2475 005a 936D ldr r3, [r2, #88]
2476 005c 23F08053 bic r3, r3, #268435456
2477 0060 9365 str r3, [r2, #88]
2478 .loc 1 1483 1 is_stmt 0 view .LVU805
2479 0062 EEE7 b .L205
2480 .L217:
2481 .align 2
2482 .L216:
2483 0064 00100240 .word 1073876992
2484 0068 00700040 .word 1073770496
2485 .cfi_endproc
2486 .LFE338:
2488 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits
2489 .align 1
2490 .global HAL_RCCEx_CRSConfig
2491 .syntax unified
2492 .thumb
2493 .thumb_func
2495 HAL_RCCEx_CRSConfig:
2496 .LVL247:
2497 .LFB339:
2025-01-28 19:01:22 +01:00
1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @}
1488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** #if defined(CRS)
1491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions
1493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions
1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** *
1495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @verbatim
1496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions #####
1498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** ===============================================================================
1499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** [..]
1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extension HAL driver can be used as
1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled
2023-07-02 17:09:41 +02:00
1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions
1505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) Call CRS functions as follows:
1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration
1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim
1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming.
1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate
1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** directly reload value with target and sychronization frequencies values
1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (##) Call function HAL_RCCEx_CRSConfig which
1513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Resets CRS registers to their default values.
1514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Configures CRS registers with synchronization configuration
1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Enables automatic calibration and frequency error counter feature
1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the
1517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be
1518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock
1519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs
1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** should be used as SYNC signal.
1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization
1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) Call function HAL_RCCEx_CRSWaitSynchronization()
1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con
1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** application if synchronization is OK
2023-07-02 17:09:41 +02:00
1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function
1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRSGetSynchronizationInfo()
1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali
1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the
1533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value
1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac
1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented).
1536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** through CRS Handler (CRS_IRQn/CRS_IRQHandler)
2025-01-28 19:01:22 +01:00
1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (++) Call function HAL_RCCEx_CRSConfig()
1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (++) Enable CRS_IRQn (thanks to NVIC functions)
1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (__HAL_RCC_CRS_ENABLE_IT)
1542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from
1543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler():
1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncOkCallback()
1545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncWarnCallback()
1546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ExpectedSyncCallback()
1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ErrorCallback()
1548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function HAL_RCCEx_CRSSoftwareSynchronizationGene
1550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** This function can be called before calling HAL_RCCEx_CRSConfig (for instance in Systick h
1551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** @endverbatim
1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @{
1554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode
1558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure
1559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
1562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2498 .loc 1 1562 1 is_stmt 1 view -0
2499 .cfi_startproc
2500 @ args = 0, pretend = 0, frame = 0
2501 @ frame_needed = 0, uses_anonymous_args = 0
2502 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t value;
2025-06-28 00:58:29 +02:00
2503 .loc 1 1563 3 view .LVU807
2025-01-28 19:01:22 +01:00
1564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameters */
1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
2025-06-28 00:58:29 +02:00
2504 .loc 1 1566 3 view .LVU808
2025-01-28 19:01:22 +01:00
1567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
2025-06-28 00:58:29 +02:00
2505 .loc 1 1567 3 view .LVU809
2025-01-28 19:01:22 +01:00
1568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
2025-06-28 00:58:29 +02:00
2506 .loc 1 1568 3 view .LVU810
2025-01-28 19:01:22 +01:00
1569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
2025-06-28 00:58:29 +02:00
2507 .loc 1 1569 3 view .LVU811
2025-01-28 19:01:22 +01:00
1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
2025-06-28 00:58:29 +02:00
2508 .loc 1 1570 3 view .LVU812
2025-01-28 19:01:22 +01:00
1571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
2025-06-28 00:58:29 +02:00
2509 .loc 1 1571 3 view .LVU813
2023-07-02 17:09:41 +02:00
1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CONFIGURATION */
1574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/
1576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET();
2025-06-28 00:58:29 +02:00
2510 .loc 1 1576 3 view .LVU814
2511 0000 104B ldr r3, .L219
2512 0002 9A6B ldr r2, [r3, #56]
2513 0004 42F48072 orr r2, r2, #256
2514 0008 9A63 str r2, [r3, #56]
2025-01-28 19:01:22 +01:00
1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET();
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2515 .loc 1 1577 3 view .LVU815
2516 000a 9A6B ldr r2, [r3, #56]
2517 000c 22F48072 bic r2, r2, #256
2518 0010 9A63 str r2, [r3, #56]
2023-07-02 17:09:41 +02:00
1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */
1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */
1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */
1582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity);
2025-06-28 00:58:29 +02:00
2519 .loc 1 1582 3 view .LVU816
2520 .loc 1 1582 17 is_stmt 0 view .LVU817
2521 0012 0368 ldr r3, [r0]
2522 .loc 1 1582 36 view .LVU818
2523 0014 4268 ldr r2, [r0, #4]
2524 .loc 1 1582 29 view .LVU819
2525 0016 1343 orrs r3, r3, r2
2526 .loc 1 1582 52 view .LVU820
2527 0018 8268 ldr r2, [r0, #8]
2528 .loc 1 1582 9 view .LVU821
2529 001a 1A43 orrs r2, r2, r3
2530 .LVL248:
2025-01-28 19:01:22 +01:00
1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */
1584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** value |= pInit->ReloadValue;
2025-06-28 00:58:29 +02:00
2531 .loc 1 1584 3 is_stmt 1 view .LVU822
2532 .loc 1 1584 17 is_stmt 0 view .LVU823
2533 001c C368 ldr r3, [r0, #12]
2534 .loc 1 1584 9 view .LVU824
2535 001e 1343 orrs r3, r3, r2
2536 .LVL249:
2025-01-28 19:01:22 +01:00
1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */
1586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_Pos);
2025-06-28 00:58:29 +02:00
2537 .loc 1 1586 3 is_stmt 1 view .LVU825
2538 .loc 1 1586 18 is_stmt 0 view .LVU826
2539 0020 0269 ldr r2, [r0, #16]
2540 .loc 1 1586 9 view .LVU827
2541 0022 43EA0242 orr r2, r3, r2, lsl #16
2542 .LVL250:
2025-01-28 19:01:22 +01:00
1587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value);
2025-06-28 00:58:29 +02:00
2543 .loc 1 1587 3 is_stmt 1 view .LVU828
2544 0026 084B ldr r3, .L219+4
2545 0028 5A60 str r2, [r3, #4]
2025-01-28 19:01:22 +01:00
1588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */
1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Set the TRIM[6:0] bits according to RCC_CRS_HSI48CalibrationValue value */
1591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos));
2025-06-28 00:58:29 +02:00
2546 .loc 1 1591 3 view .LVU829
2547 002a 1A68 ldr r2, [r3]
2548 .LVL251:
2549 .loc 1 1591 3 is_stmt 0 view .LVU830
2550 002c 22F4FE42 bic r2, r2, #32512
2551 0030 4169 ldr r1, [r0, #20]
2552 0032 42EA0122 orr r2, r2, r1, lsl #8
2553 0036 1A60 str r2, [r3]
2554 .LVL252:
2025-01-28 19:01:22 +01:00
1592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/
1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */
2025-01-28 19:01:22 +01:00
1596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN);
2025-06-28 00:58:29 +02:00
2555 .loc 1 1596 3 is_stmt 1 view .LVU831
2556 0038 1A68 ldr r2, [r3]
2557 003a 42F06002 orr r2, r2, #96
2558 003e 1A60 str r2, [r3]
2025-01-28 19:01:22 +01:00
1597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2559 .loc 1 1597 1 is_stmt 0 view .LVU832
2560 0040 7047 bx lr
2561 .L220:
2562 0042 00BF .align 2
2563 .L219:
2564 0044 00100240 .word 1073876992
2565 0048 00200040 .word 1073750016
2566 .cfi_endproc
2567 .LFE339:
2569 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits
2570 .align 1
2571 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate
2572 .syntax unified
2573 .thumb
2574 .thumb_func
2576 HAL_RCCEx_CRSSoftwareSynchronizationGenerate:
2577 .LFB340:
2025-01-28 19:01:22 +01:00
1598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event
1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
1604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2578 .loc 1 1604 1 is_stmt 1 view -0
2579 .cfi_startproc
2580 @ args = 0, pretend = 0, frame = 0
2581 @ frame_needed = 0, uses_anonymous_args = 0
2582 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC);
2025-06-28 00:58:29 +02:00
2583 .loc 1 1605 3 view .LVU834
2584 0000 024A ldr r2, .L222
2585 0002 1368 ldr r3, [r2]
2586 0004 43F08003 orr r3, r3, #128
2587 0008 1360 str r3, [r2]
2025-01-28 19:01:22 +01:00
1606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2588 .loc 1 1606 1 is_stmt 0 view .LVU835
2589 000a 7047 bx lr
2590 .L223:
2591 .align 2
2592 .L222:
2593 000c 00200040 .word 1073750016
2594 .cfi_endproc
2595 .LFE340:
2597 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits
2598 .align 1
2599 .global HAL_RCCEx_CRSGetSynchronizationInfo
2600 .syntax unified
2601 .thumb
2602 .thumb_func
2604 HAL_RCCEx_CRSGetSynchronizationInfo:
2605 .LVL253:
2606 .LFB341:
2025-01-28 19:01:22 +01:00
1607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Return synchronization info
1610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
1611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
1614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2607 .loc 1 1614 1 is_stmt 1 view -0
2608 .cfi_startproc
2609 @ args = 0, pretend = 0, frame = 0
2610 @ frame_needed = 0, uses_anonymous_args = 0
2611 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check the parameter */
1616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != (void *)NULL);
2025-06-28 00:58:29 +02:00
2612 .loc 1 1616 3 view .LVU837
2025-01-28 19:01:22 +01:00
1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get the reload value */
1619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
2025-06-28 00:58:29 +02:00
2613 .loc 1 1619 3 view .LVU838
2614 .loc 1 1619 32 is_stmt 0 view .LVU839
2615 0000 074B ldr r3, .L225
2616 0002 5A68 ldr r2, [r3, #4]
2617 0004 92B2 uxth r2, r2
2618 .loc 1 1619 29 view .LVU840
2619 0006 0260 str r2, [r0]
2023-07-02 17:09:41 +02:00
1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */
1622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos);
2025-06-28 00:58:29 +02:00
2620 .loc 1 1622 3 is_stmt 1 view .LVU841
2621 .loc 1 1622 42 is_stmt 0 view .LVU842
2622 0008 1A68 ldr r2, [r3]
2623 .loc 1 1622 73 view .LVU843
2624 000a C2F30622 ubfx r2, r2, #8, #7
2625 .loc 1 1622 39 view .LVU844
2626 000e 4260 str r2, [r0, #4]
2025-01-28 19:01:22 +01:00
1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get Frequency error capture */
1625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos);
2025-06-28 00:58:29 +02:00
2627 .loc 1 1625 3 is_stmt 1 view .LVU845
2628 .loc 1 1625 37 is_stmt 0 view .LVU846
2629 0010 9A68 ldr r2, [r3, #8]
2630 .loc 1 1625 71 view .LVU847
2631 0012 120C lsrs r2, r2, #16
2632 .loc 1 1625 34 view .LVU848
2633 0014 8260 str r2, [r0, #8]
2025-01-28 19:01:22 +01:00
1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get Frequency error direction */
1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
2025-06-28 00:58:29 +02:00
2634 .loc 1 1628 3 is_stmt 1 view .LVU849
2635 .loc 1 1628 39 is_stmt 0 view .LVU850
2636 0016 9B68 ldr r3, [r3, #8]
2637 0018 03F40043 and r3, r3, #32768
2638 .loc 1 1628 36 view .LVU851
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2639 001c C360 str r3, [r0, #12]
2025-01-28 19:01:22 +01:00
1629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2640 .loc 1 1629 1 view .LVU852
2641 001e 7047 bx lr
2642 .L226:
2643 .align 2
2644 .L225:
2645 0020 00200040 .word 1073750016
2646 .cfi_endproc
2647 .LFE341:
2649 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits
2650 .align 1
2651 .global HAL_RCCEx_CRSWaitSynchronization
2652 .syntax unified
2653 .thumb
2654 .thumb_func
2656 HAL_RCCEx_CRSWaitSynchronization:
2657 .LVL254:
2658 .LFB342:
2023-07-02 17:09:41 +02:00
1630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status.
1633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout
1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization
1635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * frequency.
1636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
1637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status
1638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT
1640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK
1641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN
1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
1643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
1644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
1645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
1647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2659 .loc 1 1647 1 is_stmt 1 view -0
2660 .cfi_startproc
2661 @ args = 0, pretend = 0, frame = 0
2662 @ frame_needed = 0, uses_anonymous_args = 0
2663 .loc 1 1647 1 is_stmt 0 view .LVU854
2664 0000 70B5 push {r4, r5, r6, lr}
2665 .LCFI14:
2666 .cfi_def_cfa_offset 16
2667 .cfi_offset 4, -16
2668 .cfi_offset 5, -12
2669 .cfi_offset 6, -8
2670 .cfi_offset 14, -4
2671 0002 0546 mov r5, r0
2025-01-28 19:01:22 +01:00
1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE;
2025-06-28 00:58:29 +02:00
2672 .loc 1 1648 3 is_stmt 1 view .LVU855
2673 .LVL255:
2025-01-28 19:01:22 +01:00
1649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t tickstart;
2025-06-28 00:58:29 +02:00
2674 .loc 1 1649 3 view .LVU856
2023-07-02 17:09:41 +02:00
1650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get timeout */
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
2675 .loc 1 1652 3 view .LVU857
2676 .loc 1 1652 15 is_stmt 0 view .LVU858
2677 0004 FFF7FEFF bl HAL_GetTick
2678 .LVL256:
2679 .loc 1 1652 15 view .LVU859
2680 0008 0646 mov r6, r0
2681 .LVL257:
2025-01-28 19:01:22 +01:00
1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t tickstart;
2025-06-28 00:58:29 +02:00
2682 .loc 1 1648 12 view .LVU860
2683 000a 0024 movs r4, #0
2684 000c 0BE0 b .L235
2685 .LVL258:
2686 .L240:
2025-01-28 19:01:22 +01:00
1653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */
1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** do
1656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY)
1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2025-06-28 00:58:29 +02:00
2687 .loc 1 1659 7 is_stmt 1 view .LVU861
2688 .loc 1 1659 12 is_stmt 0 view .LVU862
2689 000e FFF7FEFF bl HAL_GetTick
2690 .LVL259:
2691 .loc 1 1659 26 discriminator 1 view .LVU863
2692 0012 801B subs r0, r0, r6
2693 .loc 1 1659 9 discriminator 1 view .LVU864
2694 0014 A842 cmp r0, r5
2695 0016 02D8 bhi .L236
2696 .loc 1 1659 50 discriminator 1 view .LVU865
2697 0018 45B9 cbnz r5, .L228
2025-01-28 19:01:22 +01:00
1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT;
2025-06-28 00:58:29 +02:00
2698 .loc 1 1661 19 view .LVU866
2699 001a 0124 movs r4, #1
2700 .LVL260:
2701 .loc 1 1661 19 view .LVU867
2702 001c 06E0 b .L228
2703 .LVL261:
2704 .L236:
2705 .loc 1 1661 19 view .LVU868
2706 001e 0124 movs r4, #1
2707 .LVL262:
2708 .loc 1 1661 19 view .LVU869
2709 0020 04E0 b .L228
2710 .LVL263:
2711 .L234:
2025-01-28 19:01:22 +01:00
1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2023-07-02 17:09:41 +02:00
1663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-01-28 19:01:22 +01:00
1664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
1666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CRS SYNC event OK */
1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK;
1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
2025-01-28 19:01:22 +01:00
1672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2023-07-02 17:09:41 +02:00
1673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
1676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CRS SYNC warning */
1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN;
1679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */
1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
1682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */
1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
1686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CRS SYNC Error */
1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF;
1689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
1692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2023-07-02 17:09:41 +02:00
1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS Error flag */
1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
1696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CRS SYNC Error */
1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR;
1699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
1702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */
1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
1706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* CRS SYNC Missed */
1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS;
1709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */
1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
2025-06-28 00:58:29 +02:00
2712 .loc 1 1718 7 is_stmt 1 discriminator 4 view .LVU870
2025-01-28 19:01:22 +01:00
1719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus);
2025-06-28 00:58:29 +02:00
2713 .loc 1 1720 24 view .LVU871
2714 0022 002C cmp r4, #0
2715 0024 3DD1 bne .L239
2716 .LVL264:
2717 .L235:
1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2718 .loc 1 1655 3 view .LVU872
2025-01-28 19:01:22 +01:00
1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2719 .loc 1 1657 5 view .LVU873
2025-01-28 19:01:22 +01:00
1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2720 .loc 1 1657 7 is_stmt 0 view .LVU874
2721 0026 B5F1FF3F cmp r5, #-1
2722 002a F0D1 bne .L240
2723 .LVL265:
2724 .L228:
2025-01-28 19:01:22 +01:00
1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2725 .loc 1 1665 5 is_stmt 1 view .LVU875
2025-01-28 19:01:22 +01:00
1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2726 .loc 1 1665 8 is_stmt 0 view .LVU876
2727 002c 1E4B ldr r3, .L241
2728 002e 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2729 .loc 1 1665 7 view .LVU877
2730 0030 13F0010F tst r3, #1
2731 0034 04D0 beq .L229
2025-01-28 19:01:22 +01:00
1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2732 .loc 1 1668 7 is_stmt 1 view .LVU878
2025-01-28 19:01:22 +01:00
1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2733 .loc 1 1668 17 is_stmt 0 view .LVU879
2734 0036 44F00204 orr r4, r4, #2
2735 .LVL266:
2025-01-28 19:01:22 +01:00
1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2736 .loc 1 1671 7 is_stmt 1 view .LVU880
2025-01-28 19:01:22 +01:00
1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2737 .loc 1 1671 7 view .LVU881
2025-01-28 19:01:22 +01:00
1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2738 .loc 1 1671 7 discriminator 2 view .LVU882
2739 003a 1B4B ldr r3, .L241
2740 003c 0122 movs r2, #1
2741 003e DA60 str r2, [r3, #12]
2742 .L229:
2025-01-28 19:01:22 +01:00
1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2743 .loc 1 1671 7 discriminator 4 view .LVU883
2025-01-28 19:01:22 +01:00
1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2744 .loc 1 1675 5 view .LVU884
2025-01-28 19:01:22 +01:00
1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2745 .loc 1 1675 8 is_stmt 0 view .LVU885
2746 0040 194B ldr r3, .L241
2747 0042 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2748 .loc 1 1675 7 view .LVU886
2749 0044 13F0020F tst r3, #2
2750 0048 04D0 beq .L230
2025-01-28 19:01:22 +01:00
1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2751 .loc 1 1678 7 is_stmt 1 view .LVU887
2025-01-28 19:01:22 +01:00
1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2752 .loc 1 1678 17 is_stmt 0 view .LVU888
2753 004a 44F00404 orr r4, r4, #4
2754 .LVL267:
2025-01-28 19:01:22 +01:00
1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2755 .loc 1 1681 7 is_stmt 1 view .LVU889
2025-01-28 19:01:22 +01:00
1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2756 .loc 1 1681 7 view .LVU890
2025-01-28 19:01:22 +01:00
1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2757 .loc 1 1681 7 discriminator 2 view .LVU891
2758 004e 164B ldr r3, .L241
2759 0050 0222 movs r2, #2
2760 0052 DA60 str r2, [r3, #12]
2761 .L230:
2025-01-28 19:01:22 +01:00
1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2762 .loc 1 1681 7 discriminator 4 view .LVU892
2025-01-28 19:01:22 +01:00
1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2763 .loc 1 1685 5 view .LVU893
2025-01-28 19:01:22 +01:00
1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2764 .loc 1 1685 8 is_stmt 0 view .LVU894
2765 0054 144B ldr r3, .L241
2766 0056 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2767 .loc 1 1685 7 view .LVU895
2768 0058 13F4806F tst r3, #1024
2769 005c 04D0 beq .L231
2025-01-28 19:01:22 +01:00
1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2770 .loc 1 1688 7 is_stmt 1 view .LVU896
2025-01-28 19:01:22 +01:00
1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2771 .loc 1 1688 17 is_stmt 0 view .LVU897
2772 005e 44F02004 orr r4, r4, #32
2773 .LVL268:
2025-01-28 19:01:22 +01:00
1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2774 .loc 1 1691 7 is_stmt 1 view .LVU898
2025-01-28 19:01:22 +01:00
1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2775 .loc 1 1691 7 view .LVU899
2025-01-28 19:01:22 +01:00
1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2776 .loc 1 1691 7 discriminator 1 view .LVU900
2777 0062 114B ldr r3, .L241
2778 0064 0422 movs r2, #4
2779 0066 DA60 str r2, [r3, #12]
2780 .L231:
2025-01-28 19:01:22 +01:00
1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2781 .loc 1 1691 7 discriminator 4 view .LVU901
2025-01-28 19:01:22 +01:00
1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2782 .loc 1 1695 5 view .LVU902
2025-01-28 19:01:22 +01:00
1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2783 .loc 1 1695 8 is_stmt 0 view .LVU903
2784 0068 0F4B ldr r3, .L241
2785 006a 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2786 .loc 1 1695 7 view .LVU904
2787 006c 13F4807F tst r3, #256
2788 0070 04D0 beq .L232
2025-01-28 19:01:22 +01:00
1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2789 .loc 1 1698 7 is_stmt 1 view .LVU905
2025-01-28 19:01:22 +01:00
1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2790 .loc 1 1698 17 is_stmt 0 view .LVU906
2791 0072 44F00804 orr r4, r4, #8
2792 .LVL269:
2025-01-28 19:01:22 +01:00
1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2793 .loc 1 1701 7 is_stmt 1 view .LVU907
2025-01-28 19:01:22 +01:00
1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2794 .loc 1 1701 7 view .LVU908
2025-01-28 19:01:22 +01:00
1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2795 .loc 1 1701 7 discriminator 1 view .LVU909
2796 0076 0C4B ldr r3, .L241
2797 0078 0422 movs r2, #4
2798 007a DA60 str r2, [r3, #12]
2799 .L232:
2025-01-28 19:01:22 +01:00
1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2800 .loc 1 1701 7 discriminator 4 view .LVU910
2025-01-28 19:01:22 +01:00
1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2801 .loc 1 1705 5 view .LVU911
2025-01-28 19:01:22 +01:00
1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2802 .loc 1 1705 8 is_stmt 0 view .LVU912
2803 007c 0A4B ldr r3, .L241
2804 007e 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2805 .loc 1 1705 7 view .LVU913
2806 0080 13F4007F tst r3, #512
2807 0084 04D0 beq .L233
2025-01-28 19:01:22 +01:00
1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2808 .loc 1 1708 7 is_stmt 1 view .LVU914
2025-01-28 19:01:22 +01:00
1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2809 .loc 1 1708 17 is_stmt 0 view .LVU915
2810 0086 44F01004 orr r4, r4, #16
2811 .LVL270:
2025-01-28 19:01:22 +01:00
1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2812 .loc 1 1711 7 is_stmt 1 view .LVU916
2025-01-28 19:01:22 +01:00
1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2813 .loc 1 1711 7 view .LVU917
2025-01-28 19:01:22 +01:00
1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2814 .loc 1 1711 7 discriminator 1 view .LVU918
2815 008a 074B ldr r3, .L241
2816 008c 0422 movs r2, #4
2817 008e DA60 str r2, [r3, #12]
2818 .L233:
2025-01-28 19:01:22 +01:00
1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2819 .loc 1 1711 7 discriminator 4 view .LVU919
2025-01-28 19:01:22 +01:00
1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2820 .loc 1 1715 5 view .LVU920
2025-01-28 19:01:22 +01:00
1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2821 .loc 1 1715 8 is_stmt 0 view .LVU921
2822 0090 054B ldr r3, .L241
2823 0092 9B68 ldr r3, [r3, #8]
2025-01-28 19:01:22 +01:00
1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2824 .loc 1 1715 7 view .LVU922
2825 0094 13F0080F tst r3, #8
2826 0098 C3D0 beq .L234
1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2827 .loc 1 1718 7 is_stmt 1 view .LVU923
1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2828 .loc 1 1718 7 view .LVU924
1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2829 .loc 1 1718 7 discriminator 2 view .LVU925
2830 009a 034B ldr r3, .L241
2831 009c 0822 movs r2, #8
2832 009e DA60 str r2, [r3, #12]
2833 00a0 BFE7 b .L234
2834 .L239:
2025-01-28 19:01:22 +01:00
1721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** return crsstatus;
2835 .loc 1 1722 3 view .LVU926
2025-01-28 19:01:22 +01:00
1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2836 .loc 1 1723 1 is_stmt 0 view .LVU927
2837 00a2 2046 mov r0, r4
2838 00a4 70BD pop {r4, r5, r6, pc}
2839 .LVL271:
2840 .L242:
2841 .loc 1 1723 1 view .LVU928
2842 00a6 00BF .align 2
2843 .L241:
2844 00a8 00200040 .word 1073750016
2845 .cfi_endproc
2846 .LFE342:
2848 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits
2849 .align 1
2850 .weak HAL_RCCEx_CRS_SyncOkCallback
2851 .syntax unified
2852 .thumb
2853 .thumb_func
2855 HAL_RCCEx_CRS_SyncOkCallback:
2856 .LFB344:
2025-01-28 19:01:22 +01:00
1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request.
1727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval None
1728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void)
1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
1732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR);
1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
2023-07-02 17:09:41 +02:00
1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != 0U) && ((itsources & RCC_CRS_IT_SYNCOK) != 0U))
1738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */
1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
2023-07-02 17:09:41 +02:00
1741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* user callback */
1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback();
1744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != 0U) && ((itsources & RCC_CRS_IT_SYNCWARN) != 0U))
1747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */
1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* user callback */
1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback();
1753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != 0U) && ((itsources & RCC_CRS_IT_ESYNC) != 0U))
1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-01-28 19:01:22 +01:00
1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* user callback */
1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback();
1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Check CRS Error flags */
1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** else
1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != 0U) && ((itsources & RCC_CRS_IT_ERR) != 0U))
1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != 0U)
1769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR;
1771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != 0U)
1773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS;
1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != 0U)
1777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF;
1779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Clear CRS Error flags */
1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* user error callback */
1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror);
1786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
1789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback.
1792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval none
1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void)
1795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2857 .loc 1 1795 1 is_stmt 1 view -0
2858 .cfi_startproc
2859 @ args = 0, pretend = 0, frame = 0
2860 @ frame_needed = 0, uses_anonymous_args = 0
2861 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file
1798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2862 .loc 1 1799 1 view .LVU930
2863 0000 7047 bx lr
2864 .cfi_endproc
2865 .LFE344:
2867 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits
2868 .align 1
2869 .weak HAL_RCCEx_CRS_SyncWarnCallback
2870 .syntax unified
2871 .thumb
2872 .thumb_func
2874 HAL_RCCEx_CRS_SyncWarnCallback:
2875 .LFB345:
2025-01-28 19:01:22 +01:00
1800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback.
1803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval none
1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void)
1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2876 .loc 1 1806 1 view -0
2877 .cfi_startproc
2878 @ args = 0, pretend = 0, frame = 0
2879 @ frame_needed = 0, uses_anonymous_args = 0
2880 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file
1809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2881 .loc 1 1810 1 view .LVU932
2882 0000 7047 bx lr
2883 .cfi_endproc
2884 .LFE345:
2886 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits
2887 .align 1
2888 .weak HAL_RCCEx_CRS_ExpectedSyncCallback
2889 .syntax unified
2890 .thumb
2891 .thumb_func
2893 HAL_RCCEx_CRS_ExpectedSyncCallback:
2894 .LFB346:
2025-01-28 19:01:22 +01:00
1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback.
1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval none
1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void)
1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2895 .loc 1 1817 1 view -0
2896 .cfi_startproc
2897 @ args = 0, pretend = 0, frame = 0
2898 @ frame_needed = 0, uses_anonymous_args = 0
2899 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file
1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2900 .loc 1 1821 1 view .LVU934
2901 0000 7047 bx lr
2902 .cfi_endproc
2903 .LFE346:
2905 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits
2906 .align 1
2907 .weak HAL_RCCEx_CRS_ErrorCallback
2908 .syntax unified
2909 .thumb
2910 .thumb_func
2912 HAL_RCCEx_CRS_ErrorCallback:
2913 .LVL272:
2914 .LFB347:
2025-01-28 19:01:22 +01:00
1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /**
1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback.
1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @param Error Combination of Error status.
1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
1827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
1828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** * @retval none
1831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
1833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2915 .loc 1 1833 1 view -0
2916 .cfi_startproc
2917 @ args = 0, pretend = 0, frame = 0
2918 @ frame_needed = 0, uses_anonymous_args = 0
2919 @ link register save eliminated.
2025-01-28 19:01:22 +01:00
1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */
1835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** UNUSED(Error);
2025-06-28 00:58:29 +02:00
2920 .loc 1 1835 3 view .LVU936
2025-01-28 19:01:22 +01:00
1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
1837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file
1839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** */
1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2921 .loc 1 1840 1 is_stmt 0 view .LVU937
2922 0000 7047 bx lr
2923 .cfi_endproc
2924 .LFE347:
2926 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits
2927 .align 1
2928 .global HAL_RCCEx_CRS_IRQHandler
2929 .syntax unified
2930 .thumb
2931 .thumb_func
2933 HAL_RCCEx_CRS_IRQHandler:
2934 .LFB343:
2025-01-28 19:01:22 +01:00
1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
2025-06-28 00:58:29 +02:00
2935 .loc 1 1730 1 is_stmt 1 view -0
2936 .cfi_startproc
2937 @ args = 0, pretend = 0, frame = 0
2938 @ frame_needed = 0, uses_anonymous_args = 0
2939 0000 08B5 push {r3, lr}
2940 .LCFI15:
2941 .cfi_def_cfa_offset 8
2942 .cfi_offset 3, -8
2943 .cfi_offset 14, -4
2025-01-28 19:01:22 +01:00
1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
2025-06-28 00:58:29 +02:00
2944 .loc 1 1731 3 view .LVU939
2945 .LVL273:
2025-01-28 19:01:22 +01:00
1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
2025-06-28 00:58:29 +02:00
2946 .loc 1 1733 3 view .LVU940
2025-01-28 19:01:22 +01:00
1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
2025-06-28 00:58:29 +02:00
2947 .loc 1 1733 12 is_stmt 0 view .LVU941
2948 0002 204A ldr r2, .L260
2949 0004 9368 ldr r3, [r2, #8]
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2950 .LVL274:
2023-07-02 17:09:41 +02:00
1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2951 .loc 1 1734 3 is_stmt 1 view .LVU942
2023-07-02 17:09:41 +02:00
1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
2952 .loc 1 1734 12 is_stmt 0 view .LVU943
2953 0006 1268 ldr r2, [r2]
2954 .LVL275:
2025-01-28 19:01:22 +01:00
1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2955 .loc 1 1737 3 is_stmt 1 view .LVU944
2025-01-28 19:01:22 +01:00
1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2956 .loc 1 1737 5 is_stmt 0 view .LVU945
2957 0008 13F0010F tst r3, #1
2958 000c 02D0 beq .L248
2025-01-28 19:01:22 +01:00
1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2959 .loc 1 1737 46 discriminator 1 view .LVU946
2960 000e 12F0010F tst r2, #1
2961 0012 25D1 bne .L257
2962 .L248:
2025-01-28 19:01:22 +01:00
1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2963 .loc 1 1746 8 is_stmt 1 view .LVU947
2025-01-28 19:01:22 +01:00
1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2964 .loc 1 1746 10 is_stmt 0 view .LVU948
2965 0014 13F0020F tst r3, #2
2966 0018 02D0 beq .L250
2025-01-28 19:01:22 +01:00
1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2967 .loc 1 1746 53 discriminator 1 view .LVU949
2968 001a 12F0020F tst r2, #2
2969 001e 25D1 bne .L258
2970 .L250:
2025-01-28 19:01:22 +01:00
1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2971 .loc 1 1755 8 is_stmt 1 view .LVU950
2025-01-28 19:01:22 +01:00
1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2972 .loc 1 1755 10 is_stmt 0 view .LVU951
2973 0020 13F0080F tst r3, #8
2974 0024 02D0 beq .L251
2025-01-28 19:01:22 +01:00
1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2975 .loc 1 1755 50 discriminator 1 view .LVU952
2976 0026 12F0080F tst r2, #8
2977 002a 25D1 bne .L259
2978 .L251:
2025-01-28 19:01:22 +01:00
1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2979 .loc 1 1766 5 is_stmt 1 view .LVU953
2025-01-28 19:01:22 +01:00
1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2980 .loc 1 1766 7 is_stmt 0 view .LVU954
2981 002c 13F0040F tst r3, #4
2982 0030 1BD0 beq .L247
2025-01-28 19:01:22 +01:00
1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2983 .loc 1 1766 45 discriminator 1 view .LVU955
2984 0032 12F0040F tst r2, #4
2985 0036 18D0 beq .L247
2025-01-28 19:01:22 +01:00
1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2986 .loc 1 1768 7 is_stmt 1 view .LVU956
2025-01-28 19:01:22 +01:00
1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2987 .loc 1 1768 9 is_stmt 0 view .LVU957
2988 0038 13F48070 ands r0, r3, #256
2989 003c 00D0 beq .L252
2025-01-28 19:01:22 +01:00
1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
2990 .loc 1 1770 18 view .LVU958
2991 003e 0820 movs r0, #8
2992 .L252:
2993 .LVL276:
2025-01-28 19:01:22 +01:00
1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2994 .loc 1 1772 7 is_stmt 1 view .LVU959
2025-01-28 19:01:22 +01:00
1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
2995 .loc 1 1772 9 is_stmt 0 view .LVU960
2996 0040 13F4007F tst r3, #512
2997 0044 01D0 beq .L253
2025-01-28 19:01:22 +01:00
1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2998 .loc 1 1774 9 is_stmt 1 view .LVU961
2025-01-28 19:01:22 +01:00
1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
2999 .loc 1 1774 18 is_stmt 0 view .LVU962
3000 0046 40F01000 orr r0, r0, #16
3001 .LVL277:
3002 .L253:
2025-01-28 19:01:22 +01:00
1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
3003 .loc 1 1776 7 is_stmt 1 view .LVU963
2025-01-28 19:01:22 +01:00
1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** {
2025-06-28 00:58:29 +02:00
3004 .loc 1 1776 9 is_stmt 0 view .LVU964
3005 004a 13F4806F tst r3, #1024
3006 004e 01D0 beq .L254
2025-01-28 19:01:22 +01:00
1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3007 .loc 1 1778 9 is_stmt 1 view .LVU965
2025-01-28 19:01:22 +01:00
1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3008 .loc 1 1778 18 is_stmt 0 view .LVU966
3009 0050 40F02000 orr r0, r0, #32
3010 .LVL278:
3011 .L254:
2025-01-28 19:01:22 +01:00
1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3012 .loc 1 1782 7 is_stmt 1 view .LVU967
3013 0054 0B4B ldr r3, .L260
3014 .LVL279:
2025-01-28 19:01:22 +01:00
1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3015 .loc 1 1782 7 is_stmt 0 view .LVU968
3016 0056 0422 movs r2, #4
3017 .LVL280:
2025-01-28 19:01:22 +01:00
1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3018 .loc 1 1782 7 view .LVU969
3019 0058 DA60 str r2, [r3, #12]
2025-01-28 19:01:22 +01:00
1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3020 .loc 1 1785 7 is_stmt 1 view .LVU970
3021 005a FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback
3022 .LVL281:
2025-01-28 19:01:22 +01:00
1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3023 .loc 1 1788 1 is_stmt 0 view .LVU971
3024 005e 04E0 b .L247
3025 .LVL282:
3026 .L257:
2023-07-02 17:09:41 +02:00
1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3027 .loc 1 1740 5 is_stmt 1 view .LVU972
3028 0060 084B ldr r3, .L260
3029 .LVL283:
2023-07-02 17:09:41 +02:00
1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3030 .loc 1 1740 5 is_stmt 0 view .LVU973
3031 0062 0122 movs r2, #1
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
3032 .LVL284:
2025-01-28 19:01:22 +01:00
1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3033 .loc 1 1740 5 view .LVU974
3034 0064 DA60 str r2, [r3, #12]
2025-01-28 19:01:22 +01:00
1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3035 .loc 1 1743 5 is_stmt 1 view .LVU975
3036 0066 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback
3037 .LVL285:
3038 .L247:
2025-01-28 19:01:22 +01:00
1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3039 .loc 1 1788 1 is_stmt 0 view .LVU976
3040 006a 08BD pop {r3, pc}
3041 .LVL286:
3042 .L258:
2025-01-28 19:01:22 +01:00
1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3043 .loc 1 1749 5 is_stmt 1 view .LVU977
3044 006c 054B ldr r3, .L260
3045 .LVL287:
2025-01-28 19:01:22 +01:00
1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3046 .loc 1 1749 5 is_stmt 0 view .LVU978
3047 006e 0222 movs r2, #2
3048 .LVL288:
2025-01-28 19:01:22 +01:00
1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3049 .loc 1 1749 5 view .LVU979
3050 0070 DA60 str r2, [r3, #12]
2025-01-28 19:01:22 +01:00
1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3051 .loc 1 1752 5 is_stmt 1 view .LVU980
3052 0072 FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback
3053 .LVL289:
3054 0076 F8E7 b .L247
3055 .LVL290:
3056 .L259:
2025-01-28 19:01:22 +01:00
1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3057 .loc 1 1758 5 view .LVU981
3058 0078 024B ldr r3, .L260
3059 .LVL291:
2025-01-28 19:01:22 +01:00
1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3060 .loc 1 1758 5 is_stmt 0 view .LVU982
3061 007a 0822 movs r2, #8
3062 .LVL292:
2025-01-28 19:01:22 +01:00
1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c ****
2025-06-28 00:58:29 +02:00
3063 .loc 1 1758 5 view .LVU983
3064 007c DA60 str r2, [r3, #12]
2025-01-28 19:01:22 +01:00
1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c **** }
2025-06-28 00:58:29 +02:00
3065 .loc 1 1761 5 is_stmt 1 view .LVU984
3066 007e FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback
3067 .LVL293:
3068 0082 F2E7 b .L247
3069 .L261:
3070 .align 2
3071 .L260:
3072 0084 00200040 .word 1073750016
3073 .cfi_endproc
3074 .LFE343:
3076 .text
3077 .Letext0:
3078 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
3079 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
3080 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
3081 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
3082 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
3083 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h"
3084 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
3085 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h"
3086 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h"
3087 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
2023-07-02 17:09:41 +02:00
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_rcc_ex.c
2025-06-28 00:58:29 +02:00
/tmp/cc4Hnewt.s:21 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t
/tmp/cc4Hnewt.s:27 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig
/tmp/cc4Hnewt.s:548 .text.HAL_RCCEx_PeriphCLKConfig:000002c8 $d
/tmp/cc4Hnewt.s:552 .text.HAL_RCCEx_PeriphCLKConfig:000002d0 $t
/tmp/cc4Hnewt.s:566 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t
/tmp/cc4Hnewt.s:572 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig
/tmp/cc4Hnewt.s:686 .text.HAL_RCCEx_GetPeriphCLKConfig:000000a8 $d
/tmp/cc4Hnewt.s:692 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t
/tmp/cc4Hnewt.s:698 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq
/tmp/cc4Hnewt.s:766 .text.HAL_RCCEx_GetPeriphCLKFreq:00000050 $d
/tmp/cc4Hnewt.s:799 .text.HAL_RCCEx_GetPeriphCLKFreq:00000090 $t
/tmp/cc4Hnewt.s:1195 .text.HAL_RCCEx_GetPeriphCLKFreq:000002ac $d
/tmp/cc4Hnewt.s:1202 .text.HAL_RCCEx_GetPeriphCLKFreq:000002b8 $t
/tmp/cc4Hnewt.s:1866 .text.HAL_RCCEx_GetPeriphCLKFreq:0000059c $d
/tmp/cc4Hnewt.s:1871 .text.HAL_RCCEx_GetPeriphCLKFreq:000005a0 $t
/tmp/cc4Hnewt.s:2022 .text.HAL_RCCEx_GetPeriphCLKFreq:00000628 $d
/tmp/cc4Hnewt.s:2031 .text.HAL_RCCEx_EnableLSECSS:00000000 $t
/tmp/cc4Hnewt.s:2037 .text.HAL_RCCEx_EnableLSECSS:00000000 HAL_RCCEx_EnableLSECSS
/tmp/cc4Hnewt.s:2054 .text.HAL_RCCEx_EnableLSECSS:00000010 $d
/tmp/cc4Hnewt.s:2059 .text.HAL_RCCEx_DisableLSECSS:00000000 $t
/tmp/cc4Hnewt.s:2065 .text.HAL_RCCEx_DisableLSECSS:00000000 HAL_RCCEx_DisableLSECSS
/tmp/cc4Hnewt.s:2086 .text.HAL_RCCEx_DisableLSECSS:00000018 $d
/tmp/cc4Hnewt.s:2091 .text.HAL_RCCEx_EnableLSECSS_IT:00000000 $t
/tmp/cc4Hnewt.s:2097 .text.HAL_RCCEx_EnableLSECSS_IT:00000000 HAL_RCCEx_EnableLSECSS_IT
/tmp/cc4Hnewt.s:2127 .text.HAL_RCCEx_EnableLSECSS_IT:0000002c $d
/tmp/cc4Hnewt.s:2132 .text.HAL_RCCEx_LSECSS_Callback:00000000 $t
/tmp/cc4Hnewt.s:2138 .text.HAL_RCCEx_LSECSS_Callback:00000000 HAL_RCCEx_LSECSS_Callback
/tmp/cc4Hnewt.s:2151 .text.HAL_RCCEx_LSECSS_IRQHandler:00000000 $t
/tmp/cc4Hnewt.s:2157 .text.HAL_RCCEx_LSECSS_IRQHandler:00000000 HAL_RCCEx_LSECSS_IRQHandler
/tmp/cc4Hnewt.s:2191 .text.HAL_RCCEx_LSECSS_IRQHandler:0000001c $d
/tmp/cc4Hnewt.s:2196 .text.HAL_RCCEx_EnableLSCO:00000000 $t
/tmp/cc4Hnewt.s:2202 .text.HAL_RCCEx_EnableLSCO:00000000 HAL_RCCEx_EnableLSCO
/tmp/cc4Hnewt.s:2359 .text.HAL_RCCEx_EnableLSCO:00000098 $d
/tmp/cc4Hnewt.s:2365 .text.HAL_RCCEx_DisableLSCO:00000000 $t
/tmp/cc4Hnewt.s:2371 .text.HAL_RCCEx_DisableLSCO:00000000 HAL_RCCEx_DisableLSCO
/tmp/cc4Hnewt.s:2483 .text.HAL_RCCEx_DisableLSCO:00000064 $d
/tmp/cc4Hnewt.s:2489 .text.HAL_RCCEx_CRSConfig:00000000 $t
/tmp/cc4Hnewt.s:2495 .text.HAL_RCCEx_CRSConfig:00000000 HAL_RCCEx_CRSConfig
/tmp/cc4Hnewt.s:2564 .text.HAL_RCCEx_CRSConfig:00000044 $d
/tmp/cc4Hnewt.s:2570 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 $t
/tmp/cc4Hnewt.s:2576 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate
/tmp/cc4Hnewt.s:2593 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000c $d
/tmp/cc4Hnewt.s:2598 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 $t
/tmp/cc4Hnewt.s:2604 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 HAL_RCCEx_CRSGetSynchronizationInfo
/tmp/cc4Hnewt.s:2645 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000020 $d
/tmp/cc4Hnewt.s:2650 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 $t
/tmp/cc4Hnewt.s:2656 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 HAL_RCCEx_CRSWaitSynchronization
/tmp/cc4Hnewt.s:2844 .text.HAL_RCCEx_CRSWaitSynchronization:000000a8 $d
/tmp/cc4Hnewt.s:2849 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 $t
/tmp/cc4Hnewt.s:2855 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 HAL_RCCEx_CRS_SyncOkCallback
/tmp/cc4Hnewt.s:2868 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 $t
/tmp/cc4Hnewt.s:2874 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 HAL_RCCEx_CRS_SyncWarnCallback
/tmp/cc4Hnewt.s:2887 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 $t
/tmp/cc4Hnewt.s:2893 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 HAL_RCCEx_CRS_ExpectedSyncCallback
/tmp/cc4Hnewt.s:2906 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 $t
/tmp/cc4Hnewt.s:2912 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 HAL_RCCEx_CRS_ErrorCallback
/tmp/cc4Hnewt.s:2927 .text.HAL_RCCEx_CRS_IRQHandler:00000000 $t
/tmp/cc4Hnewt.s:2933 .text.HAL_RCCEx_CRS_IRQHandler:00000000 HAL_RCCEx_CRS_IRQHandler
/tmp/cc4Hnewt.s:3072 .text.HAL_RCCEx_CRS_IRQHandler:00000084 $d
2023-07-02 17:09:41 +02:00
UNDEFINED SYMBOLS
HAL_GetTick
HAL_RCC_GetPCLK2Freq
HAL_RCC_GetSysClockFreq
HAL_RCC_GetPCLK1Freq
HAL_GPIO_Init
HAL_PWR_EnableBkUpAccess
HAL_PWR_DisableBkUpAccess
