squeow/squeow_sw/build/main.lst

ARM GAS  /tmp/ccaYtTQ0.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 1
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"main.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.file 1 "Src/main.c"
  20              		.section	.text.MX_GPIO_Init,"ax",%progbits
  21              		.align	1
  22              		.syntax unified
  23              		.thumb
  24              		.thumb_func
  26              	MX_GPIO_Init:
  27              	.LFB338:
   1:Src/main.c    **** /* USER CODE BEGIN Header */
   2:Src/main.c    **** /**
   3:Src/main.c    ****  ******************************************************************************
   4:Src/main.c    ****  * @file           : main.c
   5:Src/main.c    ****  * @brief          : Main program body
   6:Src/main.c    ****  ******************************************************************************
   7:Src/main.c    ****  * @attention
   8:Src/main.c    ****  *
   9:Src/main.c    ****  * Copyright (c) 2022 STMicroelectronics.
  10:Src/main.c    ****  * All rights reserved.
  11:Src/main.c    ****  *
  12:Src/main.c    ****  * This software is licensed under terms that can be found in the LICENSE file
  13:Src/main.c    ****  * in the root directory of this software component.
  14:Src/main.c    ****  * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Src/main.c    ****  *
  16:Src/main.c    ****  ******************************************************************************
  17:Src/main.c    ****  */
  18:Src/main.c    **** /* USER CODE END Header */
  19:Src/main.c    **** /* Includes ------------------------------------------------------------------*/
  20:Src/main.c    **** #include "main.h"
  21:Src/main.c    **** 
  22:Src/main.c    **** /* Private includes ----------------------------------------------------------*/
  23:Src/main.c    **** /* USER CODE BEGIN Includes */
  24:Src/main.c    **** #include "si5351.h"
  25:Src/main.c    **** #include "squeow.h"
  26:Src/main.c    **** #include "squeow_ui.h"
  27:Src/main.c    **** 
  28:Src/main.c    **** /* USER CODE END Includes */
  29:Src/main.c    **** 
  30:Src/main.c    **** /* Private typedef -----------------------------------------------------------*/
  31:Src/main.c    **** /* USER CODE BEGIN PTD */
ARM GAS  /tmp/ccaYtTQ0.s 			page 2


  32:Src/main.c    **** 
  33:Src/main.c    **** /* USER CODE END PTD */
  34:Src/main.c    **** 
  35:Src/main.c    **** /* Private define ------------------------------------------------------------*/
  36:Src/main.c    **** /* USER CODE BEGIN PD */
  37:Src/main.c    **** /* USER CODE END PD */
  38:Src/main.c    **** 
  39:Src/main.c    **** /* Private macro -------------------------------------------------------------*/
  40:Src/main.c    **** /* USER CODE BEGIN PM */
  41:Src/main.c    **** 
  42:Src/main.c    **** /* USER CODE END PM */
  43:Src/main.c    **** 
  44:Src/main.c    **** /* Private variables ---------------------------------------------------------*/
  45:Src/main.c    **** ADC_HandleTypeDef hadc1;
  46:Src/main.c    **** ADC_HandleTypeDef hadc2;
  47:Src/main.c    **** DMA_HandleTypeDef hdma_adc2;
  48:Src/main.c    **** 
  49:Src/main.c    **** I2C_HandleTypeDef hi2c1;
  50:Src/main.c    **** 
  51:Src/main.c    **** TIM_HandleTypeDef htim2;
  52:Src/main.c    **** TIM_HandleTypeDef htim3;
  53:Src/main.c    **** 
  54:Src/main.c    **** UART_HandleTypeDef huart1;
  55:Src/main.c    **** DMA_HandleTypeDef hdma_usart1_rx;
  56:Src/main.c    **** DMA_HandleTypeDef hdma_usart1_tx;
  57:Src/main.c    **** 
  58:Src/main.c    **** /* USER CODE BEGIN PV */
  59:Src/main.c    **** 
  60:Src/main.c    **** /* USER CODE END PV */
  61:Src/main.c    **** 
  62:Src/main.c    **** /* Private function prototypes -----------------------------------------------*/
  63:Src/main.c    **** void SystemClock_Config(void);
  64:Src/main.c    **** static void MX_GPIO_Init(void);
  65:Src/main.c    **** static void MX_DMA_Init(void);
  66:Src/main.c    **** static void MX_TIM2_Init(void);
  67:Src/main.c    **** static void MX_I2C1_Init(void);
  68:Src/main.c    **** static void MX_TIM3_Init(void);
  69:Src/main.c    **** static void MX_ADC1_Init(void);
  70:Src/main.c    **** static void MX_ADC2_Init(void);
  71:Src/main.c    **** static void MX_USART1_UART_Init(void);
  72:Src/main.c    **** /* USER CODE BEGIN PFP */
  73:Src/main.c    **** 
  74:Src/main.c    **** /* USER CODE END PFP */
  75:Src/main.c    **** 
  76:Src/main.c    **** /* Private user code ---------------------------------------------------------*/
  77:Src/main.c    **** /* USER CODE BEGIN 0 */
  78:Src/main.c    **** 
  79:Src/main.c    **** /* USER CODE END 0 */
  80:Src/main.c    **** 
  81:Src/main.c    **** /**
  82:Src/main.c    ****   * @brief  The application entry point.
  83:Src/main.c    ****   * @retval int
  84:Src/main.c    ****   */
  85:Src/main.c    **** int main(void)
  86:Src/main.c    **** {
  87:Src/main.c    **** 
  88:Src/main.c    ****   /* USER CODE BEGIN 1 */
ARM GAS  /tmp/ccaYtTQ0.s 			page 3


  89:Src/main.c    **** 
  90:Src/main.c    ****   /* USER CODE END 1 */
  91:Src/main.c    **** 
  92:Src/main.c    ****   /* MCU Configuration--------------------------------------------------------*/
  93:Src/main.c    **** 
  94:Src/main.c    ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  95:Src/main.c    ****   HAL_Init();
  96:Src/main.c    **** 
  97:Src/main.c    ****   /* USER CODE BEGIN Init */
  98:Src/main.c    **** 
  99:Src/main.c    ****   /* USER CODE END Init */
 100:Src/main.c    **** 
 101:Src/main.c    ****   /* Configure the system clock */
 102:Src/main.c    ****   SystemClock_Config();
 103:Src/main.c    **** 
 104:Src/main.c    ****   /* USER CODE BEGIN SysInit */
 105:Src/main.c    **** 
 106:Src/main.c    ****   /* USER CODE END SysInit */
 107:Src/main.c    **** 
 108:Src/main.c    ****   /* Initialize all configured peripherals */
 109:Src/main.c    ****   MX_GPIO_Init();
 110:Src/main.c    ****   MX_DMA_Init();
 111:Src/main.c    ****   MX_TIM2_Init();
 112:Src/main.c    ****   MX_I2C1_Init();
 113:Src/main.c    ****   MX_TIM3_Init();
 114:Src/main.c    ****   MX_ADC1_Init();
 115:Src/main.c    ****   MX_ADC2_Init();
 116:Src/main.c    ****   MX_USART1_UART_Init();
 117:Src/main.c    ****   /* USER CODE BEGIN 2 */
 118:Src/main.c    **** 
 119:Src/main.c    ****     HAL_UARTEx_ReceiveToIdle_DMA(&huart1, (uint8_t *)&UART_RX_buf, UART_RX_BUF_SIZE);
 120:Src/main.c    **** 
 121:Src/main.c    **** 	// ADC1 audio
 122:Src/main.c    ****     HAL_ADC_Start_IT(&hadc1);
 123:Src/main.c    **** 
 124:Src/main.c    ****     // timer audio e pwm
 125:Src/main.c    ****     HAL_TIM_Base_Start_IT(&htim2);
 126:Src/main.c    **** 
 127:Src/main.c    ****     // timer sys
 128:Src/main.c    ****     HAL_TIM_Base_Start_IT(&htim3);
 129:Src/main.c    **** 
 130:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
 131:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
 132:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
 133:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
 134:Src/main.c    **** 
 135:Src/main.c    ****     squeow_init();
 136:Src/main.c    ****     squeow_ui_init();
 137:Src/main.c    **** 	// prima lettura
 138:Src/main.c    ****     HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
 139:Src/main.c    **** 
 140:Src/main.c    ****     squeow_synth_init();
 141:Src/main.c    ****     //    HAL_Delay(50);
 142:Src/main.c    ****     squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
 143:Src/main.c    ****     squeow_synth_on();
 144:Src/main.c    **** 
 145:Src/main.c    ****   /* USER CODE END 2 */
ARM GAS  /tmp/ccaYtTQ0.s 			page 4


 146:Src/main.c    **** 
 147:Src/main.c    ****   /* Infinite loop */
 148:Src/main.c    ****   /* USER CODE BEGIN WHILE */
 149:Src/main.c    ****     while (1) {
 150:Src/main.c    ****     /* USER CODE END WHILE */
 151:Src/main.c    **** 
 152:Src/main.c    ****     /* USER CODE BEGIN 3 */
 153:Src/main.c    ****         if (sys_tick) {
 154:Src/main.c    **** 
 155:Src/main.c    ****             if (adc2_done) {
 156:Src/main.c    ****                 HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
 157:Src/main.c    ****                 adc2_done = 0;
 158:Src/main.c    ****             }
 159:Src/main.c    **** 
 160:Src/main.c    ****             if ((sys_tick_prescale > SYS_TICK_PRESCALE_1HZ) && (uart_sent||1)) {
 161:Src/main.c    ****                 seriow_var_dump();
 162:Src/main.c    ****                 sys_tick_prescale = 0;
 163:Src/main.c    ****     squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
 164:Src/main.c    ****     squeow_synth_on();
 165:Src/main.c    ****             }
 166:Src/main.c    **** 
 167:Src/main.c    ****             sys_tick_prescale++;
 168:Src/main.c    ****             sys_tick = 0;
 169:Src/main.c    ****         }
 170:Src/main.c    ****     }
 171:Src/main.c    ****   /* USER CODE END 3 */
 172:Src/main.c    **** }
 173:Src/main.c    **** 
 174:Src/main.c    **** /**
 175:Src/main.c    ****   * @brief System Clock Configuration
 176:Src/main.c    ****   * @retval None
 177:Src/main.c    ****   */
 178:Src/main.c    **** void SystemClock_Config(void)
 179:Src/main.c    **** {
 180:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 181:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 182:Src/main.c    **** 
 183:Src/main.c    ****   /** Configure the main internal regulator output voltage
 184:Src/main.c    ****   */
 185:Src/main.c    ****   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
 186:Src/main.c    **** 
 187:Src/main.c    ****   /** Initializes the RCC Oscillators according to the specified parameters
 188:Src/main.c    ****   * in the RCC_OscInitTypeDef structure.
 189:Src/main.c    ****   */
 190:Src/main.c    ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 191:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 192:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 193:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 194:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 195:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 54;
 196:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 197:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 198:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 199:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 200:Src/main.c    ****   {
 201:Src/main.c    ****     Error_Handler();
 202:Src/main.c    ****   }
ARM GAS  /tmp/ccaYtTQ0.s 			page 5


 203:Src/main.c    **** 
 204:Src/main.c    ****   /** Initializes the CPU, AHB and APB buses clocks
 205:Src/main.c    ****   */
 206:Src/main.c    ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 207:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 208:Src/main.c    ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 209:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 210:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 211:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 212:Src/main.c    **** 
 213:Src/main.c    ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
 214:Src/main.c    ****   {
 215:Src/main.c    ****     Error_Handler();
 216:Src/main.c    ****   }
 217:Src/main.c    ****   HAL_RCC_MCOConfig(RCC_MCO_PG10, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
 218:Src/main.c    **** }
 219:Src/main.c    **** 
 220:Src/main.c    **** /**
 221:Src/main.c    ****   * @brief ADC1 Initialization Function
 222:Src/main.c    ****   * @param None
 223:Src/main.c    ****   * @retval None
 224:Src/main.c    ****   */
 225:Src/main.c    **** static void MX_ADC1_Init(void)
 226:Src/main.c    **** {
 227:Src/main.c    **** 
 228:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 0 */
 229:Src/main.c    **** 
 230:Src/main.c    ****   /* USER CODE END ADC1_Init 0 */
 231:Src/main.c    **** 
 232:Src/main.c    ****   ADC_MultiModeTypeDef multimode = {0};
 233:Src/main.c    ****   ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
 234:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 235:Src/main.c    **** 
 236:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 1 */
 237:Src/main.c    **** 
 238:Src/main.c    ****   /* USER CODE END ADC1_Init 1 */
 239:Src/main.c    **** 
 240:Src/main.c    ****   /** Common config
 241:Src/main.c    ****   */
 242:Src/main.c    ****   hadc1.Instance = ADC1;
 243:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 244:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 245:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 246:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 247:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 248:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 249:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 250:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 251:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 252:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 253:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
 254:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
 255:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 256:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 257:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
 258:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 259:Src/main.c    ****   {
ARM GAS  /tmp/ccaYtTQ0.s 			page 6


 260:Src/main.c    ****     Error_Handler();
 261:Src/main.c    ****   }
 262:Src/main.c    **** 
 263:Src/main.c    ****   /** Configure the ADC multi-mode
 264:Src/main.c    ****   */
 265:Src/main.c    ****   multimode.Mode = ADC_MODE_INDEPENDENT;
 266:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 267:Src/main.c    ****   {
 268:Src/main.c    ****     Error_Handler();
 269:Src/main.c    ****   }
 270:Src/main.c    **** 
 271:Src/main.c    ****   /** Configure Analog WatchDog 1
 272:Src/main.c    ****   */
 273:Src/main.c    ****   AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1;
 274:Src/main.c    ****   AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
 275:Src/main.c    ****   AnalogWDGConfig.Channel = ADC_CHANNEL_15;
 276:Src/main.c    ****   AnalogWDGConfig.ITMode = ENABLE;
 277:Src/main.c    ****   AnalogWDGConfig.HighThreshold = 4048;
 278:Src/main.c    ****   AnalogWDGConfig.LowThreshold = 48;
 279:Src/main.c    ****   AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_NONE;
 280:Src/main.c    ****   if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
 281:Src/main.c    ****   {
 282:Src/main.c    ****     Error_Handler();
 283:Src/main.c    ****   }
 284:Src/main.c    **** 
 285:Src/main.c    ****   /** Configure Regular Channel
 286:Src/main.c    ****   */
 287:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_15;
 288:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 289:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_92CYCLES_5;
 290:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 291:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 292:Src/main.c    ****   sConfig.Offset = 0;
 293:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 294:Src/main.c    ****   {
 295:Src/main.c    ****     Error_Handler();
 296:Src/main.c    ****   }
 297:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 2 */
 298:Src/main.c    **** 
 299:Src/main.c    ****   /* USER CODE END ADC1_Init 2 */
 300:Src/main.c    **** 
 301:Src/main.c    **** }
 302:Src/main.c    **** 
 303:Src/main.c    **** /**
 304:Src/main.c    ****   * @brief ADC2 Initialization Function
 305:Src/main.c    ****   * @param None
 306:Src/main.c    ****   * @retval None
 307:Src/main.c    ****   */
 308:Src/main.c    **** static void MX_ADC2_Init(void)
 309:Src/main.c    **** {
 310:Src/main.c    **** 
 311:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 0 */
 312:Src/main.c    **** 
 313:Src/main.c    ****   /* USER CODE END ADC2_Init 0 */
 314:Src/main.c    **** 
 315:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 316:Src/main.c    **** 
ARM GAS  /tmp/ccaYtTQ0.s 			page 7


 317:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 1 */
 318:Src/main.c    **** 
 319:Src/main.c    ****   /* USER CODE END ADC2_Init 1 */
 320:Src/main.c    **** 
 321:Src/main.c    ****   /** Common config
 322:Src/main.c    ****   */
 323:Src/main.c    ****   hadc2.Instance = ADC2;
 324:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 325:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 326:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 327:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 328:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 329:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 330:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 331:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 332:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 333:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 334:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 335:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 336:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 337:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 338:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 339:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
 340:Src/main.c    ****   {
 341:Src/main.c    ****     Error_Handler();
 342:Src/main.c    ****   }
 343:Src/main.c    **** 
 344:Src/main.c    ****   /** Configure Regular Channel
 345:Src/main.c    ****   */
 346:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_3;
 347:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 348:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
 349:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 350:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 351:Src/main.c    ****   sConfig.Offset = 0;
 352:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 353:Src/main.c    ****   {
 354:Src/main.c    ****     Error_Handler();
 355:Src/main.c    ****   }
 356:Src/main.c    **** 
 357:Src/main.c    ****   /** Configure Regular Channel
 358:Src/main.c    ****   */
 359:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_4;
 360:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
 361:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 362:Src/main.c    ****   {
 363:Src/main.c    ****     Error_Handler();
 364:Src/main.c    ****   }
 365:Src/main.c    **** 
 366:Src/main.c    ****   /** Configure Regular Channel
 367:Src/main.c    ****   */
 368:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_13;
 369:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
 370:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 371:Src/main.c    ****   {
 372:Src/main.c    ****     Error_Handler();
 373:Src/main.c    ****   }
ARM GAS  /tmp/ccaYtTQ0.s 			page 8


 374:Src/main.c    **** 
 375:Src/main.c    ****   /** Configure Regular Channel
 376:Src/main.c    ****   */
 377:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_17;
 378:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
 379:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 380:Src/main.c    ****   {
 381:Src/main.c    ****     Error_Handler();
 382:Src/main.c    ****   }
 383:Src/main.c    ****   /* USER CODE BEGIN ADC2_Init 2 */
 384:Src/main.c    **** 
 385:Src/main.c    ****   /* USER CODE END ADC2_Init 2 */
 386:Src/main.c    **** 
 387:Src/main.c    **** }
 388:Src/main.c    **** 
 389:Src/main.c    **** /**
 390:Src/main.c    ****   * @brief I2C1 Initialization Function
 391:Src/main.c    ****   * @param None
 392:Src/main.c    ****   * @retval None
 393:Src/main.c    ****   */
 394:Src/main.c    **** static void MX_I2C1_Init(void)
 395:Src/main.c    **** {
 396:Src/main.c    **** 
 397:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 0 */
 398:Src/main.c    **** 
 399:Src/main.c    ****   /* USER CODE END I2C1_Init 0 */
 400:Src/main.c    **** 
 401:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 1 */
 402:Src/main.c    **** 
 403:Src/main.c    ****   /* USER CODE END I2C1_Init 1 */
 404:Src/main.c    ****   hi2c1.Instance = I2C1;
 405:Src/main.c    ****   hi2c1.Init.Timing = 0x40B282BD;
 406:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 407:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 408:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 409:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 410:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 411:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 412:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 413:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 414:Src/main.c    ****   {
 415:Src/main.c    ****     Error_Handler();
 416:Src/main.c    ****   }
 417:Src/main.c    **** 
 418:Src/main.c    ****   /** Configure Analogue filter
 419:Src/main.c    ****   */
 420:Src/main.c    ****   if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
 421:Src/main.c    ****   {
 422:Src/main.c    ****     Error_Handler();
 423:Src/main.c    ****   }
 424:Src/main.c    **** 
 425:Src/main.c    ****   /** Configure Digital filter
 426:Src/main.c    ****   */
 427:Src/main.c    ****   if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
 428:Src/main.c    ****   {
 429:Src/main.c    ****     Error_Handler();
 430:Src/main.c    ****   }
ARM GAS  /tmp/ccaYtTQ0.s 			page 9


 431:Src/main.c    ****   /* USER CODE BEGIN I2C1_Init 2 */
 432:Src/main.c    **** 
 433:Src/main.c    ****   /* USER CODE END I2C1_Init 2 */
 434:Src/main.c    **** 
 435:Src/main.c    **** }
 436:Src/main.c    **** 
 437:Src/main.c    **** /**
 438:Src/main.c    ****   * @brief TIM2 Initialization Function
 439:Src/main.c    ****   * @param None
 440:Src/main.c    ****   * @retval None
 441:Src/main.c    ****   */
 442:Src/main.c    **** static void MX_TIM2_Init(void)
 443:Src/main.c    **** {
 444:Src/main.c    **** 
 445:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 0 */
 446:Src/main.c    **** 
 447:Src/main.c    ****   /* USER CODE END TIM2_Init 0 */
 448:Src/main.c    **** 
 449:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
 450:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 451:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 452:Src/main.c    **** 
 453:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 1 */
 454:Src/main.c    **** 
 455:Src/main.c    ****   /* USER CODE END TIM2_Init 1 */
 456:Src/main.c    ****   htim2.Instance = TIM2;
 457:Src/main.c    ****   htim2.Init.Prescaler = 0;
 458:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 459:Src/main.c    ****   htim2.Init.Period = 4095;
 460:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 461:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 462:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 463:Src/main.c    ****   {
 464:Src/main.c    ****     Error_Handler();
 465:Src/main.c    ****   }
 466:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
 467:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 468:Src/main.c    ****   {
 469:Src/main.c    ****     Error_Handler();
 470:Src/main.c    ****   }
 471:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
 472:Src/main.c    ****   {
 473:Src/main.c    ****     Error_Handler();
 474:Src/main.c    ****   }
 475:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
 476:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 477:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 478:Src/main.c    ****   {
 479:Src/main.c    ****     Error_Handler();
 480:Src/main.c    ****   }
 481:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
 482:Src/main.c    ****   sConfigOC.Pulse = 500;
 483:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 484:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
 485:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 486:Src/main.c    ****   {
 487:Src/main.c    ****     Error_Handler();
ARM GAS  /tmp/ccaYtTQ0.s 			page 10


 488:Src/main.c    ****   }
 489:Src/main.c    ****   sConfigOC.Pulse = 1000;
 490:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
 491:Src/main.c    ****   {
 492:Src/main.c    ****     Error_Handler();
 493:Src/main.c    ****   }
 494:Src/main.c    ****   sConfigOC.Pulse = 1500;
 495:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 496:Src/main.c    ****   {
 497:Src/main.c    ****     Error_Handler();
 498:Src/main.c    ****   }
 499:Src/main.c    ****   sConfigOC.Pulse = 2000;
 500:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 501:Src/main.c    ****   {
 502:Src/main.c    ****     Error_Handler();
 503:Src/main.c    ****   }
 504:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
 505:Src/main.c    **** 
 506:Src/main.c    ****   /* USER CODE END TIM2_Init 2 */
 507:Src/main.c    ****   HAL_TIM_MspPostInit(&htim2);
 508:Src/main.c    **** 
 509:Src/main.c    **** }
 510:Src/main.c    **** 
 511:Src/main.c    **** /**
 512:Src/main.c    ****   * @brief TIM3 Initialization Function
 513:Src/main.c    ****   * @param None
 514:Src/main.c    ****   * @retval None
 515:Src/main.c    ****   */
 516:Src/main.c    **** static void MX_TIM3_Init(void)
 517:Src/main.c    **** {
 518:Src/main.c    **** 
 519:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 0 */
 520:Src/main.c    **** 
 521:Src/main.c    ****   /* USER CODE END TIM3_Init 0 */
 522:Src/main.c    **** 
 523:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
 524:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 525:Src/main.c    **** 
 526:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 1 */
 527:Src/main.c    **** 
 528:Src/main.c    ****   /* USER CODE END TIM3_Init 1 */
 529:Src/main.c    ****   htim3.Instance = TIM3;
 530:Src/main.c    ****   htim3.Init.Prescaler = 41471;
 531:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 532:Src/main.c    ****   htim3.Init.Period = 399;
 533:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 534:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 535:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 536:Src/main.c    ****   {
 537:Src/main.c    ****     Error_Handler();
 538:Src/main.c    ****   }
 539:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
 540:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 541:Src/main.c    ****   {
 542:Src/main.c    ****     Error_Handler();
 543:Src/main.c    ****   }
 544:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
ARM GAS  /tmp/ccaYtTQ0.s 			page 11


 545:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 546:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 547:Src/main.c    ****   {
 548:Src/main.c    ****     Error_Handler();
 549:Src/main.c    ****   }
 550:Src/main.c    ****   /* USER CODE BEGIN TIM3_Init 2 */
 551:Src/main.c    **** 
 552:Src/main.c    ****   /* USER CODE END TIM3_Init 2 */
 553:Src/main.c    **** 
 554:Src/main.c    **** }
 555:Src/main.c    **** 
 556:Src/main.c    **** /**
 557:Src/main.c    ****   * @brief USART1 Initialization Function
 558:Src/main.c    ****   * @param None
 559:Src/main.c    ****   * @retval None
 560:Src/main.c    ****   */
 561:Src/main.c    **** static void MX_USART1_UART_Init(void)
 562:Src/main.c    **** {
 563:Src/main.c    **** 
 564:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 0 */
 565:Src/main.c    **** 
 566:Src/main.c    ****   /* USER CODE END USART1_Init 0 */
 567:Src/main.c    **** 
 568:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 1 */
 569:Src/main.c    **** 
 570:Src/main.c    ****   /* USER CODE END USART1_Init 1 */
 571:Src/main.c    ****   huart1.Instance = USART1;
 572:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 573:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 574:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 575:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 576:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 577:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 578:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 579:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 580:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 581:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 582:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 583:Src/main.c    ****   {
 584:Src/main.c    ****     Error_Handler();
 585:Src/main.c    ****   }
 586:Src/main.c    ****   if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 587:Src/main.c    ****   {
 588:Src/main.c    ****     Error_Handler();
 589:Src/main.c    ****   }
 590:Src/main.c    ****   if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 591:Src/main.c    ****   {
 592:Src/main.c    ****     Error_Handler();
 593:Src/main.c    ****   }
 594:Src/main.c    ****   if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 595:Src/main.c    ****   {
 596:Src/main.c    ****     Error_Handler();
 597:Src/main.c    ****   }
 598:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
 599:Src/main.c    **** 
 600:Src/main.c    ****   /* USER CODE END USART1_Init 2 */
 601:Src/main.c    **** 
ARM GAS  /tmp/ccaYtTQ0.s 			page 12


 602:Src/main.c    **** }
 603:Src/main.c    **** 
 604:Src/main.c    **** /**
 605:Src/main.c    ****   * Enable DMA controller clock
 606:Src/main.c    ****   */
 607:Src/main.c    **** static void MX_DMA_Init(void)
 608:Src/main.c    **** {
 609:Src/main.c    **** 
 610:Src/main.c    ****   /* DMA controller clock enable */
 611:Src/main.c    ****   __HAL_RCC_DMAMUX1_CLK_ENABLE();
 612:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 613:Src/main.c    **** 
 614:Src/main.c    ****   /* DMA interrupt init */
 615:Src/main.c    ****   /* DMA1_Channel2_IRQn interrupt configuration */
 616:Src/main.c    ****   HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
 617:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
 618:Src/main.c    ****   /* DMA1_Channel3_IRQn interrupt configuration */
 619:Src/main.c    ****   HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
 620:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
 621:Src/main.c    ****   /* DMA1_Channel4_IRQn interrupt configuration */
 622:Src/main.c    ****   HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
 623:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 624:Src/main.c    **** 
 625:Src/main.c    **** }
 626:Src/main.c    **** 
 627:Src/main.c    **** /**
 628:Src/main.c    ****   * @brief GPIO Initialization Function
 629:Src/main.c    ****   * @param None
 630:Src/main.c    ****   * @retval None
 631:Src/main.c    ****   */
 632:Src/main.c    **** static void MX_GPIO_Init(void)
 633:Src/main.c    **** {
  28              		.loc 1 633 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 40
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32 0000 30B5     		push	{r4, r5, lr}
  33              	.LCFI0:
  34              		.cfi_def_cfa_offset 12
  35              		.cfi_offset 4, -12
  36              		.cfi_offset 5, -8
  37              		.cfi_offset 14, -4
  38 0002 8BB0     		sub	sp, sp, #44
  39              	.LCFI1:
  40              		.cfi_def_cfa_offset 56
 634:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
  41              		.loc 1 634 3 view .LVU1
  42              		.loc 1 634 20 is_stmt 0 view .LVU2
  43 0004 0024     		movs	r4, #0
  44 0006 0594     		str	r4, [sp, #20]
  45 0008 0694     		str	r4, [sp, #24]
  46 000a 0794     		str	r4, [sp, #28]
  47 000c 0894     		str	r4, [sp, #32]
  48 000e 0994     		str	r4, [sp, #36]
 635:Src/main.c    **** /* USER CODE BEGIN MX_GPIO_Init_1 */
 636:Src/main.c    **** /* USER CODE END MX_GPIO_Init_1 */
 637:Src/main.c    **** 
ARM GAS  /tmp/ccaYtTQ0.s 			page 13


 638:Src/main.c    ****   /* GPIO Ports Clock Enable */
 639:Src/main.c    ****   __HAL_RCC_GPIOF_CLK_ENABLE();
  49              		.loc 1 639 3 is_stmt 1 view .LVU3
  50              	.LBB4:
  51              		.loc 1 639 3 view .LVU4
  52              		.loc 1 639 3 view .LVU5
  53 0010 214B     		ldr	r3, .L3
  54 0012 DA6C     		ldr	r2, [r3, #76]
  55 0014 42F02002 		orr	r2, r2, #32
  56 0018 DA64     		str	r2, [r3, #76]
  57              		.loc 1 639 3 view .LVU6
  58 001a DA6C     		ldr	r2, [r3, #76]
  59 001c 02F02002 		and	r2, r2, #32
  60 0020 0192     		str	r2, [sp, #4]
  61              		.loc 1 639 3 view .LVU7
  62 0022 019A     		ldr	r2, [sp, #4]
  63              	.LBE4:
  64              		.loc 1 639 3 view .LVU8
 640:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
  65              		.loc 1 640 3 view .LVU9
  66              	.LBB5:
  67              		.loc 1 640 3 view .LVU10
  68              		.loc 1 640 3 view .LVU11
  69 0024 DA6C     		ldr	r2, [r3, #76]
  70 0026 42F04002 		orr	r2, r2, #64
  71 002a DA64     		str	r2, [r3, #76]
  72              		.loc 1 640 3 view .LVU12
  73 002c DA6C     		ldr	r2, [r3, #76]
  74 002e 02F04002 		and	r2, r2, #64
  75 0032 0292     		str	r2, [sp, #8]
  76              		.loc 1 640 3 view .LVU13
  77 0034 029A     		ldr	r2, [sp, #8]
  78              	.LBE5:
  79              		.loc 1 640 3 view .LVU14
 641:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
  80              		.loc 1 641 3 view .LVU15
  81              	.LBB6:
  82              		.loc 1 641 3 view .LVU16
  83              		.loc 1 641 3 view .LVU17
  84 0036 DA6C     		ldr	r2, [r3, #76]
  85 0038 42F00102 		orr	r2, r2, #1
  86 003c DA64     		str	r2, [r3, #76]
  87              		.loc 1 641 3 view .LVU18
  88 003e DA6C     		ldr	r2, [r3, #76]
  89 0040 02F00102 		and	r2, r2, #1
  90 0044 0392     		str	r2, [sp, #12]
  91              		.loc 1 641 3 view .LVU19
  92 0046 039A     		ldr	r2, [sp, #12]
  93              	.LBE6:
  94              		.loc 1 641 3 view .LVU20
 642:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
  95              		.loc 1 642 3 view .LVU21
  96              	.LBB7:
  97              		.loc 1 642 3 view .LVU22
  98              		.loc 1 642 3 view .LVU23
  99 0048 DA6C     		ldr	r2, [r3, #76]
 100 004a 42F00202 		orr	r2, r2, #2
ARM GAS  /tmp/ccaYtTQ0.s 			page 14


 101 004e DA64     		str	r2, [r3, #76]
 102              		.loc 1 642 3 view .LVU24
 103 0050 DB6C     		ldr	r3, [r3, #76]
 104 0052 03F00203 		and	r3, r3, #2
 105 0056 0493     		str	r3, [sp, #16]
 106              		.loc 1 642 3 view .LVU25
 107 0058 049B     		ldr	r3, [sp, #16]
 108              	.LBE7:
 109              		.loc 1 642 3 view .LVU26
 643:Src/main.c    **** 
 644:Src/main.c    ****   /*Configure GPIO pin Output Level */
 645:Src/main.c    ****   HAL_GPIO_WritePin(GPIOB, AUDIO_OL_Pin|RESET_BTN_Pin|TEMP_OL_Pin|REFL_OL_Pin, GPIO_PIN_RESET);
 110              		.loc 1 645 3 view .LVU27
 111 005a 104D     		ldr	r5, .L3+4
 112 005c 2246     		mov	r2, r4
 113 005e 7821     		movs	r1, #120
 114 0060 2846     		mov	r0, r5
 115 0062 FFF7FEFF 		bl	HAL_GPIO_WritePin
 116              	.LVL0:
 646:Src/main.c    **** 
 647:Src/main.c    ****   /*Configure GPIO pin : PG10 */
 648:Src/main.c    ****   GPIO_InitStruct.Pin = GPIO_PIN_10;
 117              		.loc 1 648 3 view .LVU28
 118              		.loc 1 648 23 is_stmt 0 view .LVU29
 119 0066 4FF48063 		mov	r3, #1024
 120 006a 0593     		str	r3, [sp, #20]
 649:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 121              		.loc 1 649 3 is_stmt 1 view .LVU30
 122              		.loc 1 649 24 is_stmt 0 view .LVU31
 123 006c 0223     		movs	r3, #2
 124 006e 0693     		str	r3, [sp, #24]
 650:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 125              		.loc 1 650 3 is_stmt 1 view .LVU32
 126              		.loc 1 650 24 is_stmt 0 view .LVU33
 127 0070 0794     		str	r4, [sp, #28]
 651:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 128              		.loc 1 651 3 is_stmt 1 view .LVU34
 129              		.loc 1 651 25 is_stmt 0 view .LVU35
 130 0072 0894     		str	r4, [sp, #32]
 652:Src/main.c    ****   GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 131              		.loc 1 652 3 is_stmt 1 view .LVU36
 132              		.loc 1 652 29 is_stmt 0 view .LVU37
 133 0074 0994     		str	r4, [sp, #36]
 653:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 134              		.loc 1 653 3 is_stmt 1 view .LVU38
 135 0076 05A9     		add	r1, sp, #20
 136 0078 0948     		ldr	r0, .L3+8
 137 007a FFF7FEFF 		bl	HAL_GPIO_Init
 138              	.LVL1:
 654:Src/main.c    **** 
 655:Src/main.c    ****   /*Configure GPIO pins : AUDIO_OL_Pin RESET_BTN_Pin TEMP_OL_Pin REFL_OL_Pin */
 656:Src/main.c    ****   GPIO_InitStruct.Pin = AUDIO_OL_Pin|RESET_BTN_Pin|TEMP_OL_Pin|REFL_OL_Pin;
 139              		.loc 1 656 3 view .LVU39
 140              		.loc 1 656 23 is_stmt 0 view .LVU40
 141 007e 7823     		movs	r3, #120
 142 0080 0593     		str	r3, [sp, #20]
 657:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
ARM GAS  /tmp/ccaYtTQ0.s 			page 15


 143              		.loc 1 657 3 is_stmt 1 view .LVU41
 144              		.loc 1 657 24 is_stmt 0 view .LVU42
 145 0082 0123     		movs	r3, #1
 146 0084 0693     		str	r3, [sp, #24]
 658:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 147              		.loc 1 658 3 is_stmt 1 view .LVU43
 148              		.loc 1 658 24 is_stmt 0 view .LVU44
 149 0086 0794     		str	r4, [sp, #28]
 659:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 150              		.loc 1 659 3 is_stmt 1 view .LVU45
 151              		.loc 1 659 25 is_stmt 0 view .LVU46
 152 0088 0894     		str	r4, [sp, #32]
 660:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 153              		.loc 1 660 3 is_stmt 1 view .LVU47
 154 008a 05A9     		add	r1, sp, #20
 155 008c 2846     		mov	r0, r5
 156 008e FFF7FEFF 		bl	HAL_GPIO_Init
 157              	.LVL2:
 661:Src/main.c    **** 
 662:Src/main.c    **** /* USER CODE BEGIN MX_GPIO_Init_2 */
 663:Src/main.c    **** /* USER CODE END MX_GPIO_Init_2 */
 664:Src/main.c    **** }
 158              		.loc 1 664 1 is_stmt 0 view .LVU48
 159 0092 0BB0     		add	sp, sp, #44
 160              	.LCFI2:
 161              		.cfi_def_cfa_offset 12
 162              		@ sp needed
 163 0094 30BD     		pop	{r4, r5, pc}
 164              	.L4:
 165 0096 00BF     		.align	2
 166              	.L3:
 167 0098 00100240 		.word	1073876992
 168 009c 00040048 		.word	1207960576
 169 00a0 00180048 		.word	1207965696
 170              		.cfi_endproc
 171              	.LFE338:
 173              		.section	.text.MX_DMA_Init,"ax",%progbits
 174              		.align	1
 175              		.syntax unified
 176              		.thumb
 177              		.thumb_func
 179              	MX_DMA_Init:
 180              	.LFB337:
 608:Src/main.c    **** 
 181              		.loc 1 608 1 is_stmt 1 view -0
 182              		.cfi_startproc
 183              		@ args = 0, pretend = 0, frame = 8
 184              		@ frame_needed = 0, uses_anonymous_args = 0
 185 0000 00B5     		push	{lr}
 186              	.LCFI3:
 187              		.cfi_def_cfa_offset 4
 188              		.cfi_offset 14, -4
 189 0002 83B0     		sub	sp, sp, #12
 190              	.LCFI4:
 191              		.cfi_def_cfa_offset 16
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 192              		.loc 1 611 3 view .LVU50
ARM GAS  /tmp/ccaYtTQ0.s 			page 16


 193              	.LBB8:
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 194              		.loc 1 611 3 view .LVU51
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 195              		.loc 1 611 3 view .LVU52
 196 0004 164B     		ldr	r3, .L7
 197 0006 9A6C     		ldr	r2, [r3, #72]
 198 0008 42F00402 		orr	r2, r2, #4
 199 000c 9A64     		str	r2, [r3, #72]
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 200              		.loc 1 611 3 view .LVU53
 201 000e 9A6C     		ldr	r2, [r3, #72]
 202 0010 02F00402 		and	r2, r2, #4
 203 0014 0092     		str	r2, [sp]
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 204              		.loc 1 611 3 view .LVU54
 205 0016 009A     		ldr	r2, [sp]
 206              	.LBE8:
 611:Src/main.c    ****   __HAL_RCC_DMA1_CLK_ENABLE();
 207              		.loc 1 611 3 view .LVU55
 612:Src/main.c    **** 
 208              		.loc 1 612 3 view .LVU56
 209              	.LBB9:
 612:Src/main.c    **** 
 210              		.loc 1 612 3 view .LVU57
 612:Src/main.c    **** 
 211              		.loc 1 612 3 view .LVU58
 212 0018 9A6C     		ldr	r2, [r3, #72]
 213 001a 42F00102 		orr	r2, r2, #1
 214 001e 9A64     		str	r2, [r3, #72]
 612:Src/main.c    **** 
 215              		.loc 1 612 3 view .LVU59
 216 0020 9B6C     		ldr	r3, [r3, #72]
 217 0022 03F00103 		and	r3, r3, #1
 218 0026 0193     		str	r3, [sp, #4]
 612:Src/main.c    **** 
 219              		.loc 1 612 3 view .LVU60
 220 0028 019B     		ldr	r3, [sp, #4]
 221              	.LBE9:
 612:Src/main.c    **** 
 222              		.loc 1 612 3 view .LVU61
 616:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
 223              		.loc 1 616 3 view .LVU62
 224 002a 0022     		movs	r2, #0
 225 002c 1146     		mov	r1, r2
 226 002e 0C20     		movs	r0, #12
 227 0030 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 228              	.LVL3:
 617:Src/main.c    ****   /* DMA1_Channel3_IRQn interrupt configuration */
 229              		.loc 1 617 3 view .LVU63
 230 0034 0C20     		movs	r0, #12
 231 0036 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 232              	.LVL4:
 619:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
 233              		.loc 1 619 3 view .LVU64
 234 003a 0022     		movs	r2, #0
 235 003c 1146     		mov	r1, r2
ARM GAS  /tmp/ccaYtTQ0.s 			page 17


 236 003e 0D20     		movs	r0, #13
 237 0040 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 238              	.LVL5:
 620:Src/main.c    ****   /* DMA1_Channel4_IRQn interrupt configuration */
 239              		.loc 1 620 3 view .LVU65
 240 0044 0D20     		movs	r0, #13
 241 0046 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 242              	.LVL6:
 622:Src/main.c    ****   HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 243              		.loc 1 622 3 view .LVU66
 244 004a 0022     		movs	r2, #0
 245 004c 1146     		mov	r1, r2
 246 004e 0E20     		movs	r0, #14
 247 0050 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 248              	.LVL7:
 623:Src/main.c    **** 
 249              		.loc 1 623 3 view .LVU67
 250 0054 0E20     		movs	r0, #14
 251 0056 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 252              	.LVL8:
 625:Src/main.c    **** 
 253              		.loc 1 625 1 is_stmt 0 view .LVU68
 254 005a 03B0     		add	sp, sp, #12
 255              	.LCFI5:
 256              		.cfi_def_cfa_offset 4
 257              		@ sp needed
 258 005c 5DF804FB 		ldr	pc, [sp], #4
 259              	.L8:
 260              		.align	2
 261              	.L7:
 262 0060 00100240 		.word	1073876992
 263              		.cfi_endproc
 264              	.LFE337:
 266              		.section	.text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits
 267              		.align	1
 268              		.global	HAL_ADC_LevelOutOfWindowCallback
 269              		.syntax unified
 270              		.thumb
 271              		.thumb_func
 273              	HAL_ADC_LevelOutOfWindowCallback:
 274              	.LVL9:
 275              	.LFB339:
 665:Src/main.c    **** 
 666:Src/main.c    **** /* USER CODE BEGIN 4 */
 667:Src/main.c    **** void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc) {
 276              		.loc 1 667 64 is_stmt 1 view -0
 277              		.cfi_startproc
 278              		@ args = 0, pretend = 0, frame = 0
 279              		@ frame_needed = 0, uses_anonymous_args = 0
 280              		@ link register save eliminated.
 668:Src/main.c    **** 	// analog_wd_status = 3;
 669:Src/main.c    **** }
 281              		.loc 1 669 1 view .LVU70
 282 0000 7047     		bx	lr
 283              		.cfi_endproc
 284              	.LFE339:
 286              		.section	.text.HAL_ADC_ConvCpltCallback,"ax",%progbits
ARM GAS  /tmp/ccaYtTQ0.s 			page 18


 287              		.align	1
 288              		.global	HAL_ADC_ConvCpltCallback
 289              		.syntax unified
 290              		.thumb
 291              		.thumb_func
 293              	HAL_ADC_ConvCpltCallback:
 294              	.LVL10:
 295              	.LFB340:
 670:Src/main.c    **** 
 671:Src/main.c    **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) {
 296              		.loc 1 671 56 view -0
 297              		.cfi_startproc
 298              		@ args = 0, pretend = 0, frame = 0
 299              		@ frame_needed = 0, uses_anonymous_args = 0
 300              		@ link register save eliminated.
 672:Src/main.c    **** 	adc2_done = 1;
 301              		.loc 1 672 2 view .LVU72
 302              		.loc 1 672 12 is_stmt 0 view .LVU73
 303 0000 014B     		ldr	r3, .L11
 304 0002 0122     		movs	r2, #1
 305 0004 1A70     		strb	r2, [r3]
 673:Src/main.c    **** 	// TIM2->CCR1
 674:Src/main.c    **** }
 306              		.loc 1 674 1 view .LVU74
 307 0006 7047     		bx	lr
 308              	.L12:
 309              		.align	2
 310              	.L11:
 311 0008 00000000 		.word	adc2_done
 312              		.cfi_endproc
 313              	.LFE340:
 315              		.section	.text.HAL_UARTEx_RxEventCallback,"ax",%progbits
 316              		.align	1
 317              		.global	HAL_UARTEx_RxEventCallback
 318              		.syntax unified
 319              		.thumb
 320              		.thumb_func
 322              	HAL_UARTEx_RxEventCallback:
 323              	.LVL11:
 324              	.LFB341:
 675:Src/main.c    **** 
 676:Src/main.c    **** void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t offset) {
 325              		.loc 1 676 77 is_stmt 1 view -0
 326              		.cfi_startproc
 327              		@ args = 0, pretend = 0, frame = 0
 328              		@ frame_needed = 0, uses_anonymous_args = 0
 329              		@ link register save eliminated.
 677:Src/main.c    ****     static uint16_t last_offset = 0;
 330              		.loc 1 677 5 view .LVU76
 678:Src/main.c    ****     // Ignore if called twice (which will happen on every half buffer)
 679:Src/main.c    ****     if (offset != last_offset) {
 331              		.loc 1 679 5 view .LVU77
 332              		.loc 1 679 16 is_stmt 0 view .LVU78
 333 0000 084B     		ldr	r3, .L18
 334 0002 1B88     		ldrh	r3, [r3]
 335              		.loc 1 679 8 view .LVU79
 336 0004 8B42     		cmp	r3, r1
ARM GAS  /tmp/ccaYtTQ0.s 			page 19


 337 0006 0BD0     		beq	.L13
 680:Src/main.c    ****         // If wrap around reset last_size
 681:Src/main.c    ****         if (offset < last_offset)
 338              		.loc 1 681 9 is_stmt 1 view .LVU80
 339              		.loc 1 681 12 is_stmt 0 view .LVU81
 340 0008 06D9     		bls	.L16
 682:Src/main.c    ****             last_offset = 0;
 341              		.loc 1 682 13 is_stmt 1 view .LVU82
 342              		.loc 1 682 25 is_stmt 0 view .LVU83
 343 000a 064B     		ldr	r3, .L18
 344 000c 0022     		movs	r2, #0
 345 000e 1A80     		strh	r2, [r3]	@ movhi
 346 0010 02E0     		b	.L16
 347              	.L17:
 683:Src/main.c    ****         while (last_offset < offset) {
 684:Src/main.c    ****             // process_character((char) dmabuf[last_offset]);
 685:Src/main.c    ****             // TODO
 686:Src/main.c    ****             // store_cmd(UART_RX_buf[last_offset]);
 687:Src/main.c    ****             ++last_offset;
 348              		.loc 1 687 13 is_stmt 1 view .LVU84
 349 0012 0133     		adds	r3, r3, #1
 350 0014 034A     		ldr	r2, .L18
 351 0016 1380     		strh	r3, [r2]	@ movhi
 352              	.L16:
 683:Src/main.c    ****         while (last_offset < offset) {
 353              		.loc 1 683 28 view .LVU85
 354 0018 024B     		ldr	r3, .L18
 355 001a 1B88     		ldrh	r3, [r3]
 356 001c 8B42     		cmp	r3, r1
 357 001e F8D3     		bcc	.L17
 358              	.L13:
 688:Src/main.c    ****         }
 689:Src/main.c    ****     }
 690:Src/main.c    **** }
 359              		.loc 1 690 1 is_stmt 0 view .LVU86
 360 0020 7047     		bx	lr
 361              	.L19:
 362 0022 00BF     		.align	2
 363              	.L18:
 364 0024 00000000 		.word	last_offset.0
 365              		.cfi_endproc
 366              	.LFE341:
 368              		.section	.text.HAL_UART_TxCpltCallback,"ax",%progbits
 369              		.align	1
 370              		.global	HAL_UART_TxCpltCallback
 371              		.syntax unified
 372              		.thumb
 373              		.thumb_func
 375              	HAL_UART_TxCpltCallback:
 376              	.LVL12:
 377              	.LFB342:
 691:Src/main.c    **** 
 692:Src/main.c    **** void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart){
 378              		.loc 1 692 56 is_stmt 1 view -0
 379              		.cfi_startproc
 380              		@ args = 0, pretend = 0, frame = 0
 381              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccaYtTQ0.s 			page 20


 382              		@ link register save eliminated.
 693:Src/main.c    **** 	uart_sent = 1;
 383              		.loc 1 693 2 view .LVU88
 384              		.loc 1 693 12 is_stmt 0 view .LVU89
 385 0000 014B     		ldr	r3, .L21
 386 0002 0122     		movs	r2, #1
 387 0004 1A70     		strb	r2, [r3]
 694:Src/main.c    **** }
 388              		.loc 1 694 1 view .LVU90
 389 0006 7047     		bx	lr
 390              	.L22:
 391              		.align	2
 392              	.L21:
 393 0008 00000000 		.word	uart_sent
 394              		.cfi_endproc
 395              	.LFE342:
 397              		.section	.text.Error_Handler,"ax",%progbits
 398              		.align	1
 399              		.global	Error_Handler
 400              		.syntax unified
 401              		.thumb
 402              		.thumb_func
 404              	Error_Handler:
 405              	.LFB343:
 695:Src/main.c    **** 
 696:Src/main.c    **** /* USER CODE END 4 */
 697:Src/main.c    **** 
 698:Src/main.c    **** /**
 699:Src/main.c    ****   * @brief  This function is executed in case of error occurrence.
 700:Src/main.c    ****   * @retval None
 701:Src/main.c    ****   */
 702:Src/main.c    **** void Error_Handler(void)
 703:Src/main.c    **** {
 406              		.loc 1 703 1 is_stmt 1 view -0
 407              		.cfi_startproc
 408              		@ Volatile: function does not return.
 409              		@ args = 0, pretend = 0, frame = 0
 410              		@ frame_needed = 0, uses_anonymous_args = 0
 411              		@ link register save eliminated.
 704:Src/main.c    ****   /* USER CODE BEGIN Error_Handler_Debug */
 705:Src/main.c    ****     /* User can add his own implementation to report the HAL error return state */
 706:Src/main.c    ****     __disable_irq();
 412              		.loc 1 706 5 view .LVU92
 413              	.LBB10:
 414              	.LBI10:
 415              		.file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V5.2.0
   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     08. May 2019
   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
   8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
   9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
ARM GAS  /tmp/ccaYtTQ0.s 			page 21


  12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  16:Drivers/CMSIS/Include/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  18:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
  23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  36:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  38:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ASM
  41:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __INLINE
  44:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE                 
  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
  52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
  56:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __WEAK
  59:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED
  62:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
ARM GAS  /tmp/ccaYtTQ0.s 			page 22


  69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Drivers/CMSIS/Include/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Initializes data and bss sections
ARM GAS  /tmp/ccaYtTQ0.s 			page 23


 126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Drivers/CMSIS/Include/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Drivers/CMSIS/Include/cmsis_gcc.h ****            in the used linker script.
 129:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 130:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 133:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 135:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 136:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t const* src;
 137:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 138:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 139:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __copy_table_t;
 140:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 141:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 142:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 143:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 144:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __zero_table_t;
 145:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 146:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 151:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 155:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 156:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 157:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 161:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 162:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 163:Drivers/CMSIS/Include/cmsis_gcc.h ****   _start();
 164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 165:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
ARM GAS  /tmp/ccaYtTQ0.s 			page 24


 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 187:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 188:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 189:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 192:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 193:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
 194:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 195:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 198:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 204:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
 205:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 206:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 416              		.loc 2 207 27 view .LVU93
 417              	.LBB11:
 208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 209:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 418              		.loc 2 209 3 view .LVU94
 419              		.syntax unified
 420              	@ 209 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
 421 0000 72B6     		cpsid i
 422              	@ 0 "" 2
 423              		.thumb
 424              		.syntax unified
 425              	.L24:
 426              	.LBE11:
 427              	.LBE10:
 707:Src/main.c    ****     while (1) {
 428              		.loc 1 707 5 view .LVU95
 708:Src/main.c    ****     }
 429              		.loc 1 708 5 view .LVU96
 707:Src/main.c    ****     while (1) {
 430              		.loc 1 707 11 view .LVU97
 431 0002 FEE7     		b	.L24
 432              		.cfi_endproc
 433              	.LFE343:
 435              		.section	.text.MX_TIM2_Init,"ax",%progbits
 436              		.align	1
 437              		.syntax unified
 438              		.thumb
 439              		.thumb_func
 441              	MX_TIM2_Init:
 442              	.LFB334:
 443:Src/main.c    **** 
 443              		.loc 1 443 1 view -0
ARM GAS  /tmp/ccaYtTQ0.s 			page 25


 444              		.cfi_startproc
 445              		@ args = 0, pretend = 0, frame = 56
 446              		@ frame_needed = 0, uses_anonymous_args = 0
 447 0000 00B5     		push	{lr}
 448              	.LCFI6:
 449              		.cfi_def_cfa_offset 4
 450              		.cfi_offset 14, -4
 451 0002 8FB0     		sub	sp, sp, #60
 452              	.LCFI7:
 453              		.cfi_def_cfa_offset 64
 449:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 454              		.loc 1 449 3 view .LVU99
 449:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 455              		.loc 1 449 26 is_stmt 0 view .LVU100
 456 0004 0023     		movs	r3, #0
 457 0006 0A93     		str	r3, [sp, #40]
 458 0008 0B93     		str	r3, [sp, #44]
 459 000a 0C93     		str	r3, [sp, #48]
 460 000c 0D93     		str	r3, [sp, #52]
 450:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 461              		.loc 1 450 3 is_stmt 1 view .LVU101
 450:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 462              		.loc 1 450 27 is_stmt 0 view .LVU102
 463 000e 0793     		str	r3, [sp, #28]
 464 0010 0893     		str	r3, [sp, #32]
 465 0012 0993     		str	r3, [sp, #36]
 451:Src/main.c    **** 
 466              		.loc 1 451 3 is_stmt 1 view .LVU103
 451:Src/main.c    **** 
 467              		.loc 1 451 22 is_stmt 0 view .LVU104
 468 0014 0093     		str	r3, [sp]
 469 0016 0193     		str	r3, [sp, #4]
 470 0018 0293     		str	r3, [sp, #8]
 471 001a 0393     		str	r3, [sp, #12]
 472 001c 0493     		str	r3, [sp, #16]
 473 001e 0593     		str	r3, [sp, #20]
 474 0020 0693     		str	r3, [sp, #24]
 456:Src/main.c    ****   htim2.Init.Prescaler = 0;
 475              		.loc 1 456 3 is_stmt 1 view .LVU105
 456:Src/main.c    ****   htim2.Init.Prescaler = 0;
 476              		.loc 1 456 18 is_stmt 0 view .LVU106
 477 0022 3348     		ldr	r0, .L43
 478 0024 4FF08042 		mov	r2, #1073741824
 479 0028 0260     		str	r2, [r0]
 457:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 480              		.loc 1 457 3 is_stmt 1 view .LVU107
 457:Src/main.c    ****   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
 481              		.loc 1 457 24 is_stmt 0 view .LVU108
 482 002a 4360     		str	r3, [r0, #4]
 458:Src/main.c    ****   htim2.Init.Period = 4095;
 483              		.loc 1 458 3 is_stmt 1 view .LVU109
 458:Src/main.c    ****   htim2.Init.Period = 4095;
 484              		.loc 1 458 26 is_stmt 0 view .LVU110
 485 002c 8360     		str	r3, [r0, #8]
 459:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 486              		.loc 1 459 3 is_stmt 1 view .LVU111
 459:Src/main.c    ****   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
ARM GAS  /tmp/ccaYtTQ0.s 			page 26


 487              		.loc 1 459 21 is_stmt 0 view .LVU112
 488 002e 40F6FF72 		movw	r2, #4095
 489 0032 C260     		str	r2, [r0, #12]
 460:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 490              		.loc 1 460 3 is_stmt 1 view .LVU113
 460:Src/main.c    ****   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 491              		.loc 1 460 28 is_stmt 0 view .LVU114
 492 0034 0361     		str	r3, [r0, #16]
 461:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 493              		.loc 1 461 3 is_stmt 1 view .LVU115
 461:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
 494              		.loc 1 461 32 is_stmt 0 view .LVU116
 495 0036 8361     		str	r3, [r0, #24]
 462:Src/main.c    ****   {
 496              		.loc 1 462 3 is_stmt 1 view .LVU117
 462:Src/main.c    ****   {
 497              		.loc 1 462 7 is_stmt 0 view .LVU118
 498 0038 FFF7FEFF 		bl	HAL_TIM_Base_Init
 499              	.LVL13:
 462:Src/main.c    ****   {
 500              		.loc 1 462 6 discriminator 1 view .LVU119
 501 003c 0028     		cmp	r0, #0
 502 003e 46D1     		bne	.L35
 466:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 503              		.loc 1 466 3 is_stmt 1 view .LVU120
 466:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
 504              		.loc 1 466 34 is_stmt 0 view .LVU121
 505 0040 4FF48053 		mov	r3, #4096
 506 0044 0A93     		str	r3, [sp, #40]
 467:Src/main.c    ****   {
 507              		.loc 1 467 3 is_stmt 1 view .LVU122
 467:Src/main.c    ****   {
 508              		.loc 1 467 7 is_stmt 0 view .LVU123
 509 0046 0AA9     		add	r1, sp, #40
 510 0048 2948     		ldr	r0, .L43
 511 004a FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
 512              	.LVL14:
 467:Src/main.c    ****   {
 513              		.loc 1 467 6 discriminator 1 view .LVU124
 514 004e 0028     		cmp	r0, #0
 515 0050 3FD1     		bne	.L36
 471:Src/main.c    ****   {
 516              		.loc 1 471 3 is_stmt 1 view .LVU125
 471:Src/main.c    ****   {
 517              		.loc 1 471 7 is_stmt 0 view .LVU126
 518 0052 2748     		ldr	r0, .L43
 519 0054 FFF7FEFF 		bl	HAL_TIM_PWM_Init
 520              	.LVL15:
 471:Src/main.c    ****   {
 521              		.loc 1 471 6 discriminator 1 view .LVU127
 522 0058 0028     		cmp	r0, #0
 523 005a 3CD1     		bne	.L37
 475:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 524              		.loc 1 475 3 is_stmt 1 view .LVU128
 475:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 525              		.loc 1 475 37 is_stmt 0 view .LVU129
 526 005c 2023     		movs	r3, #32
ARM GAS  /tmp/ccaYtTQ0.s 			page 27


 527 005e 0793     		str	r3, [sp, #28]
 476:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 528              		.loc 1 476 3 is_stmt 1 view .LVU130
 476:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
 529              		.loc 1 476 33 is_stmt 0 view .LVU131
 530 0060 0023     		movs	r3, #0
 531 0062 0993     		str	r3, [sp, #36]
 477:Src/main.c    ****   {
 532              		.loc 1 477 3 is_stmt 1 view .LVU132
 477:Src/main.c    ****   {
 533              		.loc 1 477 7 is_stmt 0 view .LVU133
 534 0064 07A9     		add	r1, sp, #28
 535 0066 2248     		ldr	r0, .L43
 536 0068 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 537              	.LVL16:
 477:Src/main.c    ****   {
 538              		.loc 1 477 6 discriminator 1 view .LVU134
 539 006c 0028     		cmp	r0, #0
 540 006e 34D1     		bne	.L38
 481:Src/main.c    ****   sConfigOC.Pulse = 500;
 541              		.loc 1 481 3 is_stmt 1 view .LVU135
 481:Src/main.c    ****   sConfigOC.Pulse = 500;
 542              		.loc 1 481 20 is_stmt 0 view .LVU136
 543 0070 6023     		movs	r3, #96
 544 0072 0093     		str	r3, [sp]
 482:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 545              		.loc 1 482 3 is_stmt 1 view .LVU137
 482:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 546              		.loc 1 482 19 is_stmt 0 view .LVU138
 547 0074 4FF4FA73 		mov	r3, #500
 548 0078 0193     		str	r3, [sp, #4]
 483:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
 549              		.loc 1 483 3 is_stmt 1 view .LVU139
 483:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
 550              		.loc 1 483 24 is_stmt 0 view .LVU140
 551 007a 0022     		movs	r2, #0
 552 007c 0292     		str	r2, [sp, #8]
 484:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 553              		.loc 1 484 3 is_stmt 1 view .LVU141
 484:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 554              		.loc 1 484 24 is_stmt 0 view .LVU142
 555 007e 0423     		movs	r3, #4
 556 0080 0493     		str	r3, [sp, #16]
 485:Src/main.c    ****   {
 557              		.loc 1 485 3 is_stmt 1 view .LVU143
 485:Src/main.c    ****   {
 558              		.loc 1 485 7 is_stmt 0 view .LVU144
 559 0082 6946     		mov	r1, sp
 560 0084 1A48     		ldr	r0, .L43
 561 0086 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 562              	.LVL17:
 485:Src/main.c    ****   {
 563              		.loc 1 485 6 discriminator 1 view .LVU145
 564 008a 40BB     		cbnz	r0, .L39
 489:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
 565              		.loc 1 489 3 is_stmt 1 view .LVU146
 489:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
ARM GAS  /tmp/ccaYtTQ0.s 			page 28


 566              		.loc 1 489 19 is_stmt 0 view .LVU147
 567 008c 4FF47A73 		mov	r3, #1000
 568 0090 0193     		str	r3, [sp, #4]
 490:Src/main.c    ****   {
 569              		.loc 1 490 3 is_stmt 1 view .LVU148
 490:Src/main.c    ****   {
 570              		.loc 1 490 7 is_stmt 0 view .LVU149
 571 0092 0422     		movs	r2, #4
 572 0094 6946     		mov	r1, sp
 573 0096 1648     		ldr	r0, .L43
 574 0098 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 575              	.LVL18:
 490:Src/main.c    ****   {
 576              		.loc 1 490 6 discriminator 1 view .LVU150
 577 009c 08BB     		cbnz	r0, .L40
 494:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 578              		.loc 1 494 3 is_stmt 1 view .LVU151
 494:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
 579              		.loc 1 494 19 is_stmt 0 view .LVU152
 580 009e 40F2DC53 		movw	r3, #1500
 581 00a2 0193     		str	r3, [sp, #4]
 495:Src/main.c    ****   {
 582              		.loc 1 495 3 is_stmt 1 view .LVU153
 495:Src/main.c    ****   {
 583              		.loc 1 495 7 is_stmt 0 view .LVU154
 584 00a4 0822     		movs	r2, #8
 585 00a6 6946     		mov	r1, sp
 586 00a8 1148     		ldr	r0, .L43
 587 00aa FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 588              	.LVL19:
 495:Src/main.c    ****   {
 589              		.loc 1 495 6 discriminator 1 view .LVU155
 590 00ae D0B9     		cbnz	r0, .L41
 499:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 591              		.loc 1 499 3 is_stmt 1 view .LVU156
 499:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
 592              		.loc 1 499 19 is_stmt 0 view .LVU157
 593 00b0 4FF4FA63 		mov	r3, #2000
 594 00b4 0193     		str	r3, [sp, #4]
 500:Src/main.c    ****   {
 595              		.loc 1 500 3 is_stmt 1 view .LVU158
 500:Src/main.c    ****   {
 596              		.loc 1 500 7 is_stmt 0 view .LVU159
 597 00b6 0C22     		movs	r2, #12
 598 00b8 6946     		mov	r1, sp
 599 00ba 0D48     		ldr	r0, .L43
 600 00bc FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
 601              	.LVL20:
 500:Src/main.c    ****   {
 602              		.loc 1 500 6 discriminator 1 view .LVU160
 603 00c0 98B9     		cbnz	r0, .L42
 507:Src/main.c    **** 
 604              		.loc 1 507 3 is_stmt 1 view .LVU161
 605 00c2 0B48     		ldr	r0, .L43
 606 00c4 FFF7FEFF 		bl	HAL_TIM_MspPostInit
 607              	.LVL21:
 509:Src/main.c    **** 
ARM GAS  /tmp/ccaYtTQ0.s 			page 29


 608              		.loc 1 509 1 is_stmt 0 view .LVU162
 609 00c8 0FB0     		add	sp, sp, #60
 610              	.LCFI8:
 611              		.cfi_remember_state
 612              		.cfi_def_cfa_offset 4
 613              		@ sp needed
 614 00ca 5DF804FB 		ldr	pc, [sp], #4
 615              	.L35:
 616              	.LCFI9:
 617              		.cfi_restore_state
 464:Src/main.c    ****   }
 618              		.loc 1 464 5 is_stmt 1 view .LVU163
 619 00ce FFF7FEFF 		bl	Error_Handler
 620              	.LVL22:
 621              	.L36:
 469:Src/main.c    ****   }
 622              		.loc 1 469 5 view .LVU164
 623 00d2 FFF7FEFF 		bl	Error_Handler
 624              	.LVL23:
 625              	.L37:
 473:Src/main.c    ****   }
 626              		.loc 1 473 5 view .LVU165
 627 00d6 FFF7FEFF 		bl	Error_Handler
 628              	.LVL24:
 629              	.L38:
 479:Src/main.c    ****   }
 630              		.loc 1 479 5 view .LVU166
 631 00da FFF7FEFF 		bl	Error_Handler
 632              	.LVL25:
 633              	.L39:
 487:Src/main.c    ****   }
 634              		.loc 1 487 5 view .LVU167
 635 00de FFF7FEFF 		bl	Error_Handler
 636              	.LVL26:
 637              	.L40:
 492:Src/main.c    ****   }
 638              		.loc 1 492 5 view .LVU168
 639 00e2 FFF7FEFF 		bl	Error_Handler
 640              	.LVL27:
 641              	.L41:
 497:Src/main.c    ****   }
 642              		.loc 1 497 5 view .LVU169
 643 00e6 FFF7FEFF 		bl	Error_Handler
 644              	.LVL28:
 645              	.L42:
 502:Src/main.c    ****   }
 646              		.loc 1 502 5 view .LVU170
 647 00ea FFF7FEFF 		bl	Error_Handler
 648              	.LVL29:
 649              	.L44:
 650 00ee 00BF     		.align	2
 651              	.L43:
 652 00f0 00000000 		.word	htim2
 653              		.cfi_endproc
 654              	.LFE334:
 656              		.section	.text.MX_I2C1_Init,"ax",%progbits
 657              		.align	1
ARM GAS  /tmp/ccaYtTQ0.s 			page 30


 658              		.syntax unified
 659              		.thumb
 660              		.thumb_func
 662              	MX_I2C1_Init:
 663              	.LFB333:
 395:Src/main.c    **** 
 664              		.loc 1 395 1 view -0
 665              		.cfi_startproc
 666              		@ args = 0, pretend = 0, frame = 0
 667              		@ frame_needed = 0, uses_anonymous_args = 0
 668 0000 08B5     		push	{r3, lr}
 669              	.LCFI10:
 670              		.cfi_def_cfa_offset 8
 671              		.cfi_offset 3, -8
 672              		.cfi_offset 14, -4
 404:Src/main.c    ****   hi2c1.Init.Timing = 0x40B282BD;
 673              		.loc 1 404 3 view .LVU172
 404:Src/main.c    ****   hi2c1.Init.Timing = 0x40B282BD;
 674              		.loc 1 404 18 is_stmt 0 view .LVU173
 675 0002 1148     		ldr	r0, .L53
 676 0004 114B     		ldr	r3, .L53+4
 677 0006 0360     		str	r3, [r0]
 405:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 678              		.loc 1 405 3 is_stmt 1 view .LVU174
 405:Src/main.c    ****   hi2c1.Init.OwnAddress1 = 0;
 679              		.loc 1 405 21 is_stmt 0 view .LVU175
 680 0008 114B     		ldr	r3, .L53+8
 681 000a 4360     		str	r3, [r0, #4]
 406:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 682              		.loc 1 406 3 is_stmt 1 view .LVU176
 406:Src/main.c    ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 683              		.loc 1 406 26 is_stmt 0 view .LVU177
 684 000c 0023     		movs	r3, #0
 685 000e 8360     		str	r3, [r0, #8]
 407:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 686              		.loc 1 407 3 is_stmt 1 view .LVU178
 407:Src/main.c    ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 687              		.loc 1 407 29 is_stmt 0 view .LVU179
 688 0010 0122     		movs	r2, #1
 689 0012 C260     		str	r2, [r0, #12]
 408:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 690              		.loc 1 408 3 is_stmt 1 view .LVU180
 408:Src/main.c    ****   hi2c1.Init.OwnAddress2 = 0;
 691              		.loc 1 408 30 is_stmt 0 view .LVU181
 692 0014 0361     		str	r3, [r0, #16]
 409:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 693              		.loc 1 409 3 is_stmt 1 view .LVU182
 409:Src/main.c    ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 694              		.loc 1 409 26 is_stmt 0 view .LVU183
 695 0016 4361     		str	r3, [r0, #20]
 410:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 696              		.loc 1 410 3 is_stmt 1 view .LVU184
 410:Src/main.c    ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 697              		.loc 1 410 31 is_stmt 0 view .LVU185
 698 0018 8361     		str	r3, [r0, #24]
 411:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 699              		.loc 1 411 3 is_stmt 1 view .LVU186
ARM GAS  /tmp/ccaYtTQ0.s 			page 31


 411:Src/main.c    ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 700              		.loc 1 411 30 is_stmt 0 view .LVU187
 701 001a C361     		str	r3, [r0, #28]
 412:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 702              		.loc 1 412 3 is_stmt 1 view .LVU188
 412:Src/main.c    ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 703              		.loc 1 412 28 is_stmt 0 view .LVU189
 704 001c 0362     		str	r3, [r0, #32]
 413:Src/main.c    ****   {
 705              		.loc 1 413 3 is_stmt 1 view .LVU190
 413:Src/main.c    ****   {
 706              		.loc 1 413 7 is_stmt 0 view .LVU191
 707 001e FFF7FEFF 		bl	HAL_I2C_Init
 708              	.LVL30:
 413:Src/main.c    ****   {
 709              		.loc 1 413 6 discriminator 1 view .LVU192
 710 0022 50B9     		cbnz	r0, .L50
 420:Src/main.c    ****   {
 711              		.loc 1 420 3 is_stmt 1 view .LVU193
 420:Src/main.c    ****   {
 712              		.loc 1 420 7 is_stmt 0 view .LVU194
 713 0024 0021     		movs	r1, #0
 714 0026 0848     		ldr	r0, .L53
 715 0028 FFF7FEFF 		bl	HAL_I2CEx_ConfigAnalogFilter
 716              	.LVL31:
 420:Src/main.c    ****   {
 717              		.loc 1 420 6 discriminator 1 view .LVU195
 718 002c 38B9     		cbnz	r0, .L51
 427:Src/main.c    ****   {
 719              		.loc 1 427 3 is_stmt 1 view .LVU196
 427:Src/main.c    ****   {
 720              		.loc 1 427 7 is_stmt 0 view .LVU197
 721 002e 0021     		movs	r1, #0
 722 0030 0548     		ldr	r0, .L53
 723 0032 FFF7FEFF 		bl	HAL_I2CEx_ConfigDigitalFilter
 724              	.LVL32:
 427:Src/main.c    ****   {
 725              		.loc 1 427 6 discriminator 1 view .LVU198
 726 0036 20B9     		cbnz	r0, .L52
 435:Src/main.c    **** 
 727              		.loc 1 435 1 view .LVU199
 728 0038 08BD     		pop	{r3, pc}
 729              	.L50:
 415:Src/main.c    ****   }
 730              		.loc 1 415 5 is_stmt 1 view .LVU200
 731 003a FFF7FEFF 		bl	Error_Handler
 732              	.LVL33:
 733              	.L51:
 422:Src/main.c    ****   }
 734              		.loc 1 422 5 view .LVU201
 735 003e FFF7FEFF 		bl	Error_Handler
 736              	.LVL34:
 737              	.L52:
 429:Src/main.c    ****   }
 738              		.loc 1 429 5 view .LVU202
 739 0042 FFF7FEFF 		bl	Error_Handler
 740              	.LVL35:
ARM GAS  /tmp/ccaYtTQ0.s 			page 32


 741              	.L54:
 742 0046 00BF     		.align	2
 743              	.L53:
 744 0048 00000000 		.word	hi2c1
 745 004c 00540040 		.word	1073763328
 746 0050 BD82B240 		.word	1085440701
 747              		.cfi_endproc
 748              	.LFE333:
 750              		.section	.text.MX_TIM3_Init,"ax",%progbits
 751              		.align	1
 752              		.syntax unified
 753              		.thumb
 754              		.thumb_func
 756              	MX_TIM3_Init:
 757              	.LFB335:
 517:Src/main.c    **** 
 758              		.loc 1 517 1 view -0
 759              		.cfi_startproc
 760              		@ args = 0, pretend = 0, frame = 32
 761              		@ frame_needed = 0, uses_anonymous_args = 0
 762 0000 00B5     		push	{lr}
 763              	.LCFI11:
 764              		.cfi_def_cfa_offset 4
 765              		.cfi_offset 14, -4
 766 0002 89B0     		sub	sp, sp, #36
 767              	.LCFI12:
 768              		.cfi_def_cfa_offset 40
 523:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 769              		.loc 1 523 3 view .LVU204
 523:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 770              		.loc 1 523 26 is_stmt 0 view .LVU205
 771 0004 0023     		movs	r3, #0
 772 0006 0493     		str	r3, [sp, #16]
 773 0008 0593     		str	r3, [sp, #20]
 774 000a 0693     		str	r3, [sp, #24]
 775 000c 0793     		str	r3, [sp, #28]
 524:Src/main.c    **** 
 776              		.loc 1 524 3 is_stmt 1 view .LVU206
 524:Src/main.c    **** 
 777              		.loc 1 524 27 is_stmt 0 view .LVU207
 778 000e 0193     		str	r3, [sp, #4]
 779 0010 0293     		str	r3, [sp, #8]
 780 0012 0393     		str	r3, [sp, #12]
 529:Src/main.c    ****   htim3.Init.Prescaler = 41471;
 781              		.loc 1 529 3 is_stmt 1 view .LVU208
 529:Src/main.c    ****   htim3.Init.Prescaler = 41471;
 782              		.loc 1 529 18 is_stmt 0 view .LVU209
 783 0014 1348     		ldr	r0, .L63
 784 0016 144A     		ldr	r2, .L63+4
 785 0018 0260     		str	r2, [r0]
 530:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 786              		.loc 1 530 3 is_stmt 1 view .LVU210
 530:Src/main.c    ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 787              		.loc 1 530 24 is_stmt 0 view .LVU211
 788 001a 4AF2FF12 		movw	r2, #41471
 789 001e 4260     		str	r2, [r0, #4]
 531:Src/main.c    ****   htim3.Init.Period = 399;
ARM GAS  /tmp/ccaYtTQ0.s 			page 33


 790              		.loc 1 531 3 is_stmt 1 view .LVU212
 531:Src/main.c    ****   htim3.Init.Period = 399;
 791              		.loc 1 531 26 is_stmt 0 view .LVU213
 792 0020 8360     		str	r3, [r0, #8]
 532:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 793              		.loc 1 532 3 is_stmt 1 view .LVU214
 532:Src/main.c    ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 794              		.loc 1 532 21 is_stmt 0 view .LVU215
 795 0022 40F28F12 		movw	r2, #399
 796 0026 C260     		str	r2, [r0, #12]
 533:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 797              		.loc 1 533 3 is_stmt 1 view .LVU216
 533:Src/main.c    ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 798              		.loc 1 533 28 is_stmt 0 view .LVU217
 799 0028 0361     		str	r3, [r0, #16]
 534:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 800              		.loc 1 534 3 is_stmt 1 view .LVU218
 534:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
 801              		.loc 1 534 32 is_stmt 0 view .LVU219
 802 002a 8361     		str	r3, [r0, #24]
 535:Src/main.c    ****   {
 803              		.loc 1 535 3 is_stmt 1 view .LVU220
 535:Src/main.c    ****   {
 804              		.loc 1 535 7 is_stmt 0 view .LVU221
 805 002c FFF7FEFF 		bl	HAL_TIM_Base_Init
 806              	.LVL36:
 535:Src/main.c    ****   {
 807              		.loc 1 535 6 discriminator 1 view .LVU222
 808 0030 90B9     		cbnz	r0, .L60
 539:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 809              		.loc 1 539 3 is_stmt 1 view .LVU223
 539:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
 810              		.loc 1 539 34 is_stmt 0 view .LVU224
 811 0032 4FF48053 		mov	r3, #4096
 812 0036 0493     		str	r3, [sp, #16]
 540:Src/main.c    ****   {
 813              		.loc 1 540 3 is_stmt 1 view .LVU225
 540:Src/main.c    ****   {
 814              		.loc 1 540 7 is_stmt 0 view .LVU226
 815 0038 04A9     		add	r1, sp, #16
 816 003a 0A48     		ldr	r0, .L63
 817 003c FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
 818              	.LVL37:
 540:Src/main.c    ****   {
 819              		.loc 1 540 6 discriminator 1 view .LVU227
 820 0040 60B9     		cbnz	r0, .L61
 544:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 821              		.loc 1 544 3 is_stmt 1 view .LVU228
 544:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 822              		.loc 1 544 37 is_stmt 0 view .LVU229
 823 0042 0023     		movs	r3, #0
 824 0044 0193     		str	r3, [sp, #4]
 545:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 825              		.loc 1 545 3 is_stmt 1 view .LVU230
 545:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 826              		.loc 1 545 33 is_stmt 0 view .LVU231
 827 0046 0393     		str	r3, [sp, #12]
ARM GAS  /tmp/ccaYtTQ0.s 			page 34


 546:Src/main.c    ****   {
 828              		.loc 1 546 3 is_stmt 1 view .LVU232
 546:Src/main.c    ****   {
 829              		.loc 1 546 7 is_stmt 0 view .LVU233
 830 0048 01A9     		add	r1, sp, #4
 831 004a 0648     		ldr	r0, .L63
 832 004c FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 833              	.LVL38:
 546:Src/main.c    ****   {
 834              		.loc 1 546 6 discriminator 1 view .LVU234
 835 0050 30B9     		cbnz	r0, .L62
 554:Src/main.c    **** 
 836              		.loc 1 554 1 view .LVU235
 837 0052 09B0     		add	sp, sp, #36
 838              	.LCFI13:
 839              		.cfi_remember_state
 840              		.cfi_def_cfa_offset 4
 841              		@ sp needed
 842 0054 5DF804FB 		ldr	pc, [sp], #4
 843              	.L60:
 844              	.LCFI14:
 845              		.cfi_restore_state
 537:Src/main.c    ****   }
 846              		.loc 1 537 5 is_stmt 1 view .LVU236
 847 0058 FFF7FEFF 		bl	Error_Handler
 848              	.LVL39:
 849              	.L61:
 542:Src/main.c    ****   }
 850              		.loc 1 542 5 view .LVU237
 851 005c FFF7FEFF 		bl	Error_Handler
 852              	.LVL40:
 853              	.L62:
 548:Src/main.c    ****   }
 854              		.loc 1 548 5 view .LVU238
 855 0060 FFF7FEFF 		bl	Error_Handler
 856              	.LVL41:
 857              	.L64:
 858              		.align	2
 859              	.L63:
 860 0064 00000000 		.word	htim3
 861 0068 00040040 		.word	1073742848
 862              		.cfi_endproc
 863              	.LFE335:
 865              		.section	.text.MX_ADC1_Init,"ax",%progbits
 866              		.align	1
 867              		.syntax unified
 868              		.thumb
 869              		.thumb_func
 871              	MX_ADC1_Init:
 872              	.LFB331:
 226:Src/main.c    **** 
 873              		.loc 1 226 1 view -0
 874              		.cfi_startproc
 875              		@ args = 0, pretend = 0, frame = 72
 876              		@ frame_needed = 0, uses_anonymous_args = 0
 877 0000 10B5     		push	{r4, lr}
 878              	.LCFI15:
ARM GAS  /tmp/ccaYtTQ0.s 			page 35


 879              		.cfi_def_cfa_offset 8
 880              		.cfi_offset 4, -8
 881              		.cfi_offset 14, -4
 882 0002 92B0     		sub	sp, sp, #72
 883              	.LCFI16:
 884              		.cfi_def_cfa_offset 80
 232:Src/main.c    ****   ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
 885              		.loc 1 232 3 view .LVU240
 232:Src/main.c    ****   ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0};
 886              		.loc 1 232 24 is_stmt 0 view .LVU241
 887 0004 0024     		movs	r4, #0
 888 0006 0F94     		str	r4, [sp, #60]
 889 0008 1094     		str	r4, [sp, #64]
 890 000a 1194     		str	r4, [sp, #68]
 233:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 891              		.loc 1 233 3 is_stmt 1 view .LVU242
 233:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
 892              		.loc 1 233 28 is_stmt 0 view .LVU243
 893 000c 0894     		str	r4, [sp, #32]
 894 000e 0994     		str	r4, [sp, #36]
 895 0010 0A94     		str	r4, [sp, #40]
 896 0012 0B94     		str	r4, [sp, #44]
 897 0014 0C94     		str	r4, [sp, #48]
 898 0016 0D94     		str	r4, [sp, #52]
 899 0018 0E94     		str	r4, [sp, #56]
 234:Src/main.c    **** 
 900              		.loc 1 234 3 is_stmt 1 view .LVU244
 234:Src/main.c    **** 
 901              		.loc 1 234 26 is_stmt 0 view .LVU245
 902 001a 2022     		movs	r2, #32
 903 001c 2146     		mov	r1, r4
 904 001e 6846     		mov	r0, sp
 905 0020 FFF7FEFF 		bl	memset
 906              	.LVL42:
 242:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 907              		.loc 1 242 3 is_stmt 1 view .LVU246
 242:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 908              		.loc 1 242 18 is_stmt 0 view .LVU247
 909 0024 2C48     		ldr	r0, .L75
 910 0026 4FF0A043 		mov	r3, #1342177280
 911 002a 0360     		str	r3, [r0]
 243:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 912              		.loc 1 243 3 is_stmt 1 view .LVU248
 243:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 913              		.loc 1 243 29 is_stmt 0 view .LVU249
 914 002c 4FF44033 		mov	r3, #196608
 915 0030 4360     		str	r3, [r0, #4]
 244:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 916              		.loc 1 244 3 is_stmt 1 view .LVU250
 244:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 917              		.loc 1 244 25 is_stmt 0 view .LVU251
 918 0032 8460     		str	r4, [r0, #8]
 245:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 919              		.loc 1 245 3 is_stmt 1 view .LVU252
 245:Src/main.c    ****   hadc1.Init.GainCompensation = 0;
 920              		.loc 1 245 24 is_stmt 0 view .LVU253
 921 0034 C460     		str	r4, [r0, #12]
ARM GAS  /tmp/ccaYtTQ0.s 			page 36


 246:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 922              		.loc 1 246 3 is_stmt 1 view .LVU254
 246:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 923              		.loc 1 246 31 is_stmt 0 view .LVU255
 924 0036 0461     		str	r4, [r0, #16]
 247:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 925              		.loc 1 247 3 is_stmt 1 view .LVU256
 247:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 926              		.loc 1 247 27 is_stmt 0 view .LVU257
 927 0038 4461     		str	r4, [r0, #20]
 248:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 928              		.loc 1 248 3 is_stmt 1 view .LVU258
 248:Src/main.c    ****   hadc1.Init.LowPowerAutoWait = DISABLE;
 929              		.loc 1 248 27 is_stmt 0 view .LVU259
 930 003a 0423     		movs	r3, #4
 931 003c 8361     		str	r3, [r0, #24]
 249:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 932              		.loc 1 249 3 is_stmt 1 view .LVU260
 249:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
 933              		.loc 1 249 31 is_stmt 0 view .LVU261
 934 003e 0477     		strb	r4, [r0, #28]
 250:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 935              		.loc 1 250 3 is_stmt 1 view .LVU262
 250:Src/main.c    ****   hadc1.Init.NbrOfConversion = 1;
 936              		.loc 1 250 33 is_stmt 0 view .LVU263
 937 0040 4477     		strb	r4, [r0, #29]
 251:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 938              		.loc 1 251 3 is_stmt 1 view .LVU264
 251:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
 939              		.loc 1 251 30 is_stmt 0 view .LVU265
 940 0042 0123     		movs	r3, #1
 941 0044 0362     		str	r3, [r0, #32]
 252:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
 942              		.loc 1 252 3 is_stmt 1 view .LVU266
 252:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
 943              		.loc 1 252 36 is_stmt 0 view .LVU267
 944 0046 80F82440 		strb	r4, [r0, #36]
 253:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
 945              		.loc 1 253 3 is_stmt 1 view .LVU268
 253:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
 946              		.loc 1 253 31 is_stmt 0 view .LVU269
 947 004a 4FF4AC63 		mov	r3, #1376
 948 004e C362     		str	r3, [r0, #44]
 254:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 949              		.loc 1 254 3 is_stmt 1 view .LVU270
 254:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
 950              		.loc 1 254 35 is_stmt 0 view .LVU271
 951 0050 4FF48063 		mov	r3, #1024
 952 0054 0363     		str	r3, [r0, #48]
 255:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 953              		.loc 1 255 3 is_stmt 1 view .LVU272
 255:Src/main.c    ****   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 954              		.loc 1 255 36 is_stmt 0 view .LVU273
 955 0056 80F83840 		strb	r4, [r0, #56]
 256:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
 956              		.loc 1 256 3 is_stmt 1 view .LVU274
 256:Src/main.c    ****   hadc1.Init.OversamplingMode = DISABLE;
ARM GAS  /tmp/ccaYtTQ0.s 			page 37


 957              		.loc 1 256 22 is_stmt 0 view .LVU275
 958 005a C463     		str	r4, [r0, #60]
 257:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 959              		.loc 1 257 3 is_stmt 1 view .LVU276
 257:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
 960              		.loc 1 257 31 is_stmt 0 view .LVU277
 961 005c 80F84040 		strb	r4, [r0, #64]
 258:Src/main.c    ****   {
 962              		.loc 1 258 3 is_stmt 1 view .LVU278
 258:Src/main.c    ****   {
 963              		.loc 1 258 7 is_stmt 0 view .LVU279
 964 0060 FFF7FEFF 		bl	HAL_ADC_Init
 965              	.LVL43:
 258:Src/main.c    ****   {
 966              		.loc 1 258 6 discriminator 1 view .LVU280
 967 0064 0028     		cmp	r0, #0
 968 0066 2FD1     		bne	.L71
 265:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 969              		.loc 1 265 3 is_stmt 1 view .LVU281
 265:Src/main.c    ****   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
 970              		.loc 1 265 18 is_stmt 0 view .LVU282
 971 0068 0023     		movs	r3, #0
 972 006a 0F93     		str	r3, [sp, #60]
 266:Src/main.c    ****   {
 973              		.loc 1 266 3 is_stmt 1 view .LVU283
 266:Src/main.c    ****   {
 974              		.loc 1 266 7 is_stmt 0 view .LVU284
 975 006c 0FA9     		add	r1, sp, #60
 976 006e 1A48     		ldr	r0, .L75
 977 0070 FFF7FEFF 		bl	HAL_ADCEx_MultiModeConfigChannel
 978              	.LVL44:
 266:Src/main.c    ****   {
 979              		.loc 1 266 6 discriminator 1 view .LVU285
 980 0074 50BB     		cbnz	r0, .L72
 273:Src/main.c    ****   AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
 981              		.loc 1 273 3 is_stmt 1 view .LVU286
 273:Src/main.c    ****   AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG;
 982              		.loc 1 273 34 is_stmt 0 view .LVU287
 983 0076 194B     		ldr	r3, .L75+4
 984 0078 0893     		str	r3, [sp, #32]
 274:Src/main.c    ****   AnalogWDGConfig.Channel = ADC_CHANNEL_15;
 985              		.loc 1 274 3 is_stmt 1 view .LVU288
 274:Src/main.c    ****   AnalogWDGConfig.Channel = ADC_CHANNEL_15;
 986              		.loc 1 274 32 is_stmt 0 view .LVU289
 987 007a 4FF44003 		mov	r3, #12582912
 988 007e 0993     		str	r3, [sp, #36]
 275:Src/main.c    ****   AnalogWDGConfig.ITMode = ENABLE;
 989              		.loc 1 275 3 is_stmt 1 view .LVU290
 275:Src/main.c    ****   AnalogWDGConfig.ITMode = ENABLE;
 990              		.loc 1 275 27 is_stmt 0 view .LVU291
 991 0080 174B     		ldr	r3, .L75+8
 992 0082 0A93     		str	r3, [sp, #40]
 276:Src/main.c    ****   AnalogWDGConfig.HighThreshold = 4048;
 993              		.loc 1 276 3 is_stmt 1 view .LVU292
 276:Src/main.c    ****   AnalogWDGConfig.HighThreshold = 4048;
 994              		.loc 1 276 26 is_stmt 0 view .LVU293
 995 0084 0123     		movs	r3, #1
ARM GAS  /tmp/ccaYtTQ0.s 			page 38


 996 0086 8DF82C30 		strb	r3, [sp, #44]
 277:Src/main.c    ****   AnalogWDGConfig.LowThreshold = 48;
 997              		.loc 1 277 3 is_stmt 1 view .LVU294
 277:Src/main.c    ****   AnalogWDGConfig.LowThreshold = 48;
 998              		.loc 1 277 33 is_stmt 0 view .LVU295
 999 008a 4FF47D63 		mov	r3, #4048
 1000 008e 0C93     		str	r3, [sp, #48]
 278:Src/main.c    ****   AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_NONE;
 1001              		.loc 1 278 3 is_stmt 1 view .LVU296
 278:Src/main.c    ****   AnalogWDGConfig.FilteringConfig = ADC_AWD_FILTERING_NONE;
 1002              		.loc 1 278 32 is_stmt 0 view .LVU297
 1003 0090 3023     		movs	r3, #48
 1004 0092 0D93     		str	r3, [sp, #52]
 279:Src/main.c    ****   if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
 1005              		.loc 1 279 3 is_stmt 1 view .LVU298
 279:Src/main.c    ****   if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK)
 1006              		.loc 1 279 35 is_stmt 0 view .LVU299
 1007 0094 0023     		movs	r3, #0
 1008 0096 0E93     		str	r3, [sp, #56]
 280:Src/main.c    ****   {
 1009              		.loc 1 280 3 is_stmt 1 view .LVU300
 280:Src/main.c    ****   {
 1010              		.loc 1 280 7 is_stmt 0 view .LVU301
 1011 0098 08A9     		add	r1, sp, #32
 1012 009a 0F48     		ldr	r0, .L75
 1013 009c FFF7FEFF 		bl	HAL_ADC_AnalogWDGConfig
 1014              	.LVL45:
 280:Src/main.c    ****   {
 1015              		.loc 1 280 6 discriminator 1 view .LVU302
 1016 00a0 B0B9     		cbnz	r0, .L73
 287:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 1017              		.loc 1 287 3 is_stmt 1 view .LVU303
 287:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 1018              		.loc 1 287 19 is_stmt 0 view .LVU304
 1019 00a2 0F4B     		ldr	r3, .L75+8
 1020 00a4 0093     		str	r3, [sp]
 288:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_92CYCLES_5;
 1021              		.loc 1 288 3 is_stmt 1 view .LVU305
 288:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_92CYCLES_5;
 1022              		.loc 1 288 16 is_stmt 0 view .LVU306
 1023 00a6 0623     		movs	r3, #6
 1024 00a8 0193     		str	r3, [sp, #4]
 289:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 1025              		.loc 1 289 3 is_stmt 1 view .LVU307
 289:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 1026              		.loc 1 289 24 is_stmt 0 view .LVU308
 1027 00aa 0523     		movs	r3, #5
 1028 00ac 0293     		str	r3, [sp, #8]
 290:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 1029              		.loc 1 290 3 is_stmt 1 view .LVU309
 290:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 1030              		.loc 1 290 22 is_stmt 0 view .LVU310
 1031 00ae 7F23     		movs	r3, #127
 1032 00b0 0393     		str	r3, [sp, #12]
 291:Src/main.c    ****   sConfig.Offset = 0;
 1033              		.loc 1 291 3 is_stmt 1 view .LVU311
 291:Src/main.c    ****   sConfig.Offset = 0;
ARM GAS  /tmp/ccaYtTQ0.s 			page 39


 1034              		.loc 1 291 24 is_stmt 0 view .LVU312
 1035 00b2 0423     		movs	r3, #4
 1036 00b4 0493     		str	r3, [sp, #16]
 292:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 1037              		.loc 1 292 3 is_stmt 1 view .LVU313
 292:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 1038              		.loc 1 292 18 is_stmt 0 view .LVU314
 1039 00b6 0023     		movs	r3, #0
 1040 00b8 0593     		str	r3, [sp, #20]
 293:Src/main.c    ****   {
 1041              		.loc 1 293 3 is_stmt 1 view .LVU315
 293:Src/main.c    ****   {
 1042              		.loc 1 293 7 is_stmt 0 view .LVU316
 1043 00ba 6946     		mov	r1, sp
 1044 00bc 0648     		ldr	r0, .L75
 1045 00be FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 1046              	.LVL46:
 293:Src/main.c    ****   {
 1047              		.loc 1 293 6 discriminator 1 view .LVU317
 1048 00c2 38B9     		cbnz	r0, .L74
 301:Src/main.c    **** 
 1049              		.loc 1 301 1 view .LVU318
 1050 00c4 12B0     		add	sp, sp, #72
 1051              	.LCFI17:
 1052              		.cfi_remember_state
 1053              		.cfi_def_cfa_offset 8
 1054              		@ sp needed
 1055 00c6 10BD     		pop	{r4, pc}
 1056              	.L71:
 1057              	.LCFI18:
 1058              		.cfi_restore_state
 260:Src/main.c    ****   }
 1059              		.loc 1 260 5 is_stmt 1 view .LVU319
 1060 00c8 FFF7FEFF 		bl	Error_Handler
 1061              	.LVL47:
 1062              	.L72:
 268:Src/main.c    ****   }
 1063              		.loc 1 268 5 view .LVU320
 1064 00cc FFF7FEFF 		bl	Error_Handler
 1065              	.LVL48:
 1066              	.L73:
 282:Src/main.c    ****   }
 1067              		.loc 1 282 5 view .LVU321
 1068 00d0 FFF7FEFF 		bl	Error_Handler
 1069              	.LVL49:
 1070              	.L74:
 295:Src/main.c    ****   }
 1071              		.loc 1 295 5 view .LVU322
 1072 00d4 FFF7FEFF 		bl	Error_Handler
 1073              	.LVL50:
 1074              	.L76:
 1075              		.align	2
 1076              	.L75:
 1077 00d8 00000000 		.word	hadc1
 1078 00dc 0000C07D 		.word	2109734912
 1079 00e0 0080F03E 		.word	1055948800
 1080              		.cfi_endproc
ARM GAS  /tmp/ccaYtTQ0.s 			page 40


 1081              	.LFE331:
 1083              		.section	.text.MX_ADC2_Init,"ax",%progbits
 1084              		.align	1
 1085              		.syntax unified
 1086              		.thumb
 1087              		.thumb_func
 1089              	MX_ADC2_Init:
 1090              	.LFB332:
 309:Src/main.c    **** 
 1091              		.loc 1 309 1 view -0
 1092              		.cfi_startproc
 1093              		@ args = 0, pretend = 0, frame = 32
 1094              		@ frame_needed = 0, uses_anonymous_args = 0
 1095 0000 00B5     		push	{lr}
 1096              	.LCFI19:
 1097              		.cfi_def_cfa_offset 4
 1098              		.cfi_offset 14, -4
 1099 0002 89B0     		sub	sp, sp, #36
 1100              	.LCFI20:
 1101              		.cfi_def_cfa_offset 40
 315:Src/main.c    **** 
 1102              		.loc 1 315 3 view .LVU324
 315:Src/main.c    **** 
 1103              		.loc 1 315 26 is_stmt 0 view .LVU325
 1104 0004 2022     		movs	r2, #32
 1105 0006 0021     		movs	r1, #0
 1106 0008 6846     		mov	r0, sp
 1107 000a FFF7FEFF 		bl	memset
 1108              	.LVL51:
 323:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 1109              		.loc 1 323 3 is_stmt 1 view .LVU326
 323:Src/main.c    ****   hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 1110              		.loc 1 323 18 is_stmt 0 view .LVU327
 1111 000e 2B48     		ldr	r0, .L89
 1112 0010 2B4B     		ldr	r3, .L89+4
 1113 0012 0360     		str	r3, [r0]
 324:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 1114              		.loc 1 324 3 is_stmt 1 view .LVU328
 324:Src/main.c    ****   hadc2.Init.Resolution = ADC_RESOLUTION_12B;
 1115              		.loc 1 324 29 is_stmt 0 view .LVU329
 1116 0014 4FF44033 		mov	r3, #196608
 1117 0018 4360     		str	r3, [r0, #4]
 325:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 1118              		.loc 1 325 3 is_stmt 1 view .LVU330
 325:Src/main.c    ****   hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 1119              		.loc 1 325 25 is_stmt 0 view .LVU331
 1120 001a 0023     		movs	r3, #0
 1121 001c 8360     		str	r3, [r0, #8]
 326:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 1122              		.loc 1 326 3 is_stmt 1 view .LVU332
 326:Src/main.c    ****   hadc2.Init.GainCompensation = 0;
 1123              		.loc 1 326 24 is_stmt 0 view .LVU333
 1124 001e C360     		str	r3, [r0, #12]
 327:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 1125              		.loc 1 327 3 is_stmt 1 view .LVU334
 327:Src/main.c    ****   hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
 1126              		.loc 1 327 31 is_stmt 0 view .LVU335
ARM GAS  /tmp/ccaYtTQ0.s 			page 41


 1127 0020 0361     		str	r3, [r0, #16]
 328:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 1128              		.loc 1 328 3 is_stmt 1 view .LVU336
 328:Src/main.c    ****   hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV;
 1129              		.loc 1 328 27 is_stmt 0 view .LVU337
 1130 0022 0122     		movs	r2, #1
 1131 0024 4261     		str	r2, [r0, #20]
 329:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 1132              		.loc 1 329 3 is_stmt 1 view .LVU338
 329:Src/main.c    ****   hadc2.Init.LowPowerAutoWait = DISABLE;
 1133              		.loc 1 329 27 is_stmt 0 view .LVU339
 1134 0026 0822     		movs	r2, #8
 1135 0028 8261     		str	r2, [r0, #24]
 330:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 1136              		.loc 1 330 3 is_stmt 1 view .LVU340
 330:Src/main.c    ****   hadc2.Init.ContinuousConvMode = DISABLE;
 1137              		.loc 1 330 31 is_stmt 0 view .LVU341
 1138 002a 0377     		strb	r3, [r0, #28]
 331:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 1139              		.loc 1 331 3 is_stmt 1 view .LVU342
 331:Src/main.c    ****   hadc2.Init.NbrOfConversion = 4;
 1140              		.loc 1 331 33 is_stmt 0 view .LVU343
 1141 002c 4377     		strb	r3, [r0, #29]
 332:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 1142              		.loc 1 332 3 is_stmt 1 view .LVU344
 332:Src/main.c    ****   hadc2.Init.DiscontinuousConvMode = DISABLE;
 1143              		.loc 1 332 30 is_stmt 0 view .LVU345
 1144 002e 0422     		movs	r2, #4
 1145 0030 0262     		str	r2, [r0, #32]
 333:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 1146              		.loc 1 333 3 is_stmt 1 view .LVU346
 333:Src/main.c    ****   hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 1147              		.loc 1 333 36 is_stmt 0 view .LVU347
 1148 0032 80F82430 		strb	r3, [r0, #36]
 334:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 1149              		.loc 1 334 3 is_stmt 1 view .LVU348
 334:Src/main.c    ****   hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 1150              		.loc 1 334 31 is_stmt 0 view .LVU349
 1151 0036 C362     		str	r3, [r0, #44]
 335:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 1152              		.loc 1 335 3 is_stmt 1 view .LVU350
 335:Src/main.c    ****   hadc2.Init.DMAContinuousRequests = DISABLE;
 1153              		.loc 1 335 35 is_stmt 0 view .LVU351
 1154 0038 0363     		str	r3, [r0, #48]
 336:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 1155              		.loc 1 336 3 is_stmt 1 view .LVU352
 336:Src/main.c    ****   hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
 1156              		.loc 1 336 36 is_stmt 0 view .LVU353
 1157 003a 80F83830 		strb	r3, [r0, #56]
 337:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 1158              		.loc 1 337 3 is_stmt 1 view .LVU354
 337:Src/main.c    ****   hadc2.Init.OversamplingMode = DISABLE;
 1159              		.loc 1 337 22 is_stmt 0 view .LVU355
 1160 003e C363     		str	r3, [r0, #60]
 338:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
 1161              		.loc 1 338 3 is_stmt 1 view .LVU356
 338:Src/main.c    ****   if (HAL_ADC_Init(&hadc2) != HAL_OK)
ARM GAS  /tmp/ccaYtTQ0.s 			page 42


 1162              		.loc 1 338 31 is_stmt 0 view .LVU357
 1163 0040 80F84030 		strb	r3, [r0, #64]
 339:Src/main.c    ****   {
 1164              		.loc 1 339 3 is_stmt 1 view .LVU358
 339:Src/main.c    ****   {
 1165              		.loc 1 339 7 is_stmt 0 view .LVU359
 1166 0044 FFF7FEFF 		bl	HAL_ADC_Init
 1167              	.LVL52:
 339:Src/main.c    ****   {
 1168              		.loc 1 339 6 discriminator 1 view .LVU360
 1169 0048 0028     		cmp	r0, #0
 1170 004a 2DD1     		bne	.L84
 346:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 1171              		.loc 1 346 3 is_stmt 1 view .LVU361
 346:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
 1172              		.loc 1 346 19 is_stmt 0 view .LVU362
 1173 004c 1D4B     		ldr	r3, .L89+8
 1174 004e 0093     		str	r3, [sp]
 347:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
 1175              		.loc 1 347 3 is_stmt 1 view .LVU363
 347:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
 1176              		.loc 1 347 16 is_stmt 0 view .LVU364
 1177 0050 0623     		movs	r3, #6
 1178 0052 0193     		str	r3, [sp, #4]
 348:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 1179              		.loc 1 348 3 is_stmt 1 view .LVU365
 348:Src/main.c    ****   sConfig.SingleDiff = ADC_SINGLE_ENDED;
 1180              		.loc 1 348 24 is_stmt 0 view .LVU366
 1181 0054 0293     		str	r3, [sp, #8]
 349:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 1182              		.loc 1 349 3 is_stmt 1 view .LVU367
 349:Src/main.c    ****   sConfig.OffsetNumber = ADC_OFFSET_NONE;
 1183              		.loc 1 349 22 is_stmt 0 view .LVU368
 1184 0056 7F23     		movs	r3, #127
 1185 0058 0393     		str	r3, [sp, #12]
 350:Src/main.c    ****   sConfig.Offset = 0;
 1186              		.loc 1 350 3 is_stmt 1 view .LVU369
 350:Src/main.c    ****   sConfig.Offset = 0;
 1187              		.loc 1 350 24 is_stmt 0 view .LVU370
 1188 005a 0423     		movs	r3, #4
 1189 005c 0493     		str	r3, [sp, #16]
 351:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1190              		.loc 1 351 3 is_stmt 1 view .LVU371
 351:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1191              		.loc 1 351 18 is_stmt 0 view .LVU372
 1192 005e 0023     		movs	r3, #0
 1193 0060 0593     		str	r3, [sp, #20]
 352:Src/main.c    ****   {
 1194              		.loc 1 352 3 is_stmt 1 view .LVU373
 352:Src/main.c    ****   {
 1195              		.loc 1 352 7 is_stmt 0 view .LVU374
 1196 0062 6946     		mov	r1, sp
 1197 0064 1548     		ldr	r0, .L89
 1198 0066 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 1199              	.LVL53:
 352:Src/main.c    ****   {
 1200              		.loc 1 352 6 discriminator 1 view .LVU375
ARM GAS  /tmp/ccaYtTQ0.s 			page 43


 1201 006a F8B9     		cbnz	r0, .L85
 359:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
 1202              		.loc 1 359 3 is_stmt 1 view .LVU376
 359:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
 1203              		.loc 1 359 19 is_stmt 0 view .LVU377
 1204 006c 164B     		ldr	r3, .L89+12
 1205 006e 0093     		str	r3, [sp]
 360:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1206              		.loc 1 360 3 is_stmt 1 view .LVU378
 360:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1207              		.loc 1 360 16 is_stmt 0 view .LVU379
 1208 0070 0C23     		movs	r3, #12
 1209 0072 0193     		str	r3, [sp, #4]
 361:Src/main.c    ****   {
 1210              		.loc 1 361 3 is_stmt 1 view .LVU380
 361:Src/main.c    ****   {
 1211              		.loc 1 361 7 is_stmt 0 view .LVU381
 1212 0074 6946     		mov	r1, sp
 1213 0076 1148     		ldr	r0, .L89
 1214 0078 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 1215              	.LVL54:
 361:Src/main.c    ****   {
 1216              		.loc 1 361 6 discriminator 1 view .LVU382
 1217 007c C0B9     		cbnz	r0, .L86
 368:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
 1218              		.loc 1 368 3 is_stmt 1 view .LVU383
 368:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
 1219              		.loc 1 368 19 is_stmt 0 view .LVU384
 1220 007e 134B     		ldr	r3, .L89+16
 1221 0080 0093     		str	r3, [sp]
 369:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1222              		.loc 1 369 3 is_stmt 1 view .LVU385
 369:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1223              		.loc 1 369 16 is_stmt 0 view .LVU386
 1224 0082 1223     		movs	r3, #18
 1225 0084 0193     		str	r3, [sp, #4]
 370:Src/main.c    ****   {
 1226              		.loc 1 370 3 is_stmt 1 view .LVU387
 370:Src/main.c    ****   {
 1227              		.loc 1 370 7 is_stmt 0 view .LVU388
 1228 0086 6946     		mov	r1, sp
 1229 0088 0C48     		ldr	r0, .L89
 1230 008a FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 1231              	.LVL55:
 370:Src/main.c    ****   {
 1232              		.loc 1 370 6 discriminator 1 view .LVU389
 1233 008e 88B9     		cbnz	r0, .L87
 377:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
 1234              		.loc 1 377 3 is_stmt 1 view .LVU390
 377:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
 1235              		.loc 1 377 19 is_stmt 0 view .LVU391
 1236 0090 0F4B     		ldr	r3, .L89+20
 1237 0092 0093     		str	r3, [sp]
 378:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1238              		.loc 1 378 3 is_stmt 1 view .LVU392
 378:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 1239              		.loc 1 378 16 is_stmt 0 view .LVU393
ARM GAS  /tmp/ccaYtTQ0.s 			page 44


 1240 0094 1823     		movs	r3, #24
 1241 0096 0193     		str	r3, [sp, #4]
 379:Src/main.c    ****   {
 1242              		.loc 1 379 3 is_stmt 1 view .LVU394
 379:Src/main.c    ****   {
 1243              		.loc 1 379 7 is_stmt 0 view .LVU395
 1244 0098 6946     		mov	r1, sp
 1245 009a 0848     		ldr	r0, .L89
 1246 009c FFF7FEFF 		bl	HAL_ADC_ConfigChannel
 1247              	.LVL56:
 379:Src/main.c    ****   {
 1248              		.loc 1 379 6 discriminator 1 view .LVU396
 1249 00a0 50B9     		cbnz	r0, .L88
 387:Src/main.c    **** 
 1250              		.loc 1 387 1 view .LVU397
 1251 00a2 09B0     		add	sp, sp, #36
 1252              	.LCFI21:
 1253              		.cfi_remember_state
 1254              		.cfi_def_cfa_offset 4
 1255              		@ sp needed
 1256 00a4 5DF804FB 		ldr	pc, [sp], #4
 1257              	.L84:
 1258              	.LCFI22:
 1259              		.cfi_restore_state
 341:Src/main.c    ****   }
 1260              		.loc 1 341 5 is_stmt 1 view .LVU398
 1261 00a8 FFF7FEFF 		bl	Error_Handler
 1262              	.LVL57:
 1263              	.L85:
 354:Src/main.c    ****   }
 1264              		.loc 1 354 5 view .LVU399
 1265 00ac FFF7FEFF 		bl	Error_Handler
 1266              	.LVL58:
 1267              	.L86:
 363:Src/main.c    ****   }
 1268              		.loc 1 363 5 view .LVU400
 1269 00b0 FFF7FEFF 		bl	Error_Handler
 1270              	.LVL59:
 1271              	.L87:
 372:Src/main.c    ****   }
 1272              		.loc 1 372 5 view .LVU401
 1273 00b4 FFF7FEFF 		bl	Error_Handler
 1274              	.LVL60:
 1275              	.L88:
 381:Src/main.c    ****   }
 1276              		.loc 1 381 5 view .LVU402
 1277 00b8 FFF7FEFF 		bl	Error_Handler
 1278              	.LVL61:
 1279              	.L90:
 1280              		.align	2
 1281              	.L89:
 1282 00bc 00000000 		.word	hadc2
 1283 00c0 00010050 		.word	1342177536
 1284 00c4 0800900C 		.word	210763784
 1285 00c8 1000C010 		.word	281018384
 1286 00cc 00209036 		.word	915415040
 1287 00d0 00005247 		.word	1196556288
ARM GAS  /tmp/ccaYtTQ0.s 			page 45


 1288              		.cfi_endproc
 1289              	.LFE332:
 1291              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
 1292              		.align	1
 1293              		.syntax unified
 1294              		.thumb
 1295              		.thumb_func
 1297              	MX_USART1_UART_Init:
 1298              	.LFB336:
 562:Src/main.c    **** 
 1299              		.loc 1 562 1 view -0
 1300              		.cfi_startproc
 1301              		@ args = 0, pretend = 0, frame = 0
 1302              		@ frame_needed = 0, uses_anonymous_args = 0
 1303 0000 08B5     		push	{r3, lr}
 1304              	.LCFI23:
 1305              		.cfi_def_cfa_offset 8
 1306              		.cfi_offset 3, -8
 1307              		.cfi_offset 14, -4
 571:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 1308              		.loc 1 571 3 view .LVU404
 571:Src/main.c    ****   huart1.Init.BaudRate = 115200;
 1309              		.loc 1 571 19 is_stmt 0 view .LVU405
 1310 0002 1548     		ldr	r0, .L101
 1311 0004 154B     		ldr	r3, .L101+4
 1312 0006 0360     		str	r3, [r0]
 572:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 1313              		.loc 1 572 3 is_stmt 1 view .LVU406
 572:Src/main.c    ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 1314              		.loc 1 572 24 is_stmt 0 view .LVU407
 1315 0008 4FF4E133 		mov	r3, #115200
 1316 000c 4360     		str	r3, [r0, #4]
 573:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 1317              		.loc 1 573 3 is_stmt 1 view .LVU408
 573:Src/main.c    ****   huart1.Init.StopBits = UART_STOPBITS_1;
 1318              		.loc 1 573 26 is_stmt 0 view .LVU409
 1319 000e 0023     		movs	r3, #0
 1320 0010 8360     		str	r3, [r0, #8]
 574:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 1321              		.loc 1 574 3 is_stmt 1 view .LVU410
 574:Src/main.c    ****   huart1.Init.Parity = UART_PARITY_NONE;
 1322              		.loc 1 574 24 is_stmt 0 view .LVU411
 1323 0012 C360     		str	r3, [r0, #12]
 575:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 1324              		.loc 1 575 3 is_stmt 1 view .LVU412
 575:Src/main.c    ****   huart1.Init.Mode = UART_MODE_TX_RX;
 1325              		.loc 1 575 22 is_stmt 0 view .LVU413
 1326 0014 0361     		str	r3, [r0, #16]
 576:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 1327              		.loc 1 576 3 is_stmt 1 view .LVU414
 576:Src/main.c    ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 1328              		.loc 1 576 20 is_stmt 0 view .LVU415
 1329 0016 0C22     		movs	r2, #12
 1330 0018 4261     		str	r2, [r0, #20]
 577:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 1331              		.loc 1 577 3 is_stmt 1 view .LVU416
 577:Src/main.c    ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
ARM GAS  /tmp/ccaYtTQ0.s 			page 46


 1332              		.loc 1 577 25 is_stmt 0 view .LVU417
 1333 001a 8361     		str	r3, [r0, #24]
 578:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 1334              		.loc 1 578 3 is_stmt 1 view .LVU418
 578:Src/main.c    ****   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 1335              		.loc 1 578 28 is_stmt 0 view .LVU419
 1336 001c C361     		str	r3, [r0, #28]
 579:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 1337              		.loc 1 579 3 is_stmt 1 view .LVU420
 579:Src/main.c    ****   huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 1338              		.loc 1 579 30 is_stmt 0 view .LVU421
 1339 001e 0362     		str	r3, [r0, #32]
 580:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 1340              		.loc 1 580 3 is_stmt 1 view .LVU422
 580:Src/main.c    ****   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 1341              		.loc 1 580 30 is_stmt 0 view .LVU423
 1342 0020 4362     		str	r3, [r0, #36]
 581:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1343              		.loc 1 581 3 is_stmt 1 view .LVU424
 581:Src/main.c    ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1344              		.loc 1 581 38 is_stmt 0 view .LVU425
 1345 0022 8362     		str	r3, [r0, #40]
 582:Src/main.c    ****   {
 1346              		.loc 1 582 3 is_stmt 1 view .LVU426
 582:Src/main.c    ****   {
 1347              		.loc 1 582 7 is_stmt 0 view .LVU427
 1348 0024 FFF7FEFF 		bl	HAL_UART_Init
 1349              	.LVL62:
 582:Src/main.c    ****   {
 1350              		.loc 1 582 6 discriminator 1 view .LVU428
 1351 0028 70B9     		cbnz	r0, .L97
 586:Src/main.c    ****   {
 1352              		.loc 1 586 3 is_stmt 1 view .LVU429
 586:Src/main.c    ****   {
 1353              		.loc 1 586 7 is_stmt 0 view .LVU430
 1354 002a 0021     		movs	r1, #0
 1355 002c 0A48     		ldr	r0, .L101
 1356 002e FFF7FEFF 		bl	HAL_UARTEx_SetTxFifoThreshold
 1357              	.LVL63:
 586:Src/main.c    ****   {
 1358              		.loc 1 586 6 discriminator 1 view .LVU431
 1359 0032 58B9     		cbnz	r0, .L98
 590:Src/main.c    ****   {
 1360              		.loc 1 590 3 is_stmt 1 view .LVU432
 590:Src/main.c    ****   {
 1361              		.loc 1 590 7 is_stmt 0 view .LVU433
 1362 0034 0021     		movs	r1, #0
 1363 0036 0848     		ldr	r0, .L101
 1364 0038 FFF7FEFF 		bl	HAL_UARTEx_SetRxFifoThreshold
 1365              	.LVL64:
 590:Src/main.c    ****   {
 1366              		.loc 1 590 6 discriminator 1 view .LVU434
 1367 003c 40B9     		cbnz	r0, .L99
 594:Src/main.c    ****   {
 1368              		.loc 1 594 3 is_stmt 1 view .LVU435
 594:Src/main.c    ****   {
 1369              		.loc 1 594 7 is_stmt 0 view .LVU436
ARM GAS  /tmp/ccaYtTQ0.s 			page 47


 1370 003e 0648     		ldr	r0, .L101
 1371 0040 FFF7FEFF 		bl	HAL_UARTEx_DisableFifoMode
 1372              	.LVL65:
 594:Src/main.c    ****   {
 1373              		.loc 1 594 6 discriminator 1 view .LVU437
 1374 0044 30B9     		cbnz	r0, .L100
 602:Src/main.c    **** 
 1375              		.loc 1 602 1 view .LVU438
 1376 0046 08BD     		pop	{r3, pc}
 1377              	.L97:
 584:Src/main.c    ****   }
 1378              		.loc 1 584 5 is_stmt 1 view .LVU439
 1379 0048 FFF7FEFF 		bl	Error_Handler
 1380              	.LVL66:
 1381              	.L98:
 588:Src/main.c    ****   }
 1382              		.loc 1 588 5 view .LVU440
 1383 004c FFF7FEFF 		bl	Error_Handler
 1384              	.LVL67:
 1385              	.L99:
 592:Src/main.c    ****   }
 1386              		.loc 1 592 5 view .LVU441
 1387 0050 FFF7FEFF 		bl	Error_Handler
 1388              	.LVL68:
 1389              	.L100:
 596:Src/main.c    ****   }
 1390              		.loc 1 596 5 view .LVU442
 1391 0054 FFF7FEFF 		bl	Error_Handler
 1392              	.LVL69:
 1393              	.L102:
 1394              		.align	2
 1395              	.L101:
 1396 0058 00000000 		.word	huart1
 1397 005c 00380140 		.word	1073821696
 1398              		.cfi_endproc
 1399              	.LFE336:
 1401              		.section	.text.SystemClock_Config,"ax",%progbits
 1402              		.align	1
 1403              		.global	SystemClock_Config
 1404              		.syntax unified
 1405              		.thumb
 1406              		.thumb_func
 1408              	SystemClock_Config:
 1409              	.LFB330:
 179:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 1410              		.loc 1 179 1 view -0
 1411              		.cfi_startproc
 1412              		@ args = 0, pretend = 0, frame = 80
 1413              		@ frame_needed = 0, uses_anonymous_args = 0
 1414 0000 00B5     		push	{lr}
 1415              	.LCFI24:
 1416              		.cfi_def_cfa_offset 4
 1417              		.cfi_offset 14, -4
 1418 0002 95B0     		sub	sp, sp, #84
 1419              	.LCFI25:
 1420              		.cfi_def_cfa_offset 88
 180:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
ARM GAS  /tmp/ccaYtTQ0.s 			page 48


 1421              		.loc 1 180 3 view .LVU444
 180:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 1422              		.loc 1 180 22 is_stmt 0 view .LVU445
 1423 0004 3822     		movs	r2, #56
 1424 0006 0021     		movs	r1, #0
 1425 0008 06A8     		add	r0, sp, #24
 1426 000a FFF7FEFF 		bl	memset
 1427              	.LVL70:
 181:Src/main.c    **** 
 1428              		.loc 1 181 3 is_stmt 1 view .LVU446
 181:Src/main.c    **** 
 1429              		.loc 1 181 22 is_stmt 0 view .LVU447
 1430 000e 0020     		movs	r0, #0
 1431 0010 0190     		str	r0, [sp, #4]
 1432 0012 0290     		str	r0, [sp, #8]
 1433 0014 0390     		str	r0, [sp, #12]
 1434 0016 0490     		str	r0, [sp, #16]
 1435 0018 0590     		str	r0, [sp, #20]
 185:Src/main.c    **** 
 1436              		.loc 1 185 3 is_stmt 1 view .LVU448
 1437 001a FFF7FEFF 		bl	HAL_PWREx_ControlVoltageScaling
 1438              	.LVL71:
 190:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 1439              		.loc 1 190 3 view .LVU449
 190:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 1440              		.loc 1 190 36 is_stmt 0 view .LVU450
 1441 001e 0123     		movs	r3, #1
 1442 0020 0693     		str	r3, [sp, #24]
 191:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 1443              		.loc 1 191 3 is_stmt 1 view .LVU451
 191:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 1444              		.loc 1 191 30 is_stmt 0 view .LVU452
 1445 0022 4FF48033 		mov	r3, #65536
 1446 0026 0793     		str	r3, [sp, #28]
 192:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 1447              		.loc 1 192 3 is_stmt 1 view .LVU453
 192:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 1448              		.loc 1 192 34 is_stmt 0 view .LVU454
 1449 0028 0223     		movs	r3, #2
 1450 002a 0D93     		str	r3, [sp, #52]
 193:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 1451              		.loc 1 193 3 is_stmt 1 view .LVU455
 193:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
 1452              		.loc 1 193 35 is_stmt 0 view .LVU456
 1453 002c 0322     		movs	r2, #3
 1454 002e 0E92     		str	r2, [sp, #56]
 194:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 54;
 1455              		.loc 1 194 3 is_stmt 1 view .LVU457
 194:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 54;
 1456              		.loc 1 194 30 is_stmt 0 view .LVU458
 1457 0030 0F93     		str	r3, [sp, #60]
 195:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 1458              		.loc 1 195 3 is_stmt 1 view .LVU459
 195:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
 1459              		.loc 1 195 30 is_stmt 0 view .LVU460
 1460 0032 3622     		movs	r2, #54
 1461 0034 1092     		str	r2, [sp, #64]
ARM GAS  /tmp/ccaYtTQ0.s 			page 49


 196:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 1462              		.loc 1 196 3 is_stmt 1 view .LVU461
 196:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
 1463              		.loc 1 196 30 is_stmt 0 view .LVU462
 1464 0036 1193     		str	r3, [sp, #68]
 197:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 1465              		.loc 1 197 3 is_stmt 1 view .LVU463
 197:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
 1466              		.loc 1 197 30 is_stmt 0 view .LVU464
 1467 0038 0422     		movs	r2, #4
 1468 003a 1292     		str	r2, [sp, #72]
 198:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 1469              		.loc 1 198 3 is_stmt 1 view .LVU465
 198:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 1470              		.loc 1 198 30 is_stmt 0 view .LVU466
 1471 003c 1393     		str	r3, [sp, #76]
 199:Src/main.c    ****   {
 1472              		.loc 1 199 3 is_stmt 1 view .LVU467
 199:Src/main.c    ****   {
 1473              		.loc 1 199 7 is_stmt 0 view .LVU468
 1474 003e 06A8     		add	r0, sp, #24
 1475 0040 FFF7FEFF 		bl	HAL_RCC_OscConfig
 1476              	.LVL72:
 199:Src/main.c    ****   {
 1477              		.loc 1 199 6 discriminator 1 view .LVU469
 1478 0044 B0B9     		cbnz	r0, .L107
 206:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 1479              		.loc 1 206 3 is_stmt 1 view .LVU470
 206:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 1480              		.loc 1 206 31 is_stmt 0 view .LVU471
 1481 0046 0F23     		movs	r3, #15
 1482 0048 0193     		str	r3, [sp, #4]
 208:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 1483              		.loc 1 208 3 is_stmt 1 view .LVU472
 208:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 1484              		.loc 1 208 34 is_stmt 0 view .LVU473
 1485 004a 0323     		movs	r3, #3
 1486 004c 0293     		str	r3, [sp, #8]
 209:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 1487              		.loc 1 209 3 is_stmt 1 view .LVU474
 209:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 1488              		.loc 1 209 35 is_stmt 0 view .LVU475
 1489 004e 0023     		movs	r3, #0
 1490 0050 0393     		str	r3, [sp, #12]
 210:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 1491              		.loc 1 210 3 is_stmt 1 view .LVU476
 210:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 1492              		.loc 1 210 36 is_stmt 0 view .LVU477
 1493 0052 0493     		str	r3, [sp, #16]
 211:Src/main.c    **** 
 1494              		.loc 1 211 3 is_stmt 1 view .LVU478
 211:Src/main.c    **** 
 1495              		.loc 1 211 36 is_stmt 0 view .LVU479
 1496 0054 0593     		str	r3, [sp, #20]
 213:Src/main.c    ****   {
 1497              		.loc 1 213 3 is_stmt 1 view .LVU480
 213:Src/main.c    ****   {
ARM GAS  /tmp/ccaYtTQ0.s 			page 50


 1498              		.loc 1 213 7 is_stmt 0 view .LVU481
 1499 0056 0421     		movs	r1, #4
 1500 0058 0DEB0100 		add	r0, sp, r1
 1501 005c FFF7FEFF 		bl	HAL_RCC_ClockConfig
 1502              	.LVL73:
 213:Src/main.c    ****   {
 1503              		.loc 1 213 6 discriminator 1 view .LVU482
 1504 0060 50B9     		cbnz	r0, .L108
 217:Src/main.c    **** }
 1505              		.loc 1 217 3 is_stmt 1 view .LVU483
 1506 0062 0022     		movs	r2, #0
 1507 0064 4FF08061 		mov	r1, #67108864
 1508 0068 0448     		ldr	r0, .L109
 1509 006a FFF7FEFF 		bl	HAL_RCC_MCOConfig
 1510              	.LVL74:
 218:Src/main.c    **** 
 1511              		.loc 1 218 1 is_stmt 0 view .LVU484
 1512 006e 15B0     		add	sp, sp, #84
 1513              	.LCFI26:
 1514              		.cfi_remember_state
 1515              		.cfi_def_cfa_offset 4
 1516              		@ sp needed
 1517 0070 5DF804FB 		ldr	pc, [sp], #4
 1518              	.L107:
 1519              	.LCFI27:
 1520              		.cfi_restore_state
 201:Src/main.c    ****   }
 1521              		.loc 1 201 5 is_stmt 1 view .LVU485
 1522 0074 FFF7FEFF 		bl	Error_Handler
 1523              	.LVL75:
 1524              	.L108:
 215:Src/main.c    ****   }
 1525              		.loc 1 215 5 view .LVU486
 1526 0078 FFF7FEFF 		bl	Error_Handler
 1527              	.LVL76:
 1528              	.L110:
 1529              		.align	2
 1530              	.L109:
 1531 007c 00040600 		.word	394240
 1532              		.cfi_endproc
 1533              	.LFE330:
 1535              		.section	.text.main,"ax",%progbits
 1536              		.align	1
 1537              		.global	main
 1538              		.syntax unified
 1539              		.thumb
 1540              		.thumb_func
 1542              	main:
 1543              	.LFB329:
  86:Src/main.c    **** 
 1544              		.loc 1 86 1 view -0
 1545              		.cfi_startproc
 1546              		@ Volatile: function does not return.
 1547              		@ args = 0, pretend = 0, frame = 0
 1548              		@ frame_needed = 0, uses_anonymous_args = 0
 1549 0000 08B5     		push	{r3, lr}
 1550              	.LCFI28:
ARM GAS  /tmp/ccaYtTQ0.s 			page 51


 1551              		.cfi_def_cfa_offset 8
 1552              		.cfi_offset 3, -8
 1553              		.cfi_offset 14, -4
  95:Src/main.c    **** 
 1554              		.loc 1 95 3 view .LVU488
 1555 0002 FFF7FEFF 		bl	HAL_Init
 1556              	.LVL77:
 102:Src/main.c    **** 
 1557              		.loc 1 102 3 view .LVU489
 1558 0006 FFF7FEFF 		bl	SystemClock_Config
 1559              	.LVL78:
 109:Src/main.c    ****   MX_DMA_Init();
 1560              		.loc 1 109 3 view .LVU490
 1561 000a FFF7FEFF 		bl	MX_GPIO_Init
 1562              	.LVL79:
 110:Src/main.c    ****   MX_TIM2_Init();
 1563              		.loc 1 110 3 view .LVU491
 1564 000e FFF7FEFF 		bl	MX_DMA_Init
 1565              	.LVL80:
 111:Src/main.c    ****   MX_I2C1_Init();
 1566              		.loc 1 111 3 view .LVU492
 1567 0012 FFF7FEFF 		bl	MX_TIM2_Init
 1568              	.LVL81:
 112:Src/main.c    ****   MX_TIM3_Init();
 1569              		.loc 1 112 3 view .LVU493
 1570 0016 FFF7FEFF 		bl	MX_I2C1_Init
 1571              	.LVL82:
 113:Src/main.c    ****   MX_ADC1_Init();
 1572              		.loc 1 113 3 view .LVU494
 1573 001a FFF7FEFF 		bl	MX_TIM3_Init
 1574              	.LVL83:
 114:Src/main.c    ****   MX_ADC2_Init();
 1575              		.loc 1 114 3 view .LVU495
 1576 001e FFF7FEFF 		bl	MX_ADC1_Init
 1577              	.LVL84:
 115:Src/main.c    ****   MX_USART1_UART_Init();
 1578              		.loc 1 115 3 view .LVU496
 1579 0022 FFF7FEFF 		bl	MX_ADC2_Init
 1580              	.LVL85:
 116:Src/main.c    ****   /* USER CODE BEGIN 2 */
 1581              		.loc 1 116 3 view .LVU497
 1582 0026 FFF7FEFF 		bl	MX_USART1_UART_Init
 1583              	.LVL86:
 119:Src/main.c    **** 
 1584              		.loc 1 119 5 view .LVU498
 1585 002a 4022     		movs	r2, #64
 1586 002c 2A49     		ldr	r1, .L118
 1587 002e 2B48     		ldr	r0, .L118+4
 1588 0030 FFF7FEFF 		bl	HAL_UARTEx_ReceiveToIdle_DMA
 1589              	.LVL87:
 122:Src/main.c    **** 
 1590              		.loc 1 122 5 view .LVU499
 1591 0034 2A48     		ldr	r0, .L118+8
 1592 0036 FFF7FEFF 		bl	HAL_ADC_Start_IT
 1593              	.LVL88:
 125:Src/main.c    **** 
 1594              		.loc 1 125 5 view .LVU500
ARM GAS  /tmp/ccaYtTQ0.s 			page 52


 1595 003a 2A4C     		ldr	r4, .L118+12
 1596 003c 2046     		mov	r0, r4
 1597 003e FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
 1598              	.LVL89:
 128:Src/main.c    **** 
 1599              		.loc 1 128 5 view .LVU501
 1600 0042 2948     		ldr	r0, .L118+16
 1601 0044 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
 1602              	.LVL90:
 130:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
 1603              		.loc 1 130 5 view .LVU502
 1604 0048 0021     		movs	r1, #0
 1605 004a 2046     		mov	r0, r4
 1606 004c FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1607              	.LVL91:
 131:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
 1608              		.loc 1 131 5 view .LVU503
 1609 0050 0421     		movs	r1, #4
 1610 0052 2046     		mov	r0, r4
 1611 0054 FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1612              	.LVL92:
 132:Src/main.c    ****     HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
 1613              		.loc 1 132 5 view .LVU504
 1614 0058 0821     		movs	r1, #8
 1615 005a 2046     		mov	r0, r4
 1616 005c FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1617              	.LVL93:
 133:Src/main.c    **** 
 1618              		.loc 1 133 5 view .LVU505
 1619 0060 0C21     		movs	r1, #12
 1620 0062 2046     		mov	r0, r4
 1621 0064 FFF7FEFF 		bl	HAL_TIM_PWM_Start
 1622              	.LVL94:
 135:Src/main.c    ****     squeow_ui_init();
 1623              		.loc 1 135 5 view .LVU506
 1624 0068 FFF7FEFF 		bl	squeow_init
 1625              	.LVL95:
 136:Src/main.c    **** 	// prima lettura
 1626              		.loc 1 136 5 view .LVU507
 1627 006c FFF7FEFF 		bl	squeow_ui_init
 1628              	.LVL96:
 138:Src/main.c    **** 
 1629              		.loc 1 138 5 view .LVU508
 1630 0070 0422     		movs	r2, #4
 1631 0072 1E49     		ldr	r1, .L118+20
 1632 0074 1E48     		ldr	r0, .L118+24
 1633 0076 FFF7FEFF 		bl	HAL_ADC_Start_DMA
 1634              	.LVL97:
 140:Src/main.c    ****     //    HAL_Delay(50);
 1635              		.loc 1 140 5 view .LVU509
 1636 007a FFF7FEFF 		bl	squeow_synth_init
 1637              	.LVL98:
 142:Src/main.c    ****     squeow_synth_on();
 1638              		.loc 1 142 5 view .LVU510
 1639 007e 1D48     		ldr	r0, .L118+28
 1640 0080 FFF7FEFF 		bl	squeow_synth_set
 1641              	.LVL99:
ARM GAS  /tmp/ccaYtTQ0.s 			page 53


 143:Src/main.c    **** 
 1642              		.loc 1 143 5 view .LVU511
 1643 0084 FFF7FEFF 		bl	squeow_synth_on
 1644              	.LVL100:
 1645 0088 0FE0     		b	.L112
 1646              	.L117:
 156:Src/main.c    ****                 adc2_done = 0;
 1647              		.loc 1 156 17 view .LVU512
 1648 008a 0422     		movs	r2, #4
 1649 008c 1749     		ldr	r1, .L118+20
 1650 008e 1848     		ldr	r0, .L118+24
 1651 0090 FFF7FEFF 		bl	HAL_ADC_Start_DMA
 1652              	.LVL101:
 157:Src/main.c    ****             }
 1653              		.loc 1 157 17 view .LVU513
 157:Src/main.c    ****             }
 1654              		.loc 1 157 27 is_stmt 0 view .LVU514
 1655 0094 184B     		ldr	r3, .L118+32
 1656 0096 0022     		movs	r2, #0
 1657 0098 1A70     		strb	r2, [r3]
 1658 009a 0EE0     		b	.L113
 1659              	.L114:
 167:Src/main.c    ****             sys_tick = 0;
 1660              		.loc 1 167 13 is_stmt 1 view .LVU515
 167:Src/main.c    ****             sys_tick = 0;
 1661              		.loc 1 167 30 is_stmt 0 view .LVU516
 1662 009c 174A     		ldr	r2, .L118+36
 1663 009e 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
 1664 00a0 0133     		adds	r3, r3, #1
 1665 00a2 1370     		strb	r3, [r2]
 168:Src/main.c    ****         }
 1666              		.loc 1 168 13 is_stmt 1 view .LVU517
 168:Src/main.c    ****         }
 1667              		.loc 1 168 22 is_stmt 0 view .LVU518
 1668 00a4 164B     		ldr	r3, .L118+40
 1669 00a6 0022     		movs	r2, #0
 1670 00a8 1A70     		strb	r2, [r3]
 1671              	.L112:
 149:Src/main.c    ****     /* USER CODE END WHILE */
 1672              		.loc 1 149 5 is_stmt 1 view .LVU519
 153:Src/main.c    **** 
 1673              		.loc 1 153 9 view .LVU520
 153:Src/main.c    **** 
 1674              		.loc 1 153 13 is_stmt 0 view .LVU521
 1675 00aa 154B     		ldr	r3, .L118+40
 1676 00ac 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
 153:Src/main.c    **** 
 1677              		.loc 1 153 12 view .LVU522
 1678 00ae 002B     		cmp	r3, #0
 1679 00b0 FBD0     		beq	.L112
 155:Src/main.c    ****                 HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
 1680              		.loc 1 155 13 is_stmt 1 view .LVU523
 155:Src/main.c    ****                 HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
 1681              		.loc 1 155 17 is_stmt 0 view .LVU524
 1682 00b2 114B     		ldr	r3, .L118+32
 1683 00b4 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
 155:Src/main.c    ****                 HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
ARM GAS  /tmp/ccaYtTQ0.s 			page 54


 1684              		.loc 1 155 16 view .LVU525
 1685 00b6 002B     		cmp	r3, #0
 1686 00b8 E7D1     		bne	.L117
 1687              	.L113:
 160:Src/main.c    ****                 seriow_var_dump();
 1688              		.loc 1 160 13 is_stmt 1 view .LVU526
 160:Src/main.c    ****                 seriow_var_dump();
 1689              		.loc 1 160 61 is_stmt 0 view .LVU527
 1690 00ba 104B     		ldr	r3, .L118+36
 1691 00bc 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
 160:Src/main.c    ****                 seriow_var_dump();
 1692              		.loc 1 160 16 view .LVU528
 1693 00be 0A2B     		cmp	r3, #10
 1694 00c0 ECD9     		bls	.L114
 161:Src/main.c    ****                 sys_tick_prescale = 0;
 1695              		.loc 1 161 17 is_stmt 1 view .LVU529
 1696 00c2 FFF7FEFF 		bl	seriow_var_dump
 1697              	.LVL102:
 162:Src/main.c    ****     squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
 1698              		.loc 1 162 17 view .LVU530
 162:Src/main.c    ****     squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
 1699              		.loc 1 162 35 is_stmt 0 view .LVU531
 1700 00c6 0D4B     		ldr	r3, .L118+36
 1701 00c8 0022     		movs	r2, #0
 1702 00ca 1A70     		strb	r2, [r3]
 163:Src/main.c    ****     squeow_synth_on();
 1703              		.loc 1 163 5 is_stmt 1 view .LVU532
 1704 00cc 0948     		ldr	r0, .L118+28
 1705 00ce FFF7FEFF 		bl	squeow_synth_set
 1706              	.LVL103:
 164:Src/main.c    ****             }
 1707              		.loc 1 164 5 view .LVU533
 1708 00d2 FFF7FEFF 		bl	squeow_synth_on
 1709              	.LVL104:
 1710 00d6 E1E7     		b	.L114
 1711              	.L119:
 1712              		.align	2
 1713              	.L118:
 1714 00d8 00000000 		.word	UART_RX_buf
 1715 00dc 00000000 		.word	huart1
 1716 00e0 00000000 		.word	hadc1
 1717 00e4 00000000 		.word	htim2
 1718 00e8 00000000 		.word	htim3
 1719 00ec 00000000 		.word	adc2_valori
 1720 00f0 00000000 		.word	hadc2
 1721 00f4 98BC1400 		.word	1359000
 1722 00f8 00000000 		.word	adc2_done
 1723 00fc 00000000 		.word	sys_tick_prescale
 1724 0100 00000000 		.word	sys_tick
 1725              		.cfi_endproc
 1726              	.LFE329:
 1728              		.section	.bss.last_offset.0,"aw",%nobits
 1729              		.align	1
 1732              	last_offset.0:
 1733 0000 0000     		.space	2
 1734              		.global	hdma_usart1_tx
 1735              		.section	.bss.hdma_usart1_tx,"aw",%nobits
ARM GAS  /tmp/ccaYtTQ0.s 			page 55


 1736              		.align	2
 1739              	hdma_usart1_tx:
 1740 0000 00000000 		.space	96
 1740      00000000 
 1740      00000000 
 1740      00000000 
 1740      00000000 
 1741              		.global	hdma_usart1_rx
 1742              		.section	.bss.hdma_usart1_rx,"aw",%nobits
 1743              		.align	2
 1746              	hdma_usart1_rx:
 1747 0000 00000000 		.space	96
 1747      00000000 
 1747      00000000 
 1747      00000000 
 1747      00000000 
 1748              		.global	huart1
 1749              		.section	.bss.huart1,"aw",%nobits
 1750              		.align	2
 1753              	huart1:
 1754 0000 00000000 		.space	148
 1754      00000000 
 1754      00000000 
 1754      00000000 
 1754      00000000 
 1755              		.global	htim3
 1756              		.section	.bss.htim3,"aw",%nobits
 1757              		.align	2
 1760              	htim3:
 1761 0000 00000000 		.space	76
 1761      00000000 
 1761      00000000 
 1761      00000000 
 1761      00000000 
 1762              		.global	htim2
 1763              		.section	.bss.htim2,"aw",%nobits
 1764              		.align	2
 1767              	htim2:
 1768 0000 00000000 		.space	76
 1768      00000000 
 1768      00000000 
 1768      00000000 
 1768      00000000 
 1769              		.global	hi2c1
 1770              		.section	.bss.hi2c1,"aw",%nobits
 1771              		.align	2
 1774              	hi2c1:
 1775 0000 00000000 		.space	84
 1775      00000000 
 1775      00000000 
 1775      00000000 
 1775      00000000 
 1776              		.global	hdma_adc2
 1777              		.section	.bss.hdma_adc2,"aw",%nobits
 1778              		.align	2
 1781              	hdma_adc2:
 1782 0000 00000000 		.space	96
ARM GAS  /tmp/ccaYtTQ0.s 			page 56


 1782      00000000 
 1782      00000000 
 1782      00000000 
 1782      00000000 
 1783              		.global	hadc2
 1784              		.section	.bss.hadc2,"aw",%nobits
 1785              		.align	2
 1788              	hadc2:
 1789 0000 00000000 		.space	108
 1789      00000000 
 1789      00000000 
 1789      00000000 
 1789      00000000 
 1790              		.global	hadc1
 1791              		.section	.bss.hadc1,"aw",%nobits
 1792              		.align	2
 1795              	hadc1:
 1796 0000 00000000 		.space	108
 1796      00000000 
 1796      00000000 
 1796      00000000 
 1796      00000000 
 1797              		.text
 1798              	.Letext0:
 1799              		.file 3 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 1800              		.file 4 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
 1801              		.file 5 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
 1802              		.file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
 1803              		.file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 1804              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h"
 1805              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
 1806              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 1807              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
 1808              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h"
 1809              		.file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h"
 1810              		.file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 1811              		.file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 1812              		.file 16 "Inc/si5351.h"
 1813              		.file 17 "Inc/squeow.h"
 1814              		.file 18 "Inc/squeow_ui.h"
 1815              		.file 19 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
 1816              		.file 20 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h"
 1817              		.file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h"
 1818              		.file 22 "Inc/main.h"
 1819              		.file 23 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h"
 1820              		.file 24 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
 1821              		.file 25 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
 1822              		.file 26 "<built-in>"
ARM GAS  /tmp/ccaYtTQ0.s 			page 57


DEFINED SYMBOLS
                            *ABS*:00000000 main.c
     /tmp/ccaYtTQ0.s:21     .text.MX_GPIO_Init:00000000 $t
     /tmp/ccaYtTQ0.s:26     .text.MX_GPIO_Init:00000000 MX_GPIO_Init
     /tmp/ccaYtTQ0.s:167    .text.MX_GPIO_Init:00000098 $d
     /tmp/ccaYtTQ0.s:174    .text.MX_DMA_Init:00000000 $t
     /tmp/ccaYtTQ0.s:179    .text.MX_DMA_Init:00000000 MX_DMA_Init
     /tmp/ccaYtTQ0.s:262    .text.MX_DMA_Init:00000060 $d
     /tmp/ccaYtTQ0.s:267    .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t
     /tmp/ccaYtTQ0.s:273    .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback
     /tmp/ccaYtTQ0.s:287    .text.HAL_ADC_ConvCpltCallback:00000000 $t
     /tmp/ccaYtTQ0.s:293    .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
     /tmp/ccaYtTQ0.s:311    .text.HAL_ADC_ConvCpltCallback:00000008 $d
     /tmp/ccaYtTQ0.s:316    .text.HAL_UARTEx_RxEventCallback:00000000 $t
     /tmp/ccaYtTQ0.s:322    .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback
     /tmp/ccaYtTQ0.s:364    .text.HAL_UARTEx_RxEventCallback:00000024 $d
     /tmp/ccaYtTQ0.s:1732   .bss.last_offset.0:00000000 last_offset.0
     /tmp/ccaYtTQ0.s:369    .text.HAL_UART_TxCpltCallback:00000000 $t
     /tmp/ccaYtTQ0.s:375    .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback
     /tmp/ccaYtTQ0.s:393    .text.HAL_UART_TxCpltCallback:00000008 $d
     /tmp/ccaYtTQ0.s:398    .text.Error_Handler:00000000 $t
     /tmp/ccaYtTQ0.s:404    .text.Error_Handler:00000000 Error_Handler
     /tmp/ccaYtTQ0.s:436    .text.MX_TIM2_Init:00000000 $t
     /tmp/ccaYtTQ0.s:441    .text.MX_TIM2_Init:00000000 MX_TIM2_Init
     /tmp/ccaYtTQ0.s:652    .text.MX_TIM2_Init:000000f0 $d
     /tmp/ccaYtTQ0.s:1767   .bss.htim2:00000000 htim2
     /tmp/ccaYtTQ0.s:657    .text.MX_I2C1_Init:00000000 $t
     /tmp/ccaYtTQ0.s:662    .text.MX_I2C1_Init:00000000 MX_I2C1_Init
     /tmp/ccaYtTQ0.s:744    .text.MX_I2C1_Init:00000048 $d
     /tmp/ccaYtTQ0.s:1774   .bss.hi2c1:00000000 hi2c1
     /tmp/ccaYtTQ0.s:751    .text.MX_TIM3_Init:00000000 $t
     /tmp/ccaYtTQ0.s:756    .text.MX_TIM3_Init:00000000 MX_TIM3_Init
     /tmp/ccaYtTQ0.s:860    .text.MX_TIM3_Init:00000064 $d
     /tmp/ccaYtTQ0.s:1760   .bss.htim3:00000000 htim3
     /tmp/ccaYtTQ0.s:866    .text.MX_ADC1_Init:00000000 $t
     /tmp/ccaYtTQ0.s:871    .text.MX_ADC1_Init:00000000 MX_ADC1_Init
     /tmp/ccaYtTQ0.s:1077   .text.MX_ADC1_Init:000000d8 $d
     /tmp/ccaYtTQ0.s:1795   .bss.hadc1:00000000 hadc1
     /tmp/ccaYtTQ0.s:1084   .text.MX_ADC2_Init:00000000 $t
     /tmp/ccaYtTQ0.s:1089   .text.MX_ADC2_Init:00000000 MX_ADC2_Init
     /tmp/ccaYtTQ0.s:1282   .text.MX_ADC2_Init:000000bc $d
     /tmp/ccaYtTQ0.s:1788   .bss.hadc2:00000000 hadc2
     /tmp/ccaYtTQ0.s:1292   .text.MX_USART1_UART_Init:00000000 $t
     /tmp/ccaYtTQ0.s:1297   .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
     /tmp/ccaYtTQ0.s:1396   .text.MX_USART1_UART_Init:00000058 $d
     /tmp/ccaYtTQ0.s:1753   .bss.huart1:00000000 huart1
     /tmp/ccaYtTQ0.s:1402   .text.SystemClock_Config:00000000 $t
     /tmp/ccaYtTQ0.s:1408   .text.SystemClock_Config:00000000 SystemClock_Config
     /tmp/ccaYtTQ0.s:1531   .text.SystemClock_Config:0000007c $d
     /tmp/ccaYtTQ0.s:1536   .text.main:00000000 $t
     /tmp/ccaYtTQ0.s:1542   .text.main:00000000 main
     /tmp/ccaYtTQ0.s:1714   .text.main:000000d8 $d
     /tmp/ccaYtTQ0.s:1729   .bss.last_offset.0:00000000 $d
     /tmp/ccaYtTQ0.s:1739   .bss.hdma_usart1_tx:00000000 hdma_usart1_tx
     /tmp/ccaYtTQ0.s:1736   .bss.hdma_usart1_tx:00000000 $d
     /tmp/ccaYtTQ0.s:1746   .bss.hdma_usart1_rx:00000000 hdma_usart1_rx
     /tmp/ccaYtTQ0.s:1743   .bss.hdma_usart1_rx:00000000 $d
ARM GAS  /tmp/ccaYtTQ0.s 			page 58


     /tmp/ccaYtTQ0.s:1750   .bss.huart1:00000000 $d
     /tmp/ccaYtTQ0.s:1757   .bss.htim3:00000000 $d
     /tmp/ccaYtTQ0.s:1764   .bss.htim2:00000000 $d
     /tmp/ccaYtTQ0.s:1771   .bss.hi2c1:00000000 $d
     /tmp/ccaYtTQ0.s:1781   .bss.hdma_adc2:00000000 hdma_adc2
     /tmp/ccaYtTQ0.s:1778   .bss.hdma_adc2:00000000 $d
     /tmp/ccaYtTQ0.s:1785   .bss.hadc2:00000000 $d
     /tmp/ccaYtTQ0.s:1792   .bss.hadc1:00000000 $d

UNDEFINED SYMBOLS
HAL_GPIO_WritePin
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
adc2_done
uart_sent
HAL_TIM_Base_Init
HAL_TIM_ConfigClockSource
HAL_TIM_PWM_Init
HAL_TIMEx_MasterConfigSynchronization
HAL_TIM_PWM_ConfigChannel
HAL_TIM_MspPostInit
HAL_I2C_Init
HAL_I2CEx_ConfigAnalogFilter
HAL_I2CEx_ConfigDigitalFilter
memset
HAL_ADC_Init
HAL_ADCEx_MultiModeConfigChannel
HAL_ADC_AnalogWDGConfig
HAL_ADC_ConfigChannel
HAL_UART_Init
HAL_UARTEx_SetTxFifoThreshold
HAL_UARTEx_SetRxFifoThreshold
HAL_UARTEx_DisableFifoMode
HAL_PWREx_ControlVoltageScaling
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCC_MCOConfig
HAL_Init
HAL_UARTEx_ReceiveToIdle_DMA
HAL_ADC_Start_IT
HAL_TIM_Base_Start_IT
HAL_TIM_PWM_Start
squeow_init
squeow_ui_init
HAL_ADC_Start_DMA
squeow_synth_init
squeow_synth_set
squeow_synth_on
seriow_var_dump
UART_RX_buf
adc2_valori
sys_tick_prescale
sys_tick