ARM GAS /tmp/ccrO2eGa.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32g4xx_hal_adc_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c" 20 .section .text.LL_ADC_SetCalibrationFactor,"ax",%progbits 21 .align 1 22 .syntax unified 23 .thumb 24 .thumb_func 26 LL_ADC_SetCalibrationFactor: 27 .LVL0: 28 .LFB139: 29 .file 2 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h" 1:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @file stm32g4xx_ll_adc.h 4:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Header file of ADC LL module. 6:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 7:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @attention 8:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 9:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Copyright (c) 2019 STMicroelectronics. 10:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All rights reserved. 11:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This software is licensed under terms that can be found in the LICENSE file 13:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in the root directory of this software component. 14:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 16:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 17:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 18:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 19:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifndef STM32G4xx_LL_ADC_H 21:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define STM32G4xx_LL_ADC_H 22:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 23:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifdef __cplusplus 24:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** extern "C" { 25:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 26:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 27:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #include "stm32g4xx.h" 29:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 2 30:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @addtogroup STM32G4xx_LL_Driver 31:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 32:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 33:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 34:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined (ADC1) || defined (ADC2) || defined (ADC3) || defined (ADC4) || defined (ADC5) 35:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 36:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL ADC 37:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 38:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 39:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 40:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 43:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/ 44:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants 45:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 46:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 47:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 48:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular sequencer: */ 49:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */ 50:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer register offset */ 51:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 52:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 53:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group regular sequencer configuration */ 54:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 55:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR1_REGOFFSET (0x00000000UL) 56:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR2_REGOFFSET (0x00000100UL) 57:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR3_REGOFFSET (0x00000200UL) 58:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR4_REGOFFSET (0x00000300UL) 59:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 60:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET | ADC_SQR2_REGOFFSET \ 61:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR3_REGOFFSET | ADC_SQR4_REGOFFSET) 62:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQRX_REGOFFSET_POS (8UL) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_ 63:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 64:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 65:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular sequencer bits information to be inserted */ 66:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group regular sequencer ranks literals definition. */ 67:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_1_SQRX_BITOFFSET_POS (ADC_SQR1_SQ1_Pos) 68:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (ADC_SQR1_SQ2_Pos) 69:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (ADC_SQR1_SQ3_Pos) 70:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (ADC_SQR1_SQ4_Pos) 71:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_5_SQRX_BITOFFSET_POS (ADC_SQR2_SQ5_Pos) 72:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_6_SQRX_BITOFFSET_POS (ADC_SQR2_SQ6_Pos) 73:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (ADC_SQR2_SQ7_Pos) 74:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (ADC_SQR2_SQ8_Pos) 75:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (ADC_SQR2_SQ9_Pos) 76:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_10_SQRX_BITOFFSET_POS (ADC_SQR3_SQ10_Pos) 77:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_11_SQRX_BITOFFSET_POS (ADC_SQR3_SQ11_Pos) 78:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (ADC_SQR3_SQ12_Pos) 79:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (ADC_SQR3_SQ13_Pos) 80:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (ADC_SQR3_SQ14_Pos) 81:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_15_SQRX_BITOFFSET_POS (ADC_SQR4_SQ15_Pos) 82:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS (ADC_SQR4_SQ16_Pos) 83:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 84:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 85:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 86:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected sequencer: */ ARM GAS /tmp/ccrO2eGa.s page 3 87:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */ 88:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - data register offset */ 89:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 90:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 91:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group injected data register */ 92:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 93:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR1_REGOFFSET (0x00000000UL) 94:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR2_REGOFFSET (0x00000100UL) 95:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR3_REGOFFSET (0x00000200UL) 96:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR4_REGOFFSET (0x00000300UL) 97:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 98:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET | ADC_JDR2_REGOFFSET \ 99:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_JDR3_REGOFFSET | ADC_JDR4_REGOFFSET) 100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDRX_REGOFFSET_POS (8UL) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_ 102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected sequencer bits information to be inserted */ 104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group injected sequencer ranks literals definition. */ 105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ1_Pos) 106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ2_Pos) 107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ3_Pos) 108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ4_Pos) 109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular trigger: */ 113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */ 114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger source */ 115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger edge */ 116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d 117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compatibility with some ADC on oth 118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** having this setting set by HW defa 119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 0 132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1 133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2 134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3 135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information. */ 137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS (ADC_CFGR_EXTSEL_Pos) 138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (ADC_CFGR_EXTEN_Pos) 139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected trigger: */ 143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */ ARM GAS /tmp/ccrO2eGa.s page 4 144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger source */ 145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger edge */ 146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge ( 147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compatibility with some ADC on ot 148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** having this setting set by HW def 149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U 154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected trigger bits information. */ 167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS (ADC_JSQR_JEXTSEL_Pos) 168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS (ADC_JSQR_JEXTEN_Pos) 169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC channel: */ 176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */ 177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by number */ 178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by bitfield */ 179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel differentiation between external channels (connected to */ 180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* GPIO pins) and internal channels (connected to internal paths) */ 181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel sampling time defined by SMPRx register offset */ 182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and SMPx bits positions into SMPRx register */ 183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH) 184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH) 185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (ADC_CFGR_AWD1CH_Pos) 186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA 187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_ID_INTERNAL_CH_MASK) 188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */ 189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMB 190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> [Position of bitfield "ADC_CHANNEL_NUMBER_MASK" in register]) */ 191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Channel differentiation between external and internal channels */ 193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000UL) /* Marker of internal channel */ 194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_2 (0x00080000UL) /* Marker of internal channel for other A 195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of different ADC internal channels map 196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** number on different ADC instances */ 197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH | ADC_CHANNEL_ID_INTERNAL_CH 198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC channel sampling time configuration */ 200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ ARM GAS /tmp/ccrO2eGa.s page 5 201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR1_REGOFFSET (0x00000000UL) 202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR2_REGOFFSET (0x02000000UL) 203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET | ADC_SMPR2_REGOFFSET) 204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPRX_REGOFFSET_POS (25UL) /* Position of bits ADC_SMPRx_REGOFFSET 205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** in ADC_CHANNEL_SMPRX_REGOFFSET_MASK 206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000UL) 208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_POS (20UL) /* Equivalent to bitfield "ADC_CHANNEL_ 209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** position in register */ 210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into */ 212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER (0x00000000UL) 214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER (ADC_CFGR_AWD1CH_0) 215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER (ADC_CFGR_AWD1CH_1) 216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER (ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER (ADC_CFGR_AWD1CH_2) 218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_0) 219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1) 220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER (ADC_CFGR_AWD1CH_3) 222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_0) 223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1) 224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2) 226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | \ 229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4) 231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_0) 232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_1) 233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into */ 235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0) 237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1) 238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2) 239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3) 240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4) 241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5) 242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6) 243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7) 244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8) 245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9) 246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10) 247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11) 248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12) 249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13) 250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14) 251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15) 252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16) 253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17) 254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18) 255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels sampling time information to be inserted into */ 257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ ARM GAS /tmp/ccrO2eGa.s page 6 258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value shifted are equivalent to bitfield "ADC_SMPRx_SMPy" position */ 259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register. */ 260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF 270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC mode single or differential ended: */ 282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */ 283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* the relevant bits for: */ 284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */ 285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration: calibration start, calibration factor get or set */ 286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC channels: set each ADC channel ending mode */ 287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF) 288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S) 289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFS 290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* B 291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to perform of shift when single mode is selected, shift 292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channels bits range. */ 293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000UL) /* Selection of 1 bit to discriminate di 294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mask of bit */ 295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16UL) /* Selection of 1 bit to discriminate di 296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** position of bit */ 297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4UL) /* Shift of bi 298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CALIB_F_BIT_D to perform a shift of 4 ran 299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC analog watchdog: */ 301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */ 302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs, */ 303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 series)). */ 304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number, */ 305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection of ADC group (ADC groups regular and-or injected). */ 306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */ 307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection on groups. */ 308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */ 310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) 311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR2_REGOFFSET (0x00100000UL) 312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) 313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */ ARM GAS /tmp/ccrO2eGa.s page 7 315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */ 316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0) 317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024UL) 318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD 320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | 322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH) 323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR23_CHANNEL_MASK) 324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_POS (20UL) /* Position of bits ADC_AWD_ 326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** in ADC_AWD_CRX_REGOFFSET_ 327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */ 329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET) 330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET) 331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET) 332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET | ADC_AWD_TR2_REGOFFSET | ADC_AWD 333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC 334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** in ADC_AWD_TRX_REGOF 335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000UL) /* Selection of 1 bit t 336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** threshold high: mask 337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_POS (16UL) /* Selection of 1 bit t 338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** threshold high: posi 339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4UL) /* Shift of bit ADC_AWD 340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** position to perform 341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC offset: */ 343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC offset instance configuration */ 344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR1_REGOFFSET (0x00000000UL) 345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR2_REGOFFSET (0x00000001UL) 346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR3_REGOFFSET (0x00000002UL) 347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR4_REGOFFSET (0x00000003UL) 348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET | ADC_OFR2_REGOFFSET \ 349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_OFR3_REGOFFSET | ADC_OFR4_REGOFFSET) 350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits positions */ 353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS (ADC_CFGR_RES_Pos) 354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos) 355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1EN_BITOFFSET_POS (ADC_CFGR_AWD1EN_Pos) 356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_JAWD1EN_BITOFFSET_POS (ADC_CFGR_JAWD1EN_Pos) 357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_TR1_HT1_BITOFFSET_POS (ADC_TR1_HT1_Pos) 358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits groups */ 361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL | ADC_CR_ADEN | ADC_CR_ADDIS \ 362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CR_JADSTART | ADC_CR_JADSTP \ 363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC regi 364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** HW property "rs": Software can read as well as set this 365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Writing '0' has no effect on the bit value. */ 366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC internal channels related definitions */ 369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal voltage reference VrefInt */ 370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage referen 371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** parameter VREFINT_CAL: VrefInt ADC raw data acquired at ARM GAS /tmp/ccrO2eGa.s page 8 372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV 373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_VREF (3000UL) /* Analog voltage reference 374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with which VrefInt has been calibrated in production 375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-10 mV) (unit: mV). */ 376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Temperature sensor */ 377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Address of parameter TS_ 378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** temperature sensor ADC raw data acquired at temperature 379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV 380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Address of parameter TS_ 381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** temperature sensor ADC raw data acquired at temperature 382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV 383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP (30L) /* Temperature at which tem 384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** has been calibrated in production for data into TEMPSENS 385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-5 DegC) (unit: DegC). */ 386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP (110L) /* Temperature at which tem 387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** has been calibrated in production for data into TEMPSENS 388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance: +-5 DegC) (unit: DegC). */ 389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference 390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with which temperature sensor has been calibrated in pro 391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (tolerance +-10 mV) (unit: mV). */ 392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/ 399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros 400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Driver macro reserved for internal use: set a pointer to 405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a register from a register basis from which an offset 406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is applied. 407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register basis from which the offset is applied. 408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers). 409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Pointer to register address 410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ 412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL)))) 413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/ 420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER) 421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure 422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC common parameters 427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and multimode 428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (all ADC instances belonging to the same ADC common instance). ARM GAS /tmp/ccrO2eGa.s page 9 429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_CommonInit() 430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC instances state (all ADC instances 431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sharing the same ADC common instance): 432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances sharing the same ADC common instance must be 433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * disabled. 434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and 438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_COMMON 439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, if ADC group injected is u 440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** constraints between ADC clock and AHB clock must 441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to reference manual. 442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetCommonClock(). */ 444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independ 447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (for devices with several ADC instances). 448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetMultimode(). */ 451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfe 453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetMultiDMATransfer(). */ 456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases. 458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetMultiTwoSamplingDelay(). */ 461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef; 464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC instance. 467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC instance. 468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Affects both group regular and group injected (availability 469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of ADC group injected depends on STM32 series). 470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Instance . 472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_Init() 473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 series. However, the different 477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct ARM GAS /tmp/ccrO2eGa.s page 10 486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Resolution; /*!< Set ADC resolution. 488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_RESOLU 489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetResolution(). */ 491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DataAlignment; /*!< Set ADC conversion data alignment. 493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_DATA_A 494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetDataAlignment(). */ 496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t LowPowerMode; /*!< Set ADC low power mode. 498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LP_MOD 499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_SetLowPowerMode(). */ 501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_InitTypeDef; 503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group regular. 506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group regular. 507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "REG"). 510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_REG_Init() 511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 series. However, the different 515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: inter 526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** from external peripheral (timer event, external interr 527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_TR 528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** set trigger polarity to rising edge(default sett 530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with some ADC on other STM32 series having this 531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** default value). 532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetTriggerEdge(). 534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetTriggerSource(). */ 536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group regular sequencer length. 538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetSequencerLength(). */ 541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: se ARM GAS /tmp/ccrO2eGa.s page 11 543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and scan conversions interrupted every selected number 544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group regul 546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** enabled (scan length of 2 ranks or more). 547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetSequencerDiscont(). */ 549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regula 551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are performed in single mode (one conversi 552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** continuous mode (after the first trigger, following co 553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** successively automatically). 554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_CO 555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: It is not possible to enable both ADC group regu 556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and discontinuous mode. 557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetContinuousMode(). */ 559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no tra 561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** by DMA, and DMA requests mode. 562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_DM 563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetDMATransfer(). */ 565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun: 567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data preserved or overwritten. 568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_OV 569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_SetOverrun(). */ 571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef; 573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group injected. 576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group injected. 577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "INJ"). 580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_INJ_Init() 581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 series. However, the different 585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: inte 596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or from external peripheral (timer event, external int 597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** set trigger polarity to rising edge (default set ARM GAS /tmp/ccrO2eGa.s page 12 600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compatibility with some ADC on other STM32 serie 601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** setting set by HW default value). 602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_INJ_SetTriggerEdge(). 604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_INJ_SetTriggerSource(). */ 606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group injected sequencer length. 608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_INJ_SetSequencerLength(). */ 611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: s 613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and scan conversions interrupted every selected number 614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group injec 616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** enabled (scan length of 2 ranks or more). 617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_INJ_SetSequencerDiscont(). */ 619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent 621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular. 622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: This parameter must be set to set to independent 624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger source is set to an external trigger. 625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_INJ_SetTrigAuto(). */ 627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_INJ_InitTypeDef; 629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */ 634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/ 636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants 637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags 641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Flags defines which can be used with LL_ADC_ReadReg function 642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /*!< ADC flag ADC instance ready */ 645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC flag ADC group regular end o 646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion */ 647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC flag ADC group regular end o 648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions */ 649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC flag ADC group regular overr 650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC flag ADC group regular end o 651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC flag ADC group injected end 652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion */ 653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC flag ADC group injected end 654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions */ 655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC flag ADC group injected cont 656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** overflow */ ARM GAS /tmp/ccrO2eGa.s page 13 657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC flag ADC analog watchdog 1 * 658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC flag ADC analog watchdog 2 * 659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC flag ADC analog watchdog 3 * 660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /*!< ADC flag ADC multimode master in 662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /*!< ADC flag ADC multimode slave ins 663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /*!< ADC flag ADC multimode master gr 664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** unitary conversion */ 665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /*!< ADC flag ADC multimode slave gro 666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** unitary conversion */ 667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /*!< ADC flag ADC multimode master gr 668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sequence conversions */ 669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /*!< ADC flag ADC multimode slave gro 670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sequence conversions */ 671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /*!< ADC flag ADC multimode master gr 672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** overrun */ 673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /*!< ADC flag ADC multimode slave gro 674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** overrun */ 675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /*!< ADC flag ADC multimode master gr 676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phase */ 677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /*!< ADC flag ADC multimode slave gro 678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phase */ 679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /*!< ADC flag ADC multimode master gr 680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** unitary conversion */ 681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /*!< ADC flag ADC multimode slave gro 682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** unitary conversion */ 683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /*!< ADC flag ADC multimode master gr 684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sequence conversions */ 685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /*!< ADC flag ADC multimode slave gro 686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sequence conversions */ 687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /*!< ADC flag ADC multimode master gr 688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** contexts queue overflow */ 689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /*!< ADC flag ADC multimode slave gro 690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** contexts queue overflow */ 691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /*!< ADC flag ADC multimode master an 692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC master */ 693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /*!< ADC flag ADC multimode slave ana 694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC slave */ 695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /*!< ADC flag ADC multimode master an 696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC master */ 697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /*!< ADC flag ADC multimode slave ana 698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC slave */ 699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /*!< ADC flag ADC multimode master an 700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC master */ 701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /*!< ADC flag ADC multimode slave ana 702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of the ADC slave */ 703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable) 709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions 710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /*!< ADC interruption ADC instance re 713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOC ADC_IER_EOCIE /*!< ADC interruption ADC group regul ARM GAS /tmp/ccrO2eGa.s page 14 714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion */ 715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOS ADC_IER_EOSIE /*!< ADC interruption ADC group regul 716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions */ 717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_OVR ADC_IER_OVRIE /*!< ADC interruption ADC group regul 718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC interruption ADC group regul 719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** phase */ 720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOC ADC_IER_JEOCIE /*!< ADC interruption ADC group injec 721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion */ 722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOS ADC_IER_JEOSIE /*!< ADC interruption ADC group injec 723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions */ 724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /*!< ADC interruption ADC group injec 725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** overflow */ 726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /*!< ADC interruption ADC analog watc 727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /*!< ADC interruption ADC analog watc 728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /*!< ADC interruption ADC analog watc 729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose 734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with */ 737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* DMA transfer. */ 738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */ 739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000UL) /* ADC group regular conversion data 740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (corresponding to register DR) to be used with ADC confi 741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mode. Without DMA transfer, register accessed by LL func 742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_ReadConversionData32() and other 743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** functions @ref LL_ADC_REG_ReadConversionDatax() */ 744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001UL) /* ADC group regular conversion data 746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (corresponding to register CDR) to be used with ADC conf 747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (available on STM32 devices with several ADC instances). 748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Without DMA transfer, register accessed by LL function 749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_REG_ReadMultiConversionData32() */ 750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source 756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /*!< ADC synchrono 759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AHB clock without prescaler */ 760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1) /*!< ADC synchrono 761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AHB clock with prescaler division by 2 */ 762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0) /*!< ADC synchrono 763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AHB clock with prescaler division by 4 */ 764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000UL) /*!< ADC asynchronou 765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler */ 766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronou 767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 2 */ 768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronou 769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 4 */ 770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronou ARM GAS /tmp/ccrO2eGa.s page 15 771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 6 */ 772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronou 773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 8 */ 774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronou 775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 10 */ 776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronou 777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 12 */ 778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 \ 779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_PRESC_0) /*!< ADC asynchrono 780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 16 */ 781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronou 782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 32 */ 783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronou 784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 64 */ 785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronou 786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 128 */ 787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 \ 788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_PRESC_0) /*!< ADC asynchrono 789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** prescaler division by 256 */ 790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels 795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available */ 798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (connections to other peripherals). */ 799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If they are not listed below, they do not require any specific */ 800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* path enable. In this case, Access to measurement path is done */ 801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* only by selecting the corresponding ADC internal channel. */ 802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all disa 803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to intern 804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_VSENSESEL) /*!< ADC measurement path to intern 805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** temperature sensor */ 806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATSEL) /*!< ADC measurement path to intern 807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution 812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B (0x00000000UL) /*!< ADC resolution 815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /*!< ADC resolution 816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /*!< ADC resolution 817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!< ADC resolution 818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment 823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT (0x00000000UL) /*!< ADC conversion data alignment: r 826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (alignment on data register LSB bit 0)*/ 827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /*!< ADC conversion data alignment: l ARM GAS /tmp/ccrO2eGa.s page 16 828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (alignment on data register MSB bit 15)*/ 829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode 834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE (0x00000000UL) /*!< No ADC low power mode activated 837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /*!< ADC low power mode auto delay: D 838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mode, ADC conversions are performed only when necessary 839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (when previous ADC conversion data is read). 840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** See description with function @ref LL_ADC_SetLowPowerMod 841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset instance 846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /*!< ADC offset instance 1: ADC chann 849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to which the offset programmed will be applied (independ 850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mapped on ADC group regular or injected) */ 851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /*!< ADC offset instance 2: ADC chann 852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to which the offset programmed will be applied (independ 853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mapped on ADC group regular or injected) */ 854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /*!< ADC offset instance 3: ADC chann 855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to which the offset programmed will be applied (independ 856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mapped on ADC group regular or injected) */ 857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /*!< ADC offset instance 4: ADC chann 858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to which the offset programmed will be applied (independ 859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mapped on ADC group regular or injected) */ 860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state 865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_DISABLE (0x00000000UL) /*!< ADC offset disabled 868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (setting offset instance wise) */ 869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /*!< ADC offset enabled 870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (setting offset instance wise) */ 871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGN ADC instance - Offset sign 876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_NEGATIVE (0x00000000UL) /*!< ADC offset is negative */ 879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_POSITIVE (ADC_OFR1_OFFSETPOS) /*!< ADC offset is positive */ 880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SATURATION ADC instance - Offset saturation mode ARM GAS /tmp/ccrO2eGa.s page 17 885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset saturation is disable 888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** selected offset instance 1, 2, 3 or 4) */ 889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_ENABLE (ADC_OFR1_SATEN) /*!< ADC offset saturation is enabled 890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** selected offset instance 1, 2, 3 or 4) */ 891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups 895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on 898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_INJECTED (0x00000002UL) /*!< ADC group injected (not availabl 899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** devices)*/ 900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003UL) /*!< ADC both groups regular and inje 901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number 906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER | ADC_CHANNEL_0_SMP \ 909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_0_BITFIELD) /*!< AD 910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER | ADC_CHANNEL_1_SMP \ 911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_1_BITFIELD) /*!< AD 912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER | ADC_CHANNEL_2_SMP \ 913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_2_BITFIELD) /*!< AD 914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER | ADC_CHANNEL_3_SMP \ 915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_3_BITFIELD) /*!< AD 916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER | ADC_CHANNEL_4_SMP \ 917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_4_BITFIELD) /*!< AD 918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER | ADC_CHANNEL_5_SMP \ 919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_5_BITFIELD) /*!< AD 920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER | ADC_CHANNEL_6_SMP \ 921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_6_BITFIELD) /*!< AD 922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER | ADC_CHANNEL_7_SMP \ 923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_7_BITFIELD) /*!< AD 924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER | ADC_CHANNEL_8_SMP \ 925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_8_BITFIELD) /*!< AD 926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER | ADC_CHANNEL_9_SMP \ 927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_9_BITFIELD) /*!< AD 928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_SMP \ 929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_10_BITFIELD) /*!< AD 930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_SMP \ 931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_11_BITFIELD) /*!< AD 932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_SMP \ 933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_12_BITFIELD) /*!< AD 934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_SMP \ 935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_13_BITFIELD) /*!< AD 936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_SMP \ 937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_14_BITFIELD) /*!< AD 938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_SMP \ 939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_15_BITFIELD) /*!< AD 940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_SMP | \ 941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_16_BITFIELD) /*!< ADC ARM GAS /tmp/ccrO2eGa.s page 18 942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_SMP | \ 943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_17_BITFIELD) /*!< ADC 944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_SMP | \ 945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_18_BITFIELD) /*!< ADC 946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to VrefInt: Internal voltage reference. 948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** On this STM32 series, ADC channel available on all insta 949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to internal temperature sensor. 951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** On this STM32 series, ADC channel available only on ADC1 952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (LL_ADC_CHANNEL_4 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to internal temperature sensor. 954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** On this STM32 series, ADC channel available only on ADC5 955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for ADC5 availability */ 956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to Vbat/3: Vbat voltage through a divider ladd 958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to have channel voltage always below Vdda. On this STM32 959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** available on all ADC instances but ADC2 & ADC4. Refer to 960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** for ADC4 availability */ 961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP1 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to OPAMP1 output. 963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** On this STM32 series, ADC channel available only on ADC1 964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP2 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH | \ 965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_INTERNAL_CH_2) /*!< ADC internal channel 966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** output. On this STM32 series, ADC channel available only 967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC2 (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH | \ 968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_INTERNAL_CH_2) /*!< ADC internal channel 969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** output. On this STM32 series, ADC channel available only 970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC3 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH | \ 971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_INTERNAL_CH_2) /*!< ADC internal channel 972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** output. On this STM32 series, ADC channel available only 973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for ADC3 availability */ 974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP4 (LL_ADC_CHANNEL_5 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to OPAMP4 output. On this STM32 series, ADC channel available only on ADC5 instance. 976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for ADC5 & OPAMP4 availability */ 977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP5 (LL_ADC_CHANNEL_3 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to OPAMP5 output. On this STM32 series, ADC channel available only on ADC5 instance. 979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for ADC5 & OPAMP5 availability */ 980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP6 (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH | \ 981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_INTERNAL_CH_2) /*!< AD 982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to OPAMP6 output. 983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** On this STM32 series, ADC channel available only on ADC4 984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for ADC4 & OPAMP6 availability 985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source 990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE (0x00000000UL) /* 993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger internal: SW start. */ 994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 | \ 995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM1 TRGO. 997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | \ ARM GAS /tmp/ccrO2eGa.s page 19 999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM1 TRGO2. 1001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM1 channe 1004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM1 channe 1010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM1 channe 1016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | \ 1019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM2 TRGO. 1021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH1 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | \ 1023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< 1025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM2 channe 1026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM2 channe 1033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM2 channe 1039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM3 TRGO. 1045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM3 channe 1048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | \ 1053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM3 channe ARM GAS /tmp/ccrO2eGa.s page 20 1056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | \ 1061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM4 TRGO. 1063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH1 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | \ 1065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM4 channe 1067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | \ 1072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM4 channe 1074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | \ 1079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM6 TRGO. 1081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM7_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT 1084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM7 TRGO. 1085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | \ 1087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM8 TRGO. 1089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM8 TRGO2. 1092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_CH1 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM8 channe 1096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | \ 1101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM15 TRGO. 1103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO (ADC_CFGR_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*! 1105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM20 TRGO. 1106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_0 | \ 1110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM20 TRGO2 1112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). ARM GAS /tmp/ccrO2eGa.s page 21 1113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | \ 1116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM20 chann 1118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | \ 1123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM20 chann 1125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances, and TIM20 is not available on all devi 1129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | \ 1131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: TIM20 chann 1133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** compare: input capture or output capture). 1134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances, and TIM20 is not available on all devi 1137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | \ 1139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | \ 1145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances, and HRTIM is not available on all de 1150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | \ 1152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | \ 1158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances, and HRTIM is not available on all de 1163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | \ 1165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al ARM GAS /tmp/ccrO2eGa.s page 22 1170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | \ 1191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: HRTIMER ADC 1199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Refer to device datasheet for more details */ 1202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | \ 1203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: external in 1205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC1/2 instances */ 1208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | \ 1209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: external in 1211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC3/4/5 instances. Refer to device datasheet for ADCx a 1214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | \ 1215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | \ 1216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_REG_TRIG_EXT_EDGE_DEFAULT) /* 1217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger from external peripheral: LPTIMER OUT 1218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge 1224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING (ADC_CFGR_EXTEN_0) /*!< ADC group r ARM GAS /tmp/ccrO2eGa.s page 23 1227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to rising edge */ 1228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1) /*!< ADC group r 1229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to falling edge */ 1230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 | ADC_CFGR_EXTEN_0) /*!< ADC group r 1231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to both rising and falling edges */ 1232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SAMPLING_MODE ADC group regular - Sampling mode 1237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_NORMAL (0x00000000UL) /*!< ADC conversions sam 1240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** is defined using @ref ADC_LL_EC_CHANNEL_SAMPLINGTIME */ 1241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_BULB (ADC_CFGR2_BULB) /*!< ADC conversions sam 1242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** immediately after end of conversion, and stops upon trig 1243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: First conversion is using minimal sampling time 1244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (see @ref ADC_LL_EC_CHANNEL_SAMPLINGTIME) */ 1245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED (ADC_CFGR2_SMPTRIG) /*!< ADC conversions sam 1246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** controlled by trigger events: trigger rising edge for st 1247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger falling edge for stop sampling and start convers 1248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode 1253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE (0x00000000UL) /*!< ADC conversions performed in sin 1256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** one conversion per trigger */ 1257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /*!< ADC conversions performed in con 1258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** after the first trigger, following conversions launched 1259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** automatically */ 1260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data 1265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000UL) /*!< ADC conversions are not transfer 1268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED (ADC_CFGR_DMAEN) /*!< ADC conversion data are transfer 1269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** in limited mode (one shot mode): DMA transfer requests a 1270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** number of DMA data transfers (number of ADC conversions) 1271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This ADC mode is intended to be used with DMA mode non-c 1272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG | ADC_CFGR_DMAEN) /*!< ADC conversio 1273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** transferred by DMA, in unlimited mode: DMA transfer requ 1274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** whatever number of DMA data transferred (number of ADC c 1275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This ADC mode is intended to be used with DMA mode circu 1276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 1281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_SAMPLINGTIME_COMMON_CONFIG ADC instance - ADC sampling time common configur 1282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 24 1284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_DEFAULT (0x00000000UL) /*!< ADC sampling time let to d 1285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 (ADC_SMPR1_SMPPLUS) /*!< ADC additional sampling ti 1286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** cycles replacing 2.5 ADC clock cycles (this applies to a 1287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with selection sampling time 2.5 ADC clock cycles, whate 1288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** on ADC groups regular or injected). */ 1289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_SMPR1_SMPPLUS */ 1293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d 1295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000UL) /*!< ADC group regular behavior in ca 1298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data preserved */ 1299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /*!< ADC group regular behavior in ca 1300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data overwritten */ 1301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length 1306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group regular se 1309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (equivalent to sequencer of 1 rank: ADC conversion on on 1310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS (ADC_SQR1_L_0) /*!< ADC group regular se 1311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 2 ranks in the sequence */ 1312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS (ADC_SQR1_L_1) /*!< ADC group regular se 1313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 3 ranks in the sequence */ 1314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS (ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular se 1315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 4 ranks in the sequence */ 1316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS (ADC_SQR1_L_2) /*!< ADC group regular se 1317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 5 ranks in the sequence */ 1318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS (ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular se 1319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 6 ranks in the sequence */ 1320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS (ADC_SQR1_L_2 | ADC_SQR1_L_1) /*!< ADC group regular seq 1321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 7 ranks in the sequence */ 1322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS (ADC_SQR1_L_2 | ADC_SQR1_L_1 \ 1323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR1_L_0) /*!< ADC group regular s 1324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 8 ranks in the sequence */ 1325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3) /*!< ADC group regular se 1326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 9 ranks in the sequence */ 1327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_0) /*!< ADC group regular se 1328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 10 ranks in the sequence */ 1329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1) /*!< ADC group regular se 1330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 11 ranks in the sequence */ 1331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 \ 1332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR1_L_0) /*!< ADC group regular s 1333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 12 ranks in the sequence */ 1334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2) /*!< ADC group regular se 1335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 13 ranks in the sequence */ 1336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 \ 1337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR1_L_0) /*!< ADC group regular s 1338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 14 ranks in the sequence */ 1339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 \ 1340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR1_L_1) /*!< ADC group regular s ARM GAS /tmp/ccrO2eGa.s page 25 1341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 15 ranks in the sequence */ 1342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 \ 1343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular s 1344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 16 ranks in the 1345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode 1350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group r 1353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode disable */ 1354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK (ADC_CFGR_DISCEN) /*!< ADC group r 1355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_2RANKS (ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) /*!< ADC group r 1357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enabled with sequence interruption ev 1358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_3RANKS (ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCEN) /*!< ADC group r 1359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_4RANKS (ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCNUM_0 \ 1361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_DISCEN) /*!< ADC group 1362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCEN) /*!< ADC group 1364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_0 \ 1366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_DISCEN) /*!< ADC group 1367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 \ 1369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_DISCEN) /*!< ADC group 1370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 \ 1372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) /*!< ADC group 1373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** discontinuous mode enable with sequence interruption eve 1374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks 1379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_1_SQRX_BITOFFSET_POS) 1382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 1 */ 1383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_2_SQRX_BITOFFSET_POS) 1384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 2 */ 1385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_3_SQRX_BITOFFSET_POS) 1386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 3 */ 1387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_4_SQRX_BITOFFSET_POS) 1388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 4 */ 1389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_5_SQRX_BITOFFSET_POS) 1390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 5 */ 1391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_6_SQRX_BITOFFSET_POS) 1392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 6 */ 1393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_7_SQRX_BITOFFSET_POS) 1394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 7 */ 1395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_8_SQRX_BITOFFSET_POS) 1396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 8 */ 1397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_9_SQRX_BITOFFSET_POS) ARM GAS /tmp/ccrO2eGa.s page 26 1398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 9 */ 1399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_10_SQRX_BITOFFSET_POS 1400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 10 */ 1401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_11_SQRX_BITOFFSET_POS 1402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 11 */ 1403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_12_SQRX_BITOFFSET_POS 1404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 12 */ 1405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_13_SQRX_BITOFFSET_POS 1406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 13 */ 1407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_14_SQRX_BITOFFSET_POS 1408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 14 */ 1409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_15_SQRX_BITOFFSET_POS 1410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 15 */ 1411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_16_SQRX_BITOFFSET_POS 1412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular sequencer rank 16 */ 1413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source 1418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000UL) /* 1421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion trigger internal: SW start. */ 1422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | \ 1429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 3 event (capture compare: input capture or outpu 1432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. Refer to device datasheet for ADCx availabili 1435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | \ 1443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 1 event (capture compare: input capture or outpu 1446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances */ 1449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | \ 1450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | \ 1454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) ARM GAS /tmp/ccrO2eGa.s page 27 1455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 1 event (capture compare: input capture or outpu 1457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances */ 1460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | \ 1461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 3 event (capture compare: input capture or outpu 1464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances */ 1467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances */ 1473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | \ 1474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 3 event (capture compare: input capture or outpu 1480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. Refer to device datasheet for ADCx availabili 1483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | \ 1484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. Refer to device datasheet for ADCx availabili 1490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | \ 1491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM7_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_E 1496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | \ 1499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | \ 1503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | \ 1507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 2 event (capture compare: input capture or outpu 1510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on ARM GAS /tmp/ccrO2eGa.s page 28 1512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. Refer to device datasheet for ADCx availabili 1513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | \ 1514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | \ 1519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_E 1520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). */ 1522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_E 1524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances */ 1529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_0 | \ 1535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | \ 1541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 2 event (capture compare: input capture or outpu 1544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC3/4/5 instances. On this ST 1546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** not available on all devices. Refer to device datasheet 1547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | \ 1548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel 4 event (capture compare: input capture or outpu 1551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger edge set to rising edge (default setting). 1552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC1/2 instances. On this STM3 1553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** not available on all devices. Refer to device datasheet 1554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_E 1556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC trigger 1 event. Trigger edge set to rising edge (de 1558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances, and HRTIM is not available on all devices. Re 1560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** datasheet for more details */ 1561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | \ 1562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 2 event. Trigger edge set to rising edge (defaul 1565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) ARM GAS /tmp/ccrO2eGa.s page 29 1569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC trigger 3 event. Trigger edge set to rising edge (de 1571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances, and HRTIM is not available on all devices. Re 1573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** datasheet for more details */ 1574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | \ 1575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 4 event. Trigger edge set to rising edge (defaul 1578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | \ 1581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 5 event. Trigger edge set to rising edge (defaul 1584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | \ 1587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 6 event. Trigger edge set to rising edge (defaul 1590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | \ 1593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_E 1594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 7 event. Trigger edge set to rising edge (defaul 1596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 8 event. Trigger edge set to rising edge (defaul 1602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 9 event. Trigger edge set to rising edge (defaul 1608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger 10 event. Trigger edge set to rising edge (defau 1614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** device datasheet for more details */ 1616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | \ 1617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** interrupt line 3. Trigger edge set to rising edge (defau 1620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. Refer to device datasheet for ADCx availabili 1622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | \ 1623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** interrupt line 15. Trigger edge set to rising edge (defa ARM GAS /tmp/ccrO2eGa.s page 30 1626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances. */ 1628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | \ 1629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_E 1630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** event. Trigger edge set to rising edge (default setting) 1632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge 1637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /*!< ADC group i 1640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to rising edge */ 1641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /*!< ADC group i 1642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to falling edge */ 1643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 | ADC_JSQR_JEXTEN_0) /*!< ADC group i 1644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** trigger polarity set to both rising and falling edges */ 1645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode 1650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000UL) /*!< ADC group injected conversion tr 1653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Setting mandatory if ADC group injected injected trigger 1654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** an external trigger. */ 1655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /*!< ADC group injected conversion tr 1656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular. Setting compliant only with group injected trig 1657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SW start, without any further action on ADC group injec 1658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or stop: in this case, ADC group injected is controlled 1659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular. */ 1660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode 1665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000UL) /* Group injected sequence context 1668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and can contain up to 2 contexts. When all contexts have 1669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** the queue maintains the last context active perpetually. 1670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence context 1671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and can contain up to 2 contexts. When all contexts have 1672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** the queue is empty and injected group triggers are disab 1673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence context 1674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** only 1 sequence can be configured and is active perpetua 1675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length 1680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group injected ARM GAS /tmp/ccrO2eGa.s page 31 1683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (equivalent to sequencer of 1 rank: ADC conversion on on 1684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /*!< ADC group injected 1685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 2 ranks in the sequence */ 1686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /*!< ADC group injected 1687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 3 ranks in the sequence */ 1688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected 1689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with 4 ranks in the sequence */ 1690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode 1695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group injected sequencer dis 1698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** disable */ 1699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /*!< ADC group injected sequencer dis 1700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** enable with sequence interruption every rank */ 1701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks 1706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET \ 1709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) /*!< ADC group inj 1710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET \ 1711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) /*!< ADC group inj 1712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET \ 1713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) /*!< ADC group inj 1714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET \ 1715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) /*!< ADC group inj 1716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time 1721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000UL) /*!< Sampling time 2.5 ADC clock cy 1724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_6CYCLES_5 (ADC_SMPR2_SMP10_0) /*!< Sampling time 6.5 ADC clock cy 1725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_12CYCLES_5 (ADC_SMPR2_SMP10_1) /*!< Sampling time 12.5 ADC clock c 1726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_24CYCLES_5 (ADC_SMPR2_SMP10_1 \ 1727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SMPR2_SMP10_0) /*!< Sampling time 24.5 ADC clock 1728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2) /*!< Sampling time 47.5 ADC clock c 1729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 \ 1730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SMPR2_SMP10_0) /*!< Sampling time 92.5 ADC clock 1731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 \ 1732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SMPR2_SMP10_1) /*!< Sampling time 247.5 ADC clock 1733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 \ 1734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SMPR2_SMP10_1 \ 1735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SMPR2_SMP10_0) /*!< Sampling time 640.5 ADC clock 1736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 32 1740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending 1741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /*!< A 1744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** set to single ended (literal also used to set calibratio 1745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF | ADC_CALFACT_CALFACT_D) /*!< A 1746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** set to differential (literal also used to set calibratio 1747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED | LL_ADC_DIFFERENTIAL_ENDED) /*!< A 1748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** set to both single ended and differential (literal used 1749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** calibration factors) */ 1750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number 1755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \ 1758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_AWD_CR1_REGOFFSET) /*!< ADC analog watchdog numbe 1759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK \ 1760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_AWD_CR2_REGOFFSET) /*!< ADC analog watchdog numbe 1761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK \ 1762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog numbe 1763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels 1768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE (0x00000000UL) /*!< ADC analog 1771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** disabled */ 1772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK \ 1773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN) /*!< ADC analo 1774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of all channels, converted by group regular only */ 1775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK \ 1776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN) /*!< ADC analo 1777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of all channels, converted by group injected only */ 1778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK \ 1779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN) /*!< ADC analo 1780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of all channels, converted by either group regular or in 1781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \ 1782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN0, converted by group regular only 1784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \ 1785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN0, converted by group injected onl 1787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \ 1788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN0, converted by either group regul 1791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \ 1792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN1, converted by group regular only 1794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \ 1795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN1, converted by group injected onl ARM GAS /tmp/ccrO2eGa.s page 33 1797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \ 1798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN1, converted by either group regul 1801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \ 1802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN2, converted by group regular only 1804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \ 1805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN2, converted by group injected onl 1807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \ 1808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN2, converted by either group regul 1811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \ 1812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN3, converted by group regular only 1814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \ 1815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN3, converted by group injected onl 1817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \ 1818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN3, converted by either group regul 1821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \ 1822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN4, converted by group regular only 1824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \ 1825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN4, converted by group injected onl 1827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \ 1828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN4, converted by either group regul 1831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \ 1832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN5, converted by group regular only 1834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \ 1835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN5, converted by group injected onl 1837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \ 1838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN5, converted by either group regul 1841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \ 1842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN6, converted by group regular only 1844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \ 1845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN6, converted by group injected onl 1847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \ 1848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN6, converted by either group regul 1851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \ 1852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN7, converted by group regular only ARM GAS /tmp/ccrO2eGa.s page 34 1854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \ 1855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN7, converted by group injected onl 1857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \ 1858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN7, converted by either group regul 1861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \ 1862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN8, converted by group regular only 1864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \ 1865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN8, converted by group injected onl 1867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \ 1868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN8, converted by either group regul 1871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \ 1872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN9, converted by group regular only 1874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \ 1875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN9, converted by group injected onl 1877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \ 1878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN9, converted by either group regul 1881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \ 1882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN10, converted by group regular onl 1884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \ 1885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN10, converted by group injected on 1887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK)\ 1888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN10, converted by either group regu 1891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \ 1892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN11, converted by group regular onl 1894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \ 1895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN11, converted by group injected on 1897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \ 1898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN11, converted by either group regu 1901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \ 1902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN12, converted by group regular onl 1904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \ 1905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN12, converted by group injected on 1907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \ 1908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN12, converted by either group regu ARM GAS /tmp/ccrO2eGa.s page 35 1911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \ 1912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN13, converted by group regular onl 1914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \ 1915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN13, converted by group injected on 1917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \ 1918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN13, converted by either group regu 1921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \ 1922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN14, converted by group regular onl 1924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \ 1925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN14, converted by group only */ 1927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \ 1928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN14, converted by either group regu 1931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \ 1932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** monitoring of ADC channel ADCx_IN15, converted by group 1934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \ 1935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN15, converted by group injected on 1937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \ 1938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN15, converted by either group 1941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular or injected */ 1942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \ 1943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN16, converted by group regular onl 1945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \ 1946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN16, converted by group injected on 1948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \ 1949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN16, converted by either group regu 1952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \ 1953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN17, converted by group regular onl 1955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \ 1956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN17, converted by group injected on 1958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \ 1959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN17, converted by either group regu 1962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \ 1963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN18, converted by group regular onl 1965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \ 1966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN18, converted by group injected on ARM GAS /tmp/ccrO2eGa.s page 36 1968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \ 1969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC channel ADCx_IN18, converted by either group regu 1972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \ 1973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to VrefInt: Internal 1975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage reference, converted by group regular only */ 1976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \ 1977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to VrefInt: Internal 1979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage reference, converted by group injected only */ 1980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \ 1981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to VrefInt: Internal 1984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage reference, converted by either group regular or 1985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_MAS 1986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 1987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC1 internal channel connected to internal temperatu 1988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by group regular only */ 1989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_MAS 1990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) 1991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC1 internal channel connected to internal temperatu 1992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by group injected only */ 1993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_MAS 1994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 1995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 1996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC1 internal channel connected to internal temperatu 1997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by either group regular or injected */ 1998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_MAS 1999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC5 internal channel connected to internal temperatu 2001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by group regular only */ 2002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_MAS 2003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL 2004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC5 internal channel connected to internal temperatu 2005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by group injected only */ 2006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_MAS 2007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC5 internal channel connected to internal temperatu 2010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** converted by either group regular or injected */ 2011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \ 2012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to Vbat/3: Vbat 2014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage through a divider ladder of factor 1/3 to have c 2015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Vdda, converted by group regular only */ 2016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \ 2017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to Vbat/3: Vbat 2019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage through a divider ladder of factor 1/3 to have c 2020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Vdda, converted by group injected only */ 2021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \ 2022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to Vbat/3: Vbat ARM GAS /tmp/ccrO2eGa.s page 37 2025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** voltage through a divider ladder of factor 1/3 to have c 2026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Vdda */ 2027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) \ 2028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP1 output, 2030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC1, converted by group regular onl 2031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) \ 2032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP1 output, 2034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC1, converted by group injected on 2035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) \ 2036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP1 output, 2039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC1, converted by either group regu 2040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) \ 2041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by group regular onl 2043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) \ 2044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP2 output, 2046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by group injected on 2047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) \ 2048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP2 output, 2051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by either group regu 2052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) \ 2053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by group regular onl 2056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) \ 2057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by group injected on 2060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) \ 2061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC2, converted by either group regu 2065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) \ 2066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC3, converted by group regular onl 2069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) \ 2070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC3, converted by group injected on 2073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) \ 2074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP3 output, 2077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC3, converted by either group regu 2078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) \ 2079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP4 output, 2081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by group regular onl ARM GAS /tmp/ccrO2eGa.s page 38 2082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) \ 2083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP4 output, 2085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by group injected on 2086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) \ 2087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP4 output, 2090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by either group regu 2091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) \ 2092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP5 output, 2094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by group regular onl 2095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) \ 2096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP5 output, 2098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by group injected on 2099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) \ 2100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP5 output, 2103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC5, converted by either group regu 2104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) \ 2105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP6 output, 2107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC4, converted by group regular onl 2108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) \ 2109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) /*!< ADC analo 2110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP6 output, 2111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC4, converted by group injected on 2112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) \ 2113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN \ 2114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR_AWD1SGL) /*!< ADC analo 2115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** of ADC internal channel connected to OPAMP6 output, 2116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** channel specific to ADC4, converted by either group regu 2117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds 2122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1) /*!< ADC analog watchdog threshold hi 2125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW (ADC_TR1_LT1) /*!< ADC analog watchdog threshold lo 2126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 \ 2127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_TR1_LT1) /*!< ADC analog watchdog both thresh 2128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** concatenated into the same data */ 2129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_FILTERING_CONFIG Analog watchdog - filtering config 2134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_NONE (0x00000000UL) /*!< ADC analog 2137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** one out-of-window sample is needed to raise flag or inte 2138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_2SAMPLES (ADC_TR1_AWDFILT_0) /*!< ADC analog ARM GAS /tmp/ccrO2eGa.s page 39 2139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** out-of-window samples are needed to raise flag or interr 2140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_3SAMPLES (ADC_TR1_AWDFILT_1) /*!< ADC analog 2141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_4SAMPLES (ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT_0) /*!< ADC analog 2143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_5SAMPLES (ADC_TR1_AWDFILT_2) /*!< ADC analog 2145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_6SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_0) /*!< ADC analog 2147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_7SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1) /*!< ADC analog 2149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_8SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 \ 2151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_TR1_AWDFILT_0) /*!< ADC analog 2152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** consecutives out-of-window samples are needed to raise f 2153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope 2158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE (0x00000000UL) /*!< ADC oversamplin 2161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED (ADC_CFGR2_ROVSE) /*!< ADC oversamplin 2162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular. If group injected interrupts group re 2163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** when ADC group injected is triggered, the oversampling o 2164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** is temporary stopped and continued afterwards. */ 2165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM | ADC_CFGR2_ROVSE) /*!< ADC oversamplin 2166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular. If group injected interrupts group re 2167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** when ADC group injected is triggered, the oversampling o 2168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** is resumed from start (oversampler buffer reset). */ 2169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJECTED (ADC_CFGR2_JOVSE) /*!< ADC oversamplin 2170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected. */ 2171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJ_REG_RESUMED (ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE) /*!< ADC oversamplin 2172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** both ADC groups regular and injected. If group injected 2173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular: when ADC group injected is triggered, the overs 2174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular is resumed from start (oversampler buffer reset) 2175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode 2180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT (0x00000000UL) /*!< ADC oversampling discontinuous m 2183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (all conversions of oversampling ratio are done from 1 trigger) */ 2184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /*!< ADC oversampling discontinuous m 2185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** mode (each conversion of oversampling ratio needs a trig 2186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio 2191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2 (0x00000000UL) /*!< ADC oversampl 2194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ ARM GAS /tmp/ccrO2eGa.s page 40 2196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4 (ADC_CFGR2_OVSR_0) /*!< ADC oversampl 2197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8 (ADC_CFGR2_OVSR_1) /*!< ADC oversampl 2200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16 (ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) /*!< ADC oversampl 2203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2) /*!< ADC oversampl 2206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_0) /*!< ADC oversampl 2209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1) /*!< ADC oversampl 2212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 \ 2215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR2_OVSR_0) /*!< ADC oversamp 2216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of conversions data computed to result as oversampl 2217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (before potential shift) */ 2218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data right shift 2223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE (0x00000000UL) /*!< ADC oversampl 2226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data is not divided to resul 2227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversion data) */ 2228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1 (ADC_CFGR2_OVSS_0) /*!< ADC oversampl 2229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2 (ADC_CFGR2_OVSS_1) /*!< ADC oversampl 2232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3 (ADC_CFGR2_OVSS_1 | ADC_CFGR2_OVSS_0) /*!< ADC oversampl 2235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4 (ADC_CFGR2_OVSS_2) /*!< ADC oversampl 2238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5 (ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_0) /*!< ADC oversampl 2241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6 (ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1) /*!< ADC oversampl 2244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7 (ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 \ 2247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CFGR2_OVSS_0) /*!< ADC oversamp 2248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ 2250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3) /*!< ADC oversampl 2251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (sum of the ADC conversions data (after OVS ratio) is di 2252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to result as oversampling conversion data) */ ARM GAS /tmp/ccrO2eGa.s page 41 2253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode 2259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_INDEPENDENT (0x00000000UL) /*!< ADC dual mode dis 2262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** independent mode) */ 2263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIMULT (ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1) /*!< ADC dual mode ena 2264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** simultaneous */ 2265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INTERL (ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 \ 2266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_DUAL_0) /*!< ADC dual mode e 2267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular interleaved */ 2268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_SIMULT (ADC_CCR_DUAL_2 | ADC_CCR_DUAL_0) /*!< ADC dual mode ena 2269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** simultaneous */ 2270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 | ADC_CCR_DUAL_0) /*!< ADC dual mode ena 2271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** alternate trigger. Works only with external triggers (no 2272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM (ADC_CCR_DUAL_0) /*!< ADC dual mode ena 2273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular simultaneous + group injected simultaneous */ 2274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT (ADC_CCR_DUAL_1) /*!< ADC dual mode ena 2275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular simultaneous + group injected alternate trigger 2276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM (ADC_CCR_DUAL_1 | ADC_CCR_DUAL_0) /*!< ADC dual mode ena 2277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regular interleaved + group injected simultaneous */ 2278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer 2283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000UL) /*!< ADC multimode g 2286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are transferred by DMA: each ADC uses its 2287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** with its individual DMA transfer settings */ 2288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B (ADC_CCR_MDMA_1) /*!< ADC multimode g 2289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are transferred by DMA, one DMA channel fo 2290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC master), in limited mode (one shot mode): DMA tran 2291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** are stopped when number of DMA data transfers (number 2292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** is reached. This ADC mode is intended to be used with 2293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** non-circular. Setting for ADC resolution of 12 and 10 2294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B (ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*!< ADC multimode g 2295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are transferred by DMA, one DMA channel fo 2296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC master), in limited mode (one shot mode): DMA tran 2297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** are stopped when number of DMA data transfers (number 2298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** is reached. This ADC mode is intended to be used with 2299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** non-circular. Setting for ADC resolution of 8 and 6 bi 2300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1) /*!< ADC multimode g 2301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are transferred by DMA, one DMA channel fo 2302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC master), in unlimited mode: DMA transfer requests 2303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** whatever number of DMA data transferred (number of ADC 2304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This ADC mode is intended to be used with DMA mode cir 2305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Setting for ADC resolution of 12 and 10 bits */ 2306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 \ 2307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_MDMA_0) /*!< ADC multimode 2308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** conversions are transferred by DMA, one DMA channel fo 2309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC master), in unlimited mode: DMA transfer requests ARM GAS /tmp/ccrO2eGa.s page 42 2310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** whatever number of DMA data transferred (number of ADC 2311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This ADC mode is intended to be used with DMA mode cir 2312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Setting for ADC resolution of 8 and 6 bits */ 2313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases 2318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE (0x00000000UL) /*!< ADC multimode d 2321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 1 ADC clock cycle */ 2322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES (ADC_CCR_DELAY_0) /*!< ADC multimode d 2323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 2 ADC clock cycles */ 2324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES (ADC_CCR_DELAY_1) /*!< ADC multimode d 2325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 3 ADC clock cycles */ 2326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES (ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0) /*!< ADC multimode d 2327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 4 ADC clock cycles */ 2328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES (ADC_CCR_DELAY_2) /*!< ADC multimode d 2329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 5 ADC clock cycles */ 2330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0) /*!< ADC multimode d 2331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 6 ADC clock cycles */ 2332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1) /*!< ADC multimode d 2333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 7 ADC clock cycles */ 2334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 \ 2335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_DELAY_0) /*!< ADC multimode 2336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 8 ADC clock cycles */ 2337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3) /*!< ADC multimode d 2338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 9 ADC clock cycles */ 2339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0) /*!< ADC multimode d 2340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 10 ADC clock cycles */ 2341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1) /*!< ADC multimode d 2342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 11 ADC clock cycles */ 2343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 \ 2344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CCR_DELAY_0) /*!< ADC multimode 2345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** sampling phases: 12 ADC clock cycles */ 2346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave 2351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER (ADC_CDR_RDATA_MST) /*!< In multimode, selection among s 2354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances: ADC master */ 2355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV) /*!< In multimode, selection among s 2356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances: ADC slave */ 2357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV \ 2358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CDR_RDATA_MST) /*!< In multimode, selection among 2359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** instances: both ADC master and ADC slave */ 2360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HELPER_MACRO Definitions of constants used by helper macro ARM GAS /tmp/ccrO2eGa.s page 43 2367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_TEMPERATURE_CALC_ERROR ((int16_t)0x7FFF) /* Temperature calculation error usin 2370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref __LL_ADC_CALC_TEMPERATURE(), 2371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** calibration parameters. This value 2372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (to fit on signed word or double w 2373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** to an inconsistent temperature val 2374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays 2379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Only ADC peripheral HW delays are defined in ADC LL driver driver, 2380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not timeout values. 2381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For details on delays values, refer to descriptions in source code 2382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * above each literal definition. 2383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */ 2387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* not timeout values. */ 2388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Timeout values for ADC operations are dependent to device clock */ 2389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration (system clock versus ADC clock), */ 2390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and therefore must be defined in user application. */ 2391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Indications for estimation of ADC timeout delays, for this */ 2392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* STM32 series: */ 2393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration time: maximum delay is 112/fADC. */ 2394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tCAL") */ 2395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC enable time: maximum delay is 1 conversion cycle. */ 2396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tSTAB") */ 2397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC disable time: maximum delay should be a few ADC clock cycles */ 2398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC stop conversion time: maximum delay should be a few ADC clock */ 2399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* cycles */ 2400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC conversion time: duration depending on ADC clock and ADC */ 2401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration. */ 2402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device reference manual, section "Timing") */ 2403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time) */ 2405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 2406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tADCVREG_STUP"). */ 2407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 2408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 20UL) /*!< Delay for ADC stabilization time 2409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** regulator start-up time) */ 2410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time. */ 2412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 2413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tstart_vrefint"). */ 2414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 2415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US ( 12UL) /*!< Delay for internal voltage refer 2416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** time */ 2417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for temperature sensor stabilization time. */ 2419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet, */ 2420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tSTART"). */ 2421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 2422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US (120UL) /*!< Delay for temperature sensor sta 2423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_BUFFER_STAB_US ( 15UL) /*!< Delay for temperature sensor buf ARM GAS /tmp/ccrO2eGa.s page 44 2424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** time (starting from ADC enable, 2425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @ref LL_ADC_Enable()) */ 2426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable. */ 2428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: On this STM32 series, a minimum number of ADC clock cycles */ 2429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* are required between ADC end of calibration and ADC enable. */ 2430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Wait time can be computed in user application by waiting for the */ 2431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* equivalent number of CPU cycles, by taking into account */ 2432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ratio of CPU clock versus ADC clock prescalers. */ 2433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: ADC clock cycles. */ 2434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4UL) /*!< Delay required between ADC end o 2435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** and ADC enable */ 2436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/ 2447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros 2448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros 2452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Write a value in ADC register 2457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 2458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be written 2459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VALUE__ Value to be written in the register 2460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 2463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Read a value in ADC register 2466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 2467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be read 2468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Register value 2469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 2471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro 2476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel number in decimal format ARM GAS /tmp/ccrO2eGa.s page 45 2481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from literals LL_ADC_CHANNEL_x. 2482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 2483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4) 2484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return decimal number "4". 2485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The input can be a value from functions where a channel 2486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number is returned, either defined with number 2487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or with bitfield (only one bit must be set). 2488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 2529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 2531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 2533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0 and Max_Data=18 2534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ 2536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0UL) ? \ 2537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ ARM GAS /tmp/ccrO2eGa.s page 46 2538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \ 2539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (uint32_t)POSITION_VAL((__CHANNEL__)) \ 2543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x 2548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from number in decimal format. 2549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 2550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_DECIMAL_NB_TO_CHANNEL(4) 2551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return a data equivalent to "LL_ADC_CHANNEL_4". 2552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18 2553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 2594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock ARM GAS /tmp/ccrO2eGa.s page 47 2595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 2596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 2598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 2599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 2600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 2601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) 2603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DECIMAL_NB__) <= 9UL) ? 2604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 2605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) | 2606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | 2607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR1_REGOFFSET | (((3UL * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) 2608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 2611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 2612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) 2613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR2_REGOFFSET | (((3UL * ((__DECIMAL_NB__) - 10UL))) << ADC_CHANNEL_SMPx_BITOFFSET_PO 2614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the selected channel 2619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to literal definitions of driver. 2620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The different literal definitions of ADC channels are: 2621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC internal channel: 2622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ... 2623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC external channel (channel connected to a GPIO pin): 2624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ... 2625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from literal 2626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 2627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 2628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...), 2629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value from functions where a channel number is 2630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 2631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 2632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 2633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 2634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 ARM GAS /tmp/ccrO2eGa.s page 48 2652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 2675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 2677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 2679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe 2680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** connected to a GPIO pin). 2681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the channel corresponds to a parameter definition of a ADC internal channe 2682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ 2684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0UL) 2685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert a channel defined from parameter 2688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 2689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 2690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to its equivalent parameter definition of a ADC external channel 2691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...). 2692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter can be, additionally to a value 2693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined from parameter definition of a ADC internal channel 2694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...), 2695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a value defined from parameter definition of 2696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 2697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is returned 2698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC registers. 2699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 ARM GAS /tmp/ccrO2eGa.s page 49 2709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 2740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 2742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 2744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 2747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 2748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 2749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 2750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 2751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \ ARM GAS /tmp/ccrO2eGa.s page 50 2766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK) 2767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the internal channel 2770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * selected is available on the ADC instance selected. 2771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from parameter 2772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 2773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 2774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value defined from parameter definition of 2775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 2776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is 2777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 2778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 2779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 2780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 2781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_INSTANCE__ ADC instance 2782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 2804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte 2805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the internal channel selected is available on the ADC instance selected. 2806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) 2808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 2809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 2810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 2812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 2813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ ARM GAS /tmp/ccrO2eGa.s page 51 2823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC4) \ 2834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 2836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC5) \ 2841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP5) || \ 2843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC5) || \ 2844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP4) || \ 2845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G471xx) 2851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 2852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 2853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 2855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 2856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G411xB) || defined(STM32G414xx) || defined(STM32GBK1CB) || defined(STM32G431xx) 2877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 2878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ ARM GAS /tmp/ccrO2eGa.s page 52 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 2881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 2882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G491xx) || defined(STM32G4A1xx) || defined(STM32G411xC) 2895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 2896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 2897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 2899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 2900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 2901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 2906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 2916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* STM32G4xx */ 2921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define ADC analog watchdog parameter: 2924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * define a single channel to monitor with analog watchdog 2925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from sequencer channel and groups definition. 2926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels(). 2927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDMonitChannels( 2929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, LL_ADC_AWD1, 2930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR)) 2931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 2932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) ARM GAS /tmp/ccrO2eGa.s page 53 2937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 2971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 2972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 2974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 2976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 2977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 2978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 2979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __GROUP__ This parameter can be one of the following values: 2980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR 2981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_INJECTED 2982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR_INJECTED 2983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 2985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 2986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 2987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 2988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 2989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 2990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 2991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 2992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 2993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ ARM GAS /tmp/ccrO2eGa.s page 54 2994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 2995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 2996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 2997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 2998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 2999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 3000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 3001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 3002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 3003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 3004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 3005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 3006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 3007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 3008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 3009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 3010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 3011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 3012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 3013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 3014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 3015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 3016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 3017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 3018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 3019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 3020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 3021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 3022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 3023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 3024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 3025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 3026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 3027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 3028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 3029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 3030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 3031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 3032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 3033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 3034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 3035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 3036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 3037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 3038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 3039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 3040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 3041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 3042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 3043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 3044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 3045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 3046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 3047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 3048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 3049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 3050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) ARM GAS /tmp/ccrO2eGa.s page 55 3051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 3052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 3053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 3054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 3055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 3056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 3057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 3058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 3059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 3060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 3061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 3062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 3063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 3064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 3065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 3066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 3067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 3068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 3069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 3070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 3071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 3072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 3073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 3074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 3075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 3076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 3077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 3078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 3080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 3089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) 3091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__GROUP__) == LL_ADC_GROUP_REGULAR) 3092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 3093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 3094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__GROUP__) == LL_ADC_GROUP_INJECTED) 3095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) 3096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 3097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 3098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the value of ADC analog watchdog threshold high 3102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 3103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 3104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds() 3105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or @ref LL_ADC_SetAnalogWDThresholds(). 3106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to set the value of 3107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): ARM GAS /tmp/ccrO2eGa.s page 56 3108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDThresholds 3109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (< ADCx param >, 3110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, > (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 3122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the value of ADC analog watchdog threshold high 3125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 3126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 3127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 3128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to get the value of 3129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 3130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION 3131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_RESOLUTION_8B, 3132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_GetAnalogWDThresholds(, LL_ADC_AWD_THRESHOLD_HIGH) 3133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ); 3134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 3135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF 3140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 3141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \ 3143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 3144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC analog watchdog threshold high 3147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low from raw value containing both thresholds concatenated. 3148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 3149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to get analog watchdog threshold high from the register raw value: 3150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, > (((__AWD_THRESHOLD_TYPE__) & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_ 3159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & LL_ADC_AWD_THRESHOLD_LOW) 3160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the ADC calibration value with both single ended 3163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential modes calibration factors concatenated. 3164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetCalibrationFactor(). ARM GAS /tmp/ccrO2eGa.s page 57 3165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to set calibration factors single ended to 0x55 3166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential ended to 0x2A: 3167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetCalibrationFactor( 3168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, 3169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A)) 3170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F 3171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F 3172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 3173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIA 3175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) | (__CALIB_FACTOR_SINGLE_ENDED__) 3176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 3178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC multimode conversion data of ADC master 3180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or ADC slave from raw value with both ADC conversion data concatenated. 3181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used when multimode transfer by DMA 3182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer(). 3183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In this case the transferred data need to processed with this macro 3184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to separate the conversion data of ADC master and ADC slave. 3185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values: 3186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 3187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 3188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF 3189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 3190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) 3192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_MULTI_CONV_DATA__) >> ((ADC_CDR_RDATA_SLV_Pos) & ~(__ADC_MULTI_MASTER_SLAVE__))) & ADC_C 3193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 3194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 3196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select, from a ADC instance, to which ADC instance 3198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * it has a dependence in multimode (ADC master of the corresponding 3199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance). 3200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of device with multimode available and a mix of 3201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances compliant and not compliant with multimode feature, 3202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances not compliant with multimode feature are 3203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * considered as master instances (do not depend to 3204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * any other ADC instance). 3205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 3206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval __ADCx__ ADC instance master of the corresponding ADC common instance 3207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC5) 3209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 3210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 3211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 3212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 3213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC4) \ 3215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 3216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC3) \ 3217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 3219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else ARM GAS /tmp/ccrO2eGa.s page 58 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 3223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 3226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 3228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC5 */ 3230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 3231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select the ADC common instance 3234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to which is belonging the selected ADC instance. 3235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC common register instance can be used for: 3236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Set parameters common to several ADC instances 3237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Multimode (for devices with several ADC instances) 3238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 3239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 3240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC common register instance 3241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 3243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) \ 3244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADCx__) == ADC1) || ((__ADCx__) == ADC2)) \ 3245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 3246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC12_COMMON) \ 3247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 3250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC345_COMMON) \ 3251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 3254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) (ADC12_COMMON) 3255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC345_COMMON */ 3256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to check if all ADC instances sharing the same 3258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance are disabled. 3259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This check is required by functions with setting conditioned to 3260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 3262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 3263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On devices with only 1 ADC common instance, parameter of this macro 3264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is useless and can be ignored (parameter kept for compatibility 3265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with devices featuring several ADC common instances). 3266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCXY_COMMON__ ADC common instance 3267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if all ADC instances sharing the same ADC common instance 3269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are disabled. 3270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if at least one ADC instance sharing the same ADC common instance 3271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 3272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 3274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC4) && defined(ADC5) 3275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 3276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 3277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 3278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ ARM GAS /tmp/ccrO2eGa.s page 59 3279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 3280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 3283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3) | \ 3284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC4) | \ 3285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC5) ) \ 3286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 3289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 3290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 3291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 3292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 3293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 3294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3)) \ 3297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC4 && ADC5 */ 3299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 3300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 3301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | LL_ADC_IsEnabled(ADC2)) 3302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC345_COMMON */ 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital 3306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * value corresponding to the selected ADC resolution. 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref- 3309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to reference manual). 3310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 3311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion dat 3316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 3318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (0xFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) 3319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from 3322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a resolution to another resolution. 3323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted 3324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted 3325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 3326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion 3331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 3332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B ARM GAS /tmp/ccrO2eGa.s page 60 3336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution 3337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\ 3339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\ 3340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \ 3341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DATA__) \ 3342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) \ 3343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)) \ 3344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt) 3348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value). 3349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 3350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 3351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 3352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 3353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (resolution 12 bits) 3354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value). 3355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 3356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt) 3361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\ 3363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_DATA__,\ 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 3365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \ 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt) 3371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value) in 3372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential ended mode. 3373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC data from ADC data register is unsigned and centered around 3374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * middle code in. Converted voltage can be positive or negative 3375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depending on differential input voltages. 3376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 3377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 3378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 3379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 3380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (unit: digital value). 3381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 3382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt) 3387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_DIFF_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\ 3389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_DATA__,\ 3390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__)\ 3391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((int32_t)((__ADC_DATA__) << 1U) * (int32_t)(__VREFANALOG_VOLTAGE__)\ 3392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / (int32_t)(__LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__))\ ARM GAS /tmp/ccrO2eGa.s page 61 3393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - (int32_t)(__VREFANALOG_VOLTAGE__)) 3394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate analog reference voltage (Vref+) 3397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: mVolt) from ADC conversion data of internal voltage 3398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * reference VrefInt. 3399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using VrefInt calibration value 3400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 3401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This voltage depends on user board environment: voltage level 3402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * connected to pin Vref+. 3403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On devices with small package, the pin Vref+ is not present 3404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and internally bonded to pin Vdda. 3405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of internal voltage reference 3406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * VrefInt corresponds to a resolution of 12 bits, 3407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 3408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal voltage reference VrefInt. 3409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 3410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 3411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits) 3412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of internal voltage reference VrefInt (unit: digital value). 3413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 3414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Analog reference voltage (unit: mV) 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\ 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \ 3423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \ 3424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 3425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 3426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 3430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 3431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor calibration values 3432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 3433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 3434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = ((TS_ADC_DATA - TS_CAL1) 3435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * * (TS_CAL2_TEMP - TS_CAL1_TEMP)) 3436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP 3437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 3438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = (TS_CAL2 - TS_CAL1) 3439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2_TEMP - TS_CAL1_TEMP) 3440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL1 = equivalent TS_ADC_DATA at temperature 3441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL1 (calibrated in factory) 3442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL2 = equivalent TS_ADC_DATA at temperature 3443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL2 (calibrated in factory) 3444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve that calibration 3445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters are correct (address and data). 3446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To calculate temperature using temperature sensor 3447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values (generic values less, therefore 3448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * less accurate than calibrated values), 3449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). ARM GAS /tmp/ccrO2eGa.s page 62 3450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 3451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 3452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 3453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 3454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 3455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of temperature sensor 3456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to a resolution of 12 bits, 3457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 3458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor. 3459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 3460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 3461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 3462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal 3463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor (unit: digital value). 3464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature 3465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sensor voltage has been measured. 3466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 3467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 3472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case or error, value LL_ADC_TEMPERATURE_CALC_ERROR is returned (inconsistent tempera 3473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\ 3475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 3476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__)\ 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) != 0) ? \ 3478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \ 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 3480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 3481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (__VREFANALOG_VOLTAGE__)) \ 3482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / TEMPSENSOR_CAL_VREFANALOG) \ 3483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - (int32_t) *TEMPSENSOR_CAL1_ADDR) \ 3484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \ 3485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \ 3486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + TEMPSENSOR_CAL1_TEMP \ 3487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 3489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((int32_t)LL_ADC_TEMPERATURE_CALC_ERROR) \ 3490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 3494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 3495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor typical values 3496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to device datasheet). 3497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 3498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV) 3499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / Avg_Slope + CALx_TEMP 3500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 3501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value) 3502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = temperature sensor slope 3503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: uV/Degree Celsius) 3504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_TYP_CALx_VOLT = temperature sensor digital value at 3505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature CALx_TEMP (unit: mV) 3506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve the temperature sensor ARM GAS /tmp/ccrO2eGa.s page 63 3507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of the current device has characteristics in line with 3508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values. 3509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If temperature sensor calibration values are available on 3510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()), 3511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature calculation will be more accurate using 3512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CALC_TEMPERATURE(). 3513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 3514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 3515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 3516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 3517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 3518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC measurement data must correspond to a resolution of 12 bits 3519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (full scale digital value 4095). If not the case, the data must be 3520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * preliminarily rescaled to an equivalent resolution of 12 bits. 3521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical v 3522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: uV/DegCelsius). 3523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "Avg_Slop 3524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical 3525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (at temperature and Vref+ defined in parameters below) (u 3526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to datasheet parameter "V30" (correspon 3527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature s 3528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (see parameter above) is corresponding (unit: mV) 3529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) value (unit: mV) 3530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: 3531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor volta 3532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 3533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 3538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\ 3540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_TYP_CALX_V__,\ 3541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_CALX_TEMP__,\ 3542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __VREFANALOG_VOLTAGE__,\ 3543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 3544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 3545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((((int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \ 3546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \ 3547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 3548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - \ 3549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \ 3550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 3551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 3552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)(__TEMPSENSOR_TYP_AVGSLOPE__) \ 3553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + (int32_t)(__TEMPSENSOR_CALX_TEMP__) \ 3554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 3555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 64 3564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/ 3566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions 3567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management 3571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: LL ADC functions to set DMA transfer are located into sections of */ 3574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration of ADC instance, groups and multimode (if available): */ 3575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* @ref LL_ADC_REG_SetDMATransfer(), ... */ 3576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Function to help to configure DMA transfer from ADC: retrieve the 3579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC register address from ADC instance and a list of ADC registers 3580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * intended to be used (most commonly) with DMA transfer. 3581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These ADC registers are data registers: 3582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when ADC conversion data is available in ADC data registers, 3583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC generates a DMA transfer request. 3584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used with LL DMA driver, refer to 3585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_DMA_ConfigAddresses()". 3586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 3587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_ConfigAddresses(DMA1, 3588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_CHANNEL_1, 3589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA), 3590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (uint32_t)&< array or variable >, 3591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_DIRECTION_PERIPH_TO_MEMORY); 3592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC: in multimode, some devices 3593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use a different data register outside of ADC instance scope 3594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (common data register). This macro manages this register difference, 3595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * only ADC instance has to be set as parameter. 3596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n 3597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n 3598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_DMA_GetRegAddr 3599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Register This parameter can be one of the following values: 3601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA 3602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1) 3603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Available on devices with several ADC instances. 3605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC register address 3606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 3608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(const ADC_TypeDef *ADCx, uint32_t Register) 3609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t data_reg_addr; 3611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (Register == LL_ADC_DMA_REG_REGULAR_DATA) 3613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 3615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &(ADCx->DR); 3616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */ 3618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register CDR */ 3620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR); ARM GAS /tmp/ccrO2eGa.s page 65 3621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return data_reg_addr; 3624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 3626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(const ADC_TypeDef *ADCx, uint32_t Register) 3627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 3629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(Register); 3630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 3632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) &(ADCx->DR); 3633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 3635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to 3641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances 3642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: Clock source and prescaler. 3647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, if ADC group injected is used, some 3648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * clock ratio constraints between ADC clock and AHB clock 3649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must be respected. 3650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 3651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 3654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 3655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 3656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 3657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n 3658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_SetCommonClock 3659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CommonClock This parameter can be one of the following values: 3662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 3663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 3664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 3665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 3666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 3667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 3668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 3669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 3670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 3671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 3672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 3673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 3674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 3675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 3676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 3677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None ARM GAS /tmp/ccrO2eGa.s page 66 3678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) 3680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); 3682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: Clock source and prescaler. 3686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n 3687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_GetCommonClock 3688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 3692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 3693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 3694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 3695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 3696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 3697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 3698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 3699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 3700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 3701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 3702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 3703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 3704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 3705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 3706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(const ADC_Common_TypeDef *ADCxy_COMMON) 3708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC)); 3710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 3714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 3715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Configure all paths (overwrite current configuration). 3716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 3717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 3718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 3719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The values not selected are removed from configuration. 3720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 3721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 3722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 3723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 3724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 3725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 3726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literals @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US, 3727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_DELAY_TEMPSENSOR_BUFFER_STAB_US. 3728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 3729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 3730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 3731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 3732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n 3733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalCh\n 3734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalCh ARM GAS /tmp/ccrO2eGa.s page 67 3735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 3738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 3739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 3740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 3741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 3742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path 3745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSEL, PathInternal) 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 3751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 3752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Add paths to the current configuration. 3753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 3754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 3755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 3756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 3757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 3758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 3759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 3760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 3761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 3762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literals @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US, 3763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_DELAY_TEMPSENSOR_BUFFER_STAB_US. 3764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 3765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 3766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 3767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 3768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n 3769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChAdd\n 3770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChAdd 3771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 3774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 3775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 3776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 3777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 3778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 3781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCxy_COMMON->CCR, PathInternal); 3783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 3787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 3788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Remove paths to the current configuration. 3789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 3790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 3791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) ARM GAS /tmp/ccrO2eGa.s page 68 3792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n 3793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChRem\n 3794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChRem 3795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 3798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 3799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 3800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 3801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 3802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 3805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal); 3807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: measurement path to internal 3811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...). 3812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 3813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 3814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 3815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n 3816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_GetCommonPathInternalCh\n 3817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_GetCommonPathInternalCh 3818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 3819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 3820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be a combination of the following values: 3821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 3822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 3823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 3824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 3825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(const ADC_Common_TypeDef *ADCxy_COMMON) 3827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSE 3829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins 3836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC calibration factor in the mode single-ended 3841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 3842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is intended to set calibration parameters 3843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without having to perform a new calibration using 3844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_StartCalibration(). 3845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 3846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 3847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 3848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration factor must be specified for each of these ARM GAS /tmp/ccrO2eGa.s page 69 3849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 3850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 3851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of setting calibration factors of both modes single ended 3852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED): 3853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * both calibration factors must be concatenated. 3854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To perform this processing, use helper macro 3855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(). 3856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion 3859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on group regular. 3860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n 3861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_SetCalibrationFactor 3862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 3864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 3865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 3866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED 3867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F 3868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t C 3871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 30 .loc 2 3871 1 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 @ link register save eliminated. 3872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT, 35 .loc 2 3872 3 view .LVU1 36 0000 D0F8B430 ldr r3, [r0, #180] 37 0004 01F07F1C and ip, r1, #8323199 38 0008 23EA0C0C bic ip, r3, ip 39 000c 01F07F03 and r3, r1, #127 40 0010 DB43 mvns r3, r3 41 0012 03EA1133 and r3, r3, r1, lsr #12 42 0016 03F01003 and r3, r3, #16 43 001a 9A40 lsls r2, r2, r3 44 .LVL1: 45 .loc 2 3872 3 is_stmt 0 view .LVU2 46 001c 4CEA0202 orr r2, ip, r2 47 0020 C0F8B420 str r2, [r0, #180] 3873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK, 3874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) 3875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4) 3876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & ~(SingleDiff & ADC_CALFACT_CALFACT_S))); 3877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 48 .loc 2 3877 1 view .LVU3 49 0024 7047 bx lr 50 .cfi_endproc 51 .LFE139: 53 .section .text.LL_ADC_SetChannelSamplingTime,"ax",%progbits 54 .align 1 55 .syntax unified 56 .thumb 57 .thumb_func 59 LL_ADC_SetChannelSamplingTime: ARM GAS /tmp/ccrO2eGa.s page 70 60 .LVL2: 61 .LFB195: 3878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration factor in the mode single-ended 3881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 3882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing 3883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration(). 3884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 3885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 3886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 3887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n 3888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_GetCalibrationFactor 3889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 3891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 3892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 3893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x7F 3894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(const ADC_TypeDef *ADCx, uint32_t SingleDiff) 3896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve bits with position in register depending on parameter */ 3898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "SingleDiff". */ 3899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ 3900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT, 3902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> 3904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4)); 3905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC resolution. 3909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 3910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_SetResolution 3916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Resolution This parameter can be one of the following values: 3918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution) 3925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution); 3927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC resolution. 3931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 3932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. ARM GAS /tmp/ccrO2eGa.s page 71 3933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_GetResolution 3934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 3937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 3938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 3939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 3940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(const ADC_TypeDef *ADCx) 3942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)); 3944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC conversion data alignment. 3948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 3949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment 3955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DataAlignment This parameter can be one of the following values: 3957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment) 3962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment); 3964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC conversion data alignment. 3968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 3969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment 3971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(const ADC_TypeDef *ADCx) 3977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN)); 3979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC low power mode. 3983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) ARM GAS /tmp/ccrO2eGa.s page 72 3990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 4000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 4001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 4002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 4003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 4004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 4005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 4006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 4007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 4008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 4009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 4010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 4011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 4012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 4013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 4014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 4015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode 4020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param LowPowerMode This parameter can be one of the following values: 4022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 4023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 4024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode) 4027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode); 4029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC low power mode: 4033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 4034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 4035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 4036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 4037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 4038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 4039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 4040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 4041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 4042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 4043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 4044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 4045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 4046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. ARM GAS /tmp/ccrO2eGa.s page 73 4047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 4048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 4049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 4050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 4051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 4052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 4053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 4054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 4055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 4056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 4057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 4058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 4059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 4060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 4061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 4062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 4063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 4064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 4065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode 4066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 4069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 4070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(const ADC_TypeDef *ADCx) 4072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY)); 4074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC selected offset instance 1, 2, 3 or 4. 4078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of offset configuration: 4079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC channel to which the offset programmed will be applied 4080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 4081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 4082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Offset level (offset to be subtracted from the raw 4083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 4084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 4085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 4086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 4087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the offset, by default. It can be forced 4088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to disable state using function LL_ADC_SetOffsetState(). 4089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If a channel is mapped on several offsets numbers, only the offset 4090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with the lowest value is considered for the subtraction. 4091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n 4098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1 LL_ADC_SetOffset\n 4099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1_EN LL_ADC_SetOffset\n 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_SetOffset\n 4101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_SetOffset\n 4102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffset\n 4103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_SetOffset\n ARM GAS /tmp/ccrO2eGa.s page 74 4104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_SetOffset\n 4105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffset\n 4106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_SetOffset\n 4107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_SetOffset\n 4108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffset 4109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 4156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 4158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 4160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF ARM GAS /tmp/ccrO2eGa.s page 75 4161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32 4164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 4169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); 4170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset instance 1, 2, 3 or 4: 4174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channel to which the offset programmed will be applied 4175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 4176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 4177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n 4191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n 4192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n 4193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel 4194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 ARM GAS /tmp/ccrO2eGa.s page 76 4218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 4241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 4243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 4245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(const ADC_TypeDef *ADCx, uint32_t Offsety) 4250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH); 4254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset instance 1, 2, 3 or 4: 4258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Offset level (offset to be subtracted from the raw 4259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 4260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 4261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 4262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 4263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n 4264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n 4265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n 4266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_GetOffsetLevel 4267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 4274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 77 4275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(const ADC_TypeDef *ADCx, uint32_t Offsety) 4276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1); 4280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset instance 1, 2, 3 or 4: 4284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * force offset state disable or enable 4285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without modifying offset channel or offset value. 4286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function should be needed only in case of offset to be 4287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled-disabled dynamically, and should not be needed in other cases: 4288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function LL_ADC_SetOffset() automatically enables the offset. 4289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n 4294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n 4295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n 4296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffsetState 4297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetState This parameter can be one of the following values: 4304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 4305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 4306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetStat 4309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 4314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetState); 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset instance 1, 2, 3 or 4: 4319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset state disabled or enabled. 4320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n 4321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n 4322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n 4323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_GetOffsetState 4324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE ARM GAS /tmp/ccrO2eGa.s page 78 4332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 4333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetState(const ADC_TypeDef *ADCx, uint32_t Offsety) 4335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN); 4339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset instance 1, 2, 3 or 4: 4343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset sign. 4344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_SetOffsetSign\n 4349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_SetOffsetSign\n 4350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_SetOffsetSign\n 4351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_SetOffsetSign 4352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSign This parameter can be one of the following values: 4359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 4360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 4361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSign) 4364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 4369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSign); 4370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset instance 1, 2, 3 or 4: 4374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset sign if positive or negative. 4375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_GetOffsetSign\n 4376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_GetOffsetSign\n 4377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_GetOffsetSign\n 4378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_GetOffsetSign 4379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 4387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 4388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 79 4389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSign(const ADC_TypeDef *ADCx, uint32_t Offsety) 4390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSETPOS); 4394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset instance 1, 2, 3 or 4: 4398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset saturation mode. 4399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_SetOffsetSaturation\n 4404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_SetOffsetSaturation\n 4405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_SetOffsetSaturation\n 4406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_SetOffsetSaturation 4407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSaturation This parameter can be one of the following values: 4414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 4415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 4416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Offse 4419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 4424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSaturation); 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset instance 1, 2, 3 or 4: 4429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset saturation if enabled or disabled. 4430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_GetOffsetSaturation\n 4431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_GetOffsetSaturation\n 4432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_GetOffsetSaturation\n 4433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_GetOffsetSaturation 4434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 4436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 4437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 4438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 4439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 4440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 4442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 4443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSaturation(const ADC_TypeDef *ADCx, uint32_t Offsety) 4445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccrO2eGa.s page 80 4446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 4447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SATEN); 4449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC gain compensation. 4453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the gain compensation coefficient 4454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * that is applied to raw converted data using the formula: 4455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DATA = DATA(raw) * (gain compensation coef) / 4096 4456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the gain compensation if given 4457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coefficient is above 0, otherwise it disables it. 4458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Gain compensation when enabled is applied to all channels. 4459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_SetGainCompensation\n 4464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_SetGainCompensation 4465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param GainCompensation This parameter can be: 4467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation will be disabled and value set to 0 4468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation will be enabled with specified value 4469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetGainCompensation(ADC_TypeDef *ADCx, uint32_t GainCompensation) 4472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->GCOMP, ADC_GCOMP_GCOMPCOEFF, GainCompensation); 4474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_GCOMP, ((GainCompensation == 0UL) ? 0UL : 1UL) << ADC_CFGR2_GCO 4475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC gain compensation value 4479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_GetGainCompensation\n 4480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_GetGainCompensation 4481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 4483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation is disabled 4484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation is enabled with returned value 4485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetGainCompensation(const ADC_TypeDef *ADCx) 4487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR2, ADC_CFGR2_GCOMP) == ADC_CFGR2_GCOMP) ? 4489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** READ_BIT(ADCx->GCOMP, ADC_GCOMP_GCOMPCOEFF) : 0UL); 4490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 4493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling time common configuration impacting 4495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 4496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_SetSamplingTimeCommonConfig 4501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTimeCommonConfig This parameter can be one of the following values: ARM GAS /tmp/ccrO2eGa.s page 81 4503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 4504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 4505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonConfig(ADC_TypeDef *ADCx, uint32_t SamplingTimeCom 4508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SMPR1, ADC_SMPR1_SMPPLUS, SamplingTimeCommonConfig); 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC sampling time common configuration impacting 4514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 4515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_GetSamplingTimeCommonConfig 4516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 4519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 4520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonConfig(const ADC_TypeDef *ADCx) 4522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SMPR1, ADC_SMPR1_SMPPLUS)); 4524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_SMPR1_SMPPLUS */ 4526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 4529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr 4532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 4533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger source: 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 4540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 4541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 4542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 series having this setting set by HW default value). 4543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 4544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_REG_SetTriggerEdge(). 4545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n 4552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_SetTriggerSource 4553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 4556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 4557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 4558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 4559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) ARM GAS /tmp/ccrO2eGa.s page 82 4560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 4561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 4562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 4563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 4564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 4565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 4566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 4567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 4568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 4569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 4570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 4571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 4572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 4573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 4574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 4575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 4576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 4577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 4578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 4579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 4580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 4581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 4582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 4583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 4584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 4585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 4586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 4587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 4588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 4589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 4590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 4591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 4592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 4593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 4594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 4595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 4600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 4603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); 4605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source: 4609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group regular trigger source is 4612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 4613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 4614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 4615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)") 4616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_IsTriggerSourceSWStart. ARM GAS /tmp/ccrO2eGa.s page 83 4617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n 4620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_GetTriggerSource 4621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 4624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 4625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 4626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 4627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 4628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 4629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 4630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 4631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 4632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 4633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 4634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 4635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 4636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 4637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 4638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 4639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 4640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 4641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 4642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 4643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 4644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 4645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 4646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 4647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 4648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 4649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 4650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 4651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 4652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 4653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 4654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 4655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 4656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 4657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 4658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 4659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 4660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 4661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 4662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 4663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 4668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(const ADC_TypeDef *ADCx) 4670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); 4672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ ARM GAS /tmp/ccrO2eGa.s page 84 4674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */ 4675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t shift_exten = ((trigger_source & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 4676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */ 4678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 4679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((trigger_source 4680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) 4681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR_EXTEN) 4682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source internal (SW start) 4687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or external. 4688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group regular trigger source set to external trigger, 4689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 4690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_GetTriggerSource(). 4691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart 4692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 4694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 4695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(const ADC_TypeDef *ADCx) 4697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1 4699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger polarity. 4703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 4704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge 4709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 4711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 4712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 4713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 4714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 4717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); 4719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger polarity. 4723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 4724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge 4725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 4728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 4729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 4730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 85 4731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(const ADC_TypeDef *ADCx) 4732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); 4734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling mode. 4738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the ADC conversion sampling mode 4739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode applies to regular group only. 4740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Set sampling mode is applied to all conversion of regular group. 4741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_SetSamplingMode\n 4746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_SetSamplingMode 4747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingMode This parameter can be one of the following values: 4749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 4750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 4751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 4752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode) 4755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG, SamplingMode); 4757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC sampling mode 4761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_GetSamplingMode\n 4762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_GetSamplingMode 4763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 4766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 4767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 4768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSamplingMode(const ADC_TypeDef *ADCx) 4770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG)); 4772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer length and scan direction. 4776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 4777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 4778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 4779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 4780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 4781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 4782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 4786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 4787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable ARM GAS /tmp/ccrO2eGa.s page 86 4788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 4789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 4790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 4791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 4792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 4793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 4794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 4795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 4796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 4798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 4799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 4800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 4801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength 4808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 4810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 4811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 4812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 4813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 4814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 4815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 4816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 4817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 4818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 4819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 4820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 4821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 4822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 4823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 4824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 4825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 4826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 4829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks); 4831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer length and scan direction. 4835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 4836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 4837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 4838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 4839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 4840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 4841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using ARM GAS /tmp/ccrO2eGa.s page 87 4845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 4846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 4847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 4848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 4849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 4850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 4851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 4852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 4853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 4854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 4855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 4857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 4859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength 4863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 4866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 4867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 4868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 4869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 4870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 4871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 4872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 4873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 4874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 4875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 4876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 4877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 4878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 4879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 4880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 4881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(const ADC_TypeDef *ADCx) 4883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L)); 4885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer discontinuous mode: 4889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 4892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 4893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC auto-injected mode 4894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC group regular sequencer discontinuous mode. 4895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n 4900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont 4901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccrO2eGa.s page 88 4902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 4903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 4904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 4905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 4907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 4908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 4909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 4910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 4911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 4912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 4915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM, SeqDiscont); 4917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer discontinuous mode: 4921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n 4924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont 4925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 4928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 4929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 4930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 4931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 4932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 4933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 4934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 4935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 4936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(const ADC_TypeDef *ADCx) 4938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM)); 4940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequence: channel on the selected 4944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 4945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 4946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Channels ordering into each rank of scan sequence: 4947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever channel can be placed into whatever rank. 4948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to ARM GAS /tmp/ccrO2eGa.s page 89 4959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n 4963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n 4964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n 4965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n 4966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n 4967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n 4968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n 4969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n 4970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n 4971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n 4972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n 4973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n 4974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n 4975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n 4976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n 4977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_SetSequencerRanks 4978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 ARM GAS /tmp/ccrO2eGa.s page 90 5016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 5039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 5041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 5044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 5046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Rank". */ 5047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 5048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 5049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, 5050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGO 5051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 5054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (Rank & ADC_REG_RANK_ID_SQRX_MASK)); 5056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequence: channel on the selected 5060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 5061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 5062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 5063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 5064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 5065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 5066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 5067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 5068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 5069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 5070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 5071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 5072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). ARM GAS /tmp/ccrO2eGa.s page 91 5073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 5074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 5075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 5076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 5077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n 5079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n 5080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n 5081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n 5082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n 5083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n 5084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n 5085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n 5086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n 5087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n 5088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n 5089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n 5090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n 5091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n 5092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n 5093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_GetSequencerRanks 5094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 5096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 5097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 5098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 5099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 5100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 5101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 5102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 5103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 5104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 5105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 5106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 5107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 5108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 5109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 5110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 5111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 5112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 ARM GAS /tmp/ccrO2eGa.s page 92 5130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 5153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 5155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 5157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 5158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 5159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 5160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank) 5162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, 5164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQR 5165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(*preg, 5167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MA 5168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 5169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC continuous conversion mode on ADC group regular. 5174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 5175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 5176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 5177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 5178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 5179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 5180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 5184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode 5185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Continuous This parameter can be one of the following values: ARM GAS /tmp/ccrO2eGa.s page 93 5187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 5188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 5189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous) 5192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous); 5194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC continuous conversion mode on ADC group regular. 5198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 5199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 5200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 5201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 5202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode 5203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 5206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 5207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(const ADC_TypeDef *ADCx) 5209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT)); 5211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion data transfer: no transfer or 5215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 5216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 5217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 5218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 5219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 5220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 5221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 5222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 5223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 5224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 5225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 5226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 5227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 5228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 5229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 5230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 5231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 5232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_SetMultiDMATransfer(). 5233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 5234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 5235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n 5240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_SetDMATransfer 5241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DMATransfer This parameter can be one of the following values: 5243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE ARM GAS /tmp/ccrO2eGa.s page 94 5244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 5245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 5246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer) 5249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG, DMATransfer); 5251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data transfer: no transfer or 5255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 5256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 5257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 5258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 5259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 5260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 5261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 5262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 5263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 5264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 5265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 5266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 5267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 5268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 5269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 5270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 5271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 5272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_GetMultiDMATransfer(). 5273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 5274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 5275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n 5276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_GetDMATransfer 5277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 5280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 5281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 5282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(const ADC_TypeDef *ADCx) 5284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG)); 5286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular behavior in case of overrun: 5290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 5291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Compatibility with devices without feature overrun: 5292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other devices without this feature have a behavior 5293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * equivalent to data overwritten. 5294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The default setting of overrun is data preserved. 5295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, for compatibility with all devices, parameter 5296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * overrun should be set to data overwritten. 5297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. ARM GAS /tmp/ccrO2eGa.s page 95 5301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun 5302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Overrun This parameter can be one of the following values: 5304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 5305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 5306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun) 5309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun); 5311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular behavior in case of overrun: 5315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 5316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun 5317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 5320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 5321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(const ADC_TypeDef *ADCx) 5323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD)); 5325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: g 5332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger source: 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 5338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 5340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 5341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 5342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 series having this setting set by HW default value). 5343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 5344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_INJ_SetTriggerEdge(). 5345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 5346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 5347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 5350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 5351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n 5352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_SetTriggerSource 5353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 5355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 5356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 5357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 ARM GAS /tmp/ccrO2eGa.s page 96 5358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 5359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 5360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 5361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 5362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 5363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 5364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 5365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 5366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 5367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 5368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 5369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 5370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 5371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 5372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 5373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 5374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 5375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 5376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 5377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 5378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 5379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 5380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 5381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 5382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 5383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 5384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 5385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 5386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 5387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 5388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 5389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 5390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 5391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 5392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 5393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 5394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 5399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 5402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN, TriggerSource); 5404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source: 5408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 5409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 5410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group injected trigger source is 5411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 5412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 5413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 5414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)") ARM GAS /tmp/ccrO2eGa.s page 97 5415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_IsTriggerSourceSWStart. 5416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 5417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 5418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n 5419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_GetTriggerSource 5420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 5423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 5424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 5425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 5426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 5427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 5428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 5429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 5430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 5431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 5432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 5433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 5434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 5435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 5436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 5437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 5438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 5439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 5440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 5441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 5442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 5443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 5444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 5445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 5446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 5447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 5448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 5449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 5450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 5451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 5452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 5453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 5454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 5455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 5456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 5457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 5458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 5459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 5460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 5461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 5466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(const ADC_TypeDef *ADCx) 5468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t trigger_source = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN); 5470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ ARM GAS /tmp/ccrO2eGa.s page 98 5472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */ 5473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t shift_jexten = ((trigger_source & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS 5474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */ 5476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 5477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((trigger_source 5478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_INJ_TRIG_SOURCE_MASK >> shift_jexten) & ADC_JSQR_JEXTSEL) 5479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_INJ_TRIG_EDGE_MASK >> shift_jexten) & ADC_JSQR_JEXTEN) 5480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source internal (SW start) 5485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or external 5486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group injected trigger source set to external trigger, 5487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 5488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_GetTriggerSource. 5489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart 5490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 5492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 5493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(const ADC_TypeDef *ADCx) 5495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN)) ? 5497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger polarity. 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 5502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 5505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 5506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge 5507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 5509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 5515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge); 5517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger polarity. 5521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 5522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge 5523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 99 5529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(const ADC_TypeDef *ADCx) 5530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN)); 5532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer length and scan direction. 5536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 5537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 5538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 5539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 5540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 5541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 5542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 5545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 5546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength 5547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 5549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 5553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 5556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks); 5558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer length and scan direction. 5562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function retrieves: 5563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 5564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 5565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 5566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 5567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 5568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength 5569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 5575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(const ADC_TypeDef *ADCx) 5577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL)); 5579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer discontinuous mode: 5583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 5584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 5585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected ARM GAS /tmp/ccrO2eGa.s page 100 5586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 5587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont 5588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 5590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 5591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 5592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 5595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont); 5597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer discontinuous mode: 5601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 5602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 5603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont 5604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 5607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 5608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(const ADC_TypeDef *ADCx) 5610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN)); 5612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequence: channel on the selected 5616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 5617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 5618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 5619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 5620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 5621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 5622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 5623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 5624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 5625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 5628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 5629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n 5630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n 5631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n 5632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks 5633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 5635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 5636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 5637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 5638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 5639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) ARM GAS /tmp/ccrO2eGa.s page 101 5643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 5682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 5684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 5687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 5689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on parameter "Rank". */ 5690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 5691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 5692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 5693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), 5695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); 5697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccrO2eGa.s page 102 5700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequence: channel on the selected 5701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 5702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 5703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 5704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 5705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 5706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 5707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 5708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 5709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 5711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 5712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 5713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 5714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n 5716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n 5717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n 5718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks 5719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 5721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 5722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 5723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 5725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ARM GAS /tmp/ccrO2eGa.s page 103 5757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 5766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 5768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 5770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 5771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 5772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 5773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank) 5775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->JSQR, 5777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) 5779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 5780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger: 5785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 5786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode can be used to extend number of data registers 5787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * updated after one ADC conversion trigger and with data 5788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * permanently kept (not erased by successive conversions of scan of 5789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC sequencer ranks), up to 5 data registers: 5790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 data register on ADC group regular, 4 data registers 5791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group injected. 5792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC group injected injected trigger source is set to an 5793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external trigger, this feature must be must be set to 5794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent trigger. 5795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC group injected automatic trigger is compliant only with 5796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group injected trigger source set to SW start, without any 5797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * further action on ADC group injected conversion start or stop: 5798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in this case, ADC group injected is controlled only 5799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC group regular. 5800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 5801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 5802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto 5807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TrigAuto This parameter can be one of the following values: 5809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 5810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 5811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto) ARM GAS /tmp/ccrO2eGa.s page 104 5814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto); 5816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger: 5820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 5821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto 5822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 5825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 5826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(const ADC_TypeDef *ADCx) 5828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO)); 5830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected contexts queue mode. 5834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 5835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 5836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 5837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 5838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is disabled: 5839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - only 1 sequence can be configured 5840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and is active perpetually. 5841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is enabled: 5842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - up to 2 contexts can be queued 5843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and are checked in and out as a FIFO stack (first-in, first-out). 5844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If a new context is set when queues is full, error is triggered 5845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by interruption "Injected Queue Overflow". 5846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Two behaviors are possible when all contexts have been processed: 5847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the contexts queue can maintain the last context active perpetually 5848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or can be empty and injected group triggers are disabled. 5849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Triggers can be only external (not internal SW start) 5850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Caution: The sequence must be fully configured in one time 5851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (one write of register JSQR makes a check-in of a new context 5852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * into the queue). 5853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore functions to set separately injected trigger and 5854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer channels cannot be used, register JSQR must be set 5855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using function @ref LL_ADC_INJ_ConfigQueueContext(). 5856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This parameter can be modified only when no conversion is on going 5857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A modification of the context mode (bit JQDIS) causes the contexts 5859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * queue to be flushed and the register JSQR is cleared. 5860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n 5865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_SetQueueMode 5866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param QueueMode This parameter can be one of the following values: 5868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 5869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 5870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY ARM GAS /tmp/ccrO2eGa.s page 105 5871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode) 5874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS, QueueMode); 5876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected context queue mode. 5880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n 5881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_GetQueueMode 5882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 5885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 5886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 5887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(const ADC_TypeDef *ADCx) 5889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS)); 5891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set one context on ADC group injected that will be checked in 5895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * contexts queue. 5896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 5897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 5898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 5899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 5900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function is intended to be used when contexts queue is enabled, 5901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because the sequence must be fully configured in one time 5902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions to set separately injected trigger and sequencer channels 5903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * cannot be used): 5904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_INJ_SetQueueMode(). 5905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In the contexts queue, only the active context can be read. 5906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The parameters of this function can be read using functions: 5907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerSource() 5908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerEdge() 5909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetSequencerRanks() 5910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 5911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 5912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 5913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 5914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 5915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 5916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 5919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 5920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n 5921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n 5922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JL LL_ADC_INJ_ConfigQueueContext\n 5923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n 5924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n 5925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n 5926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext 5927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccrO2eGa.s page 106 5928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 5929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 5930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 5931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 5932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 5933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 5934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 5935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 5936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 5937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 5938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 5939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 5940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 5941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 5942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 5943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 5944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 5945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 5946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 5947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 5948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 5949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 5950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 5951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 5952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 5953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 5954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 5955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 5956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 5957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 5958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 5959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 5960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 5961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 5962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 5963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 5964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 5965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 5966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 5967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * more details. 5973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 5974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Note: This parameter is discarded in case of SW start: 5979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE". 5980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 5981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS ARM GAS /tmp/ccrO2eGa.s page 107 5985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank1_Channel This parameter can be one of the following values: 5986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 6009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank2_Channel This parameter can be one of the following values: 6031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 6032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 6033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 6034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 6035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 6036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 6037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 ARM GAS /tmp/ccrO2eGa.s page 108 6042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 6054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank3_Channel This parameter can be one of the following values: 6076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 6077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 6078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 6079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 6080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 6081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 6082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) ARM GAS /tmp/ccrO2eGa.s page 109 6099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank4_Channel This parameter can be one of the following values: 6121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 6122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 6123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 6124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 6125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 6126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 6127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 6144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n ARM GAS /tmp/ccrO2eGa.s page 110 6156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx, 6168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource, 6169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ExternalTriggerEdge, 6170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerNbRanks, 6171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank1_Channel, 6172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank2_Channel, 6173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank3_Channel, 6174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank4_Channel) 6175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Rankx_Channel" with bits position */ 6177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on literal "LL_ADC_INJ_RANK_x". */ 6178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ 6179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* because containing other bits reserved for other purpose. */ 6180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If parameter "TriggerSource" is set to SW start, then parameter */ 6181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "ExternalTriggerEdge" is discarded. */ 6182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t is_trigger_not_sw = (uint32_t)((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE) ? 1UL : 0UL); 6183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 6184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL | 6185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTEN | 6186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ4 | 6187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ3 | 6188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ2 | 6189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ1 | 6190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JL, 6191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (TriggerSource & ADC_JSQR_JEXTSEL) | 6192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ExternalTriggerEdge * (is_trigger_not_sw)) | 6193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 6194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | 6195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 6196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | 6197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 6198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | 6199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 6200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | 6201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SequencerNbRanks 6202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels 6210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 111 6213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set sampling time of the selected ADC channel 6215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 6216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 6217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 6218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of internal channel (VrefInt, TempSensor, ...) to be 6219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted: 6220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sampling time constraints must be respected (sampling time can be 6221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * adjusted in function of ADC clock frequency and sampling time 6222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * setting). 6223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for timings values (parameters TS_vrefint, 6224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_temp, ...). 6225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 6226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 6227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 6228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 6229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 6230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 6231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC conversion of internal channel (VrefInt, 6232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor, ...), a sampling time minimum value 6233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required. 6234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 6235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n 6240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n 6241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n 6242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n 6243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n 6244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n 6245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n 6246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n 6247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n 6248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n 6249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n 6250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n 6251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n 6252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n 6253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n 6254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n 6255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n 6256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n 6257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_SetChannelSamplingTime 6258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 6260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 6261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 6262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 6263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 6264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 6265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 6266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 ARM GAS /tmp/ccrO2eGa.s page 112 6270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 6283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTime This parameter can be one of the following values: 6305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 6306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 6307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 6308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 6309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 6310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 6311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 6312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 6313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 6315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 6316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 6317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sa 6320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 62 .loc 2 6320 1 is_stmt 1 view -0 63 .cfi_startproc 64 @ args = 0, pretend = 0, frame = 0 65 @ frame_needed = 0, uses_anonymous_args = 0 66 @ link register save eliminated. 67 .loc 2 6320 1 is_stmt 0 view .LVU5 ARM GAS /tmp/ccrO2eGa.s page 113 68 0000 10B4 push {r4} 69 .LCFI0: 70 .cfi_def_cfa_offset 4 71 .cfi_offset 4, -4 6321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "SamplingTime" with bits position */ 6322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Channel". */ 6323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter "Channel" is used with masks because containing */ 6324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 6325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, 72 .loc 2 6325 3 is_stmt 1 view .LVU6 73 .loc 2 6325 25 is_stmt 0 view .LVU7 74 0002 1430 adds r0, r0, #20 75 .LVL3: 76 .loc 2 6325 25 view .LVU8 77 0004 4B0E lsrs r3, r1, #25 78 0006 9B00 lsls r3, r3, #2 79 0008 03F00403 and r3, r3, #4 80 .LVL4: 6326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_S 6327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 81 .loc 2 6328 3 is_stmt 1 view .LVU9 82 000c C458 ldr r4, [r0, r3] 83 000e C1F30451 ubfx r1, r1, #20, #5 84 .LVL5: 85 .loc 2 6328 3 is_stmt 0 view .LVU10 86 0012 4FF0070C mov ip, #7 87 0016 0CFA01FC lsl ip, ip, r1 88 001a 24EA0C0C bic ip, r4, ip 89 001e 8A40 lsls r2, r2, r1 90 .LVL6: 91 .loc 2 6328 3 view .LVU11 92 0020 4CEA0202 orr r2, ip, r2 93 0024 C250 str r2, [r0, r3] 6329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 6330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 6331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 94 .loc 2 6331 1 view .LVU12 95 0026 5DF8044B ldr r4, [sp], #4 96 .LCFI1: 97 .cfi_restore 4 98 .cfi_def_cfa_offset 0 99 002a 7047 bx lr 100 .cfi_endproc 101 .LFE195: 103 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits 104 .align 1 105 .global HAL_ADCEx_Calibration_Start 106 .syntax unified 107 .thumb 108 .thumb_func 110 HAL_ADCEx_Calibration_Start: 111 .LVL7: 112 .LFB329: 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @file stm32g4xx_hal_adc_ex.c ARM GAS /tmp/ccrO2eGa.s page 114 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Converter (ADC) 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * + Peripheral Control functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "stm32g4xx_hal_adc.c". 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @attention 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Copyright (c) 2019 STMicroelectronics. 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * All rights reserved. 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in the root directory of this software component. 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** available in file of generic functions "stm32g4xx_hal_adc.c". 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #include "stm32g4xx_hal.h" 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended HAL module driver 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\ 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\ 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of p 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** be updated anytime once the ADC is enabled */ 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Fixed timeout value for ADC calibration. */ 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* maximum prescalers. */ ARM GAS /tmp/ccrO2eGa.s page 115 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ex of profile low frequency : f_ADC at f_CPU/3968 (minimum value */ 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* considering both possible ADC clocking scheme: */ 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from synchronous clock with AHB prescaler 512, */ 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC prescaler 4. */ 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = 512 *4 = 2048 */ 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from asynchronous clock (PLLP) with prescaler 256. */ 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Highest CPU clock PLL (PLLR). */ 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = PLLRmax /PPLPmin * 256 = (VCO/2) / (VCO/31) * 256 */ 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 3968 ) */ 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration_time MAX = 81 / f_ADC */ 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 81 / (f_CPU/3938) = 318978 CPU cycles */ 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT (318978UL) /*!< ADC calibration time-out value (unit: CPU 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/ 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/ 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Extended IO operation functions 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### IO operation functions ##### 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Perform the ADC self-calibration for single or differential ending. 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get calibration factors for single or differential ending. 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Set calibration factors for single or differential ending. 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected. 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected. 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Poll for conversion complete on ADC group injected. 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of ADC group injected channel conversion. 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected and enable interruptions. 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected and disable interruptions. 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) When multimode feature is available, start multimode and enable DMA transfer. 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop multimode and disable ADC DMA transfer. 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of multimode conversion. 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this ARM GAS /tmp/ccrO2eGa.s page 116 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff Selection of single-ended or differential input 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 113 .loc 1 127 1 is_stmt 1 view -0 114 .cfi_startproc 115 @ args = 0, pretend = 0, frame = 8 116 @ frame_needed = 0, uses_anonymous_args = 0 117 .loc 1 127 1 is_stmt 0 view .LVU14 118 0000 30B5 push {r4, r5, lr} 119 .LCFI2: 120 .cfi_def_cfa_offset 12 121 .cfi_offset 4, -12 122 .cfi_offset 5, -8 123 .cfi_offset 14, -4 124 0002 83B0 sub sp, sp, #12 125 .LCFI3: 126 .cfi_def_cfa_offset 24 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 127 .loc 1 128 3 is_stmt 1 view .LVU15 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0UL; 128 .loc 1 129 3 view .LVU16 129 .loc 1 129 17 is_stmt 0 view .LVU17 130 0004 0023 movs r3, #0 131 0006 0193 str r3, [sp, #4] 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 132 .loc 1 132 3 is_stmt 1 view .LVU18 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 133 .loc 1 133 3 view .LVU19 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 134 .loc 1 136 3 view .LVU20 135 .loc 1 136 3 view .LVU21 136 0008 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 137 000c 012B cmp r3, #1 138 000e 41D0 beq .L11 139 0010 0446 mov r4, r0 140 0012 0D46 mov r5, r1 141 .loc 1 136 3 discriminator 2 view .LVU22 142 0014 0123 movs r3, #1 143 0016 80F85830 strb r3, [r0, #88] 144 .loc 1 136 3 view .LVU23 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the ADC (if not already disabled) */ 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 145 .loc 1 141 3 view .LVU24 ARM GAS /tmp/ccrO2eGa.s page 117 146 .loc 1 141 20 is_stmt 0 view .LVU25 147 001a FFF7FEFF bl ADC_Disable 148 .LVL8: 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 149 .loc 1 144 3 is_stmt 1 view .LVU26 150 .loc 1 144 6 is_stmt 0 view .LVU27 151 001e 80BB cbnz r0, .L6 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 152 .loc 1 147 5 is_stmt 1 view .LVU28 153 0020 E36D ldr r3, [r4, #92] 154 0022 23F48853 bic r3, r3, #4352 155 0026 23F00203 bic r3, r3, #2 156 002a 43F00203 orr r3, r3, #2 157 002e E365 str r3, [r4, #92] 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC calibration in mode single-ended or differential */ 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_StartCalibration(hadc->Instance, SingleDiff); 158 .loc 1 152 5 view .LVU29 159 0030 2268 ldr r2, [r4] 160 .LVL9: 161 .LBB284: 162 .LBI284: 6332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get sampling time of the selected ADC channel 6335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 6336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 6337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 6338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 6339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 6340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 6341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 6342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 6343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 6344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n 6345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n 6346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n 6347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n 6348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n 6349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n 6350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n 6351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n 6352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n 6353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n 6354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n 6355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n 6356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n 6357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n 6358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n 6359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n 6360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n ARM GAS /tmp/ccrO2eGa.s page 118 6361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n 6362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_GetChannelSamplingTime 6363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 6365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 6366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 6367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 6368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 6369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 6370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 6371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 6382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 6383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 6384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 6385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 6386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 6388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 6389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 6390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 6391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 6393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 6395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 6406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * convert in 12-bit resolution. 6407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 6408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (fADC) to convert in 12-bit resolution.\n 6409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 6411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 6412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 6413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 6414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 6415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 6416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 6417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 ARM GAS /tmp/ccrO2eGa.s page 119 6418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 6420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 6421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 6422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(const ADC_TypeDef *ADCx, uint32_t Channel) 6424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOF 6426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ADC_SMPRX_REGOFFSET_POS)); 6427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 6429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 6430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BI 6431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_P 6432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set mode single-ended or differential input of the selected 6437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 6438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Channel ending is on channel scope: independently of channel mapped 6439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group regular or injected. 6440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In differential mode: Differential measurement is carried out 6441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * between the selected channel 'i' (positive input) and 6442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel 'i+1' (negative input). Only channel 'i' has to be 6443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured, channel 'i+1' is configured automatically. 6444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 6445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 6446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 6447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 6448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 6449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 6450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 6451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 6452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 6453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 6454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 6455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 6456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 6457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 6458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For ADC channels configured in differential mode, both inputs 6460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * should be biased at (Vref+)/2 +/-200mV. 6461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (Vref+ is the analog voltage reference) 6462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 6466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 6467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff 6468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 6470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 6471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 6472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 6473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 6474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 ARM GAS /tmp/ccrO2eGa.s page 120 6475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be a combination of the following values: 6486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 6487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 6488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sing 6491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Bits of channels in single or differential mode are set only for */ 6493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* differential mode (for single mode, mask of bits allowed to be set is */ 6494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* shifted out of range of bits of channels in single or differential mode. */ 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->DIFSEL, 6496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 6497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) 6498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK))); 6499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get mode single-ended or differential input of the selected 6503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 6504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 6505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 6506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, to ensure a channel is configured in single-ended mode, 6507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the configuration of channel itself and the channel 'i-1' must be 6508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * read back (to ensure that the selected channel channel has not been 6509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured in differential mode by the previous channel). 6510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 6511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 6512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 6513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 6514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 6515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 6516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 6517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 6518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 6519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 6520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 6521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 6522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 6523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 6524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. In this case, the value 6526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned is null if all channels are in single ended-mode. 6527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 6528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff 6529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be a combination of the following values: 6531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 ARM GAS /tmp/ccrO2eGa.s page 121 6532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 6533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 6534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 6535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 6536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 6537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 6538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 6539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 6540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 6541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 6542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 6543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 6544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 6545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 6546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: channel in single-ended mode, else: channel in differential mode 6547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(const ADC_TypeDef *ADCx, uint32_t Channel) 6549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK))); 6551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an 6558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog monitored channels: 6563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a single channel, multiple channels or all channels, 6564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC groups regular and-or injected. 6565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Once monitored channels are selected, analog watchdog 6566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 6567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of need to define a single channel to monitor 6568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with analog watchdog from sequencer channel definition, 6569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP(). 6570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 6571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 6572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 6573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 6574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 6575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 6576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 6577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 6578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 6579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 6580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 6581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 6582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 6583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 6584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 6585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 6586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 6587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is ARM GAS /tmp/ccrO2eGa.s page 122 6589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 6590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n 6596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n 6597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n 6598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n 6599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n 6600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels 6601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDChannelGroup This parameter can be one of the following values: 6607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 6608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 6609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 6610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 6611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 6612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 6613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 6614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 6616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 6617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 6618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 6619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 6620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 6621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 6622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 6623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 6624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 6625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 6626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 6627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 6628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 6629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 6630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 6631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 6632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 6633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 6634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 6635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 6636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 6638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 6639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 6640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 6641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 6642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 6643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 6644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 6645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) ARM GAS /tmp/ccrO2eGa.s page 123 6646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 6647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 6648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 6649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 6650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 6651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 6652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 6653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 6654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 6655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 6656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 6657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 6658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 6659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 6661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 6662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 6663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 6664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 6665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 6666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 6667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 6668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 6669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 6670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 6671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 6672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 6673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 6674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 6675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 6676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 6677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 6678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 6679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 6680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 6681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 6682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 6683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 6684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 6685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 6686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 6687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 6689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 6690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 6691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 6692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 6693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 6694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 6695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 6696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 6697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 6698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 6699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 6700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 6701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n ARM GAS /tmp/ccrO2eGa.s page 124 6703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 6704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 6705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 6706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 6707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 6709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 6710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 6711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 6712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 6715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDChannelGroup" with bits position */ 6717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "AWDy". */ 6718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ 6719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 6720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, 6721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> ADC_AWD_CRX_RE 6722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) 6723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC_AWD_CR12_REGOFFSETGAP_VAL)); 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 6726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 6727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDChannelGroup & AWDy); 6728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog monitored channel. 6732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 6733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 6734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 6736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 6737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 6738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 6739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 6740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 6741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 6742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 6743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only when the analog watchdog is set to monitor 6744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * one channel. 6745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 6746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 6747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 6748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 6749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 6750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 6751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 6752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 6753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 6754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 6755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 6756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 6757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 6758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 6759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). ARM GAS /tmp/ccrO2eGa.s page 125 6760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 6761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 6762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 6763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 6764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 6765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n 6771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n 6772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n 6773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n 6774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n 6775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels 6776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 (1) 6780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 (1) 6781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On this AWD number, monitored channel can be retrieved 6783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * if only 1 channel is programmed (or none or all channels). 6784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function cannot retrieve monitored channel if 6785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * multiple channels are programmed simultaneously 6786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by bitfield. 6787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 6789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 6790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 6791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 6792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 6793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 6794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 6795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 6796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 6797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 6798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 6799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 6800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 6801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 6802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 6803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 6804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 6805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 6806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 6807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 6808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 6809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 6810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 6811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 6812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 6814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 6815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 6816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) ARM GAS /tmp/ccrO2eGa.s page 126 6817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 6818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 6819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 6820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 6821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 6822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 6824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 6825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 6826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 6827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 6828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 6829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 6830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 6831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 6832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 6834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 6835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 6836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 6837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 6838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 6839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 6840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 6841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 6842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 6843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 6844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 6845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 6847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 6848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 6849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1. 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(const ADC_TypeDef *ADCx, uint32_t AWDy) 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, 6855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> ADC_AWD_ 6856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) 6857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC_AWD_CR12_REGOFFSETGAP_VAL)); 6858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t analog_wd_monit_channels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK); 6860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If "analog_wd_monit_channels" == 0, then the selected AWD is disabled */ 6862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (parameter value LL_ADC_AWD_DISABLE). */ 6863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Else, the selected AWD is enabled and is monitoring a group of channels */ 6864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* or a single channel. */ 6865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (analog_wd_monit_channels != 0UL) 6866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AWDy == LL_ADC_AWD1) 6868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((analog_wd_monit_channels & ADC_CFGR_AWD1SGL) == 0UL) 6870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 6872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** analog_wd_monit_channels = ((analog_wd_monit_channels 6873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD_CR23_CHANNEL_MASK) ARM GAS /tmp/ccrO2eGa.s page 127 6874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 6875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (~(ADC_CFGR_AWD1CH)) 6876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 6879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 6881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** analog_wd_monit_channels = (analog_wd_monit_channels 6882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR 6883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 6887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((analog_wd_monit_channels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK) 6889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 6891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** analog_wd_monit_channels = (ADC_AWD_CR23_CHANNEL_MASK 6892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN)) 6893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 6896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 6898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 6899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** analog_wd_monit_channels = (analog_wd_monit_channels 6900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 6901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (__LL_ADC_CHANNEL_TO_DECIMAL_NB(analog_wd_monit_channels) << 6902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 6903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return analog_wd_monit_channels; 6908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog thresholds value of both thresholds 6912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high and low. 6913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If value of only one threshold high or low must be set, 6914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_SetAnalogWDThresholds(). 6915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 6916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 6917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 6918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 6919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 6920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 6921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 6922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 6923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 6924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 6925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 6926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 6927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 6928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 6929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 6930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) ARM GAS /tmp/ccrO2eGa.s page 128 6931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 6932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 6933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 6934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 6935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 6936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 6937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 6938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 6940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 6941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 6942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 6943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Examples: 6944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 6945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 12 bits (ratio 16 and shift 4, or ratio 32 and shift 5, ...): 6946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds must be divided by 16. 6947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 6948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 14 bits (ratio 16 and shift 2, or ratio 32 and shift 3, ...): 6949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds must be divided by 4. 6950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 6951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 16 bits (ratio 16 and shift none, or ratio 32 and shift 1, ...): 6952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds match directly to ADC data register. 6953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n 6954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n 6955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n 6956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n 6957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n 6958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_ConfigAnalogWDThresholds 6959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF 6965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF 6966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 6969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdLowValue) 6970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ 6972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameter */ 6973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDy". */ 6974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ 6975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 6976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_RE 6978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 6980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 6981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) | AWDThresholdLowValue); 6982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog threshold value of threshold 6986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high or low. 6987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If values of both thresholds high or low must be set, ARM GAS /tmp/ccrO2eGa.s page 129 6988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_ConfigAnalogWDThresholds(). 6989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 6990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 6991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 6992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 6993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 6994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 6995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 6996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 6997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 6998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 6999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 7000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 7001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 7002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 7003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 7004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 7005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 7006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 7007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 7008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 7009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 7010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 7011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 7012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 7013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 7014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 7015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 7016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 7017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Examples: 7018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 7019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 12 bits (ratio 16 and shift 4, or ratio 32 and shift 5, ...): 7020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds must be divided by 16. 7021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 7022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 14 bits (ratio 16 and shift 2, or ratio 32 and shift 3, ...): 7023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds must be divided by 4. 7024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Oversampling ratio and shift selected to have ADC conversion data 7025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on 16 bits (ratio 16 and shift none, or ratio 32 and shift 1, ...): 7026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC analog watchdog thresholds match directly to ADC data register. 7027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is not conditioned to 7028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC can be disabled, enabled with or without conversion on going 7030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either ADC groups regular or injected. 7031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n 7032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_SetAnalogWDThresholds\n 7033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_SetAnalogWDThresholds\n 7034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_SetAnalogWDThresholds\n 7035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_SetAnalogWDThresholds\n 7036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_SetAnalogWDThresholds 7037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 7039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 7041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 7042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 7043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 7044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW ARM GAS /tmp/ccrO2eGa.s page 130 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF 7046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThr 7049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdValue) 7050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */ 7052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameters */ 7053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */ 7054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ 7055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 7056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 7057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_RE 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 7060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdsHighLow, 7061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdValue << ((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TR 7062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog threshold value of threshold high, 7066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * threshold low or raw data with ADC thresholds high and low 7067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * concatenated. 7068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC thresholds high and low is retrieved, 7069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the data of each threshold high or low can be isolated 7070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro: 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(). 7072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 7073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 7074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(). 7075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_GetAnalogWDThresholds\n 7077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_GetAnalogWDThresholds\n 7078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_GetAnalogWDThresholds\n 7079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_GetAnalogWDThresholds\n 7080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_GetAnalogWDThresholds 7081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 7083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 7084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 7085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 7086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 7087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 7088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 7089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW 7090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 7091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(const ADC_TypeDef *ADCx, 7093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDy, uint32_t AWDThresholdsHighLow) 7094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 7096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_ 7097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 7099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdsHighLow | ADC_TR1_LT1)) 7100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH 7101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & ~(AWDThresholdsHighLow & ADC_TR1_LT1))); ARM GAS /tmp/ccrO2eGa.s page 131 7102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog filtering configuration 7106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 7109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 7110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 7111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 7112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_SetAWDFilteringConfiguration 7113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 7115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 7116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param FilteringConfig This parameter can be one of the following values: 7117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 7118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 7119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 7120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 7121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 7122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 7123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 7124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 7125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t 7128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 7130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 7131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); 7132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog filtering configuration 7136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 7137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 7138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_GetAWDFilteringConfiguration 7139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 7141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 7142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 7143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 7144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 7145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 7146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 7147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 7148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 7149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 7150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 7151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAWDFilteringConfiguration(const ADC_TypeDef *ADCx, uint32_t AWDy 7153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 7155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 7156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); 7157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 132 7159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over 7164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling scope: ADC groups regular and-or injected 7169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 series). 7170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 7171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 7172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 7173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 7174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 7175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 7176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 7179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 7180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n 7181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n 7182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_SetOverSamplingScope 7183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OvsScope This parameter can be one of the following values: 7185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 7186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 7187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 7188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 7189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 7190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope) 7193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope); 7195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling scope: ADC groups regular and-or injected 7199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 series). 7200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 7201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 7202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 7203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 7204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 7205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 7206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n 7207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n 7208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_GetOverSamplingScope 7209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 7211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 7212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 7213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 7214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 7215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED ARM GAS /tmp/ccrO2eGa.s page 133 7216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(const ADC_TypeDef *ADCx) 7218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM)); 7220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling discontinuous mode (triggered mode) 7224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 7225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 7226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 7227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 7228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 7229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 7230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 7233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 7234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, oversampling discontinuous mode 7235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (triggered mode) can be used only when oversampling is 7236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * set on group regular only and in resumed mode. 7237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont 7238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OverSamplingDiscont This parameter can be one of the following values: 7240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 7241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 7242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont) 7245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont); 7247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling discontinuous mode (triggered mode) 7251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 7252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 7253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 7254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 7255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 7256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 7257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont 7258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 7260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 7261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 7262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(const ADC_TypeDef *ADCx) 7264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS)); 7266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling 7270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 7271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of oversampling configuration: 7272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ratio ARM GAS /tmp/ccrO2eGa.s page 134 7273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - shift 7274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 7277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 7278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n 7279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift 7280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Ratio This parameter can be one of the following values: 7282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 7283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 7284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 7285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 7286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 7287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 7288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 7289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 7290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Shift This parameter can be one of the following values: 7291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 7292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 7293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 7294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 7295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 7296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 7297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 7298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 7299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 7300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_ 7303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); 7305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling ratio 7309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 7310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio 7311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Ratio This parameter can be one of the following values: 7313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 7314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 7315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 7316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 7317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 7318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 7319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 7320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 7321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(const ADC_TypeDef *ADCx) 7323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); 7325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling shift 7329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) ARM GAS /tmp/ccrO2eGa.s page 135 7330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift 7331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Shift This parameter can be one of the following values: 7333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 7334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 7335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 7336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 7337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 7338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 7339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 7340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 7341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 7342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(const ADC_TypeDef *ADCx) 7344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); 7346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multim 7353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 7357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode configuration to operate in independent mode 7359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 7360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 7361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 7362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 7363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 7366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 7367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro 7368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 7369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_SetMultimode 7370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Multimode This parameter can be one of the following values: 7373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 7374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 7375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 7376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 7377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 7378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 7379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 7380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 7381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode) 7384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode); 7386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccrO2eGa.s page 136 7387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode configuration to operate in independent mode 7390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 7391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 7392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 7393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 7394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_GetMultimode 7395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 7398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 7399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 7400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 7401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 7402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 7403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 7404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 7405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 7406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultimode(const ADC_Common_TypeDef *ADCxy_COMMON) 7408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); 7410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode conversion data transfer: no transfer 7414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 7415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 7416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 7417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 7418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 7419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 7420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 7421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 7422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 7423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 7424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 7425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 7426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 7427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 7428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 7429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 7430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 7431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 7432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 7433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 7434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 7435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 7436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 7437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 7438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 7439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 7440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 7441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 7442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/ccrO2eGa.s page 137 7444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled 7445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or enabled without conversion on going on group regular. 7446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n 7447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_SetMultiDMATransfer 7448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiDMATransfer This parameter can be one of the following values: 7451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 7452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 7453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 7454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 7455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 7456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMA 7459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, MultiDMATransfer); 7461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data transfer: no transfer 7465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 7466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 7467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 7468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 7469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 7470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 7471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 7472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 7473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 7474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 7475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 7476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 7477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 7478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 7479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 7480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 7481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 7482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 7483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 7484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 7485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 7486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 7487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 7488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 7489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 7490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 7491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 7492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 7493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n 7494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_GetMultiDMATransfer 7495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 7498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 7499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 7500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ARM GAS /tmp/ccrO2eGa.s page 138 7501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 7502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 7503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(const ADC_Common_TypeDef *ADCxy_COMMON) 7505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG)); 7507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode delay between 2 sampling phases. 7511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The sampling delay range depends on ADC resolution: 7512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 12 bits can have maximum delay of 12 cycles. 7513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 10 bits can have maximum delay of 10 cycles. 7514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 8 bits can have maximum delay of 8 cycles. 7515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 6 bits can have maximum delay of 6 cycles. 7516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 7519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 7520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 7521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 7522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay 7523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiTwoSamplingDelay This parameter can be one of the following values: 7526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 7527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 7528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 7529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 7530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 7531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 7532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 7533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 7534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 7535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 7536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 7537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 7538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 7539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 7540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 7541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 7542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Mul 7545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay); 7547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode delay between 2 sampling phases. 7551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay 7552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 7553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 7554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 7555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 7556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 7557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ARM GAS /tmp/ccrO2eGa.s page 139 7558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 7559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 7560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 7561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 7562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 7563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 7564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 7565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 7566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 7567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 7568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 7569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 7570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 7571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(const ADC_Common_TypeDef *ADCxy_COMMON) 7573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY)); 7575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 7577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance 7582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Put ADC instance in deep power down state. 7587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 7588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 7589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 7590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 7591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 7594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown 7595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx) 7599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_DEEPPWD); 7606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC deep power down mode. 7610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 7611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 7612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 7613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 7614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to ARM GAS /tmp/ccrO2eGa.s page 140 7615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 7617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown 7618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) 7622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); 7627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance deep power down state. 7631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled 7632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: deep power down is disabled, 1: deep power down is enabled. 7634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(const ADC_TypeDef *ADCx) 7636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); 7638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC instance internal voltage regulator. 7642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC internal voltage regulator enable, 7643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay for ADC internal voltage regulator stabilization 7644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required before performing a ADC calibration or ADC enable. 7645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tADCVREG_STUP. 7646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US. 7647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 7650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator 7651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) 7655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADVREGEN); 7662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC internal voltage regulator. 7666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 7669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator 7670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None ARM GAS /tmp/ccrO2eGa.s page 141 7672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx) 7674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS)); 7676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance internal voltage regulator state. 7680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled 7681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. 7683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(const ADC_TypeDef *ADCx) 7685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); 7687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable the selected ADC instance. 7691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC enable, a delay for 7692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC internal analog stabilization is required before performing a 7693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 7694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tSTAB. 7695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 7696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 7697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 7698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled and ADC internal voltage regulator enabled. 7701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_Enable 7702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) 7706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADEN); 7713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable the selected ADC instance. 7717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be not disabled. Must be enabled without conversion on going 7720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 7721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_Disable 7722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) 7726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ ARM GAS /tmp/ccrO2eGa.s page 142 7729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADDIS); 7733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance enable state. 7737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 7738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 7739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 7740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_IsEnabled 7741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: ADC is disabled, 1: ADC is enabled. 7743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(const ADC_TypeDef *ADCx) 7745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); 7747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance disable state. 7751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing 7752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no ADC disable command on going. 7754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(const ADC_TypeDef *ADCx) 7756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); 7758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC calibration in the mode single-ended 7762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 7763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, a minimum number of ADC clock cycles 7764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are required between ADC end of calibration and ADC enable. 7765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES. 7766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 7767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 7768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 7769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration run must be performed for each of these 7770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 7771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 7772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 7775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_StartCalibration\n 7776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CR ADCALDIF LL_ADC_StartCalibration 7777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 7779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 7780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 7781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff) 163 .loc 2 7783 22 view .LVU30 164 .LBB285: ARM GAS /tmp/ccrO2eGa.s page 143 7784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 165 .loc 2 7788 3 view .LVU31 166 0032 9368 ldr r3, [r2, #8] 167 0034 23F04043 bic r3, r3, #-1073741824 168 0038 23F03F03 bic r3, r3, #63 169 003c 05F08045 and r5, r5, #1073741824 170 .LVL10: 171 .loc 2 7788 3 is_stmt 0 view .LVU32 172 0040 2B43 orrs r3, r3, r5 173 0042 43F00043 orr r3, r3, #-2147483648 174 0046 9360 str r3, [r2, #8] 175 .LVL11: 176 .loc 2 7788 3 view .LVU33 177 .LBE285: 178 .LBE284: 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait for calibration completion */ 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL) 179 .loc 1 155 5 is_stmt 1 view .LVU34 180 .L7: 181 .loc 1 155 56 view .LVU35 182 .loc 1 155 44 is_stmt 0 view .LVU36 183 0048 2368 ldr r3, [r4] 184 .LVL12: 185 .LBB286: 186 .LBI286: 7789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCALDIF | ADC_CR_BITS_PROPERTY_RS, 7790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCAL | (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK)); 7791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration state. 7795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing 7796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: calibration complete, 1: calibration in progress. 7798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(const ADC_TypeDef *ADCx) 187 .loc 2 7799 26 is_stmt 1 view .LVU37 188 .LBB287: 7800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL); 189 .loc 2 7801 3 view .LVU38 190 .loc 2 7801 12 is_stmt 0 view .LVU39 191 004a 9B68 ldr r3, [r3, #8] 192 .LVL13: 193 .loc 2 7801 70 view .LVU40 194 004c 002B cmp r3, #0 195 004e 06DB blt .L13 196 .LVL14: 197 .loc 2 7801 70 view .LVU41 198 .LBE287: 199 .LBE286: 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccrO2eGa.s page 144 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index++; 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 200 .loc 1 173 5 is_stmt 1 view .LVU42 201 0050 E36D ldr r3, [r4, #92] 202 0052 23F00303 bic r3, r3, #3 203 0056 43F00103 orr r3, r3, #1 204 005a E365 str r3, [r4, #92] 205 005c 15E0 b .L10 206 .LVL15: 207 .L13: 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 208 .loc 1 157 7 view .LVU43 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 209 .loc 1 157 22 is_stmt 0 view .LVU44 210 005e 019B ldr r3, [sp, #4] 211 0060 0133 adds r3, r3, #1 212 0062 0193 str r3, [sp, #4] 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 213 .loc 1 158 7 is_stmt 1 view .LVU45 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 214 .loc 1 158 27 is_stmt 0 view .LVU46 215 0064 019A ldr r2, [sp, #4] 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 216 .loc 1 158 10 view .LVU47 217 0066 0C4B ldr r3, .L14 218 0068 9A42 cmp r2, r3 219 006a EDD9 bls .L7 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 220 .loc 1 161 9 is_stmt 1 view .LVU48 221 006c E36D ldr r3, [r4, #92] 222 006e 23F01203 bic r3, r3, #18 223 0072 43F01003 orr r3, r3, #16 224 0076 E365 str r3, [r4, #92] 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 225 .loc 1 166 9 view .LVU49 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 226 .loc 1 166 9 view .LVU50 227 0078 0023 movs r3, #0 228 007a 84F85830 strb r3, [r4, #88] 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 229 .loc 1 166 9 view .LVU51 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 145 230 .loc 1 168 9 view .LVU52 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 231 .loc 1 168 16 is_stmt 0 view .LVU53 232 007e 0120 movs r0, #1 233 .LVL16: 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 234 .loc 1 168 16 view .LVU54 235 0080 06E0 b .L5 236 .LVL17: 237 .L6: 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 238 .loc 1 179 5 is_stmt 1 view .LVU55 239 0082 E36D ldr r3, [r4, #92] 240 0084 43F01003 orr r3, r3, #16 241 0088 E365 str r3, [r4, #92] 242 .LVL18: 243 .L10: 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: No need to update variable "tmp_hal_status" here: already set */ 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to state "HAL_ERROR" by function disabling the ADC. */ 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 244 .loc 1 186 3 view .LVU56 245 .loc 1 186 3 view .LVU57 246 008a 0023 movs r3, #0 247 008c 84F85830 strb r3, [r4, #88] 248 .loc 1 186 3 view .LVU58 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 249 .loc 1 189 3 view .LVU59 250 .LVL19: 251 .L5: 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 252 .loc 1 190 1 is_stmt 0 view .LVU60 253 0090 03B0 add sp, sp, #12 254 .LCFI4: 255 .cfi_remember_state 256 .cfi_def_cfa_offset 12 257 @ sp needed 258 0092 30BD pop {r4, r5, pc} 259 .LVL20: 260 .L11: 261 .LCFI5: 262 .cfi_restore_state 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 263 .loc 1 136 3 discriminator 1 view .LVU61 264 0094 0220 movs r0, #2 265 .LVL21: 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 146 266 .loc 1 136 3 discriminator 1 view .LVU62 267 0096 FBE7 b .L5 268 .L15: 269 .align 2 270 .L14: 271 0098 01DE0400 .word 318977 272 .cfi_endproc 273 .LFE329: 275 .section .text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits 276 .align 1 277 .global HAL_ADCEx_Calibration_GetValue 278 .syntax unified 279 .thumb 280 .thumb_func 282 HAL_ADCEx_Calibration_GetValue: 283 .LVL22: 284 .LFB330: 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get the calibration factor. 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval Calibration value. 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 285 .loc 1 201 1 is_stmt 1 view -0 286 .cfi_startproc 287 @ args = 0, pretend = 0, frame = 0 288 @ frame_needed = 0, uses_anonymous_args = 0 289 @ link register save eliminated. 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 290 .loc 1 203 3 view .LVU64 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 291 .loc 1 204 3 view .LVU65 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the selected ADC calibration value */ 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff); 292 .loc 1 207 3 view .LVU66 293 .loc 1 207 42 is_stmt 0 view .LVU67 294 0000 0368 ldr r3, [r0] 295 .LVL23: 296 .LBB288: 297 .LBI288: 3895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 298 .loc 2 3895 26 is_stmt 1 view .LVU68 299 .LBB289: 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) 300 .loc 2 3901 3 view .LVU69 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) 301 .loc 2 3901 21 is_stmt 0 view .LVU70 302 0002 D3F8B400 ldr r0, [r3, #180] 303 .LVL24: 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) ARM GAS /tmp/ccrO2eGa.s page 147 304 .loc 2 3901 21 view .LVU71 305 0006 0840 ands r0, r0, r1 306 0008 00F07F10 and r0, r0, #8323199 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4)); 307 .loc 2 3903 74 view .LVU72 308 000c 090B lsrs r1, r1, #12 309 .LVL25: 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4)); 310 .loc 2 3903 74 view .LVU73 311 000e 01F01001 and r1, r1, #16 312 .LVL26: 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4)); 313 .loc 2 3903 74 view .LVU74 314 .LBE289: 315 .LBE288: 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 316 .loc 1 208 1 view .LVU75 317 0012 C840 lsrs r0, r0, r1 318 0014 7047 bx lr 319 .cfi_endproc 320 .LFE330: 322 .section .text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits 323 .align 1 324 .global HAL_ADCEx_Calibration_SetValue 325 .syntax unified 326 .thumb 327 .thumb_func 329 HAL_ADCEx_Calibration_SetValue: 330 .LVL27: 331 .LFB331: 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Set the calibration factor to overwrite automatic conversion result. 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC must be enabled and no conversion is ongoing. 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param CalibrationFactor Calibration factor (coded on 7 bits maximum) 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL state 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t CalibrationFactor) 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 332 .loc 1 222 1 is_stmt 1 view -0 333 .cfi_startproc 334 @ args = 0, pretend = 0, frame = 0 335 @ frame_needed = 0, uses_anonymous_args = 0 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 336 .loc 1 223 3 view .LVU77 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 337 .loc 1 224 3 view .LVU78 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 338 .loc 1 225 3 view .LVU79 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); ARM GAS /tmp/ccrO2eGa.s page 148 339 .loc 1 228 3 view .LVU80 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 340 .loc 1 229 3 view .LVU81 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor)); 341 .loc 1 230 3 view .LVU82 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 342 .loc 1 233 3 view .LVU83 343 .loc 1 233 3 view .LVU84 344 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 345 0004 012B cmp r3, #1 346 0006 26D0 beq .L23 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 347 .loc 1 222 1 is_stmt 0 view .LVU85 348 0008 70B5 push {r4, r5, r6, lr} 349 .LCFI6: 350 .cfi_def_cfa_offset 16 351 .cfi_offset 4, -16 352 .cfi_offset 5, -12 353 .cfi_offset 6, -8 354 .cfi_offset 14, -4 355 000a 0446 mov r4, r0 356 .loc 1 233 3 is_stmt 1 discriminator 2 view .LVU86 357 000c 0123 movs r3, #1 358 000e 80F85830 strb r3, [r0, #88] 359 .loc 1 233 3 view .LVU87 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of hardware constraints before modifying the calibration */ 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* factors register: ADC must be enabled, no conversion on going. */ 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 360 .loc 1 237 3 view .LVU88 361 .loc 1 237 79 is_stmt 0 view .LVU89 362 0012 0068 ldr r0, [r0] 363 .LVL28: 364 .LBB290: 365 .LBI290: 7802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu 7809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group regular conversion. 7814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 7815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 7816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 7817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 7818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 7819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 7820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 7821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to ARM GAS /tmp/ccrO2eGa.s page 149 7822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 7824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 7825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_StartConversion 7827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) 7831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTART); 7838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group regular conversion. 7842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group regular, 7845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_StopConversion 7847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) 7851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTP); 7858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion state. 7862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing 7863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group regular. 7865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(const ADC_TypeDef *ADCx) 366 .loc 2 7866 26 is_stmt 1 view .LVU90 367 .LBB291: 7867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); 368 .loc 2 7868 3 view .LVU91 369 .loc 2 7868 12 is_stmt 0 view .LVU92 370 0014 8368 ldr r3, [r0, #8] 371 .loc 2 7868 74 view .LVU93 372 0016 13F00403 ands r3, r3, #4 373 001a 00D0 beq .L19 374 .loc 2 7868 74 discriminator 1 view .LVU94 375 001c 0123 movs r3, #1 ARM GAS /tmp/ccrO2eGa.s page 150 376 .L19: 377 .LVL29: 378 .loc 2 7868 74 discriminator 1 view .LVU95 379 .LBE291: 380 .LBE290: 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 381 .loc 1 238 3 is_stmt 1 view .LVU96 382 .LBB292: 383 .LBI292: 7869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular command of conversion stop state 7873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing 7874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group regular. 7876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(const ADC_TypeDef *ADCx) 7878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP)) ? 1UL : 0UL); 7880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC sampling phase for sampling time trigger mode 7884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 7885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 7886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 7887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 7888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 7891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 7892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StartSamplingPhase 7894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartSamplingPhase(ADC_TypeDef *ADCx) 7898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 7900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC sampling phase for sampling time trigger mode and start conversion 7904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 7905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 7906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 7907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 7908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_StartSamplingPhase has been called to start 7909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the sampling phase 7910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 7913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 7914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StopSamplingPhase 7916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/ccrO2eGa.s page 151 7917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopSamplingPhase(ADC_TypeDef *ADCx) 7920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 7922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 7926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and 7927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all oversampling increased data width (for devices 7928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with feature oversampling). 7929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32 7930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 7932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(const ADC_TypeDef *ADCx) 7934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 7936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 7940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 12 bits. 7941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 7944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12 7945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 7947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(const ADC_TypeDef *ADCx) 7949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 7951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 7955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 10 bits. 7956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 7959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10 7960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF 7962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(const ADC_TypeDef *ADCx) 7964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 7966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 7970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 8 bits. 7971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. ARM GAS /tmp/ccrO2eGa.s page 152 7974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8 7975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 7977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(const ADC_TypeDef *ADCx) 7979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 7981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 7985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 6 bits. 7986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 7987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 7988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 7989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6 7990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3F 7992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(const ADC_TypeDef *ADCx) 7994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 7996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 7999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 8000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data of ADC master, ADC slave 8001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or raw data with ADC master and slave concatenated. 8002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC master and slave concatenated is retrieved, 8003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a macro is available to get the conversion data of 8004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 8005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 8006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (however this macro is mainly intended for multimode 8007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, because this function can do the same 8008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by getting multimode conversion data of ADC master or ADC slave 8009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * separately). 8010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n 8011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32 8012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 8013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 8014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ConversionData This parameter can be one of the following values: 8015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 8016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 8017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER_SLAVE 8018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 8019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(const ADC_Common_TypeDef *ADCxy_COMMO 8021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ConversionData) 8022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 8023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR, 8024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ConversionData) 8025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (POSITION_VAL(ConversionData) & 0x1FUL) 8026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 8027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 8028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 8029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 8030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/ccrO2eGa.s page 153 8031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 8032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 8034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group inj 8035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 8036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 8038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 8039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group injected conversion. 8040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 8041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 8042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 8043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 8044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 8045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 8046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 8047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 8048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 8049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group injected, 8050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group injected, 8051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 8052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_StartConversion 8053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 8054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 8055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx) 8057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 8058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 8059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 8060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 8061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 8062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 8063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTART); 8064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 8065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 8066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 8067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group injected conversion. 8068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 8069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 8070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group injected, 8071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 8072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion 8073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 8074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 8075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) 8077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 8078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 8079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 8080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 8081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 8082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 8083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTP); 8084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 8085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 8086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 8087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion state. ARM GAS /tmp/ccrO2eGa.s page 154 8088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing 8089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 8090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group injected. 8091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(const ADC_TypeDef *ADCx) 384 .loc 2 8092 26 view .LVU97 385 .LBB293: 8093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 8094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); 386 .loc 2 8094 3 view .LVU98 387 .loc 2 8094 12 is_stmt 0 view .LVU99 388 001e 8568 ldr r5, [r0, #8] 389 .loc 2 8094 76 view .LVU100 390 0020 15F00805 ands r5, r5, #8 391 0024 00D0 beq .L20 392 .loc 2 8094 76 discriminator 1 view .LVU101 393 0026 0125 movs r5, #1 394 .L20: 395 .LVL30: 396 .loc 2 8094 76 discriminator 1 view .LVU102 397 .LBE293: 398 .LBE292: 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) 399 .loc 1 240 3 is_stmt 1 view .LVU103 400 .LBB294: 401 .LBI294: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 402 .loc 2 7744 26 view .LVU104 403 .LBB295: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 404 .loc 2 7746 3 view .LVU105 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 405 .loc 2 7746 12 is_stmt 0 view .LVU106 406 0028 8668 ldr r6, [r0, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 407 .loc 2 7746 68 view .LVU107 408 002a 16F0010F tst r6, #1 409 002e 01D0 beq .L21 410 .LVL31: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 411 .loc 2 7746 68 view .LVU108 412 .LBE295: 413 .LBE294: 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_regular == 0UL) 414 .loc 1 241 7 view .LVU109 415 0030 03B9 cbnz r3, .L21 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 416 .loc 1 242 7 view .LVU110 417 0032 65B1 cbz r5, .L28 418 .L21: 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the selected ADC calibration value */ 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor); 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else ARM GAS /tmp/ccrO2eGa.s page 155 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 419 .loc 1 251 5 is_stmt 1 view .LVU111 420 0034 E36D ldr r3, [r4, #92] 421 .LVL32: 422 .loc 1 251 5 is_stmt 0 view .LVU112 423 0036 43F02003 orr r3, r3, #32 424 003a E365 str r3, [r4, #92] 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC error code */ 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 425 .loc 1 253 5 is_stmt 1 view .LVU113 426 003c 236E ldr r3, [r4, #96] 427 003e 43F00103 orr r3, r3, #1 428 0042 2366 str r3, [r4, #96] 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 429 .loc 1 256 5 view .LVU114 430 .LVL33: 431 .loc 1 256 20 is_stmt 0 view .LVU115 432 0044 0120 movs r0, #1 433 .LVL34: 434 .L22: 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 435 .loc 1 260 3 is_stmt 1 view .LVU116 436 .loc 1 260 3 view .LVU117 437 0046 0023 movs r3, #0 438 0048 84F85830 strb r3, [r4, #88] 439 .loc 1 260 3 view .LVU118 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 440 .loc 1 263 3 view .LVU119 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 441 .loc 1 264 1 is_stmt 0 view .LVU120 442 004c 70BD pop {r4, r5, r6, pc} 443 .LVL35: 444 .L28: 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 445 .loc 1 246 5 is_stmt 1 view .LVU121 446 004e FFF7FEFF bl LL_ADC_SetCalibrationFactor 447 .LVL36: 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 448 .loc 1 223 21 is_stmt 0 view .LVU122 449 0052 0020 movs r0, #0 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 450 .loc 1 246 5 view .LVU123 451 0054 F7E7 b .L22 452 .LVL37: 453 .L23: 454 .LCFI7: 455 .cfi_def_cfa_offset 0 456 .cfi_restore 4 ARM GAS /tmp/ccrO2eGa.s page 156 457 .cfi_restore 5 458 .cfi_restore 6 459 .cfi_restore 14 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 460 .loc 1 233 3 discriminator 1 view .LVU124 461 0056 0220 movs r0, #2 462 .LVL38: 463 .loc 1 264 1 view .LVU125 464 0058 7047 bx lr 465 .cfi_endproc 466 .LFE331: 468 .section .text.HAL_ADCEx_InjectedStart,"ax",%progbits 469 .align 1 470 .global HAL_ADCEx_InjectedStart 471 .syntax unified 472 .thumb 473 .thumb_func 475 HAL_ADCEx_InjectedStart: 476 .LVL39: 477 .LFB332: 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group. 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function: None. 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled when multimode feature is available: 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart() API must be called for ADC slave first, 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc) 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 478 .loc 1 278 1 is_stmt 1 view -0 479 .cfi_startproc 480 @ args = 0, pretend = 0, frame = 0 481 @ frame_needed = 0, uses_anonymous_args = 0 482 .loc 1 278 1 is_stmt 0 view .LVU127 483 0000 38B5 push {r3, r4, r5, lr} 484 .LCFI8: 485 .cfi_def_cfa_offset 16 486 .cfi_offset 3, -16 487 .cfi_offset 4, -12 488 .cfi_offset 5, -8 489 .cfi_offset 14, -4 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 490 .loc 1 279 3 is_stmt 1 view .LVU128 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 491 .loc 1 280 3 view .LVU129 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 492 .loc 1 282 3 view .LVU130 493 .LVL40: 494 .LBB296: 495 .LBI296: 7407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccrO2eGa.s page 157 496 .loc 2 7407 26 view .LVU131 497 .LBB297: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 498 .loc 2 7409 3 view .LVU132 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 499 .loc 2 7409 21 is_stmt 0 view .LVU133 500 0002 394B ldr r3, .L50 501 0004 9D68 ldr r5, [r3, #8] 502 .LVL41: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 503 .loc 2 7409 21 view .LVU134 504 .LBE297: 505 .LBE296: 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 506 .loc 1 286 3 is_stmt 1 view .LVU135 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 507 .loc 1 288 3 view .LVU136 508 .loc 1 288 42 is_stmt 0 view .LVU137 509 0006 0368 ldr r3, [r0] 510 .LVL42: 511 .LBB298: 512 .LBI298: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 513 .loc 2 8092 26 is_stmt 1 view .LVU138 514 .LBB299: 515 .loc 2 8094 3 view .LVU139 516 .loc 2 8094 12 is_stmt 0 view .LVU140 517 0008 9A68 ldr r2, [r3, #8] 518 .loc 2 8094 76 view .LVU141 519 000a 12F0080F tst r2, #8 520 000e 67D1 bne .L42 521 0010 0446 mov r4, r0 522 0012 05F01F05 and r5, r5, #31 523 .LVL43: 524 .loc 2 8094 76 view .LVU142 525 .LBE299: 526 .LBE298: 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 527 .loc 1 301 5 is_stmt 1 view .LVU143 528 .loc 1 301 33 is_stmt 0 view .LVU144 529 0016 DA68 ldr r2, [r3, #12] ARM GAS /tmp/ccrO2eGa.s page 158 530 .LVL44: 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 531 .loc 1 303 5 is_stmt 1 view .LVU145 532 .loc 1 303 10 is_stmt 0 view .LVU146 533 0018 DB6C ldr r3, [r3, #76] 534 .loc 1 303 8 view .LVU147 535 001a 13F4C07F tst r3, #384 536 001e 01D1 bne .L31 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) 537 .loc 1 304 9 view .LVU148 538 0020 002A cmp r2, #0 539 0022 3DDA bge .L47 540 .L31: 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 541 .loc 1 312 5 is_stmt 1 view .LVU149 542 .loc 1 312 5 view .LVU150 543 0024 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 544 0028 012B cmp r3, #1 545 002a 5BD0 beq .L43 546 .loc 1 312 5 discriminator 2 view .LVU151 547 002c 0123 movs r3, #1 548 002e 84F85830 strb r3, [r4, #88] 549 .loc 1 312 5 view .LVU152 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 550 .loc 1 315 5 view .LVU153 551 .loc 1 315 22 is_stmt 0 view .LVU154 552 0032 2046 mov r0, r4 553 .LVL45: 554 .loc 1 315 22 view .LVU155 555 0034 FFF7FEFF bl ADC_Enable 556 .LVL46: 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 557 .loc 1 318 5 is_stmt 1 view .LVU156 558 .loc 1 318 8 is_stmt 0 view .LVU157 559 0038 0028 cmp r0, #0 560 003a 4DD1 bne .L32 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 561 .loc 1 321 7 is_stmt 1 view .LVU158 562 .loc 1 321 16 is_stmt 0 view .LVU159 563 003c E36D ldr r3, [r4, #92] 564 .loc 1 321 10 view .LVU160 565 003e 13F4807F tst r3, #256 566 0042 33D0 beq .L33 ARM GAS /tmp/ccrO2eGa.s page 159 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 567 .loc 1 324 9 is_stmt 1 view .LVU161 568 0044 236E ldr r3, [r4, #96] 569 0046 23F00803 bic r3, r3, #8 570 004a 2366 str r3, [r4, #96] 571 .L34: 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 572 .loc 1 335 7 view .LVU162 573 004c E36D ldr r3, [r4, #92] 574 004e 23F44053 bic r3, r3, #12288 575 0052 23F00103 bic r3, r3, #1 576 0056 43F48053 orr r3, r3, #4096 577 005a E365 str r3, [r4, #92] 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 578 .loc 1 343 7 view .LVU163 579 .loc 1 343 12 is_stmt 0 view .LVU164 580 005c 2368 ldr r3, [r4] 581 005e 234A ldr r2, .L50+4 582 0060 9342 cmp r3, r2 583 0062 26D0 beq .L48 584 .loc 1 343 12 discriminator 1 view .LVU165 585 0064 1A46 mov r2, r3 586 .L35: 587 .loc 1 343 10 discriminator 4 view .LVU166 588 0066 9342 cmp r3, r2 589 0068 00D0 beq .L36 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 590 .loc 1 344 11 view .LVU167 591 006a 1DB9 cbnz r5, .L37 592 .L36: 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 593 .loc 1 347 9 is_stmt 1 view .LVU168 594 006c E26D ldr r2, [r4, #92] 595 006e 22F48012 bic r2, r2, #1048576 596 0072 E265 str r2, [r4, #92] 597 .L37: ARM GAS /tmp/ccrO2eGa.s page 160 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 598 .loc 1 353 7 view .LVU169 599 0074 6022 movs r2, #96 600 0076 1A60 str r2, [r3] 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 601 .loc 1 358 7 view .LVU170 602 .loc 1 358 7 view .LVU171 603 0078 0023 movs r3, #0 604 007a 84F85830 strb r3, [r4, #88] 605 .loc 1 358 7 view .LVU172 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 606 .loc 1 373 7 view .LVU173 607 .loc 1 373 12 is_stmt 0 view .LVU174 608 007e 2368 ldr r3, [r4] 609 0080 1A4A ldr r2, .L50+4 610 0082 9342 cmp r3, r2 611 0084 18D0 beq .L49 612 .loc 1 373 12 discriminator 1 view .LVU175 613 0086 1A46 mov r2, r3 614 .L38: 615 .loc 1 373 10 discriminator 4 view .LVU176 616 0088 9342 cmp r3, r2 617 008a 18D0 beq .L39 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 618 .loc 1 374 11 view .LVU177 619 008c BDB1 cbz r5, .L39 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 620 .loc 1 375 11 view .LVU178 621 008e 062D cmp r5, #6 622 0090 15D0 beq .L39 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 623 .loc 1 376 11 view .LVU179 624 0092 072D cmp r5, #7 625 0094 13D0 beq .L39 ARM GAS /tmp/ccrO2eGa.s page 161 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 626 .loc 1 388 9 is_stmt 1 view .LVU180 627 0096 E36D ldr r3, [r4, #92] 628 0098 43F48013 orr r3, r3, #1048576 629 009c E365 str r3, [r4, #92] 630 009e 20E0 b .L30 631 .LVL47: 632 .L47: 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 633 .loc 1 307 7 view .LVU181 634 00a0 C36D ldr r3, [r0, #92] 635 00a2 43F02003 orr r3, r3, #32 636 00a6 C365 str r3, [r0, #92] 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 637 .loc 1 308 7 view .LVU182 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 638 .loc 1 308 14 is_stmt 0 view .LVU183 639 00a8 0120 movs r0, #1 640 .LVL48: 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 641 .loc 1 308 14 view .LVU184 642 00aa 1AE0 b .L30 643 .LVL49: 644 .L33: 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 645 .loc 1 329 9 is_stmt 1 view .LVU185 646 00ac 0023 movs r3, #0 647 00ae 2366 str r3, [r4, #96] 648 00b0 CCE7 b .L34 649 .L48: 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 650 .loc 1 343 12 is_stmt 0 discriminator 2 view .LVU186 651 00b2 4FF0A042 mov r2, #1342177280 652 00b6 D6E7 b .L35 653 .L49: 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 654 .loc 1 373 12 discriminator 2 view .LVU187 655 00b8 4FF0A042 mov r2, #1342177280 656 00bc E4E7 b .L38 657 .L39: 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 658 .loc 1 380 9 is_stmt 1 view .LVU188 659 .LVL50: 660 .LBB300: 661 .LBI300: 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccrO2eGa.s page 162 662 .loc 2 5827 26 view .LVU189 663 .LBB301: 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 664 .loc 2 5829 3 view .LVU190 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 665 .loc 2 5829 21 is_stmt 0 view .LVU191 666 00be DA68 ldr r2, [r3, #12] 667 .LVL51: 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 668 .loc 2 5829 21 view .LVU192 669 .LBE301: 670 .LBE300: 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 671 .loc 1 380 12 discriminator 1 view .LVU193 672 00c0 12F0007F tst r2, #33554432 673 00c4 0DD1 bne .L30 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 674 .loc 1 382 11 is_stmt 1 view .LVU194 675 .LVL52: 676 .LBB302: 677 .LBI302: 8056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 678 .loc 2 8056 22 view .LVU195 679 .LBB303: 8061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 680 .loc 2 8061 3 view .LVU196 681 00c6 9A68 ldr r2, [r3, #8] 682 00c8 22F00042 bic r2, r2, #-2147483648 683 00cc 22F03F02 bic r2, r2, #63 684 00d0 42F00802 orr r2, r2, #8 685 00d4 9A60 str r2, [r3, #8] 686 .LVL53: 8064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 687 .loc 2 8064 1 is_stmt 0 view .LVU197 688 00d6 04E0 b .L30 689 .L32: 8064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 690 .loc 2 8064 1 view .LVU198 691 .LBE303: 692 .LBE302: 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 693 .loc 1 402 7 is_stmt 1 view .LVU199 694 .loc 1 402 7 view .LVU200 695 00d8 0023 movs r3, #0 ARM GAS /tmp/ccrO2eGa.s page 163 696 00da 84F85830 strb r3, [r4, #88] 697 .loc 1 402 7 discriminator 1 view .LVU201 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 698 .loc 1 406 5 view .LVU202 699 .loc 1 406 12 is_stmt 0 view .LVU203 700 00de 00E0 b .L30 701 .LVL54: 702 .L42: 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 703 .loc 1 290 12 view .LVU204 704 00e0 0220 movs r0, #2 705 .LVL55: 706 .L30: 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 707 .loc 1 408 1 view .LVU205 708 00e2 38BD pop {r3, r4, r5, pc} 709 .LVL56: 710 .L43: 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 711 .loc 1 312 5 discriminator 1 view .LVU206 712 00e4 0220 movs r0, #2 713 .LVL57: 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 714 .loc 1 312 5 discriminator 1 view .LVU207 715 00e6 FCE7 b .L30 716 .L51: 717 .align 2 718 .L50: 719 00e8 00030050 .word 1342178048 720 00ec 00010050 .word 1342177536 721 .cfi_endproc 722 .LFE332: 724 .section .text.HAL_ADCEx_InjectedStop,"ax",%progbits 725 .align 1 726 .global HAL_ADCEx_InjectedStop 727 .syntax unified 728 .thumb 729 .thumb_func 731 HAL_ADCEx_InjectedStop: 732 .LVL58: 733 .LFB333: 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels. Disable ADC peripheral if 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * no regular conversion is on going. 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of multimode enabled (when multimode feature is available), 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave. 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. ARM GAS /tmp/ccrO2eGa.s page 164 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc) 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 734 .loc 1 427 1 is_stmt 1 view -0 735 .cfi_startproc 736 @ args = 0, pretend = 0, frame = 0 737 @ frame_needed = 0, uses_anonymous_args = 0 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 738 .loc 1 428 3 view .LVU209 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 739 .loc 1 431 3 view .LVU210 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 740 .loc 1 434 3 view .LVU211 741 .loc 1 434 3 view .LVU212 742 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 743 0004 012B cmp r3, #1 744 0006 23D0 beq .L56 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 745 .loc 1 427 1 is_stmt 0 view .LVU213 746 0008 10B5 push {r4, lr} 747 .LCFI9: 748 .cfi_def_cfa_offset 8 749 .cfi_offset 4, -8 750 .cfi_offset 14, -4 751 000a 0446 mov r4, r0 752 .loc 1 434 3 is_stmt 1 discriminator 2 view .LVU214 753 000c 0123 movs r3, #1 754 000e 80F85830 strb r3, [r0, #88] 755 .loc 1 434 3 view .LVU215 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 756 .loc 1 437 3 view .LVU216 757 .loc 1 437 20 is_stmt 0 view .LVU217 758 0012 0221 movs r1, #2 759 0014 FFF7FEFF bl ADC_ConversionStop 760 .LVL59: 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on regular group is on-going */ 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 761 .loc 1 441 3 is_stmt 1 view .LVU218 762 .loc 1 441 6 is_stmt 0 view .LVU219 763 0018 40B9 cbnz r0, .L54 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 764 .loc 1 443 5 is_stmt 1 view .LVU220 765 .loc 1 443 44 is_stmt 0 view .LVU221 766 001a 2368 ldr r3, [r4] ARM GAS /tmp/ccrO2eGa.s page 165 767 .LVL60: 768 .LBB304: 769 .LBI304: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 770 .loc 2 7866 26 is_stmt 1 view .LVU222 771 .LBB305: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 772 .loc 2 7868 3 view .LVU223 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 773 .loc 2 7868 12 is_stmt 0 view .LVU224 774 001c 9B68 ldr r3, [r3, #8] 775 .LVL61: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 776 .loc 2 7868 74 view .LVU225 777 001e 13F0040F tst r3, #4 778 0022 07D0 beq .L55 779 .LVL62: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 780 .loc 2 7868 74 view .LVU226 781 .LBE305: 782 .LBE304: 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 783 .loc 1 462 7 is_stmt 1 view .LVU227 784 0024 E36D ldr r3, [r4, #92] 785 0026 23F48053 bic r3, r3, #4096 786 002a E365 str r3, [r4, #92] 787 .L54: 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 788 .loc 1 467 3 view .LVU228 789 .loc 1 467 3 view .LVU229 790 002c 0023 movs r3, #0 791 002e 84F85830 strb r3, [r4, #88] 792 .loc 1 467 3 view .LVU230 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ ARM GAS /tmp/ccrO2eGa.s page 166 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 793 .loc 1 470 3 view .LVU231 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 794 .loc 1 471 1 is_stmt 0 view .LVU232 795 0032 10BD pop {r4, pc} 796 .LVL63: 797 .L55: 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 798 .loc 1 446 7 is_stmt 1 view .LVU233 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 799 .loc 1 446 24 is_stmt 0 view .LVU234 800 0034 2046 mov r0, r4 801 .LVL64: 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 802 .loc 1 446 24 view .LVU235 803 0036 FFF7FEFF bl ADC_Disable 804 .LVL65: 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 805 .loc 1 449 7 is_stmt 1 view .LVU236 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 806 .loc 1 449 10 is_stmt 0 view .LVU237 807 003a 0028 cmp r0, #0 808 003c F6D1 bne .L54 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 809 .loc 1 452 9 is_stmt 1 view .LVU238 810 003e E36D ldr r3, [r4, #92] 811 0040 23F48853 bic r3, r3, #4352 812 0044 23F00103 bic r3, r3, #1 813 0048 43F00103 orr r3, r3, #1 814 004c E365 str r3, [r4, #92] 815 004e EDE7 b .L54 816 .LVL66: 817 .L56: 818 .LCFI10: 819 .cfi_def_cfa_offset 0 820 .cfi_restore 4 821 .cfi_restore 14 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 822 .loc 1 434 3 is_stmt 0 discriminator 1 view .LVU239 823 0050 0220 movs r0, #2 824 .LVL67: 825 .loc 1 471 1 view .LVU240 826 0052 7047 bx lr 827 .cfi_endproc 828 .LFE333: 830 .section .text.HAL_ADCEx_InjectedPollForConversion,"ax",%progbits 831 .align 1 832 .global HAL_ADCEx_InjectedPollForConversion 833 .syntax unified 834 .thumb 835 .thumb_func 837 HAL_ADCEx_InjectedPollForConversion: 838 .LVL68: 839 .LFB334: 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Wait for injected group conversion to be completed. ARM GAS /tmp/ccrO2eGa.s page 167 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Timeout Timeout value in millisecond. 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * checked and cleared depending on AUTDLY bit status. 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 840 .loc 1 482 1 is_stmt 1 view -0 841 .cfi_startproc 842 @ args = 0, pretend = 0, frame = 0 843 @ frame_needed = 0, uses_anonymous_args = 0 844 .loc 1 482 1 is_stmt 0 view .LVU242 845 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 846 .LCFI11: 847 .cfi_def_cfa_offset 24 848 .cfi_offset 4, -24 849 .cfi_offset 5, -20 850 .cfi_offset 6, -16 851 .cfi_offset 7, -12 852 .cfi_offset 8, -8 853 .cfi_offset 14, -4 854 0004 0446 mov r4, r0 855 0006 0D46 mov r5, r1 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 856 .loc 1 483 3 is_stmt 1 view .LVU243 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_flag_end; 857 .loc 1 484 3 view .LVU244 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start; 858 .loc 1 485 3 view .LVU245 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_reg_is_trigger_source_sw_start; 859 .loc 1 486 3 view .LVU246 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_cfgr; 860 .loc 1 487 3 view .LVU247 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_TypeDef *tmpADC_Master; 861 .loc 1 489 3 view .LVU248 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 862 .loc 1 490 3 view .LVU249 863 .LVL69: 864 .LBB306: 865 .LBI306: 7407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 866 .loc 2 7407 26 view .LVU250 867 .LBB307: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 868 .loc 2 7409 3 view .LVU251 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 869 .loc 2 7409 21 is_stmt 0 view .LVU252 870 0008 3B4B ldr r3, .L87 871 000a 9F68 ldr r7, [r3, #8] 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 872 .loc 2 7409 10 view .LVU253 873 000c 07F01F07 and r7, r7, #31 874 .LVL70: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 875 .loc 2 7409 10 view .LVU254 ARM GAS /tmp/ccrO2eGa.s page 168 876 .LBE307: 877 .LBE306: 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 878 .loc 1 494 3 is_stmt 1 view .LVU255 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If end of sequence selected */ 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) 879 .loc 1 497 3 view .LVU256 880 .loc 1 497 17 is_stmt 0 view .LVU257 881 0010 8369 ldr r3, [r0, #24] 882 .loc 1 497 6 view .LVU258 883 0012 082B cmp r3, #8 884 0014 1FD0 beq .L83 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_flag_end = ADC_FLAG_JEOS; 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* end of conversion selected */ 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_flag_end = ADC_FLAG_JEOC; 885 .loc 1 503 18 view .LVU259 886 0016 2026 movs r6, #32 887 .L62: 888 .LVL71: 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get timeout */ 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 889 .loc 1 507 3 is_stmt 1 view .LVU260 890 .loc 1 507 15 is_stmt 0 view .LVU261 891 0018 FFF7FEFF bl HAL_GetTick 892 .LVL72: 893 .loc 1 507 15 view .LVU262 894 001c 8046 mov r8, r0 895 .LVL73: 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait until End of Conversion or Sequence flag is raised */ 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((hadc->Instance->ISR & tmp_flag_end) == 0UL) 896 .loc 1 510 3 is_stmt 1 view .LVU263 897 .L64: 898 .loc 1 510 47 view .LVU264 899 .loc 1 510 15 is_stmt 0 view .LVU265 900 001e 2368 ldr r3, [r4] 901 .loc 1 510 25 view .LVU266 902 0020 1A68 ldr r2, [r3] 903 .loc 1 510 47 view .LVU267 904 0022 3242 tst r2, r6 905 0024 19D1 bne .L84 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if timeout is disabled (set to infinite wait) */ 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (Timeout != HAL_MAX_DELAY) 906 .loc 1 513 5 is_stmt 1 view .LVU268 907 .loc 1 513 8 is_stmt 0 view .LVU269 908 0026 B5F1FF3F cmp r5, #-1 909 002a F8D0 beq .L64 ARM GAS /tmp/ccrO2eGa.s page 169 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) 910 .loc 1 515 7 is_stmt 1 view .LVU270 911 .loc 1 515 13 is_stmt 0 view .LVU271 912 002c FFF7FEFF bl HAL_GetTick 913 .LVL74: 914 .loc 1 515 27 discriminator 1 view .LVU272 915 0030 A0EB0800 sub r0, r0, r8 916 .loc 1 515 10 discriminator 1 view .LVU273 917 0034 A842 cmp r0, r5 918 0036 01D8 bhi .L65 919 .loc 1 515 51 discriminator 1 view .LVU274 920 0038 002D cmp r5, #0 921 003a F0D1 bne .L64 922 .L65: 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->ISR & tmp_flag_end) == 0UL) 923 .loc 1 518 9 is_stmt 1 view .LVU275 924 .loc 1 518 18 is_stmt 0 view .LVU276 925 003c 2368 ldr r3, [r4] 926 .loc 1 518 28 view .LVU277 927 003e 1B68 ldr r3, [r3] 928 .loc 1 518 12 view .LVU278 929 0040 3342 tst r3, r6 930 0042 ECD1 bne .L64 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to timeout */ 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 931 .loc 1 521 11 is_stmt 1 view .LVU279 932 0044 E36D ldr r3, [r4, #92] 933 0046 43F00403 orr r3, r3, #4 934 004a E365 str r3, [r4, #92] 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 935 .loc 1 524 11 view .LVU280 936 .loc 1 524 11 view .LVU281 937 004c 0023 movs r3, #0 938 004e 84F85830 strb r3, [r4, #88] 939 .loc 1 524 11 view .LVU282 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_TIMEOUT; 940 .loc 1 526 11 view .LVU283 941 .loc 1 526 18 is_stmt 0 view .LVU284 942 0052 0320 movs r0, #3 943 0054 44E0 b .L66 944 .LVL75: 945 .L83: 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 946 .loc 1 499 18 view .LVU285 947 0056 4026 movs r6, #64 948 0058 DEE7 b .L62 949 .LVL76: 950 .L84: 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 170 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Retrieve ADC configuration */ 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance); 951 .loc 1 533 3 is_stmt 1 view .LVU286 952 .LBB308: 953 .LBI308: 5494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 954 .loc 2 5494 26 view .LVU287 955 .LBB309: 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 956 .loc 2 5496 3 view .LVU288 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 957 .loc 2 5496 12 is_stmt 0 view .LVU289 958 005a DA6C ldr r2, [r3, #76] 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 959 .loc 2 5496 105 view .LVU290 960 005c 12F4C07F tst r2, #384 961 0060 12D1 bne .L78 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 962 .loc 2 5496 105 discriminator 1 view .LVU291 963 0062 0120 movs r0, #1 964 .L68: 965 .LVL77: 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 966 .loc 2 5496 105 discriminator 1 view .LVU292 967 .LBE309: 968 .LBE308: 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance); 969 .loc 1 534 3 is_stmt 1 view .LVU293 970 .LBB311: 971 .LBI311: 4696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 972 .loc 2 4696 26 view .LVU294 973 .LBB312: 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 974 .loc 2 4698 3 view .LVU295 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 975 .loc 2 4698 12 is_stmt 0 view .LVU296 976 0064 DA68 ldr r2, [r3, #12] 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 977 .loc 2 4698 103 view .LVU297 978 0066 12F4406F tst r2, #3072 979 006a 0FD1 bne .L79 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 980 .loc 2 4698 103 discriminator 1 view .LVU298 981 006c 0125 movs r5, #1 982 .LVL78: 983 .L69: 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 984 .loc 2 4698 103 discriminator 1 view .LVU299 985 .LBE312: 986 .LBE311: 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* in function of multimode state (for devices with multimode */ 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* available). */ ARM GAS /tmp/ccrO2eGa.s page 171 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 987 .loc 1 539 3 is_stmt 1 view .LVU300 988 .loc 1 539 8 is_stmt 0 view .LVU301 989 006e 234A ldr r2, .L87+4 990 0070 9342 cmp r3, r2 991 0072 0DD0 beq .L85 992 .loc 1 539 8 discriminator 1 view .LVU302 993 0074 1A46 mov r2, r3 994 .L70: 995 .loc 1 539 6 discriminator 4 view .LVU303 996 0076 9342 cmp r3, r2 997 0078 0DD0 beq .L71 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 998 .loc 1 540 7 view .LVU304 999 007a 67B1 cbz r7, .L71 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 1000 .loc 1 541 7 view .LVU305 1001 007c 062F cmp r7, #6 1002 007e 0AD0 beq .L71 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 1003 .loc 1 542 7 view .LVU306 1004 0080 072F cmp r7, #7 1005 0082 08D0 beq .L71 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 1006 .loc 1 549 5 is_stmt 1 view .LVU307 1007 .LVL79: 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 1008 .loc 1 550 5 view .LVU308 1009 .loc 1 550 14 is_stmt 0 view .LVU309 1010 0084 D168 ldr r1, [r2, #12] 1011 0086 07E0 b .L73 1012 .LVL80: 1013 .L78: 1014 .LBB314: 1015 .LBB310: 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1016 .loc 2 5496 105 discriminator 2 view .LVU310 1017 0088 0020 movs r0, #0 1018 008a EBE7 b .L68 1019 .LVL81: 1020 .L79: 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1021 .loc 2 5496 105 discriminator 2 view .LVU311 1022 .LBE310: 1023 .LBE314: 1024 .LBB315: 1025 .LBB313: 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1026 .loc 2 4698 103 discriminator 2 view .LVU312 1027 008c 0025 movs r5, #0 ARM GAS /tmp/ccrO2eGa.s page 172 1028 .LVL82: 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1029 .loc 2 4698 103 discriminator 2 view .LVU313 1030 008e EEE7 b .L69 1031 .LVL83: 1032 .L85: 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1033 .loc 2 4698 103 discriminator 2 view .LVU314 1034 .LBE313: 1035 .LBE315: 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1036 .loc 1 539 8 discriminator 2 view .LVU315 1037 0090 4FF0A042 mov r2, #1342177280 1038 0094 EFE7 b .L70 1039 .L71: 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1040 .loc 1 545 5 is_stmt 1 view .LVU316 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1041 .loc 1 545 14 is_stmt 0 view .LVU317 1042 0096 D968 ldr r1, [r3, #12] 1043 .LVL84: 1044 .L73: 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 1045 .loc 1 557 3 is_stmt 1 view .LVU318 1046 0098 E26D ldr r2, [r4, #92] 1047 009a 42F40052 orr r2, r2, #8192 1048 009e E265 str r2, [r4, #92] 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Determine whether any further conversion upcoming on group injected */ 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by external trigger or by automatic injected conversion */ 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from group regular. */ 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) || 1049 .loc 1 562 3 view .LVU319 1050 .loc 1 562 6 is_stmt 0 view .LVU320 1051 00a0 30B9 cbnz r0, .L74 1052 .loc 1 562 66 discriminator 1 view .LVU321 1053 00a2 11F0007F tst r1, #33554432 1054 00a6 16D1 bne .L75 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) && 1055 .loc 1 563 57 view .LVU322 1056 00a8 ADB1 cbz r5, .L75 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 1057 .loc 1 564 58 view .LVU323 1058 00aa 11F4005F tst r1, #8192 1059 00ae 12D1 bne .L75 1060 .L74: 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL)))) 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check whether end of sequence is reached */ 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) 1061 .loc 1 568 5 is_stmt 1 view .LVU324 ARM GAS /tmp/ccrO2eGa.s page 173 1062 .loc 1 568 9 is_stmt 0 view .LVU325 1063 00b0 1A68 ldr r2, [r3] 1064 .loc 1 568 8 view .LVU326 1065 00b2 12F0400F tst r2, #64 1066 00b6 0ED0 beq .L75 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Particular case if injected contexts queue is enabled: */ 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* when the last context has been fully processed, JSQR is reset */ 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by the hardware. Even if no injected conversion is planned to come */ 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (queue empty, triggers are ignored), it can start again */ 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* immediately after setting a new context (JADSTART is still set). */ 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Therefore, state of HAL ADC injected group is kept to busy. */ 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL) 1067 .loc 1 576 7 is_stmt 1 view .LVU327 1068 .loc 1 576 10 is_stmt 0 view .LVU328 1069 00b8 11F4001F tst r1, #2097152 1070 00bc 0BD1 bne .L75 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1071 .loc 1 579 9 is_stmt 1 view .LVU329 1072 00be E26D ldr r2, [r4, #92] 1073 00c0 22F48052 bic r2, r2, #4096 1074 00c4 E265 str r2, [r4, #92] 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL) 1075 .loc 1 581 9 view .LVU330 1076 .loc 1 581 18 is_stmt 0 view .LVU331 1077 00c6 E26D ldr r2, [r4, #92] 1078 .loc 1 581 12 view .LVU332 1079 00c8 12F4807F tst r2, #256 1080 00cc 03D1 bne .L75 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 1081 .loc 1 583 11 is_stmt 1 view .LVU333 1082 00ce E26D ldr r2, [r4, #92] 1083 00d0 42F00102 orr r2, r2, #1 1084 00d4 E265 str r2, [r4, #92] 1085 .L75: 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear polled flag */ 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_flag_end == ADC_FLAG_JEOS) 1086 .loc 1 590 3 view .LVU334 1087 .loc 1 590 6 is_stmt 0 view .LVU335 1088 00d6 402E cmp r6, #64 1089 00d8 04D0 beq .L86 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear end of sequence JEOS flag of injected group if low power feature */ 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */ 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For injected groups, no new conversion will start before JEOS is */ 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* cleared. */ 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccrO2eGa.s page 174 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 1090 .loc 1 603 5 is_stmt 1 view .LVU336 1091 00da 2022 movs r2, #32 1092 00dc 1A60 str r2, [r3] 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return API HAL status */ 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_OK; 1093 .loc 1 607 10 is_stmt 0 view .LVU337 1094 00de 0020 movs r0, #0 1095 .LVL85: 1096 .L66: 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1097 .loc 1 608 1 view .LVU338 1098 00e0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 1099 .LVL86: 1100 .L86: 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1101 .loc 1 596 5 is_stmt 1 view .LVU339 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1102 .loc 1 596 8 is_stmt 0 view .LVU340 1103 00e4 11F4804F tst r1, #16384 1104 00e8 03D1 bne .L81 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1105 .loc 1 598 7 is_stmt 1 view .LVU341 1106 00ea 6022 movs r2, #96 1107 00ec 1A60 str r2, [r3] 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1108 .loc 1 607 10 is_stmt 0 view .LVU342 1109 00ee 0020 movs r0, #0 1110 .LVL87: 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1111 .loc 1 607 10 view .LVU343 1112 00f0 F6E7 b .L66 1113 .LVL88: 1114 .L81: 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1115 .loc 1 607 10 view .LVU344 1116 00f2 0020 movs r0, #0 1117 .LVL89: 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1118 .loc 1 607 10 view .LVU345 1119 00f4 F4E7 b .L66 1120 .L88: 1121 00f6 00BF .align 2 1122 .L87: 1123 00f8 00030050 .word 1342178048 1124 00fc 00010050 .word 1342177536 1125 .cfi_endproc 1126 .LFE334: 1128 .section .text.HAL_ADCEx_InjectedStart_IT,"ax",%progbits 1129 .align 1 ARM GAS /tmp/ccrO2eGa.s page 175 1130 .global HAL_ADCEx_InjectedStart_IT 1131 .syntax unified 1132 .thumb 1133 .thumb_func 1135 HAL_ADCEx_InjectedStart_IT: 1136 .LVL90: 1137 .LFB335: 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group with interruption. 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function according to initialization 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * setting : JEOC (end of conversion) or JEOS (end of sequence) 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is enabled): 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first, 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc) 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1138 .loc 1 623 1 is_stmt 1 view -0 1139 .cfi_startproc 1140 @ args = 0, pretend = 0, frame = 0 1141 @ frame_needed = 0, uses_anonymous_args = 0 1142 .loc 1 623 1 is_stmt 0 view .LVU347 1143 0000 38B5 push {r3, r4, r5, lr} 1144 .LCFI12: 1145 .cfi_def_cfa_offset 16 1146 .cfi_offset 3, -16 1147 .cfi_offset 4, -12 1148 .cfi_offset 5, -8 1149 .cfi_offset 14, -4 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1150 .loc 1 624 3 is_stmt 1 view .LVU348 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 1151 .loc 1 625 3 view .LVU349 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 1152 .loc 1 627 3 view .LVU350 1153 .LVL91: 1154 .LBB316: 1155 .LBI316: 7407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1156 .loc 2 7407 26 view .LVU351 1157 .LBB317: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1158 .loc 2 7409 3 view .LVU352 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1159 .loc 2 7409 21 is_stmt 0 view .LVU353 1160 0002 4A4B ldr r3, .L114 1161 0004 9D68 ldr r5, [r3, #8] 1162 .LVL92: 7409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1163 .loc 2 7409 21 view .LVU354 1164 .LBE317: ARM GAS /tmp/ccrO2eGa.s page 176 1165 .LBE316: 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1166 .loc 1 631 3 is_stmt 1 view .LVU355 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 1167 .loc 1 633 3 view .LVU356 1168 .loc 1 633 42 is_stmt 0 view .LVU357 1169 0006 0368 ldr r3, [r0] 1170 .LVL93: 1171 .LBB318: 1172 .LBI318: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1173 .loc 2 8092 26 is_stmt 1 view .LVU358 1174 .LBB319: 1175 .loc 2 8094 3 view .LVU359 1176 .loc 2 8094 12 is_stmt 0 view .LVU360 1177 0008 9A68 ldr r2, [r3, #8] 1178 .loc 2 8094 76 view .LVU361 1179 000a 12F0080F tst r2, #8 1180 000e 40F08980 bne .L105 1181 0012 0446 mov r4, r0 1182 0014 05F01F05 and r5, r5, #31 1183 .LVL94: 1184 .loc 2 8094 76 view .LVU362 1185 .LBE319: 1186 .LBE318: 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 1187 .loc 1 646 5 is_stmt 1 view .LVU363 1188 .loc 1 646 33 is_stmt 0 view .LVU364 1189 0018 DA68 ldr r2, [r3, #12] 1190 .LVL95: 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 1191 .loc 1 648 5 is_stmt 1 view .LVU365 1192 .loc 1 648 10 is_stmt 0 view .LVU366 1193 001a DB6C ldr r3, [r3, #76] 1194 .loc 1 648 8 view .LVU367 1195 001c 13F4C07F tst r3, #384 1196 0020 01D1 bne .L91 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) 1197 .loc 1 649 9 view .LVU368 1198 0022 002A cmp r2, #0 ARM GAS /tmp/ccrO2eGa.s page 177 1199 0024 53DA bge .L110 1200 .L91: 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1201 .loc 1 657 5 is_stmt 1 view .LVU369 1202 .loc 1 657 5 view .LVU370 1203 0026 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 1204 002a 012B cmp r3, #1 1205 002c 7CD0 beq .L106 1206 .loc 1 657 5 discriminator 2 view .LVU371 1207 002e 0123 movs r3, #1 1208 0030 84F85830 strb r3, [r4, #88] 1209 .loc 1 657 5 view .LVU372 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 1210 .loc 1 660 5 view .LVU373 1211 .loc 1 660 22 is_stmt 0 view .LVU374 1212 0034 2046 mov r0, r4 1213 .LVL96: 1214 .loc 1 660 22 view .LVU375 1215 0036 FFF7FEFF bl ADC_Enable 1216 .LVL97: 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1217 .loc 1 663 5 is_stmt 1 view .LVU376 1218 .loc 1 663 8 is_stmt 0 view .LVU377 1219 003a 0028 cmp r0, #0 1220 003c 6ED1 bne .L92 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 1221 .loc 1 666 7 is_stmt 1 view .LVU378 1222 .loc 1 666 16 is_stmt 0 view .LVU379 1223 003e E36D ldr r3, [r4, #92] 1224 .loc 1 666 10 view .LVU380 1225 0040 13F4807F tst r3, #256 1226 0044 49D0 beq .L93 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 1227 .loc 1 669 9 is_stmt 1 view .LVU381 1228 0046 236E ldr r3, [r4, #96] 1229 0048 23F00803 bic r3, r3, #8 1230 004c 2366 str r3, [r4, #96] 1231 .L94: 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ ARM GAS /tmp/ccrO2eGa.s page 178 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1232 .loc 1 680 7 view .LVU382 1233 004e E36D ldr r3, [r4, #92] 1234 0050 23F44053 bic r3, r3, #12288 1235 0054 23F00103 bic r3, r3, #1 1236 0058 43F48053 orr r3, r3, #4096 1237 005c E365 str r3, [r4, #92] 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1238 .loc 1 688 7 view .LVU383 1239 .loc 1 688 12 is_stmt 0 view .LVU384 1240 005e 2368 ldr r3, [r4] 1241 0060 334A ldr r2, .L114+4 1242 0062 9342 cmp r3, r2 1243 0064 3CD0 beq .L111 1244 .loc 1 688 12 discriminator 1 view .LVU385 1245 0066 1A46 mov r2, r3 1246 .L95: 1247 .loc 1 688 10 discriminator 4 view .LVU386 1248 0068 9342 cmp r3, r2 1249 006a 00D0 beq .L96 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1250 .loc 1 689 11 view .LVU387 1251 006c 1DB9 cbnz r5, .L97 1252 .L96: 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1253 .loc 1 692 9 is_stmt 1 view .LVU388 1254 006e E26D ldr r2, [r4, #92] 1255 0070 22F48012 bic r2, r2, #1048576 1256 0074 E265 str r2, [r4, #92] 1257 .L97: 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 1258 .loc 1 698 7 view .LVU389 1259 0076 6022 movs r2, #96 1260 0078 1A60 str r2, [r3] 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ ARM GAS /tmp/ccrO2eGa.s page 179 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1261 .loc 1 703 7 view .LVU390 1262 .loc 1 703 7 view .LVU391 1263 007a 0023 movs r3, #0 1264 007c 84F85830 strb r3, [r4, #88] 1265 .loc 1 703 7 view .LVU392 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC Injected context queue overflow interrupt if this feature */ 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is enabled. */ 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL) 1266 .loc 1 707 7 view .LVU393 1267 .loc 1 707 16 is_stmt 0 view .LVU394 1268 0080 2368 ldr r3, [r4] 1269 .loc 1 707 26 view .LVU395 1270 0082 DA68 ldr r2, [r3, #12] 1271 .loc 1 707 10 view .LVU396 1272 0084 12F4001F tst r2, #2097152 1273 0088 03D0 beq .L98 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF); 1274 .loc 1 709 9 is_stmt 1 view .LVU397 1275 008a 5A68 ldr r2, [r3, #4] 1276 008c 42F48062 orr r2, r2, #1024 1277 0090 5A60 str r2, [r3, #4] 1278 .L98: 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC end of conversion interrupt */ 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (hadc->Init.EOCSelection) 1279 .loc 1 713 7 view .LVU398 1280 .loc 1 713 25 is_stmt 0 view .LVU399 1281 0092 A369 ldr r3, [r4, #24] 1282 .loc 1 713 7 view .LVU400 1283 0094 082B cmp r3, #8 1284 0096 26D0 beq .L112 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_EOC_SEQ_CONV: 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */ 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 1285 .loc 1 721 11 is_stmt 1 view .LVU401 1286 0098 2268 ldr r2, [r4] 1287 009a 5368 ldr r3, [r2, #4] 1288 009c 23F04003 bic r3, r3, #64 1289 00a0 5360 str r3, [r2, #4] 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1290 .loc 1 722 11 view .LVU402 1291 00a2 2268 ldr r2, [r4] 1292 00a4 5368 ldr r3, [r2, #4] 1293 00a6 43F02003 orr r3, r3, #32 1294 00aa 5360 str r3, [r2, #4] 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1295 .loc 1 723 11 view .LVU403 ARM GAS /tmp/ccrO2eGa.s page 180 1296 .L100: 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1297 .loc 1 739 7 view .LVU404 1298 .loc 1 739 12 is_stmt 0 view .LVU405 1299 00ac 2368 ldr r3, [r4] 1300 00ae 204A ldr r2, .L114+4 1301 00b0 9342 cmp r3, r2 1302 00b2 23D0 beq .L113 1303 .loc 1 739 12 discriminator 1 view .LVU406 1304 00b4 1A46 mov r2, r3 1305 .L101: 1306 .loc 1 739 10 discriminator 4 view .LVU407 1307 00b6 9342 cmp r3, r2 1308 00b8 23D0 beq .L102 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1309 .loc 1 740 11 view .LVU408 1310 00ba 15B3 cbz r5, .L102 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 1311 .loc 1 741 11 view .LVU409 1312 00bc 062D cmp r5, #6 1313 00be 20D0 beq .L102 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 1314 .loc 1 742 11 view .LVU410 1315 00c0 072D cmp r5, #7 1316 00c2 1ED0 beq .L102 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1317 .loc 1 754 9 is_stmt 1 view .LVU411 1318 00c4 E36D ldr r3, [r4, #92] 1319 00c6 43F48013 orr r3, r3, #1048576 1320 00ca E365 str r3, [r4, #92] 1321 00cc 2BE0 b .L90 ARM GAS /tmp/ccrO2eGa.s page 181 1322 .LVL98: 1323 .L110: 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1324 .loc 1 652 7 view .LVU412 1325 00ce C36D ldr r3, [r0, #92] 1326 00d0 43F02003 orr r3, r3, #32 1327 00d4 C365 str r3, [r0, #92] 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1328 .loc 1 653 7 view .LVU413 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1329 .loc 1 653 14 is_stmt 0 view .LVU414 1330 00d6 0120 movs r0, #1 1331 .LVL99: 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1332 .loc 1 653 14 view .LVU415 1333 00d8 25E0 b .L90 1334 .LVL100: 1335 .L93: 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1336 .loc 1 674 9 is_stmt 1 view .LVU416 1337 00da 0023 movs r3, #0 1338 00dc 2366 str r3, [r4, #96] 1339 00de B6E7 b .L94 1340 .L111: 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1341 .loc 1 688 12 is_stmt 0 discriminator 2 view .LVU417 1342 00e0 4FF0A042 mov r2, #1342177280 1343 00e4 C0E7 b .L95 1344 .L112: 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1345 .loc 1 716 11 is_stmt 1 view .LVU418 1346 00e6 2268 ldr r2, [r4] 1347 00e8 5368 ldr r3, [r2, #4] 1348 00ea 23F02003 bic r3, r3, #32 1349 00ee 5360 str r3, [r2, #4] 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1350 .loc 1 717 11 view .LVU419 1351 00f0 2268 ldr r2, [r4] 1352 00f2 5368 ldr r3, [r2, #4] 1353 00f4 43F04003 orr r3, r3, #64 1354 00f8 5360 str r3, [r2, #4] 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */ 1355 .loc 1 718 11 view .LVU420 1356 00fa D7E7 b .L100 1357 .L113: 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1358 .loc 1 739 12 is_stmt 0 discriminator 2 view .LVU421 1359 00fc 4FF0A042 mov r2, #1342177280 1360 0100 D9E7 b .L101 1361 .L102: 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1362 .loc 1 746 9 is_stmt 1 view .LVU422 1363 .LVL101: 1364 .LBB320: 1365 .LBI320: 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1366 .loc 2 5827 26 view .LVU423 ARM GAS /tmp/ccrO2eGa.s page 182 1367 .LBB321: 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1368 .loc 2 5829 3 view .LVU424 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1369 .loc 2 5829 21 is_stmt 0 view .LVU425 1370 0102 DA68 ldr r2, [r3, #12] 1371 .LVL102: 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1372 .loc 2 5829 21 view .LVU426 1373 .LBE321: 1374 .LBE320: 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1375 .loc 1 746 12 discriminator 1 view .LVU427 1376 0104 12F0007F tst r2, #33554432 1377 0108 0DD1 bne .L90 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1378 .loc 1 748 11 is_stmt 1 view .LVU428 1379 .LVL103: 1380 .LBB322: 1381 .LBI322: 8056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1382 .loc 2 8056 22 view .LVU429 1383 .LBB323: 8061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1384 .loc 2 8061 3 view .LVU430 1385 010a 9A68 ldr r2, [r3, #8] 1386 010c 22F00042 bic r2, r2, #-2147483648 1387 0110 22F03F02 bic r2, r2, #63 1388 0114 42F00802 orr r2, r2, #8 1389 0118 9A60 str r2, [r3, #8] 1390 .LVL104: 8064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1391 .loc 2 8064 1 is_stmt 0 view .LVU431 1392 011a 04E0 b .L90 1393 .L92: 8064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1394 .loc 2 8064 1 view .LVU432 1395 .LBE323: 1396 .LBE322: 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1397 .loc 1 768 7 is_stmt 1 view .LVU433 1398 .loc 1 768 7 view .LVU434 1399 011c 0023 movs r3, #0 1400 011e 84F85830 strb r3, [r4, #88] ARM GAS /tmp/ccrO2eGa.s page 183 1401 .loc 1 768 7 discriminator 1 view .LVU435 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1402 .loc 1 772 5 view .LVU436 1403 .loc 1 772 12 is_stmt 0 view .LVU437 1404 0122 00E0 b .L90 1405 .LVL105: 1406 .L105: 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1407 .loc 1 635 12 view .LVU438 1408 0124 0220 movs r0, #2 1409 .LVL106: 1410 .L90: 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1411 .loc 1 774 1 view .LVU439 1412 0126 38BD pop {r3, r4, r5, pc} 1413 .LVL107: 1414 .L106: 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1415 .loc 1 657 5 discriminator 1 view .LVU440 1416 0128 0220 movs r0, #2 1417 .LVL108: 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1418 .loc 1 657 5 discriminator 1 view .LVU441 1419 012a FCE7 b .L90 1420 .L115: 1421 .align 2 1422 .L114: 1423 012c 00030050 .word 1342178048 1424 0130 00010050 .word 1342177536 1425 .cfi_endproc 1426 .LFE335: 1428 .section .text.HAL_ADCEx_InjectedStop_IT,"ax",%progbits 1429 .align 1 1430 .global HAL_ADCEx_InjectedStop_IT 1431 .syntax unified 1432 .thumb 1433 .thumb_func 1435 HAL_ADCEx_InjectedStop_IT: 1436 .LVL109: 1437 .LFB336: 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels, disable interruption of 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * end-of-conversion. Disable ADC peripheral if no regular conversion 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * is on going. 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is available): 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first, 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC slave. ARM GAS /tmp/ccrO2eGa.s page 184 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of auto-injection mode, HAL_ADC_Stop() must be used. 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc) 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1438 .loc 1 796 1 is_stmt 1 view -0 1439 .cfi_startproc 1440 @ args = 0, pretend = 0, frame = 0 1441 @ frame_needed = 0, uses_anonymous_args = 0 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1442 .loc 1 797 3 view .LVU443 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1443 .loc 1 800 3 view .LVU444 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1444 .loc 1 803 3 view .LVU445 1445 .loc 1 803 3 view .LVU446 1446 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1447 0004 012B cmp r3, #1 1448 0006 28D0 beq .L120 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1449 .loc 1 796 1 is_stmt 0 view .LVU447 1450 0008 10B5 push {r4, lr} 1451 .LCFI13: 1452 .cfi_def_cfa_offset 8 1453 .cfi_offset 4, -8 1454 .cfi_offset 14, -4 1455 000a 0446 mov r4, r0 1456 .loc 1 803 3 is_stmt 1 discriminator 2 view .LVU448 1457 000c 0123 movs r3, #1 1458 000e 80F85830 strb r3, [r0, #88] 1459 .loc 1 803 3 view .LVU449 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 1460 .loc 1 806 3 view .LVU450 1461 .loc 1 806 20 is_stmt 0 view .LVU451 1462 0012 0221 movs r1, #2 1463 0014 FFF7FEFF bl ADC_ConversionStop 1464 .LVL110: 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on the other group (regular group) is intended to */ 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* continue. */ 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1465 .loc 1 811 3 is_stmt 1 view .LVU452 1466 .loc 1 811 6 is_stmt 0 view .LVU453 1467 0018 68B9 cbnz r0, .L118 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC end of conversion interrupt for injected channels */ ARM GAS /tmp/ccrO2eGa.s page 185 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF)); 1468 .loc 1 814 5 is_stmt 1 view .LVU454 1469 001a 2268 ldr r2, [r4] 1470 001c 5368 ldr r3, [r2, #4] 1471 001e 23F48C63 bic r3, r3, #1120 1472 0022 5360 str r3, [r2, #4] 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 1473 .loc 1 816 5 view .LVU455 1474 .loc 1 816 44 is_stmt 0 view .LVU456 1475 0024 2368 ldr r3, [r4] 1476 .LVL111: 1477 .LBB324: 1478 .LBI324: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1479 .loc 2 7866 26 is_stmt 1 view .LVU457 1480 .LBB325: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1481 .loc 2 7868 3 view .LVU458 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1482 .loc 2 7868 12 is_stmt 0 view .LVU459 1483 0026 9B68 ldr r3, [r3, #8] 1484 .LVL112: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1485 .loc 2 7868 74 view .LVU460 1486 0028 13F0040F tst r3, #4 1487 002c 07D0 beq .L119 1488 .LVL113: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1489 .loc 2 7868 74 view .LVU461 1490 .LBE325: 1491 .LBE324: 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1492 .loc 1 835 7 is_stmt 1 view .LVU462 1493 002e E36D ldr r3, [r4, #92] 1494 0030 23F48053 bic r3, r3, #4096 1495 0034 E365 str r3, [r4, #92] 1496 .L118: 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 186 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1497 .loc 1 840 3 view .LVU463 1498 .loc 1 840 3 view .LVU464 1499 0036 0023 movs r3, #0 1500 0038 84F85830 strb r3, [r4, #88] 1501 .loc 1 840 3 view .LVU465 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1502 .loc 1 843 3 view .LVU466 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1503 .loc 1 844 1 is_stmt 0 view .LVU467 1504 003c 10BD pop {r4, pc} 1505 .LVL114: 1506 .L119: 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1507 .loc 1 819 7 is_stmt 1 view .LVU468 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1508 .loc 1 819 24 is_stmt 0 view .LVU469 1509 003e 2046 mov r0, r4 1510 .LVL115: 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1511 .loc 1 819 24 view .LVU470 1512 0040 FFF7FEFF bl ADC_Disable 1513 .LVL116: 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1514 .loc 1 822 7 is_stmt 1 view .LVU471 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1515 .loc 1 822 10 is_stmt 0 view .LVU472 1516 0044 0028 cmp r0, #0 1517 0046 F6D1 bne .L118 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1518 .loc 1 825 9 is_stmt 1 view .LVU473 1519 0048 E36D ldr r3, [r4, #92] 1520 004a 23F48853 bic r3, r3, #4352 1521 004e 23F00103 bic r3, r3, #1 1522 0052 43F00103 orr r3, r3, #1 1523 0056 E365 str r3, [r4, #92] 1524 0058 EDE7 b .L118 1525 .LVL117: 1526 .L120: 1527 .LCFI14: 1528 .cfi_def_cfa_offset 0 1529 .cfi_restore 4 1530 .cfi_restore 14 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1531 .loc 1 803 3 is_stmt 0 discriminator 1 view .LVU474 1532 005a 0220 movs r0, #2 1533 .LVL118: 1534 .loc 1 844 1 view .LVU475 1535 005c 7047 bx lr 1536 .cfi_endproc 1537 .LFE336: 1539 .section .text.HAL_ADCEx_MultiModeStart_DMA,"ax",%progbits ARM GAS /tmp/ccrO2eGa.s page 187 1540 .align 1 1541 .global HAL_ADCEx_MultiModeStart_DMA 1542 .syntax unified 1543 .thumb 1544 .thumb_func 1546 HAL_ADCEx_MultiModeStart_DMA: 1547 .LVL119: 1548 .LFB337: 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA. 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode must have been previously configured using 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_MultiModeConfigChannel() function. 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Interruptions enabled in this function: 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * overrun, DMA half transfer, DMA transfer complete. 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Each of these interruptions has its dedicated callback function. 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note State field of Slave ADC handle is not updated in this configuration: 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * user should not rely on it for information related to Slave regular 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversions. 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param pData Destination Buffer address. 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes). 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t L 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1549 .loc 1 863 1 is_stmt 1 view -0 1550 .cfi_startproc 1551 @ args = 0, pretend = 0, frame = 112 1552 @ frame_needed = 0, uses_anonymous_args = 0 1553 .loc 1 863 1 is_stmt 0 view .LVU477 1554 0000 70B5 push {r4, r5, r6, lr} 1555 .LCFI15: 1556 .cfi_def_cfa_offset 16 1557 .cfi_offset 4, -16 1558 .cfi_offset 5, -12 1559 .cfi_offset 6, -8 1560 .cfi_offset 14, -4 1561 0002 9CB0 sub sp, sp, #112 1562 .LCFI16: 1563 .cfi_def_cfa_offset 128 1564 0004 0446 mov r4, r0 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1565 .loc 1 864 3 is_stmt 1 view .LVU478 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmp_hadc_slave; 1566 .loc 1 865 3 view .LVU479 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 1567 .loc 1 866 3 view .LVU480 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1568 .loc 1 869 3 view .LVU481 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); 1569 .loc 1 870 3 view .LVU482 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 1570 .loc 1 871 3 view .LVU483 ARM GAS /tmp/ccrO2eGa.s page 188 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); 1571 .loc 1 872 3 view .LVU484 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) 1572 .loc 1 874 3 view .LVU485 1573 .loc 1 874 42 is_stmt 0 view .LVU486 1574 0006 0068 ldr r0, [r0] 1575 .LVL120: 1576 .LBB326: 1577 .LBI326: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1578 .loc 2 7866 26 is_stmt 1 view .LVU487 1579 .LBB327: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1580 .loc 2 7868 3 view .LVU488 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1581 .loc 2 7868 12 is_stmt 0 view .LVU489 1582 0008 8068 ldr r0, [r0, #8] 1583 .LVL121: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1584 .loc 2 7868 74 view .LVU490 1585 000a 10F0040F tst r0, #4 1586 000e 5AD1 bne .L132 1587 0010 0E46 mov r6, r1 1588 0012 1546 mov r5, r2 1589 .LVL122: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1590 .loc 2 7868 74 view .LVU491 1591 .LBE327: 1592 .LBE326: 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1593 .loc 1 881 5 is_stmt 1 view .LVU492 1594 .loc 1 881 5 view .LVU493 1595 0014 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 1596 0018 012B cmp r3, #1 1597 001a 57D0 beq .L133 1598 .loc 1 881 5 discriminator 2 view .LVU494 1599 001c 0123 movs r3, #1 1600 001e 84F85830 strb r3, [r4, #88] 1601 .loc 1 881 5 view .LVU495 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave); 1602 .loc 1 884 5 view .LVU496 1603 0022 0023 movs r3, #0 1604 0024 1893 str r3, [sp, #96] 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmp_hadc_slave); 1605 .loc 1 885 5 view .LVU497 1606 0026 1993 str r3, [sp, #100] 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ ARM GAS /tmp/ccrO2eGa.s page 189 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave); 1607 .loc 1 888 5 view .LVU498 1608 0028 2368 ldr r3, [r4] 1609 002a B3F1A04F cmp r3, #1342177280 1610 002e 0BD0 beq .L135 1611 .loc 1 888 5 is_stmt 0 discriminator 2 view .LVU499 1612 0030 0023 movs r3, #0 1613 0032 0193 str r3, [sp, #4] 1614 .L128: 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hadc_slave.Instance == NULL) 1615 .loc 1 890 5 is_stmt 1 view .LVU500 1616 .loc 1 890 23 is_stmt 0 view .LVU501 1617 0034 019B ldr r3, [sp, #4] 1618 .loc 1 890 8 view .LVU502 1619 0036 5BB1 cbz r3, .L136 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripherals: master and slave (in case if not already */ 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enabled previously) */ 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 1620 .loc 1 903 5 is_stmt 1 view .LVU503 1621 .loc 1 903 22 is_stmt 0 view .LVU504 1622 0038 2046 mov r0, r4 1623 003a FFF7FEFF bl ADC_Enable 1624 .LVL123: 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1625 .loc 1 904 5 is_stmt 1 view .LVU505 1626 .loc 1 904 8 is_stmt 0 view .LVU506 1627 003e 80B1 cbz r0, .L137 1628 .L130: 1629 .LVL124: 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(&tmp_hadc_slave); 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start multimode conversion of ADCs pair */ 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY); 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA transfer complete callback */ 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; ARM GAS /tmp/ccrO2eGa.s page 190 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA half transfer complete callback */ 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA error callback */ 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* start (in case of SW start): */ 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear regular group conversion flag and overrun flag */ 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC overrun interrupt */ 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start the DMA channel */ 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t) 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of regular group. */ 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group regular conversion */ 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance); 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1630 .loc 1 960 7 is_stmt 1 view .LVU507 1631 .loc 1 960 7 view .LVU508 1632 0040 0023 movs r3, #0 1633 0042 84F85830 strb r3, [r4, #88] 1634 .LVL125: 1635 .loc 1 960 7 discriminator 1 view .LVU509 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1636 .loc 1 964 5 view .LVU510 1637 .loc 1 964 12 is_stmt 0 view .LVU511 1638 0046 3FE0 b .L126 1639 .LVL126: 1640 .L135: 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1641 .loc 1 888 5 discriminator 1 view .LVU512 1642 0048 03F58073 add r3, r3, #256 ARM GAS /tmp/ccrO2eGa.s page 191 1643 004c 0193 str r3, [sp, #4] 1644 004e F1E7 b .L128 1645 .L136: 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1646 .loc 1 893 7 is_stmt 1 view .LVU513 1647 0050 E36D ldr r3, [r4, #92] 1648 0052 43F02003 orr r3, r3, #32 1649 0056 E365 str r3, [r4, #92] 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1650 .loc 1 896 7 view .LVU514 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1651 .loc 1 896 7 view .LVU515 1652 0058 0023 movs r3, #0 1653 005a 84F85830 strb r3, [r4, #88] 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1654 .loc 1 896 7 view .LVU516 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1655 .loc 1 898 7 view .LVU517 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1656 .loc 1 898 14 is_stmt 0 view .LVU518 1657 005e 0120 movs r0, #1 1658 0060 32E0 b .L126 1659 .LVL127: 1660 .L137: 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1661 .loc 1 906 7 is_stmt 1 view .LVU519 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1662 .loc 1 906 24 is_stmt 0 view .LVU520 1663 0062 01A8 add r0, sp, #4 1664 .LVL128: 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1665 .loc 1 906 24 view .LVU521 1666 0064 FFF7FEFF bl ADC_Enable 1667 .LVL129: 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1668 .loc 1 910 5 is_stmt 1 view .LVU522 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1669 .loc 1 910 8 is_stmt 0 view .LVU523 1670 0068 0028 cmp r0, #0 1671 006a E9D1 bne .L130 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 1672 .loc 1 913 7 is_stmt 1 view .LVU524 1673 006c E36D ldr r3, [r4, #92] 1674 006e 23F47063 bic r3, r3, #3840 1675 0072 23F00103 bic r3, r3, #1 1676 0076 43F48073 orr r3, r3, #256 1677 007a E365 str r3, [r4, #92] 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1678 .loc 1 918 7 view .LVU525 1679 007c 0023 movs r3, #0 1680 007e 2366 str r3, [r4, #96] 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1681 .loc 1 921 7 view .LVU526 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1682 .loc 1 921 11 is_stmt 0 view .LVU527 1683 0080 626D ldr r2, [r4, #84] 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 192 1684 .loc 1 921 42 view .LVU528 1685 0082 1349 ldr r1, .L138 1686 0084 D162 str r1, [r2, #44] 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1687 .loc 1 924 7 is_stmt 1 view .LVU529 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1688 .loc 1 924 11 is_stmt 0 view .LVU530 1689 0086 626D ldr r2, [r4, #84] 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1690 .loc 1 924 46 view .LVU531 1691 0088 1249 ldr r1, .L138+4 1692 008a 1163 str r1, [r2, #48] 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1693 .loc 1 927 7 is_stmt 1 view .LVU532 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1694 .loc 1 927 11 is_stmt 0 view .LVU533 1695 008c 626D ldr r2, [r4, #84] 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1696 .loc 1 927 43 view .LVU534 1697 008e 1249 ldr r1, .L138+8 1698 0090 5163 str r1, [r2, #52] 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1699 .loc 1 930 7 is_stmt 1 view .LVU535 1700 .LVL130: 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1701 .loc 1 937 7 view .LVU536 1702 0092 2268 ldr r2, [r4] 1703 0094 1C21 movs r1, #28 1704 0096 1160 str r1, [r2] 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1705 .loc 1 942 7 view .LVU537 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1706 .loc 1 942 7 view .LVU538 1707 0098 84F85830 strb r3, [r4, #88] 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1708 .loc 1 942 7 view .LVU539 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1709 .loc 1 945 7 view .LVU540 1710 009c 2268 ldr r2, [r4] 1711 009e 5368 ldr r3, [r2, #4] 1712 00a0 43F01003 orr r3, r3, #16 1713 00a4 5360 str r3, [r2, #4] 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1714 .loc 1 948 7 view .LVU541 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1715 .loc 1 948 24 is_stmt 0 view .LVU542 1716 00a6 2B46 mov r3, r5 1717 00a8 3246 mov r2, r6 1718 00aa 0C49 ldr r1, .L138+12 1719 00ac 606D ldr r0, [r4, #84] 1720 .LVL131: 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1721 .loc 1 948 24 view .LVU543 1722 00ae FFF7FEFF bl HAL_DMA_Start_IT 1723 .LVL132: 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1724 .loc 1 955 7 is_stmt 1 view .LVU544 ARM GAS /tmp/ccrO2eGa.s page 193 1725 00b2 2268 ldr r2, [r4] 1726 .LVL133: 1727 .LBB328: 1728 .LBI328: 7830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1729 .loc 2 7830 22 view .LVU545 1730 .LBB329: 7835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1731 .loc 2 7835 3 view .LVU546 1732 00b4 9368 ldr r3, [r2, #8] 1733 00b6 23F00043 bic r3, r3, #-2147483648 1734 00ba 23F03F03 bic r3, r3, #63 1735 00be 43F00403 orr r3, r3, #4 1736 00c2 9360 str r3, [r2, #8] 1737 .LVL134: 7838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1738 .loc 2 7838 1 is_stmt 0 view .LVU547 1739 00c4 00E0 b .L126 1740 .LVL135: 1741 .L132: 7838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1742 .loc 2 7838 1 view .LVU548 1743 .LBE329: 1744 .LBE328: 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1745 .loc 1 876 12 view .LVU549 1746 00c6 0220 movs r0, #2 1747 .LVL136: 1748 .L126: 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1749 .loc 1 966 1 view .LVU550 1750 00c8 1CB0 add sp, sp, #112 1751 .LCFI17: 1752 .cfi_remember_state 1753 .cfi_def_cfa_offset 16 1754 @ sp needed 1755 00ca 70BD pop {r4, r5, r6, pc} 1756 .LVL137: 1757 .L133: 1758 .LCFI18: 1759 .cfi_restore_state 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1760 .loc 1 881 5 discriminator 1 view .LVU551 1761 00cc 0220 movs r0, #2 1762 00ce FBE7 b .L126 1763 .L139: 1764 .align 2 1765 .L138: 1766 00d0 00000000 .word ADC_DMAConvCplt 1767 00d4 00000000 .word ADC_DMAHalfConvCplt 1768 00d8 00000000 .word ADC_DMAError 1769 00dc 0C030050 .word 1342178060 1770 .cfi_endproc 1771 .LFE337: 1773 .section .text.HAL_ADCEx_MultiModeStop_DMA,"ax",%progbits 1774 .align 1 ARM GAS /tmp/ccrO2eGa.s page 194 1775 .global HAL_ADCEx_MultiModeStop_DMA 1776 .syntax unified 1777 .thumb 1778 .thumb_func 1780 HAL_ADCEx_MultiModeStop_DMA: 1781 .LVL138: 1782 .LFB338: 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral. 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. MultiMode DMA bits 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_Stop_DMA() must be called after this function with handle of 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc) 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1783 .loc 1 982 1 is_stmt 1 view -0 1784 .cfi_startproc 1785 @ args = 0, pretend = 0, frame = 112 1786 @ frame_needed = 0, uses_anonymous_args = 0 1787 .loc 1 982 1 is_stmt 0 view .LVU553 1788 0000 30B5 push {r4, r5, lr} 1789 .LCFI19: 1790 .cfi_def_cfa_offset 12 1791 .cfi_offset 4, -12 1792 .cfi_offset 5, -8 1793 .cfi_offset 14, -4 1794 0002 9DB0 sub sp, sp, #116 1795 .LCFI20: 1796 .cfi_def_cfa_offset 128 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1797 .loc 1 983 3 is_stmt 1 view .LVU554 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 1798 .loc 1 984 3 view .LVU555 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmp_hadc_slave; 1799 .loc 1 985 3 view .LVU556 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_hadc_slave_conversion_on_going; 1800 .loc 1 986 3 view .LVU557 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hadc_slave_disable_status; 1801 .loc 1 987 3 view .LVU558 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1802 .loc 1 990 3 view .LVU559 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1803 .loc 1 993 3 view .LVU560 1804 .loc 1 993 3 view .LVU561 1805 0004 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 ARM GAS /tmp/ccrO2eGa.s page 195 1806 0008 012B cmp r3, #1 1807 000a 00F08180 beq .L158 1808 000e 0446 mov r4, r0 1809 .loc 1 993 3 discriminator 2 view .LVU562 1810 0010 0123 movs r3, #1 1811 0012 80F85830 strb r3, [r0, #88] 1812 .loc 1 993 3 view .LVU563 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular and injected groups */ 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 1813 .loc 1 996 3 view .LVU564 1814 .loc 1 996 20 is_stmt 0 view .LVU565 1815 0016 0321 movs r1, #3 1816 0018 FFF7FEFF bl ADC_ConversionStop 1817 .LVL139: 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1818 .loc 1 999 3 is_stmt 1 view .LVU566 1819 .loc 1 999 6 is_stmt 0 view .LVU567 1820 001c 0546 mov r5, r0 1821 001e 0028 cmp r0, #0 1822 0020 64D1 bne .L142 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave); 1823 .loc 1 1002 5 is_stmt 1 view .LVU568 1824 0022 0023 movs r3, #0 1825 0024 1893 str r3, [sp, #96] 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmp_hadc_slave); 1826 .loc 1 1003 5 view .LVU569 1827 0026 1993 str r3, [sp, #100] 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave); 1828 .loc 1 1006 5 view .LVU570 1829 0028 2368 ldr r3, [r4] 1830 002a B3F1A04F cmp r3, #1342177280 1831 002e 0DD0 beq .L160 1832 .loc 1 1006 5 is_stmt 0 discriminator 2 view .LVU571 1833 0030 0023 movs r3, #0 1834 0032 0193 str r3, [sp, #4] 1835 .L144: 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hadc_slave.Instance == NULL) 1836 .loc 1 1008 5 is_stmt 1 view .LVU572 1837 .loc 1 1008 23 is_stmt 0 view .LVU573 1838 0034 019B ldr r3, [sp, #4] 1839 .loc 1 1008 8 view .LVU574 1840 0036 6BB1 cbz r3, .L161 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 196 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 1841 .loc 1 1023 5 is_stmt 1 view .LVU575 1842 .loc 1 1023 17 is_stmt 0 view .LVU576 1843 0038 FFF7FEFF bl HAL_GetTick 1844 .LVL140: 1845 .loc 1 1023 17 view .LVU577 1846 003c 0546 mov r5, r0 1847 .LVL141: 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance 1848 .loc 1 1025 5 is_stmt 1 view .LVU578 1849 .loc 1 1025 90 is_stmt 0 view .LVU579 1850 003e 019B ldr r3, [sp, #4] 1851 .LVL142: 1852 .LBB330: 1853 .LBI330: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1854 .loc 2 7866 26 is_stmt 1 view .LVU580 1855 .LBB331: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1856 .loc 2 7868 3 view .LVU581 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1857 .loc 2 7868 12 is_stmt 0 view .LVU582 1858 0040 9B68 ldr r3, [r3, #8] 1859 .LVL143: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1860 .loc 2 7868 74 view .LVU583 1861 0042 13F00403 ands r3, r3, #4 1862 0046 13D0 beq .L153 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1863 .loc 2 7868 74 discriminator 1 view .LVU584 1864 0048 0123 movs r3, #1 1865 004a 11E0 b .L153 1866 .LVL144: 1867 .L160: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1868 .loc 2 7868 74 discriminator 1 view .LVU585 1869 .LBE331: 1870 .LBE330: 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1871 .loc 1 1006 5 discriminator 1 view .LVU586 1872 004c 03F58073 add r3, r3, #256 1873 0050 0193 str r3, [sp, #4] 1874 0052 EFE7 b .L144 1875 .L161: 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1876 .loc 1 1011 7 is_stmt 1 view .LVU587 1877 0054 E36D ldr r3, [r4, #92] 1878 0056 43F02003 orr r3, r3, #32 1879 005a E365 str r3, [r4, #92] ARM GAS /tmp/ccrO2eGa.s page 197 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1880 .loc 1 1014 7 view .LVU588 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1881 .loc 1 1014 7 view .LVU589 1882 005c 0023 movs r3, #0 1883 005e 84F85830 strb r3, [r4, #88] 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1884 .loc 1 1014 7 view .LVU590 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1885 .loc 1 1016 7 view .LVU591 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1886 .loc 1 1016 14 is_stmt 0 view .LVU592 1887 0062 0125 movs r5, #1 1888 0064 45E0 b .L141 1889 .LVL145: 1890 .L148: 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Inst 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instan 1891 .loc 1 1048 7 is_stmt 1 view .LVU593 1892 .loc 1 1048 92 is_stmt 0 view .LVU594 1893 0066 019B ldr r3, [sp, #4] 1894 .LVL146: 1895 .LBB332: 1896 .LBI332: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1897 .loc 2 7866 26 is_stmt 1 view .LVU595 1898 .LBB333: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1899 .loc 2 7868 3 view .LVU596 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1900 .loc 2 7868 12 is_stmt 0 view .LVU597 1901 0068 9B68 ldr r3, [r3, #8] 1902 .LVL147: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1903 .loc 2 7868 74 view .LVU598 1904 006a 13F00403 ands r3, r3, #4 ARM GAS /tmp/ccrO2eGa.s page 198 1905 006e 21D1 bne .L151 1906 .LVL148: 1907 .L153: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1908 .loc 2 7868 74 view .LVU599 1909 .LBE333: 1910 .LBE332: 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1911 .loc 1 1027 12 is_stmt 1 view .LVU600 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1912 .loc 1 1026 48 is_stmt 0 view .LVU601 1913 0070 2268 ldr r2, [r4] 1914 .LVL149: 1915 .LBB335: 1916 .LBI335: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1917 .loc 2 7866 26 is_stmt 1 view .LVU602 1918 .LBB336: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1919 .loc 2 7868 3 view .LVU603 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1920 .loc 2 7868 12 is_stmt 0 view .LVU604 1921 0072 9268 ldr r2, [r2, #8] 1922 .LVL150: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1923 .loc 2 7868 74 view .LVU605 1924 0074 12F0040F tst r2, #4 1925 0078 01D1 bne .L154 1926 .LVL151: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1927 .loc 2 7868 74 view .LVU606 1928 .LBE336: 1929 .LBE335: 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1930 .loc 1 1027 12 discriminator 1 view .LVU607 1931 007a 012B cmp r3, #1 1932 007c 1CD1 bne .L162 1933 .L154: 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1934 .loc 1 1030 7 is_stmt 1 view .LVU608 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1935 .loc 1 1030 12 is_stmt 0 view .LVU609 1936 007e FFF7FEFF bl HAL_GetTick 1937 .LVL152: 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1938 .loc 1 1030 26 discriminator 1 view .LVU610 1939 0082 431B subs r3, r0, r5 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1940 .loc 1 1030 10 discriminator 1 view .LVU611 1941 0084 052B cmp r3, #5 1942 0086 EED9 bls .L148 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1943 .loc 1 1033 9 is_stmt 1 view .LVU612 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1944 .loc 1 1033 94 is_stmt 0 view .LVU613 1945 0088 019B ldr r3, [sp, #4] 1946 .LVL153: ARM GAS /tmp/ccrO2eGa.s page 199 1947 .LBB337: 1948 .LBI337: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1949 .loc 2 7866 26 is_stmt 1 view .LVU614 1950 .LBB338: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1951 .loc 2 7868 3 view .LVU615 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1952 .loc 2 7868 12 is_stmt 0 view .LVU616 1953 008a 9B68 ldr r3, [r3, #8] 1954 .LVL154: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1955 .loc 2 7868 74 view .LVU617 1956 008c 13F00403 ands r3, r3, #4 1957 0090 00D0 beq .L149 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1958 .loc 2 7868 74 discriminator 1 view .LVU618 1959 0092 0123 movs r3, #1 1960 .L149: 1961 .LVL155: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1962 .loc 2 7868 74 discriminator 1 view .LVU619 1963 .LBE338: 1964 .LBE337: 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1965 .loc 1 1034 9 is_stmt 1 view .LVU620 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1966 .loc 1 1034 49 is_stmt 0 view .LVU621 1967 0094 2268 ldr r2, [r4] 1968 .LVL156: 1969 .LBB339: 1970 .LBI339: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1971 .loc 2 7866 26 is_stmt 1 view .LVU622 1972 .LBB340: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1973 .loc 2 7868 3 view .LVU623 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1974 .loc 2 7868 12 is_stmt 0 view .LVU624 1975 0096 9268 ldr r2, [r2, #8] 1976 .LVL157: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1977 .loc 2 7868 74 view .LVU625 1978 0098 12F0040F tst r2, #4 1979 009c 01D1 bne .L150 1980 .LVL158: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1981 .loc 2 7868 74 view .LVU626 1982 .LBE340: 1983 .LBE339: 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1984 .loc 1 1035 13 view .LVU627 1985 009e 012B cmp r3, #1 1986 00a0 E1D1 bne .L148 1987 .L150: 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1988 .loc 1 1039 11 is_stmt 1 view .LVU628 ARM GAS /tmp/ccrO2eGa.s page 200 1989 00a2 E36D ldr r3, [r4, #92] 1990 .LVL159: 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1991 .loc 1 1039 11 is_stmt 0 view .LVU629 1992 00a4 43F01003 orr r3, r3, #16 1993 00a8 E365 str r3, [r4, #92] 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1994 .loc 1 1042 11 is_stmt 1 view .LVU630 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1995 .loc 1 1042 11 view .LVU631 1996 00aa 0023 movs r3, #0 1997 00ac 84F85830 strb r3, [r4, #88] 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1998 .loc 1 1042 11 view .LVU632 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1999 .loc 1 1044 11 view .LVU633 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2000 .loc 1 1044 18 is_stmt 0 view .LVU634 2001 00b0 0125 movs r5, #1 2002 .LVL160: 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2003 .loc 1 1044 18 view .LVU635 2004 00b2 1EE0 b .L141 2005 .LVL161: 2006 .L151: 2007 .LBB341: 2008 .LBB334: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2009 .loc 2 7868 74 discriminator 1 view .LVU636 2010 00b4 0123 movs r3, #1 2011 00b6 DBE7 b .L153 2012 .LVL162: 2013 .L162: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2014 .loc 2 7868 74 discriminator 1 view .LVU637 2015 .LBE334: 2016 .LBE341: 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADC_Stop_DMA() API. */ 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 2017 .loc 1 1055 5 is_stmt 1 view .LVU638 2018 .loc 1 1055 22 is_stmt 0 view .LVU639 2019 00b8 606D ldr r0, [r4, #84] 2020 00ba FFF7FEFF bl HAL_DMA_Abort 2021 .LVL163: 2022 .loc 1 1055 22 view .LVU640 2023 00be 0546 mov r5, r0 2024 .LVL164: 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_ERROR) 2025 .loc 1 1058 5 is_stmt 1 view .LVU641 2026 .loc 1 1058 8 is_stmt 0 view .LVU642 ARM GAS /tmp/ccrO2eGa.s page 201 2027 00c0 0128 cmp r0, #1 2028 00c2 19D0 beq .L163 2029 .L155: 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 2030 .loc 1 1065 5 is_stmt 1 view .LVU643 2031 00c4 2268 ldr r2, [r4] 2032 00c6 5368 ldr r3, [r2, #4] 2033 00c8 23F01003 bic r3, r3, #16 2034 00cc 5360 str r3, [r2, #4] 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave */ 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2035 .loc 1 1070 5 view .LVU644 2036 .loc 1 1070 8 is_stmt 0 view .LVU645 2037 00ce C5B9 cbnz r5, .L156 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_disable_status = ADC_Disable(&tmp_hadc_slave); 2038 .loc 1 1072 7 is_stmt 1 view .LVU646 2039 .loc 1 1072 39 is_stmt 0 view .LVU647 2040 00d0 01A8 add r0, sp, #4 2041 .LVL165: 2042 .loc 1 1072 39 view .LVU648 2043 00d2 FFF7FEFF bl ADC_Disable 2044 .LVL166: 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((ADC_Disable(hadc) == HAL_OK) && 2045 .loc 1 1073 7 is_stmt 1 view .LVU649 2046 .loc 1 1073 12 is_stmt 0 view .LVU650 2047 00d6 2046 mov r0, r4 2048 00d8 FFF7FEFF bl ADC_Disable 2049 .LVL167: 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (tmp_hadc_slave_disable_status == HAL_OK)) 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2050 .loc 1 1076 9 is_stmt 1 view .LVU651 2051 .L157: 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of error, attempt to disable ADC master and slave without status assert */ 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(hadc); 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmp_hadc_slave); 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state (ADC master) */ 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 2052 .loc 1 1087 5 view .LVU652 2053 00dc E36D ldr r3, [r4, #92] 2054 00de 23F48853 bic r3, r3, #4352 ARM GAS /tmp/ccrO2eGa.s page 202 2055 00e2 23F00103 bic r3, r3, #1 2056 00e6 43F00103 orr r3, r3, #1 2057 00ea E365 str r3, [r4, #92] 2058 .LVL168: 2059 .L142: 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2060 .loc 1 1093 3 view .LVU653 2061 .loc 1 1093 3 view .LVU654 2062 00ec 0023 movs r3, #0 2063 00ee 84F85830 strb r3, [r4, #88] 2064 .loc 1 1093 3 view .LVU655 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2065 .loc 1 1096 3 view .LVU656 2066 .LVL169: 2067 .L141: 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2068 .loc 1 1097 1 is_stmt 0 view .LVU657 2069 00f2 2846 mov r0, r5 2070 00f4 1DB0 add sp, sp, #116 2071 .LCFI21: 2072 .cfi_remember_state 2073 .cfi_def_cfa_offset 12 2074 @ sp needed 2075 00f6 30BD pop {r4, r5, pc} 2076 .LVL170: 2077 .L163: 2078 .LCFI22: 2079 .cfi_restore_state 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2080 .loc 1 1061 7 is_stmt 1 view .LVU658 2081 00f8 E36D ldr r3, [r4, #92] 2082 00fa 43F04003 orr r3, r3, #64 2083 00fe E365 str r3, [r4, #92] 2084 0100 E0E7 b .L155 2085 .L156: 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmp_hadc_slave); 2086 .loc 1 1082 7 view .LVU659 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmp_hadc_slave); 2087 .loc 1 1082 14 is_stmt 0 view .LVU660 2088 0102 2046 mov r0, r4 2089 .LVL171: 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmp_hadc_slave); 2090 .loc 1 1082 14 view .LVU661 2091 0104 FFF7FEFF bl ADC_Disable 2092 .LVL172: 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2093 .loc 1 1083 7 is_stmt 1 view .LVU662 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2094 .loc 1 1083 14 is_stmt 0 view .LVU663 2095 0108 01A8 add r0, sp, #4 ARM GAS /tmp/ccrO2eGa.s page 203 2096 010a FFF7FEFF bl ADC_Disable 2097 .LVL173: 2098 010e E5E7 b .L157 2099 .LVL174: 2100 .L158: 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2101 .loc 1 993 3 discriminator 1 view .LVU664 2102 0110 0225 movs r5, #2 2103 0112 EEE7 b .L141 2104 .cfi_endproc 2105 .LFE338: 2107 .section .text.HAL_ADCEx_MultiModeGetValue,"ax",%progbits 2108 .align 1 2109 .global HAL_ADCEx_MultiModeGetValue 2110 .syntax unified 2111 .thumb 2112 .thumb_func 2114 HAL_ADCEx_MultiModeGetValue: 2115 .LVL175: 2116 .LFB339: 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Return the last ADC Master and Slave regular conversions results when in multimode conf 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used) 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval The converted data values. 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef *hadc) 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2117 .loc 1 1105 1 is_stmt 1 view -0 2118 .cfi_startproc 2119 @ args = 0, pretend = 0, frame = 0 2120 @ frame_needed = 0, uses_anonymous_args = 0 2121 @ link register save eliminated. 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_Common_TypeDef *tmpADC_Common; 2122 .loc 1 1106 3 view .LVU666 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 2123 .loc 1 1109 3 view .LVU667 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning if no assert_param check */ 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */ 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2124 .loc 1 1113 3 view .LVU668 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 2125 .loc 1 1116 3 view .LVU669 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the multi mode conversion value */ 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmpADC_Common->CDR; 2126 .loc 1 1119 3 view .LVU670 2127 .loc 1 1119 23 is_stmt 0 view .LVU671 2128 0000 014B ldr r3, .L165 2129 0002 D868 ldr r0, [r3, #12] 2130 .LVL176: 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 204 2131 .loc 1 1120 1 view .LVU672 2132 0004 7047 bx lr 2133 .L166: 2134 0006 00BF .align 2 2135 .L165: 2136 0008 00030050 .word 1342178048 2137 .cfi_endproc 2138 .LFE339: 2140 .section .text.HAL_ADCEx_InjectedGetValue,"ax",%progbits 2141 .align 1 2142 .global HAL_ADCEx_InjectedGetValue 2143 .syntax unified 2144 .thumb 2145 .thumb_func 2147 HAL_ADCEx_InjectedGetValue: 2148 .LVL177: 2149 .LFB340: 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get ADC injected group conversion result. 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Reading register JDRx automatically clears ADC flag JEOC 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of unitary conversion). 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function does not clear ADC flag JEOS 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of sequence conversion) 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Occurrence of flag JEOS rising: 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of 1 rank, flag JEOS is equivalent 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * to flag JEOC. 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of several ranks, during the scan 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * sequence flag JEOC only is raised, at the end of the scan sequence 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * both flags JEOC and EOS are raised. 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Flag JEOS must not be cleared by this function because 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would not be compliant with low power features 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (feature low power auto-wait, not available on all STM32 series). 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * To clear this flag, either use function: 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * model polling: @ref HAL_ADCEx_InjectedPollForConversion() 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS). 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param InjectedRank the converted ADC injected rank. 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval ADC group injected conversion data 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef *hadc, uint32_t InjectedRank) 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2150 .loc 1 1152 1 is_stmt 1 view -0 2151 .cfi_startproc 2152 @ args = 0, pretend = 0, frame = 0 2153 @ frame_needed = 0, uses_anonymous_args = 0 2154 @ link register save eliminated. 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_jdr; 2155 .loc 1 1153 3 view .LVU674 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 205 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2156 .loc 1 1156 3 view .LVU675 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); 2157 .loc 1 1157 3 view .LVU676 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get ADC converted value */ 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (InjectedRank) 2158 .loc 1 1160 3 view .LVU677 2159 0000 40F21523 movw r3, #533 2160 0004 9942 cmp r1, r3 2161 0006 0FD0 beq .L168 2162 0008 40F21B33 movw r3, #795 2163 000c 9942 cmp r1, r3 2164 000e 07D0 beq .L169 2165 0010 40F20F13 movw r3, #271 2166 0014 9942 cmp r1, r3 2167 0016 0BD0 beq .L170 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_4: 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR4; 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR3; 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR2; 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR1; 2168 .loc 1 1173 7 view .LVU678 2169 .loc 1 1173 21 is_stmt 0 view .LVU679 2170 0018 0368 ldr r3, [r0] 2171 .loc 1 1173 15 view .LVU680 2172 001a D3F88000 ldr r0, [r3, #128] 2173 .LVL178: 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2174 .loc 1 1174 7 is_stmt 1 view .LVU681 1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return ADC converted value */ 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_jdr; 2175 .loc 1 1178 3 view .LVU682 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2176 .loc 1 1179 1 is_stmt 0 view .LVU683 2177 001e 7047 bx lr 2178 .LVL179: 2179 .L169: 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2180 .loc 1 1163 7 is_stmt 1 view .LVU684 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2181 .loc 1 1163 21 is_stmt 0 view .LVU685 2182 0020 0368 ldr r3, [r0] 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2183 .loc 1 1163 15 view .LVU686 2184 0022 D3F88C00 ldr r0, [r3, #140] ARM GAS /tmp/ccrO2eGa.s page 206 2185 .LVL180: 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: 2186 .loc 1 1164 7 is_stmt 1 view .LVU687 2187 0026 7047 bx lr 2188 .LVL181: 2189 .L168: 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2190 .loc 1 1166 7 view .LVU688 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2191 .loc 1 1166 21 is_stmt 0 view .LVU689 2192 0028 0368 ldr r3, [r0] 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2193 .loc 1 1166 15 view .LVU690 2194 002a D3F88800 ldr r0, [r3, #136] 2195 .LVL182: 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 2196 .loc 1 1167 7 is_stmt 1 view .LVU691 2197 002e 7047 bx lr 2198 .LVL183: 2199 .L170: 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2200 .loc 1 1169 7 view .LVU692 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2201 .loc 1 1169 21 is_stmt 0 view .LVU693 2202 0030 0368 ldr r3, [r0] 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2203 .loc 1 1169 15 view .LVU694 2204 0032 D3F88400 ldr r0, [r3, #132] 2205 .LVL184: 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 2206 .loc 1 1170 7 is_stmt 1 view .LVU695 2207 0036 7047 bx lr 2208 .cfi_endproc 2209 .LFE340: 2211 .section .text.HAL_ADCEx_InjectedConvCpltCallback,"ax",%progbits 2212 .align 1 2213 .weak HAL_ADCEx_InjectedConvCpltCallback 2214 .syntax unified 2215 .thumb 2216 .thumb_func 2218 HAL_ADCEx_InjectedConvCpltCallback: 2219 .LVL185: 2220 .LFB341: 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected conversion complete callback in non-blocking mode. 1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc) 1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2221 .loc 1 1187 1 view -0 2222 .cfi_startproc 2223 @ args = 0, pretend = 0, frame = 0 2224 @ frame_needed = 0, uses_anonymous_args = 0 2225 @ link register save eliminated. 1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ ARM GAS /tmp/ccrO2eGa.s page 207 1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2226 .loc 1 1189 3 view .LVU697 1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file. 1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2227 .loc 1 1194 1 is_stmt 0 view .LVU698 2228 0000 7047 bx lr 2229 .cfi_endproc 2230 .LFE341: 2232 .section .text.HAL_ADCEx_InjectedQueueOverflowCallback,"ax",%progbits 2233 .align 1 2234 .weak HAL_ADCEx_InjectedQueueOverflowCallback 2235 .syntax unified 2236 .thumb 2237 .thumb_func 2239 HAL_ADCEx_InjectedQueueOverflowCallback: 2240 .LVL186: 2241 .LFB342: 1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected context queue overflow callback. 1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This callback is called if injected context queue is enabled 1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (parameter "QueueInjectedContext" in injected channel configuration) 1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if a new injected context is set when queue is full (maximum 2 1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** contexts). 1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc) 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2242 .loc 1 1206 1 is_stmt 1 view -0 2243 .cfi_startproc 2244 @ args = 0, pretend = 0, frame = 0 2245 @ frame_needed = 0, uses_anonymous_args = 0 2246 @ link register save eliminated. 1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2247 .loc 1 1208 3 view .LVU700 1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file. 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2248 .loc 1 1213 1 is_stmt 0 view .LVU701 2249 0000 7047 bx lr 2250 .cfi_endproc 2251 .LFE342: 2253 .section .text.HAL_ADCEx_LevelOutOfWindow2Callback,"ax",%progbits 2254 .align 1 2255 .weak HAL_ADCEx_LevelOutOfWindow2Callback 2256 .syntax unified 2257 .thumb 2258 .thumb_func 2260 HAL_ADCEx_LevelOutOfWindow2Callback: 2261 .LVL187: ARM GAS /tmp/ccrO2eGa.s page 208 2262 .LFB343: 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 2 callback in non-blocking mode. 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc) 1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2263 .loc 1 1221 1 is_stmt 1 view -0 2264 .cfi_startproc 2265 @ args = 0, pretend = 0, frame = 0 2266 @ frame_needed = 0, uses_anonymous_args = 0 2267 @ link register save eliminated. 1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2268 .loc 1 1223 3 view .LVU703 1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file. 1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2269 .loc 1 1228 1 is_stmt 0 view .LVU704 2270 0000 7047 bx lr 2271 .cfi_endproc 2272 .LFE343: 2274 .section .text.HAL_ADCEx_LevelOutOfWindow3Callback,"ax",%progbits 2275 .align 1 2276 .weak HAL_ADCEx_LevelOutOfWindow3Callback 2277 .syntax unified 2278 .thumb 2279 .thumb_func 2281 HAL_ADCEx_LevelOutOfWindow3Callback: 2282 .LVL188: 2283 .LFB344: 1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 3 callback in non-blocking mode. 1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc) 1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2284 .loc 1 1236 1 is_stmt 1 view -0 2285 .cfi_startproc 2286 @ args = 0, pretend = 0, frame = 0 2287 @ frame_needed = 0, uses_anonymous_args = 0 2288 @ link register save eliminated. 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2289 .loc 1 1238 3 view .LVU706 1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file. 1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2290 .loc 1 1243 1 is_stmt 0 view .LVU707 ARM GAS /tmp/ccrO2eGa.s page 209 2291 0000 7047 bx lr 2292 .cfi_endproc 2293 .LFE344: 2295 .section .text.HAL_ADCEx_EndOfSamplingCallback,"ax",%progbits 2296 .align 1 2297 .weak HAL_ADCEx_EndOfSamplingCallback 2298 .syntax unified 2299 .thumb 2300 .thumb_func 2302 HAL_ADCEx_EndOfSamplingCallback: 2303 .LVL189: 2304 .LFB345: 1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief End Of Sampling callback in non-blocking mode. 1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc) 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2305 .loc 1 1252 1 is_stmt 1 view -0 2306 .cfi_startproc 2307 @ args = 0, pretend = 0, frame = 0 2308 @ frame_needed = 0, uses_anonymous_args = 0 2309 @ link register save eliminated. 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2310 .loc 1 1254 3 view .LVU709 1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file. 1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2311 .loc 1 1259 1 is_stmt 0 view .LVU710 2312 0000 7047 bx lr 2313 .cfi_endproc 2314 .LFE345: 2316 .section .text.HAL_ADCEx_RegularStop,"ax",%progbits 2317 .align 1 2318 .global HAL_ADCEx_RegularStop 2319 .syntax unified 2320 .thumb 2321 .thumb_func 2323 HAL_ADCEx_RegularStop: 2324 .LVL190: 2325 .LFB346: 1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected channels in 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC peripheral if no 1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is on going on injected group. 1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc) 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/ccrO2eGa.s page 210 2326 .loc 1 1269 1 is_stmt 1 view -0 2327 .cfi_startproc 2328 @ args = 0, pretend = 0, frame = 0 2329 @ frame_needed = 0, uses_anonymous_args = 0 1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2330 .loc 1 1270 3 view .LVU712 1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2331 .loc 1 1273 3 view .LVU713 1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2332 .loc 1 1276 3 view .LVU714 2333 .loc 1 1276 3 view .LVU715 2334 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2335 0004 012B cmp r3, #1 2336 0006 26D0 beq .L183 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2337 .loc 1 1269 1 is_stmt 0 view .LVU716 2338 0008 10B5 push {r4, lr} 2339 .LCFI23: 2340 .cfi_def_cfa_offset 8 2341 .cfi_offset 4, -8 2342 .cfi_offset 14, -4 2343 000a 0446 mov r4, r0 2344 .loc 1 1276 3 is_stmt 1 discriminator 2 view .LVU717 2345 000c 0121 movs r1, #1 2346 000e 80F85810 strb r1, [r0, #88] 2347 .loc 1 1276 3 view .LVU718 1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2348 .loc 1 1279 3 view .LVU719 2349 .loc 1 1279 20 is_stmt 0 view .LVU720 2350 0012 FFF7FEFF bl ADC_ConversionStop 2351 .LVL191: 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if regular conversions are effectively stopped 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversions are on-going */ 1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2352 .loc 1 1283 3 is_stmt 1 view .LVU721 2353 .loc 1 1283 6 is_stmt 0 view .LVU722 2354 0016 60B9 cbnz r0, .L181 1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2355 .loc 1 1286 5 is_stmt 1 view .LVU723 2356 0018 E36D ldr r3, [r4, #92] 2357 001a 23F48073 bic r3, r3, #256 2358 001e E365 str r3, [r4, #92] 1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2359 .loc 1 1288 5 view .LVU724 2360 .loc 1 1288 44 is_stmt 0 view .LVU725 2361 0020 2368 ldr r3, [r4] 2362 .LVL192: ARM GAS /tmp/ccrO2eGa.s page 211 2363 .LBB342: 2364 .LBI342: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2365 .loc 2 8092 26 is_stmt 1 view .LVU726 2366 .LBB343: 2367 .loc 2 8094 3 view .LVU727 2368 .loc 2 8094 12 is_stmt 0 view .LVU728 2369 0022 9B68 ldr r3, [r3, #8] 2370 .LVL193: 2371 .loc 2 8094 76 view .LVU729 2372 0024 13F0080F tst r3, #8 2373 0028 07D0 beq .L182 2374 .LVL194: 2375 .loc 2 8094 76 view .LVU730 2376 .LBE343: 2377 .LBE342: 1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2378 .loc 1 1306 7 is_stmt 1 view .LVU731 2379 002a E36D ldr r3, [r4, #92] 2380 002c 43F48053 orr r3, r3, #4096 2381 0030 E365 str r3, [r4, #92] 2382 .L181: 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2383 .loc 1 1311 3 view .LVU732 2384 .loc 1 1311 3 view .LVU733 2385 0032 0023 movs r3, #0 2386 0034 84F85830 strb r3, [r4, #88] 2387 .loc 1 1311 3 view .LVU734 1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2388 .loc 1 1314 3 view .LVU735 1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2389 .loc 1 1315 1 is_stmt 0 view .LVU736 2390 0038 10BD pop {r4, pc} 2391 .LVL195: ARM GAS /tmp/ccrO2eGa.s page 212 2392 .L182: 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2393 .loc 1 1291 7 is_stmt 1 view .LVU737 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2394 .loc 1 1291 24 is_stmt 0 view .LVU738 2395 003a 2046 mov r0, r4 2396 .LVL196: 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2397 .loc 1 1291 24 view .LVU739 2398 003c FFF7FEFF bl ADC_Disable 2399 .LVL197: 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2400 .loc 1 1294 7 is_stmt 1 view .LVU740 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2401 .loc 1 1294 10 is_stmt 0 view .LVU741 2402 0040 0028 cmp r0, #0 2403 0042 F6D1 bne .L181 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2404 .loc 1 1297 9 is_stmt 1 view .LVU742 2405 0044 E36D ldr r3, [r4, #92] 2406 0046 23F48053 bic r3, r3, #4096 2407 004a 23F00103 bic r3, r3, #1 2408 004e 43F00103 orr r3, r3, #1 2409 0052 E365 str r3, [r4, #92] 2410 0054 EDE7 b .L181 2411 .LVL198: 2412 .L183: 2413 .LCFI24: 2414 .cfi_def_cfa_offset 0 2415 .cfi_restore 4 2416 .cfi_restore 14 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2417 .loc 1 1276 3 is_stmt 0 discriminator 1 view .LVU743 2418 0056 0220 movs r0, #2 2419 .LVL199: 2420 .loc 1 1315 1 view .LVU744 2421 0058 7047 bx lr 2422 .cfi_endproc 2423 .LFE346: 2425 .section .text.HAL_ADCEx_RegularStop_IT,"ax",%progbits 2426 .align 1 2427 .global HAL_ADCEx_RegularStop_IT 2428 .syntax unified 2429 .thumb 2430 .thumb_func 2432 HAL_ADCEx_RegularStop_IT: 2433 .LVL200: 2434 .LFB347: 1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of ADC groups regular and injected, 1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable interrution of end-of-conversion, 1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable ADC peripheral if no conversion is on going 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. ARM GAS /tmp/ccrO2eGa.s page 213 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc) 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2435 .loc 1 1327 1 is_stmt 1 view -0 2436 .cfi_startproc 2437 @ args = 0, pretend = 0, frame = 0 2438 @ frame_needed = 0, uses_anonymous_args = 0 1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2439 .loc 1 1328 3 view .LVU746 1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2440 .loc 1 1331 3 view .LVU747 1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2441 .loc 1 1334 3 view .LVU748 2442 .loc 1 1334 3 view .LVU749 2443 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2444 0004 012B cmp r3, #1 2445 0006 2BD0 beq .L192 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2446 .loc 1 1327 1 is_stmt 0 view .LVU750 2447 0008 10B5 push {r4, lr} 2448 .LCFI25: 2449 .cfi_def_cfa_offset 8 2450 .cfi_offset 4, -8 2451 .cfi_offset 14, -4 2452 000a 0446 mov r4, r0 2453 .loc 1 1334 3 is_stmt 1 discriminator 2 view .LVU751 2454 000c 0121 movs r1, #1 2455 000e 80F85810 strb r1, [r0, #88] 2456 .loc 1 1334 3 view .LVU752 1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2457 .loc 1 1337 3 view .LVU753 2458 .loc 1 1337 20 is_stmt 0 view .LVU754 2459 0012 FFF7FEFF bl ADC_ConversionStop 2460 .LVL201: 1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2461 .loc 1 1341 3 is_stmt 1 view .LVU755 2462 .loc 1 1341 6 is_stmt 0 view .LVU756 2463 0016 88B9 cbnz r0, .L190 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2464 .loc 1 1344 5 is_stmt 1 view .LVU757 2465 0018 E36D ldr r3, [r4, #92] 2466 001a 23F48073 bic r3, r3, #256 2467 001e E365 str r3, [r4, #92] 1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable all regular-related interrupts */ 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); ARM GAS /tmp/ccrO2eGa.s page 214 2468 .loc 1 1347 5 view .LVU758 2469 0020 2268 ldr r2, [r4] 2470 0022 5368 ldr r3, [r2, #4] 2471 0024 23F01C03 bic r3, r3, #28 2472 0028 5360 str r3, [r2, #4] 1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable ADC peripheral if no injected conversions are on-going */ 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2473 .loc 1 1350 5 view .LVU759 2474 .loc 1 1350 44 is_stmt 0 view .LVU760 2475 002a 2368 ldr r3, [r4] 2476 .LVL202: 2477 .LBB344: 2478 .LBI344: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2479 .loc 2 8092 26 is_stmt 1 view .LVU761 2480 .LBB345: 2481 .loc 2 8094 3 view .LVU762 2482 .loc 2 8094 12 is_stmt 0 view .LVU763 2483 002c 9B68 ldr r3, [r3, #8] 2484 .LVL203: 2485 .loc 2 8094 76 view .LVU764 2486 002e 13F0080F tst r3, #8 2487 0032 07D0 beq .L191 2488 .LVL204: 2489 .loc 2 8094 76 view .LVU765 2490 .LBE345: 2491 .LBE344: 1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2492 .loc 1 1364 7 is_stmt 1 view .LVU766 2493 0034 E36D ldr r3, [r4, #92] 2494 0036 43F48053 orr r3, r3, #4096 2495 003a E365 str r3, [r4, #92] 2496 .L190: 1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2497 .loc 1 1369 3 view .LVU767 2498 .loc 1 1369 3 view .LVU768 2499 003c 0023 movs r3, #0 2500 003e 84F85830 strb r3, [r4, #88] 2501 .loc 1 1369 3 view .LVU769 ARM GAS /tmp/ccrO2eGa.s page 215 1370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2502 .loc 1 1372 3 view .LVU770 1373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2503 .loc 1 1373 1 is_stmt 0 view .LVU771 2504 0042 10BD pop {r4, pc} 2505 .LVL205: 2506 .L191: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2507 .loc 1 1352 7 is_stmt 1 view .LVU772 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2508 .loc 1 1352 24 is_stmt 0 view .LVU773 2509 0044 2046 mov r0, r4 2510 .LVL206: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2511 .loc 1 1352 24 view .LVU774 2512 0046 FFF7FEFF bl ADC_Disable 2513 .LVL207: 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2514 .loc 1 1354 7 is_stmt 1 view .LVU775 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2515 .loc 1 1354 10 is_stmt 0 view .LVU776 2516 004a 0028 cmp r0, #0 2517 004c F6D1 bne .L190 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2518 .loc 1 1357 9 is_stmt 1 view .LVU777 2519 004e E36D ldr r3, [r4, #92] 2520 0050 23F48053 bic r3, r3, #4096 2521 0054 23F00103 bic r3, r3, #1 2522 0058 43F00103 orr r3, r3, #1 2523 005c E365 str r3, [r4, #92] 2524 005e EDE7 b .L190 2525 .LVL208: 2526 .L192: 2527 .LCFI26: 2528 .cfi_def_cfa_offset 0 2529 .cfi_restore 4 2530 .cfi_restore 14 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2531 .loc 1 1334 3 is_stmt 0 discriminator 1 view .LVU778 2532 0060 0220 movs r0, #2 2533 .LVL209: 2534 .loc 1 1373 1 view .LVU779 2535 0062 7047 bx lr 2536 .cfi_endproc 2537 .LFE347: 2539 .section .text.HAL_ADCEx_RegularStop_DMA,"ax",%progbits 2540 .align 1 2541 .global HAL_ADCEx_RegularStop_DMA 2542 .syntax unified 2543 .thumb 2544 .thumb_func 2546 HAL_ADCEx_RegularStop_DMA: 2547 .LVL210: 2548 .LFB348: 1374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 216 1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected group in 1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC DMA transfer, disable 1378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC peripheral if no conversion is on going 1379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. 1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only. 1381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For multimode (when multimode feature is available), 1382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used. 1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc) 1387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2549 .loc 1 1387 1 is_stmt 1 view -0 2550 .cfi_startproc 2551 @ args = 0, pretend = 0, frame = 0 2552 @ frame_needed = 0, uses_anonymous_args = 0 2553 .loc 1 1387 1 is_stmt 0 view .LVU781 2554 0000 38B5 push {r3, r4, r5, lr} 2555 .LCFI27: 2556 .cfi_def_cfa_offset 16 2557 .cfi_offset 3, -16 2558 .cfi_offset 4, -12 2559 .cfi_offset 5, -8 2560 .cfi_offset 14, -4 1388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2561 .loc 1 1388 3 is_stmt 1 view .LVU782 1389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2562 .loc 1 1391 3 view .LVU783 1392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2563 .loc 1 1394 3 view .LVU784 2564 .loc 1 1394 3 view .LVU785 2565 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2566 0006 012B cmp r3, #1 2567 0008 41D0 beq .L204 2568 000a 0446 mov r4, r0 2569 .loc 1 1394 3 discriminator 2 view .LVU786 2570 000c 0121 movs r1, #1 2571 000e 80F85810 strb r1, [r0, #88] 2572 .loc 1 1394 3 view .LVU787 1395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2573 .loc 1 1397 3 view .LVU788 2574 .loc 1 1397 20 is_stmt 0 view .LVU789 2575 0012 FFF7FEFF bl ADC_ConversionStop 2576 .LVL211: 1398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2577 .loc 1 1401 3 is_stmt 1 view .LVU790 2578 .loc 1 1401 6 is_stmt 0 view .LVU791 ARM GAS /tmp/ccrO2eGa.s page 217 2579 0016 0546 mov r5, r0 2580 0018 20B1 cbz r0, .L206 2581 .LVL212: 2582 .L199: 1402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 1405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); 1408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ 1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 1412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 1415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 1422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, */ 1425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to keep in memory a potential failing status. */ 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void)ADC_Disable(hadc); 1435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2583 .loc 1 1453 3 is_stmt 1 view .LVU792 ARM GAS /tmp/ccrO2eGa.s page 218 2584 .loc 1 1453 3 view .LVU793 2585 001a 0023 movs r3, #0 2586 001c 84F85830 strb r3, [r4, #88] 2587 .loc 1 1453 3 view .LVU794 1454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2588 .loc 1 1456 3 view .LVU795 2589 .LVL213: 2590 .L198: 1457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2591 .loc 1 1457 1 is_stmt 0 view .LVU796 2592 0020 2846 mov r0, r5 2593 0022 38BD pop {r3, r4, r5, pc} 2594 .LVL214: 2595 .L206: 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2596 .loc 1 1404 5 is_stmt 1 view .LVU797 2597 0024 E36D ldr r3, [r4, #92] 2598 0026 23F48073 bic r3, r3, #256 2599 002a E365 str r3, [r4, #92] 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2600 .loc 1 1407 5 view .LVU798 2601 002c 2268 ldr r2, [r4] 2602 002e D368 ldr r3, [r2, #12] 2603 0030 23F00103 bic r3, r3, #1 2604 0034 D360 str r3, [r2, #12] 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2605 .loc 1 1411 5 view .LVU799 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2606 .loc 1 1411 22 is_stmt 0 view .LVU800 2607 0036 606D ldr r0, [r4, #84] 2608 .LVL215: 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2609 .loc 1 1411 22 view .LVU801 2610 0038 FFF7FEFF bl HAL_DMA_Abort 2611 .LVL216: 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2612 .loc 1 1414 5 is_stmt 1 view .LVU802 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2613 .loc 1 1414 8 is_stmt 0 view .LVU803 2614 003c 0546 mov r5, r0 2615 003e 18B1 cbz r0, .L200 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2616 .loc 1 1417 7 is_stmt 1 view .LVU804 2617 0040 E36D ldr r3, [r4, #92] 2618 0042 43F04003 orr r3, r3, #64 2619 0046 E365 str r3, [r4, #92] 2620 .L200: 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2621 .loc 1 1421 5 view .LVU805 2622 0048 2268 ldr r2, [r4] 2623 004a 5368 ldr r3, [r2, #4] 2624 004c 23F01003 bic r3, r3, #16 2625 0050 5360 str r3, [r2, #4] 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2626 .loc 1 1426 5 view .LVU806 ARM GAS /tmp/ccrO2eGa.s page 219 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2627 .loc 1 1426 44 is_stmt 0 view .LVU807 2628 0052 2368 ldr r3, [r4] 2629 .LVL217: 2630 .LBB346: 2631 .LBI346: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2632 .loc 2 8092 26 is_stmt 1 view .LVU808 2633 .LBB347: 2634 .loc 2 8094 3 view .LVU809 2635 .loc 2 8094 12 is_stmt 0 view .LVU810 2636 0054 9B68 ldr r3, [r3, #8] 2637 .LVL218: 2638 .loc 2 8094 76 view .LVU811 2639 0056 13F0080F tst r3, #8 2640 005a 04D0 beq .L201 2641 .LVL219: 2642 .loc 2 8094 76 view .LVU812 2643 .LBE347: 2644 .LBE346: 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2645 .loc 1 1448 7 is_stmt 1 view .LVU813 2646 005c E36D ldr r3, [r4, #92] 2647 005e 43F48053 orr r3, r3, #4096 2648 0062 E365 str r3, [r4, #92] 2649 0064 D9E7 b .L199 2650 .LVL220: 2651 .L201: 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2652 .loc 1 1428 7 view .LVU814 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2653 .loc 1 1428 10 is_stmt 0 view .LVU815 2654 0066 75B9 cbnz r5, .L202 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2655 .loc 1 1430 9 is_stmt 1 view .LVU816 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2656 .loc 1 1430 26 is_stmt 0 view .LVU817 2657 0068 2046 mov r0, r4 2658 .LVL221: 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2659 .loc 1 1430 26 view .LVU818 2660 006a FFF7FEFF bl ADC_Disable 2661 .LVL222: 2662 006e 0546 mov r5, r0 2663 .LVL223: 2664 .L203: 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2665 .loc 1 1438 7 is_stmt 1 view .LVU819 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2666 .loc 1 1438 10 is_stmt 0 view .LVU820 2667 0070 002D cmp r5, #0 2668 0072 D2D1 bne .L199 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2669 .loc 1 1441 9 is_stmt 1 view .LVU821 2670 0074 E36D ldr r3, [r4, #92] 2671 0076 23F48053 bic r3, r3, #4096 2672 007a 23F00103 bic r3, r3, #1 ARM GAS /tmp/ccrO2eGa.s page 220 2673 007e 43F00103 orr r3, r3, #1 2674 0082 E365 str r3, [r4, #92] 2675 0084 C9E7 b .L199 2676 .LVL224: 2677 .L202: 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2678 .loc 1 1434 9 view .LVU822 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2679 .loc 1 1434 15 is_stmt 0 view .LVU823 2680 0086 2046 mov r0, r4 2681 .LVL225: 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2682 .loc 1 1434 15 view .LVU824 2683 0088 FFF7FEFF bl ADC_Disable 2684 .LVL226: 2685 008c F0E7 b .L203 2686 .LVL227: 2687 .L204: 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2688 .loc 1 1394 3 discriminator 1 view .LVU825 2689 008e 0225 movs r5, #2 2690 0090 C6E7 b .L198 2691 .cfi_endproc 2692 .LFE348: 2694 .section .text.HAL_ADCEx_RegularMultiModeStop_DMA,"ax",%progbits 2695 .align 1 2696 .global HAL_ADCEx_RegularMultiModeStop_DMA 2697 .syntax unified 2698 .thumb 2699 .thumb_func 2701 HAL_ADCEx_RegularMultiModeStop_DMA: 2702 .LVL228: 2703 .LFB349: 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripher 1462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is on-going. 1463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. Multimode DMA bits 1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 1465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can 1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 1469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of 1470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 1471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 1472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc) 1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2704 .loc 1 1475 1 is_stmt 1 view -0 2705 .cfi_startproc 2706 @ args = 0, pretend = 0, frame = 112 2707 @ frame_needed = 0, uses_anonymous_args = 0 1476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2708 .loc 1 1476 3 view .LVU827 ARM GAS /tmp/ccrO2eGa.s page 221 1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 2709 .loc 1 1477 3 view .LVU828 1478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmp_hadc_slave; 2710 .loc 1 1478 3 view .LVU829 1479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_hadc_slave_conversion_on_going; 2711 .loc 1 1479 3 view .LVU830 1480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 2712 .loc 1 1482 3 view .LVU831 1483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2713 .loc 1 1485 3 view .LVU832 2714 .loc 1 1485 3 view .LVU833 2715 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2716 0004 012B cmp r3, #1 2717 0006 00F08680 beq .L224 1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2718 .loc 1 1475 1 is_stmt 0 view .LVU834 2719 000a 30B5 push {r4, r5, lr} 2720 .LCFI28: 2721 .cfi_def_cfa_offset 12 2722 .cfi_offset 4, -12 2723 .cfi_offset 5, -8 2724 .cfi_offset 14, -4 2725 000c 9DB0 sub sp, sp, #116 2726 .LCFI29: 2727 .cfi_def_cfa_offset 128 2728 000e 0446 mov r4, r0 2729 .loc 1 1485 3 is_stmt 1 discriminator 2 view .LVU835 2730 0010 0121 movs r1, #1 2731 0012 80F85810 strb r1, [r0, #88] 2732 .loc 1 1485 3 view .LVU836 1486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular groups */ 1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2733 .loc 1 1489 3 view .LVU837 2734 .loc 1 1489 20 is_stmt 0 view .LVU838 2735 0016 FFF7FEFF bl ADC_ConversionStop 2736 .LVL229: 1490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2737 .loc 1 1492 3 is_stmt 1 view .LVU839 2738 .loc 1 1492 6 is_stmt 0 view .LVU840 2739 001a 0028 cmp r0, #0 2740 001c 76D1 bne .L209 1493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2741 .loc 1 1495 5 is_stmt 1 view .LVU841 2742 001e E36D ldr r3, [r4, #92] 2743 0020 23F48073 bic r3, r3, #256 2744 0024 E365 str r3, [r4, #92] 1496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 222 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave); 2745 .loc 1 1498 5 view .LVU842 2746 0026 0023 movs r3, #0 2747 0028 1893 str r3, [sp, #96] 1499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmp_hadc_slave); 2748 .loc 1 1499 5 view .LVU843 2749 002a 1993 str r3, [sp, #100] 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave); 2750 .loc 1 1502 5 view .LVU844 2751 002c 2368 ldr r3, [r4] 2752 002e B3F1A04F cmp r3, #1342177280 2753 0032 0DD0 beq .L229 2754 .loc 1 1502 5 is_stmt 0 discriminator 2 view .LVU845 2755 0034 0023 movs r3, #0 2756 0036 0193 str r3, [sp, #4] 2757 .L211: 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hadc_slave.Instance == NULL) 2758 .loc 1 1504 5 is_stmt 1 view .LVU846 2759 .loc 1 1504 23 is_stmt 0 view .LVU847 2760 0038 019B ldr r3, [sp, #4] 2761 .loc 1 1504 8 view .LVU848 2762 003a 6BB1 cbz r3, .L230 1505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 2763 .loc 1 1519 5 is_stmt 1 view .LVU849 2764 .loc 1 1519 17 is_stmt 0 view .LVU850 2765 003c FFF7FEFF bl HAL_GetTick 2766 .LVL230: 2767 .loc 1 1519 17 view .LVU851 2768 0040 0546 mov r5, r0 2769 .LVL231: 1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance 2770 .loc 1 1521 5 is_stmt 1 view .LVU852 2771 .loc 1 1521 90 is_stmt 0 view .LVU853 2772 0042 019B ldr r3, [sp, #4] 2773 .LVL232: 2774 .LBB348: 2775 .LBI348: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/ccrO2eGa.s page 223 2776 .loc 2 7866 26 is_stmt 1 view .LVU854 2777 .LBB349: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2778 .loc 2 7868 3 view .LVU855 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2779 .loc 2 7868 12 is_stmt 0 view .LVU856 2780 0044 9B68 ldr r3, [r3, #8] 2781 .LVL233: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2782 .loc 2 7868 74 view .LVU857 2783 0046 13F00403 ands r3, r3, #4 2784 004a 13D0 beq .L220 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2785 .loc 2 7868 74 discriminator 1 view .LVU858 2786 004c 0123 movs r3, #1 2787 004e 11E0 b .L220 2788 .LVL234: 2789 .L229: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2790 .loc 2 7868 74 discriminator 1 view .LVU859 2791 .LBE349: 2792 .LBE348: 1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2793 .loc 1 1502 5 discriminator 1 view .LVU860 2794 0050 03F58073 add r3, r3, #256 2795 0054 0193 str r3, [sp, #4] 2796 0056 EFE7 b .L211 2797 .L230: 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2798 .loc 1 1507 7 is_stmt 1 view .LVU861 2799 0058 E36D ldr r3, [r4, #92] 2800 005a 43F02003 orr r3, r3, #32 2801 005e E365 str r3, [r4, #92] 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2802 .loc 1 1510 7 view .LVU862 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2803 .loc 1 1510 7 view .LVU863 2804 0060 0023 movs r3, #0 2805 0062 84F85830 strb r3, [r4, #88] 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2806 .loc 1 1510 7 view .LVU864 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2807 .loc 1 1512 7 view .LVU865 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2808 .loc 1 1512 14 is_stmt 0 view .LVU866 2809 0066 0120 movs r0, #1 2810 .LVL235: 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2811 .loc 1 1512 14 view .LVU867 2812 0068 53E0 b .L208 2813 .LVL236: 2814 .L215: 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) ARM GAS /tmp/ccrO2eGa.s page 224 1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Inst 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instan 2815 .loc 1 1544 7 is_stmt 1 view .LVU868 2816 .loc 1 1544 92 is_stmt 0 view .LVU869 2817 006a 019B ldr r3, [sp, #4] 2818 .LVL237: 2819 .LBB350: 2820 .LBI350: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2821 .loc 2 7866 26 is_stmt 1 view .LVU870 2822 .LBB351: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2823 .loc 2 7868 3 view .LVU871 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2824 .loc 2 7868 12 is_stmt 0 view .LVU872 2825 006c 9B68 ldr r3, [r3, #8] 2826 .LVL238: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2827 .loc 2 7868 74 view .LVU873 2828 006e 13F00403 ands r3, r3, #4 2829 0072 21D1 bne .L218 2830 .LVL239: 2831 .L220: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2832 .loc 2 7868 74 view .LVU874 2833 .LBE351: 2834 .LBE350: 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2835 .loc 1 1523 12 is_stmt 1 view .LVU875 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 2836 .loc 1 1522 48 is_stmt 0 view .LVU876 2837 0074 2268 ldr r2, [r4] 2838 .LVL240: 2839 .LBB353: 2840 .LBI353: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2841 .loc 2 7866 26 is_stmt 1 view .LVU877 2842 .LBB354: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2843 .loc 2 7868 3 view .LVU878 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccrO2eGa.s page 225 2844 .loc 2 7868 12 is_stmt 0 view .LVU879 2845 0076 9268 ldr r2, [r2, #8] 2846 .LVL241: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2847 .loc 2 7868 74 view .LVU880 2848 0078 12F0040F tst r2, #4 2849 007c 01D1 bne .L221 2850 .LVL242: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2851 .loc 2 7868 74 view .LVU881 2852 .LBE354: 2853 .LBE353: 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2854 .loc 1 1523 12 discriminator 1 view .LVU882 2855 007e 012B cmp r3, #1 2856 0080 1CD1 bne .L231 2857 .L221: 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2858 .loc 1 1526 7 is_stmt 1 view .LVU883 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2859 .loc 1 1526 12 is_stmt 0 view .LVU884 2860 0082 FFF7FEFF bl HAL_GetTick 2861 .LVL243: 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2862 .loc 1 1526 26 discriminator 1 view .LVU885 2863 0086 431B subs r3, r0, r5 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2864 .loc 1 1526 10 discriminator 1 view .LVU886 2865 0088 052B cmp r3, #5 2866 008a EED9 bls .L215 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2867 .loc 1 1529 9 is_stmt 1 view .LVU887 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2868 .loc 1 1529 94 is_stmt 0 view .LVU888 2869 008c 019B ldr r3, [sp, #4] 2870 .LVL244: 2871 .LBB355: 2872 .LBI355: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2873 .loc 2 7866 26 is_stmt 1 view .LVU889 2874 .LBB356: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2875 .loc 2 7868 3 view .LVU890 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2876 .loc 2 7868 12 is_stmt 0 view .LVU891 2877 008e 9B68 ldr r3, [r3, #8] 2878 .LVL245: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2879 .loc 2 7868 74 view .LVU892 2880 0090 13F00403 ands r3, r3, #4 2881 0094 00D0 beq .L216 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2882 .loc 2 7868 74 discriminator 1 view .LVU893 2883 0096 0123 movs r3, #1 2884 .L216: 2885 .LVL246: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccrO2eGa.s page 226 2886 .loc 2 7868 74 discriminator 1 view .LVU894 2887 .LBE356: 2888 .LBE355: 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 2889 .loc 1 1530 9 is_stmt 1 view .LVU895 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_hadc_slave_conversion_on_going == 1UL) 2890 .loc 1 1530 49 is_stmt 0 view .LVU896 2891 0098 2268 ldr r2, [r4] 2892 .LVL247: 2893 .LBB357: 2894 .LBI357: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2895 .loc 2 7866 26 is_stmt 1 view .LVU897 2896 .LBB358: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2897 .loc 2 7868 3 view .LVU898 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2898 .loc 2 7868 12 is_stmt 0 view .LVU899 2899 009a 9268 ldr r2, [r2, #8] 2900 .LVL248: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2901 .loc 2 7868 74 view .LVU900 2902 009c 12F0040F tst r2, #4 2903 00a0 01D1 bne .L217 2904 .LVL249: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2905 .loc 2 7868 74 view .LVU901 2906 .LBE358: 2907 .LBE357: 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2908 .loc 1 1531 13 view .LVU902 2909 00a2 012B cmp r3, #1 2910 00a4 E1D1 bne .L215 2911 .L217: 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2912 .loc 1 1535 11 is_stmt 1 view .LVU903 2913 00a6 E36D ldr r3, [r4, #92] 2914 .LVL250: 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2915 .loc 1 1535 11 is_stmt 0 view .LVU904 2916 00a8 43F01003 orr r3, r3, #16 2917 00ac E365 str r3, [r4, #92] 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2918 .loc 1 1538 11 is_stmt 1 view .LVU905 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2919 .loc 1 1538 11 view .LVU906 2920 00ae 0023 movs r3, #0 2921 00b0 84F85830 strb r3, [r4, #88] 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2922 .loc 1 1538 11 view .LVU907 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2923 .loc 1 1540 11 view .LVU908 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2924 .loc 1 1540 18 is_stmt 0 view .LVU909 2925 00b4 0120 movs r0, #1 2926 00b6 2CE0 b .L208 2927 .LVL251: ARM GAS /tmp/ccrO2eGa.s page 227 2928 .L218: 2929 .LBB359: 2930 .LBB352: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2931 .loc 2 7868 74 discriminator 1 view .LVU910 2932 00b8 0123 movs r3, #1 2933 00ba DBE7 b .L220 2934 .LVL252: 2935 .L231: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2936 .loc 2 7868 74 discriminator 1 view .LVU911 2937 .LBE352: 2938 .LBE359: 1545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADCEx_RegularStop_DMA() API. */ 1551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 2939 .loc 1 1551 5 is_stmt 1 view .LVU912 2940 .loc 1 1551 22 is_stmt 0 view .LVU913 2941 00bc 606D ldr r0, [r4, #84] 2942 00be FFF7FEFF bl HAL_DMA_Abort 2943 .LVL253: 1552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 2944 .loc 1 1554 5 is_stmt 1 view .LVU914 2945 .loc 1 1554 8 is_stmt 0 view .LVU915 2946 00c2 18B1 cbz r0, .L222 1555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 2947 .loc 1 1557 7 is_stmt 1 view .LVU916 2948 00c4 E36D ldr r3, [r4, #92] 2949 00c6 43F04003 orr r3, r3, #64 2950 00ca E365 str r3, [r4, #92] 2951 .L222: 1558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 2952 .loc 1 1561 5 view .LVU917 2953 00cc 2268 ldr r2, [r4] 2954 00ce 5368 ldr r3, [r2, #4] 2955 00d0 23F01003 bic r3, r3, #16 2956 00d4 5360 str r3, [r2, #4] 1562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave if no injected */ 1564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion is on-going. */ 1565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2957 .loc 1 1567 5 view .LVU918 2958 .loc 1 1567 8 is_stmt 0 view .LVU919 2959 00d6 C8B9 cbnz r0, .L209 ARM GAS /tmp/ccrO2eGa.s page 228 1568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2960 .loc 1 1569 7 is_stmt 1 view .LVU920 2961 .loc 1 1569 46 is_stmt 0 view .LVU921 2962 00d8 2368 ldr r3, [r4] 2963 .LVL254: 2964 .LBB360: 2965 .LBI360: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2966 .loc 2 8092 26 is_stmt 1 view .LVU922 2967 .LBB361: 2968 .loc 2 8094 3 view .LVU923 2969 .loc 2 8094 12 is_stmt 0 view .LVU924 2970 00da 9B68 ldr r3, [r3, #8] 2971 .LVL255: 2972 .loc 2 8094 76 view .LVU925 2973 00dc 13F0080F tst r3, #8 2974 00e0 0BD1 bne .L223 2975 .LVL256: 2976 .loc 2 8094 76 view .LVU926 2977 .LBE361: 2978 .LBE360: 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 2979 .loc 1 1571 9 is_stmt 1 view .LVU927 2980 .loc 1 1571 27 is_stmt 0 view .LVU928 2981 00e2 2046 mov r0, r4 2982 .LVL257: 2983 .loc 1 1571 27 view .LVU929 2984 00e4 FFF7FEFF bl ADC_Disable 2985 .LVL258: 1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2986 .loc 1 1572 9 is_stmt 1 view .LVU930 2987 .loc 1 1572 12 is_stmt 0 view .LVU931 2988 00e8 80B9 cbnz r0, .L209 1573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing((&tmp_hadc_slave)->Instance) == 0UL) 2989 .loc 1 1574 11 is_stmt 1 view .LVU932 2990 .loc 1 1574 63 is_stmt 0 view .LVU933 2991 00ea 019B ldr r3, [sp, #4] 2992 .LVL259: 2993 .LBB362: 2994 .LBI362: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2995 .loc 2 8092 26 is_stmt 1 view .LVU934 2996 .LBB363: 2997 .loc 2 8094 3 view .LVU935 2998 .loc 2 8094 12 is_stmt 0 view .LVU936 2999 00ec 9B68 ldr r3, [r3, #8] 3000 .LVL260: 3001 .loc 2 8094 76 view .LVU937 3002 00ee 13F0080F tst r3, #8 3003 00f2 02D1 bne .L223 3004 .LVL261: 3005 .loc 2 8094 76 view .LVU938 3006 .LBE363: 3007 .LBE362: ARM GAS /tmp/ccrO2eGa.s page 229 1575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(&tmp_hadc_slave); 3008 .loc 1 1576 13 is_stmt 1 view .LVU939 3009 .loc 1 1576 31 is_stmt 0 view .LVU940 3010 00f4 01A8 add r0, sp, #4 3011 .LVL262: 3012 .loc 1 1576 31 view .LVU941 3013 00f6 FFF7FEFF bl ADC_Disable 3014 .LVL263: 3015 .L223: 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 3016 .loc 1 1581 7 is_stmt 1 view .LVU942 3017 .loc 1 1581 10 is_stmt 0 view .LVU943 3018 00fa 38B9 cbnz r0, .L209 1582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Both Master and Slave ADC's could be disabled. Update Master State */ 1584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ 1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); 3019 .loc 1 1585 9 is_stmt 1 view .LVU944 3020 00fc E36D ldr r3, [r4, #92] 3021 00fe 23F48053 bic r3, r3, #4096 3022 0102 23F00103 bic r3, r3, #1 3023 0106 43F00103 orr r3, r3, #1 3024 010a E365 str r3, [r4, #92] 3025 .LVL264: 3026 .L209: 1586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected (Master or Slave) conversions are still on-going, 1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** no Master State change */ 1591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3027 .loc 1 1591 7 view .LVU945 1592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 3028 .loc 1 1596 3 view .LVU946 3029 .loc 1 1596 3 view .LVU947 3030 010c 0023 movs r3, #0 3031 010e 84F85830 strb r3, [r4, #88] 3032 .loc 1 1596 3 view .LVU948 1597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 3033 .loc 1 1599 3 view .LVU949 3034 .LVL265: 3035 .L208: 1600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3036 .loc 1 1600 1 is_stmt 0 view .LVU950 3037 0112 1DB0 add sp, sp, #116 3038 .LCFI30: ARM GAS /tmp/ccrO2eGa.s page 230 3039 .cfi_def_cfa_offset 12 3040 @ sp needed 3041 0114 30BD pop {r4, r5, pc} 3042 .LVL266: 3043 .L224: 3044 .LCFI31: 3045 .cfi_def_cfa_offset 0 3046 .cfi_restore 4 3047 .cfi_restore 5 3048 .cfi_restore 14 1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3049 .loc 1 1485 3 discriminator 1 view .LVU951 3050 0116 0220 movs r0, #2 3051 .LVL267: 3052 .loc 1 1600 1 view .LVU952 3053 0118 7047 bx lr 3054 .cfi_endproc 3055 .LFE349: 3057 .section .text.HAL_ADCEx_InjectedConfigChannel,"ax",%progbits 3058 .align 1 3059 .global HAL_ADCEx_InjectedConfigChannel 3060 .syntax unified 3061 .thumb 3062 .thumb_func 3064 HAL_ADCEx_InjectedConfigChannel: 3065 .LVL268: 3066 .LFB350: 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions 1608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended Peripheral Control functions 1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 1610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 1611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### Peripheral Control functions ##### 1613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 1615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure channels on injected group 1616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure multimode when multimode feature is available 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enable or Disable Injected Queue 1618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Disable ADC voltage regulator 1619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enter ADC deep-power-down mode 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 1622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Configure a channel to be assigned to ADC group injected. 1627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes injected group, following calls to this 1629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function can be used to reconfigure some parameters of structure 1630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC. ARM GAS /tmp/ccrO2eGa.s page 231 1631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state: 1632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Refer to comments of structure "ADC_InjectionConfTypeDef". 1633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of usage of internal measurement channels: 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Vbat/VrefInt/TempSensor. 1635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * These internal paths can be disabled using function 1636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_DeInit(). 1637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Caution: For Injected Context Queue use, a context must be fully 1638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * defined before start of injected conversion. All channels are configured 1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * consecutively for the same ADC instance. Therefore, the number of calls to 1640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter 1641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * InjectedNbrOfConversion for each context. 1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 1: If 1 context is intended to be used (or if there is no use of the 1643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue Context feature) and if the context contains 3 injected ranks 1644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be 1645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * called once for each channel (i.e. 3 times) before starting a conversion. 1646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function must not be called to configure a 4th injected channel: 1647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would start a new context into context queue. 1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 2: If 2 contexts are intended to be used and each of them contains 1649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 3 injected ranks (InjectedNbrOfConversion = 3), 1650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and 1651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * for each context (3 channels x 2 contexts = 6 calls). Conversion can 1652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * start once the 1st context is set, that is after the first three 1653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly. 1654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param pConfigInjected Structure of ADC injected group and ADC channel for 1656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected group. 1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_InjectionConfTypeDef *pConfigInjected) 1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3067 .loc 1 1661 1 is_stmt 1 view -0 3068 .cfi_startproc 3069 @ args = 0, pretend = 0, frame = 8 3070 @ frame_needed = 0, uses_anonymous_args = 0 3071 .loc 1 1661 1 is_stmt 0 view .LVU954 3072 0000 F0B5 push {r4, r5, r6, r7, lr} 3073 .LCFI32: 3074 .cfi_def_cfa_offset 20 3075 .cfi_offset 4, -20 3076 .cfi_offset 5, -16 3077 .cfi_offset 6, -12 3078 .cfi_offset 7, -8 3079 .cfi_offset 14, -4 3080 0002 83B0 sub sp, sp, #12 3081 .LCFI33: 3082 .cfi_def_cfa_offset 32 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3083 .loc 1 1662 3 is_stmt 1 view .LVU955 3084 .LVL269: 1663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 3085 .loc 1 1663 3 view .LVU956 1664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_internal_channel; 3086 .loc 1 1664 3 view .LVU957 1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3087 .loc 1 1665 3 view .LVU958 1666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; ARM GAS /tmp/ccrO2eGa.s page 232 3088 .loc 1 1666 3 view .LVU959 1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0; 3089 .loc 1 1667 3 view .LVU960 3090 .loc 1 1667 17 is_stmt 0 view .LVU961 3091 0004 0023 movs r3, #0 3092 0006 0193 str r3, [sp, #4] 1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_jsqr_context_queue_being_built = 0U; 3093 .loc 1 1669 3 is_stmt 1 view .LVU962 3094 .LVL270: 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3095 .loc 1 1672 3 view .LVU963 1673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLE_TIME(pConfigInjected->InjectedSamplingTime)); 3096 .loc 1 1673 3 view .LVU964 1674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(pConfigInjected->InjectedSingleDiff)); 3097 .loc 1 1674 3 view .LVU965 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->AutoInjectedConv)); 3098 .loc 1 1675 3 view .LVU966 1676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->QueueInjectedContext)); 3099 .loc 1 1676 3 view .LVU967 1677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC_EDGE(pConfigInjected->ExternalTrigInjecConvEdge)); 3100 .loc 1 1677 3 view .LVU968 1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC(hadc, pConfigInjected->ExternalTrigInjecConv)); 3101 .loc 1 1678 3 view .LVU969 1679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_NUMBER(pConfigInjected->InjectedOffsetNumber)); 3102 .loc 1 1679 3 view .LVU970 1680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), pConfigInjected->InjectedOffset)); 3103 .loc 1 1680 3 view .LVU971 1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_SIGN(pConfigInjected->InjectedOffsetSign)); 3104 .loc 1 1681 3 view .LVU972 1682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjectedOffsetSaturation)); 3105 .loc 1 1682 3 view .LVU973 1683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjecOversamplingMode)); 3106 .loc 1 1683 3 view .LVU974 1684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 3107 .loc 1 1685 3 view .LVU975 1686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(pConfigInjected->InjectedRank)); 3108 .loc 1 1687 5 view .LVU976 1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_NB_CONV(pConfigInjected->InjectedNbrOfConversion)); 3109 .loc 1 1688 5 view .LVU977 1689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjectedDiscontinuousConvMode)); 3110 .loc 1 1689 5 view .LVU978 1690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is 1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ignored (considered as reset) */ 1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((pConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) 3111 .loc 1 1695 3 view .LVU979 1696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (pConfigInjected->InjecOversamplingMode == ENABLE))); 1697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JDISCEN and JAUTO bits can't be set at the same time */ 1699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((pConfigInjected->InjectedDiscontinuousConvMode == ENABLE) ARM GAS /tmp/ccrO2eGa.s page 233 3112 .loc 1 1699 3 view .LVU980 1700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (pConfigInjected->AutoInjectedConv == ENABLE))); 1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* DISCEN and JAUTO bits can't be set at the same time */ 1703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (pConfigInjected->AutoInjectedConv 3113 .loc 1 1703 3 view .LVU981 1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of channel number */ 1706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED) 3114 .loc 1 1706 3 view .LVU982 1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CHANNEL(hadc, pConfigInjected->InjectedChannel)); 3115 .loc 1 1708 5 view .LVU983 1709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DIFF_CHANNEL(hadc, pConfigInjected->InjectedChannel)); 3116 .loc 1 1712 5 view .LVU984 1713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 3117 .loc 1 1716 3 view .LVU985 3118 .loc 1 1716 3 view .LVU986 3119 0008 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 3120 000c 012B cmp r3, #1 3121 000e 00F0CB82 beq .L302 3122 0012 0446 mov r4, r0 3123 0014 0D46 mov r5, r1 3124 .loc 1 1716 3 discriminator 2 view .LVU987 3125 0016 0123 movs r3, #1 3126 0018 80F85830 strb r3, [r0, #88] 3127 .loc 1 1716 3 view .LVU988 1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of injected group sequencer: */ 1719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Hardware constraint: Must fully define injected context register JSQR */ 1720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* before make it entering into injected sequencer queue. */ 1721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is disabled: */ 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to 0x00: 1 channel */ 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* converted (channel on injected rank 1) */ 1725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter "InjectedNbrOfConversion" is discarded. */ 1726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting is simple: register is fully */ 1727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* defined on one call of this function (for injected rank 1) and can */ 1728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* be entered into queue directly. */ 1729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is enabled: */ 1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to parameter */ 1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "InjectedNbrOfConversion". */ 1732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting more complex: register is */ 1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* fully defined over successive calls of this function, for each */ 1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected channel rank. It is entered into queue only when all */ 1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected ranks have been set. */ 1736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Scan mode is not present by hardware on this device, but used */ 1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by software for alignment over all STM32 devices. */ 1738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) || 3128 .loc 1 1739 3 view .LVU989 ARM GAS /tmp/ccrO2eGa.s page 234 3129 .loc 1 1739 18 is_stmt 0 view .LVU990 3130 001c 4369 ldr r3, [r0, #20] 3131 .loc 1 1739 6 view .LVU991 3132 001e ABB1 cbz r3, .L234 1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (pConfigInjected->InjectedNbrOfConversion == 1U)) 3133 .loc 1 1740 23 view .LVU992 3134 0020 0B6A ldr r3, [r1, #32] 1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (pConfigInjected->InjectedNbrOfConversion == 1U)) 3135 .loc 1 1739 54 discriminator 1 view .LVU993 3136 0022 012B cmp r3, #1 3137 0024 12D0 beq .L234 1741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer: fixed to 1st rank */ 1744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (scan mode disabled, only rank 1 used) */ 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */ 1748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjectedRank == ADC_INJECTED_RANK_1) 1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 1757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJ 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | pConfigInjected->ExternalTrigInjecConvEdge 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJ 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_jsqr_context_queue_being_built); 1769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = tmp_jsqr_context_queue_being_built; 1771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of scan mode enabled, several channels to set into injected group */ 1777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* sequencer. */ 1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to define injected context register JSQR over successive */ 1780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* calls of this function, for each injected channel rank: */ 1781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Start new context and set parameters related to all injected */ 1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* channels: injected sequence length and trigger. */ 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */ 1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* call of the context under setting */ 1786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) ARM GAS /tmp/ccrO2eGa.s page 235 3138 .loc 1 1786 5 is_stmt 1 view .LVU994 3139 .loc 1 1786 30 is_stmt 0 view .LVU995 3140 0026 826E ldr r2, [r0, #104] 3141 .loc 1 1786 8 view .LVU996 3142 0028 002A cmp r2, #0 3143 002a 40F0B980 bne .L303 1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Initialize number of channels that will be configured on the context */ 1789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* being built */ 1790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount = pConfigInjected->InjectedNbrOfConversion; 3144 .loc 1 1790 7 is_stmt 1 view .LVU997 3145 .loc 1 1790 42 is_stmt 0 view .LVU998 3146 002e 8366 str r3, [r0, #104] 1791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel() 1792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, this context will be written in JSQR register at the last call. 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** At this point, the context is merely reset */ 1794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = 0x00000000U; 3147 .loc 1 1794 7 is_stmt 1 view .LVU999 3148 .loc 1 1794 42 is_stmt 0 view .LVU1000 3149 0030 0023 movs r3, #0 3150 0032 4366 str r3, [r0, #100] 1795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer */ 1798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 3151 .loc 1 1806 7 is_stmt 1 view .LVU1001 3152 .loc 1 1806 26 is_stmt 0 view .LVU1002 3153 0034 8B6A ldr r3, [r1, #40] 3154 .loc 1 1806 10 view .LVU1003 3155 0036 002B cmp r3, #0 3156 0038 00F0AF80 beq .L240 1807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U) 3157 .loc 1 1808 9 is_stmt 1 view .LVU1004 3158 .loc 1 1808 63 is_stmt 0 view .LVU1005 3159 003c 0A6A ldr r2, [r1, #32] 3160 .loc 1 1808 89 view .LVU1006 3161 003e 013A subs r2, r2, #1 1809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3162 .loc 1 1809 89 view .LVU1007 3163 0040 03F07C03 and r3, r3, #124 3164 .loc 1 1809 47 view .LVU1008 3165 0044 1A43 orrs r2, r2, r3 1810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | pConfigInjected->ExternalTrigInjecConvEdge 3166 .loc 1 1810 64 view .LVU1009 3167 0046 CB6A ldr r3, [r1, #44] 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3168 .loc 1 1808 44 view .LVU1010 3169 0048 1A43 orrs r2, r2, r3 ARM GAS /tmp/ccrO2eGa.s page 236 3170 .LVL271: 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3171 .loc 1 1808 44 view .LVU1011 3172 004a AAE0 b .L239 3173 .LVL272: 3174 .L234: 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3175 .loc 1 1749 5 is_stmt 1 view .LVU1012 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3176 .loc 1 1749 24 is_stmt 0 view .LVU1013 3177 004c 6B68 ldr r3, [r5, #4] 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3178 .loc 1 1749 8 view .LVU1014 3179 004e 092B cmp r3, #9 3180 0050 00F08380 beq .L318 3181 .LVL273: 3182 .L236: 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U)); 1816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Continue setting of context under definition with parameter */ 1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* related to each channel: channel rank sequence */ 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear the old JSQx bits for the selected rank */ 1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, pConfigInjected->InjectedRank 1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the JSQx bits for the selected rank */ 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jsqr_context_queue_being_built |= ADC_JSQR_RK(pConfigInjected->InjectedChannel, pConfigInje 1827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Decrease channel count */ 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount--; 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 3. tmp_jsqr_context_queue_being_built is fully built for this HAL_ADCEx_InjectedConfigChanne 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, aggregate the setting to those already built during the previous 1833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */ 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue |= tmp_jsqr_context_queue_being_built; 1835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 4. End of context setting: if this is the last channel set, then write context 1837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** into register JSQR and make it enter into queue */ 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) 1839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue); 1841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on injected group: */ 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected context queue: Queue disable (active context is kept) or */ 1848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable (context decremented, up to 2 contexts queued) */ 1849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected discontinuous mode: can be enabled only if auto-injected */ 1850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* mode is disabled. */ ARM GAS /tmp/ccrO2eGa.s page 237 1851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 3183 .loc 1 1851 3 is_stmt 1 view .LVU1015 3184 .loc 1 1851 42 is_stmt 0 view .LVU1016 3185 0054 2368 ldr r3, [r4] 3186 .LVL274: 3187 .LBB364: 3188 .LBI364: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3189 .loc 2 8092 26 is_stmt 1 view .LVU1017 3190 .LBB365: 3191 .loc 2 8094 3 view .LVU1018 3192 .loc 2 8094 12 is_stmt 0 view .LVU1019 3193 0056 9A68 ldr r2, [r3, #8] 3194 .loc 2 8094 76 view .LVU1020 3195 0058 12F0080F tst r2, #8 3196 005c 10D1 bne .L241 3197 .LVL275: 3198 .loc 2 8094 76 view .LVU1021 3199 .LBE365: 3200 .LBE364: 1852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is disabled: no constraint */ 1854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->AutoInjectedConv == DISABLE) 3201 .loc 1 1854 5 is_stmt 1 view .LVU1022 3202 .loc 1 1854 24 is_stmt 0 view .LVU1023 3203 005e 95F82520 ldrb r2, [r5, #37] @ zero_extendqisi2 3204 .loc 1 1854 8 view .LVU1024 3205 0062 002A cmp r2, #0 3206 0064 40F0BB80 bne .L242 1855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 3207 .loc 1 1856 7 is_stmt 1 view .LVU1025 3208 0068 DA68 ldr r2, [r3, #12] 3209 006a 22F44012 bic r2, r2, #3145728 3210 006e 95F82600 ldrb r0, [r5, #38] @ zero_extendqisi2 3211 .LVL276: 3212 .loc 1 1856 7 is_stmt 0 view .LVU1026 3213 0072 95F82410 ldrb r1, [r5, #36] @ zero_extendqisi2 3214 0076 0905 lsls r1, r1, #20 3215 0078 41EA4051 orr r1, r1, r0, lsl #21 3216 007c 0A43 orrs r2, r2, r1 3217 007e DA60 str r2, [r3, #12] 3218 .L241: 1857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)pConfigInjected->QueueInjectedContext) 1859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)pConfigInjected->InjectedDiscontinuousCon 1860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is enabled: Injected discontinuous setting is */ 1862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* discarded. */ 1863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 1866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)pConfigInjected->QueueInjectedContext)); 1868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 238 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 1874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular and injected groups: */ 1875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Automatic injected conversion: can be enabled if injected group */ 1876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* external triggers are disabled. */ 1877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel sampling time */ 1878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel offset */ 1879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 3219 .loc 1 1879 3 is_stmt 1 view .LVU1027 3220 .loc 1 1879 79 is_stmt 0 view .LVU1028 3221 0080 2268 ldr r2, [r4] 3222 .LVL277: 3223 .LBB366: 3224 .LBI366: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3225 .loc 2 7866 26 is_stmt 1 view .LVU1029 3226 .LBB367: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3227 .loc 2 7868 3 view .LVU1030 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3228 .loc 2 7868 12 is_stmt 0 view .LVU1031 3229 0082 9368 ldr r3, [r2, #8] 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3230 .loc 2 7868 74 view .LVU1032 3231 0084 13F00403 ands r3, r3, #4 3232 0088 00D0 beq .L243 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3233 .loc 2 7868 74 discriminator 1 view .LVU1033 3234 008a 0123 movs r3, #1 3235 .L243: 3236 .LVL278: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3237 .loc 2 7868 74 discriminator 1 view .LVU1034 3238 .LBE367: 3239 .LBE366: 1880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 3240 .loc 1 1880 3 is_stmt 1 view .LVU1035 3241 .LBB368: 3242 .LBI368: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3243 .loc 2 8092 26 view .LVU1036 3244 .LBB369: 3245 .loc 2 8094 3 view .LVU1037 3246 .loc 2 8094 12 is_stmt 0 view .LVU1038 3247 008c 9768 ldr r7, [r2, #8] 3248 .loc 2 8094 76 view .LVU1039 3249 008e 17F00807 ands r7, r7, #8 3250 0092 00D0 beq .L244 3251 .loc 2 8094 76 discriminator 1 view .LVU1040 3252 0094 0127 movs r7, #1 3253 .L244: 3254 .LVL279: 3255 .loc 2 8094 76 discriminator 1 view .LVU1041 3256 .LBE369: 3257 .LBE368: 1881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/ccrO2eGa.s page 239 1882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 3258 .loc 1 1882 3 is_stmt 1 view .LVU1042 3259 .loc 1 1882 6 is_stmt 0 view .LVU1043 3260 0096 002B cmp r3, #0 3261 0098 40F04081 bne .L304 1883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 3262 .loc 1 1883 7 view .LVU1044 3263 009c 002F cmp r7, #0 3264 009e 40F07781 bne .L305 1884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If injected group external triggers are disabled (set to injected */ 1887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start): no constraint */ 1888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((pConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START) 3265 .loc 1 1888 5 is_stmt 1 view .LVU1045 3266 .loc 1 1888 25 is_stmt 0 view .LVU1046 3267 00a2 AB6A ldr r3, [r5, #40] 3268 .LVL280: 3269 .loc 1 1888 8 view .LVU1047 3270 00a4 1BB1 cbz r3, .L246 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (pConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) 3271 .loc 1 1889 28 view .LVU1048 3272 00a6 EB6A ldr r3, [r5, #44] 3273 .loc 1 1889 9 view .LVU1049 3274 00a8 002B cmp r3, #0 3275 00aa 40F0A780 bne .L247 3276 .L246: 1890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->AutoInjectedConv == ENABLE) 3277 .loc 1 1891 7 is_stmt 1 view .LVU1050 3278 .loc 1 1891 26 is_stmt 0 view .LVU1051 3279 00ae 95F82530 ldrb r3, [r5, #37] @ zero_extendqisi2 3280 .loc 1 1891 10 view .LVU1052 3281 00b2 012B cmp r3, #1 3282 00b4 00F09C80 beq .L319 1892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 3283 .loc 1 1897 9 is_stmt 1 view .LVU1053 3284 00b8 D368 ldr r3, [r2, #12] 3285 00ba 23F00073 bic r3, r3, #33554432 3286 00be D360 str r3, [r2, #12] 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 3287 .loc 1 1662 21 is_stmt 0 view .LVU1054 3288 00c0 0026 movs r6, #0 3289 .LVL281: 3290 .L249: 1898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If Automatic injected conversion was intended to be set and could not */ 1901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* due to injected group external triggers enabled, error is reported. */ 1902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->AutoInjectedConv == ENABLE) ARM GAS /tmp/ccrO2eGa.s page 240 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 1910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjecOversamplingMode == ENABLE) 3291 .loc 1 1917 5 is_stmt 1 view .LVU1055 3292 .loc 1 1917 24 is_stmt 0 view .LVU1056 3293 00c2 95F83030 ldrb r3, [r5, #48] @ zero_extendqisi2 3294 .loc 1 1917 8 view .LVU1057 3295 00c6 012B cmp r3, #1 3296 00c8 00F0A780 beq .L320 1918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(pConfigInjected->InjecOversampling.Ratio)); 1920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(pConfigInjected->InjecOversampling.RightBitShift)); 1921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JOVSE must be reset in case of triggered regular mode */ 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) 1924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS))); 1925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of Injected Oversampler: */ 1927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Oversampling Ratio */ 1928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Right bit shift */ 1929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable OverSampling mode */ 1931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2, 1932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSR | 1934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSS, 1935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pConfigInjected->InjecOversampling.Ratio | 1937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pConfigInjected->InjecOversampling.RightBitShift 1938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable Regular OverSampling */ 1943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE); 3297 .loc 1 1943 7 is_stmt 1 view .LVU1058 3298 00cc 2268 ldr r2, [r4] 3299 00ce 1369 ldr r3, [r2, #16] 3300 00d0 23F00203 bic r3, r3, #2 3301 00d4 1361 str r3, [r2, #16] 3302 .L252: 1944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */ 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5) 3303 .loc 1 1947 5 view .LVU1059 3304 .loc 1 1947 24 is_stmt 0 view .LVU1060 ARM GAS /tmp/ccrO2eGa.s page 241 3305 00d6 AA68 ldr r2, [r5, #8] 3306 .loc 1 1947 8 view .LVU1061 3307 00d8 B2F1004F cmp r2, #-2147483648 3308 00dc 00F0A980 beq .L321 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfigInjected->InjectedChannel, LL_ADC_SAMPLI 1951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5); 1954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfigInjected->InjectedChannel, 3309 .loc 1 1958 7 is_stmt 1 view .LVU1062 3310 00e0 2968 ldr r1, [r5] 3311 00e2 2068 ldr r0, [r4] 3312 00e4 FFF7FEFF bl LL_ADC_SetChannelSamplingTime 3313 .LVL282: 1959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pConfigInjected->InjectedSamplingTime); 1960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT); 3314 .loc 1 1962 7 view .LVU1063 3315 00e8 2268 ldr r2, [r4] 3316 .LVL283: 3317 .LBB370: 3318 .LBI370: 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3319 .loc 2 4507 22 view .LVU1064 3320 .LBB371: 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3321 .loc 2 4509 3 view .LVU1065 3322 00ea 5369 ldr r3, [r2, #20] 3323 00ec 23F00043 bic r3, r3, #-2147483648 3324 00f0 5361 str r3, [r2, #20] 3325 .LVL284: 3326 .L254: 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3327 .loc 2 4509 3 is_stmt 0 view .LVU1066 3328 .LBE371: 3329 .LBE370: 1963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configure the offset: offset enable/disable, channel, offset value */ 1966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Shift the offset with respect to the selected ADC resolution. */ 1968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ 1969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_offset_shifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, pConfigInjected->InjectedOffset); 3330 .loc 1 1969 5 is_stmt 1 view .LVU1067 3331 .loc 1 1969 26 is_stmt 0 view .LVU1068 3332 00f2 6A69 ldr r2, [r5, #20] 3333 00f4 2168 ldr r1, [r4] 3334 00f6 CB68 ldr r3, [r1, #12] 3335 00f8 C3F3C103 ubfx r3, r3, #3, #2 3336 00fc 5B00 lsls r3, r3, #1 ARM GAS /tmp/ccrO2eGa.s page 242 3337 .loc 1 1969 24 view .LVU1069 3338 00fe 9A40 lsls r2, r2, r3 3339 .LVL285: 1970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) 3340 .loc 1 1971 5 is_stmt 1 view .LVU1070 3341 .loc 1 1971 24 is_stmt 0 view .LVU1071 3342 0100 D5F810C0 ldr ip, [r5, #16] 3343 .loc 1 1971 8 view .LVU1072 3344 0104 BCF1040F cmp ip, #4 3345 0108 00F0A180 beq .L255 1972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset number */ 1974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected->Inje 3346 .loc 1 1974 7 is_stmt 1 view .LVU1073 3347 .LVL286: 3348 .LBB372: 3349 .LBI372: 4163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3350 .loc 2 4163 22 view .LVU1074 3351 .LBB373: 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3352 .loc 2 4165 3 view .LVU1075 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3353 .loc 2 4165 25 is_stmt 0 view .LVU1076 3354 010c 6031 adds r1, r1, #96 3355 .LVL287: 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3356 .loc 2 4167 3 is_stmt 1 view .LVU1077 3357 010e 51F82C00 ldr r0, [r1, ip, lsl #2] 3358 0112 A04B ldr r3, .L330 3359 0114 0340 ands r3, r3, r0 3360 0116 2868 ldr r0, [r5] 3361 0118 00F0F840 and r0, r0, #2080374784 3362 011c 0243 orrs r2, r2, r0 3363 .LVL288: 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3364 .loc 2 4167 3 is_stmt 0 view .LVU1078 3365 011e 1343 orrs r3, r3, r2 3366 0120 43F00043 orr r3, r3, #-2147483648 3367 0124 41F82C30 str r3, [r1, ip, lsl #2] 3368 .LVL289: 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3369 .loc 2 4167 3 view .LVU1079 3370 .LBE373: 3371 .LBE372: 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_offset_shifted); 1976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset sign & saturation */ 1978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSign(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected-> 3372 .loc 1 1978 7 is_stmt 1 view .LVU1080 3373 0128 2368 ldr r3, [r4] 3374 .loc 1 1978 59 is_stmt 0 view .LVU1081 3375 012a 2869 ldr r0, [r5, #16] 3376 .loc 1 1978 98 view .LVU1082 3377 012c AA69 ldr r2, [r5, #24] 3378 .LVL290: ARM GAS /tmp/ccrO2eGa.s page 243 3379 .LBB374: 3380 .LBI374: 4363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3381 .loc 2 4363 22 is_stmt 1 view .LVU1083 3382 .LBB375: 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3383 .loc 2 4365 3 view .LVU1084 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3384 .loc 2 4365 25 is_stmt 0 view .LVU1085 3385 012e 6033 adds r3, r3, #96 3386 .LVL291: 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3387 .loc 2 4367 3 is_stmt 1 view .LVU1086 3388 0130 53F82010 ldr r1, [r3, r0, lsl #2] 3389 0134 21F08071 bic r1, r1, #16777216 3390 0138 0A43 orrs r2, r2, r1 3391 .LVL292: 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3392 .loc 2 4367 3 is_stmt 0 view .LVU1087 3393 013a 43F82020 str r2, [r3, r0, lsl #2] 3394 .LVL293: 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3395 .loc 2 4367 3 view .LVU1088 3396 .LBE375: 3397 .LBE374: 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber, 3398 .loc 1 1979 7 is_stmt 1 view .LVU1089 3399 013e 2368 ldr r3, [r4] 3400 .loc 1 1979 65 is_stmt 0 view .LVU1090 3401 0140 2869 ldr r0, [r5, #16] 1980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (pConfigInjected->InjectedOffsetSaturation == ENABLE) ? 3402 .loc 1 1980 50 view .LVU1091 3403 0142 2A7F ldrb r2, [r5, #28] @ zero_extendqisi2 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber, 3404 .loc 1 1979 7 view .LVU1092 3405 0144 012A cmp r2, #1 3406 0146 7FD0 beq .L322 3407 .LVL294: 3408 .L256: 3409 .LBB376: 3410 .LBI376: 4418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3411 .loc 2 4418 22 is_stmt 1 view .LVU1093 3412 .LBB377: 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3413 .loc 2 4420 3 view .LVU1094 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3414 .loc 2 4420 25 is_stmt 0 view .LVU1095 3415 0148 6033 adds r3, r3, #96 3416 .LVL295: 4422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3417 .loc 2 4422 3 is_stmt 1 view .LVU1096 3418 014a 53F82020 ldr r2, [r3, r0, lsl #2] 3419 014e 22F00072 bic r2, r2, #33554432 3420 0152 3A43 orrs r2, r2, r7 3421 0154 43F82020 str r2, [r3, r0, lsl #2] 3422 .LVL296: ARM GAS /tmp/ccrO2eGa.s page 244 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3423 .loc 2 4425 1 is_stmt 0 view .LVU1097 3424 0158 E1E0 b .L245 3425 .LVL297: 3426 .L318: 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3427 .loc 2 4425 1 view .LVU1098 3428 .LBE377: 3429 .LBE376: 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3430 .loc 1 1756 7 is_stmt 1 view .LVU1099 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3431 .loc 1 1756 26 is_stmt 0 view .LVU1100 3432 015a AA6A ldr r2, [r5, #40] 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3433 .loc 1 1756 10 view .LVU1101 3434 015c BAB1 cbz r2, .L237 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3435 .loc 1 1758 9 is_stmt 1 view .LVU1102 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3436 .loc 1 1758 47 is_stmt 0 view .LVU1103 3437 015e 2B68 ldr r3, [r5] 3438 0160 9B0E lsrs r3, r3, #26 3439 0162 5B02 lsls r3, r3, #9 3440 0164 03F47853 and r3, r3, #15872 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | pConfigInjected->ExternalTrigInjecConvEdge 3441 .loc 1 1759 89 view .LVU1104 3442 0168 02F07C02 and r2, r2, #124 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | pConfigInjected->ExternalTrigInjecConvEdge 3443 .loc 1 1759 47 view .LVU1105 3444 016c 1343 orrs r3, r3, r2 1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 3445 .loc 1 1760 64 view .LVU1106 3446 016e EA6A ldr r2, [r5, #44] 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_ 3447 .loc 1 1758 44 view .LVU1107 3448 0170 1343 orrs r3, r3, r2 3449 .LVL298: 3450 .L238: 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 3451 .loc 1 1768 7 is_stmt 1 view .LVU1108 3452 0172 2168 ldr r1, [r4] 3453 .LVL299: 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 3454 .loc 1 1768 7 is_stmt 0 view .LVU1109 3455 0174 CA6C ldr r2, [r1, #76] 3456 0176 22F07B42 bic r2, r2, #-83886080 3457 017a 22F46F02 bic r2, r2, #15663104 3458 017e 22F43F42 bic r2, r2, #48896 3459 0182 22F0FF02 bic r2, r2, #255 3460 0186 1A43 orrs r2, r2, r3 3461 0188 CA64 str r2, [r1, #76] 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3462 .loc 1 1770 7 is_stmt 1 view .LVU1110 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3463 .loc 1 1770 42 is_stmt 0 view .LVU1111 3464 018a 6366 str r3, [r4, #100] ARM GAS /tmp/ccrO2eGa.s page 245 3465 018c 62E7 b .L236 3466 .LVL300: 3467 .L237: 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3468 .loc 1 1765 9 is_stmt 1 view .LVU1112 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3469 .loc 1 1765 47 is_stmt 0 view .LVU1113 3470 018e 2B68 ldr r3, [r5] 3471 0190 9B0E lsrs r3, r3, #26 3472 0192 5B02 lsls r3, r3, #9 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3473 .loc 1 1765 44 view .LVU1114 3474 0194 03F47853 and r3, r3, #15872 3475 0198 EBE7 b .L238 3476 .L240: 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3477 .loc 1 1815 9 is_stmt 1 view .LVU1115 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3478 .loc 1 1815 63 is_stmt 0 view .LVU1116 3479 019a 0A6A ldr r2, [r1, #32] 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3480 .loc 1 1815 44 view .LVU1117 3481 019c 013A subs r2, r2, #1 3482 .LVL301: 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3483 .loc 1 1815 44 view .LVU1118 3484 019e 00E0 b .L239 3485 .LVL302: 3486 .L303: 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3487 .loc 1 1669 12 view .LVU1119 3488 01a0 0022 movs r2, #0 3489 .LVL303: 3490 .L239: 1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3491 .loc 1 1823 5 is_stmt 1 view .LVU1120 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3492 .loc 1 1826 5 view .LVU1121 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3493 .loc 1 1826 43 is_stmt 0 view .LVU1122 3494 01a2 2B68 ldr r3, [r5] 3495 01a4 C3F38463 ubfx r3, r3, #26, #5 3496 01a8 6968 ldr r1, [r5, #4] 3497 .LVL304: 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3498 .loc 1 1826 43 view .LVU1123 3499 01aa 01F01F01 and r1, r1, #31 3500 01ae 8B40 lsls r3, r3, r1 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3501 .loc 1 1826 40 view .LVU1124 3502 01b0 1343 orrs r3, r3, r2 3503 .LVL305: 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3504 .loc 1 1829 5 is_stmt 1 view .LVU1125 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3505 .loc 1 1829 26 is_stmt 0 view .LVU1126 3506 01b2 A16E ldr r1, [r4, #104] ARM GAS /tmp/ccrO2eGa.s page 246 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3507 .loc 1 1829 39 view .LVU1127 3508 01b4 0139 subs r1, r1, #1 3509 01b6 A166 str r1, [r4, #104] 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3510 .loc 1 1834 5 is_stmt 1 view .LVU1128 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3511 .loc 1 1834 26 is_stmt 0 view .LVU1129 3512 01b8 626E ldr r2, [r4, #100] 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3513 .loc 1 1834 40 view .LVU1130 3514 01ba 1343 orrs r3, r3, r2 3515 .LVL306: 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3516 .loc 1 1834 40 view .LVU1131 3517 01bc 6366 str r3, [r4, #100] 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3518 .loc 1 1838 5 is_stmt 1 view .LVU1132 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3519 .loc 1 1838 8 is_stmt 0 view .LVU1133 3520 01be 0029 cmp r1, #0 3521 01c0 7FF448AF bne .L236 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3522 .loc 1 1840 7 is_stmt 1 view .LVU1134 3523 01c4 2168 ldr r1, [r4] 3524 01c6 CA6C ldr r2, [r1, #76] 3525 01c8 22F07B42 bic r2, r2, #-83886080 3526 01cc 22F46F02 bic r2, r2, #15663104 3527 01d0 22F43F42 bic r2, r2, #48896 3528 01d4 22F0FF02 bic r2, r2, #255 3529 01d8 1343 orrs r3, r3, r2 3530 01da CB64 str r3, [r1, #76] 3531 01dc 3AE7 b .L236 3532 .LVL307: 3533 .L242: 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 3534 .loc 1 1865 7 view .LVU1135 3535 01de DA68 ldr r2, [r3, #12] 3536 01e0 22F44012 bic r2, r2, #3145728 3537 01e4 95F82610 ldrb r1, [r5, #38] @ zero_extendqisi2 3538 01e8 42EA4152 orr r2, r2, r1, lsl #21 3539 01ec DA60 str r2, [r3, #12] 3540 01ee 47E7 b .L241 3541 .LVL308: 3542 .L319: 1893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3543 .loc 1 1893 9 view .LVU1136 3544 01f0 D368 ldr r3, [r2, #12] 3545 01f2 43F00073 orr r3, r3, #33554432 3546 01f6 D360 str r3, [r2, #12] 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 3547 .loc 1 1662 21 is_stmt 0 view .LVU1137 3548 01f8 0026 movs r6, #0 3549 01fa 62E7 b .L249 3550 .L247: 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3551 .loc 1 1904 7 is_stmt 1 view .LVU1138 ARM GAS /tmp/ccrO2eGa.s page 247 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3552 .loc 1 1904 26 is_stmt 0 view .LVU1139 3553 01fc 95F82560 ldrb r6, [r5, #37] @ zero_extendqisi2 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3554 .loc 1 1904 10 view .LVU1140 3555 0200 012E cmp r6, #1 3556 0202 05D0 beq .L323 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3557 .loc 1 1913 9 is_stmt 1 view .LVU1141 3558 0204 D368 ldr r3, [r2, #12] 3559 0206 23F00073 bic r3, r3, #33554432 3560 020a D360 str r3, [r2, #12] 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 3561 .loc 1 1662 21 is_stmt 0 view .LVU1142 3562 020c 0026 movs r6, #0 3563 020e 58E7 b .L249 3564 .L323: 1907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3565 .loc 1 1907 9 is_stmt 1 view .LVU1143 3566 0210 E36D ldr r3, [r4, #92] 3567 0212 43F02003 orr r3, r3, #32 3568 0216 E365 str r3, [r4, #92] 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3569 .loc 1 1909 9 view .LVU1144 3570 .LVL309: 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3571 .loc 1 1909 9 is_stmt 0 view .LVU1145 3572 0218 53E7 b .L249 3573 .LVL310: 3574 .L320: 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(pConfigInjected->InjecOversampling.RightBitShift)); 3575 .loc 1 1919 7 is_stmt 1 view .LVU1146 1920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3576 .loc 1 1920 7 view .LVU1147 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS))); 3577 .loc 1 1923 7 view .LVU1148 1931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 3578 .loc 1 1931 7 view .LVU1149 3579 021a 2168 ldr r1, [r4] 3580 021c 0B69 ldr r3, [r1, #16] 3581 021e 23F4FF73 bic r3, r3, #510 3582 0222 6A6B ldr r2, [r5, #52] 3583 0224 A86B ldr r0, [r5, #56] 3584 0226 0243 orrs r2, r2, r0 3585 0228 1343 orrs r3, r3, r2 3586 022a 43F00203 orr r3, r3, #2 3587 022e 0B61 str r3, [r1, #16] 3588 0230 51E7 b .L252 3589 .L321: 1950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3590 .loc 1 1950 7 view .LVU1150 3591 0232 0022 movs r2, #0 3592 0234 2968 ldr r1, [r5] 3593 0236 2068 ldr r0, [r4] 3594 0238 FFF7FEFF bl LL_ADC_SetChannelSamplingTime 3595 .LVL311: 1953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/ccrO2eGa.s page 248 3596 .loc 1 1953 7 view .LVU1151 3597 023c 2268 ldr r2, [r4] 3598 .LVL312: 3599 .LBB378: 3600 .LBI378: 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3601 .loc 2 4507 22 view .LVU1152 3602 .LBB379: 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3603 .loc 2 4509 3 view .LVU1153 3604 023e 5369 ldr r3, [r2, #20] 3605 0240 43F00043 orr r3, r3, #-2147483648 3606 0244 5361 str r3, [r2, #20] 3607 .LVL313: 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3608 .loc 2 4510 1 is_stmt 0 view .LVU1154 3609 0246 54E7 b .L254 3610 .LVL314: 3611 .L322: 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3612 .loc 2 4510 1 view .LVU1155 3613 .LBE379: 3614 .LBE378: 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (pConfigInjected->InjectedOffsetSaturation == ENABLE) ? 3615 .loc 1 1979 7 discriminator 1 view .LVU1156 3616 0248 4FF00077 mov r7, #33554432 3617 .LVL315: 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (pConfigInjected->InjectedOffsetSaturation == ENABLE) ? 3618 .loc 1 1979 7 discriminator 1 view .LVU1157 3619 024c 7CE7 b .L256 3620 .LVL316: 3621 .L255: 1981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_OFFSET_SATURATION_ENABLE : LL_ADC_OFFSET_SATURATION_DISABLE 1982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Scan each offset register to check if the selected channel is targeted. */ 1986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If this is the case, the corresponding offset number is disabled. */ 1987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) 3622 .loc 1 1987 7 is_stmt 1 view .LVU1158 3623 .LBB380: 3624 .LBI380: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3625 .loc 2 4249 26 view .LVU1159 3626 .LBB381: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3627 .loc 2 4251 3 view .LVU1160 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3628 .loc 2 4253 3 view .LVU1161 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3629 .loc 2 4253 10 is_stmt 0 view .LVU1162 3630 024e 0B6E ldr r3, [r1, #96] 3631 .LVL317: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3632 .loc 2 4253 10 view .LVU1163 3633 .LBE381: 3634 .LBE380: ARM GAS /tmp/ccrO2eGa.s page 249 3635 .LBB382: 3636 .LBI382: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3637 .loc 2 4249 26 is_stmt 1 view .LVU1164 3638 .LBB383: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3639 .loc 2 4251 3 view .LVU1165 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3640 .loc 2 4253 3 view .LVU1166 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3641 .loc 2 4253 10 is_stmt 0 view .LVU1167 3642 0250 0A6E ldr r2, [r1, #96] 3643 .LVL318: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3644 .loc 2 4253 10 view .LVU1168 3645 .LBE383: 3646 .LBE382: 3647 .loc 1 1987 11 discriminator 1 view .LVU1169 3648 0252 C2F38462 ubfx r2, r2, #26, #5 1988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3649 .loc 1 1988 14 view .LVU1170 3650 0256 2B68 ldr r3, [r5] 3651 0258 C3F31200 ubfx r0, r3, #0, #19 3652 025c 78BB cbnz r0, .L257 3653 .loc 1 1988 14 discriminator 1 view .LVU1171 3654 025e C3F38463 ubfx r3, r3, #26, #5 3655 .L258: 1987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3656 .loc 1 1987 10 view .LVU1172 3657 0262 9A42 cmp r2, r3 3658 0264 33D0 beq .L324 3659 .L260: 1989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE); 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) 3660 .loc 1 1992 7 is_stmt 1 view .LVU1173 3661 .loc 1 1992 11 is_stmt 0 view .LVU1174 3662 0266 2168 ldr r1, [r4] 3663 .LVL319: 3664 .LBB384: 3665 .LBI384: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3666 .loc 2 4249 26 is_stmt 1 view .LVU1175 3667 .LBB385: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3668 .loc 2 4251 3 view .LVU1176 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3669 .loc 2 4253 3 view .LVU1177 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3670 .loc 2 4253 10 is_stmt 0 view .LVU1178 3671 0268 4B6E ldr r3, [r1, #100] 3672 .LVL320: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3673 .loc 2 4253 10 view .LVU1179 3674 .LBE385: 3675 .LBE384: ARM GAS /tmp/ccrO2eGa.s page 250 3676 .LBB386: 3677 .LBI386: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3678 .loc 2 4249 26 is_stmt 1 view .LVU1180 3679 .LBB387: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3680 .loc 2 4251 3 view .LVU1181 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3681 .loc 2 4253 3 view .LVU1182 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3682 .loc 2 4253 10 is_stmt 0 view .LVU1183 3683 026a 4A6E ldr r2, [r1, #100] 3684 .LVL321: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3685 .loc 2 4253 10 view .LVU1184 3686 .LBE387: 3687 .LBE386: 3688 .loc 1 1992 11 discriminator 1 view .LVU1185 3689 026c C2F38462 ubfx r2, r2, #26, #5 1993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3690 .loc 1 1993 14 view .LVU1186 3691 0270 2B68 ldr r3, [r5] 3692 0272 C3F31200 ubfx r0, r3, #0, #19 3693 0276 78BB cbnz r0, .L261 3694 .loc 1 1993 14 discriminator 1 view .LVU1187 3695 0278 C3F38463 ubfx r3, r3, #26, #5 3696 .L262: 1992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3697 .loc 1 1992 10 view .LVU1188 3698 027c 9A42 cmp r2, r3 3699 027e 33D0 beq .L325 3700 .L264: 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE); 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) 3701 .loc 1 1997 7 is_stmt 1 view .LVU1189 3702 .loc 1 1997 11 is_stmt 0 view .LVU1190 3703 0280 2168 ldr r1, [r4] 3704 .LVL322: 3705 .LBB388: 3706 .LBI388: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3707 .loc 2 4249 26 is_stmt 1 view .LVU1191 3708 .LBB389: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3709 .loc 2 4251 3 view .LVU1192 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3710 .loc 2 4253 3 view .LVU1193 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3711 .loc 2 4253 10 is_stmt 0 view .LVU1194 3712 0282 8B6E ldr r3, [r1, #104] 3713 .LVL323: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3714 .loc 2 4253 10 view .LVU1195 3715 .LBE389: 3716 .LBE388: ARM GAS /tmp/ccrO2eGa.s page 251 3717 .LBB390: 3718 .LBI390: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3719 .loc 2 4249 26 is_stmt 1 view .LVU1196 3720 .LBB391: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3721 .loc 2 4251 3 view .LVU1197 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3722 .loc 2 4253 3 view .LVU1198 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3723 .loc 2 4253 10 is_stmt 0 view .LVU1199 3724 0284 8A6E ldr r2, [r1, #104] 3725 .LVL324: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3726 .loc 2 4253 10 view .LVU1200 3727 .LBE391: 3728 .LBE390: 3729 .loc 1 1997 11 discriminator 1 view .LVU1201 3730 0286 C2F38462 ubfx r2, r2, #26, #5 1998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3731 .loc 1 1998 14 view .LVU1202 3732 028a 2B68 ldr r3, [r5] 3733 028c C3F31200 ubfx r0, r3, #0, #19 3734 0290 78BB cbnz r0, .L265 3735 .loc 1 1998 14 discriminator 1 view .LVU1203 3736 0292 C3F38463 ubfx r3, r3, #26, #5 3737 .L266: 1997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3738 .loc 1 1997 10 view .LVU1204 3739 0296 9A42 cmp r2, r3 3740 0298 33D0 beq .L326 3741 .L268: 1999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE); 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) 3742 .loc 1 2002 7 is_stmt 1 view .LVU1205 3743 .loc 1 2002 11 is_stmt 0 view .LVU1206 3744 029a 2168 ldr r1, [r4] 3745 .LVL325: 3746 .LBB392: 3747 .LBI392: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3748 .loc 2 4249 26 is_stmt 1 view .LVU1207 3749 .LBB393: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3750 .loc 2 4251 3 view .LVU1208 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3751 .loc 2 4253 3 view .LVU1209 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3752 .loc 2 4253 10 is_stmt 0 view .LVU1210 3753 029c CB6E ldr r3, [r1, #108] 3754 .LVL326: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3755 .loc 2 4253 10 view .LVU1211 3756 .LBE393: 3757 .LBE392: ARM GAS /tmp/ccrO2eGa.s page 252 3758 .LBB394: 3759 .LBI394: 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3760 .loc 2 4249 26 is_stmt 1 view .LVU1212 3761 .LBB395: 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3762 .loc 2 4251 3 view .LVU1213 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3763 .loc 2 4253 3 view .LVU1214 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3764 .loc 2 4253 10 is_stmt 0 view .LVU1215 3765 029e CA6E ldr r2, [r1, #108] 3766 .LVL327: 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3767 .loc 2 4253 10 view .LVU1216 3768 .LBE395: 3769 .LBE394: 3770 .loc 1 2002 11 discriminator 1 view .LVU1217 3771 02a0 C2F38462 ubfx r2, r2, #26, #5 2003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3772 .loc 1 2003 14 view .LVU1218 3773 02a4 2B68 ldr r3, [r5] 3774 02a6 C3F31200 ubfx r0, r3, #0, #19 3775 02aa 78BB cbnz r0, .L269 3776 .loc 1 2003 14 discriminator 1 view .LVU1219 3777 02ac C3F38463 ubfx r3, r3, #26, #5 3778 .L270: 2002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel)) 3779 .loc 1 2002 10 view .LVU1220 3780 02b0 9A42 cmp r2, r3 3781 02b2 34D1 bne .L245 2004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE); 3782 .loc 1 2005 9 is_stmt 1 view .LVU1221 3783 .LVL328: 3784 .LBB396: 3785 .LBI396: 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3786 .loc 2 4308 22 view .LVU1222 3787 .LBB397: 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3788 .loc 2 4310 3 view .LVU1223 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3789 .loc 2 4312 3 view .LVU1224 3790 02b4 CB6E ldr r3, [r1, #108] 3791 02b6 23F00043 bic r3, r3, #-2147483648 3792 02ba CB66 str r3, [r1, #108] 3793 .LVL329: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3794 .loc 2 4315 1 is_stmt 0 view .LVU1225 3795 02bc 2FE0 b .L245 3796 .L257: 3797 .LVL330: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3798 .loc 2 4315 1 view .LVU1226 3799 .LBE397: 3800 .LBE396: ARM GAS /tmp/ccrO2eGa.s page 253 3801 .LBB398: 3802 .LBI398: 3803 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccrO2eGa.s page 254 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) ARM GAS /tmp/ccrO2eGa.s page 255 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccrO2eGa.s page 256 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccrO2eGa.s page 257 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register ARM GAS /tmp/ccrO2eGa.s page 258 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccrO2eGa.s page 259 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set ARM GAS /tmp/ccrO2eGa.s page 260 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); ARM GAS /tmp/ccrO2eGa.s page 261 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccrO2eGa.s page 262 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. ARM GAS /tmp/ccrO2eGa.s page 263 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) ARM GAS /tmp/ccrO2eGa.s page 264 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) ARM GAS /tmp/ccrO2eGa.s page 265 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit ARM GAS /tmp/ccrO2eGa.s page 266 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) ARM GAS /tmp/ccrO2eGa.s page 267 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccrO2eGa.s page 268 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") ARM GAS /tmp/ccrO2eGa.s page 269 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccrO2eGa.s page 270 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; ARM GAS /tmp/ccrO2eGa.s page 271 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 3804 .loc 3 1048 31 is_stmt 1 view .LVU1227 3805 .LBB399: 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 3806 .loc 3 1050 3 view .LVU1228 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 3807 .loc 3 1055 4 view .LVU1229 3808 .syntax unified 3809 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3810 02be 93FAA3F3 rbit r3, r3 3811 @ 0 "" 2 3812 .LVL331: 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 3813 .loc 3 1068 3 view .LVU1230 3814 .loc 3 1068 3 is_stmt 0 view .LVU1231 3815 .thumb ARM GAS /tmp/ccrO2eGa.s page 272 3816 .syntax unified 3817 .LBE399: 3818 .LBE398: 3819 .LBB400: 3820 .LBI400: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 3821 .loc 3 1078 30 is_stmt 1 view .LVU1232 3822 .LBB401: 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 3823 .loc 3 1089 3 view .LVU1233 3824 .loc 3 1089 6 is_stmt 0 view .LVU1234 3825 02c2 13B1 cbz r3, .L306 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 3826 .loc 3 1093 3 is_stmt 1 view .LVU1235 3827 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1236 3828 02c4 B3FA83F3 clz r3, r3 3829 .LVL332: 3830 .loc 3 1093 10 view .LVU1237 3831 02c8 CBE7 b .L258 3832 .LVL333: 3833 .L306: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3834 .loc 3 1091 12 view .LVU1238 3835 02ca 2023 movs r3, #32 3836 .LVL334: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3837 .loc 3 1091 12 view .LVU1239 3838 02cc C9E7 b .L258 3839 .L324: 3840 .LBE401: 3841 .LBE400: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3842 .loc 1 1990 9 is_stmt 1 view .LVU1240 3843 .LVL335: 3844 .LBB402: ARM GAS /tmp/ccrO2eGa.s page 273 3845 .LBI402: 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3846 .loc 2 4308 22 view .LVU1241 3847 .LBB403: 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3848 .loc 2 4310 3 view .LVU1242 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3849 .loc 2 4312 3 view .LVU1243 3850 02ce 0B6E ldr r3, [r1, #96] 3851 02d0 23F00043 bic r3, r3, #-2147483648 3852 02d4 0B66 str r3, [r1, #96] 3853 .LVL336: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3854 .loc 2 4315 1 is_stmt 0 view .LVU1244 3855 02d6 C6E7 b .L260 3856 .L261: 3857 .LVL337: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3858 .loc 2 4315 1 view .LVU1245 3859 .LBE403: 3860 .LBE402: 3861 .LBB404: 3862 .LBI404: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3863 .loc 3 1048 31 is_stmt 1 view .LVU1246 3864 .LBB405: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3865 .loc 3 1050 3 view .LVU1247 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3866 .loc 3 1055 4 view .LVU1248 3867 .syntax unified 3868 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3869 02d8 93FAA3F3 rbit r3, r3 3870 @ 0 "" 2 3871 .LVL338: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3872 .loc 3 1068 3 view .LVU1249 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3873 .loc 3 1068 3 is_stmt 0 view .LVU1250 3874 .thumb 3875 .syntax unified 3876 .LBE405: 3877 .LBE404: 3878 .LBB406: 3879 .LBI406: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3880 .loc 3 1078 30 is_stmt 1 view .LVU1251 3881 .LBB407: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3882 .loc 3 1089 3 view .LVU1252 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3883 .loc 3 1089 6 is_stmt 0 view .LVU1253 3884 02dc 13B1 cbz r3, .L307 3885 .loc 3 1093 3 is_stmt 1 view .LVU1254 3886 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1255 3887 02de B3FA83F3 clz r3, r3 3888 .LVL339: ARM GAS /tmp/ccrO2eGa.s page 274 3889 .loc 3 1093 10 view .LVU1256 3890 02e2 CBE7 b .L262 3891 .LVL340: 3892 .L307: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3893 .loc 3 1091 12 view .LVU1257 3894 02e4 2023 movs r3, #32 3895 .LVL341: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3896 .loc 3 1091 12 view .LVU1258 3897 02e6 C9E7 b .L262 3898 .L325: 3899 .LBE407: 3900 .LBE406: 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3901 .loc 1 1995 9 is_stmt 1 view .LVU1259 3902 .LVL342: 3903 .LBB408: 3904 .LBI408: 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3905 .loc 2 4308 22 view .LVU1260 3906 .LBB409: 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3907 .loc 2 4310 3 view .LVU1261 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3908 .loc 2 4312 3 view .LVU1262 3909 02e8 4B6E ldr r3, [r1, #100] 3910 02ea 23F00043 bic r3, r3, #-2147483648 3911 02ee 4B66 str r3, [r1, #100] 3912 .LVL343: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3913 .loc 2 4315 1 is_stmt 0 view .LVU1263 3914 02f0 C6E7 b .L264 3915 .L265: 3916 .LVL344: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3917 .loc 2 4315 1 view .LVU1264 3918 .LBE409: 3919 .LBE408: 3920 .LBB410: 3921 .LBI410: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3922 .loc 3 1048 31 is_stmt 1 view .LVU1265 3923 .LBB411: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3924 .loc 3 1050 3 view .LVU1266 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3925 .loc 3 1055 4 view .LVU1267 3926 .syntax unified 3927 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3928 02f2 93FAA3F3 rbit r3, r3 3929 @ 0 "" 2 3930 .LVL345: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3931 .loc 3 1068 3 view .LVU1268 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3932 .loc 3 1068 3 is_stmt 0 view .LVU1269 ARM GAS /tmp/ccrO2eGa.s page 275 3933 .thumb 3934 .syntax unified 3935 .LBE411: 3936 .LBE410: 3937 .LBB412: 3938 .LBI412: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3939 .loc 3 1078 30 is_stmt 1 view .LVU1270 3940 .LBB413: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3941 .loc 3 1089 3 view .LVU1271 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3942 .loc 3 1089 6 is_stmt 0 view .LVU1272 3943 02f6 13B1 cbz r3, .L308 3944 .loc 3 1093 3 is_stmt 1 view .LVU1273 3945 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1274 3946 02f8 B3FA83F3 clz r3, r3 3947 .LVL346: 3948 .loc 3 1093 10 view .LVU1275 3949 02fc CBE7 b .L266 3950 .LVL347: 3951 .L308: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3952 .loc 3 1091 12 view .LVU1276 3953 02fe 2023 movs r3, #32 3954 .LVL348: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3955 .loc 3 1091 12 view .LVU1277 3956 0300 C9E7 b .L266 3957 .L326: 3958 .LBE413: 3959 .LBE412: 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3960 .loc 1 2000 9 is_stmt 1 view .LVU1278 3961 .LVL349: 3962 .LBB414: 3963 .LBI414: 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3964 .loc 2 4308 22 view .LVU1279 3965 .LBB415: 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3966 .loc 2 4310 3 view .LVU1280 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3967 .loc 2 4312 3 view .LVU1281 3968 0302 8B6E ldr r3, [r1, #104] 3969 0304 23F00043 bic r3, r3, #-2147483648 3970 0308 8B66 str r3, [r1, #104] 3971 .LVL350: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3972 .loc 2 4315 1 is_stmt 0 view .LVU1282 3973 030a C6E7 b .L268 3974 .L269: 3975 .LVL351: 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3976 .loc 2 4315 1 view .LVU1283 3977 .LBE415: 3978 .LBE414: ARM GAS /tmp/ccrO2eGa.s page 276 3979 .LBB416: 3980 .LBI416: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3981 .loc 3 1048 31 is_stmt 1 view .LVU1284 3982 .LBB417: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3983 .loc 3 1050 3 view .LVU1285 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3984 .loc 3 1055 4 view .LVU1286 3985 .syntax unified 3986 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3987 030c 93FAA3F3 rbit r3, r3 3988 @ 0 "" 2 3989 .LVL352: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3990 .loc 3 1068 3 view .LVU1287 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3991 .loc 3 1068 3 is_stmt 0 view .LVU1288 3992 .thumb 3993 .syntax unified 3994 .LBE417: 3995 .LBE416: 3996 .LBB418: 3997 .LBI418: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3998 .loc 3 1078 30 is_stmt 1 view .LVU1289 3999 .LBB419: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4000 .loc 3 1089 3 view .LVU1290 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4001 .loc 3 1089 6 is_stmt 0 view .LVU1291 4002 0310 13B1 cbz r3, .L309 4003 .loc 3 1093 3 is_stmt 1 view .LVU1292 4004 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1293 4005 0312 B3FA83F3 clz r3, r3 4006 .LVL353: 4007 .loc 3 1093 10 view .LVU1294 4008 0316 CBE7 b .L270 4009 .LVL354: 4010 .L309: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4011 .loc 3 1091 12 view .LVU1295 4012 0318 2023 movs r3, #32 4013 .LVL355: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4014 .loc 3 1091 12 view .LVU1296 4015 031a C9E7 b .L270 4016 .LVL356: 4017 .L304: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4018 .loc 3 1091 12 view .LVU1297 4019 .LBE419: 4020 .LBE418: 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 4021 .loc 1 1662 21 view .LVU1298 4022 031c 0026 movs r6, #0 4023 .LVL357: ARM GAS /tmp/ccrO2eGa.s page 277 4024 .L245: 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Single or differential mode */ 2014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 4025 .loc 1 2014 3 is_stmt 1 view .LVU1299 4026 .loc 1 2014 28 is_stmt 0 view .LVU1300 4027 031e 2168 ldr r1, [r4] 4028 .LVL358: 4029 .LBB420: 4030 .LBI420: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4031 .loc 2 7744 26 is_stmt 1 view .LVU1301 4032 .LBB421: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4033 .loc 2 7746 3 view .LVU1302 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4034 .loc 2 7746 12 is_stmt 0 view .LVU1303 4035 0320 8B68 ldr r3, [r1, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4036 .loc 2 7746 68 view .LVU1304 4037 0322 13F0010F tst r3, #1 4038 0326 15D1 bne .L272 4039 .LVL359: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4040 .loc 2 7746 68 view .LVU1305 4041 .LBE421: 4042 .LBE420: 2015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set mode single-ended or differential input of the selected ADC channel */ 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSingleDiff(hadc->Instance, pConfigInjected->InjectedChannel, pConfigInjected-> 4043 .loc 1 2017 5 is_stmt 1 view .LVU1306 4044 .loc 1 2017 64 is_stmt 0 view .LVU1307 4045 0328 2B68 ldr r3, [r5] 4046 .loc 1 2017 98 view .LVU1308 4047 032a E868 ldr r0, [r5, #12] 4048 .LVL360: 4049 .LBB422: 4050 .LBI422: 6490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4051 .loc 2 6490 22 is_stmt 1 view .LVU1309 4052 .LBB423: 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 4053 .loc 2 6495 3 view .LVU1310 4054 032c D1F8B020 ldr r2, [r1, #176] 4055 0330 C3F31207 ubfx r7, r3, #0, #19 4056 0334 22EA0702 bic r2, r2, r7 4057 0338 00F01807 and r7, r0, #24 4058 033c 1648 ldr r0, .L330+4 4059 .LVL361: 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 4060 .loc 2 6495 3 is_stmt 0 view .LVU1311 ARM GAS /tmp/ccrO2eGa.s page 278 4061 033e F840 lsrs r0, r0, r7 4062 0340 0340 ands r3, r3, r0 4063 .LVL362: 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 4064 .loc 2 6495 3 view .LVU1312 4065 0342 C3F31203 ubfx r3, r3, #0, #19 4066 0346 1343 orrs r3, r3, r2 4067 0348 C1F8B030 str r3, [r1, #176] 4068 .LVL363: 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK, 4069 .loc 2 6495 3 view .LVU1313 4070 .LBE423: 4071 .LBE422: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of differential mode */ 2020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range 2021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED) 4072 .loc 1 2021 5 is_stmt 1 view .LVU1314 4073 .loc 1 2021 24 is_stmt 0 view .LVU1315 4074 034c EA68 ldr r2, [r5, #12] 4075 .loc 1 2021 8 view .LVU1316 4076 034e 134B ldr r3, .L330+8 4077 0350 9A42 cmp r2, r3 4078 0352 31D0 beq .L327 4079 .L272: 2022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 2026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)pConfigInjected->InjectedChannel) 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), 2029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pConfigInjected->InjectedSamplingTime); 2030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ 2035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* internal measurement paths enable: If internal channel selected, */ 2036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable dedicated internal buffers and path. */ 2037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: these internal measurement paths can be disabled using */ 2038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* HAL_ADC_DeInit(). */ 2039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfigInjected->InjectedChannel)) 4080 .loc 1 2040 3 is_stmt 1 view .LVU1317 4081 .loc 1 2040 7 is_stmt 0 view .LVU1318 4082 0354 2B68 ldr r3, [r5] 4083 .loc 1 2040 6 view .LVU1319 4084 0356 124A ldr r2, .L330+12 4085 0358 1342 tst r3, r2 4086 035a 13D0 beq .L296 2041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Ins 4087 .loc 1 2042 5 is_stmt 1 view .LVU1320 4088 .LVL364: 4089 .LBB424: 4090 .LBI424: ARM GAS /tmp/ccrO2eGa.s page 279 3826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4091 .loc 2 3826 26 view .LVU1321 4092 .LBB425: 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4093 .loc 2 3828 3 view .LVU1322 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4094 .loc 2 3828 21 is_stmt 0 view .LVU1323 4095 035c 114A ldr r2, .L330+16 4096 035e 9268 ldr r2, [r2, #8] 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4097 .loc 2 3828 10 view .LVU1324 4098 0360 02F0E071 and r1, r2, #29360128 4099 .LVL365: 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4100 .loc 2 3828 10 view .LVU1325 4101 .LBE425: 4102 .LBE424: 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If the requested internal measurement path has already been enabled, */ 2045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* bypass the configuration processing. */ 2046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((pConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC1) 4103 .loc 1 2046 5 is_stmt 1 view .LVU1326 4104 .loc 1 2046 8 is_stmt 0 view .LVU1327 4105 0364 1048 ldr r0, .L330+20 4106 0366 8342 cmp r3, r0 4107 0368 00F0D580 beq .L297 2047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (pConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC5)) 4108 .loc 1 2047 10 view .LVU1328 4109 036c 0F48 ldr r0, .L330+24 4110 036e 8342 cmp r3, r0 4111 0370 00F0D180 beq .L297 4112 .L298: 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 2049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channe 2054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Delay for temperature sensor stabilization time */ 2056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait loop initialization and execution */ 2057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Variable divided by 2 to compensate partially */ 2058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* CPU processing cycles, scaling in us split to not */ 2059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* exceed 32 bits register capacity and handle low frequency. */ 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (((SystemCoreClock / (100000UL * 2UL)) + 1UL) + 1UL)); 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index--; 2065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) 4113 .loc 1 2068 10 is_stmt 1 view .LVU1329 4114 .loc 1 2068 13 is_stmt 0 view .LVU1330 4115 0374 0E48 ldr r0, .L330+28 4116 0376 8342 cmp r3, r0 ARM GAS /tmp/ccrO2eGa.s page 280 4117 0378 00F0F280 beq .L328 4118 .L301: 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) 2070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 2075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) 4119 .loc 1 2077 10 is_stmt 1 view .LVU1331 4120 .loc 1 2077 13 is_stmt 0 view .LVU1332 4121 037c 0D48 ldr r0, .L330+32 4122 037e 8342 cmp r3, r0 4123 0380 00F00081 beq .L329 4124 .LVL366: 4125 .L296: 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 2079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_VREFINT_INSTANCE(hadc)) 2081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); 2084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* nothing to do */ 2089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4126 .loc 1 2089 5 is_stmt 1 view .LVU1333 2090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 4127 .loc 1 2093 3 view .LVU1334 4128 .loc 1 2093 3 view .LVU1335 4129 0384 0023 movs r3, #0 4130 0386 84F85830 strb r3, [r4, #88] 4131 .loc 1 2093 3 view .LVU1336 2094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 4132 .loc 1 2096 3 view .LVU1337 4133 .LVL367: 4134 .L233: 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4135 .loc 1 2097 1 is_stmt 0 view .LVU1338 4136 038a 3046 mov r0, r6 4137 038c 03B0 add sp, sp, #12 4138 .LCFI34: 4139 .cfi_remember_state 4140 .cfi_def_cfa_offset 20 4141 @ sp needed 4142 038e F0BD pop {r4, r5, r6, r7, pc} 4143 .LVL368: 4144 .L305: ARM GAS /tmp/ccrO2eGa.s page 281 4145 .LCFI35: 4146 .cfi_restore_state 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_offset_shifted; 4147 .loc 1 1662 21 view .LVU1339 4148 0390 0026 movs r6, #0 4149 0392 C4E7 b .L245 4150 .L331: 4151 .align 2 4152 .L330: 4153 0394 00F0FF03 .word 67104768 4154 0398 FFFF0700 .word 524287 4155 039c 00007F40 .word 1082064896 4156 03a0 00000880 .word -2146959360 4157 03a4 00030050 .word 1342178048 4158 03a8 000021C3 .word -1021247488 4159 03ac 1000C090 .word -1866465264 4160 03b0 000052C7 .word -950927360 4161 03b4 000084CB .word -880541696 4162 .LVL369: 4163 .L327: 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 4164 .loc 1 2024 7 is_stmt 1 view .LVU1340 4165 03b8 2068 ldr r0, [r4] 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4166 .loc 1 2025 48 is_stmt 0 view .LVU1341 4167 03ba 2B68 ldr r3, [r5] 4168 03bc C3F31207 ubfx r7, r3, #0, #19 4169 03c0 3FBB cbnz r7, .L273 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4170 .loc 1 2025 48 discriminator 1 view .LVU1342 4171 03c2 9A0E lsrs r2, r3, #26 4172 03c4 0132 adds r2, r2, #1 4173 03c6 02F01F02 and r2, r2, #31 4174 03ca 092A cmp r2, #9 4175 03cc 8CBF ite hi 4176 03ce 0022 movhi r2, #0 4177 03d0 0122 movls r2, #1 4178 .L274: 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 4179 .loc 1 2024 7 view .LVU1343 4180 03d2 002A cmp r2, #0 4181 03d4 55D0 beq .L276 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4182 .loc 1 2025 48 view .LVU1344 4183 03d6 5FBB cbnz r7, .L277 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4184 .loc 1 2025 48 discriminator 3 view .LVU1345 4185 03d8 990E lsrs r1, r3, #26 4186 03da 0131 adds r1, r1, #1 4187 03dc 8906 lsls r1, r1, #26 4188 03de 01F0F841 and r1, r1, #2080374784 4189 .L278: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4190 .loc 1 2025 48 discriminator 6 view .LVU1346 4191 03e2 8FBB cbnz r7, .L280 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4192 .loc 1 2025 48 discriminator 7 view .LVU1347 ARM GAS /tmp/ccrO2eGa.s page 282 4193 03e4 4FEA936C lsr ip, r3, #26 4194 03e8 0CF1010C add ip, ip, #1 4195 03ec 0CF01F0C and ip, ip, #31 4196 03f0 0122 movs r2, #1 4197 03f2 02FA0CF2 lsl r2, r2, ip 4198 .L281: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4199 .loc 1 2025 48 discriminator 10 view .LVU1348 4200 03f6 1143 orrs r1, r1, r2 4201 03f8 AFBB cbnz r7, .L283 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4202 .loc 1 2025 48 discriminator 11 view .LVU1349 4203 03fa 9B0E lsrs r3, r3, #26 4204 03fc 0133 adds r3, r3, #1 4205 03fe 03F01F03 and r3, r3, #31 4206 0402 03EB4303 add r3, r3, r3, lsl #1 4207 0406 1B05 lsls r3, r3, #20 4208 .L284: 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 4209 .loc 1 2024 7 view .LVU1350 4210 0408 1943 orrs r1, r1, r3 4211 .L286: 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 4212 .loc 1 2024 7 discriminator 1 view .LVU1351 4213 040a AA68 ldr r2, [r5, #8] 4214 040c FFF7FEFF bl LL_ADC_SetChannelSamplingTime 4215 .LVL370: 4216 0410 A0E7 b .L272 4217 .L273: 4218 .LVL371: 4219 .LBB426: 4220 .LBI426: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4221 .loc 3 1048 31 is_stmt 1 view .LVU1352 4222 .LBB427: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4223 .loc 3 1050 3 view .LVU1353 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4224 .loc 3 1055 4 view .LVU1354 4225 .syntax unified 4226 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4227 0412 93FAA3F2 rbit r2, r3 4228 @ 0 "" 2 4229 .LVL372: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4230 .loc 3 1068 3 view .LVU1355 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4231 .loc 3 1068 3 is_stmt 0 view .LVU1356 4232 .thumb 4233 .syntax unified 4234 .LBE427: 4235 .LBE426: 4236 .LBB428: 4237 .LBI428: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4238 .loc 3 1078 30 is_stmt 1 view .LVU1357 4239 .LBB429: ARM GAS /tmp/ccrO2eGa.s page 283 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4240 .loc 3 1089 3 view .LVU1358 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4241 .loc 3 1089 6 is_stmt 0 view .LVU1359 4242 0416 4AB1 cbz r2, .L310 4243 .loc 3 1093 3 is_stmt 1 view .LVU1360 4244 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1361 4245 0418 B2FA82F2 clz r2, r2 4246 .LVL373: 4247 .L275: 4248 .loc 3 1093 10 discriminator 1 view .LVU1362 4249 .LBE429: 4250 .LBE428: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4251 .loc 1 2025 48 discriminator 2 view .LVU1363 4252 041c 0132 adds r2, r2, #1 4253 041e 02F01F02 and r2, r2, #31 4254 0422 092A cmp r2, #9 4255 0424 8CBF ite hi 4256 0426 0022 movhi r2, #0 4257 0428 0122 movls r2, #1 4258 042a D2E7 b .L274 4259 .LVL374: 4260 .L310: 4261 .LBB431: 4262 .LBB430: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4263 .loc 3 1091 12 view .LVU1364 4264 042c 2022 movs r2, #32 4265 .LVL375: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4266 .loc 3 1091 12 view .LVU1365 4267 042e F5E7 b .L275 4268 .LVL376: 4269 .L277: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4270 .loc 3 1091 12 view .LVU1366 4271 .LBE430: 4272 .LBE431: 4273 .LBB432: 4274 .LBI432: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4275 .loc 3 1048 31 is_stmt 1 view .LVU1367 4276 .LBB433: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4277 .loc 3 1050 3 view .LVU1368 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4278 .loc 3 1055 4 view .LVU1369 4279 .syntax unified 4280 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4281 0430 93FAA3F1 rbit r1, r3 4282 @ 0 "" 2 4283 .LVL377: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4284 .loc 3 1068 3 view .LVU1370 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4285 .loc 3 1068 3 is_stmt 0 view .LVU1371 ARM GAS /tmp/ccrO2eGa.s page 284 4286 .thumb 4287 .syntax unified 4288 .LBE433: 4289 .LBE432: 4290 .LBB434: 4291 .LBI434: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4292 .loc 3 1078 30 is_stmt 1 view .LVU1372 4293 .LBB435: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4294 .loc 3 1089 3 view .LVU1373 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4295 .loc 3 1089 6 is_stmt 0 view .LVU1374 4296 0434 31B1 cbz r1, .L311 4297 .loc 3 1093 3 is_stmt 1 view .LVU1375 4298 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1376 4299 0436 B1FA81F1 clz r1, r1 4300 .LVL378: 4301 .L279: 4302 .loc 3 1093 10 discriminator 1 view .LVU1377 4303 .LBE435: 4304 .LBE434: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4305 .loc 1 2025 48 discriminator 2 view .LVU1378 4306 043a 0131 adds r1, r1, #1 4307 043c 8906 lsls r1, r1, #26 4308 043e 01F0F841 and r1, r1, #2080374784 4309 0442 CEE7 b .L278 4310 .LVL379: 4311 .L311: 4312 .LBB437: 4313 .LBB436: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4314 .loc 3 1091 12 view .LVU1379 4315 0444 2021 movs r1, #32 4316 .LVL380: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4317 .loc 3 1091 12 view .LVU1380 4318 0446 F8E7 b .L279 4319 .LVL381: 4320 .L280: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4321 .loc 3 1091 12 view .LVU1381 4322 .LBE436: 4323 .LBE437: 4324 .LBB438: 4325 .LBI438: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4326 .loc 3 1048 31 is_stmt 1 view .LVU1382 4327 .LBB439: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4328 .loc 3 1050 3 view .LVU1383 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4329 .loc 3 1055 4 view .LVU1384 4330 .syntax unified 4331 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4332 0448 93FAA3F2 rbit r2, r3 ARM GAS /tmp/ccrO2eGa.s page 285 4333 @ 0 "" 2 4334 .LVL382: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4335 .loc 3 1068 3 view .LVU1385 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4336 .loc 3 1068 3 is_stmt 0 view .LVU1386 4337 .thumb 4338 .syntax unified 4339 .LBE439: 4340 .LBE438: 4341 .LBB440: 4342 .LBI440: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4343 .loc 3 1078 30 is_stmt 1 view .LVU1387 4344 .LBB441: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4345 .loc 3 1089 3 view .LVU1388 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4346 .loc 3 1089 6 is_stmt 0 view .LVU1389 4347 044c 4AB1 cbz r2, .L312 4348 .loc 3 1093 3 is_stmt 1 view .LVU1390 4349 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1391 4350 044e B2FA82F2 clz r2, r2 4351 .LVL383: 4352 .L282: 4353 .loc 3 1093 10 discriminator 1 view .LVU1392 4354 .LBE441: 4355 .LBE440: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4356 .loc 1 2025 48 discriminator 2 view .LVU1393 4357 0452 0132 adds r2, r2, #1 4358 0454 02F01F02 and r2, r2, #31 4359 0458 4FF0010C mov ip, #1 4360 045c 0CFA02F2 lsl r2, ip, r2 4361 0460 C9E7 b .L281 4362 .LVL384: 4363 .L312: 4364 .LBB443: 4365 .LBB442: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4366 .loc 3 1091 12 view .LVU1394 4367 0462 2022 movs r2, #32 4368 .LVL385: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4369 .loc 3 1091 12 view .LVU1395 4370 0464 F5E7 b .L282 4371 .LVL386: 4372 .L283: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4373 .loc 3 1091 12 view .LVU1396 4374 .LBE442: 4375 .LBE443: 4376 .LBB444: 4377 .LBI444: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4378 .loc 3 1048 31 is_stmt 1 view .LVU1397 4379 .LBB445: ARM GAS /tmp/ccrO2eGa.s page 286 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4380 .loc 3 1050 3 view .LVU1398 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4381 .loc 3 1055 4 view .LVU1399 4382 .syntax unified 4383 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4384 0466 93FAA3F3 rbit r3, r3 4385 @ 0 "" 2 4386 .LVL387: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4387 .loc 3 1068 3 view .LVU1400 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4388 .loc 3 1068 3 is_stmt 0 view .LVU1401 4389 .thumb 4390 .syntax unified 4391 .LBE445: 4392 .LBE444: 4393 .LBB446: 4394 .LBI446: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4395 .loc 3 1078 30 is_stmt 1 view .LVU1402 4396 .LBB447: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4397 .loc 3 1089 3 view .LVU1403 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4398 .loc 3 1089 6 is_stmt 0 view .LVU1404 4399 046a 43B1 cbz r3, .L313 4400 .loc 3 1093 3 is_stmt 1 view .LVU1405 4401 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1406 4402 046c B3FA83F3 clz r3, r3 4403 .LVL388: 4404 .L285: 4405 .loc 3 1093 10 discriminator 1 view .LVU1407 4406 .LBE447: 4407 .LBE446: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4408 .loc 1 2025 48 discriminator 2 view .LVU1408 4409 0470 0133 adds r3, r3, #1 4410 0472 03F01F03 and r3, r3, #31 4411 0476 03EB4303 add r3, r3, r3, lsl #1 4412 047a 1B05 lsls r3, r3, #20 4413 047c C4E7 b .L284 4414 .LVL389: 4415 .L313: 4416 .LBB449: 4417 .LBB448: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4418 .loc 3 1091 12 view .LVU1409 4419 047e 2023 movs r3, #32 4420 .LVL390: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4421 .loc 3 1091 12 view .LVU1410 4422 0480 F6E7 b .L285 4423 .LVL391: 4424 .L276: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4425 .loc 3 1091 12 view .LVU1411 ARM GAS /tmp/ccrO2eGa.s page 287 4426 .LBE448: 4427 .LBE449: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4428 .loc 1 2025 48 view .LVU1412 4429 0482 E7B9 cbnz r7, .L287 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4430 .loc 1 2025 48 discriminator 13 view .LVU1413 4431 0484 990E lsrs r1, r3, #26 4432 0486 0131 adds r1, r1, #1 4433 0488 8906 lsls r1, r1, #26 4434 048a 01F0F841 and r1, r1, #2080374784 4435 .L288: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4436 .loc 1 2025 48 discriminator 16 view .LVU1414 4437 048e 17BB cbnz r7, .L290 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4438 .loc 1 2025 48 discriminator 17 view .LVU1415 4439 0490 4FEA936C lsr ip, r3, #26 4440 0494 0CF1010C add ip, ip, #1 4441 0498 0CF01F0C and ip, ip, #31 4442 049c 0122 movs r2, #1 4443 049e 02FA0CF2 lsl r2, r2, ip 4444 .L291: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4445 .loc 1 2025 48 discriminator 20 view .LVU1416 4446 04a2 1143 orrs r1, r1, r2 4447 04a4 37BB cbnz r7, .L293 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4448 .loc 1 2025 48 discriminator 21 view .LVU1417 4449 04a6 9B0E lsrs r3, r3, #26 4450 04a8 0133 adds r3, r3, #1 4451 04aa 03F01F03 and r3, r3, #31 4452 04ae 03EB4303 add r3, r3, r3, lsl #1 4453 04b2 1E3B subs r3, r3, #30 4454 04b4 1B05 lsls r3, r3, #20 4455 04b6 43F00073 orr r3, r3, #33554432 4456 .L294: 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL( 4457 .loc 1 2024 7 discriminator 2 view .LVU1418 4458 04ba 1943 orrs r1, r1, r3 4459 04bc A5E7 b .L286 4460 .L287: 4461 .LVL392: 4462 .LBB450: 4463 .LBI450: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4464 .loc 3 1048 31 is_stmt 1 view .LVU1419 4465 .LBB451: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4466 .loc 3 1050 3 view .LVU1420 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4467 .loc 3 1055 4 view .LVU1421 4468 .syntax unified 4469 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4470 04be 93FAA3F1 rbit r1, r3 4471 @ 0 "" 2 4472 .LVL393: ARM GAS /tmp/ccrO2eGa.s page 288 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4473 .loc 3 1068 3 view .LVU1422 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4474 .loc 3 1068 3 is_stmt 0 view .LVU1423 4475 .thumb 4476 .syntax unified 4477 .LBE451: 4478 .LBE450: 4479 .LBB452: 4480 .LBI452: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4481 .loc 3 1078 30 is_stmt 1 view .LVU1424 4482 .LBB453: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4483 .loc 3 1089 3 view .LVU1425 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4484 .loc 3 1089 6 is_stmt 0 view .LVU1426 4485 04c2 31B1 cbz r1, .L314 4486 .loc 3 1093 3 is_stmt 1 view .LVU1427 4487 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1428 4488 04c4 B1FA81F1 clz r1, r1 4489 .LVL394: 4490 .L289: 4491 .loc 3 1093 10 discriminator 1 view .LVU1429 4492 .LBE453: 4493 .LBE452: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4494 .loc 1 2025 48 discriminator 2 view .LVU1430 4495 04c8 0131 adds r1, r1, #1 4496 04ca 8906 lsls r1, r1, #26 4497 04cc 01F0F841 and r1, r1, #2080374784 4498 04d0 DDE7 b .L288 4499 .LVL395: 4500 .L314: 4501 .LBB455: 4502 .LBB454: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4503 .loc 3 1091 12 view .LVU1431 4504 04d2 2021 movs r1, #32 4505 .LVL396: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4506 .loc 3 1091 12 view .LVU1432 4507 04d4 F8E7 b .L289 4508 .LVL397: 4509 .L290: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4510 .loc 3 1091 12 view .LVU1433 4511 .LBE454: 4512 .LBE455: 4513 .LBB456: 4514 .LBI456: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4515 .loc 3 1048 31 is_stmt 1 view .LVU1434 4516 .LBB457: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4517 .loc 3 1050 3 view .LVU1435 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else ARM GAS /tmp/ccrO2eGa.s page 289 4518 .loc 3 1055 4 view .LVU1436 4519 .syntax unified 4520 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4521 04d6 93FAA3F2 rbit r2, r3 4522 @ 0 "" 2 4523 .LVL398: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4524 .loc 3 1068 3 view .LVU1437 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4525 .loc 3 1068 3 is_stmt 0 view .LVU1438 4526 .thumb 4527 .syntax unified 4528 .LBE457: 4529 .LBE456: 4530 .LBB458: 4531 .LBI458: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4532 .loc 3 1078 30 is_stmt 1 view .LVU1439 4533 .LBB459: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4534 .loc 3 1089 3 view .LVU1440 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4535 .loc 3 1089 6 is_stmt 0 view .LVU1441 4536 04da 4AB1 cbz r2, .L315 4537 .loc 3 1093 3 is_stmt 1 view .LVU1442 4538 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1443 4539 04dc B2FA82F2 clz r2, r2 4540 .LVL399: 4541 .L292: 4542 .loc 3 1093 10 discriminator 1 view .LVU1444 4543 .LBE459: 4544 .LBE458: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4545 .loc 1 2025 48 discriminator 2 view .LVU1445 4546 04e0 0132 adds r2, r2, #1 4547 04e2 02F01F02 and r2, r2, #31 4548 04e6 4FF0010C mov ip, #1 4549 04ea 0CFA02F2 lsl r2, ip, r2 4550 04ee D8E7 b .L291 4551 .LVL400: 4552 .L315: 4553 .LBB461: 4554 .LBB460: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4555 .loc 3 1091 12 view .LVU1446 4556 04f0 2022 movs r2, #32 4557 .LVL401: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4558 .loc 3 1091 12 view .LVU1447 4559 04f2 F5E7 b .L292 4560 .LVL402: 4561 .L293: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4562 .loc 3 1091 12 view .LVU1448 4563 .LBE460: 4564 .LBE461: 4565 .LBB462: ARM GAS /tmp/ccrO2eGa.s page 290 4566 .LBI462: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4567 .loc 3 1048 31 is_stmt 1 view .LVU1449 4568 .LBB463: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4569 .loc 3 1050 3 view .LVU1450 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4570 .loc 3 1055 4 view .LVU1451 4571 .syntax unified 4572 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4573 04f4 93FAA3F3 rbit r3, r3 4574 @ 0 "" 2 4575 .LVL403: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4576 .loc 3 1068 3 view .LVU1452 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4577 .loc 3 1068 3 is_stmt 0 view .LVU1453 4578 .thumb 4579 .syntax unified 4580 .LBE463: 4581 .LBE462: 4582 .LBB464: 4583 .LBI464: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4584 .loc 3 1078 30 is_stmt 1 view .LVU1454 4585 .LBB465: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4586 .loc 3 1089 3 view .LVU1455 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4587 .loc 3 1089 6 is_stmt 0 view .LVU1456 4588 04f8 5BB1 cbz r3, .L316 4589 .loc 3 1093 3 is_stmt 1 view .LVU1457 4590 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1458 4591 04fa B3FA83F3 clz r3, r3 4592 .LVL404: 4593 .L295: 4594 .loc 3 1093 10 discriminator 1 view .LVU1459 4595 .LBE465: 4596 .LBE464: 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (__LL_ADC_CHANNEL_TO_DECIMAL_NB( 4597 .loc 1 2025 48 discriminator 2 view .LVU1460 4598 04fe 0133 adds r3, r3, #1 4599 0500 03F01F03 and r3, r3, #31 4600 0504 03EB4303 add r3, r3, r3, lsl #1 4601 0508 1E3B subs r3, r3, #30 4602 050a 1B05 lsls r3, r3, #20 4603 050c 43F00073 orr r3, r3, #33554432 4604 0510 D3E7 b .L294 4605 .LVL405: 4606 .L316: 4607 .LBB467: 4608 .LBB466: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4609 .loc 3 1091 12 view .LVU1461 4610 0512 2023 movs r3, #32 4611 .LVL406: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccrO2eGa.s page 291 4612 .loc 3 1091 12 view .LVU1462 4613 0514 F3E7 b .L295 4614 .LVL407: 4615 .L297: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4616 .loc 3 1091 12 view .LVU1463 4617 .LBE466: 4618 .LBE467: 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4619 .loc 1 2048 9 view .LVU1464 4620 0516 12F4000F tst r2, #8388608 4621 051a 7FF42BAF bne .L298 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4622 .loc 1 2050 7 is_stmt 1 view .LVU1465 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4623 .loc 1 2050 11 is_stmt 0 view .LVU1466 4624 051e 2368 ldr r3, [r4] 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4625 .loc 1 2050 10 view .LVU1467 4626 0520 B3F1A04F cmp r3, #1342177280 4627 0524 7FF42EAF bne .L296 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channe 4628 .loc 1 2052 9 is_stmt 1 view .LVU1468 4629 0528 41F40001 orr r1, r1, #8388608 4630 .LVL408: 4631 .LBB468: 4632 .LBI468: 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4633 .loc 2 3744 22 view .LVU1469 4634 .LBB469: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4635 .loc 2 3746 3 view .LVU1470 4636 052c 1F4A ldr r2, .L332 4637 .LVL409: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4638 .loc 2 3746 3 is_stmt 0 view .LVU1471 4639 052e 9368 ldr r3, [r2, #8] 4640 0530 23F0E073 bic r3, r3, #29360128 4641 0534 1943 orrs r1, r1, r3 4642 .LVL410: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4643 .loc 2 3746 3 view .LVU1472 4644 0536 9160 str r1, [r2, #8] 4645 .LVL411: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4646 .loc 2 3746 3 view .LVU1473 4647 .LBE469: 4648 .LBE468: 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (((SystemCoreClock / (100000UL * 2UL)) + 1UL) + 1UL)); 4649 .loc 1 2060 9 is_stmt 1 view .LVU1474 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4650 .loc 1 2061 49 is_stmt 0 view .LVU1475 4651 0538 1D4B ldr r3, .L332+4 4652 053a 1B68 ldr r3, [r3] 4653 053c 9B09 lsrs r3, r3, #6 4654 053e 1D4A ldr r2, .L332+8 4655 0540 A2FB0323 umull r2, r3, r2, r3 ARM GAS /tmp/ccrO2eGa.s page 292 4656 0544 9B09 lsrs r3, r3, #6 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4657 .loc 1 2061 28 view .LVU1476 4658 0546 03EB4303 add r3, r3, r3, lsl #1 4659 054a 9B00 lsls r3, r3, #2 4660 054c 1833 adds r3, r3, #24 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (((SystemCoreClock / (100000UL * 2UL)) + 1UL) + 1UL)); 4661 .loc 1 2060 25 view .LVU1477 4662 054e 0193 str r3, [sp, #4] 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4663 .loc 1 2062 9 is_stmt 1 view .LVU1478 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4664 .loc 1 2062 15 is_stmt 0 view .LVU1479 4665 0550 02E0 b .L299 4666 .L300: 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4667 .loc 1 2064 11 is_stmt 1 view .LVU1480 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4668 .loc 1 2064 26 is_stmt 0 view .LVU1481 4669 0552 019B ldr r3, [sp, #4] 4670 0554 013B subs r3, r3, #1 4671 0556 0193 str r3, [sp, #4] 4672 .L299: 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4673 .loc 1 2062 32 is_stmt 1 view .LVU1482 4674 0558 019B ldr r3, [sp, #4] 4675 055a 002B cmp r3, #0 4676 055c F9D1 bne .L300 4677 055e 11E7 b .L296 4678 .LVL412: 4679 .L328: 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4680 .loc 1 2069 14 is_stmt 0 view .LVU1483 4681 0560 12F0807F tst r2, #16777216 4682 0564 7FF40AAF bne .L301 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4683 .loc 1 2071 7 is_stmt 1 view .LVU1484 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4684 .loc 1 2071 11 is_stmt 0 view .LVU1485 4685 0568 2268 ldr r2, [r4] 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4686 .loc 1 2071 10 view .LVU1486 4687 056a 134B ldr r3, .L332+12 4688 056c 9A42 cmp r2, r3 4689 056e 3FF409AF beq .L296 2073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 4690 .loc 1 2073 9 is_stmt 1 view .LVU1487 4691 0572 41F08071 orr r1, r1, #16777216 4692 .LVL413: 4693 .LBB470: 4694 .LBI470: 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4695 .loc 2 3744 22 view .LVU1488 4696 .LBB471: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4697 .loc 2 3746 3 view .LVU1489 4698 0576 0D4A ldr r2, .L332 ARM GAS /tmp/ccrO2eGa.s page 293 4699 0578 9368 ldr r3, [r2, #8] 4700 057a 23F0E073 bic r3, r3, #29360128 4701 057e 1943 orrs r1, r1, r3 4702 .LVL414: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4703 .loc 2 3746 3 is_stmt 0 view .LVU1490 4704 0580 9160 str r1, [r2, #8] 4705 .LVL415: 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4706 .loc 2 3747 1 view .LVU1491 4707 0582 FFE6 b .L296 4708 .LVL416: 4709 .L329: 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4710 .loc 2 3747 1 view .LVU1492 4711 .LBE471: 4712 .LBE470: 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4713 .loc 1 2078 14 view .LVU1493 4714 0584 12F4800F tst r2, #4194304 4715 0588 7FF4FCAE bne .L296 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4716 .loc 1 2080 7 is_stmt 1 view .LVU1494 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4717 .loc 1 2080 11 is_stmt 0 view .LVU1495 4718 058c 2268 ldr r2, [r4] 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4719 .loc 1 2080 10 view .LVU1496 4720 058e 0A4B ldr r3, .L332+12 4721 0590 9A42 cmp r2, r3 4722 0592 3FF4F7AE beq .L296 2082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); 4723 .loc 1 2082 9 is_stmt 1 view .LVU1497 4724 0596 41F48001 orr r1, r1, #4194304 4725 .LVL417: 4726 .LBB472: 4727 .LBI472: 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4728 .loc 2 3744 22 view .LVU1498 4729 .LBB473: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4730 .loc 2 3746 3 view .LVU1499 4731 059a 044A ldr r2, .L332 4732 059c 9368 ldr r3, [r2, #8] 4733 059e 23F0E073 bic r3, r3, #29360128 4734 05a2 1943 orrs r1, r1, r3 4735 .LVL418: 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4736 .loc 2 3746 3 is_stmt 0 view .LVU1500 4737 05a4 9160 str r1, [r2, #8] 4738 .LVL419: 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4739 .loc 2 3747 1 view .LVU1501 4740 05a6 EDE6 b .L296 4741 .LVL420: 4742 .L302: 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/ccrO2eGa.s page 294 4743 .loc 2 3747 1 view .LVU1502 4744 .LBE473: 4745 .LBE472: 1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4746 .loc 1 1716 3 discriminator 1 view .LVU1503 4747 05a8 0226 movs r6, #2 4748 05aa EEE6 b .L233 4749 .L333: 4750 .align 2 4751 .L332: 4752 05ac 00030050 .word 1342178048 4753 05b0 00000000 .word SystemCoreClock 4754 05b4 632D3E05 .word 87960931 4755 05b8 00010050 .word 1342177536 4756 .cfi_endproc 4757 .LFE350: 4759 .section .text.HAL_ADCEx_MultiModeConfigChannel,"ax",%progbits 4760 .align 1 4761 .global HAL_ADCEx_MultiModeConfigChannel 4762 .syntax unified 4763 .thumb 4764 .thumb_func 4766 HAL_ADCEx_MultiModeConfigChannel: 4767 .LVL421: 4768 .LFB351: 2098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC multimode and configure multimode parameters 2102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes multimode parameters, following 2104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calls to this function can be used to reconfigure some parameters 2105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * of structure "ADC_MultiModeTypeDef" on the fly, without resetting 2106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * the ADCs. 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state. 2108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For parameters constraints, see comments of structure 2109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_MultiModeTypeDef". 2110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To move back configuration from multimode to single mode, ADC must 2111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be reset (using function HAL_ADC_Init() ). 2112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc Master ADC handle 2113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param pMultimode Structure of ADC multimode configuration 2114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, const ADC_MultiModeType 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4769 .loc 1 2117 1 is_stmt 1 view -0 4770 .cfi_startproc 4771 @ args = 0, pretend = 0, frame = 112 4772 @ frame_needed = 0, uses_anonymous_args = 0 4773 @ link register save eliminated. 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4774 .loc 1 2118 3 view .LVU1505 2119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 4775 .loc 1 2119 3 view .LVU1506 2120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmp_hadc_slave; 4776 .loc 1 2120 3 view .LVU1507 2121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_hadc_slave_conversion_on_going; ARM GAS /tmp/ccrO2eGa.s page 295 4777 .loc 1 2121 3 view .LVU1508 2122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 4778 .loc 1 2124 3 view .LVU1509 2125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE(pMultimode->Mode)); 4779 .loc 1 2125 3 view .LVU1510 2126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pMultimode->Mode != ADC_MODE_INDEPENDENT) 4780 .loc 1 2126 3 view .LVU1511 2127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(pMultimode->DMAAccessMode)); 4781 .loc 1 2128 5 view .LVU1512 2129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLING_DELAY(pMultimode->TwoSamplingDelay)); 4782 .loc 1 2129 5 view .LVU1513 2130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 4783 .loc 1 2133 3 view .LVU1514 4784 .loc 1 2133 3 view .LVU1515 4785 0000 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 4786 0004 012A cmp r2, #1 4787 0006 00F08180 beq .L345 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4788 .loc 1 2117 1 is_stmt 0 view .LVU1516 4789 000a 10B4 push {r4} 4790 .LCFI36: 4791 .cfi_def_cfa_offset 4 4792 .cfi_offset 4, -4 4793 000c 9DB0 sub sp, sp, #116 4794 .LCFI37: 4795 .cfi_def_cfa_offset 120 4796 000e 0346 mov r3, r0 4797 .loc 1 2133 3 is_stmt 1 discriminator 2 view .LVU1517 4798 0010 0122 movs r2, #1 4799 0012 80F85820 strb r2, [r0, #88] 4800 .loc 1 2133 3 view .LVU1518 2134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave); 4801 .loc 1 2136 3 view .LVU1519 4802 0016 0022 movs r2, #0 4803 0018 1892 str r2, [sp, #96] 2137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmp_hadc_slave); 4804 .loc 1 2137 3 view .LVU1520 4805 001a 1992 str r2, [sp, #100] 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave); 4806 .loc 1 2139 3 view .LVU1521 4807 001c 0068 ldr r0, [r0] 4808 .LVL422: 4809 .loc 1 2139 3 is_stmt 0 view .LVU1522 4810 001e B0F1A04F cmp r0, #1342177280 4811 0022 38D0 beq .L354 4812 .loc 1 2139 3 discriminator 2 view .LVU1523 4813 0024 0022 movs r2, #0 4814 0026 0192 str r2, [sp, #4] ARM GAS /tmp/ccrO2eGa.s page 296 4815 .L337: 2140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hadc_slave.Instance == NULL) 4816 .loc 1 2141 3 is_stmt 1 view .LVU1524 4817 .loc 1 2141 21 is_stmt 0 view .LVU1525 4818 0028 019A ldr r2, [sp, #4] 4819 .loc 1 2141 6 view .LVU1526 4820 002a 002A cmp r2, #0 4821 002c 36D0 beq .L355 2142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 2144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 2145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 2150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 2154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular group: */ 2155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA configuration */ 2156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA mode */ 2157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance); 4822 .loc 1 2157 3 is_stmt 1 view .LVU1527 4823 .LVL423: 4824 .LBB474: 4825 .LBI474: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4826 .loc 2 7866 26 view .LVU1528 4827 .LBB475: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4828 .loc 2 7868 3 view .LVU1529 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4829 .loc 2 7868 12 is_stmt 0 view .LVU1530 4830 002e 9268 ldr r2, [r2, #8] 4831 .LVL424: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4832 .loc 2 7868 74 view .LVU1531 4833 0030 12F00402 ands r2, r2, #4 4834 0034 00D0 beq .L339 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4835 .loc 2 7868 74 discriminator 1 view .LVU1532 4836 0036 0122 movs r2, #1 4837 .L339: 4838 .LVL425: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4839 .loc 2 7868 74 discriminator 1 view .LVU1533 4840 .LBE475: 4841 .LBE474: 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 4842 .loc 1 2158 3 is_stmt 1 view .LVU1534 4843 .LBB476: 4844 .LBI476: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4845 .loc 2 7866 26 view .LVU1535 ARM GAS /tmp/ccrO2eGa.s page 297 4846 .LBB477: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4847 .loc 2 7868 3 view .LVU1536 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4848 .loc 2 7868 12 is_stmt 0 view .LVU1537 4849 0038 8068 ldr r0, [r0, #8] 4850 .LVL426: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4851 .loc 2 7868 74 view .LVU1538 4852 003a 10F0040F tst r0, #4 4853 003e 51D1 bne .L340 4854 .LVL427: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4855 .loc 2 7868 74 view .LVU1539 4856 .LBE477: 4857 .LBE476: 2159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_hadc_slave_conversion_on_going == 0UL)) 4858 .loc 1 2159 7 view .LVU1540 4859 0040 002A cmp r2, #0 4860 0042 4FD1 bne .L340 2160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 2162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 4861 .loc 1 2162 5 is_stmt 1 view .LVU1541 4862 .LVL428: 2163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If multimode is selected, configure all multimode parameters. */ 2165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Otherwise, reset multimode parameters (can be used in case of */ 2166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* transition from multimode to independent mode). */ 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (pMultimode->Mode != ADC_MODE_INDEPENDENT) 4863 .loc 1 2167 5 view .LVU1542 4864 .loc 1 2167 19 is_stmt 0 view .LVU1543 4865 0044 0A68 ldr r2, [r1] 4866 .LVL429: 4867 .loc 1 2167 8 view .LVU1544 4868 0046 002A cmp r2, #0 4869 0048 31D0 beq .L341 2168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, 4870 .loc 1 2169 7 is_stmt 1 view .LVU1545 4871 004a 314C ldr r4, .L356 4872 004c A268 ldr r2, [r4, #8] 4873 004e 22F46042 bic r2, r2, #57344 4874 0052 4868 ldr r0, [r1, #4] 4875 0054 93F838C0 ldrb ip, [r3, #56] @ zero_extendqisi2 4876 0058 40EA4C30 orr r0, r0, ip, lsl #13 4877 005c 0243 orrs r2, r2, r0 4878 005e A260 str r2, [r4, #8] 2170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pMultimode->DMAAccessMode | 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); 2172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Delay range depends on selected resolution: */ 2177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 12 clock cycles for 12 bits */ 2178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 10 clock cycles for 10 bits, */ ARM GAS /tmp/ccrO2eGa.s page 298 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 8 clock cycles for 8 bits */ 2180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 6 clock cycles for 6 bits */ 2181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If a higher delay is selected, it will be clipped to maximum delay */ 2182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* range */ 2183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 4879 .loc 1 2183 7 view .LVU1546 4880 .LVL430: 4881 .LBB478: 4882 .LBI478: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4883 .loc 2 7744 26 view .LVU1547 4884 .LBB479: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4885 .loc 2 7746 3 view .LVU1548 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4886 .loc 2 7746 12 is_stmt 0 view .LVU1549 4887 0060 4FF0A042 mov r2, #1342177280 4888 0064 9268 ldr r2, [r2, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4889 .loc 2 7746 68 view .LVU1550 4890 0066 12F00102 ands r2, r2, #1 4891 006a 00D0 beq .L342 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4892 .loc 2 7746 68 discriminator 1 view .LVU1551 4893 006c 0122 movs r2, #1 4894 .L342: 4895 .LVL431: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4896 .loc 2 7746 68 discriminator 1 view .LVU1552 4897 .LBE479: 4898 .LBE478: 4899 .LBB480: 4900 .LBI480: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4901 .loc 2 7744 26 is_stmt 1 view .LVU1553 4902 .LBB481: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4903 .loc 2 7746 3 view .LVU1554 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4904 .loc 2 7746 12 is_stmt 0 view .LVU1555 4905 006e 2948 ldr r0, .L356+4 4906 0070 8068 ldr r0, [r0, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4907 .loc 2 7746 68 view .LVU1556 4908 0072 10F0010F tst r0, #1 4909 0076 41D1 bne .L346 4910 .LVL432: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4911 .loc 2 7746 68 view .LVU1557 4912 .LBE481: 4913 .LBE480: 4914 .loc 1 2183 10 discriminator 2 view .LVU1558 4915 0078 002A cmp r2, #0 4916 007a 41D1 bne .L347 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, 4917 .loc 1 2185 9 is_stmt 1 view .LVU1559 ARM GAS /tmp/ccrO2eGa.s page 299 4918 007c 244C ldr r4, .L356 4919 007e A268 ldr r2, [r4, #8] 4920 0080 22F47162 bic r2, r2, #3856 4921 0084 22F00F02 bic r2, r2, #15 4922 0088 0868 ldr r0, [r1] 4923 008a 8968 ldr r1, [r1, #8] 4924 .LVL433: 4925 .loc 1 2185 9 is_stmt 0 view .LVU1560 4926 008c 0143 orrs r1, r1, r0 4927 008e 0A43 orrs r2, r2, r1 4928 0090 A260 str r2, [r4, #8] 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 4929 .loc 1 2118 21 view .LVU1561 4930 0092 0020 movs r0, #0 4931 0094 2BE0 b .L343 4932 .LVL434: 4933 .L354: 2139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4934 .loc 1 2139 3 discriminator 1 view .LVU1562 4935 0096 1F4A ldr r2, .L356+4 4936 0098 0192 str r2, [sp, #4] 4937 009a C5E7 b .L337 4938 .L355: 2144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4939 .loc 1 2144 5 is_stmt 1 view .LVU1563 4940 009c DA6D ldr r2, [r3, #92] 4941 009e 42F02002 orr r2, r2, #32 4942 00a2 DA65 str r2, [r3, #92] 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4943 .loc 1 2147 5 view .LVU1564 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4944 .loc 1 2147 5 view .LVU1565 4945 00a4 0022 movs r2, #0 4946 00a6 83F85820 strb r2, [r3, #88] 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4947 .loc 1 2147 5 view .LVU1566 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4948 .loc 1 2149 5 view .LVU1567 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4949 .loc 1 2149 12 is_stmt 0 view .LVU1568 4950 00aa 0120 movs r0, #1 4951 00ac 22E0 b .L335 4952 .LVL435: 4953 .L341: 2186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DUAL | 2187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DELAY, 2188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pMultimode->Mode | 2189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** pMultimode->TwoSamplingDelay 2190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 2191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* ADC_MODE_INDEPENDENT */ 2194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG); 4954 .loc 1 2195 7 is_stmt 1 view .LVU1569 4955 00ae 1849 ldr r1, .L356 4956 .LVL436: ARM GAS /tmp/ccrO2eGa.s page 300 4957 .loc 1 2195 7 is_stmt 0 view .LVU1570 4958 00b0 8A68 ldr r2, [r1, #8] 4959 00b2 22F46042 bic r2, r2, #57344 4960 00b6 8A60 str r2, [r1, #8] 2196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 4961 .loc 1 2200 7 is_stmt 1 view .LVU1571 4962 .LVL437: 4963 .LBB482: 4964 .LBI482: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4965 .loc 2 7744 26 view .LVU1572 4966 .LBB483: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4967 .loc 2 7746 3 view .LVU1573 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4968 .loc 2 7746 12 is_stmt 0 view .LVU1574 4969 00b8 4FF0A042 mov r2, #1342177280 4970 00bc 9268 ldr r2, [r2, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4971 .loc 2 7746 68 view .LVU1575 4972 00be 12F00102 ands r2, r2, #1 4973 00c2 00D0 beq .L344 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4974 .loc 2 7746 68 discriminator 1 view .LVU1576 4975 00c4 0122 movs r2, #1 4976 .L344: 4977 .LVL438: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4978 .loc 2 7746 68 discriminator 1 view .LVU1577 4979 .LBE483: 4980 .LBE482: 4981 .LBB484: 4982 .LBI484: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4983 .loc 2 7744 26 is_stmt 1 view .LVU1578 4984 .LBB485: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4985 .loc 2 7746 3 view .LVU1579 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4986 .loc 2 7746 12 is_stmt 0 view .LVU1580 4987 00c6 1349 ldr r1, .L356+4 4988 00c8 8968 ldr r1, [r1, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4989 .loc 2 7746 68 view .LVU1581 4990 00ca 11F0010F tst r1, #1 4991 00ce 19D1 bne .L348 4992 .LVL439: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4993 .loc 2 7746 68 view .LVU1582 4994 .LBE485: 4995 .LBE484: 4996 .loc 1 2200 10 discriminator 2 view .LVU1583 4997 00d0 D2B9 cbnz r2, .L349 ARM GAS /tmp/ccrO2eGa.s page 301 2201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY); 4998 .loc 1 2202 9 is_stmt 1 view .LVU1584 4999 00d2 0F49 ldr r1, .L356 5000 00d4 8A68 ldr r2, [r1, #8] 5001 00d6 22F47162 bic r2, r2, #3856 5002 00da 22F00F02 bic r2, r2, #15 5003 00de 8A60 str r2, [r1, #8] 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5004 .loc 1 2118 21 is_stmt 0 view .LVU1585 5005 00e0 0020 movs r0, #0 5006 00e2 04E0 b .L343 5007 .LVL440: 5008 .L340: 2203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If one of the ADC sharing the same common group is enabled, no update */ 2207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* could be done on neither of the multimode structure parameters. */ 2208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 2211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 5009 .loc 1 2211 5 is_stmt 1 view .LVU1586 5010 00e4 DA6D ldr r2, [r3, #92] 5011 .LVL441: 5012 .loc 1 2211 5 is_stmt 0 view .LVU1587 5013 00e6 42F02002 orr r2, r2, #32 5014 00ea DA65 str r2, [r3, #92] 2212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5015 .loc 1 2213 5 is_stmt 1 view .LVU1588 5016 .LVL442: 5017 .loc 1 2213 20 is_stmt 0 view .LVU1589 5018 00ec 0120 movs r0, #1 5019 .LVL443: 5020 .L343: 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 5021 .loc 1 2217 3 is_stmt 1 view .LVU1590 5022 .loc 1 2217 3 view .LVU1591 5023 00ee 0022 movs r2, #0 5024 00f0 83F85820 strb r2, [r3, #88] 5025 .loc 1 2217 3 view .LVU1592 2218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5026 .loc 1 2220 3 view .LVU1593 5027 .LVL444: 5028 .L335: 2221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5029 .loc 1 2221 1 is_stmt 0 view .LVU1594 5030 00f4 1DB0 add sp, sp, #116 5031 .LCFI38: 5032 .cfi_remember_state ARM GAS /tmp/ccrO2eGa.s page 302 5033 .cfi_def_cfa_offset 4 5034 @ sp needed 5035 00f6 5DF8044B ldr r4, [sp], #4 5036 .LCFI39: 5037 .cfi_restore 4 5038 .cfi_def_cfa_offset 0 5039 00fa 7047 bx lr 5040 .LVL445: 5041 .L346: 5042 .LCFI40: 5043 .cfi_restore_state 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5044 .loc 1 2118 21 view .LVU1595 5045 00fc 0020 movs r0, #0 5046 00fe F6E7 b .L343 5047 .LVL446: 5048 .L347: 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5049 .loc 1 2118 21 view .LVU1596 5050 0100 0020 movs r0, #0 5051 0102 F4E7 b .L343 5052 .LVL447: 5053 .L348: 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5054 .loc 1 2118 21 view .LVU1597 5055 0104 0020 movs r0, #0 5056 0106 F2E7 b .L343 5057 .LVL448: 5058 .L349: 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5059 .loc 1 2118 21 view .LVU1598 5060 0108 0020 movs r0, #0 5061 010a F0E7 b .L343 5062 .LVL449: 5063 .L345: 5064 .LCFI41: 5065 .cfi_def_cfa_offset 0 5066 .cfi_restore 4 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 5067 .loc 1 2133 3 discriminator 1 view .LVU1599 5068 010c 0220 movs r0, #2 5069 .LVL450: 5070 .loc 1 2221 1 view .LVU1600 5071 010e 7047 bx lr 5072 .L357: 5073 .align 2 5074 .L356: 5075 0110 00030050 .word 1342178048 5076 0114 00010050 .word 1342177536 5077 .cfi_endproc 5078 .LFE351: 5080 .section .text.HAL_ADCEx_EnableInjectedQueue,"ax",%progbits 5081 .align 1 5082 .global HAL_ADCEx_EnableInjectedQueue 5083 .syntax unified 5084 .thumb 5085 .thumb_func ARM GAS /tmp/ccrO2eGa.s page 303 5087 HAL_ADCEx_EnableInjectedQueue: 5088 .LVL451: 5089 .LFB352: 2222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 2223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable Injected Queue 2226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function resets CFGR register JQDIS bit in order to enable the 2227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc) 2234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5090 .loc 1 2234 1 is_stmt 1 view -0 5091 .cfi_startproc 5092 @ args = 0, pretend = 0, frame = 0 5093 @ frame_needed = 0, uses_anonymous_args = 0 5094 @ link register save eliminated. 2235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5095 .loc 1 2235 3 view .LVU1602 2236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 5096 .loc 1 2236 3 view .LVU1603 2237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 5097 .loc 1 2237 3 view .LVU1604 2238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5098 .loc 1 2240 3 view .LVU1605 2241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 5099 .loc 1 2242 3 view .LVU1606 5100 .loc 1 2242 79 is_stmt 0 view .LVU1607 5101 0000 0168 ldr r1, [r0] 5102 .LVL452: 5103 .LBB486: 5104 .LBI486: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5105 .loc 2 7866 26 is_stmt 1 view .LVU1608 5106 .LBB487: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5107 .loc 2 7868 3 view .LVU1609 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5108 .loc 2 7868 12 is_stmt 0 view .LVU1610 5109 0002 8B68 ldr r3, [r1, #8] 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5110 .loc 2 7868 74 view .LVU1611 5111 0004 13F00403 ands r3, r3, #4 5112 0008 00D0 beq .L359 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5113 .loc 2 7868 74 discriminator 1 view .LVU1612 5114 000a 0123 movs r3, #1 5115 .L359: 5116 .LVL453: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/ccrO2eGa.s page 304 5117 .loc 2 7868 74 discriminator 1 view .LVU1613 5118 .LBE487: 5119 .LBE486: 2243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 5120 .loc 1 2243 3 is_stmt 1 view .LVU1614 5121 .LBB488: 5122 .LBI488: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5123 .loc 2 8092 26 view .LVU1615 5124 .LBB489: 5125 .loc 2 8094 3 view .LVU1616 5126 .loc 2 8094 12 is_stmt 0 view .LVU1617 5127 000c 8A68 ldr r2, [r1, #8] 5128 .loc 2 8094 76 view .LVU1618 5129 000e 12F00802 ands r2, r2, #8 5130 0012 00D0 beq .L360 5131 .loc 2 8094 76 discriminator 1 view .LVU1619 5132 0014 0122 movs r2, #1 5133 .L360: 5134 .LVL454: 5135 .loc 2 8094 76 discriminator 1 view .LVU1620 5136 .LBE489: 5137 .LBE488: 2244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 5138 .loc 1 2246 3 is_stmt 1 view .LVU1621 5139 .loc 1 2246 6 is_stmt 0 view .LVU1622 5140 0016 53B9 cbnz r3, .L362 2247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 5141 .loc 1 2247 7 view .LVU1623 5142 0018 5AB9 cbnz r2, .L363 2248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 5143 .loc 1 2250 5 is_stmt 1 view .LVU1624 5144 001a CB68 ldr r3, [r1, #12] 5145 .LVL455: 5146 .loc 1 2250 5 is_stmt 0 view .LVU1625 5147 001c 23F00043 bic r3, r3, #-2147483648 5148 0020 CB60 str r3, [r1, #12] 2251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update state, clear previous result related to injected queue overflow */ 2253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); 5149 .loc 1 2253 5 is_stmt 1 view .LVU1626 5150 0022 C36D ldr r3, [r0, #92] 5151 0024 23F48043 bic r3, r3, #16384 5152 0028 C365 str r3, [r0, #92] 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5153 .loc 1 2255 5 view .LVU1627 5154 .LVL456: 5155 .loc 1 2255 20 is_stmt 0 view .LVU1628 5156 002a 0020 movs r0, #0 5157 .LVL457: 5158 .loc 1 2255 20 view .LVU1629 5159 002c 7047 bx lr ARM GAS /tmp/ccrO2eGa.s page 305 5160 .LVL458: 5161 .L362: 2256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5162 .loc 1 2259 20 view .LVU1630 5163 002e 0120 movs r0, #1 5164 .LVL459: 5165 .loc 1 2259 20 view .LVU1631 5166 0030 7047 bx lr 5167 .LVL460: 5168 .L363: 5169 .loc 1 2259 20 view .LVU1632 5170 0032 0120 movs r0, #1 5171 .LVL461: 2260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5172 .loc 1 2262 3 is_stmt 1 view .LVU1633 2263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5173 .loc 1 2263 1 is_stmt 0 view .LVU1634 5174 0034 7047 bx lr 5175 .cfi_endproc 5176 .LFE352: 5178 .section .text.HAL_ADCEx_DisableInjectedQueue,"ax",%progbits 5179 .align 1 5180 .global HAL_ADCEx_DisableInjectedQueue 5181 .syntax unified 5182 .thumb 5183 .thumb_func 5185 HAL_ADCEx_DisableInjectedQueue: 5186 .LVL462: 5187 .LFB353: 2264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable Injected Queue 2267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function sets CFGR register JQDIS bit in order to disable the 2268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc) 2275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5188 .loc 1 2275 1 is_stmt 1 view -0 5189 .cfi_startproc 5190 @ args = 0, pretend = 0, frame = 0 5191 @ frame_needed = 0, uses_anonymous_args = 0 5192 @ link register save eliminated. 2276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5193 .loc 1 2276 3 view .LVU1636 2277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 5194 .loc 1 2277 3 view .LVU1637 2278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 5195 .loc 1 2278 3 view .LVU1638 ARM GAS /tmp/ccrO2eGa.s page 306 2279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5196 .loc 1 2281 3 view .LVU1639 2282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 5197 .loc 1 2283 3 view .LVU1640 5198 .loc 1 2283 79 is_stmt 0 view .LVU1641 5199 0000 0168 ldr r1, [r0] 5200 .LVL463: 5201 .LBB490: 5202 .LBI490: 7866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5203 .loc 2 7866 26 is_stmt 1 view .LVU1642 5204 .LBB491: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5205 .loc 2 7868 3 view .LVU1643 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5206 .loc 2 7868 12 is_stmt 0 view .LVU1644 5207 0002 8B68 ldr r3, [r1, #8] 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5208 .loc 2 7868 74 view .LVU1645 5209 0004 13F00403 ands r3, r3, #4 5210 0008 00D0 beq .L365 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5211 .loc 2 7868 74 discriminator 1 view .LVU1646 5212 000a 0123 movs r3, #1 5213 .L365: 5214 .LVL464: 7868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5215 .loc 2 7868 74 discriminator 1 view .LVU1647 5216 .LBE491: 5217 .LBE490: 2284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 5218 .loc 1 2284 3 is_stmt 1 view .LVU1648 5219 .LBB492: 5220 .LBI492: 8092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5221 .loc 2 8092 26 view .LVU1649 5222 .LBB493: 5223 .loc 2 8094 3 view .LVU1650 5224 .loc 2 8094 12 is_stmt 0 view .LVU1651 5225 000c 8A68 ldr r2, [r1, #8] 5226 .loc 2 8094 76 view .LVU1652 5227 000e 12F00802 ands r2, r2, #8 5228 0012 00D0 beq .L366 5229 .loc 2 8094 76 discriminator 1 view .LVU1653 5230 0014 0122 movs r2, #1 5231 .L366: 5232 .LVL465: 5233 .loc 2 8094 76 discriminator 1 view .LVU1654 5234 .LBE493: 5235 .LBE492: 2285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 5236 .loc 1 2287 3 is_stmt 1 view .LVU1655 ARM GAS /tmp/ccrO2eGa.s page 307 5237 .loc 1 2287 6 is_stmt 0 view .LVU1656 5238 0016 53B9 cbnz r3, .L368 2288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 5239 .loc 1 2288 7 view .LVU1657 5240 0018 5AB9 cbnz r2, .L369 2289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE); 5241 .loc 1 2291 5 is_stmt 1 view .LVU1658 5242 .LVL466: 5243 .LBB494: 5244 .LBI494: 5873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5245 .loc 2 5873 22 view .LVU1659 5246 .LBB495: 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5247 .loc 2 5875 3 view .LVU1660 5248 001a CB68 ldr r3, [r1, #12] 5249 .LVL467: 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5250 .loc 2 5875 3 is_stmt 0 view .LVU1661 5251 001c 23F00043 bic r3, r3, #-2147483648 5252 0020 23F40013 bic r3, r3, #2097152 5253 0024 43F00043 orr r3, r3, #-2147483648 5254 0028 CB60 str r3, [r1, #12] 5255 .LVL468: 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5256 .loc 2 5875 3 view .LVU1662 5257 .LBE495: 5258 .LBE494: 2292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5259 .loc 1 2292 5 is_stmt 1 view .LVU1663 5260 .loc 1 2292 20 is_stmt 0 view .LVU1664 5261 002a 0020 movs r0, #0 5262 .LVL469: 5263 .loc 1 2292 20 view .LVU1665 5264 002c 7047 bx lr 5265 .LVL470: 5266 .L368: 2293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5267 .loc 1 2296 20 view .LVU1666 5268 002e 0120 movs r0, #1 5269 .LVL471: 5270 .loc 1 2296 20 view .LVU1667 5271 0030 7047 bx lr 5272 .LVL472: 5273 .L369: 5274 .loc 1 2296 20 view .LVU1668 5275 0032 0120 movs r0, #1 5276 .LVL473: 2297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5277 .loc 1 2299 3 is_stmt 1 view .LVU1669 ARM GAS /tmp/ccrO2eGa.s page 308 2300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5278 .loc 1 2300 1 is_stmt 0 view .LVU1670 5279 0034 7047 bx lr 5280 .cfi_endproc 5281 .LFE353: 5283 .section .text.HAL_ADCEx_DisableVoltageRegulator,"ax",%progbits 5284 .align 1 5285 .global HAL_ADCEx_DisableVoltageRegulator 5286 .syntax unified 5287 .thumb 5288 .thumb_func 5290 HAL_ADCEx_DisableVoltageRegulator: 5291 .LVL474: 5292 .LFB354: 2301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable ADC voltage regulator. 2304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Disabling voltage regulator allows to save power. This operation can 2305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be carried out only when ADC is disabled. 2306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To enable again the voltage regulator, the user is expected to 2307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API. 2308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc) 2312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5293 .loc 1 2312 1 is_stmt 1 view -0 5294 .cfi_startproc 5295 @ args = 0, pretend = 0, frame = 0 5296 @ frame_needed = 0, uses_anonymous_args = 0 5297 @ link register save eliminated. 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5298 .loc 1 2313 3 view .LVU1672 2314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5299 .loc 1 2316 3 view .LVU1673 2317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 5300 .loc 1 2319 3 view .LVU1674 5301 .loc 1 2319 28 is_stmt 0 view .LVU1675 5302 0000 0368 ldr r3, [r0] 5303 .LVL475: 5304 .LBB496: 5305 .LBI496: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5306 .loc 2 7744 26 is_stmt 1 view .LVU1676 5307 .LBB497: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5308 .loc 2 7746 3 view .LVU1677 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5309 .loc 2 7746 12 is_stmt 0 view .LVU1678 5310 0002 9A68 ldr r2, [r3, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5311 .loc 2 7746 68 view .LVU1679 5312 0004 12F0010F tst r2, #1 ARM GAS /tmp/ccrO2eGa.s page 309 5313 0008 07D1 bne .L372 5314 .LVL476: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5315 .loc 2 7746 68 view .LVU1680 5316 .LBE497: 5317 .LBE496: 2320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_DisableInternalRegulator(hadc->Instance); 5318 .loc 1 2321 5 is_stmt 1 view .LVU1681 5319 .LBB498: 5320 .LBI498: 7673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5321 .loc 2 7673 22 view .LVU1682 5322 .LBB499: 7675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5323 .loc 2 7675 3 view .LVU1683 5324 000a 9A68 ldr r2, [r3, #8] 5325 000c 22F01042 bic r2, r2, #-1879048192 5326 0010 22F03F02 bic r2, r2, #63 5327 0014 9A60 str r2, [r3, #8] 5328 .LVL477: 7675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5329 .loc 2 7675 3 is_stmt 0 view .LVU1684 5330 .LBE499: 5331 .LBE498: 2322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5332 .loc 1 2322 5 is_stmt 1 view .LVU1685 5333 .loc 1 2322 20 is_stmt 0 view .LVU1686 5334 0016 0020 movs r0, #0 5335 .LVL478: 5336 .loc 1 2322 20 view .LVU1687 5337 0018 7047 bx lr 5338 .LVL479: 5339 .L372: 2323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5340 .loc 1 2326 20 view .LVU1688 5341 001a 0120 movs r0, #1 5342 .LVL480: 2327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5343 .loc 1 2329 3 is_stmt 1 view .LVU1689 2330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5344 .loc 1 2330 1 is_stmt 0 view .LVU1690 5345 001c 7047 bx lr 5346 .cfi_endproc 5347 .LFE354: 5349 .section .text.HAL_ADCEx_EnterADCDeepPowerDownMode,"ax",%progbits 5350 .align 1 5351 .global HAL_ADCEx_EnterADCDeepPowerDownMode 5352 .syntax unified 5353 .thumb 5354 .thumb_func 5356 HAL_ADCEx_EnterADCDeepPowerDownMode: ARM GAS /tmp/ccrO2eGa.s page 310 5357 .LVL481: 5358 .LFB355: 2331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enter ADC deep-power-down mode 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This mode is achieved in setting DEEPPWD bit and allows to save power 2335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in reducing leakage currents. It is particularly interesting before 2336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * entering stop modes. 2337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the 2338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC voltage regulator. This means that this API encompasses 2339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal 2340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calibration is lost. 2341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To exit the ADC deep-power-down mode, the user is expected to 2342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API as well as to relaunch a calibration 2343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously 2344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * saved calibration factor. 2345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc) 2349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5359 .loc 1 2349 1 is_stmt 1 view -0 5360 .cfi_startproc 5361 @ args = 0, pretend = 0, frame = 0 5362 @ frame_needed = 0, uses_anonymous_args = 0 5363 @ link register save eliminated. 2350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5364 .loc 1 2350 3 view .LVU1692 2351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5365 .loc 1 2353 3 view .LVU1693 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 5366 .loc 1 2356 3 view .LVU1694 5367 .loc 1 2356 28 is_stmt 0 view .LVU1695 5368 0000 0268 ldr r2, [r0] 5369 .LVL482: 5370 .LBB500: 5371 .LBI500: 7744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5372 .loc 2 7744 26 is_stmt 1 view .LVU1696 5373 .LBB501: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5374 .loc 2 7746 3 view .LVU1697 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5375 .loc 2 7746 12 is_stmt 0 view .LVU1698 5376 0002 9368 ldr r3, [r2, #8] 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5377 .loc 2 7746 68 view .LVU1699 5378 0004 13F0010F tst r3, #1 5379 0008 09D1 bne .L375 5380 .LVL483: 7746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5381 .loc 2 7746 68 view .LVU1700 5382 .LBE501: ARM GAS /tmp/ccrO2eGa.s page 311 5383 .LBE500: 2357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_EnableDeepPowerDown(hadc->Instance); 5384 .loc 1 2358 5 is_stmt 1 view .LVU1701 5385 .LBB502: 5386 .LBI502: 7598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5387 .loc 2 7598 22 view .LVU1702 5388 .LBB503: 7603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5389 .loc 2 7603 3 view .LVU1703 5390 000a 9368 ldr r3, [r2, #8] 5391 000c 23F02043 bic r3, r3, #-1610612736 5392 0010 23F03F03 bic r3, r3, #63 5393 0014 43F00053 orr r3, r3, #536870912 5394 0018 9360 str r3, [r2, #8] 5395 .LVL484: 7603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5396 .loc 2 7603 3 is_stmt 0 view .LVU1704 5397 .LBE503: 5398 .LBE502: 2359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5399 .loc 1 2359 5 is_stmt 1 view .LVU1705 5400 .loc 1 2359 20 is_stmt 0 view .LVU1706 5401 001a 0020 movs r0, #0 5402 .LVL485: 5403 .loc 1 2359 20 view .LVU1707 5404 001c 7047 bx lr 5405 .LVL486: 5406 .L375: 2360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5407 .loc 1 2363 20 view .LVU1708 5408 001e 0120 movs r0, #1 5409 .LVL487: 2364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5410 .loc 1 2366 3 is_stmt 1 view .LVU1709 2367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5411 .loc 1 2367 1 is_stmt 0 view .LVU1710 5412 0020 7047 bx lr 5413 .cfi_endproc 5414 .LFE355: 5416 .text 5417 .Letext0: 5418 .file 4 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach 5419 .file 5 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/ 5420 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 5421 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 5422 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 5423 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h" 5424 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h" 5425 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h" 5426 .file 12 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" ARM GAS /tmp/ccrO2eGa.s page 312 5427 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h" ARM GAS /tmp/ccrO2eGa.s page 313 DEFINED SYMBOLS *ABS*:00000000 stm32g4xx_hal_adc_ex.c /tmp/ccrO2eGa.s:21 .text.LL_ADC_SetCalibrationFactor:00000000 $t /tmp/ccrO2eGa.s:26 .text.LL_ADC_SetCalibrationFactor:00000000 LL_ADC_SetCalibrationFactor /tmp/ccrO2eGa.s:54 .text.LL_ADC_SetChannelSamplingTime:00000000 $t /tmp/ccrO2eGa.s:59 .text.LL_ADC_SetChannelSamplingTime:00000000 LL_ADC_SetChannelSamplingTime /tmp/ccrO2eGa.s:104 .text.HAL_ADCEx_Calibration_Start:00000000 $t /tmp/ccrO2eGa.s:110 .text.HAL_ADCEx_Calibration_Start:00000000 HAL_ADCEx_Calibration_Start /tmp/ccrO2eGa.s:271 .text.HAL_ADCEx_Calibration_Start:00000098 $d /tmp/ccrO2eGa.s:276 .text.HAL_ADCEx_Calibration_GetValue:00000000 $t /tmp/ccrO2eGa.s:282 .text.HAL_ADCEx_Calibration_GetValue:00000000 HAL_ADCEx_Calibration_GetValue /tmp/ccrO2eGa.s:323 .text.HAL_ADCEx_Calibration_SetValue:00000000 $t /tmp/ccrO2eGa.s:329 .text.HAL_ADCEx_Calibration_SetValue:00000000 HAL_ADCEx_Calibration_SetValue /tmp/ccrO2eGa.s:469 .text.HAL_ADCEx_InjectedStart:00000000 $t /tmp/ccrO2eGa.s:475 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart /tmp/ccrO2eGa.s:719 .text.HAL_ADCEx_InjectedStart:000000e8 $d /tmp/ccrO2eGa.s:725 .text.HAL_ADCEx_InjectedStop:00000000 $t /tmp/ccrO2eGa.s:731 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop /tmp/ccrO2eGa.s:831 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t /tmp/ccrO2eGa.s:837 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion /tmp/ccrO2eGa.s:1123 .text.HAL_ADCEx_InjectedPollForConversion:000000f8 $d /tmp/ccrO2eGa.s:1129 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t /tmp/ccrO2eGa.s:1135 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT /tmp/ccrO2eGa.s:1423 .text.HAL_ADCEx_InjectedStart_IT:0000012c $d /tmp/ccrO2eGa.s:1429 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t /tmp/ccrO2eGa.s:1435 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT /tmp/ccrO2eGa.s:1540 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t /tmp/ccrO2eGa.s:1546 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA /tmp/ccrO2eGa.s:1766 .text.HAL_ADCEx_MultiModeStart_DMA:000000d0 $d /tmp/ccrO2eGa.s:1774 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t /tmp/ccrO2eGa.s:1780 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA /tmp/ccrO2eGa.s:2108 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t /tmp/ccrO2eGa.s:2114 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue /tmp/ccrO2eGa.s:2136 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d /tmp/ccrO2eGa.s:2141 .text.HAL_ADCEx_InjectedGetValue:00000000 $t /tmp/ccrO2eGa.s:2147 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue /tmp/ccrO2eGa.s:2212 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t /tmp/ccrO2eGa.s:2218 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback /tmp/ccrO2eGa.s:2233 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 $t /tmp/ccrO2eGa.s:2239 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 HAL_ADCEx_InjectedQueueOverflowCallback /tmp/ccrO2eGa.s:2254 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 $t /tmp/ccrO2eGa.s:2260 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 HAL_ADCEx_LevelOutOfWindow2Callback /tmp/ccrO2eGa.s:2275 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 $t /tmp/ccrO2eGa.s:2281 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 HAL_ADCEx_LevelOutOfWindow3Callback /tmp/ccrO2eGa.s:2296 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 $t /tmp/ccrO2eGa.s:2302 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 HAL_ADCEx_EndOfSamplingCallback /tmp/ccrO2eGa.s:2317 .text.HAL_ADCEx_RegularStop:00000000 $t /tmp/ccrO2eGa.s:2323 .text.HAL_ADCEx_RegularStop:00000000 HAL_ADCEx_RegularStop /tmp/ccrO2eGa.s:2426 .text.HAL_ADCEx_RegularStop_IT:00000000 $t /tmp/ccrO2eGa.s:2432 .text.HAL_ADCEx_RegularStop_IT:00000000 HAL_ADCEx_RegularStop_IT /tmp/ccrO2eGa.s:2540 .text.HAL_ADCEx_RegularStop_DMA:00000000 $t /tmp/ccrO2eGa.s:2546 .text.HAL_ADCEx_RegularStop_DMA:00000000 HAL_ADCEx_RegularStop_DMA /tmp/ccrO2eGa.s:2695 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 $t /tmp/ccrO2eGa.s:2701 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 HAL_ADCEx_RegularMultiModeStop_DMA /tmp/ccrO2eGa.s:3058 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t /tmp/ccrO2eGa.s:3064 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel /tmp/ccrO2eGa.s:4153 .text.HAL_ADCEx_InjectedConfigChannel:00000394 $d ARM GAS /tmp/ccrO2eGa.s page 314 /tmp/ccrO2eGa.s:4165 .text.HAL_ADCEx_InjectedConfigChannel:000003b8 $t /tmp/ccrO2eGa.s:4752 .text.HAL_ADCEx_InjectedConfigChannel:000005ac $d /tmp/ccrO2eGa.s:4760 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t /tmp/ccrO2eGa.s:4766 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel /tmp/ccrO2eGa.s:5075 .text.HAL_ADCEx_MultiModeConfigChannel:00000110 $d /tmp/ccrO2eGa.s:5081 .text.HAL_ADCEx_EnableInjectedQueue:00000000 $t /tmp/ccrO2eGa.s:5087 .text.HAL_ADCEx_EnableInjectedQueue:00000000 HAL_ADCEx_EnableInjectedQueue /tmp/ccrO2eGa.s:5179 .text.HAL_ADCEx_DisableInjectedQueue:00000000 $t /tmp/ccrO2eGa.s:5185 .text.HAL_ADCEx_DisableInjectedQueue:00000000 HAL_ADCEx_DisableInjectedQueue /tmp/ccrO2eGa.s:5284 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 $t /tmp/ccrO2eGa.s:5290 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 HAL_ADCEx_DisableVoltageRegulator /tmp/ccrO2eGa.s:5350 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 $t /tmp/ccrO2eGa.s:5356 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 HAL_ADCEx_EnterADCDeepPowerDownMode UNDEFINED SYMBOLS ADC_Disable ADC_Enable ADC_ConversionStop HAL_GetTick HAL_DMA_Start_IT ADC_DMAConvCplt ADC_DMAHalfConvCplt ADC_DMAError HAL_DMA_Abort SystemCoreClock