ARM GAS /tmp/ccFRc2UG.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32g4xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Src/stm32g4xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB329: 1:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Src/stm32g4xx_hal_msp.c **** /** 3:Src/stm32g4xx_hal_msp.c **** ****************************************************************************** 4:Src/stm32g4xx_hal_msp.c **** * @file stm32g4xx_hal_msp.c 5:Src/stm32g4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Src/stm32g4xx_hal_msp.c **** * and de-Initialization codes. 7:Src/stm32g4xx_hal_msp.c **** ****************************************************************************** 8:Src/stm32g4xx_hal_msp.c **** * @attention 9:Src/stm32g4xx_hal_msp.c **** * 10:Src/stm32g4xx_hal_msp.c **** * Copyright (c) 2022 STMicroelectronics. 11:Src/stm32g4xx_hal_msp.c **** * All rights reserved. 12:Src/stm32g4xx_hal_msp.c **** * 13:Src/stm32g4xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Src/stm32g4xx_hal_msp.c **** * in the root directory of this software component. 15:Src/stm32g4xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Src/stm32g4xx_hal_msp.c **** * 17:Src/stm32g4xx_hal_msp.c **** ****************************************************************************** 18:Src/stm32g4xx_hal_msp.c **** */ 19:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Header */ 20:Src/stm32g4xx_hal_msp.c **** 21:Src/stm32g4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Src/stm32g4xx_hal_msp.c **** #include "main.h" 23:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Src/stm32g4xx_hal_msp.c **** 25:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Includes */ 26:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc2; 27:Src/stm32g4xx_hal_msp.c **** 28:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_rx; 29:Src/stm32g4xx_hal_msp.c **** 30:Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx; ARM GAS /tmp/ccFRc2UG.s page 2 31:Src/stm32g4xx_hal_msp.c **** 32:Src/stm32g4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 33:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TD */ 34:Src/stm32g4xx_hal_msp.c **** 35:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TD */ 36:Src/stm32g4xx_hal_msp.c **** 37:Src/stm32g4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 38:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Define */ 39:Src/stm32g4xx_hal_msp.c **** 40:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Define */ 41:Src/stm32g4xx_hal_msp.c **** 42:Src/stm32g4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 43:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 44:Src/stm32g4xx_hal_msp.c **** 45:Src/stm32g4xx_hal_msp.c **** /* USER CODE END Macro */ 46:Src/stm32g4xx_hal_msp.c **** 47:Src/stm32g4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 48:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PV */ 49:Src/stm32g4xx_hal_msp.c **** 50:Src/stm32g4xx_hal_msp.c **** /* USER CODE END PV */ 51:Src/stm32g4xx_hal_msp.c **** 52:Src/stm32g4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 53:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 54:Src/stm32g4xx_hal_msp.c **** 55:Src/stm32g4xx_hal_msp.c **** /* USER CODE END PFP */ 56:Src/stm32g4xx_hal_msp.c **** 57:Src/stm32g4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 58:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 59:Src/stm32g4xx_hal_msp.c **** 60:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 61:Src/stm32g4xx_hal_msp.c **** 62:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 63:Src/stm32g4xx_hal_msp.c **** 64:Src/stm32g4xx_hal_msp.c **** /* USER CODE END 0 */ 65:Src/stm32g4xx_hal_msp.c **** 66:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); 67:Src/stm32g4xx_hal_msp.c **** /** 68:Src/stm32g4xx_hal_msp.c **** * Initializes the Global MSP. 69:Src/stm32g4xx_hal_msp.c **** */ 70:Src/stm32g4xx_hal_msp.c **** void HAL_MspInit(void) 71:Src/stm32g4xx_hal_msp.c **** { 29 .loc 1 71 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 0000 00B5 push {lr} 34 .LCFI0: 35 .cfi_def_cfa_offset 4 36 .cfi_offset 14, -4 37 0002 83B0 sub sp, sp, #12 38 .LCFI1: 39 .cfi_def_cfa_offset 16 72:Src/stm32g4xx_hal_msp.c **** 73:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 74:Src/stm32g4xx_hal_msp.c **** 75:Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 76:Src/stm32g4xx_hal_msp.c **** ARM GAS /tmp/ccFRc2UG.s page 3 77:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 40 .loc 1 77 3 view .LVU1 41 .LBB2: 42 .loc 1 77 3 view .LVU2 43 .loc 1 77 3 view .LVU3 44 0004 0B4B ldr r3, .L3 45 0006 1A6E ldr r2, [r3, #96] 46 0008 42F00102 orr r2, r2, #1 47 000c 1A66 str r2, [r3, #96] 48 .loc 1 77 3 view .LVU4 49 000e 1A6E ldr r2, [r3, #96] 50 0010 02F00102 and r2, r2, #1 51 0014 0092 str r2, [sp] 52 .loc 1 77 3 view .LVU5 53 0016 009A ldr r2, [sp] 54 .LBE2: 55 .loc 1 77 3 view .LVU6 78:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 56 .loc 1 78 3 view .LVU7 57 .LBB3: 58 .loc 1 78 3 view .LVU8 59 .loc 1 78 3 view .LVU9 60 0018 9A6D ldr r2, [r3, #88] 61 001a 42F08052 orr r2, r2, #268435456 62 001e 9A65 str r2, [r3, #88] 63 .loc 1 78 3 view .LVU10 64 0020 9B6D ldr r3, [r3, #88] 65 0022 03F08053 and r3, r3, #268435456 66 0026 0193 str r3, [sp, #4] 67 .loc 1 78 3 view .LVU11 68 0028 019B ldr r3, [sp, #4] 69 .LBE3: 70 .loc 1 78 3 view .LVU12 79:Src/stm32g4xx_hal_msp.c **** 80:Src/stm32g4xx_hal_msp.c **** /* System interrupt init*/ 81:Src/stm32g4xx_hal_msp.c **** 82:Src/stm32g4xx_hal_msp.c **** /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral 83:Src/stm32g4xx_hal_msp.c **** */ 84:Src/stm32g4xx_hal_msp.c **** HAL_PWREx_DisableUCPDDeadBattery(); 71 .loc 1 84 3 view .LVU13 72 002a FFF7FEFF bl HAL_PWREx_DisableUCPDDeadBattery 73 .LVL0: 85:Src/stm32g4xx_hal_msp.c **** 86:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 87:Src/stm32g4xx_hal_msp.c **** 88:Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 89:Src/stm32g4xx_hal_msp.c **** } 74 .loc 1 89 1 is_stmt 0 view .LVU14 75 002e 03B0 add sp, sp, #12 76 .LCFI2: 77 .cfi_def_cfa_offset 4 78 @ sp needed 79 0030 5DF804FB ldr pc, [sp], #4 80 .L4: 81 .align 2 82 .L3: 83 0034 00100240 .word 1073876992 ARM GAS /tmp/ccFRc2UG.s page 4 84 .cfi_endproc 85 .LFE329: 87 .section .text.HAL_ADC_MspInit,"ax",%progbits 88 .align 1 89 .global HAL_ADC_MspInit 90 .syntax unified 91 .thumb 92 .thumb_func 94 HAL_ADC_MspInit: 95 .LVL1: 96 .LFB330: 90:Src/stm32g4xx_hal_msp.c **** 91:Src/stm32g4xx_hal_msp.c **** static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0; 92:Src/stm32g4xx_hal_msp.c **** 93:Src/stm32g4xx_hal_msp.c **** /** 94:Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP Initialization 95:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example 96:Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer 97:Src/stm32g4xx_hal_msp.c **** * @retval None 98:Src/stm32g4xx_hal_msp.c **** */ 99:Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 100:Src/stm32g4xx_hal_msp.c **** { 97 .loc 1 100 1 is_stmt 1 view -0 98 .cfi_startproc 99 @ args = 0, pretend = 0, frame = 104 100 @ frame_needed = 0, uses_anonymous_args = 0 101 .loc 1 100 1 is_stmt 0 view .LVU16 102 0000 30B5 push {r4, r5, lr} 103 .LCFI3: 104 .cfi_def_cfa_offset 12 105 .cfi_offset 4, -12 106 .cfi_offset 5, -8 107 .cfi_offset 14, -4 108 0002 9BB0 sub sp, sp, #108 109 .LCFI4: 110 .cfi_def_cfa_offset 120 111 0004 0446 mov r4, r0 101:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 112 .loc 1 101 3 is_stmt 1 view .LVU17 113 .loc 1 101 20 is_stmt 0 view .LVU18 114 0006 0021 movs r1, #0 115 0008 1591 str r1, [sp, #84] 116 000a 1691 str r1, [sp, #88] 117 000c 1791 str r1, [sp, #92] 118 000e 1891 str r1, [sp, #96] 119 0010 1991 str r1, [sp, #100] 102:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 120 .loc 1 102 3 is_stmt 1 view .LVU19 121 .loc 1 102 28 is_stmt 0 view .LVU20 122 0012 4422 movs r2, #68 123 0014 04A8 add r0, sp, #16 124 .LVL2: 125 .loc 1 102 28 view .LVU21 126 0016 FFF7FEFF bl memset 127 .LVL3: 103:Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1) 128 .loc 1 103 3 is_stmt 1 view .LVU22 ARM GAS /tmp/ccFRc2UG.s page 5 129 .loc 1 103 10 is_stmt 0 view .LVU23 130 001a 2368 ldr r3, [r4] 131 .loc 1 103 5 view .LVU24 132 001c B3F1A04F cmp r3, #1342177280 133 0020 04D0 beq .L14 104:Src/stm32g4xx_hal_msp.c **** { 105:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ 106:Src/stm32g4xx_hal_msp.c **** 107:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ 108:Src/stm32g4xx_hal_msp.c **** 109:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks 110:Src/stm32g4xx_hal_msp.c **** */ 111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12; 112:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 113:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 114:Src/stm32g4xx_hal_msp.c **** { 115:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 116:Src/stm32g4xx_hal_msp.c **** } 117:Src/stm32g4xx_hal_msp.c **** 118:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 119:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 120:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 121:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 122:Src/stm32g4xx_hal_msp.c **** } 123:Src/stm32g4xx_hal_msp.c **** 124:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 125:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 126:Src/stm32g4xx_hal_msp.c **** PB0 ------> ADC1_IN15 127:Src/stm32g4xx_hal_msp.c **** */ 128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = AUDIO_IN_Pin; 129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 130:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 131:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(AUDIO_IN_GPIO_Port, &GPIO_InitStruct); 132:Src/stm32g4xx_hal_msp.c **** 133:Src/stm32g4xx_hal_msp.c **** /* ADC1 interrupt Init */ 134:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0); 135:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn); 136:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 137:Src/stm32g4xx_hal_msp.c **** 138:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ 139:Src/stm32g4xx_hal_msp.c **** } 140:Src/stm32g4xx_hal_msp.c **** else if(hadc->Instance==ADC2) 134 .loc 1 140 8 is_stmt 1 view .LVU25 135 .loc 1 140 10 is_stmt 0 view .LVU26 136 0022 4B4A ldr r2, .L21 137 0024 9342 cmp r3, r2 138 0026 3CD0 beq .L15 139 .LVL4: 140 .L5: 141:Src/stm32g4xx_hal_msp.c **** { 142:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 0 */ 143:Src/stm32g4xx_hal_msp.c **** 144:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 0 */ 145:Src/stm32g4xx_hal_msp.c **** 146:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks 147:Src/stm32g4xx_hal_msp.c **** */ 148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12; ARM GAS /tmp/ccFRc2UG.s page 6 149:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 150:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 151:Src/stm32g4xx_hal_msp.c **** { 152:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 153:Src/stm32g4xx_hal_msp.c **** } 154:Src/stm32g4xx_hal_msp.c **** 155:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 156:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 157:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 158:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 159:Src/stm32g4xx_hal_msp.c **** } 160:Src/stm32g4xx_hal_msp.c **** 161:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 162:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 163:Src/stm32g4xx_hal_msp.c **** PA4 ------> ADC2_IN17 164:Src/stm32g4xx_hal_msp.c **** PA5 ------> ADC2_IN13 165:Src/stm32g4xx_hal_msp.c **** PA6 ------> ADC2_IN3 166:Src/stm32g4xx_hal_msp.c **** PA7 ------> ADC2_IN4 167:Src/stm32g4xx_hal_msp.c **** */ 168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = TEMPERATURA_Pin|CORRENTE_Pin|DIRETTA_Pin|RIFLESSA_Pin; 169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 170:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 171:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 172:Src/stm32g4xx_hal_msp.c **** 173:Src/stm32g4xx_hal_msp.c **** /* ADC2 DMA Init */ 174:Src/stm32g4xx_hal_msp.c **** /* ADC2 Init */ 175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Instance = DMA1_Channel2; 176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2; 177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL; 183:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 184:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 185:Src/stm32g4xx_hal_msp.c **** { 186:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 187:Src/stm32g4xx_hal_msp.c **** } 188:Src/stm32g4xx_hal_msp.c **** 189:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2); 190:Src/stm32g4xx_hal_msp.c **** 191:Src/stm32g4xx_hal_msp.c **** /* ADC2 interrupt Init */ 192:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0); 193:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn); 194:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */ 195:Src/stm32g4xx_hal_msp.c **** 196:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 1 */ 197:Src/stm32g4xx_hal_msp.c **** } 198:Src/stm32g4xx_hal_msp.c **** 199:Src/stm32g4xx_hal_msp.c **** } 141 .loc 1 199 1 view .LVU27 142 0028 1BB0 add sp, sp, #108 143 .LCFI5: 144 .cfi_remember_state 145 .cfi_def_cfa_offset 12 146 @ sp needed ARM GAS /tmp/ccFRc2UG.s page 7 147 002a 30BD pop {r4, r5, pc} 148 .LVL5: 149 .L14: 150 .LCFI6: 151 .cfi_restore_state 111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 152 .loc 1 111 5 is_stmt 1 view .LVU28 111:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 153 .loc 1 111 40 is_stmt 0 view .LVU29 154 002c 4FF40043 mov r3, #32768 155 0030 0493 str r3, [sp, #16] 112:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 156 .loc 1 112 5 is_stmt 1 view .LVU30 112:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 157 .loc 1 112 39 is_stmt 0 view .LVU31 158 0032 4FF00053 mov r3, #536870912 159 0036 1393 str r3, [sp, #76] 113:Src/stm32g4xx_hal_msp.c **** { 160 .loc 1 113 5 is_stmt 1 view .LVU32 113:Src/stm32g4xx_hal_msp.c **** { 161 .loc 1 113 9 is_stmt 0 view .LVU33 162 0038 04A8 add r0, sp, #16 163 003a FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 164 .LVL6: 113:Src/stm32g4xx_hal_msp.c **** { 165 .loc 1 113 8 discriminator 1 view .LVU34 166 003e 10BB cbnz r0, .L16 167 .L7: 119:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 168 .loc 1 119 5 is_stmt 1 view .LVU35 119:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 169 .loc 1 119 30 is_stmt 0 view .LVU36 170 0040 444A ldr r2, .L21+4 171 0042 1368 ldr r3, [r2] 172 0044 0133 adds r3, r3, #1 173 0046 1360 str r3, [r2] 120:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 174 .loc 1 120 5 is_stmt 1 view .LVU37 120:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 175 .loc 1 120 7 is_stmt 0 view .LVU38 176 0048 012B cmp r3, #1 177 004a 1FD0 beq .L17 178 .L8: 121:Src/stm32g4xx_hal_msp.c **** } 179 .loc 1 121 7 is_stmt 1 discriminator 1 view .LVU39 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 180 .loc 1 124 5 view .LVU40 181 .LBB4: 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 182 .loc 1 124 5 view .LVU41 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 183 .loc 1 124 5 view .LVU42 184 004c 424B ldr r3, .L21+8 185 004e DA6C ldr r2, [r3, #76] 186 0050 42F00202 orr r2, r2, #2 187 0054 DA64 str r2, [r3, #76] 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration ARM GAS /tmp/ccFRc2UG.s page 8 188 .loc 1 124 5 view .LVU43 189 0056 DB6C ldr r3, [r3, #76] 190 0058 03F00203 and r3, r3, #2 191 005c 0193 str r3, [sp, #4] 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 192 .loc 1 124 5 view .LVU44 193 005e 019B ldr r3, [sp, #4] 194 .LBE4: 124:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 195 .loc 1 124 5 view .LVU45 128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 196 .loc 1 128 5 view .LVU46 128:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 197 .loc 1 128 25 is_stmt 0 view .LVU47 198 0060 0123 movs r3, #1 199 0062 1593 str r3, [sp, #84] 129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 200 .loc 1 129 5 is_stmt 1 view .LVU48 129:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 201 .loc 1 129 26 is_stmt 0 view .LVU49 202 0064 0323 movs r3, #3 203 0066 1693 str r3, [sp, #88] 130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(AUDIO_IN_GPIO_Port, &GPIO_InitStruct); 204 .loc 1 130 5 is_stmt 1 view .LVU50 130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(AUDIO_IN_GPIO_Port, &GPIO_InitStruct); 205 .loc 1 130 26 is_stmt 0 view .LVU51 206 0068 0024 movs r4, #0 207 .LVL7: 130:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(AUDIO_IN_GPIO_Port, &GPIO_InitStruct); 208 .loc 1 130 26 view .LVU52 209 006a 1794 str r4, [sp, #92] 131:Src/stm32g4xx_hal_msp.c **** 210 .loc 1 131 5 is_stmt 1 view .LVU53 211 006c 15A9 add r1, sp, #84 212 006e 3B48 ldr r0, .L21+12 213 0070 FFF7FEFF bl HAL_GPIO_Init 214 .LVL8: 134:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn); 215 .loc 1 134 5 view .LVU54 216 0074 2246 mov r2, r4 217 0076 2146 mov r1, r4 218 0078 1220 movs r0, #18 219 007a FFF7FEFF bl HAL_NVIC_SetPriority 220 .LVL9: 135:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 221 .loc 1 135 5 view .LVU55 222 007e 1220 movs r0, #18 223 0080 FFF7FEFF bl HAL_NVIC_EnableIRQ 224 .LVL10: 225 0084 D0E7 b .L5 226 .LVL11: 227 .L16: 115:Src/stm32g4xx_hal_msp.c **** } 228 .loc 1 115 7 view .LVU56 229 0086 FFF7FEFF bl Error_Handler 230 .LVL12: 231 008a D9E7 b .L7 ARM GAS /tmp/ccFRc2UG.s page 9 232 .L17: 121:Src/stm32g4xx_hal_msp.c **** } 233 .loc 1 121 7 view .LVU57 234 .LBB5: 121:Src/stm32g4xx_hal_msp.c **** } 235 .loc 1 121 7 view .LVU58 121:Src/stm32g4xx_hal_msp.c **** } 236 .loc 1 121 7 view .LVU59 237 008c 324B ldr r3, .L21+8 238 008e DA6C ldr r2, [r3, #76] 239 0090 42F40052 orr r2, r2, #8192 240 0094 DA64 str r2, [r3, #76] 121:Src/stm32g4xx_hal_msp.c **** } 241 .loc 1 121 7 view .LVU60 242 0096 DB6C ldr r3, [r3, #76] 243 0098 03F40053 and r3, r3, #8192 244 009c 0093 str r3, [sp] 121:Src/stm32g4xx_hal_msp.c **** } 245 .loc 1 121 7 view .LVU61 246 009e 009B ldr r3, [sp] 247 00a0 D4E7 b .L8 248 .L15: 249 .LBE5: 148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 250 .loc 1 148 5 view .LVU62 148:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK; 251 .loc 1 148 40 is_stmt 0 view .LVU63 252 00a2 4FF40043 mov r3, #32768 253 00a6 0493 str r3, [sp, #16] 149:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 254 .loc 1 149 5 is_stmt 1 view .LVU64 149:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 255 .loc 1 149 39 is_stmt 0 view .LVU65 256 00a8 4FF00053 mov r3, #536870912 257 00ac 1393 str r3, [sp, #76] 150:Src/stm32g4xx_hal_msp.c **** { 258 .loc 1 150 5 is_stmt 1 view .LVU66 150:Src/stm32g4xx_hal_msp.c **** { 259 .loc 1 150 9 is_stmt 0 view .LVU67 260 00ae 04A8 add r0, sp, #16 261 00b0 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 262 .LVL13: 150:Src/stm32g4xx_hal_msp.c **** { 263 .loc 1 150 8 discriminator 1 view .LVU68 264 00b4 0028 cmp r0, #0 265 00b6 3AD1 bne .L18 266 .L10: 156:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 267 .loc 1 156 5 is_stmt 1 view .LVU69 156:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 268 .loc 1 156 30 is_stmt 0 view .LVU70 269 00b8 264A ldr r2, .L21+4 270 00ba 1368 ldr r3, [r2] 271 00bc 0133 adds r3, r3, #1 272 00be 1360 str r3, [r2] 157:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 273 .loc 1 157 5 is_stmt 1 view .LVU71 ARM GAS /tmp/ccFRc2UG.s page 10 157:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 274 .loc 1 157 7 is_stmt 0 view .LVU72 275 00c0 012B cmp r3, #1 276 00c2 37D0 beq .L19 277 .L11: 158:Src/stm32g4xx_hal_msp.c **** } 278 .loc 1 158 7 is_stmt 1 discriminator 1 view .LVU73 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 279 .loc 1 161 5 view .LVU74 280 .LBB6: 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 281 .loc 1 161 5 view .LVU75 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 282 .loc 1 161 5 view .LVU76 283 00c4 244B ldr r3, .L21+8 284 00c6 DA6C ldr r2, [r3, #76] 285 00c8 42F00102 orr r2, r2, #1 286 00cc DA64 str r2, [r3, #76] 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 287 .loc 1 161 5 view .LVU77 288 00ce DB6C ldr r3, [r3, #76] 289 00d0 03F00103 and r3, r3, #1 290 00d4 0393 str r3, [sp, #12] 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 291 .loc 1 161 5 view .LVU78 292 00d6 039B ldr r3, [sp, #12] 293 .LBE6: 161:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 294 .loc 1 161 5 view .LVU79 168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 295 .loc 1 168 5 view .LVU80 168:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 296 .loc 1 168 25 is_stmt 0 view .LVU81 297 00d8 F023 movs r3, #240 298 00da 1593 str r3, [sp, #84] 169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 299 .loc 1 169 5 is_stmt 1 view .LVU82 169:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 300 .loc 1 169 26 is_stmt 0 view .LVU83 301 00dc 0323 movs r3, #3 302 00de 1693 str r3, [sp, #88] 170:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 303 .loc 1 170 5 is_stmt 1 view .LVU84 170:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 304 .loc 1 170 26 is_stmt 0 view .LVU85 305 00e0 0025 movs r5, #0 306 00e2 1795 str r5, [sp, #92] 171:Src/stm32g4xx_hal_msp.c **** 307 .loc 1 171 5 is_stmt 1 view .LVU86 308 00e4 15A9 add r1, sp, #84 309 00e6 4FF09040 mov r0, #1207959552 310 00ea FFF7FEFF bl HAL_GPIO_Init 311 .LVL14: 175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2; 312 .loc 1 175 5 view .LVU87 175:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Request = DMA_REQUEST_ADC2; 313 .loc 1 175 24 is_stmt 0 view .LVU88 ARM GAS /tmp/ccFRc2UG.s page 11 314 00ee 1C48 ldr r0, .L21+16 315 00f0 1C4B ldr r3, .L21+20 316 00f2 0360 str r3, [r0] 176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 317 .loc 1 176 5 is_stmt 1 view .LVU89 176:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 318 .loc 1 176 28 is_stmt 0 view .LVU90 319 00f4 2423 movs r3, #36 320 00f6 4360 str r3, [r0, #4] 177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 321 .loc 1 177 5 is_stmt 1 view .LVU91 177:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 322 .loc 1 177 30 is_stmt 0 view .LVU92 323 00f8 8560 str r5, [r0, #8] 178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 324 .loc 1 178 5 is_stmt 1 view .LVU93 178:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 325 .loc 1 178 30 is_stmt 0 view .LVU94 326 00fa C560 str r5, [r0, #12] 179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 327 .loc 1 179 5 is_stmt 1 view .LVU95 179:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 328 .loc 1 179 27 is_stmt 0 view .LVU96 329 00fc 8023 movs r3, #128 330 00fe 0361 str r3, [r0, #16] 180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 331 .loc 1 180 5 is_stmt 1 view .LVU97 180:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 332 .loc 1 180 40 is_stmt 0 view .LVU98 333 0100 4FF48073 mov r3, #256 334 0104 4361 str r3, [r0, #20] 181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL; 335 .loc 1 181 5 is_stmt 1 view .LVU99 181:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_NORMAL; 336 .loc 1 181 37 is_stmt 0 view .LVU100 337 0106 4FF48063 mov r3, #1024 338 010a 8361 str r3, [r0, #24] 182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 339 .loc 1 182 5 is_stmt 1 view .LVU101 182:Src/stm32g4xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 340 .loc 1 182 25 is_stmt 0 view .LVU102 341 010c C561 str r5, [r0, #28] 183:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 342 .loc 1 183 5 is_stmt 1 view .LVU103 183:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 343 .loc 1 183 29 is_stmt 0 view .LVU104 344 010e 0562 str r5, [r0, #32] 184:Src/stm32g4xx_hal_msp.c **** { 345 .loc 1 184 5 is_stmt 1 view .LVU105 184:Src/stm32g4xx_hal_msp.c **** { 346 .loc 1 184 9 is_stmt 0 view .LVU106 347 0110 FFF7FEFF bl HAL_DMA_Init 348 .LVL15: 184:Src/stm32g4xx_hal_msp.c **** { 349 .loc 1 184 8 discriminator 1 view .LVU107 350 0114 C8B9 cbnz r0, .L20 351 .L12: ARM GAS /tmp/ccFRc2UG.s page 12 189:Src/stm32g4xx_hal_msp.c **** 352 .loc 1 189 5 is_stmt 1 view .LVU108 189:Src/stm32g4xx_hal_msp.c **** 353 .loc 1 189 5 view .LVU109 354 0116 124B ldr r3, .L21+16 355 0118 6365 str r3, [r4, #84] 189:Src/stm32g4xx_hal_msp.c **** 356 .loc 1 189 5 view .LVU110 357 011a 9C62 str r4, [r3, #40] 189:Src/stm32g4xx_hal_msp.c **** 358 .loc 1 189 5 view .LVU111 192:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC1_2_IRQn); 359 .loc 1 192 5 view .LVU112 360 011c 0022 movs r2, #0 361 011e 1146 mov r1, r2 362 0120 1220 movs r0, #18 363 0122 FFF7FEFF bl HAL_NVIC_SetPriority 364 .LVL16: 193:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */ 365 .loc 1 193 5 view .LVU113 366 0126 1220 movs r0, #18 367 0128 FFF7FEFF bl HAL_NVIC_EnableIRQ 368 .LVL17: 369 .loc 1 199 1 is_stmt 0 view .LVU114 370 012c 7CE7 b .L5 371 .L18: 152:Src/stm32g4xx_hal_msp.c **** } 372 .loc 1 152 7 is_stmt 1 view .LVU115 373 012e FFF7FEFF bl Error_Handler 374 .LVL18: 375 0132 C1E7 b .L10 376 .L19: 158:Src/stm32g4xx_hal_msp.c **** } 377 .loc 1 158 7 view .LVU116 378 .LBB7: 158:Src/stm32g4xx_hal_msp.c **** } 379 .loc 1 158 7 view .LVU117 158:Src/stm32g4xx_hal_msp.c **** } 380 .loc 1 158 7 view .LVU118 381 0134 084B ldr r3, .L21+8 382 0136 DA6C ldr r2, [r3, #76] 383 0138 42F40052 orr r2, r2, #8192 384 013c DA64 str r2, [r3, #76] 158:Src/stm32g4xx_hal_msp.c **** } 385 .loc 1 158 7 view .LVU119 386 013e DB6C ldr r3, [r3, #76] 387 0140 03F40053 and r3, r3, #8192 388 0144 0293 str r3, [sp, #8] 158:Src/stm32g4xx_hal_msp.c **** } 389 .loc 1 158 7 view .LVU120 390 0146 029B ldr r3, [sp, #8] 391 0148 BCE7 b .L11 392 .L20: 393 .LBE7: 186:Src/stm32g4xx_hal_msp.c **** } 394 .loc 1 186 7 view .LVU121 395 014a FFF7FEFF bl Error_Handler ARM GAS /tmp/ccFRc2UG.s page 13 396 .LVL19: 397 014e E2E7 b .L12 398 .L22: 399 .align 2 400 .L21: 401 0150 00010050 .word 1342177536 402 0154 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 403 0158 00100240 .word 1073876992 404 015c 00040048 .word 1207960576 405 0160 00000000 .word hdma_adc2 406 0164 1C000240 .word 1073872924 407 .cfi_endproc 408 .LFE330: 410 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 411 .align 1 412 .global HAL_ADC_MspDeInit 413 .syntax unified 414 .thumb 415 .thumb_func 417 HAL_ADC_MspDeInit: 418 .LVL20: 419 .LFB331: 200:Src/stm32g4xx_hal_msp.c **** 201:Src/stm32g4xx_hal_msp.c **** /** 202:Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP De-Initialization 203:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 204:Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer 205:Src/stm32g4xx_hal_msp.c **** * @retval None 206:Src/stm32g4xx_hal_msp.c **** */ 207:Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 208:Src/stm32g4xx_hal_msp.c **** { 420 .loc 1 208 1 view -0 421 .cfi_startproc 422 @ args = 0, pretend = 0, frame = 0 423 @ frame_needed = 0, uses_anonymous_args = 0 424 .loc 1 208 1 is_stmt 0 view .LVU123 425 0000 10B5 push {r4, lr} 426 .LCFI7: 427 .cfi_def_cfa_offset 8 428 .cfi_offset 4, -8 429 .cfi_offset 14, -4 209:Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1) 430 .loc 1 209 3 is_stmt 1 view .LVU124 431 .loc 1 209 10 is_stmt 0 view .LVU125 432 0002 0368 ldr r3, [r0] 433 .loc 1 209 5 view .LVU126 434 0004 B3F1A04F cmp r3, #1342177280 435 0008 04D0 beq .L29 436 000a 0446 mov r4, r0 210:Src/stm32g4xx_hal_msp.c **** { 211:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ 212:Src/stm32g4xx_hal_msp.c **** 213:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ 214:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 215:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 216:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 217:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); ARM GAS /tmp/ccFRc2UG.s page 14 218:Src/stm32g4xx_hal_msp.c **** } 219:Src/stm32g4xx_hal_msp.c **** 220:Src/stm32g4xx_hal_msp.c **** /**ADC1 GPIO Configuration 221:Src/stm32g4xx_hal_msp.c **** PB0 ------> ADC1_IN15 222:Src/stm32g4xx_hal_msp.c **** */ 223:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(AUDIO_IN_GPIO_Port, AUDIO_IN_Pin); 224:Src/stm32g4xx_hal_msp.c **** 225:Src/stm32g4xx_hal_msp.c **** /* ADC1 interrupt DeInit */ 226:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */ 227:Src/stm32g4xx_hal_msp.c **** /** 228:Src/stm32g4xx_hal_msp.c **** * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt 229:Src/stm32g4xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs 230:Src/stm32g4xx_hal_msp.c **** */ 231:Src/stm32g4xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */ 232:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1:ADC1_2_IRQn disable */ 233:Src/stm32g4xx_hal_msp.c **** 234:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ 235:Src/stm32g4xx_hal_msp.c **** 236:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ 237:Src/stm32g4xx_hal_msp.c **** } 238:Src/stm32g4xx_hal_msp.c **** else if(hadc->Instance==ADC2) 437 .loc 1 238 8 is_stmt 1 view .LVU127 438 .loc 1 238 10 is_stmt 0 view .LVU128 439 000c 124A ldr r2, .L31 440 000e 9342 cmp r3, r2 441 0010 0FD0 beq .L30 442 .LVL21: 443 .L23: 239:Src/stm32g4xx_hal_msp.c **** { 240:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 0 */ 241:Src/stm32g4xx_hal_msp.c **** 242:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 0 */ 243:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 244:Src/stm32g4xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 245:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 246:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 247:Src/stm32g4xx_hal_msp.c **** } 248:Src/stm32g4xx_hal_msp.c **** 249:Src/stm32g4xx_hal_msp.c **** /**ADC2 GPIO Configuration 250:Src/stm32g4xx_hal_msp.c **** PA4 ------> ADC2_IN17 251:Src/stm32g4xx_hal_msp.c **** PA5 ------> ADC2_IN13 252:Src/stm32g4xx_hal_msp.c **** PA6 ------> ADC2_IN3 253:Src/stm32g4xx_hal_msp.c **** PA7 ------> ADC2_IN4 254:Src/stm32g4xx_hal_msp.c **** */ 255:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, TEMPERATURA_Pin|CORRENTE_Pin|DIRETTA_Pin|RIFLESSA_Pin); 256:Src/stm32g4xx_hal_msp.c **** 257:Src/stm32g4xx_hal_msp.c **** /* ADC2 DMA DeInit */ 258:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); 259:Src/stm32g4xx_hal_msp.c **** 260:Src/stm32g4xx_hal_msp.c **** /* ADC2 interrupt DeInit */ 261:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */ 262:Src/stm32g4xx_hal_msp.c **** /** 263:Src/stm32g4xx_hal_msp.c **** * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt 264:Src/stm32g4xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs 265:Src/stm32g4xx_hal_msp.c **** */ 266:Src/stm32g4xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */ 267:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2:ADC1_2_IRQn disable */ ARM GAS /tmp/ccFRc2UG.s page 15 268:Src/stm32g4xx_hal_msp.c **** 269:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */ 270:Src/stm32g4xx_hal_msp.c **** 271:Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 1 */ 272:Src/stm32g4xx_hal_msp.c **** } 273:Src/stm32g4xx_hal_msp.c **** 274:Src/stm32g4xx_hal_msp.c **** } 444 .loc 1 274 1 view .LVU129 445 0012 10BD pop {r4, pc} 446 .LVL22: 447 .L29: 215:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 448 .loc 1 215 5 is_stmt 1 view .LVU130 215:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 449 .loc 1 215 30 is_stmt 0 view .LVU131 450 0014 114A ldr r2, .L31+4 451 0016 1368 ldr r3, [r2] 452 0018 013B subs r3, r3, #1 453 001a 1360 str r3, [r2] 216:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 454 .loc 1 216 5 is_stmt 1 view .LVU132 216:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 455 .loc 1 216 7 is_stmt 0 view .LVU133 456 001c 23B9 cbnz r3, .L25 217:Src/stm32g4xx_hal_msp.c **** } 457 .loc 1 217 7 is_stmt 1 view .LVU134 458 001e 104A ldr r2, .L31+8 459 0020 D36C ldr r3, [r2, #76] 460 0022 23F40053 bic r3, r3, #8192 461 0026 D364 str r3, [r2, #76] 462 .L25: 223:Src/stm32g4xx_hal_msp.c **** 463 .loc 1 223 5 view .LVU135 464 0028 0121 movs r1, #1 465 002a 0E48 ldr r0, .L31+12 466 .LVL23: 223:Src/stm32g4xx_hal_msp.c **** 467 .loc 1 223 5 is_stmt 0 view .LVU136 468 002c FFF7FEFF bl HAL_GPIO_DeInit 469 .LVL24: 470 0030 EFE7 b .L23 471 .LVL25: 472 .L30: 244:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 473 .loc 1 244 5 is_stmt 1 view .LVU137 244:Src/stm32g4xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 474 .loc 1 244 30 is_stmt 0 view .LVU138 475 0032 0A4A ldr r2, .L31+4 476 0034 1368 ldr r3, [r2] 477 0036 013B subs r3, r3, #1 478 0038 1360 str r3, [r2] 245:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 479 .loc 1 245 5 is_stmt 1 view .LVU139 245:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 480 .loc 1 245 7 is_stmt 0 view .LVU140 481 003a 23B9 cbnz r3, .L27 246:Src/stm32g4xx_hal_msp.c **** } ARM GAS /tmp/ccFRc2UG.s page 16 482 .loc 1 246 7 is_stmt 1 view .LVU141 483 003c 084A ldr r2, .L31+8 484 003e D36C ldr r3, [r2, #76] 485 0040 23F40053 bic r3, r3, #8192 486 0044 D364 str r3, [r2, #76] 487 .L27: 255:Src/stm32g4xx_hal_msp.c **** 488 .loc 1 255 5 view .LVU142 489 0046 F021 movs r1, #240 490 0048 4FF09040 mov r0, #1207959552 491 .LVL26: 255:Src/stm32g4xx_hal_msp.c **** 492 .loc 1 255 5 is_stmt 0 view .LVU143 493 004c FFF7FEFF bl HAL_GPIO_DeInit 494 .LVL27: 258:Src/stm32g4xx_hal_msp.c **** 495 .loc 1 258 5 is_stmt 1 view .LVU144 496 0050 606D ldr r0, [r4, #84] 497 0052 FFF7FEFF bl HAL_DMA_DeInit 498 .LVL28: 499 .loc 1 274 1 is_stmt 0 view .LVU145 500 0056 DCE7 b .L23 501 .L32: 502 .align 2 503 .L31: 504 0058 00010050 .word 1342177536 505 005c 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 506 0060 00100240 .word 1073876992 507 0064 00040048 .word 1207960576 508 .cfi_endproc 509 .LFE331: 511 .section .text.HAL_I2C_MspInit,"ax",%progbits 512 .align 1 513 .global HAL_I2C_MspInit 514 .syntax unified 515 .thumb 516 .thumb_func 518 HAL_I2C_MspInit: 519 .LVL29: 520 .LFB332: 275:Src/stm32g4xx_hal_msp.c **** 276:Src/stm32g4xx_hal_msp.c **** /** 277:Src/stm32g4xx_hal_msp.c **** * @brief I2C MSP Initialization 278:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example 279:Src/stm32g4xx_hal_msp.c **** * @param hi2c: I2C handle pointer 280:Src/stm32g4xx_hal_msp.c **** * @retval None 281:Src/stm32g4xx_hal_msp.c **** */ 282:Src/stm32g4xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 283:Src/stm32g4xx_hal_msp.c **** { 521 .loc 1 283 1 is_stmt 1 view -0 522 .cfi_startproc 523 @ args = 0, pretend = 0, frame = 104 524 @ frame_needed = 0, uses_anonymous_args = 0 525 .loc 1 283 1 is_stmt 0 view .LVU147 526 0000 F0B5 push {r4, r5, r6, r7, lr} 527 .LCFI8: 528 .cfi_def_cfa_offset 20 ARM GAS /tmp/ccFRc2UG.s page 17 529 .cfi_offset 4, -20 530 .cfi_offset 5, -16 531 .cfi_offset 6, -12 532 .cfi_offset 7, -8 533 .cfi_offset 14, -4 534 0002 9BB0 sub sp, sp, #108 535 .LCFI9: 536 .cfi_def_cfa_offset 128 537 0004 0446 mov r4, r0 284:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 538 .loc 1 284 3 is_stmt 1 view .LVU148 539 .loc 1 284 20 is_stmt 0 view .LVU149 540 0006 0021 movs r1, #0 541 0008 1591 str r1, [sp, #84] 542 000a 1691 str r1, [sp, #88] 543 000c 1791 str r1, [sp, #92] 544 000e 1891 str r1, [sp, #96] 545 0010 1991 str r1, [sp, #100] 285:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 546 .loc 1 285 3 is_stmt 1 view .LVU150 547 .loc 1 285 28 is_stmt 0 view .LVU151 548 0012 4422 movs r2, #68 549 0014 04A8 add r0, sp, #16 550 .LVL30: 551 .loc 1 285 28 view .LVU152 552 0016 FFF7FEFF bl memset 553 .LVL31: 286:Src/stm32g4xx_hal_msp.c **** if(hi2c->Instance==I2C1) 554 .loc 1 286 3 is_stmt 1 view .LVU153 555 .loc 1 286 10 is_stmt 0 view .LVU154 556 001a 2268 ldr r2, [r4] 557 .loc 1 286 5 view .LVU155 558 001c 224B ldr r3, .L39 559 001e 9A42 cmp r2, r3 560 0020 01D0 beq .L37 561 .LVL32: 562 .L33: 287:Src/stm32g4xx_hal_msp.c **** { 288:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ 289:Src/stm32g4xx_hal_msp.c **** 290:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */ 291:Src/stm32g4xx_hal_msp.c **** 292:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks 293:Src/stm32g4xx_hal_msp.c **** */ 294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1; 295:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; 296:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 297:Src/stm32g4xx_hal_msp.c **** { 298:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 299:Src/stm32g4xx_hal_msp.c **** } 300:Src/stm32g4xx_hal_msp.c **** 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 302:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 303:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 304:Src/stm32g4xx_hal_msp.c **** PA15 ------> I2C1_SCL 305:Src/stm32g4xx_hal_msp.c **** PB7 ------> I2C1_SDA 306:Src/stm32g4xx_hal_msp.c **** */ ARM GAS /tmp/ccFRc2UG.s page 18 307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; 308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 311:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 312:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 313:Src/stm32g4xx_hal_msp.c **** 314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_7; 315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 318:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 319:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 320:Src/stm32g4xx_hal_msp.c **** 321:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 322:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE(); 323:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 324:Src/stm32g4xx_hal_msp.c **** 325:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */ 326:Src/stm32g4xx_hal_msp.c **** 327:Src/stm32g4xx_hal_msp.c **** } 328:Src/stm32g4xx_hal_msp.c **** 329:Src/stm32g4xx_hal_msp.c **** } 563 .loc 1 329 1 view .LVU156 564 0022 1BB0 add sp, sp, #108 565 .LCFI10: 566 .cfi_remember_state 567 .cfi_def_cfa_offset 20 568 @ sp needed 569 0024 F0BD pop {r4, r5, r6, r7, pc} 570 .LVL33: 571 .L37: 572 .LCFI11: 573 .cfi_restore_state 294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; 574 .loc 1 294 5 is_stmt 1 view .LVU157 294:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; 575 .loc 1 294 40 is_stmt 0 view .LVU158 576 0026 4023 movs r3, #64 577 0028 0493 str r3, [sp, #16] 295:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 578 .loc 1 295 5 is_stmt 1 view .LVU159 296:Src/stm32g4xx_hal_msp.c **** { 579 .loc 1 296 5 view .LVU160 296:Src/stm32g4xx_hal_msp.c **** { 580 .loc 1 296 9 is_stmt 0 view .LVU161 581 002a 04A8 add r0, sp, #16 582 002c FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 583 .LVL34: 296:Src/stm32g4xx_hal_msp.c **** { 584 .loc 1 296 8 discriminator 1 view .LVU162 585 0030 0028 cmp r0, #0 586 0032 35D1 bne .L38 587 .L35: 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 588 .loc 1 301 5 is_stmt 1 view .LVU163 589 .LBB8: ARM GAS /tmp/ccFRc2UG.s page 19 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 590 .loc 1 301 5 view .LVU164 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 591 .loc 1 301 5 view .LVU165 592 0034 1D4C ldr r4, .L39+4 593 .LVL35: 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 594 .loc 1 301 5 is_stmt 0 view .LVU166 595 0036 E36C ldr r3, [r4, #76] 596 0038 43F00103 orr r3, r3, #1 597 003c E364 str r3, [r4, #76] 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 598 .loc 1 301 5 is_stmt 1 view .LVU167 599 003e E36C ldr r3, [r4, #76] 600 0040 03F00103 and r3, r3, #1 601 0044 0193 str r3, [sp, #4] 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 602 .loc 1 301 5 view .LVU168 603 0046 019B ldr r3, [sp, #4] 604 .LBE8: 301:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 605 .loc 1 301 5 view .LVU169 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 606 .loc 1 302 5 view .LVU170 607 .LBB9: 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 608 .loc 1 302 5 view .LVU171 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 609 .loc 1 302 5 view .LVU172 610 0048 E36C ldr r3, [r4, #76] 611 004a 43F00203 orr r3, r3, #2 612 004e E364 str r3, [r4, #76] 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 613 .loc 1 302 5 view .LVU173 614 0050 E36C ldr r3, [r4, #76] 615 0052 03F00203 and r3, r3, #2 616 0056 0293 str r3, [sp, #8] 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 617 .loc 1 302 5 view .LVU174 618 0058 029B ldr r3, [sp, #8] 619 .LBE9: 302:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 620 .loc 1 302 5 view .LVU175 307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 621 .loc 1 307 5 view .LVU176 307:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 622 .loc 1 307 25 is_stmt 0 view .LVU177 623 005a 4FF40043 mov r3, #32768 624 005e 1593 str r3, [sp, #84] 308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 625 .loc 1 308 5 is_stmt 1 view .LVU178 308:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 626 .loc 1 308 26 is_stmt 0 view .LVU179 627 0060 1227 movs r7, #18 628 0062 1697 str r7, [sp, #88] 309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 629 .loc 1 309 5 is_stmt 1 view .LVU180 ARM GAS /tmp/ccFRc2UG.s page 20 309:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 630 .loc 1 309 26 is_stmt 0 view .LVU181 631 0064 0025 movs r5, #0 632 0066 1795 str r5, [sp, #92] 310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 633 .loc 1 310 5 is_stmt 1 view .LVU182 310:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 634 .loc 1 310 27 is_stmt 0 view .LVU183 635 0068 1895 str r5, [sp, #96] 311:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 636 .loc 1 311 5 is_stmt 1 view .LVU184 311:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 637 .loc 1 311 31 is_stmt 0 view .LVU185 638 006a 0426 movs r6, #4 639 006c 1996 str r6, [sp, #100] 312:Src/stm32g4xx_hal_msp.c **** 640 .loc 1 312 5 is_stmt 1 view .LVU186 641 006e 15A9 add r1, sp, #84 642 0070 4FF09040 mov r0, #1207959552 643 0074 FFF7FEFF bl HAL_GPIO_Init 644 .LVL36: 314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 645 .loc 1 314 5 view .LVU187 314:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 646 .loc 1 314 25 is_stmt 0 view .LVU188 647 0078 8023 movs r3, #128 648 007a 1593 str r3, [sp, #84] 315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 649 .loc 1 315 5 is_stmt 1 view .LVU189 315:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 650 .loc 1 315 26 is_stmt 0 view .LVU190 651 007c 1697 str r7, [sp, #88] 316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 652 .loc 1 316 5 is_stmt 1 view .LVU191 316:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 653 .loc 1 316 26 is_stmt 0 view .LVU192 654 007e 1795 str r5, [sp, #92] 317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 655 .loc 1 317 5 is_stmt 1 view .LVU193 317:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 656 .loc 1 317 27 is_stmt 0 view .LVU194 657 0080 1895 str r5, [sp, #96] 318:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 658 .loc 1 318 5 is_stmt 1 view .LVU195 318:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 659 .loc 1 318 31 is_stmt 0 view .LVU196 660 0082 1996 str r6, [sp, #100] 319:Src/stm32g4xx_hal_msp.c **** 661 .loc 1 319 5 is_stmt 1 view .LVU197 662 0084 15A9 add r1, sp, #84 663 0086 0A48 ldr r0, .L39+8 664 0088 FFF7FEFF bl HAL_GPIO_Init 665 .LVL37: 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 666 .loc 1 322 5 view .LVU198 667 .LBB10: 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ ARM GAS /tmp/ccFRc2UG.s page 21 668 .loc 1 322 5 view .LVU199 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 669 .loc 1 322 5 view .LVU200 670 008c A36D ldr r3, [r4, #88] 671 008e 43F40013 orr r3, r3, #2097152 672 0092 A365 str r3, [r4, #88] 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 673 .loc 1 322 5 view .LVU201 674 0094 A36D ldr r3, [r4, #88] 675 0096 03F40013 and r3, r3, #2097152 676 009a 0393 str r3, [sp, #12] 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 677 .loc 1 322 5 view .LVU202 678 009c 039B ldr r3, [sp, #12] 679 .LBE10: 322:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 680 .loc 1 322 5 discriminator 1 view .LVU203 681 .loc 1 329 1 is_stmt 0 view .LVU204 682 009e C0E7 b .L33 683 .LVL38: 684 .L38: 298:Src/stm32g4xx_hal_msp.c **** } 685 .loc 1 298 7 is_stmt 1 view .LVU205 686 00a0 FFF7FEFF bl Error_Handler 687 .LVL39: 688 00a4 C6E7 b .L35 689 .L40: 690 00a6 00BF .align 2 691 .L39: 692 00a8 00540040 .word 1073763328 693 00ac 00100240 .word 1073876992 694 00b0 00040048 .word 1207960576 695 .cfi_endproc 696 .LFE332: 698 .section .text.HAL_I2C_MspDeInit,"ax",%progbits 699 .align 1 700 .global HAL_I2C_MspDeInit 701 .syntax unified 702 .thumb 703 .thumb_func 705 HAL_I2C_MspDeInit: 706 .LVL40: 707 .LFB333: 330:Src/stm32g4xx_hal_msp.c **** 331:Src/stm32g4xx_hal_msp.c **** /** 332:Src/stm32g4xx_hal_msp.c **** * @brief I2C MSP De-Initialization 333:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 334:Src/stm32g4xx_hal_msp.c **** * @param hi2c: I2C handle pointer 335:Src/stm32g4xx_hal_msp.c **** * @retval None 336:Src/stm32g4xx_hal_msp.c **** */ 337:Src/stm32g4xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 338:Src/stm32g4xx_hal_msp.c **** { 708 .loc 1 338 1 view -0 709 .cfi_startproc 710 @ args = 0, pretend = 0, frame = 0 711 @ frame_needed = 0, uses_anonymous_args = 0 712 .loc 1 338 1 is_stmt 0 view .LVU207 ARM GAS /tmp/ccFRc2UG.s page 22 713 0000 08B5 push {r3, lr} 714 .LCFI12: 715 .cfi_def_cfa_offset 8 716 .cfi_offset 3, -8 717 .cfi_offset 14, -4 339:Src/stm32g4xx_hal_msp.c **** if(hi2c->Instance==I2C1) 718 .loc 1 339 3 is_stmt 1 view .LVU208 719 .loc 1 339 10 is_stmt 0 view .LVU209 720 0002 0268 ldr r2, [r0] 721 .loc 1 339 5 view .LVU210 722 0004 094B ldr r3, .L45 723 0006 9A42 cmp r2, r3 724 0008 00D0 beq .L44 725 .LVL41: 726 .L41: 340:Src/stm32g4xx_hal_msp.c **** { 341:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ 342:Src/stm32g4xx_hal_msp.c **** 343:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */ 344:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 345:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE(); 346:Src/stm32g4xx_hal_msp.c **** 347:Src/stm32g4xx_hal_msp.c **** /**I2C1 GPIO Configuration 348:Src/stm32g4xx_hal_msp.c **** PA15 ------> I2C1_SCL 349:Src/stm32g4xx_hal_msp.c **** PB7 ------> I2C1_SDA 350:Src/stm32g4xx_hal_msp.c **** */ 351:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15); 352:Src/stm32g4xx_hal_msp.c **** 353:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); 354:Src/stm32g4xx_hal_msp.c **** 355:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ 356:Src/stm32g4xx_hal_msp.c **** 357:Src/stm32g4xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */ 358:Src/stm32g4xx_hal_msp.c **** } 359:Src/stm32g4xx_hal_msp.c **** 360:Src/stm32g4xx_hal_msp.c **** } 727 .loc 1 360 1 view .LVU211 728 000a 08BD pop {r3, pc} 729 .LVL42: 730 .L44: 345:Src/stm32g4xx_hal_msp.c **** 731 .loc 1 345 5 is_stmt 1 view .LVU212 732 000c 084A ldr r2, .L45+4 733 000e 936D ldr r3, [r2, #88] 734 0010 23F40013 bic r3, r3, #2097152 735 0014 9365 str r3, [r2, #88] 351:Src/stm32g4xx_hal_msp.c **** 736 .loc 1 351 5 view .LVU213 737 0016 4FF40041 mov r1, #32768 738 001a 4FF09040 mov r0, #1207959552 739 .LVL43: 351:Src/stm32g4xx_hal_msp.c **** 740 .loc 1 351 5 is_stmt 0 view .LVU214 741 001e FFF7FEFF bl HAL_GPIO_DeInit 742 .LVL44: 353:Src/stm32g4xx_hal_msp.c **** 743 .loc 1 353 5 is_stmt 1 view .LVU215 ARM GAS /tmp/ccFRc2UG.s page 23 744 0022 8021 movs r1, #128 745 0024 0348 ldr r0, .L45+8 746 0026 FFF7FEFF bl HAL_GPIO_DeInit 747 .LVL45: 748 .loc 1 360 1 is_stmt 0 view .LVU216 749 002a EEE7 b .L41 750 .L46: 751 .align 2 752 .L45: 753 002c 00540040 .word 1073763328 754 0030 00100240 .word 1073876992 755 0034 00040048 .word 1207960576 756 .cfi_endproc 757 .LFE333: 759 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits 760 .align 1 761 .global HAL_TIM_Base_MspInit 762 .syntax unified 763 .thumb 764 .thumb_func 766 HAL_TIM_Base_MspInit: 767 .LVL46: 768 .LFB334: 361:Src/stm32g4xx_hal_msp.c **** 362:Src/stm32g4xx_hal_msp.c **** /** 363:Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization 364:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example 365:Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 366:Src/stm32g4xx_hal_msp.c **** * @retval None 367:Src/stm32g4xx_hal_msp.c **** */ 368:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) 369:Src/stm32g4xx_hal_msp.c **** { 769 .loc 1 369 1 is_stmt 1 view -0 770 .cfi_startproc 771 @ args = 0, pretend = 0, frame = 8 772 @ frame_needed = 0, uses_anonymous_args = 0 773 .loc 1 369 1 is_stmt 0 view .LVU218 774 0000 00B5 push {lr} 775 .LCFI13: 776 .cfi_def_cfa_offset 4 777 .cfi_offset 14, -4 778 0002 83B0 sub sp, sp, #12 779 .LCFI14: 780 .cfi_def_cfa_offset 16 370:Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM2) 781 .loc 1 370 3 is_stmt 1 view .LVU219 782 .loc 1 370 15 is_stmt 0 view .LVU220 783 0004 0368 ldr r3, [r0] 784 .loc 1 370 5 view .LVU221 785 0006 B3F1804F cmp r3, #1073741824 786 000a 05D0 beq .L51 371:Src/stm32g4xx_hal_msp.c **** { 372:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ 373:Src/stm32g4xx_hal_msp.c **** 374:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */ 375:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 376:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE(); ARM GAS /tmp/ccFRc2UG.s page 24 377:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0); 379:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn); 380:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 381:Src/stm32g4xx_hal_msp.c **** 382:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */ 383:Src/stm32g4xx_hal_msp.c **** } 384:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM3) 787 .loc 1 384 8 is_stmt 1 view .LVU222 788 .loc 1 384 10 is_stmt 0 view .LVU223 789 000c 164A ldr r2, .L53 790 000e 9342 cmp r3, r2 791 0010 16D0 beq .L52 792 .LVL47: 793 .L47: 385:Src/stm32g4xx_hal_msp.c **** { 386:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 0 */ 387:Src/stm32g4xx_hal_msp.c **** 388:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 0 */ 389:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 390:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_ENABLE(); 391:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); 393:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn); 394:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 395:Src/stm32g4xx_hal_msp.c **** 396:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 1 */ 397:Src/stm32g4xx_hal_msp.c **** } 398:Src/stm32g4xx_hal_msp.c **** 399:Src/stm32g4xx_hal_msp.c **** } 794 .loc 1 399 1 view .LVU224 795 0012 03B0 add sp, sp, #12 796 .LCFI15: 797 .cfi_remember_state 798 .cfi_def_cfa_offset 4 799 @ sp needed 800 0014 5DF804FB ldr pc, [sp], #4 801 .LVL48: 802 .L51: 803 .LCFI16: 804 .cfi_restore_state 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 805 .loc 1 376 5 is_stmt 1 view .LVU225 806 .LBB11: 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 807 .loc 1 376 5 view .LVU226 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 808 .loc 1 376 5 view .LVU227 809 0018 03F50433 add r3, r3, #135168 810 001c 9A6D ldr r2, [r3, #88] 811 001e 42F00102 orr r2, r2, #1 812 0022 9A65 str r2, [r3, #88] 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 813 .loc 1 376 5 view .LVU228 814 0024 9B6D ldr r3, [r3, #88] 815 0026 03F00103 and r3, r3, #1 816 002a 0093 str r3, [sp] ARM GAS /tmp/ccFRc2UG.s page 25 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 817 .loc 1 376 5 view .LVU229 818 002c 009B ldr r3, [sp] 819 .LBE11: 376:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt Init */ 820 .loc 1 376 5 view .LVU230 378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn); 821 .loc 1 378 5 view .LVU231 822 002e 0022 movs r2, #0 823 0030 1146 mov r1, r2 824 0032 1C20 movs r0, #28 825 .LVL49: 378:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM2_IRQn); 826 .loc 1 378 5 is_stmt 0 view .LVU232 827 0034 FFF7FEFF bl HAL_NVIC_SetPriority 828 .LVL50: 379:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 829 .loc 1 379 5 is_stmt 1 view .LVU233 830 0038 1C20 movs r0, #28 831 003a FFF7FEFF bl HAL_NVIC_EnableIRQ 832 .LVL51: 833 003e E8E7 b .L47 834 .LVL52: 835 .L52: 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 836 .loc 1 390 5 view .LVU234 837 .LBB12: 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 838 .loc 1 390 5 view .LVU235 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 839 .loc 1 390 5 view .LVU236 840 0040 0A4B ldr r3, .L53+4 841 0042 9A6D ldr r2, [r3, #88] 842 0044 42F00202 orr r2, r2, #2 843 0048 9A65 str r2, [r3, #88] 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 844 .loc 1 390 5 view .LVU237 845 004a 9B6D ldr r3, [r3, #88] 846 004c 03F00203 and r3, r3, #2 847 0050 0193 str r3, [sp, #4] 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 848 .loc 1 390 5 view .LVU238 849 0052 019B ldr r3, [sp, #4] 850 .LBE12: 390:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt Init */ 851 .loc 1 390 5 view .LVU239 392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn); 852 .loc 1 392 5 view .LVU240 853 0054 0022 movs r2, #0 854 0056 1146 mov r1, r2 855 0058 1D20 movs r0, #29 856 .LVL53: 392:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM3_IRQn); 857 .loc 1 392 5 is_stmt 0 view .LVU241 858 005a FFF7FEFF bl HAL_NVIC_SetPriority 859 .LVL54: 393:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ ARM GAS /tmp/ccFRc2UG.s page 26 860 .loc 1 393 5 is_stmt 1 view .LVU242 861 005e 1D20 movs r0, #29 862 0060 FFF7FEFF bl HAL_NVIC_EnableIRQ 863 .LVL55: 864 .loc 1 399 1 is_stmt 0 view .LVU243 865 0064 D5E7 b .L47 866 .L54: 867 0066 00BF .align 2 868 .L53: 869 0068 00040040 .word 1073742848 870 006c 00100240 .word 1073876992 871 .cfi_endproc 872 .LFE334: 874 .section .text.HAL_TIM_MspPostInit,"ax",%progbits 875 .align 1 876 .global HAL_TIM_MspPostInit 877 .syntax unified 878 .thumb 879 .thumb_func 881 HAL_TIM_MspPostInit: 882 .LVL56: 883 .LFB335: 400:Src/stm32g4xx_hal_msp.c **** 401:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) 402:Src/stm32g4xx_hal_msp.c **** { 884 .loc 1 402 1 is_stmt 1 view -0 885 .cfi_startproc 886 @ args = 0, pretend = 0, frame = 24 887 @ frame_needed = 0, uses_anonymous_args = 0 888 .loc 1 402 1 is_stmt 0 view .LVU245 889 0000 00B5 push {lr} 890 .LCFI17: 891 .cfi_def_cfa_offset 4 892 .cfi_offset 14, -4 893 0002 87B0 sub sp, sp, #28 894 .LCFI18: 895 .cfi_def_cfa_offset 32 403:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 896 .loc 1 403 3 is_stmt 1 view .LVU246 897 .loc 1 403 20 is_stmt 0 view .LVU247 898 0004 0023 movs r3, #0 899 0006 0193 str r3, [sp, #4] 900 0008 0293 str r3, [sp, #8] 901 000a 0393 str r3, [sp, #12] 902 000c 0493 str r3, [sp, #16] 903 000e 0593 str r3, [sp, #20] 404:Src/stm32g4xx_hal_msp.c **** if(htim->Instance==TIM2) 904 .loc 1 404 3 is_stmt 1 view .LVU248 905 .loc 1 404 10 is_stmt 0 view .LVU249 906 0010 0368 ldr r3, [r0] 907 .loc 1 404 5 view .LVU250 908 0012 B3F1804F cmp r3, #1073741824 909 0016 02D0 beq .L58 910 .LVL57: 911 .L55: 405:Src/stm32g4xx_hal_msp.c **** { 406:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ ARM GAS /tmp/ccFRc2UG.s page 27 407:Src/stm32g4xx_hal_msp.c **** 408:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */ 409:Src/stm32g4xx_hal_msp.c **** 410:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 411:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 412:Src/stm32g4xx_hal_msp.c **** PA0 ------> TIM2_CH1 413:Src/stm32g4xx_hal_msp.c **** PA1 ------> TIM2_CH2 414:Src/stm32g4xx_hal_msp.c **** PA2 ------> TIM2_CH3 415:Src/stm32g4xx_hal_msp.c **** PA3 ------> TIM2_CH4 416:Src/stm32g4xx_hal_msp.c **** */ 417:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; 418:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 419:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 420:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 421:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 422:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 423:Src/stm32g4xx_hal_msp.c **** 424:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ 425:Src/stm32g4xx_hal_msp.c **** 426:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */ 427:Src/stm32g4xx_hal_msp.c **** } 428:Src/stm32g4xx_hal_msp.c **** 429:Src/stm32g4xx_hal_msp.c **** } 912 .loc 1 429 1 view .LVU251 913 0018 07B0 add sp, sp, #28 914 .LCFI19: 915 .cfi_remember_state 916 .cfi_def_cfa_offset 4 917 @ sp needed 918 001a 5DF804FB ldr pc, [sp], #4 919 .LVL58: 920 .L58: 921 .LCFI20: 922 .cfi_restore_state 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 923 .loc 1 410 5 is_stmt 1 view .LVU252 924 .LBB13: 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 925 .loc 1 410 5 view .LVU253 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 926 .loc 1 410 5 view .LVU254 927 001e 03F50433 add r3, r3, #135168 928 0022 DA6C ldr r2, [r3, #76] 929 0024 42F00102 orr r2, r2, #1 930 0028 DA64 str r2, [r3, #76] 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 931 .loc 1 410 5 view .LVU255 932 002a DB6C ldr r3, [r3, #76] 933 002c 03F00103 and r3, r3, #1 934 0030 0093 str r3, [sp] 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 935 .loc 1 410 5 view .LVU256 936 0032 009B ldr r3, [sp] 937 .LBE13: 410:Src/stm32g4xx_hal_msp.c **** /**TIM2 GPIO Configuration 938 .loc 1 410 5 view .LVU257 417:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; ARM GAS /tmp/ccFRc2UG.s page 28 939 .loc 1 417 5 view .LVU258 417:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 940 .loc 1 417 25 is_stmt 0 view .LVU259 941 0034 0F23 movs r3, #15 942 0036 0193 str r3, [sp, #4] 418:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 943 .loc 1 418 5 is_stmt 1 view .LVU260 418:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 944 .loc 1 418 26 is_stmt 0 view .LVU261 945 0038 0223 movs r3, #2 946 003a 0293 str r3, [sp, #8] 419:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 947 .loc 1 419 5 is_stmt 1 view .LVU262 420:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 948 .loc 1 420 5 view .LVU263 421:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 949 .loc 1 421 5 view .LVU264 421:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 950 .loc 1 421 31 is_stmt 0 view .LVU265 951 003c 0123 movs r3, #1 952 003e 0593 str r3, [sp, #20] 422:Src/stm32g4xx_hal_msp.c **** 953 .loc 1 422 5 is_stmt 1 view .LVU266 954 0040 01A9 add r1, sp, #4 955 0042 4FF09040 mov r0, #1207959552 956 .LVL59: 422:Src/stm32g4xx_hal_msp.c **** 957 .loc 1 422 5 is_stmt 0 view .LVU267 958 0046 FFF7FEFF bl HAL_GPIO_Init 959 .LVL60: 960 .loc 1 429 1 view .LVU268 961 004a E5E7 b .L55 962 .cfi_endproc 963 .LFE335: 965 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits 966 .align 1 967 .global HAL_TIM_Base_MspDeInit 968 .syntax unified 969 .thumb 970 .thumb_func 972 HAL_TIM_Base_MspDeInit: 973 .LVL61: 974 .LFB336: 430:Src/stm32g4xx_hal_msp.c **** /** 431:Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization 432:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 433:Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 434:Src/stm32g4xx_hal_msp.c **** * @retval None 435:Src/stm32g4xx_hal_msp.c **** */ 436:Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) 437:Src/stm32g4xx_hal_msp.c **** { 975 .loc 1 437 1 is_stmt 1 view -0 976 .cfi_startproc 977 @ args = 0, pretend = 0, frame = 0 978 @ frame_needed = 0, uses_anonymous_args = 0 979 .loc 1 437 1 is_stmt 0 view .LVU270 980 0000 08B5 push {r3, lr} ARM GAS /tmp/ccFRc2UG.s page 29 981 .LCFI21: 982 .cfi_def_cfa_offset 8 983 .cfi_offset 3, -8 984 .cfi_offset 14, -4 438:Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM2) 985 .loc 1 438 3 is_stmt 1 view .LVU271 986 .loc 1 438 15 is_stmt 0 view .LVU272 987 0002 0368 ldr r3, [r0] 988 .loc 1 438 5 view .LVU273 989 0004 B3F1804F cmp r3, #1073741824 990 0008 03D0 beq .L63 439:Src/stm32g4xx_hal_msp.c **** { 440:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ 441:Src/stm32g4xx_hal_msp.c **** 442:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */ 443:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 444:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE(); 445:Src/stm32g4xx_hal_msp.c **** 446:Src/stm32g4xx_hal_msp.c **** /* TIM2 interrupt DeInit */ 447:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM2_IRQn); 448:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 449:Src/stm32g4xx_hal_msp.c **** 450:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */ 451:Src/stm32g4xx_hal_msp.c **** } 452:Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM3) 991 .loc 1 452 8 is_stmt 1 view .LVU274 992 .loc 1 452 10 is_stmt 0 view .LVU275 993 000a 0B4A ldr r2, .L65 994 000c 9342 cmp r3, r2 995 000e 09D0 beq .L64 996 .LVL62: 997 .L59: 453:Src/stm32g4xx_hal_msp.c **** { 454:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */ 455:Src/stm32g4xx_hal_msp.c **** 456:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 0 */ 457:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 458:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_DISABLE(); 459:Src/stm32g4xx_hal_msp.c **** 460:Src/stm32g4xx_hal_msp.c **** /* TIM3 interrupt DeInit */ 461:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM3_IRQn); 462:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 463:Src/stm32g4xx_hal_msp.c **** 464:Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 1 */ 465:Src/stm32g4xx_hal_msp.c **** } 466:Src/stm32g4xx_hal_msp.c **** 467:Src/stm32g4xx_hal_msp.c **** } 998 .loc 1 467 1 view .LVU276 999 0010 08BD pop {r3, pc} 1000 .LVL63: 1001 .L63: 444:Src/stm32g4xx_hal_msp.c **** 1002 .loc 1 444 5 is_stmt 1 view .LVU277 1003 0012 0A4A ldr r2, .L65+4 1004 0014 936D ldr r3, [r2, #88] 1005 0016 23F00103 bic r3, r3, #1 1006 001a 9365 str r3, [r2, #88] ARM GAS /tmp/ccFRc2UG.s page 30 447:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 1007 .loc 1 447 5 view .LVU278 1008 001c 1C20 movs r0, #28 1009 .LVL64: 447:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 1010 .loc 1 447 5 is_stmt 0 view .LVU279 1011 001e FFF7FEFF bl HAL_NVIC_DisableIRQ 1012 .LVL65: 1013 0022 F5E7 b .L59 1014 .LVL66: 1015 .L64: 458:Src/stm32g4xx_hal_msp.c **** 1016 .loc 1 458 5 is_stmt 1 view .LVU280 1017 0024 02F50332 add r2, r2, #134144 1018 0028 936D ldr r3, [r2, #88] 1019 002a 23F00203 bic r3, r3, #2 1020 002e 9365 str r3, [r2, #88] 461:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 1021 .loc 1 461 5 view .LVU281 1022 0030 1D20 movs r0, #29 1023 .LVL67: 461:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 1024 .loc 1 461 5 is_stmt 0 view .LVU282 1025 0032 FFF7FEFF bl HAL_NVIC_DisableIRQ 1026 .LVL68: 1027 .loc 1 467 1 view .LVU283 1028 0036 EBE7 b .L59 1029 .L66: 1030 .align 2 1031 .L65: 1032 0038 00040040 .word 1073742848 1033 003c 00100240 .word 1073876992 1034 .cfi_endproc 1035 .LFE336: 1037 .section .text.HAL_UART_MspInit,"ax",%progbits 1038 .align 1 1039 .global HAL_UART_MspInit 1040 .syntax unified 1041 .thumb 1042 .thumb_func 1044 HAL_UART_MspInit: 1045 .LVL69: 1046 .LFB337: 468:Src/stm32g4xx_hal_msp.c **** 469:Src/stm32g4xx_hal_msp.c **** /** 470:Src/stm32g4xx_hal_msp.c **** * @brief UART MSP Initialization 471:Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example 472:Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer 473:Src/stm32g4xx_hal_msp.c **** * @retval None 474:Src/stm32g4xx_hal_msp.c **** */ 475:Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 476:Src/stm32g4xx_hal_msp.c **** { 1047 .loc 1 476 1 is_stmt 1 view -0 1048 .cfi_startproc 1049 @ args = 0, pretend = 0, frame = 96 1050 @ frame_needed = 0, uses_anonymous_args = 0 1051 .loc 1 476 1 is_stmt 0 view .LVU285 ARM GAS /tmp/ccFRc2UG.s page 31 1052 0000 30B5 push {r4, r5, lr} 1053 .LCFI22: 1054 .cfi_def_cfa_offset 12 1055 .cfi_offset 4, -12 1056 .cfi_offset 5, -8 1057 .cfi_offset 14, -4 1058 0002 99B0 sub sp, sp, #100 1059 .LCFI23: 1060 .cfi_def_cfa_offset 112 1061 0004 0446 mov r4, r0 477:Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 1062 .loc 1 477 3 is_stmt 1 view .LVU286 1063 .loc 1 477 20 is_stmt 0 view .LVU287 1064 0006 0021 movs r1, #0 1065 0008 1391 str r1, [sp, #76] 1066 000a 1491 str r1, [sp, #80] 1067 000c 1591 str r1, [sp, #84] 1068 000e 1691 str r1, [sp, #88] 1069 0010 1791 str r1, [sp, #92] 478:Src/stm32g4xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1070 .loc 1 478 3 is_stmt 1 view .LVU288 1071 .loc 1 478 28 is_stmt 0 view .LVU289 1072 0012 4422 movs r2, #68 1073 0014 02A8 add r0, sp, #8 1074 .LVL70: 1075 .loc 1 478 28 view .LVU290 1076 0016 FFF7FEFF bl memset 1077 .LVL71: 479:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1) 1078 .loc 1 479 3 is_stmt 1 view .LVU291 1079 .loc 1 479 11 is_stmt 0 view .LVU292 1080 001a 2268 ldr r2, [r4] 1081 .loc 1 479 5 view .LVU293 1082 001c 344B ldr r3, .L77 1083 001e 9A42 cmp r2, r3 1084 0020 01D0 beq .L73 1085 .L67: 480:Src/stm32g4xx_hal_msp.c **** { 481:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */ 482:Src/stm32g4xx_hal_msp.c **** 483:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */ 484:Src/stm32g4xx_hal_msp.c **** 485:Src/stm32g4xx_hal_msp.c **** /** Initializes the peripherals clocks 486:Src/stm32g4xx_hal_msp.c **** */ 487:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 488:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 489:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 490:Src/stm32g4xx_hal_msp.c **** { 491:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 492:Src/stm32g4xx_hal_msp.c **** } 493:Src/stm32g4xx_hal_msp.c **** 494:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */ 495:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE(); 496:Src/stm32g4xx_hal_msp.c **** 497:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 498:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 499:Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX ARM GAS /tmp/ccFRc2UG.s page 32 500:Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX 501:Src/stm32g4xx_hal_msp.c **** */ 502:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 503:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 504:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 505:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 506:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 507:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 508:Src/stm32g4xx_hal_msp.c **** 509:Src/stm32g4xx_hal_msp.c **** /* USART1 DMA Init */ 510:Src/stm32g4xx_hal_msp.c **** /* USART1_RX Init */ 511:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Instance = DMA1_Channel3; 512:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX; 513:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 514:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 515:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 516:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 517:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 518:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL; 519:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 520:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 521:Src/stm32g4xx_hal_msp.c **** { 522:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 523:Src/stm32g4xx_hal_msp.c **** } 524:Src/stm32g4xx_hal_msp.c **** 525:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 526:Src/stm32g4xx_hal_msp.c **** 527:Src/stm32g4xx_hal_msp.c **** /* USART1_TX Init */ 528:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Instance = DMA1_Channel4; 529:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX; 530:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 531:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 532:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 533:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 534:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 535:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL; 536:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 537:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 538:Src/stm32g4xx_hal_msp.c **** { 539:Src/stm32g4xx_hal_msp.c **** Error_Handler(); 540:Src/stm32g4xx_hal_msp.c **** } 541:Src/stm32g4xx_hal_msp.c **** 542:Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 543:Src/stm32g4xx_hal_msp.c **** 544:Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt Init */ 545:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 546:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn); 547:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ 548:Src/stm32g4xx_hal_msp.c **** 549:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */ 550:Src/stm32g4xx_hal_msp.c **** 551:Src/stm32g4xx_hal_msp.c **** } 552:Src/stm32g4xx_hal_msp.c **** 553:Src/stm32g4xx_hal_msp.c **** } 1086 .loc 1 553 1 view .LVU294 1087 0022 19B0 add sp, sp, #100 1088 .LCFI24: ARM GAS /tmp/ccFRc2UG.s page 33 1089 .cfi_remember_state 1090 .cfi_def_cfa_offset 12 1091 @ sp needed 1092 0024 30BD pop {r4, r5, pc} 1093 .LVL72: 1094 .L73: 1095 .LCFI25: 1096 .cfi_restore_state 487:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 1097 .loc 1 487 5 is_stmt 1 view .LVU295 487:Src/stm32g4xx_hal_msp.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 1098 .loc 1 487 40 is_stmt 0 view .LVU296 1099 0026 0123 movs r3, #1 1100 0028 0293 str r3, [sp, #8] 488:Src/stm32g4xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1101 .loc 1 488 5 is_stmt 1 view .LVU297 489:Src/stm32g4xx_hal_msp.c **** { 1102 .loc 1 489 5 view .LVU298 489:Src/stm32g4xx_hal_msp.c **** { 1103 .loc 1 489 9 is_stmt 0 view .LVU299 1104 002a 02A8 add r0, sp, #8 1105 002c FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 1106 .LVL73: 489:Src/stm32g4xx_hal_msp.c **** { 1107 .loc 1 489 8 discriminator 1 view .LVU300 1108 0030 0028 cmp r0, #0 1109 0032 53D1 bne .L74 1110 .L69: 495:Src/stm32g4xx_hal_msp.c **** 1111 .loc 1 495 5 is_stmt 1 view .LVU301 1112 .LBB14: 495:Src/stm32g4xx_hal_msp.c **** 1113 .loc 1 495 5 view .LVU302 495:Src/stm32g4xx_hal_msp.c **** 1114 .loc 1 495 5 view .LVU303 1115 0034 2F4B ldr r3, .L77+4 1116 0036 1A6E ldr r2, [r3, #96] 1117 0038 42F48042 orr r2, r2, #16384 1118 003c 1A66 str r2, [r3, #96] 495:Src/stm32g4xx_hal_msp.c **** 1119 .loc 1 495 5 view .LVU304 1120 003e 1A6E ldr r2, [r3, #96] 1121 0040 02F48042 and r2, r2, #16384 1122 0044 0092 str r2, [sp] 495:Src/stm32g4xx_hal_msp.c **** 1123 .loc 1 495 5 view .LVU305 1124 0046 009A ldr r2, [sp] 1125 .LBE14: 495:Src/stm32g4xx_hal_msp.c **** 1126 .loc 1 495 5 view .LVU306 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1127 .loc 1 497 5 view .LVU307 1128 .LBB15: 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1129 .loc 1 497 5 view .LVU308 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1130 .loc 1 497 5 view .LVU309 ARM GAS /tmp/ccFRc2UG.s page 34 1131 0048 DA6C ldr r2, [r3, #76] 1132 004a 42F00102 orr r2, r2, #1 1133 004e DA64 str r2, [r3, #76] 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1134 .loc 1 497 5 view .LVU310 1135 0050 DB6C ldr r3, [r3, #76] 1136 0052 03F00103 and r3, r3, #1 1137 0056 0193 str r3, [sp, #4] 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1138 .loc 1 497 5 view .LVU311 1139 0058 019B ldr r3, [sp, #4] 1140 .LBE15: 497:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 1141 .loc 1 497 5 view .LVU312 502:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1142 .loc 1 502 5 view .LVU313 502:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1143 .loc 1 502 25 is_stmt 0 view .LVU314 1144 005a 4FF4C063 mov r3, #1536 1145 005e 1393 str r3, [sp, #76] 503:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1146 .loc 1 503 5 is_stmt 1 view .LVU315 503:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1147 .loc 1 503 26 is_stmt 0 view .LVU316 1148 0060 0223 movs r3, #2 1149 0062 1493 str r3, [sp, #80] 504:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 1150 .loc 1 504 5 is_stmt 1 view .LVU317 504:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 1151 .loc 1 504 26 is_stmt 0 view .LVU318 1152 0064 0025 movs r5, #0 1153 0066 1595 str r5, [sp, #84] 505:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1154 .loc 1 505 5 is_stmt 1 view .LVU319 505:Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1155 .loc 1 505 27 is_stmt 0 view .LVU320 1156 0068 1693 str r3, [sp, #88] 506:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1157 .loc 1 506 5 is_stmt 1 view .LVU321 506:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1158 .loc 1 506 31 is_stmt 0 view .LVU322 1159 006a 0723 movs r3, #7 1160 006c 1793 str r3, [sp, #92] 507:Src/stm32g4xx_hal_msp.c **** 1161 .loc 1 507 5 is_stmt 1 view .LVU323 1162 006e 13A9 add r1, sp, #76 1163 0070 4FF09040 mov r0, #1207959552 1164 0074 FFF7FEFF bl HAL_GPIO_Init 1165 .LVL74: 511:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX; 1166 .loc 1 511 5 view .LVU324 511:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX; 1167 .loc 1 511 29 is_stmt 0 view .LVU325 1168 0078 1F48 ldr r0, .L77+8 1169 007a 204B ldr r3, .L77+12 1170 007c 0360 str r3, [r0] 512:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; ARM GAS /tmp/ccFRc2UG.s page 35 1171 .loc 1 512 5 is_stmt 1 view .LVU326 512:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 1172 .loc 1 512 33 is_stmt 0 view .LVU327 1173 007e 1823 movs r3, #24 1174 0080 4360 str r3, [r0, #4] 513:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 1175 .loc 1 513 5 is_stmt 1 view .LVU328 513:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 1176 .loc 1 513 35 is_stmt 0 view .LVU329 1177 0082 8560 str r5, [r0, #8] 514:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 1178 .loc 1 514 5 is_stmt 1 view .LVU330 514:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 1179 .loc 1 514 35 is_stmt 0 view .LVU331 1180 0084 C560 str r5, [r0, #12] 515:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 1181 .loc 1 515 5 is_stmt 1 view .LVU332 515:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 1182 .loc 1 515 32 is_stmt 0 view .LVU333 1183 0086 8023 movs r3, #128 1184 0088 0361 str r3, [r0, #16] 516:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 1185 .loc 1 516 5 is_stmt 1 view .LVU334 516:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 1186 .loc 1 516 45 is_stmt 0 view .LVU335 1187 008a 4561 str r5, [r0, #20] 517:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL; 1188 .loc 1 517 5 is_stmt 1 view .LVU336 517:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Mode = DMA_NORMAL; 1189 .loc 1 517 42 is_stmt 0 view .LVU337 1190 008c 8561 str r5, [r0, #24] 518:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 1191 .loc 1 518 5 is_stmt 1 view .LVU338 518:Src/stm32g4xx_hal_msp.c **** hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 1192 .loc 1 518 30 is_stmt 0 view .LVU339 1193 008e C561 str r5, [r0, #28] 519:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 1194 .loc 1 519 5 is_stmt 1 view .LVU340 519:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 1195 .loc 1 519 34 is_stmt 0 view .LVU341 1196 0090 0562 str r5, [r0, #32] 520:Src/stm32g4xx_hal_msp.c **** { 1197 .loc 1 520 5 is_stmt 1 view .LVU342 520:Src/stm32g4xx_hal_msp.c **** { 1198 .loc 1 520 9 is_stmt 0 view .LVU343 1199 0092 FFF7FEFF bl HAL_DMA_Init 1200 .LVL75: 520:Src/stm32g4xx_hal_msp.c **** { 1201 .loc 1 520 8 discriminator 1 view .LVU344 1202 0096 20BB cbnz r0, .L75 1203 .L70: 525:Src/stm32g4xx_hal_msp.c **** 1204 .loc 1 525 5 is_stmt 1 view .LVU345 525:Src/stm32g4xx_hal_msp.c **** 1205 .loc 1 525 5 view .LVU346 1206 0098 174B ldr r3, .L77+8 1207 009a C4F88030 str r3, [r4, #128] ARM GAS /tmp/ccFRc2UG.s page 36 525:Src/stm32g4xx_hal_msp.c **** 1208 .loc 1 525 5 view .LVU347 1209 009e 9C62 str r4, [r3, #40] 525:Src/stm32g4xx_hal_msp.c **** 1210 .loc 1 525 5 view .LVU348 528:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX; 1211 .loc 1 528 5 view .LVU349 528:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX; 1212 .loc 1 528 29 is_stmt 0 view .LVU350 1213 00a0 1748 ldr r0, .L77+16 1214 00a2 184B ldr r3, .L77+20 1215 00a4 0360 str r3, [r0] 529:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 1216 .loc 1 529 5 is_stmt 1 view .LVU351 529:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 1217 .loc 1 529 33 is_stmt 0 view .LVU352 1218 00a6 1923 movs r3, #25 1219 00a8 4360 str r3, [r0, #4] 530:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 1220 .loc 1 530 5 is_stmt 1 view .LVU353 530:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 1221 .loc 1 530 35 is_stmt 0 view .LVU354 1222 00aa 1023 movs r3, #16 1223 00ac 8360 str r3, [r0, #8] 531:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 1224 .loc 1 531 5 is_stmt 1 view .LVU355 531:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 1225 .loc 1 531 35 is_stmt 0 view .LVU356 1226 00ae 0023 movs r3, #0 1227 00b0 C360 str r3, [r0, #12] 532:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 1228 .loc 1 532 5 is_stmt 1 view .LVU357 532:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 1229 .loc 1 532 32 is_stmt 0 view .LVU358 1230 00b2 8022 movs r2, #128 1231 00b4 0261 str r2, [r0, #16] 533:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 1232 .loc 1 533 5 is_stmt 1 view .LVU359 533:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 1233 .loc 1 533 45 is_stmt 0 view .LVU360 1234 00b6 4361 str r3, [r0, #20] 534:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL; 1235 .loc 1 534 5 is_stmt 1 view .LVU361 534:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL; 1236 .loc 1 534 42 is_stmt 0 view .LVU362 1237 00b8 8361 str r3, [r0, #24] 535:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 1238 .loc 1 535 5 is_stmt 1 view .LVU363 535:Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 1239 .loc 1 535 30 is_stmt 0 view .LVU364 1240 00ba C361 str r3, [r0, #28] 536:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 1241 .loc 1 536 5 is_stmt 1 view .LVU365 536:Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 1242 .loc 1 536 34 is_stmt 0 view .LVU366 1243 00bc 0362 str r3, [r0, #32] 537:Src/stm32g4xx_hal_msp.c **** { ARM GAS /tmp/ccFRc2UG.s page 37 1244 .loc 1 537 5 is_stmt 1 view .LVU367 537:Src/stm32g4xx_hal_msp.c **** { 1245 .loc 1 537 9 is_stmt 0 view .LVU368 1246 00be FFF7FEFF bl HAL_DMA_Init 1247 .LVL76: 537:Src/stm32g4xx_hal_msp.c **** { 1248 .loc 1 537 8 discriminator 1 view .LVU369 1249 00c2 88B9 cbnz r0, .L76 1250 .L71: 542:Src/stm32g4xx_hal_msp.c **** 1251 .loc 1 542 5 is_stmt 1 view .LVU370 542:Src/stm32g4xx_hal_msp.c **** 1252 .loc 1 542 5 view .LVU371 1253 00c4 0E4B ldr r3, .L77+16 1254 00c6 E367 str r3, [r4, #124] 542:Src/stm32g4xx_hal_msp.c **** 1255 .loc 1 542 5 view .LVU372 1256 00c8 9C62 str r4, [r3, #40] 542:Src/stm32g4xx_hal_msp.c **** 1257 .loc 1 542 5 view .LVU373 545:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn); 1258 .loc 1 545 5 view .LVU374 1259 00ca 0022 movs r2, #0 1260 00cc 1146 mov r1, r2 1261 00ce 2520 movs r0, #37 1262 00d0 FFF7FEFF bl HAL_NVIC_SetPriority 1263 .LVL77: 546:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ 1264 .loc 1 546 5 view .LVU375 1265 00d4 2520 movs r0, #37 1266 00d6 FFF7FEFF bl HAL_NVIC_EnableIRQ 1267 .LVL78: 1268 .loc 1 553 1 is_stmt 0 view .LVU376 1269 00da A2E7 b .L67 1270 .L74: 491:Src/stm32g4xx_hal_msp.c **** } 1271 .loc 1 491 7 is_stmt 1 view .LVU377 1272 00dc FFF7FEFF bl Error_Handler 1273 .LVL79: 1274 00e0 A8E7 b .L69 1275 .L75: 522:Src/stm32g4xx_hal_msp.c **** } 1276 .loc 1 522 7 view .LVU378 1277 00e2 FFF7FEFF bl Error_Handler 1278 .LVL80: 1279 00e6 D7E7 b .L70 1280 .L76: 539:Src/stm32g4xx_hal_msp.c **** } 1281 .loc 1 539 7 view .LVU379 1282 00e8 FFF7FEFF bl Error_Handler 1283 .LVL81: 1284 00ec EAE7 b .L71 1285 .L78: 1286 00ee 00BF .align 2 1287 .L77: 1288 00f0 00380140 .word 1073821696 1289 00f4 00100240 .word 1073876992 ARM GAS /tmp/ccFRc2UG.s page 38 1290 00f8 00000000 .word hdma_usart1_rx 1291 00fc 30000240 .word 1073872944 1292 0100 00000000 .word hdma_usart1_tx 1293 0104 44000240 .word 1073872964 1294 .cfi_endproc 1295 .LFE337: 1297 .section .text.HAL_UART_MspDeInit,"ax",%progbits 1298 .align 1 1299 .global HAL_UART_MspDeInit 1300 .syntax unified 1301 .thumb 1302 .thumb_func 1304 HAL_UART_MspDeInit: 1305 .LVL82: 1306 .LFB338: 554:Src/stm32g4xx_hal_msp.c **** 555:Src/stm32g4xx_hal_msp.c **** /** 556:Src/stm32g4xx_hal_msp.c **** * @brief UART MSP De-Initialization 557:Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 558:Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer 559:Src/stm32g4xx_hal_msp.c **** * @retval None 560:Src/stm32g4xx_hal_msp.c **** */ 561:Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 562:Src/stm32g4xx_hal_msp.c **** { 1307 .loc 1 562 1 view -0 1308 .cfi_startproc 1309 @ args = 0, pretend = 0, frame = 0 1310 @ frame_needed = 0, uses_anonymous_args = 0 563:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1) 1311 .loc 1 563 3 view .LVU381 1312 .loc 1 563 11 is_stmt 0 view .LVU382 1313 0000 0268 ldr r2, [r0] 1314 .loc 1 563 5 view .LVU383 1315 0002 0E4B ldr r3, .L86 1316 0004 9A42 cmp r2, r3 1317 0006 00D0 beq .L85 1318 0008 7047 bx lr 1319 .L85: 562:Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1) 1320 .loc 1 562 1 view .LVU384 1321 000a 10B5 push {r4, lr} 1322 .LCFI26: 1323 .cfi_def_cfa_offset 8 1324 .cfi_offset 4, -8 1325 .cfi_offset 14, -4 1326 000c 0446 mov r4, r0 564:Src/stm32g4xx_hal_msp.c **** { 565:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */ 566:Src/stm32g4xx_hal_msp.c **** 567:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */ 568:Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */ 569:Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE(); 1327 .loc 1 569 5 is_stmt 1 view .LVU385 1328 000e 0C4A ldr r2, .L86+4 1329 0010 136E ldr r3, [r2, #96] 1330 0012 23F48043 bic r3, r3, #16384 1331 0016 1366 str r3, [r2, #96] ARM GAS /tmp/ccFRc2UG.s page 39 570:Src/stm32g4xx_hal_msp.c **** 571:Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration 572:Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX 573:Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX 574:Src/stm32g4xx_hal_msp.c **** */ 575:Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); 1332 .loc 1 575 5 view .LVU386 1333 0018 4FF4C061 mov r1, #1536 1334 001c 4FF09040 mov r0, #1207959552 1335 .LVL83: 1336 .loc 1 575 5 is_stmt 0 view .LVU387 1337 0020 FFF7FEFF bl HAL_GPIO_DeInit 1338 .LVL84: 576:Src/stm32g4xx_hal_msp.c **** 577:Src/stm32g4xx_hal_msp.c **** /* USART1 DMA DeInit */ 578:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(huart->hdmarx); 1339 .loc 1 578 5 is_stmt 1 view .LVU388 1340 0024 D4F88000 ldr r0, [r4, #128] 1341 0028 FFF7FEFF bl HAL_DMA_DeInit 1342 .LVL85: 579:Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(huart->hdmatx); 1343 .loc 1 579 5 view .LVU389 1344 002c E06F ldr r0, [r4, #124] 1345 002e FFF7FEFF bl HAL_DMA_DeInit 1346 .LVL86: 580:Src/stm32g4xx_hal_msp.c **** 581:Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt DeInit */ 582:Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USART1_IRQn); 1347 .loc 1 582 5 view .LVU390 1348 0032 2520 movs r0, #37 1349 0034 FFF7FEFF bl HAL_NVIC_DisableIRQ 1350 .LVL87: 583:Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */ 584:Src/stm32g4xx_hal_msp.c **** 585:Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */ 586:Src/stm32g4xx_hal_msp.c **** } 587:Src/stm32g4xx_hal_msp.c **** 588:Src/stm32g4xx_hal_msp.c **** } 1351 .loc 1 588 1 is_stmt 0 view .LVU391 1352 0038 10BD pop {r4, pc} 1353 .LVL88: 1354 .L87: 1355 .loc 1 588 1 view .LVU392 1356 003a 00BF .align 2 1357 .L86: 1358 003c 00380140 .word 1073821696 1359 0040 00100240 .word 1073876992 1360 .cfi_endproc 1361 .LFE338: 1363 .section .bss.HAL_RCC_ADC12_CLK_ENABLED,"aw",%nobits 1364 .align 2 1367 HAL_RCC_ADC12_CLK_ENABLED: 1368 0000 00000000 .space 4 1369 .text 1370 .Letext0: 1371 .file 2 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 1372 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach ARM GAS /tmp/ccFRc2UG.s page 40 1373 .file 4 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/ 1374 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 1375 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 1376 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h" 1377 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h" 1378 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h" 1379 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h" 1380 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h" 1381 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h" 1382 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h" 1383 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h" 1384 .file 15 "Inc/main.h" 1385 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h" 1386 .file 17 "" ARM GAS /tmp/ccFRc2UG.s page 41 DEFINED SYMBOLS *ABS*:00000000 stm32g4xx_hal_msp.c /tmp/ccFRc2UG.s:21 .text.HAL_MspInit:00000000 $t /tmp/ccFRc2UG.s:27 .text.HAL_MspInit:00000000 HAL_MspInit /tmp/ccFRc2UG.s:83 .text.HAL_MspInit:00000034 $d /tmp/ccFRc2UG.s:88 .text.HAL_ADC_MspInit:00000000 $t /tmp/ccFRc2UG.s:94 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit /tmp/ccFRc2UG.s:401 .text.HAL_ADC_MspInit:00000150 $d /tmp/ccFRc2UG.s:1367 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 HAL_RCC_ADC12_CLK_ENABLED /tmp/ccFRc2UG.s:411 .text.HAL_ADC_MspDeInit:00000000 $t /tmp/ccFRc2UG.s:417 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit /tmp/ccFRc2UG.s:504 .text.HAL_ADC_MspDeInit:00000058 $d /tmp/ccFRc2UG.s:512 .text.HAL_I2C_MspInit:00000000 $t /tmp/ccFRc2UG.s:518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit /tmp/ccFRc2UG.s:692 .text.HAL_I2C_MspInit:000000a8 $d /tmp/ccFRc2UG.s:699 .text.HAL_I2C_MspDeInit:00000000 $t /tmp/ccFRc2UG.s:705 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit /tmp/ccFRc2UG.s:753 .text.HAL_I2C_MspDeInit:0000002c $d /tmp/ccFRc2UG.s:760 .text.HAL_TIM_Base_MspInit:00000000 $t /tmp/ccFRc2UG.s:766 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit /tmp/ccFRc2UG.s:869 .text.HAL_TIM_Base_MspInit:00000068 $d /tmp/ccFRc2UG.s:875 .text.HAL_TIM_MspPostInit:00000000 $t /tmp/ccFRc2UG.s:881 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit /tmp/ccFRc2UG.s:966 .text.HAL_TIM_Base_MspDeInit:00000000 $t /tmp/ccFRc2UG.s:972 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit /tmp/ccFRc2UG.s:1032 .text.HAL_TIM_Base_MspDeInit:00000038 $d /tmp/ccFRc2UG.s:1038 .text.HAL_UART_MspInit:00000000 $t /tmp/ccFRc2UG.s:1044 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit /tmp/ccFRc2UG.s:1288 .text.HAL_UART_MspInit:000000f0 $d /tmp/ccFRc2UG.s:1298 .text.HAL_UART_MspDeInit:00000000 $t /tmp/ccFRc2UG.s:1304 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit /tmp/ccFRc2UG.s:1358 .text.HAL_UART_MspDeInit:0000003c $d /tmp/ccFRc2UG.s:1364 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 $d UNDEFINED SYMBOLS HAL_PWREx_DisableUCPDDeadBattery memset HAL_RCCEx_PeriphCLKConfig HAL_GPIO_Init HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ Error_Handler HAL_DMA_Init hdma_adc2 HAL_GPIO_DeInit HAL_DMA_DeInit HAL_NVIC_DisableIRQ hdma_usart1_rx hdma_usart1_tx